diff options
author | Nick Brassel <nick@tzarc.org> | 2021-01-20 00:35:24 +1100 |
---|---|---|
committer | GitHub <noreply@github.com> | 2021-01-20 00:35:24 +1100 |
commit | 19c180ef88168df25a9f6d680143319c79a3cac0 (patch) | |
tree | 69d507828c4b56f7d574edee35f9023b6f8c2423 | |
parent | d85b27bbbc6b086db469570cf741b515695dd816 (diff) | |
download | qmk_firmware-19c180ef88168df25a9f6d680143319c79a3cac0.tar.gz qmk_firmware-19c180ef88168df25a9f6d680143319c79a3cac0.zip |
ChibiOS conf migrations... take 10 (#11617)
* ChibiOS conf upgrade for akegata_denki/device_one
akegata_denki/device_one - 0d9f891416decbbb533c6c1147632ef7c55a2d9f
* ChibiOS conf upgrade for chavdai40
chavdai40/rev1 - 06bca6ec34948c8005e73254299488cdba3429f8
chavdai40/rev2 - f55650a8d7aa755eb72564e95a144910dd902a73
* ChibiOS conf upgrade for ergodox_stm32
ergodox_stm32 - 04433b80e4cd231c15163ace77428db72b5483ad
* ChibiOS conf upgrade for jm60
jm60 - a127e6cfccad74ed1a9e47e9213dc41cf0d26f1d
* ChibiOS conf upgrade for matrix/m20add
matrix/m20add - e2e556dad666ed9b1eea09e46d0eb14e19bda8b8
* ChibiOS conf upgrade for matrix/noah
matrix/noah - c6fd3caf0b7d444085283d4f0a9204ab283d5202
25 files changed, 79 insertions, 2440 deletions
diff --git a/keyboards/akegata_denki/device_one/boards/DEVICE_ONE/board.c b/keyboards/akegata_denki/device_one/boards/DEVICE_ONE/board.c deleted file mode 100644 index 20b857d00..000000000 --- a/keyboards/akegata_denki/device_one/boards/DEVICE_ONE/board.c +++ /dev/null | |||
@@ -1,263 +0,0 @@ | |||
1 | /* | ||
2 | ChibiOS - Copyright (C) 2006..2018 Giovanni Di Sirio | ||
3 | Licensed under the Apache License, Version 2.0 (the "License"); | ||
4 | you may not use this file except in compliance with the License. | ||
5 | You may obtain a copy of the License at | ||
6 | http://www.apache.org/licenses/LICENSE-2.0 | ||
7 | Unless required by applicable law or agreed to in writing, software | ||
8 | distributed under the License is distributed on an "AS IS" BASIS, | ||
9 | WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. | ||
10 | See the License for the specific language governing permissions and | ||
11 | limitations under the License. | ||
12 | */ | ||
13 | |||
14 | /* | ||
15 | * This file has been automatically generated using ChibiStudio board | ||
16 | * generator plugin. Do not edit manually. | ||
17 | */ | ||
18 | |||
19 | #include <hal.h> | ||
20 | #include <stm32_gpio.h> | ||
21 | |||
22 | /*===========================================================================*/ | ||
23 | /* Driver local definitions. */ | ||
24 | /*===========================================================================*/ | ||
25 | |||
26 | /*===========================================================================*/ | ||
27 | /* Driver exported variables. */ | ||
28 | /*===========================================================================*/ | ||
29 | |||
30 | /*===========================================================================*/ | ||
31 | /* Driver local variables and types. */ | ||
32 | /*===========================================================================*/ | ||
33 | |||
34 | /** | ||
35 | * @brief Type of STM32 GPIO port setup. | ||
36 | */ | ||
37 | typedef struct { | ||
38 | uint32_t moder; | ||
39 | uint32_t otyper; | ||
40 | uint32_t ospeedr; | ||
41 | uint32_t pupdr; | ||
42 | uint32_t odr; | ||
43 | uint32_t afrl; | ||
44 | uint32_t afrh; | ||
45 | } gpio_setup_t; | ||
46 | |||
47 | /** | ||
48 | * @brief Type of STM32 GPIO initialization data. | ||
49 | */ | ||
50 | typedef struct { | ||
51 | #if STM32_HAS_GPIOA || defined(__DOXYGEN__) | ||
52 | gpio_setup_t PAData; | ||
53 | #endif | ||
54 | #if STM32_HAS_GPIOB || defined(__DOXYGEN__) | ||
55 | gpio_setup_t PBData; | ||
56 | #endif | ||
57 | #if STM32_HAS_GPIOC || defined(__DOXYGEN__) | ||
58 | gpio_setup_t PCData; | ||
59 | #endif | ||
60 | #if STM32_HAS_GPIOD || defined(__DOXYGEN__) | ||
61 | gpio_setup_t PDData; | ||
62 | #endif | ||
63 | #if STM32_HAS_GPIOE || defined(__DOXYGEN__) | ||
64 | gpio_setup_t PEData; | ||
65 | #endif | ||
66 | #if STM32_HAS_GPIOF || defined(__DOXYGEN__) | ||
67 | gpio_setup_t PFData; | ||
68 | #endif | ||
69 | #if STM32_HAS_GPIOG || defined(__DOXYGEN__) | ||
70 | gpio_setup_t PGData; | ||
71 | #endif | ||
72 | #if STM32_HAS_GPIOH || defined(__DOXYGEN__) | ||
73 | gpio_setup_t PHData; | ||
74 | #endif | ||
75 | #if STM32_HAS_GPIOI || defined(__DOXYGEN__) | ||
76 | gpio_setup_t PIData; | ||
77 | #endif | ||
78 | #if STM32_HAS_GPIOJ || defined(__DOXYGEN__) | ||
79 | gpio_setup_t PJData; | ||
80 | #endif | ||
81 | #if STM32_HAS_GPIOK || defined(__DOXYGEN__) | ||
82 | gpio_setup_t PKData; | ||
83 | #endif | ||
84 | } gpio_config_t; | ||
85 | |||
86 | /** | ||
87 | * @brief STM32 GPIO static initialization data. | ||
88 | */ | ||
89 | static const gpio_config_t gpio_default_config = { | ||
90 | #if STM32_HAS_GPIOA | ||
91 | {VAL_GPIOA_MODER, VAL_GPIOA_OTYPER, VAL_GPIOA_OSPEEDR, VAL_GPIOA_PUPDR, | ||
92 | VAL_GPIOA_ODR, VAL_GPIOA_AFRL, VAL_GPIOA_AFRH}, | ||
93 | #endif | ||
94 | #if STM32_HAS_GPIOB | ||
95 | {VAL_GPIOB_MODER, VAL_GPIOB_OTYPER, VAL_GPIOB_OSPEEDR, VAL_GPIOB_PUPDR, | ||
96 | VAL_GPIOB_ODR, VAL_GPIOB_AFRL, VAL_GPIOB_AFRH}, | ||
97 | #endif | ||
98 | #if STM32_HAS_GPIOC | ||
99 | {VAL_GPIOC_MODER, VAL_GPIOC_OTYPER, VAL_GPIOC_OSPEEDR, VAL_GPIOC_PUPDR, | ||
100 | VAL_GPIOC_ODR, VAL_GPIOC_AFRL, VAL_GPIOC_AFRH}, | ||
101 | #endif | ||
102 | #if STM32_HAS_GPIOD | ||
103 | {VAL_GPIOD_MODER, VAL_GPIOD_OTYPER, VAL_GPIOD_OSPEEDR, VAL_GPIOD_PUPDR, | ||
104 | VAL_GPIOD_ODR, VAL_GPIOD_AFRL, VAL_GPIOD_AFRH}, | ||
105 | #endif | ||
106 | #if STM32_HAS_GPIOE | ||
107 | {VAL_GPIOE_MODER, VAL_GPIOE_OTYPER, VAL_GPIOE_OSPEEDR, VAL_GPIOE_PUPDR, | ||
108 | VAL_GPIOE_ODR, VAL_GPIOE_AFRL, VAL_GPIOE_AFRH}, | ||
109 | #endif | ||
110 | #if STM32_HAS_GPIOF | ||
111 | {VAL_GPIOF_MODER, VAL_GPIOF_OTYPER, VAL_GPIOF_OSPEEDR, VAL_GPIOF_PUPDR, | ||
112 | VAL_GPIOF_ODR, VAL_GPIOF_AFRL, VAL_GPIOF_AFRH}, | ||
113 | #endif | ||
114 | #if STM32_HAS_GPIOG | ||
115 | {VAL_GPIOG_MODER, VAL_GPIOG_OTYPER, VAL_GPIOG_OSPEEDR, VAL_GPIOG_PUPDR, | ||
116 | VAL_GPIOG_ODR, VAL_GPIOG_AFRL, VAL_GPIOG_AFRH}, | ||
117 | #endif | ||
118 | #if STM32_HAS_GPIOH | ||
119 | {VAL_GPIOH_MODER, VAL_GPIOH_OTYPER, VAL_GPIOH_OSPEEDR, VAL_GPIOH_PUPDR, | ||
120 | VAL_GPIOH_ODR, VAL_GPIOH_AFRL, VAL_GPIOH_AFRH}, | ||
121 | #endif | ||
122 | #if STM32_HAS_GPIOI | ||
123 | {VAL_GPIOI_MODER, VAL_GPIOI_OTYPER, VAL_GPIOI_OSPEEDR, VAL_GPIOI_PUPDR, | ||
124 | VAL_GPIOI_ODR, VAL_GPIOI_AFRL, VAL_GPIOI_AFRH}, | ||
125 | #endif | ||
126 | #if STM32_HAS_GPIOJ | ||
127 | {VAL_GPIOJ_MODER, VAL_GPIOJ_OTYPER, VAL_GPIOJ_OSPEEDR, VAL_GPIOJ_PUPDR, | ||
128 | VAL_GPIOJ_ODR, VAL_GPIOJ_AFRL, VAL_GPIOJ_AFRH}, | ||
129 | #endif | ||
130 | #if STM32_HAS_GPIOK | ||
131 | {VAL_GPIOK_MODER, VAL_GPIOK_OTYPER, VAL_GPIOK_OSPEEDR, VAL_GPIOK_PUPDR, | ||
132 | VAL_GPIOK_ODR, VAL_GPIOK_AFRL, VAL_GPIOK_AFRH} | ||
133 | #endif | ||
134 | }; | ||
135 | |||
136 | /*===========================================================================*/ | ||
137 | /* Driver local functions. */ | ||
138 | /*===========================================================================*/ | ||
139 | |||
140 | static void gpio_init(stm32_gpio_t *gpiop, const gpio_setup_t *config) { | ||
141 | |||
142 | gpiop->OTYPER = config->otyper; | ||
143 | gpiop->OSPEEDR = config->ospeedr; | ||
144 | gpiop->PUPDR = config->pupdr; | ||
145 | gpiop->ODR = config->odr; | ||
146 | gpiop->AFRL = config->afrl; | ||
147 | gpiop->AFRH = config->afrh; | ||
148 | gpiop->MODER = config->moder; | ||
149 | } | ||
150 | |||
151 | static void stm32_gpio_init(void) { | ||
152 | |||
153 | /* Enabling GPIO-related clocks, the mask comes from the | ||
154 | registry header file.*/ | ||
155 | rccResetAHB(STM32_GPIO_EN_MASK); | ||
156 | rccEnableAHB(STM32_GPIO_EN_MASK, true); | ||
157 | |||
158 | /* Initializing all the defined GPIO ports.*/ | ||
159 | #if STM32_HAS_GPIOA | ||
160 | gpio_init(GPIOA, &gpio_default_config.PAData); | ||
161 | #endif | ||
162 | #if STM32_HAS_GPIOB | ||
163 | gpio_init(GPIOB, &gpio_default_config.PBData); | ||
164 | #endif | ||
165 | #if STM32_HAS_GPIOC | ||
166 | gpio_init(GPIOC, &gpio_default_config.PCData); | ||
167 | #endif | ||
168 | #if STM32_HAS_GPIOD | ||
169 | gpio_init(GPIOD, &gpio_default_config.PDData); | ||
170 | #endif | ||
171 | #if STM32_HAS_GPIOE | ||
172 | gpio_init(GPIOE, &gpio_default_config.PEData); | ||
173 | #endif | ||
174 | #if STM32_HAS_GPIOF | ||
175 | gpio_init(GPIOF, &gpio_default_config.PFData); | ||
176 | #endif | ||
177 | #if STM32_HAS_GPIOG | ||
178 | gpio_init(GPIOG, &gpio_default_config.PGData); | ||
179 | #endif | ||
180 | #if STM32_HAS_GPIOH | ||
181 | gpio_init(GPIOH, &gpio_default_config.PHData); | ||
182 | #endif | ||
183 | #if STM32_HAS_GPIOI | ||
184 | gpio_init(GPIOI, &gpio_default_config.PIData); | ||
185 | #endif | ||
186 | #if STM32_HAS_GPIOJ | ||
187 | gpio_init(GPIOJ, &gpio_default_config.PJData); | ||
188 | #endif | ||
189 | #if STM32_HAS_GPIOK | ||
190 | gpio_init(GPIOK, &gpio_default_config.PKData); | ||
191 | #endif | ||
192 | } | ||
193 | |||
194 | /*===========================================================================*/ | ||
195 | /* Driver interrupt handlers. */ | ||
196 | /*===========================================================================*/ | ||
197 | |||
198 | /*===========================================================================*/ | ||
199 | /* Driver exported functions. */ | ||
200 | /*===========================================================================*/ | ||
201 | |||
202 | /** | ||
203 | * @brief Early initialization code. | ||
204 | * @details GPIO ports and system clocks are initialized before everything | ||
205 | * else. | ||
206 | */ | ||
207 | void __early_init(void) { | ||
208 | |||
209 | stm32_gpio_init(); | ||
210 | stm32_clock_init(); | ||
211 | } | ||
212 | |||
213 | #if HAL_USE_SDC || defined(__DOXYGEN__) | ||
214 | /** | ||
215 | * @brief SDC card detection. | ||
216 | */ | ||
217 | bool sdc_lld_is_card_inserted(SDCDriver *sdcp) { | ||
218 | |||
219 | (void)sdcp; | ||
220 | /* TODO: Fill the implementation.*/ | ||
221 | return true; | ||
222 | } | ||
223 | |||
224 | /** | ||
225 | * @brief SDC card write protection detection. | ||
226 | */ | ||
227 | bool sdc_lld_is_write_protected(SDCDriver *sdcp) { | ||
228 | |||
229 | (void)sdcp; | ||
230 | /* TODO: Fill the implementation.*/ | ||
231 | return false; | ||
232 | } | ||
233 | #endif /* HAL_USE_SDC */ | ||
234 | |||
235 | #if HAL_USE_MMC_SPI || defined(__DOXYGEN__) | ||
236 | /** | ||
237 | * @brief MMC_SPI card detection. | ||
238 | */ | ||
239 | bool mmc_lld_is_card_inserted(MMCDriver *mmcp) { | ||
240 | |||
241 | (void)mmcp; | ||
242 | /* TODO: Fill the implementation.*/ | ||
243 | return true; | ||
244 | } | ||
245 | |||
246 | /** | ||
247 | * @brief MMC_SPI card write protection detection. | ||
248 | */ | ||
249 | bool mmc_lld_is_write_protected(MMCDriver *mmcp) { | ||
250 | |||
251 | (void)mmcp; | ||
252 | /* TODO: Fill the implementation.*/ | ||
253 | return false; | ||
254 | } | ||
255 | #endif | ||
256 | |||
257 | /** | ||
258 | * @brief Board-specific initialization code. | ||
259 | * @todo Add your board-specific code, if any. | ||
260 | */ | ||
261 | void boardInit(void) { | ||
262 | |||
263 | } | ||
diff --git a/keyboards/akegata_denki/device_one/boards/DEVICE_ONE/board.h b/keyboards/akegata_denki/device_one/boards/DEVICE_ONE/board.h deleted file mode 100644 index 3c4f3f2e8..000000000 --- a/keyboards/akegata_denki/device_one/boards/DEVICE_ONE/board.h +++ /dev/null | |||
@@ -1,950 +0,0 @@ | |||
1 | /* | ||
2 | ChibiOS - Copyright (C) 2006..2018 Giovanni Di Sirio | ||
3 | Licensed under the Apache License, Version 2.0 (the "License"); | ||
4 | you may not use this file except in compliance with the License. | ||
5 | You may obtain a copy of the License at | ||
6 | http://www.apache.org/licenses/LICENSE-2.0 | ||
7 | Unless required by applicable law or agreed to in writing, software | ||
8 | distributed under the License is distributed on an "AS IS" BASIS, | ||
9 | WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. | ||
10 | See the License for the specific language governing permissions and | ||
11 | limitations under the License. | ||
12 | */ | ||
13 | |||
14 | /* | ||
15 | * This file has been automatically generated using ChibiStudio board | ||
16 | * generator plugin. Do not edit manually. | ||
17 | */ | ||
18 | |||
19 | #ifndef BOARD_H | ||
20 | #define BOARD_H | ||
21 | |||
22 | /*===========================================================================*/ | ||
23 | /* Driver constants. */ | ||
24 | /*===========================================================================*/ | ||
25 | |||
26 | /* | ||
27 | * Setup for STMicroelectronics STM32 Nucleo32-F042K6 board. | ||
28 | */ | ||
29 | |||
30 | /* | ||
31 | * Board identifier. | ||
32 | */ | ||
33 | #define BOARD_ST_NUCLEO32_F042K6 | ||
34 | #define BOARD_NAME "STMicroelectronics STM32 Nucleo32-F042K6" | ||
35 | |||
36 | /* | ||
37 | * Board oscillators-related settings. | ||
38 | * NOTE: LSE not fitted. | ||
39 | * NOTE: HSE not fitted. | ||
40 | */ | ||
41 | #if !defined(STM32_LSECLK) | ||
42 | #define STM32_LSECLK 0U | ||
43 | #endif | ||
44 | |||
45 | #define STM32_LSEDRV (3U << 3U) | ||
46 | |||
47 | #if !defined(STM32_HSECLK) | ||
48 | #define STM32_HSECLK 0U | ||
49 | #endif | ||
50 | |||
51 | /* | ||
52 | * MCU type as defined in the ST header. | ||
53 | */ | ||
54 | #define STM32F042x6 | ||
55 | |||
56 | /* | ||
57 | * IO pins assignments. | ||
58 | */ | ||
59 | #define GPIOA_ARD_A0 0U | ||
60 | #define GPIOA_ARD_A1 1U | ||
61 | #define GPIOA_VCP_TX 2U | ||
62 | #define GPIOA_ARD_A2 3U | ||
63 | #define GPIOA_ARD_A3 4U | ||
64 | #define GPIOA_ARD_A4 5U | ||
65 | #define GPIOA_ARD_A5 6U | ||
66 | #define GPIOA_ARD_A6 7U | ||
67 | #define GPIOA_ARD_D9 8U | ||
68 | #define GPIOA_ARD_D1 9U | ||
69 | #define GPIOA_ARD_D0 10U | ||
70 | #define GPIOA_ARD_D10 11U | ||
71 | #define GPIOA_ARD_D2 12U | ||
72 | #define GPIOA_SWDIO 13U | ||
73 | #define GPIOA_SWCLK 14U | ||
74 | #define GPIOA_VCP_RX 15U | ||
75 | |||
76 | #define GPIOB_ARD_D3 0U | ||
77 | #define GPIOB_ARD_D6 1U | ||
78 | #define GPIOB_PIN2 2U | ||
79 | #define GPIOB_ARD_D13 3U | ||
80 | #define GPIOB_LED_GREEN 3U | ||
81 | #define GPIOB_ARD_D12 4U | ||
82 | #define GPIOB_ARD_D11 5U | ||
83 | #define GPIOB_ARD_D5 6U | ||
84 | #define GPIOB_ARD_A5_ALT 6U | ||
85 | #define GPIOB_ARD_D4 7U | ||
86 | #define GPIOB_ARD_A4_ALT 7U | ||
87 | #define GPIOB_PIN8 8U | ||
88 | #define GPIOB_PIN9 9U | ||
89 | #define GPIOB_PIN10 10U | ||
90 | #define GPIOB_PIN11 11U | ||
91 | #define GPIOB_PIN12 12U | ||
92 | #define GPIOB_PIN13 13U | ||
93 | #define GPIOB_PIN14 14U | ||
94 | #define GPIOB_PIN15 15U | ||
95 | |||
96 | #define GPIOC_PIN0 0U | ||
97 | #define GPIOC_PIN1 1U | ||
98 | #define GPIOC_PIN2 2U | ||
99 | #define GPIOC_PIN3 3U | ||
100 | #define GPIOC_PIN4 4U | ||
101 | #define GPIOC_PIN5 5U | ||
102 | #define GPIOC_PIN6 6U | ||
103 | #define GPIOC_PIN7 7U | ||
104 | #define GPIOC_PIN8 8U | ||
105 | #define GPIOC_PIN9 9U | ||
106 | #define GPIOC_PIN10 10U | ||
107 | #define GPIOC_PIN11 11U | ||
108 | #define GPIOC_PIN12 12U | ||
109 | #define GPIOC_PIN13 13U | ||
110 | #define GPIOC_PIN14 14U | ||
111 | #define GPIOC_PIN15 15U | ||
112 | |||
113 | #define GPIOD_PIN0 0U | ||
114 | #define GPIOD_PIN1 1U | ||
115 | #define GPIOD_PIN2 2U | ||
116 | #define GPIOD_PIN3 3U | ||
117 | #define GPIOD_PIN4 4U | ||
118 | #define GPIOD_PIN5 5U | ||
119 | #define GPIOD_PIN6 6U | ||
120 | #define GPIOD_PIN7 7U | ||
121 | #define GPIOD_PIN8 8U | ||
122 | #define GPIOD_PIN9 9U | ||
123 | #define GPIOD_PIN10 10U | ||
124 | #define GPIOD_PIN11 11U | ||
125 | #define GPIOD_PIN12 12U | ||
126 | #define GPIOD_PIN13 13U | ||
127 | #define GPIOD_PIN14 14U | ||
128 | #define GPIOD_PIN15 15U | ||
129 | |||
130 | #define GPIOE_PIN0 0U | ||
131 | #define GPIOE_PIN1 1U | ||
132 | #define GPIOE_PIN2 2U | ||
133 | #define GPIOE_PIN3 3U | ||
134 | #define GPIOE_PIN4 4U | ||
135 | #define GPIOE_PIN5 5U | ||
136 | #define GPIOE_PIN6 6U | ||
137 | #define GPIOE_PIN7 7U | ||
138 | #define GPIOE_PIN8 8U | ||
139 | #define GPIOE_PIN9 9U | ||
140 | #define GPIOE_PIN10 10U | ||
141 | #define GPIOE_PIN11 11U | ||
142 | #define GPIOE_PIN12 12U | ||
143 | #define GPIOE_PIN13 13U | ||
144 | #define GPIOE_PIN14 14U | ||
145 | #define GPIOE_PIN15 15U | ||
146 | |||
147 | #define GPIOF_ARD_D7 0U | ||
148 | #define GPIOF_ARD_D8 1U | ||
149 | #define GPIOF_PIN2 2U | ||
150 | #define GPIOF_PIN3 3U | ||
151 | #define GPIOF_PIN4 4U | ||
152 | #define GPIOF_PIN5 5U | ||
153 | #define GPIOF_PIN6 6U | ||
154 | #define GPIOF_PIN7 7U | ||
155 | #define GPIOF_PIN8 8U | ||
156 | #define GPIOF_PIN9 9U | ||
157 | #define GPIOF_PIN10 10U | ||
158 | #define GPIOF_PIN11 11U | ||
159 | #define GPIOF_PIN12 12U | ||
160 | #define GPIOF_PIN13 13U | ||
161 | #define GPIOF_PIN14 14U | ||
162 | #define GPIOF_PIN15 15U | ||
163 | |||
164 | /* | ||
165 | * IO lines assignments. | ||
166 | */ | ||
167 | #define LINE_ARD_A0 PAL_LINE(GPIOA, 0U) | ||
168 | #define LINE_ARD_A1 PAL_LINE(GPIOA, 1U) | ||
169 | #define LINE_VCP_TX PAL_LINE(GPIOA, 2U) | ||
170 | #define LINE_ARD_A2 PAL_LINE(GPIOA, 3U) | ||
171 | #define LINE_ARD_A3 PAL_LINE(GPIOA, 4U) | ||
172 | #define LINE_ARD_A4 PAL_LINE(GPIOA, 5U) | ||
173 | #define LINE_ARD_A5 PAL_LINE(GPIOA, 6U) | ||
174 | #define LINE_ARD_A6 PAL_LINE(GPIOA, 7U) | ||
175 | #define LINE_ARD_D9 PAL_LINE(GPIOA, 8U) | ||
176 | #define LINE_ARD_D1 PAL_LINE(GPIOA, 9U) | ||
177 | #define LINE_ARD_D0 PAL_LINE(GPIOA, 10U) | ||
178 | #define LINE_ARD_D10 PAL_LINE(GPIOA, 11U) | ||
179 | #define LINE_ARD_D2 PAL_LINE(GPIOA, 12U) | ||
180 | #define LINE_SWDIO PAL_LINE(GPIOA, 13U) | ||
181 | #define LINE_SWCLK PAL_LINE(GPIOA, 14U) | ||
182 | #define LINE_VCP_RX PAL_LINE(GPIOA, 15U) | ||
183 | #define LINE_ARD_D3 PAL_LINE(GPIOB, 0U) | ||
184 | #define LINE_ARD_D6 PAL_LINE(GPIOB, 1U) | ||
185 | #define LINE_ARD_D13 PAL_LINE(GPIOB, 3U) | ||
186 | #define LINE_LED_GREEN PAL_LINE(GPIOB, 3U) | ||
187 | #define LINE_ARD_D12 PAL_LINE(GPIOB, 4U) | ||
188 | #define LINE_ARD_D11 PAL_LINE(GPIOB, 5U) | ||
189 | #define LINE_ARD_D5 PAL_LINE(GPIOB, 6U) | ||
190 | #define LINE_ARD_A5_ALT PAL_LINE(GPIOB, 6U) | ||
191 | #define LINE_ARD_D4 PAL_LINE(GPIOB, 7U) | ||
192 | #define LINE_ARD_A4_ALT PAL_LINE(GPIOB, 7U) | ||
193 | #define LINE_ARD_D7 PAL_LINE(GPIOF, 0U) | ||
194 | #define LINE_ARD_D8 PAL_LINE(GPIOF, 1U) | ||
195 | |||
196 | /*===========================================================================*/ | ||
197 | /* Driver pre-compile time settings. */ | ||
198 | /*===========================================================================*/ | ||
199 | |||
200 | /*===========================================================================*/ | ||
201 | /* Derived constants and error checks. */ | ||
202 | /*===========================================================================*/ | ||
203 | |||
204 | /*===========================================================================*/ | ||
205 | /* Driver data structures and types. */ | ||
206 | /*===========================================================================*/ | ||
207 | |||
208 | /*===========================================================================*/ | ||
209 | /* Driver macros. */ | ||
210 | /*===========================================================================*/ | ||
211 | |||
212 | /* | ||
213 | * I/O ports initial setup, this configuration is established soon after reset | ||
214 | * in the initialization code. | ||
215 | * Please refer to the STM32 Reference Manual for details. | ||
216 | */ | ||
217 | #define PIN_MODE_INPUT(n) (0U << ((n) * 2U)) | ||
218 | #define PIN_MODE_OUTPUT(n) (1U << ((n) * 2U)) | ||
219 | #define PIN_MODE_ALTERNATE(n) (2U << ((n) * 2U)) | ||
220 | #define PIN_MODE_ANALOG(n) (3U << ((n) * 2U)) | ||
221 | #define PIN_ODR_LOW(n) (0U << (n)) | ||
222 | #define PIN_ODR_HIGH(n) (1U << (n)) | ||
223 | #define PIN_OTYPE_PUSHPULL(n) (0U << (n)) | ||
224 | #define PIN_OTYPE_OPENDRAIN(n) (1U << (n)) | ||
225 | #define PIN_OSPEED_VERYLOW(n) (0U << ((n) * 2U)) | ||
226 | #define PIN_OSPEED_LOW(n) (1U << ((n) * 2U)) | ||
227 | #define PIN_OSPEED_MEDIUM(n) (2U << ((n) * 2U)) | ||
228 | #define PIN_OSPEED_HIGH(n) (3U << ((n) * 2U)) | ||
229 | #define PIN_PUPDR_FLOATING(n) (0U << ((n) * 2U)) | ||
230 | #define PIN_PUPDR_PULLUP(n) (1U << ((n) * 2U)) | ||
231 | #define PIN_PUPDR_PULLDOWN(n) (2U << ((n) * 2U)) | ||
232 | #define PIN_AFIO_AF(n, v) ((v) << (((n) % 8U) * 4U)) | ||
233 | |||
234 | /* | ||
235 | * GPIOA setup: | ||
236 | * | ||
237 | * PA0 - ARD_A0 (input pullup). | ||
238 | * PA1 - ARD_A1 (input pullup). | ||
239 | * PA2 - VCP_TX (alternate 1). | ||
240 | * PA3 - ARD_A2 (input pullup). | ||
241 | * PA4 - ARD_A3 (input pullup). | ||
242 | * PA5 - ARD_A4 (input pullup). | ||
243 | * PA6 - ARD_A5 (input pullup). | ||
244 | * PA7 - ARD_A6 (input pullup). | ||
245 | * PA8 - ARD_D9 (input pullup). | ||
246 | * PA9 - ARD_D1 (input pullup). | ||
247 | * PA10 - ARD_D0 (input pullup). | ||
248 | * PA11 - ARD_D10 (input pullup). | ||
249 | * PA12 - ARD_D2 (input pullup). | ||
250 | * PA13 - SWDIO (alternate 0). | ||
251 | * PA14 - SWCLK (alternate 0). | ||
252 | * PA15 - VCP_RX (alternate 1). | ||
253 | */ | ||
254 | #define VAL_GPIOA_MODER (PIN_MODE_INPUT(GPIOA_ARD_A0) | \ | ||
255 | PIN_MODE_INPUT(GPIOA_ARD_A1) | \ | ||
256 | PIN_MODE_ALTERNATE(GPIOA_VCP_TX) | \ | ||
257 | PIN_MODE_INPUT(GPIOA_ARD_A2) | \ | ||
258 | PIN_MODE_INPUT(GPIOA_ARD_A3) | \ | ||
259 | PIN_MODE_INPUT(GPIOA_ARD_A4) | \ | ||
260 | PIN_MODE_INPUT(GPIOA_ARD_A5) | \ | ||
261 | PIN_MODE_INPUT(GPIOA_ARD_A6) | \ | ||
262 | PIN_MODE_INPUT(GPIOA_ARD_D9) | \ | ||
263 | PIN_MODE_INPUT(GPIOA_ARD_D1) | \ | ||
264 | PIN_MODE_INPUT(GPIOA_ARD_D0) | \ | ||
265 | PIN_MODE_INPUT(GPIOA_ARD_D10) | \ | ||
266 | PIN_MODE_INPUT(GPIOA_ARD_D2) | \ | ||
267 | PIN_MODE_ALTERNATE(GPIOA_SWDIO) | \ | ||
268 | PIN_MODE_ALTERNATE(GPIOA_SWCLK) | \ | ||
269 | PIN_MODE_ALTERNATE(GPIOA_VCP_RX)) | ||
270 | #define VAL_GPIOA_OTYPER (PIN_OTYPE_PUSHPULL(GPIOA_ARD_A0) | \ | ||
271 | PIN_OTYPE_PUSHPULL(GPIOA_ARD_A1) | \ | ||
272 | PIN_OTYPE_PUSHPULL(GPIOA_VCP_TX) | \ | ||
273 | PIN_OTYPE_PUSHPULL(GPIOA_ARD_A2) | \ | ||
274 | PIN_OTYPE_PUSHPULL(GPIOA_ARD_A3) | \ | ||
275 | PIN_OTYPE_PUSHPULL(GPIOA_ARD_A4) | \ | ||
276 | PIN_OTYPE_PUSHPULL(GPIOA_ARD_A5) | \ | ||
277 | PIN_OTYPE_PUSHPULL(GPIOA_ARD_A6) | \ | ||
278 | PIN_OTYPE_PUSHPULL(GPIOA_ARD_D9) | \ | ||
279 | PIN_OTYPE_PUSHPULL(GPIOA_ARD_D1) | \ | ||
280 | PIN_OTYPE_PUSHPULL(GPIOA_ARD_D0) | \ | ||
281 | PIN_OTYPE_PUSHPULL(GPIOA_ARD_D10) | \ | ||
282 | PIN_OTYPE_PUSHPULL(GPIOA_ARD_D2) | \ | ||
283 | PIN_OTYPE_PUSHPULL(GPIOA_SWDIO) | \ | ||
284 | PIN_OTYPE_PUSHPULL(GPIOA_SWCLK) | \ | ||
285 | PIN_OTYPE_PUSHPULL(GPIOA_VCP_RX)) | ||
286 | #define VAL_GPIOA_OSPEEDR (PIN_OSPEED_HIGH(GPIOA_ARD_A0) | \ | ||
287 | PIN_OSPEED_HIGH(GPIOA_ARD_A1) | \ | ||
288 | PIN_OSPEED_LOW(GPIOA_VCP_TX) | \ | ||
289 | PIN_OSPEED_LOW(GPIOA_ARD_A2) | \ | ||
290 | PIN_OSPEED_HIGH(GPIOA_ARD_A3) | \ | ||
291 | PIN_OSPEED_LOW(GPIOA_ARD_A4) | \ | ||
292 | PIN_OSPEED_HIGH(GPIOA_ARD_A5) | \ | ||
293 | PIN_OSPEED_HIGH(GPIOA_ARD_A6) | \ | ||
294 | PIN_OSPEED_HIGH(GPIOA_ARD_D9) | \ | ||
295 | PIN_OSPEED_HIGH(GPIOA_ARD_D1) | \ | ||
296 | PIN_OSPEED_HIGH(GPIOA_ARD_D0) | \ | ||
297 | PIN_OSPEED_HIGH(GPIOA_ARD_D10) | \ | ||
298 | PIN_OSPEED_HIGH(GPIOA_ARD_D2) | \ | ||
299 | PIN_OSPEED_HIGH(GPIOA_SWDIO) | \ | ||
300 | PIN_OSPEED_HIGH(GPIOA_SWCLK) | \ | ||
301 | PIN_OSPEED_HIGH(GPIOA_VCP_RX)) | ||
302 | #define VAL_GPIOA_PUPDR (PIN_PUPDR_PULLUP(GPIOA_ARD_A0) | \ | ||
303 | PIN_PUPDR_PULLUP(GPIOA_ARD_A1) | \ | ||
304 | PIN_PUPDR_FLOATING(GPIOA_VCP_TX) | \ | ||
305 | PIN_PUPDR_PULLUP(GPIOA_ARD_A2) | \ | ||
306 | PIN_PUPDR_PULLUP(GPIOA_ARD_A3) | \ | ||
307 | PIN_PUPDR_PULLUP(GPIOA_ARD_A4) | \ | ||
308 | PIN_PUPDR_PULLUP(GPIOA_ARD_A5) | \ | ||
309 | PIN_PUPDR_PULLUP(GPIOA_ARD_A6) | \ | ||
310 | PIN_PUPDR_PULLUP(GPIOA_ARD_D9) | \ | ||
311 | PIN_PUPDR_PULLUP(GPIOA_ARD_D1) | \ | ||
312 | PIN_PUPDR_PULLUP(GPIOA_ARD_D0) | \ | ||
313 | PIN_PUPDR_PULLUP(GPIOA_ARD_D10) | \ | ||
314 | PIN_PUPDR_PULLUP(GPIOA_ARD_D2) | \ | ||
315 | PIN_PUPDR_PULLUP(GPIOA_SWDIO) | \ | ||
316 | PIN_PUPDR_PULLDOWN(GPIOA_SWCLK) | \ | ||
317 | PIN_PUPDR_FLOATING(GPIOA_VCP_RX)) | ||
318 | #define VAL_GPIOA_ODR (PIN_ODR_HIGH(GPIOA_ARD_A0) | \ | ||
319 | PIN_ODR_HIGH(GPIOA_ARD_A1) | \ | ||
320 | PIN_ODR_HIGH(GPIOA_VCP_TX) | \ | ||
321 | PIN_ODR_HIGH(GPIOA_ARD_A2) | \ | ||
322 | PIN_ODR_HIGH(GPIOA_ARD_A3) | \ | ||
323 | PIN_ODR_LOW(GPIOA_ARD_A4) | \ | ||
324 | PIN_ODR_HIGH(GPIOA_ARD_A5) | \ | ||
325 | PIN_ODR_HIGH(GPIOA_ARD_A6) | \ | ||
326 | PIN_ODR_HIGH(GPIOA_ARD_D9) | \ | ||
327 | PIN_ODR_HIGH(GPIOA_ARD_D1) | \ | ||
328 | PIN_ODR_HIGH(GPIOA_ARD_D0) | \ | ||
329 | PIN_ODR_HIGH(GPIOA_ARD_D10) | \ | ||
330 | PIN_ODR_HIGH(GPIOA_ARD_D2) | \ | ||
331 | PIN_ODR_HIGH(GPIOA_SWDIO) | \ | ||
332 | PIN_ODR_HIGH(GPIOA_SWCLK) | \ | ||
333 | PIN_ODR_HIGH(GPIOA_VCP_RX)) | ||
334 | #define VAL_GPIOA_AFRL (PIN_AFIO_AF(GPIOA_ARD_A0, 0U) | \ | ||
335 | PIN_AFIO_AF(GPIOA_ARD_A1, 0U) | \ | ||
336 | PIN_AFIO_AF(GPIOA_VCP_TX, 1U) | \ | ||
337 | PIN_AFIO_AF(GPIOA_ARD_A2, 0U) | \ | ||
338 | PIN_AFIO_AF(GPIOA_ARD_A3, 0U) | \ | ||
339 | PIN_AFIO_AF(GPIOA_ARD_A4, 0U) | \ | ||
340 | PIN_AFIO_AF(GPIOA_ARD_A5, 0U) | \ | ||
341 | PIN_AFIO_AF(GPIOA_ARD_A6, 0U)) | ||
342 | #define VAL_GPIOA_AFRH (PIN_AFIO_AF(GPIOA_ARD_D9, 0U) | \ | ||
343 | PIN_AFIO_AF(GPIOA_ARD_D1, 0U) | \ | ||
344 | PIN_AFIO_AF(GPIOA_ARD_D0, 0U) | \ | ||
345 | PIN_AFIO_AF(GPIOA_ARD_D10, 0U) | \ | ||
346 | PIN_AFIO_AF(GPIOA_ARD_D2, 0U) | \ | ||
347 | PIN_AFIO_AF(GPIOA_SWDIO, 0U) | \ | ||
348 | PIN_AFIO_AF(GPIOA_SWCLK, 0U) | \ | ||
349 | PIN_AFIO_AF(GPIOA_VCP_RX, 1U)) | ||
350 | |||
351 | /* | ||
352 | * GPIOB setup: | ||
353 | * | ||
354 | * PB0 - ARD_D3 (input pullup). | ||
355 | * PB1 - ARD_D6 (input pullup). | ||
356 | * PB2 - PIN2 (input pullup). | ||
357 | * PB3 - ARD_D13 LED_GREEN (output pushpull maximum). | ||
358 | * PB4 - ARD_D12 (input pullup). | ||
359 | * PB5 - ARD_D11 (input pullup). | ||
360 | * PB6 - ARD_D5 ARD_A5_ALT (input pullup). | ||
361 | * PB7 - ARD_D4 ARD_A4_ALT (input pullup). | ||
362 | * PB8 - PIN8 (input pullup). | ||
363 | * PB9 - PIN9 (input pullup). | ||
364 | * PB10 - PIN10 (input pullup). | ||
365 | * PB11 - PIN11 (input pullup). | ||
366 | * PB12 - PIN12 (input pullup). | ||
367 | * PB13 - PIN13 (input pullup). | ||
368 | * PB14 - PIN14 (input pullup). | ||
369 | * PB15 - PIN15 (input pullup). | ||
370 | */ | ||
371 | #define VAL_GPIOB_MODER (PIN_MODE_INPUT(GPIOB_ARD_D3) | \ | ||
372 | PIN_MODE_INPUT(GPIOB_ARD_D6) | \ | ||
373 | PIN_MODE_INPUT(GPIOB_PIN2) | \ | ||
374 | PIN_MODE_OUTPUT(GPIOB_ARD_D13) | \ | ||
375 | PIN_MODE_INPUT(GPIOB_ARD_D12) | \ | ||
376 | PIN_MODE_INPUT(GPIOB_ARD_D11) | \ | ||
377 | PIN_MODE_INPUT(GPIOB_ARD_D5) | \ | ||
378 | PIN_MODE_INPUT(GPIOB_ARD_D4) | \ | ||
379 | PIN_MODE_INPUT(GPIOB_PIN8) | \ | ||
380 | PIN_MODE_INPUT(GPIOB_PIN9) | \ | ||
381 | PIN_MODE_INPUT(GPIOB_PIN10) | \ | ||
382 | PIN_MODE_INPUT(GPIOB_PIN11) | \ | ||
383 | PIN_MODE_INPUT(GPIOB_PIN12) | \ | ||
384 | PIN_MODE_INPUT(GPIOB_PIN13) | \ | ||
385 | PIN_MODE_INPUT(GPIOB_PIN14) | \ | ||
386 | PIN_MODE_INPUT(GPIOB_PIN15)) | ||
387 | #define VAL_GPIOB_OTYPER (PIN_OTYPE_PUSHPULL(GPIOB_ARD_D3) | \ | ||
388 | PIN_OTYPE_PUSHPULL(GPIOB_ARD_D6) | \ | ||
389 | PIN_OTYPE_PUSHPULL(GPIOB_PIN2) | \ | ||
390 | PIN_OTYPE_PUSHPULL(GPIOB_ARD_D13) | \ | ||
391 | PIN_OTYPE_PUSHPULL(GPIOB_ARD_D12) | \ | ||
392 | PIN_OTYPE_PUSHPULL(GPIOB_ARD_D11) | \ | ||
393 | PIN_OTYPE_PUSHPULL(GPIOB_ARD_D5) | \ | ||
394 | PIN_OTYPE_PUSHPULL(GPIOB_ARD_D4) | \ | ||
395 | PIN_OTYPE_PUSHPULL(GPIOB_PIN8) | \ | ||
396 | PIN_OTYPE_PUSHPULL(GPIOB_PIN9) | \ | ||
397 | PIN_OTYPE_PUSHPULL(GPIOB_PIN10) | \ | ||
398 | PIN_OTYPE_PUSHPULL(GPIOB_PIN11) | \ | ||
399 | PIN_OTYPE_PUSHPULL(GPIOB_PIN12) | \ | ||
400 | PIN_OTYPE_PUSHPULL(GPIOB_PIN13) | \ | ||
401 | PIN_OTYPE_PUSHPULL(GPIOB_PIN14) | \ | ||
402 | PIN_OTYPE_PUSHPULL(GPIOB_PIN15)) | ||
403 | #define VAL_GPIOB_OSPEEDR (PIN_OSPEED_HIGH(GPIOB_ARD_D3) | \ | ||
404 | PIN_OSPEED_HIGH(GPIOB_ARD_D6) | \ | ||
405 | PIN_OSPEED_HIGH(GPIOB_PIN2) | \ | ||
406 | PIN_OSPEED_HIGH(GPIOB_ARD_D13) | \ | ||
407 | PIN_OSPEED_HIGH(GPIOB_ARD_D12) | \ | ||
408 | PIN_OSPEED_HIGH(GPIOB_ARD_D11) | \ | ||
409 | PIN_OSPEED_HIGH(GPIOB_ARD_D5) | \ | ||
410 | PIN_OSPEED_HIGH(GPIOB_ARD_D4) | \ | ||
411 | PIN_OSPEED_HIGH(GPIOB_PIN8) | \ | ||
412 | PIN_OSPEED_HIGH(GPIOB_PIN9) | \ | ||
413 | PIN_OSPEED_HIGH(GPIOB_PIN10) | \ | ||
414 | PIN_OSPEED_HIGH(GPIOB_PIN11) | \ | ||
415 | PIN_OSPEED_HIGH(GPIOB_PIN12) | \ | ||
416 | PIN_OSPEED_HIGH(GPIOB_PIN13) | \ | ||
417 | PIN_OSPEED_HIGH(GPIOB_PIN14) | \ | ||
418 | PIN_OSPEED_HIGH(GPIOB_PIN15)) | ||
419 | #define VAL_GPIOB_PUPDR (PIN_PUPDR_PULLUP(GPIOB_ARD_D3) | \ | ||
420 | PIN_PUPDR_PULLUP(GPIOB_ARD_D6) | \ | ||
421 | PIN_PUPDR_PULLUP(GPIOB_PIN2) | \ | ||
422 | PIN_PUPDR_FLOATING(GPIOB_ARD_D13) | \ | ||
423 | PIN_PUPDR_PULLUP(GPIOB_ARD_D12) | \ | ||
424 | PIN_PUPDR_PULLUP(GPIOB_ARD_D11) | \ | ||
425 | PIN_PUPDR_PULLUP(GPIOB_ARD_D5) | \ | ||
426 | PIN_PUPDR_PULLUP(GPIOB_ARD_D4) | \ | ||
427 | PIN_PUPDR_PULLUP(GPIOB_PIN8) | \ | ||
428 | PIN_PUPDR_PULLUP(GPIOB_PIN9) | \ | ||
429 | PIN_PUPDR_PULLUP(GPIOB_PIN10) | \ | ||
430 | PIN_PUPDR_PULLUP(GPIOB_PIN11) | \ | ||
431 | PIN_PUPDR_PULLUP(GPIOB_PIN12) | \ | ||
432 | PIN_PUPDR_PULLUP(GPIOB_PIN13) | \ | ||
433 | PIN_PUPDR_PULLUP(GPIOB_PIN14) | \ | ||
434 | PIN_PUPDR_PULLUP(GPIOB_PIN15)) | ||
435 | #define VAL_GPIOB_ODR (PIN_ODR_HIGH(GPIOB_ARD_D3) | \ | ||
436 | PIN_ODR_HIGH(GPIOB_ARD_D6) | \ | ||
437 | PIN_ODR_HIGH(GPIOB_PIN2) | \ | ||
438 | PIN_ODR_LOW(GPIOB_ARD_D13) | \ | ||
439 | PIN_ODR_HIGH(GPIOB_ARD_D12) | \ | ||
440 | PIN_ODR_HIGH(GPIOB_ARD_D11) | \ | ||
441 | PIN_ODR_HIGH(GPIOB_ARD_D5) | \ | ||
442 | PIN_ODR_HIGH(GPIOB_ARD_D4) | \ | ||
443 | PIN_ODR_HIGH(GPIOB_PIN8) | \ | ||
444 | PIN_ODR_HIGH(GPIOB_PIN9) | \ | ||
445 | PIN_ODR_HIGH(GPIOB_PIN10) | \ | ||
446 | PIN_ODR_HIGH(GPIOB_PIN11) | \ | ||
447 | PIN_ODR_HIGH(GPIOB_PIN12) | \ | ||
448 | PIN_ODR_HIGH(GPIOB_PIN13) | \ | ||
449 | PIN_ODR_HIGH(GPIOB_PIN14) | \ | ||
450 | PIN_ODR_HIGH(GPIOB_PIN15)) | ||
451 | #define VAL_GPIOB_AFRL (PIN_AFIO_AF(GPIOB_ARD_D3, 0U) | \ | ||
452 | PIN_AFIO_AF(GPIOB_ARD_D6, 0U) | \ | ||
453 | PIN_AFIO_AF(GPIOB_PIN2, 0U) | \ | ||
454 | PIN_AFIO_AF(GPIOB_ARD_D13, 0U) | \ | ||
455 | PIN_AFIO_AF(GPIOB_ARD_D12, 0U) | \ | ||
456 | PIN_AFIO_AF(GPIOB_ARD_D11, 0U) | \ | ||
457 | PIN_AFIO_AF(GPIOB_ARD_D5, 0U) | \ | ||
458 | PIN_AFIO_AF(GPIOB_ARD_D4, 0U)) | ||
459 | #define VAL_GPIOB_AFRH (PIN_AFIO_AF(GPIOB_PIN8, 0U) | \ | ||
460 | PIN_AFIO_AF(GPIOB_PIN9, 0U) | \ | ||
461 | PIN_AFIO_AF(GPIOB_PIN10, 0U) | \ | ||
462 | PIN_AFIO_AF(GPIOB_PIN11, 0U) | \ | ||
463 | PIN_AFIO_AF(GPIOB_PIN12, 0U) | \ | ||
464 | PIN_AFIO_AF(GPIOB_PIN13, 0U) | \ | ||
465 | PIN_AFIO_AF(GPIOB_PIN14, 0U) | \ | ||
466 | PIN_AFIO_AF(GPIOB_PIN15, 0U)) | ||
467 | |||
468 | /* | ||
469 | * GPIOC setup: | ||
470 | * | ||
471 | * PC0 - PIN0 (input pullup). | ||
472 | * PC1 - PIN1 (input pullup). | ||
473 | * PC2 - PIN2 (input pullup). | ||
474 | * PC3 - PIN3 (input pullup). | ||
475 | * PC4 - PIN4 (input pullup). | ||
476 | * PC5 - PIN5 (input pullup). | ||
477 | * PC6 - PIN6 (input pullup). | ||
478 | * PC7 - PIN7 (input pullup). | ||
479 | * PC8 - PIN8 (input pullup). | ||
480 | * PC9 - PIN9 (input pullup). | ||
481 | * PC10 - PIN10 (input pullup). | ||
482 | * PC11 - PIN11 (input pullup). | ||
483 | * PC12 - PIN12 (input pullup). | ||
484 | * PC13 - PIN13 (input pullup). | ||
485 | * PC14 - PIN14 (input pullup). | ||
486 | * PC15 - PIN15 (input pullup). | ||
487 | */ | ||
488 | #define VAL_GPIOC_MODER (PIN_MODE_INPUT(GPIOC_PIN0) | \ | ||
489 | PIN_MODE_INPUT(GPIOC_PIN1) | \ | ||
490 | PIN_MODE_INPUT(GPIOC_PIN2) | \ | ||
491 | PIN_MODE_INPUT(GPIOC_PIN3) | \ | ||
492 | PIN_MODE_INPUT(GPIOC_PIN4) | \ | ||
493 | PIN_MODE_INPUT(GPIOC_PIN5) | \ | ||
494 | PIN_MODE_INPUT(GPIOC_PIN6) | \ | ||
495 | PIN_MODE_INPUT(GPIOC_PIN7) | \ | ||
496 | PIN_MODE_INPUT(GPIOC_PIN8) | \ | ||
497 | PIN_MODE_INPUT(GPIOC_PIN9) | \ | ||
498 | PIN_MODE_INPUT(GPIOC_PIN10) | \ | ||
499 | PIN_MODE_INPUT(GPIOC_PIN11) | \ | ||
500 | PIN_MODE_INPUT(GPIOC_PIN12) | \ | ||
501 | PIN_MODE_INPUT(GPIOC_PIN13) | \ | ||
502 | PIN_MODE_INPUT(GPIOC_PIN14) | \ | ||
503 | PIN_MODE_INPUT(GPIOC_PIN15)) | ||
504 | #define VAL_GPIOC_OTYPER (PIN_OTYPE_PUSHPULL(GPIOC_PIN0) | \ | ||
505 | PIN_OTYPE_PUSHPULL(GPIOC_PIN1) | \ | ||
506 | PIN_OTYPE_PUSHPULL(GPIOC_PIN2) | \ | ||
507 | PIN_OTYPE_PUSHPULL(GPIOC_PIN3) | \ | ||
508 | PIN_OTYPE_PUSHPULL(GPIOC_PIN4) | \ | ||
509 | PIN_OTYPE_PUSHPULL(GPIOC_PIN5) | \ | ||
510 | PIN_OTYPE_PUSHPULL(GPIOC_PIN6) | \ | ||
511 | PIN_OTYPE_PUSHPULL(GPIOC_PIN7) | \ | ||
512 | PIN_OTYPE_PUSHPULL(GPIOC_PIN8) | \ | ||
513 | PIN_OTYPE_PUSHPULL(GPIOC_PIN9) | \ | ||
514 | PIN_OTYPE_PUSHPULL(GPIOC_PIN10) | \ | ||
515 | PIN_OTYPE_PUSHPULL(GPIOC_PIN11) | \ | ||
516 | PIN_OTYPE_PUSHPULL(GPIOC_PIN12) | \ | ||
517 | PIN_OTYPE_PUSHPULL(GPIOC_PIN13) | \ | ||
518 | PIN_OTYPE_PUSHPULL(GPIOC_PIN14) | \ | ||
519 | PIN_OTYPE_PUSHPULL(GPIOC_PIN15)) | ||
520 | #define VAL_GPIOC_OSPEEDR (PIN_OSPEED_HIGH(GPIOC_PIN0) | \ | ||
521 | PIN_OSPEED_HIGH(GPIOC_PIN1) | \ | ||
522 | PIN_OSPEED_HIGH(GPIOC_PIN2) | \ | ||
523 | PIN_OSPEED_HIGH(GPIOC_PIN3) | \ | ||
524 | PIN_OSPEED_HIGH(GPIOC_PIN4) | \ | ||
525 | PIN_OSPEED_HIGH(GPIOC_PIN5) | \ | ||
526 | PIN_OSPEED_HIGH(GPIOC_PIN6) | \ | ||
527 | PIN_OSPEED_HIGH(GPIOC_PIN7) | \ | ||
528 | PIN_OSPEED_HIGH(GPIOC_PIN8) | \ | ||
529 | PIN_OSPEED_HIGH(GPIOC_PIN9) | \ | ||
530 | PIN_OSPEED_HIGH(GPIOC_PIN10) | \ | ||
531 | PIN_OSPEED_HIGH(GPIOC_PIN11) | \ | ||
532 | PIN_OSPEED_HIGH(GPIOC_PIN12) | \ | ||
533 | PIN_OSPEED_HIGH(GPIOC_PIN13) | \ | ||
534 | PIN_OSPEED_HIGH(GPIOC_PIN14) | \ | ||
535 | PIN_OSPEED_HIGH(GPIOC_PIN15)) | ||
536 | #define VAL_GPIOC_PUPDR (PIN_PUPDR_PULLUP(GPIOC_PIN0) | \ | ||
537 | PIN_PUPDR_PULLUP(GPIOC_PIN1) | \ | ||
538 | PIN_PUPDR_PULLUP(GPIOC_PIN2) | \ | ||
539 | PIN_PUPDR_PULLUP(GPIOC_PIN3) | \ | ||
540 | PIN_PUPDR_PULLUP(GPIOC_PIN4) | \ | ||
541 | PIN_PUPDR_PULLUP(GPIOC_PIN5) | \ | ||
542 | PIN_PUPDR_PULLUP(GPIOC_PIN6) | \ | ||
543 | PIN_PUPDR_PULLUP(GPIOC_PIN7) | \ | ||
544 | PIN_PUPDR_PULLUP(GPIOC_PIN8) | \ | ||
545 | PIN_PUPDR_PULLUP(GPIOC_PIN9) | \ | ||
546 | PIN_PUPDR_PULLUP(GPIOC_PIN10) | \ | ||
547 | PIN_PUPDR_PULLUP(GPIOC_PIN11) | \ | ||
548 | PIN_PUPDR_PULLUP(GPIOC_PIN12) | \ | ||
549 | PIN_PUPDR_PULLUP(GPIOC_PIN13) | \ | ||
550 | PIN_PUPDR_PULLUP(GPIOC_PIN14) | \ | ||
551 | PIN_PUPDR_PULLUP(GPIOC_PIN15)) | ||
552 | #define VAL_GPIOC_ODR (PIN_ODR_HIGH(GPIOC_PIN0) | \ | ||
553 | PIN_ODR_HIGH(GPIOC_PIN1) | \ | ||
554 | PIN_ODR_HIGH(GPIOC_PIN2) | \ | ||
555 | PIN_ODR_HIGH(GPIOC_PIN3) | \ | ||
556 | PIN_ODR_HIGH(GPIOC_PIN4) | \ | ||
557 | PIN_ODR_HIGH(GPIOC_PIN5) | \ | ||
558 | PIN_ODR_HIGH(GPIOC_PIN6) | \ | ||
559 | PIN_ODR_HIGH(GPIOC_PIN7) | \ | ||
560 | PIN_ODR_HIGH(GPIOC_PIN8) | \ | ||
561 | PIN_ODR_HIGH(GPIOC_PIN9) | \ | ||
562 | PIN_ODR_HIGH(GPIOC_PIN10) | \ | ||
563 | PIN_ODR_HIGH(GPIOC_PIN11) | \ | ||
564 | PIN_ODR_HIGH(GPIOC_PIN12) | \ | ||
565 | PIN_ODR_HIGH(GPIOC_PIN13) | \ | ||
566 | PIN_ODR_HIGH(GPIOC_PIN14) | \ | ||
567 | PIN_ODR_HIGH(GPIOC_PIN15)) | ||
568 | #define VAL_GPIOC_AFRL (PIN_AFIO_AF(GPIOC_PIN0, 0U) | \ | ||
569 | PIN_AFIO_AF(GPIOC_PIN1, 0U) | \ | ||
570 | PIN_AFIO_AF(GPIOC_PIN2, 0U) | \ | ||
571 | PIN_AFIO_AF(GPIOC_PIN3, 0U) | \ | ||
572 | PIN_AFIO_AF(GPIOC_PIN4, 0U) | \ | ||
573 | PIN_AFIO_AF(GPIOC_PIN5, 0U) | \ | ||
574 | PIN_AFIO_AF(GPIOC_PIN6, 0U) | \ | ||
575 | PIN_AFIO_AF(GPIOC_PIN7, 0U)) | ||
576 | #define VAL_GPIOC_AFRH (PIN_AFIO_AF(GPIOC_PIN8, 0U) | \ | ||
577 | PIN_AFIO_AF(GPIOC_PIN9, 0U) | \ | ||
578 | PIN_AFIO_AF(GPIOC_PIN10, 0U) | \ | ||
579 | PIN_AFIO_AF(GPIOC_PIN11, 0U) | \ | ||
580 | PIN_AFIO_AF(GPIOC_PIN12, 0U) | \ | ||
581 | PIN_AFIO_AF(GPIOC_PIN13, 0U) | \ | ||
582 | PIN_AFIO_AF(GPIOC_PIN14, 0U) | \ | ||
583 | PIN_AFIO_AF(GPIOC_PIN15, 0U)) | ||
584 | |||
585 | /* | ||
586 | * GPIOD setup: | ||
587 | * | ||
588 | * PD0 - PIN0 (input pullup). | ||
589 | * PD1 - PIN1 (input pullup). | ||
590 | * PD2 - PIN2 (input pullup). | ||
591 | * PD3 - PIN3 (input pullup). | ||
592 | * PD4 - PIN4 (input pullup). | ||
593 | * PD5 - PIN5 (input pullup). | ||
594 | * PD6 - PIN6 (input pullup). | ||
595 | * PD7 - PIN7 (input pullup). | ||
596 | * PD8 - PIN8 (input pullup). | ||
597 | * PD9 - PIN9 (input pullup). | ||
598 | * PD10 - PIN10 (input pullup). | ||
599 | * PD11 - PIN11 (input pullup). | ||
600 | * PD12 - PIN12 (input pullup). | ||
601 | * PD13 - PIN13 (input pullup). | ||
602 | * PD14 - PIN14 (input pullup). | ||
603 | * PD15 - PIN15 (input pullup). | ||
604 | */ | ||
605 | #define VAL_GPIOD_MODER (PIN_MODE_INPUT(GPIOD_PIN0) | \ | ||
606 | PIN_MODE_INPUT(GPIOD_PIN1) | \ | ||
607 | PIN_MODE_INPUT(GPIOD_PIN2) | \ | ||
608 | PIN_MODE_INPUT(GPIOD_PIN3) | \ | ||
609 | PIN_MODE_INPUT(GPIOD_PIN4) | \ | ||
610 | PIN_MODE_INPUT(GPIOD_PIN5) | \ | ||
611 | PIN_MODE_INPUT(GPIOD_PIN6) | \ | ||
612 | PIN_MODE_INPUT(GPIOD_PIN7) | \ | ||
613 | PIN_MODE_INPUT(GPIOD_PIN8) | \ | ||
614 | PIN_MODE_INPUT(GPIOD_PIN9) | \ | ||
615 | PIN_MODE_INPUT(GPIOD_PIN10) | \ | ||
616 | PIN_MODE_INPUT(GPIOD_PIN11) | \ | ||
617 | PIN_MODE_INPUT(GPIOD_PIN12) | \ | ||
618 | PIN_MODE_INPUT(GPIOD_PIN13) | \ | ||
619 | PIN_MODE_INPUT(GPIOD_PIN14) | \ | ||
620 | PIN_MODE_INPUT(GPIOD_PIN15)) | ||
621 | #define VAL_GPIOD_OTYPER (PIN_OTYPE_PUSHPULL(GPIOD_PIN0) | \ | ||
622 | PIN_OTYPE_PUSHPULL(GPIOD_PIN1) | \ | ||
623 | PIN_OTYPE_PUSHPULL(GPIOD_PIN2) | \ | ||
624 | PIN_OTYPE_PUSHPULL(GPIOD_PIN3) | \ | ||
625 | PIN_OTYPE_PUSHPULL(GPIOD_PIN4) | \ | ||
626 | PIN_OTYPE_PUSHPULL(GPIOD_PIN5) | \ | ||
627 | PIN_OTYPE_PUSHPULL(GPIOD_PIN6) | \ | ||
628 | PIN_OTYPE_PUSHPULL(GPIOD_PIN7) | \ | ||
629 | PIN_OTYPE_PUSHPULL(GPIOD_PIN8) | \ | ||
630 | PIN_OTYPE_PUSHPULL(GPIOD_PIN9) | \ | ||
631 | PIN_OTYPE_PUSHPULL(GPIOD_PIN10) | \ | ||
632 | PIN_OTYPE_PUSHPULL(GPIOD_PIN11) | \ | ||
633 | PIN_OTYPE_PUSHPULL(GPIOD_PIN12) | \ | ||
634 | PIN_OTYPE_PUSHPULL(GPIOD_PIN13) | \ | ||
635 | PIN_OTYPE_PUSHPULL(GPIOD_PIN14) | \ | ||
636 | PIN_OTYPE_PUSHPULL(GPIOD_PIN15)) | ||
637 | #define VAL_GPIOD_OSPEEDR (PIN_OSPEED_HIGH(GPIOD_PIN0) | \ | ||
638 | PIN_OSPEED_HIGH(GPIOD_PIN1) | \ | ||
639 | PIN_OSPEED_HIGH(GPIOD_PIN2) | \ | ||
640 | PIN_OSPEED_HIGH(GPIOD_PIN3) | \ | ||
641 | PIN_OSPEED_HIGH(GPIOD_PIN4) | \ | ||
642 | PIN_OSPEED_HIGH(GPIOD_PIN5) | \ | ||
643 | PIN_OSPEED_HIGH(GPIOD_PIN6) | \ | ||
644 | PIN_OSPEED_HIGH(GPIOD_PIN7) | \ | ||
645 | PIN_OSPEED_HIGH(GPIOD_PIN8) | \ | ||
646 | PIN_OSPEED_HIGH(GPIOD_PIN9) | \ | ||
647 | PIN_OSPEED_HIGH(GPIOD_PIN10) | \ | ||
648 | PIN_OSPEED_HIGH(GPIOD_PIN11) | \ | ||
649 | PIN_OSPEED_HIGH(GPIOD_PIN12) | \ | ||
650 | PIN_OSPEED_HIGH(GPIOD_PIN13) | \ | ||
651 | PIN_OSPEED_HIGH(GPIOD_PIN14) | \ | ||
652 | PIN_OSPEED_HIGH(GPIOD_PIN15)) | ||
653 | #define VAL_GPIOD_PUPDR (PIN_PUPDR_PULLUP(GPIOD_PIN0) | \ | ||
654 | PIN_PUPDR_PULLUP(GPIOD_PIN1) | \ | ||
655 | PIN_PUPDR_PULLUP(GPIOD_PIN2) | \ | ||
656 | PIN_PUPDR_PULLUP(GPIOD_PIN3) | \ | ||
657 | PIN_PUPDR_PULLUP(GPIOD_PIN4) | \ | ||
658 | PIN_PUPDR_PULLUP(GPIOD_PIN5) | \ | ||
659 | PIN_PUPDR_PULLUP(GPIOD_PIN6) | \ | ||
660 | PIN_PUPDR_PULLUP(GPIOD_PIN7) | \ | ||
661 | PIN_PUPDR_PULLUP(GPIOD_PIN8) | \ | ||
662 | PIN_PUPDR_PULLUP(GPIOD_PIN9) | \ | ||
663 | PIN_PUPDR_PULLUP(GPIOD_PIN10) | \ | ||
664 | PIN_PUPDR_PULLUP(GPIOD_PIN11) | \ | ||
665 | PIN_PUPDR_PULLUP(GPIOD_PIN12) | \ | ||
666 | PIN_PUPDR_PULLUP(GPIOD_PIN13) | \ | ||
667 | PIN_PUPDR_PULLUP(GPIOD_PIN14) | \ | ||
668 | PIN_PUPDR_PULLUP(GPIOD_PIN15)) | ||
669 | #define VAL_GPIOD_ODR (PIN_ODR_HIGH(GPIOD_PIN0) | \ | ||
670 | PIN_ODR_HIGH(GPIOD_PIN1) | \ | ||
671 | PIN_ODR_HIGH(GPIOD_PIN2) | \ | ||
672 | PIN_ODR_HIGH(GPIOD_PIN3) | \ | ||
673 | PIN_ODR_HIGH(GPIOD_PIN4) | \ | ||
674 | PIN_ODR_HIGH(GPIOD_PIN5) | \ | ||
675 | PIN_ODR_HIGH(GPIOD_PIN6) | \ | ||
676 | PIN_ODR_HIGH(GPIOD_PIN7) | \ | ||
677 | PIN_ODR_HIGH(GPIOD_PIN8) | \ | ||
678 | PIN_ODR_HIGH(GPIOD_PIN9) | \ | ||
679 | PIN_ODR_HIGH(GPIOD_PIN10) | \ | ||
680 | PIN_ODR_HIGH(GPIOD_PIN11) | \ | ||
681 | PIN_ODR_HIGH(GPIOD_PIN12) | \ | ||
682 | PIN_ODR_HIGH(GPIOD_PIN13) | \ | ||
683 | PIN_ODR_HIGH(GPIOD_PIN14) | \ | ||
684 | PIN_ODR_HIGH(GPIOD_PIN15)) | ||
685 | #define VAL_GPIOD_AFRL (PIN_AFIO_AF(GPIOD_PIN0, 0U) | \ | ||
686 | PIN_AFIO_AF(GPIOD_PIN1, 0U) | \ | ||
687 | PIN_AFIO_AF(GPIOD_PIN2, 0U) | \ | ||
688 | PIN_AFIO_AF(GPIOD_PIN3, 0U) | \ | ||
689 | PIN_AFIO_AF(GPIOD_PIN4, 0U) | \ | ||
690 | PIN_AFIO_AF(GPIOD_PIN5, 0U) | \ | ||
691 | PIN_AFIO_AF(GPIOD_PIN6, 0U) | \ | ||
692 | PIN_AFIO_AF(GPIOD_PIN7, 0U)) | ||
693 | #define VAL_GPIOD_AFRH (PIN_AFIO_AF(GPIOD_PIN8, 0U) | \ | ||
694 | PIN_AFIO_AF(GPIOD_PIN9, 0U) | \ | ||
695 | PIN_AFIO_AF(GPIOD_PIN10, 0U) | \ | ||
696 | PIN_AFIO_AF(GPIOD_PIN11, 0U) | \ | ||
697 | PIN_AFIO_AF(GPIOD_PIN12, 0U) | \ | ||
698 | PIN_AFIO_AF(GPIOD_PIN13, 0U) | \ | ||
699 | PIN_AFIO_AF(GPIOD_PIN14, 0U) | \ | ||
700 | PIN_AFIO_AF(GPIOD_PIN15, 0U)) | ||
701 | |||
702 | /* | ||
703 | * GPIOE setup: | ||
704 | * | ||
705 | * PE0 - PIN0 (input pullup). | ||
706 | * PE1 - PIN1 (input pullup). | ||
707 | * PE2 - PIN2 (input pullup). | ||
708 | * PE3 - PIN3 (input pullup). | ||
709 | * PE4 - PIN4 (input pullup). | ||
710 | * PE5 - PIN5 (input pullup). | ||
711 | * PE6 - PIN6 (input pullup). | ||
712 | * PE7 - PIN7 (input pullup). | ||
713 | * PE8 - PIN8 (input pullup). | ||
714 | * PE9 - PIN9 (input pullup). | ||
715 | * PE10 - PIN10 (input pullup). | ||
716 | * PE11 - PIN11 (input pullup). | ||
717 | * PE12 - PIN12 (input pullup). | ||
718 | * PE13 - PIN13 (input pullup). | ||
719 | * PE14 - PIN14 (input pullup). | ||
720 | * PE15 - PIN15 (input pullup). | ||
721 | */ | ||
722 | #define VAL_GPIOE_MODER (PIN_MODE_INPUT(GPIOE_PIN0) | \ | ||
723 | PIN_MODE_INPUT(GPIOE_PIN1) | \ | ||
724 | PIN_MODE_INPUT(GPIOE_PIN2) | \ | ||
725 | PIN_MODE_INPUT(GPIOE_PIN3) | \ | ||
726 | PIN_MODE_INPUT(GPIOE_PIN4) | \ | ||
727 | PIN_MODE_INPUT(GPIOE_PIN5) | \ | ||
728 | PIN_MODE_INPUT(GPIOE_PIN6) | \ | ||
729 | PIN_MODE_INPUT(GPIOE_PIN7) | \ | ||
730 | PIN_MODE_INPUT(GPIOE_PIN8) | \ | ||
731 | PIN_MODE_INPUT(GPIOE_PIN9) | \ | ||
732 | PIN_MODE_INPUT(GPIOE_PIN10) | \ | ||
733 | PIN_MODE_INPUT(GPIOE_PIN11) | \ | ||
734 | PIN_MODE_INPUT(GPIOE_PIN12) | \ | ||
735 | PIN_MODE_INPUT(GPIOE_PIN13) | \ | ||
736 | PIN_MODE_INPUT(GPIOE_PIN14) | \ | ||
737 | PIN_MODE_INPUT(GPIOE_PIN15)) | ||
738 | #define VAL_GPIOE_OTYPER (PIN_OTYPE_PUSHPULL(GPIOE_PIN0) | \ | ||
739 | PIN_OTYPE_PUSHPULL(GPIOE_PIN1) | \ | ||
740 | PIN_OTYPE_PUSHPULL(GPIOE_PIN2) | \ | ||
741 | PIN_OTYPE_PUSHPULL(GPIOE_PIN3) | \ | ||
742 | PIN_OTYPE_PUSHPULL(GPIOE_PIN4) | \ | ||
743 | PIN_OTYPE_PUSHPULL(GPIOE_PIN5) | \ | ||
744 | PIN_OTYPE_PUSHPULL(GPIOE_PIN6) | \ | ||
745 | PIN_OTYPE_PUSHPULL(GPIOE_PIN7) | \ | ||
746 | PIN_OTYPE_PUSHPULL(GPIOE_PIN8) | \ | ||
747 | PIN_OTYPE_PUSHPULL(GPIOE_PIN9) | \ | ||
748 | PIN_OTYPE_PUSHPULL(GPIOE_PIN10) | \ | ||
749 | PIN_OTYPE_PUSHPULL(GPIOE_PIN11) | \ | ||
750 | PIN_OTYPE_PUSHPULL(GPIOE_PIN12) | \ | ||
751 | PIN_OTYPE_PUSHPULL(GPIOE_PIN13) | \ | ||
752 | PIN_OTYPE_PUSHPULL(GPIOE_PIN14) | \ | ||
753 | PIN_OTYPE_PUSHPULL(GPIOE_PIN15)) | ||
754 | #define VAL_GPIOE_OSPEEDR (PIN_OSPEED_HIGH(GPIOE_PIN0) | \ | ||
755 | PIN_OSPEED_HIGH(GPIOE_PIN1) | \ | ||
756 | PIN_OSPEED_HIGH(GPIOE_PIN2) | \ | ||
757 | PIN_OSPEED_HIGH(GPIOE_PIN3) | \ | ||
758 | PIN_OSPEED_HIGH(GPIOE_PIN4) | \ | ||
759 | PIN_OSPEED_HIGH(GPIOE_PIN5) | \ | ||
760 | PIN_OSPEED_HIGH(GPIOE_PIN6) | \ | ||
761 | PIN_OSPEED_HIGH(GPIOE_PIN7) | \ | ||
762 | PIN_OSPEED_HIGH(GPIOE_PIN8) | \ | ||
763 | PIN_OSPEED_HIGH(GPIOE_PIN9) | \ | ||
764 | PIN_OSPEED_HIGH(GPIOE_PIN10) | \ | ||
765 | PIN_OSPEED_HIGH(GPIOE_PIN11) | \ | ||
766 | PIN_OSPEED_HIGH(GPIOE_PIN12) | \ | ||
767 | PIN_OSPEED_HIGH(GPIOE_PIN13) | \ | ||
768 | PIN_OSPEED_HIGH(GPIOE_PIN14) | \ | ||
769 | PIN_OSPEED_HIGH(GPIOE_PIN15)) | ||
770 | #define VAL_GPIOE_PUPDR (PIN_PUPDR_PULLUP(GPIOE_PIN0) | \ | ||
771 | PIN_PUPDR_PULLUP(GPIOE_PIN1) | \ | ||
772 | PIN_PUPDR_PULLUP(GPIOE_PIN2) | \ | ||
773 | PIN_PUPDR_PULLUP(GPIOE_PIN3) | \ | ||
774 | PIN_PUPDR_PULLUP(GPIOE_PIN4) | \ | ||
775 | PIN_PUPDR_PULLUP(GPIOE_PIN5) | \ | ||
776 | PIN_PUPDR_PULLUP(GPIOE_PIN6) | \ | ||
777 | PIN_PUPDR_PULLUP(GPIOE_PIN7) | \ | ||
778 | PIN_PUPDR_PULLUP(GPIOE_PIN8) | \ | ||
779 | PIN_PUPDR_PULLUP(GPIOE_PIN9) | \ | ||
780 | PIN_PUPDR_PULLUP(GPIOE_PIN10) | \ | ||
781 | PIN_PUPDR_PULLUP(GPIOE_PIN11) | \ | ||
782 | PIN_PUPDR_PULLUP(GPIOE_PIN12) | \ | ||
783 | PIN_PUPDR_PULLUP(GPIOE_PIN13) | \ | ||
784 | PIN_PUPDR_PULLUP(GPIOE_PIN14) | \ | ||
785 | PIN_PUPDR_PULLUP(GPIOE_PIN15)) | ||
786 | #define VAL_GPIOE_ODR (PIN_ODR_HIGH(GPIOE_PIN0) | \ | ||
787 | PIN_ODR_HIGH(GPIOE_PIN1) | \ | ||
788 | PIN_ODR_HIGH(GPIOE_PIN2) | \ | ||
789 | PIN_ODR_HIGH(GPIOE_PIN3) | \ | ||
790 | PIN_ODR_HIGH(GPIOE_PIN4) | \ | ||
791 | PIN_ODR_HIGH(GPIOE_PIN5) | \ | ||
792 | PIN_ODR_HIGH(GPIOE_PIN6) | \ | ||
793 | PIN_ODR_HIGH(GPIOE_PIN7) | \ | ||
794 | PIN_ODR_HIGH(GPIOE_PIN8) | \ | ||
795 | PIN_ODR_HIGH(GPIOE_PIN9) | \ | ||
796 | PIN_ODR_HIGH(GPIOE_PIN10) | \ | ||
797 | PIN_ODR_HIGH(GPIOE_PIN11) | \ | ||
798 | PIN_ODR_HIGH(GPIOE_PIN12) | \ | ||
799 | PIN_ODR_HIGH(GPIOE_PIN13) | \ | ||
800 | PIN_ODR_HIGH(GPIOE_PIN14) | \ | ||
801 | PIN_ODR_HIGH(GPIOE_PIN15)) | ||
802 | #define VAL_GPIOE_AFRL (PIN_AFIO_AF(GPIOE_PIN0, 0U) | \ | ||
803 | PIN_AFIO_AF(GPIOE_PIN1, 0U) | \ | ||
804 | PIN_AFIO_AF(GPIOE_PIN2, 0U) | \ | ||
805 | PIN_AFIO_AF(GPIOE_PIN3, 0U) | \ | ||
806 | PIN_AFIO_AF(GPIOE_PIN4, 0U) | \ | ||
807 | PIN_AFIO_AF(GPIOE_PIN5, 0U) | \ | ||
808 | PIN_AFIO_AF(GPIOE_PIN6, 0U) | \ | ||
809 | PIN_AFIO_AF(GPIOE_PIN7, 0U)) | ||
810 | #define VAL_GPIOE_AFRH (PIN_AFIO_AF(GPIOE_PIN8, 0U) | \ | ||
811 | PIN_AFIO_AF(GPIOE_PIN9, 0U) | \ | ||
812 | PIN_AFIO_AF(GPIOE_PIN10, 0U) | \ | ||
813 | PIN_AFIO_AF(GPIOE_PIN11, 0U) | \ | ||
814 | PIN_AFIO_AF(GPIOE_PIN12, 0U) | \ | ||
815 | PIN_AFIO_AF(GPIOE_PIN13, 0U) | \ | ||
816 | PIN_AFIO_AF(GPIOE_PIN14, 0U) | \ | ||
817 | PIN_AFIO_AF(GPIOE_PIN15, 0U)) | ||
818 | |||
819 | /* | ||
820 | * GPIOF setup: | ||
821 | * | ||
822 | * PF0 - ARD_D7 (input pullup). | ||
823 | * PF1 - ARD_D8 (input pullup). | ||
824 | * PF2 - PIN2 (input pullup). | ||
825 | * PF3 - PIN3 (input pullup). | ||
826 | * PF4 - PIN4 (input pullup). | ||
827 | * PF5 - PIN5 (input pullup). | ||
828 | * PF6 - PIN6 (input pullup). | ||
829 | * PF7 - PIN7 (input pullup). | ||
830 | * PF8 - PIN8 (input pullup). | ||
831 | * PF9 - PIN9 (input pullup). | ||
832 | * PF10 - PIN10 (input pullup). | ||
833 | * PF11 - PIN11 (input pullup). | ||
834 | * PF12 - PIN12 (input pullup). | ||
835 | * PF13 - PIN13 (input pullup). | ||
836 | * PF14 - PIN14 (input pullup). | ||
837 | * PF15 - PIN15 (input pullup). | ||
838 | */ | ||
839 | #define VAL_GPIOF_MODER (PIN_MODE_INPUT(GPIOF_ARD_D7) | \ | ||
840 | PIN_MODE_INPUT(GPIOF_ARD_D8) | \ | ||
841 | PIN_MODE_INPUT(GPIOF_PIN2) | \ | ||
842 | PIN_MODE_INPUT(GPIOF_PIN3) | \ | ||
843 | PIN_MODE_INPUT(GPIOF_PIN4) | \ | ||
844 | PIN_MODE_INPUT(GPIOF_PIN5) | \ | ||
845 | PIN_MODE_INPUT(GPIOF_PIN6) | \ | ||
846 | PIN_MODE_INPUT(GPIOF_PIN7) | \ | ||
847 | PIN_MODE_INPUT(GPIOF_PIN8) | \ | ||
848 | PIN_MODE_INPUT(GPIOF_PIN9) | \ | ||
849 | PIN_MODE_INPUT(GPIOF_PIN10) | \ | ||
850 | PIN_MODE_INPUT(GPIOF_PIN11) | \ | ||
851 | PIN_MODE_INPUT(GPIOF_PIN12) | \ | ||
852 | PIN_MODE_INPUT(GPIOF_PIN13) | \ | ||
853 | PIN_MODE_INPUT(GPIOF_PIN14) | \ | ||
854 | PIN_MODE_INPUT(GPIOF_PIN15)) | ||
855 | #define VAL_GPIOF_OTYPER (PIN_OTYPE_PUSHPULL(GPIOF_ARD_D7) | \ | ||
856 | PIN_OTYPE_PUSHPULL(GPIOF_ARD_D8) | \ | ||
857 | PIN_OTYPE_PUSHPULL(GPIOF_PIN2) | \ | ||
858 | PIN_OTYPE_PUSHPULL(GPIOF_PIN3) | \ | ||
859 | PIN_OTYPE_PUSHPULL(GPIOF_PIN4) | \ | ||
860 | PIN_OTYPE_PUSHPULL(GPIOF_PIN5) | \ | ||
861 | PIN_OTYPE_PUSHPULL(GPIOF_PIN6) | \ | ||
862 | PIN_OTYPE_PUSHPULL(GPIOF_PIN7) | \ | ||
863 | PIN_OTYPE_PUSHPULL(GPIOF_PIN8) | \ | ||
864 | PIN_OTYPE_PUSHPULL(GPIOF_PIN9) | \ | ||
865 | PIN_OTYPE_PUSHPULL(GPIOF_PIN10) | \ | ||
866 | PIN_OTYPE_PUSHPULL(GPIOF_PIN11) | \ | ||
867 | PIN_OTYPE_PUSHPULL(GPIOF_PIN12) | \ | ||
868 | PIN_OTYPE_PUSHPULL(GPIOF_PIN13) | \ | ||
869 | PIN_OTYPE_PUSHPULL(GPIOF_PIN14) | \ | ||
870 | PIN_OTYPE_PUSHPULL(GPIOF_PIN15)) | ||
871 | #define VAL_GPIOF_OSPEEDR (PIN_OSPEED_HIGH(GPIOF_ARD_D7) | \ | ||
872 | PIN_OSPEED_HIGH(GPIOF_ARD_D8) | \ | ||
873 | PIN_OSPEED_HIGH(GPIOF_PIN2) | \ | ||
874 | PIN_OSPEED_HIGH(GPIOF_PIN3) | \ | ||
875 | PIN_OSPEED_HIGH(GPIOF_PIN4) | \ | ||
876 | PIN_OSPEED_HIGH(GPIOF_PIN5) | \ | ||
877 | PIN_OSPEED_HIGH(GPIOF_PIN6) | \ | ||
878 | PIN_OSPEED_HIGH(GPIOF_PIN7) | \ | ||
879 | PIN_OSPEED_HIGH(GPIOF_PIN8) | \ | ||
880 | PIN_OSPEED_HIGH(GPIOF_PIN9) | \ | ||
881 | PIN_OSPEED_HIGH(GPIOF_PIN10) | \ | ||
882 | PIN_OSPEED_HIGH(GPIOF_PIN11) | \ | ||
883 | PIN_OSPEED_HIGH(GPIOF_PIN12) | \ | ||
884 | PIN_OSPEED_HIGH(GPIOF_PIN13) | \ | ||
885 | PIN_OSPEED_HIGH(GPIOF_PIN14) | \ | ||
886 | PIN_OSPEED_HIGH(GPIOF_PIN15)) | ||
887 | #define VAL_GPIOF_PUPDR (PIN_PUPDR_PULLUP(GPIOF_ARD_D7) | \ | ||
888 | PIN_PUPDR_PULLUP(GPIOF_ARD_D8) | \ | ||
889 | PIN_PUPDR_PULLUP(GPIOF_PIN2) | \ | ||
890 | PIN_PUPDR_PULLUP(GPIOF_PIN3) | \ | ||
891 | PIN_PUPDR_PULLUP(GPIOF_PIN4) | \ | ||
892 | PIN_PUPDR_PULLUP(GPIOF_PIN5) | \ | ||
893 | PIN_PUPDR_PULLUP(GPIOF_PIN6) | \ | ||
894 | PIN_PUPDR_PULLUP(GPIOF_PIN7) | \ | ||
895 | PIN_PUPDR_PULLUP(GPIOF_PIN8) | \ | ||
896 | PIN_PUPDR_PULLUP(GPIOF_PIN9) | \ | ||
897 | PIN_PUPDR_PULLUP(GPIOF_PIN10) | \ | ||
898 | PIN_PUPDR_PULLUP(GPIOF_PIN11) | \ | ||
899 | PIN_PUPDR_PULLUP(GPIOF_PIN12) | \ | ||
900 | PIN_PUPDR_PULLUP(GPIOF_PIN13) | \ | ||
901 | PIN_PUPDR_PULLUP(GPIOF_PIN14) | \ | ||
902 | PIN_PUPDR_PULLUP(GPIOF_PIN15)) | ||
903 | #define VAL_GPIOF_ODR (PIN_ODR_HIGH(GPIOF_ARD_D7) | \ | ||
904 | PIN_ODR_HIGH(GPIOF_ARD_D8) | \ | ||
905 | PIN_ODR_HIGH(GPIOF_PIN2) | \ | ||
906 | PIN_ODR_HIGH(GPIOF_PIN3) | \ | ||
907 | PIN_ODR_HIGH(GPIOF_PIN4) | \ | ||
908 | PIN_ODR_HIGH(GPIOF_PIN5) | \ | ||
909 | PIN_ODR_HIGH(GPIOF_PIN6) | \ | ||
910 | PIN_ODR_HIGH(GPIOF_PIN7) | \ | ||
911 | PIN_ODR_HIGH(GPIOF_PIN8) | \ | ||
912 | PIN_ODR_HIGH(GPIOF_PIN9) | \ | ||
913 | PIN_ODR_HIGH(GPIOF_PIN10) | \ | ||
914 | PIN_ODR_HIGH(GPIOF_PIN11) | \ | ||
915 | PIN_ODR_HIGH(GPIOF_PIN12) | \ | ||
916 | PIN_ODR_HIGH(GPIOF_PIN13) | \ | ||
917 | PIN_ODR_HIGH(GPIOF_PIN14) | \ | ||
918 | PIN_ODR_HIGH(GPIOF_PIN15)) | ||
919 | #define VAL_GPIOF_AFRL (PIN_AFIO_AF(GPIOF_ARD_D7, 0U) | \ | ||
920 | PIN_AFIO_AF(GPIOF_ARD_D8, 0U) | \ | ||
921 | PIN_AFIO_AF(GPIOF_PIN2, 0U) | \ | ||
922 | PIN_AFIO_AF(GPIOF_PIN3, 0U) | \ | ||
923 | PIN_AFIO_AF(GPIOF_PIN4, 0U) | \ | ||
924 | PIN_AFIO_AF(GPIOF_PIN5, 0U) | \ | ||
925 | PIN_AFIO_AF(GPIOF_PIN6, 0U) | \ | ||
926 | PIN_AFIO_AF(GPIOF_PIN7, 0U)) | ||
927 | #define VAL_GPIOF_AFRH (PIN_AFIO_AF(GPIOF_PIN8, 0U) | \ | ||
928 | PIN_AFIO_AF(GPIOF_PIN9, 0U) | \ | ||
929 | PIN_AFIO_AF(GPIOF_PIN10, 0U) | \ | ||
930 | PIN_AFIO_AF(GPIOF_PIN11, 0U) | \ | ||
931 | PIN_AFIO_AF(GPIOF_PIN12, 0U) | \ | ||
932 | PIN_AFIO_AF(GPIOF_PIN13, 0U) | \ | ||
933 | PIN_AFIO_AF(GPIOF_PIN14, 0U) | \ | ||
934 | PIN_AFIO_AF(GPIOF_PIN15, 0U)) | ||
935 | |||
936 | /*===========================================================================*/ | ||
937 | /* External declarations. */ | ||
938 | /*===========================================================================*/ | ||
939 | |||
940 | #if !defined(_FROM_ASM_) | ||
941 | #ifdef __cplusplus | ||
942 | extern "C" { | ||
943 | #endif | ||
944 | void boardInit(void); | ||
945 | #ifdef __cplusplus | ||
946 | } | ||
947 | #endif | ||
948 | #endif /* _FROM_ASM_ */ | ||
949 | |||
950 | #endif /* BOARD_H */ | ||
diff --git a/keyboards/akegata_denki/device_one/boards/DEVICE_ONE/board.mk b/keyboards/akegata_denki/device_one/boards/DEVICE_ONE/board.mk deleted file mode 100644 index a830697a9..000000000 --- a/keyboards/akegata_denki/device_one/boards/DEVICE_ONE/board.mk +++ /dev/null | |||
@@ -1,5 +0,0 @@ | |||
1 | # List of all the board related files. | ||
2 | BOARDSRC = $(BOARD_PATH)/boards/DEVICE_ONE/board.c | ||
3 | |||
4 | # Required include directories | ||
5 | BOARDINC = $(BOARD_PATH)/boards/DEVICE_ONE | ||
diff --git a/keyboards/akegata_denki/device_one/rules.mk b/keyboards/akegata_denki/device_one/rules.mk index 9519995cd..f8e76a5d3 100644 --- a/keyboards/akegata_denki/device_one/rules.mk +++ b/keyboards/akegata_denki/device_one/rules.mk | |||
@@ -1,7 +1,7 @@ | |||
1 | # MCU name | 1 | # MCU name |
2 | MCU = STM32F042 | 2 | MCU = STM32F042 |
3 | 3 | ||
4 | BOARD = DEVICE_ONE | 4 | BOARD = ST_NUCLEO32_F042K6 |
5 | 5 | ||
6 | # Build Options | 6 | # Build Options |
7 | # comment out to disable the options. | 7 | # comment out to disable the options. |
diff --git a/keyboards/chavdai40/boards/GENERIC_STM32_F042X6/board.h b/keyboards/chavdai40/board.h index ea8a45029..ea8a45029 100644 --- a/keyboards/chavdai40/boards/GENERIC_STM32_F042X6/board.h +++ b/keyboards/chavdai40/board.h | |||
diff --git a/keyboards/chavdai40/boards/GENERIC_STM32_F042X6/board.c b/keyboards/chavdai40/boards/GENERIC_STM32_F042X6/board.c deleted file mode 100644 index faf576541..000000000 --- a/keyboards/chavdai40/boards/GENERIC_STM32_F042X6/board.c +++ /dev/null | |||
@@ -1,266 +0,0 @@ | |||
1 | /* | ||
2 | ChibiOS - Copyright (C) 2006..2020 Giovanni Di Sirio | ||
3 | |||
4 | Licensed under the Apache License, Version 2.0 (the "License"); | ||
5 | you may not use this file except in compliance with the License. | ||
6 | You may obtain a copy of the License at | ||
7 | |||
8 | http://www.apache.org/licenses/LICENSE-2.0 | ||
9 | |||
10 | Unless required by applicable law or agreed to in writing, software | ||
11 | distributed under the License is distributed on an "AS IS" BASIS, | ||
12 | WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. | ||
13 | See the License for the specific language governing permissions and | ||
14 | limitations under the License. | ||
15 | */ | ||
16 | |||
17 | /* | ||
18 | * This file has been automatically generated using ChibiStudio board | ||
19 | * generator plugin. Do not edit manually. | ||
20 | */ | ||
21 | |||
22 | #include <hal.h> | ||
23 | #include <stm32_gpio.h> | ||
24 | |||
25 | /*===========================================================================*/ | ||
26 | /* Driver local definitions. */ | ||
27 | /*===========================================================================*/ | ||
28 | |||
29 | /*===========================================================================*/ | ||
30 | /* Driver exported variables. */ | ||
31 | /*===========================================================================*/ | ||
32 | |||
33 | /*===========================================================================*/ | ||
34 | /* Driver local variables and types. */ | ||
35 | /*===========================================================================*/ | ||
36 | |||
37 | /** | ||
38 | * @brief Type of STM32 GPIO port setup. | ||
39 | */ | ||
40 | typedef struct { | ||
41 | uint32_t moder; | ||
42 | uint32_t otyper; | ||
43 | uint32_t ospeedr; | ||
44 | uint32_t pupdr; | ||
45 | uint32_t odr; | ||
46 | uint32_t afrl; | ||
47 | uint32_t afrh; | ||
48 | } gpio_setup_t; | ||
49 | |||
50 | /** | ||
51 | * @brief Type of STM32 GPIO initialization data. | ||
52 | */ | ||
53 | typedef struct { | ||
54 | #if STM32_HAS_GPIOA || defined(__DOXYGEN__) | ||
55 | gpio_setup_t PAData; | ||
56 | #endif | ||
57 | #if STM32_HAS_GPIOB || defined(__DOXYGEN__) | ||
58 | gpio_setup_t PBData; | ||
59 | #endif | ||
60 | #if STM32_HAS_GPIOC || defined(__DOXYGEN__) | ||
61 | gpio_setup_t PCData; | ||
62 | #endif | ||
63 | #if STM32_HAS_GPIOD || defined(__DOXYGEN__) | ||
64 | gpio_setup_t PDData; | ||
65 | #endif | ||
66 | #if STM32_HAS_GPIOE || defined(__DOXYGEN__) | ||
67 | gpio_setup_t PEData; | ||
68 | #endif | ||
69 | #if STM32_HAS_GPIOF || defined(__DOXYGEN__) | ||
70 | gpio_setup_t PFData; | ||
71 | #endif | ||
72 | #if STM32_HAS_GPIOG || defined(__DOXYGEN__) | ||
73 | gpio_setup_t PGData; | ||
74 | #endif | ||
75 | #if STM32_HAS_GPIOH || defined(__DOXYGEN__) | ||
76 | gpio_setup_t PHData; | ||
77 | #endif | ||
78 | #if STM32_HAS_GPIOI || defined(__DOXYGEN__) | ||
79 | gpio_setup_t PIData; | ||
80 | #endif | ||
81 | #if STM32_HAS_GPIOJ || defined(__DOXYGEN__) | ||
82 | gpio_setup_t PJData; | ||
83 | #endif | ||
84 | #if STM32_HAS_GPIOK || defined(__DOXYGEN__) | ||
85 | gpio_setup_t PKData; | ||
86 | #endif | ||
87 | } gpio_config_t; | ||
88 | |||
89 | /** | ||
90 | * @brief STM32 GPIO static initialization data. | ||
91 | */ | ||
92 | static const gpio_config_t gpio_default_config = { | ||
93 | #if STM32_HAS_GPIOA | ||
94 | {VAL_GPIOA_MODER, VAL_GPIOA_OTYPER, VAL_GPIOA_OSPEEDR, VAL_GPIOA_PUPDR, | ||
95 | VAL_GPIOA_ODR, VAL_GPIOA_AFRL, VAL_GPIOA_AFRH}, | ||
96 | #endif | ||
97 | #if STM32_HAS_GPIOB | ||
98 | {VAL_GPIOB_MODER, VAL_GPIOB_OTYPER, VAL_GPIOB_OSPEEDR, VAL_GPIOB_PUPDR, | ||
99 | VAL_GPIOB_ODR, VAL_GPIOB_AFRL, VAL_GPIOB_AFRH}, | ||
100 | #endif | ||
101 | #if STM32_HAS_GPIOC | ||
102 | {VAL_GPIOC_MODER, VAL_GPIOC_OTYPER, VAL_GPIOC_OSPEEDR, VAL_GPIOC_PUPDR, | ||
103 | VAL_GPIOC_ODR, VAL_GPIOC_AFRL, VAL_GPIOC_AFRH}, | ||
104 | #endif | ||
105 | #if STM32_HAS_GPIOD | ||
106 | {VAL_GPIOD_MODER, VAL_GPIOD_OTYPER, VAL_GPIOD_OSPEEDR, VAL_GPIOD_PUPDR, | ||
107 | VAL_GPIOD_ODR, VAL_GPIOD_AFRL, VAL_GPIOD_AFRH}, | ||
108 | #endif | ||
109 | #if STM32_HAS_GPIOE | ||
110 | {VAL_GPIOE_MODER, VAL_GPIOE_OTYPER, VAL_GPIOE_OSPEEDR, VAL_GPIOE_PUPDR, | ||
111 | VAL_GPIOE_ODR, VAL_GPIOE_AFRL, VAL_GPIOE_AFRH}, | ||
112 | #endif | ||
113 | #if STM32_HAS_GPIOF | ||
114 | {VAL_GPIOF_MODER, VAL_GPIOF_OTYPER, VAL_GPIOF_OSPEEDR, VAL_GPIOF_PUPDR, | ||
115 | VAL_GPIOF_ODR, VAL_GPIOF_AFRL, VAL_GPIOF_AFRH}, | ||
116 | #endif | ||
117 | #if STM32_HAS_GPIOG | ||
118 | {VAL_GPIOG_MODER, VAL_GPIOG_OTYPER, VAL_GPIOG_OSPEEDR, VAL_GPIOG_PUPDR, | ||
119 | VAL_GPIOG_ODR, VAL_GPIOG_AFRL, VAL_GPIOG_AFRH}, | ||
120 | #endif | ||
121 | #if STM32_HAS_GPIOH | ||
122 | {VAL_GPIOH_MODER, VAL_GPIOH_OTYPER, VAL_GPIOH_OSPEEDR, VAL_GPIOH_PUPDR, | ||
123 | VAL_GPIOH_ODR, VAL_GPIOH_AFRL, VAL_GPIOH_AFRH}, | ||
124 | #endif | ||
125 | #if STM32_HAS_GPIOI | ||
126 | {VAL_GPIOI_MODER, VAL_GPIOI_OTYPER, VAL_GPIOI_OSPEEDR, VAL_GPIOI_PUPDR, | ||
127 | VAL_GPIOI_ODR, VAL_GPIOI_AFRL, VAL_GPIOI_AFRH}, | ||
128 | #endif | ||
129 | #if STM32_HAS_GPIOJ | ||
130 | {VAL_GPIOJ_MODER, VAL_GPIOJ_OTYPER, VAL_GPIOJ_OSPEEDR, VAL_GPIOJ_PUPDR, | ||
131 | VAL_GPIOJ_ODR, VAL_GPIOJ_AFRL, VAL_GPIOJ_AFRH}, | ||
132 | #endif | ||
133 | #if STM32_HAS_GPIOK | ||
134 | {VAL_GPIOK_MODER, VAL_GPIOK_OTYPER, VAL_GPIOK_OSPEEDR, VAL_GPIOK_PUPDR, | ||
135 | VAL_GPIOK_ODR, VAL_GPIOK_AFRL, VAL_GPIOK_AFRH} | ||
136 | #endif | ||
137 | }; | ||
138 | |||
139 | /*===========================================================================*/ | ||
140 | /* Driver local functions. */ | ||
141 | /*===========================================================================*/ | ||
142 | |||
143 | static void gpio_init(stm32_gpio_t *gpiop, const gpio_setup_t *config) { | ||
144 | |||
145 | gpiop->OTYPER = config->otyper; | ||
146 | gpiop->OSPEEDR = config->ospeedr; | ||
147 | gpiop->PUPDR = config->pupdr; | ||
148 | gpiop->ODR = config->odr; | ||
149 | gpiop->AFRL = config->afrl; | ||
150 | gpiop->AFRH = config->afrh; | ||
151 | gpiop->MODER = config->moder; | ||
152 | } | ||
153 | |||
154 | static void stm32_gpio_init(void) { | ||
155 | |||
156 | /* Enabling GPIO-related clocks, the mask comes from the | ||
157 | registry header file.*/ | ||
158 | rccResetAHB(STM32_GPIO_EN_MASK); | ||
159 | rccEnableAHB(STM32_GPIO_EN_MASK, true); | ||
160 | |||
161 | /* Initializing all the defined GPIO ports.*/ | ||
162 | #if STM32_HAS_GPIOA | ||
163 | gpio_init(GPIOA, &gpio_default_config.PAData); | ||
164 | #endif | ||
165 | #if STM32_HAS_GPIOB | ||
166 | gpio_init(GPIOB, &gpio_default_config.PBData); | ||
167 | #endif | ||
168 | #if STM32_HAS_GPIOC | ||
169 | gpio_init(GPIOC, &gpio_default_config.PCData); | ||
170 | #endif | ||
171 | #if STM32_HAS_GPIOD | ||
172 | gpio_init(GPIOD, &gpio_default_config.PDData); | ||
173 | #endif | ||
174 | #if STM32_HAS_GPIOE | ||
175 | gpio_init(GPIOE, &gpio_default_config.PEData); | ||
176 | #endif | ||
177 | #if STM32_HAS_GPIOF | ||
178 | gpio_init(GPIOF, &gpio_default_config.PFData); | ||
179 | #endif | ||
180 | #if STM32_HAS_GPIOG | ||
181 | gpio_init(GPIOG, &gpio_default_config.PGData); | ||
182 | #endif | ||
183 | #if STM32_HAS_GPIOH | ||
184 | gpio_init(GPIOH, &gpio_default_config.PHData); | ||
185 | #endif | ||
186 | #if STM32_HAS_GPIOI | ||
187 | gpio_init(GPIOI, &gpio_default_config.PIData); | ||
188 | #endif | ||
189 | #if STM32_HAS_GPIOJ | ||
190 | gpio_init(GPIOJ, &gpio_default_config.PJData); | ||
191 | #endif | ||
192 | #if STM32_HAS_GPIOK | ||
193 | gpio_init(GPIOK, &gpio_default_config.PKData); | ||
194 | #endif | ||
195 | } | ||
196 | |||
197 | /*===========================================================================*/ | ||
198 | /* Driver interrupt handlers. */ | ||
199 | /*===========================================================================*/ | ||
200 | |||
201 | /*===========================================================================*/ | ||
202 | /* Driver exported functions. */ | ||
203 | /*===========================================================================*/ | ||
204 | |||
205 | /** | ||
206 | * @brief Early initialization code. | ||
207 | * @details GPIO ports and system clocks are initialized before everything | ||
208 | * else. | ||
209 | */ | ||
210 | void __early_init(void) { | ||
211 | |||
212 | stm32_gpio_init(); | ||
213 | stm32_clock_init(); | ||
214 | } | ||
215 | |||
216 | #if HAL_USE_SDC || defined(__DOXYGEN__) | ||
217 | /** | ||
218 | * @brief SDC card detection. | ||
219 | */ | ||
220 | bool sdc_lld_is_card_inserted(SDCDriver *sdcp) { | ||
221 | |||
222 | (void)sdcp; | ||
223 | /* CHTODO: Fill the implementation.*/ | ||
224 | return true; | ||
225 | } | ||
226 | |||
227 | /** | ||
228 | * @brief SDC card write protection detection. | ||
229 | */ | ||
230 | bool sdc_lld_is_write_protected(SDCDriver *sdcp) { | ||
231 | |||
232 | (void)sdcp; | ||
233 | /* CHTODO: Fill the implementation.*/ | ||
234 | return false; | ||
235 | } | ||
236 | #endif /* HAL_USE_SDC */ | ||
237 | |||
238 | #if HAL_USE_MMC_SPI || defined(__DOXYGEN__) | ||
239 | /** | ||
240 | * @brief MMC_SPI card detection. | ||
241 | */ | ||
242 | bool mmc_lld_is_card_inserted(MMCDriver *mmcp) { | ||
243 | |||
244 | (void)mmcp; | ||
245 | /* CHTODO: Fill the implementation.*/ | ||
246 | return true; | ||
247 | } | ||
248 | |||
249 | /** | ||
250 | * @brief MMC_SPI card write protection detection. | ||
251 | */ | ||
252 | bool mmc_lld_is_write_protected(MMCDriver *mmcp) { | ||
253 | |||
254 | (void)mmcp; | ||
255 | /* CHTODO: Fill the implementation.*/ | ||
256 | return false; | ||
257 | } | ||
258 | #endif | ||
259 | |||
260 | /** | ||
261 | * @brief Board-specific initialization code. | ||
262 | * @note You can add your board-specific code here. | ||
263 | */ | ||
264 | void boardInit(void) { | ||
265 | |||
266 | } | ||
diff --git a/keyboards/chavdai40/boards/GENERIC_STM32_F042X6/board.mk b/keyboards/chavdai40/boards/GENERIC_STM32_F042X6/board.mk deleted file mode 100644 index 3fff4fbbf..000000000 --- a/keyboards/chavdai40/boards/GENERIC_STM32_F042X6/board.mk +++ /dev/null | |||
@@ -1,9 +0,0 @@ | |||
1 | # List of all the board related files. | ||
2 | BOARDSRC = $(BOARD_PATH)/boards/GENERIC_STM32_F042X6/board.c | ||
3 | |||
4 | # Required include directories | ||
5 | BOARDINC = $(BOARD_PATH)/boards/GENERIC_STM32_F042X6 | ||
6 | |||
7 | # Shared variables | ||
8 | ALLCSRC += $(BOARDSRC) | ||
9 | ALLINC += $(BOARDINC) | ||
diff --git a/keyboards/ergodox_stm32/board.h b/keyboards/ergodox_stm32/board.h new file mode 100644 index 000000000..23f949578 --- /dev/null +++ b/keyboards/ergodox_stm32/board.h | |||
@@ -0,0 +1,37 @@ | |||
1 | /* | ||
2 | Copyright 2021 QMK | ||
3 | |||
4 | This program is free software: you can redistribute it and/or modify | ||
5 | it under the terms of the GNU General Public License as published by | ||
6 | the Free Software Foundation, either version 2 of the License, or | ||
7 | (at your option) any later version. | ||
8 | |||
9 | This program is distributed in the hope that it will be useful, | ||
10 | but WITHOUT ANY WARRANTY; without even the implied warranty of | ||
11 | MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | ||
12 | GNU General Public License for more details. | ||
13 | |||
14 | You should have received a copy of the GNU General Public License | ||
15 | along with this program. If not, see <http://www.gnu.org/licenses/>. | ||
16 | */ | ||
17 | |||
18 | #include_next <board.h> | ||
19 | |||
20 | #ifdef STM32_LSECLK | ||
21 | #undef STM32_LSECLK | ||
22 | #endif // STM32_LSECLK | ||
23 | #define STM32_LSECLK 32768 | ||
24 | |||
25 | #ifdef STM32_HSECLK | ||
26 | #undef STM32_HSECLK | ||
27 | #endif // STM32_HSECLK | ||
28 | #define STM32_HSECLK 8000000 | ||
29 | |||
30 | #undef VAL_GPIOACRL | ||
31 | #define VAL_GPIOACRL 0x88888888 | ||
32 | |||
33 | #undef VAL_GPIOAODR | ||
34 | #define VAL_GPIOAODR 0xFFFFFFFF | ||
35 | |||
36 | #undef VAL_GPIOCCRH | ||
37 | #define VAL_GPIOCCRH 0x88888888 | ||
diff --git a/keyboards/ergodox_stm32/boards/ERGODOX_STM32_BOARD/board.c b/keyboards/ergodox_stm32/boards/ERGODOX_STM32_BOARD/board.c deleted file mode 100644 index 41a603b95..000000000 --- a/keyboards/ergodox_stm32/boards/ERGODOX_STM32_BOARD/board.c +++ /dev/null | |||
@@ -1,49 +0,0 @@ | |||
1 | /* | ||
2 | ChibiOS - Copyright (C) 2006..2016 Giovanni Di Sirio | ||
3 | |||
4 | Licensed under the Apache License, Version 2.0 (the "License"); | ||
5 | you may not use this file except in compliance with the License. | ||
6 | You may obtain a copy of the License at | ||
7 | |||
8 | http://www.apache.org/licenses/LICENSE-2.0 | ||
9 | |||
10 | Unless required by applicable law or agreed to in writing, software | ||
11 | distributed under the License is distributed on an "AS IS" BASIS, | ||
12 | WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. | ||
13 | See the License for the specific language governing permissions and | ||
14 | limitations under the License. | ||
15 | */ | ||
16 | |||
17 | #include <hal.h> | ||
18 | |||
19 | /** | ||
20 | * @brief PAL setup. | ||
21 | * @details Digital I/O ports static configuration as defined in @p board.h. | ||
22 | * This variable is used by the HAL when initializing the PAL driver. | ||
23 | */ | ||
24 | #if HAL_USE_PAL || defined(__DOXYGEN__) | ||
25 | const PALConfig pal_default_config = | ||
26 | { | ||
27 | {VAL_GPIOAODR, VAL_GPIOACRL, VAL_GPIOACRH}, | ||
28 | {VAL_GPIOBODR, VAL_GPIOBCRL, VAL_GPIOBCRH}, | ||
29 | {VAL_GPIOCODR, VAL_GPIOCCRL, VAL_GPIOCCRH}, | ||
30 | {VAL_GPIODODR, VAL_GPIODCRL, VAL_GPIODCRH}, | ||
31 | {VAL_GPIOEODR, VAL_GPIOECRL, VAL_GPIOECRH}, | ||
32 | }; | ||
33 | #endif | ||
34 | |||
35 | /* | ||
36 | * Early initialization code. | ||
37 | * This initialization must be performed just after stack setup and before | ||
38 | * any other initialization. | ||
39 | */ | ||
40 | void __early_init(void) { | ||
41 | |||
42 | stm32_clock_init(); | ||
43 | } | ||
44 | |||
45 | /* | ||
46 | * Board-specific initialization code. | ||
47 | */ | ||
48 | void boardInit(void) { | ||
49 | } | ||
diff --git a/keyboards/ergodox_stm32/boards/ERGODOX_STM32_BOARD/board.h b/keyboards/ergodox_stm32/boards/ERGODOX_STM32_BOARD/board.h deleted file mode 100644 index 307a17e38..000000000 --- a/keyboards/ergodox_stm32/boards/ERGODOX_STM32_BOARD/board.h +++ /dev/null | |||
@@ -1,142 +0,0 @@ | |||
1 | /* | ||
2 | ChibiOS - Copyright (C) 2006..2016 Giovanni Di Sirio | ||
3 | |||
4 | Licensed under the Apache License, Version 2.0 (the "License"); | ||
5 | you may not use this file except in compliance with the License. | ||
6 | You may obtain a copy of the License at | ||
7 | |||
8 | http://www.apache.org/licenses/LICENSE-2.0 | ||
9 | |||
10 | Unless required by applicable law or agreed to in writing, software | ||
11 | distributed under the License is distributed on an "AS IS" BASIS, | ||
12 | WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. | ||
13 | See the License for the specific language governing permissions and | ||
14 | limitations under the License. | ||
15 | */ | ||
16 | |||
17 | #ifndef _BOARD_H_ | ||
18 | #define _BOARD_H_ | ||
19 | |||
20 | /* | ||
21 | * Board identifier. | ||
22 | */ | ||
23 | #define BOARD_JM60 | ||
24 | #define BOARD_NAME "ErgoDox STM32 Keyboard" | ||
25 | |||
26 | /* | ||
27 | * Board frequencies. | ||
28 | */ | ||
29 | #define STM32_LSECLK 0 | ||
30 | #define STM32_HSECLK 8000000 | ||
31 | |||
32 | /* | ||
33 | * MCU type, supported types are defined in ./os/hal/platforms/hal_lld.h. | ||
34 | * | ||
35 | * Only xB (128KB Flash) is defined, but it's identical to the | ||
36 | * x8 version (64KB Flash) except for the Flash region size in the | ||
37 | * linker script. For x8 parts use xB here and change to the x8 linker | ||
38 | * script in the project Makefile. | ||
39 | */ | ||
40 | #define STM32F103xB | ||
41 | |||
42 | /* | ||
43 | * IO pins assignments | ||
44 | * | ||
45 | * numbering is sorted by onboard/connectors, as from the schematics in | ||
46 | * http://www.vcc-gnd.com/read.php?tid=369 | ||
47 | */ | ||
48 | |||
49 | /* on-board */ | ||
50 | #define GPIOA_USBDM 11 // pin 8 | ||
51 | #define GPIOA_USBDP 12 // pin 9 | ||
52 | |||
53 | #define GPIOC_OSC32_IN 14 | ||
54 | #define GPIOC_OSC32_OUT 15 | ||
55 | |||
56 | /* | ||
57 | * I/O ports initial setup, this configuration is established soon after reset | ||
58 | * in the initialization code. | ||
59 | * | ||
60 | * The digits have the following meaning: | ||
61 | * 0 - Analog input. | ||
62 | * 1 - Push Pull output 10MHz. | ||
63 | * 2 - Push Pull output 2MHz. | ||
64 | * 3 - Push Pull output 50MHz. | ||
65 | * 4 - Digital input. | ||
66 | * 5 - Open Drain output 10MHz. | ||
67 | * 6 - Open Drain output 2MHz. | ||
68 | * 7 - Open Drain output 50MHz. | ||
69 | * 8 - Digital input with PullUp or PullDown resistor depending on ODR. | ||
70 | * 9 - Alternate Push Pull output 10MHz. | ||
71 | * A - Alternate Push Pull output 2MHz. | ||
72 | * B - Alternate Push Pull output 50MHz. | ||
73 | * C - Reserved. | ||
74 | * D - Alternate Open Drain output 10MHz. | ||
75 | * E - Alternate Open Drain output 2MHz. | ||
76 | * F - Alternate Open Drain output 50MHz. | ||
77 | * Please refer to the STM32 Reference Manual for details. | ||
78 | */ | ||
79 | |||
80 | /* | ||
81 | * Port A setup. | ||
82 | * Everything input with pull-up except: | ||
83 | */ | ||
84 | #define VAL_GPIOACRL 0x88888888 /* PA7...PA0 */ | ||
85 | #define VAL_GPIOACRH 0x88888888 /* PA15...PA8 */ | ||
86 | #define VAL_GPIOAODR 0xFFFFFFFF | ||
87 | |||
88 | /* | ||
89 | * Port B setup. | ||
90 | * Everything input with pull-up except: | ||
91 | */ | ||
92 | #define VAL_GPIOBCRL 0x88888888 /* PB7...PB0 */ | ||
93 | #define VAL_GPIOBCRH 0x88888888 /* PB15...PB8 */ | ||
94 | #define VAL_GPIOBODR 0xFFFFFFFF | ||
95 | |||
96 | /* | ||
97 | * Port C setup. | ||
98 | * Everything input with pull-up except: | ||
99 | */ | ||
100 | #define VAL_GPIOCCRL 0x88888888 /* PC7...PC0 */ | ||
101 | #define VAL_GPIOCCRH 0x88888888 /* PC15...PC8 */ | ||
102 | #define VAL_GPIOCODR 0xFFFFFFFF | ||
103 | |||
104 | /* | ||
105 | * Port D setup. | ||
106 | * Everything input with pull-up except: | ||
107 | * PD0 - Normal input (XTAL). | ||
108 | * PD1 - Normal input (XTAL). | ||
109 | */ | ||
110 | #define VAL_GPIODCRL 0x88888844 /* PD7...PD0 */ | ||
111 | #define VAL_GPIODCRH 0x88888888 /* PD15...PD8 */ | ||
112 | #define VAL_GPIODODR 0xFFFFFFFF | ||
113 | |||
114 | /* | ||
115 | * Port E setup. | ||
116 | * Everything input with pull-up except: | ||
117 | */ | ||
118 | #define VAL_GPIOECRL 0x88888888 /* PE7...PE0 */ | ||
119 | #define VAL_GPIOECRH 0x88888888 /* PE15...PE8 */ | ||
120 | #define VAL_GPIOEODR 0xFFFFFFFF | ||
121 | |||
122 | /* | ||
123 | * USB bus activation macro, required by the USB driver. | ||
124 | */ | ||
125 | #define usb_lld_connect_bus(usbp) /* always connected */ | ||
126 | |||
127 | /* | ||
128 | * USB bus de-activation macro, required by the USB driver. | ||
129 | */ | ||
130 | #define usb_lld_disconnect_bus(usbp) /* always connected */ | ||
131 | |||
132 | #if !defined(_FROM_ASM_) | ||
133 | #ifdef __cplusplus | ||
134 | extern "C" { | ||
135 | #endif | ||
136 | void boardInit(void); | ||
137 | #ifdef __cplusplus | ||
138 | } | ||
139 | #endif | ||
140 | #endif /* _FROM_ASM_ */ | ||
141 | |||
142 | #endif /* _BOARD_H_ */ | ||
diff --git a/keyboards/ergodox_stm32/boards/ERGODOX_STM32_BOARD/board.mk b/keyboards/ergodox_stm32/boards/ERGODOX_STM32_BOARD/board.mk deleted file mode 100644 index 85ff835ef..000000000 --- a/keyboards/ergodox_stm32/boards/ERGODOX_STM32_BOARD/board.mk +++ /dev/null | |||
@@ -1,5 +0,0 @@ | |||
1 | # List of all the board related files. | ||
2 | BOARDSRC = $(BOARD_PATH)/boards/ERGODOX_STM32_BOARD/board.c | ||
3 | |||
4 | # Required include directories | ||
5 | BOARDINC = $(BOARD_PATH)/boards/ERGODOX_STM32_BOARD | ||
diff --git a/keyboards/ergodox_stm32/rules.mk b/keyboards/ergodox_stm32/rules.mk index cd1f2d97c..c2eaaa526 100644 --- a/keyboards/ergodox_stm32/rules.mk +++ b/keyboards/ergodox_stm32/rules.mk | |||
@@ -2,7 +2,7 @@ | |||
2 | MCU = STM32F103 | 2 | MCU = STM32F103 |
3 | 3 | ||
4 | MCU_LDSCRIPT = stm32f103_bootloader | 4 | MCU_LDSCRIPT = stm32f103_bootloader |
5 | BOARD = ERGODOX_STM32_BOARD | 5 | BOARD = ST_NUCLEO64_F103RB |
6 | 6 | ||
7 | CFLAGS += "-Wno-error=deprecated" | 7 | CFLAGS += "-Wno-error=deprecated" |
8 | EXTRAFLAGS = -O0 -g | 8 | EXTRAFLAGS = -O0 -g |
diff --git a/keyboards/jm60/board.h b/keyboards/jm60/board.h new file mode 100644 index 000000000..23f949578 --- /dev/null +++ b/keyboards/jm60/board.h | |||
@@ -0,0 +1,37 @@ | |||
1 | /* | ||
2 | Copyright 2021 QMK | ||
3 | |||
4 | This program is free software: you can redistribute it and/or modify | ||
5 | it under the terms of the GNU General Public License as published by | ||
6 | the Free Software Foundation, either version 2 of the License, or | ||
7 | (at your option) any later version. | ||
8 | |||
9 | This program is distributed in the hope that it will be useful, | ||
10 | but WITHOUT ANY WARRANTY; without even the implied warranty of | ||
11 | MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | ||
12 | GNU General Public License for more details. | ||
13 | |||
14 | You should have received a copy of the GNU General Public License | ||
15 | along with this program. If not, see <http://www.gnu.org/licenses/>. | ||
16 | */ | ||
17 | |||
18 | #include_next <board.h> | ||
19 | |||
20 | #ifdef STM32_LSECLK | ||
21 | #undef STM32_LSECLK | ||
22 | #endif // STM32_LSECLK | ||
23 | #define STM32_LSECLK 32768 | ||
24 | |||
25 | #ifdef STM32_HSECLK | ||
26 | #undef STM32_HSECLK | ||
27 | #endif // STM32_HSECLK | ||
28 | #define STM32_HSECLK 8000000 | ||
29 | |||
30 | #undef VAL_GPIOACRL | ||
31 | #define VAL_GPIOACRL 0x88888888 | ||
32 | |||
33 | #undef VAL_GPIOAODR | ||
34 | #define VAL_GPIOAODR 0xFFFFFFFF | ||
35 | |||
36 | #undef VAL_GPIOCCRH | ||
37 | #define VAL_GPIOCCRH 0x88888888 | ||
diff --git a/keyboards/jm60/boards/JM60_BOARD/board.c b/keyboards/jm60/boards/JM60_BOARD/board.c deleted file mode 100644 index 41a603b95..000000000 --- a/keyboards/jm60/boards/JM60_BOARD/board.c +++ /dev/null | |||
@@ -1,49 +0,0 @@ | |||
1 | /* | ||
2 | ChibiOS - Copyright (C) 2006..2016 Giovanni Di Sirio | ||
3 | |||
4 | Licensed under the Apache License, Version 2.0 (the "License"); | ||
5 | you may not use this file except in compliance with the License. | ||
6 | You may obtain a copy of the License at | ||
7 | |||
8 | http://www.apache.org/licenses/LICENSE-2.0 | ||
9 | |||
10 | Unless required by applicable law or agreed to in writing, software | ||
11 | distributed under the License is distributed on an "AS IS" BASIS, | ||
12 | WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. | ||
13 | See the License for the specific language governing permissions and | ||
14 | limitations under the License. | ||
15 | */ | ||
16 | |||
17 | #include <hal.h> | ||
18 | |||
19 | /** | ||
20 | * @brief PAL setup. | ||
21 | * @details Digital I/O ports static configuration as defined in @p board.h. | ||
22 | * This variable is used by the HAL when initializing the PAL driver. | ||
23 | */ | ||
24 | #if HAL_USE_PAL || defined(__DOXYGEN__) | ||
25 | const PALConfig pal_default_config = | ||
26 | { | ||
27 | {VAL_GPIOAODR, VAL_GPIOACRL, VAL_GPIOACRH}, | ||
28 | {VAL_GPIOBODR, VAL_GPIOBCRL, VAL_GPIOBCRH}, | ||
29 | {VAL_GPIOCODR, VAL_GPIOCCRL, VAL_GPIOCCRH}, | ||
30 | {VAL_GPIODODR, VAL_GPIODCRL, VAL_GPIODCRH}, | ||
31 | {VAL_GPIOEODR, VAL_GPIOECRL, VAL_GPIOECRH}, | ||
32 | }; | ||
33 | #endif | ||
34 | |||
35 | /* | ||
36 | * Early initialization code. | ||
37 | * This initialization must be performed just after stack setup and before | ||
38 | * any other initialization. | ||
39 | */ | ||
40 | void __early_init(void) { | ||
41 | |||
42 | stm32_clock_init(); | ||
43 | } | ||
44 | |||
45 | /* | ||
46 | * Board-specific initialization code. | ||
47 | */ | ||
48 | void boardInit(void) { | ||
49 | } | ||
diff --git a/keyboards/jm60/boards/JM60_BOARD/board.h b/keyboards/jm60/boards/JM60_BOARD/board.h deleted file mode 100644 index 74815122c..000000000 --- a/keyboards/jm60/boards/JM60_BOARD/board.h +++ /dev/null | |||
@@ -1,142 +0,0 @@ | |||
1 | /* | ||
2 | ChibiOS - Copyright (C) 2006..2016 Giovanni Di Sirio | ||
3 | |||
4 | Licensed under the Apache License, Version 2.0 (the "License"); | ||
5 | you may not use this file except in compliance with the License. | ||
6 | You may obtain a copy of the License at | ||
7 | |||
8 | http://www.apache.org/licenses/LICENSE-2.0 | ||
9 | |||
10 | Unless required by applicable law or agreed to in writing, software | ||
11 | distributed under the License is distributed on an "AS IS" BASIS, | ||
12 | WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. | ||
13 | See the License for the specific language governing permissions and | ||
14 | limitations under the License. | ||
15 | */ | ||
16 | |||
17 | #ifndef _BOARD_H_ | ||
18 | #define _BOARD_H_ | ||
19 | |||
20 | /* | ||
21 | * Board identifier. | ||
22 | */ | ||
23 | #define BOARD_JM60 | ||
24 | #define BOARD_NAME "JM60 keyboard" | ||
25 | |||
26 | /* | ||
27 | * Board frequencies. | ||
28 | */ | ||
29 | #define STM32_LSECLK 32768 | ||
30 | #define STM32_HSECLK 8000000 | ||
31 | |||
32 | /* | ||
33 | * MCU type, supported types are defined in ./os/hal/platforms/hal_lld.h. | ||
34 | * | ||
35 | * Only xB (128KB Flash) is defined, but it's identical to the | ||
36 | * x8 version (64KB Flash) except for the Flash region size in the | ||
37 | * linker script. For x8 parts use xB here and change to the x8 linker | ||
38 | * script in the project Makefile. | ||
39 | */ | ||
40 | #define STM32F103xB | ||
41 | |||
42 | /* | ||
43 | * IO pins assignments | ||
44 | * | ||
45 | * numbering is sorted by onboard/connectors, as from the schematics in | ||
46 | * http://www.vcc-gnd.com/read.php?tid=369 | ||
47 | */ | ||
48 | |||
49 | /* on-board */ | ||
50 | #define GPIOA_USBDM 11 // pin 8 | ||
51 | #define GPIOA_USBDP 12 // pin 9 | ||
52 | |||
53 | #define GPIOC_OSC32_IN 14 | ||
54 | #define GPIOC_OSC32_OUT 15 | ||
55 | |||
56 | /* | ||
57 | * I/O ports initial setup, this configuration is established soon after reset | ||
58 | * in the initialization code. | ||
59 | * | ||
60 | * The digits have the following meaning: | ||
61 | * 0 - Analog input. | ||
62 | * 1 - Push Pull output 10MHz. | ||
63 | * 2 - Push Pull output 2MHz. | ||
64 | * 3 - Push Pull output 50MHz. | ||
65 | * 4 - Digital input. | ||
66 | * 5 - Open Drain output 10MHz. | ||
67 | * 6 - Open Drain output 2MHz. | ||
68 | * 7 - Open Drain output 50MHz. | ||
69 | * 8 - Digital input with PullUp or PullDown resistor depending on ODR. | ||
70 | * 9 - Alternate Push Pull output 10MHz. | ||
71 | * A - Alternate Push Pull output 2MHz. | ||
72 | * B - Alternate Push Pull output 50MHz. | ||
73 | * C - Reserved. | ||
74 | * D - Alternate Open Drain output 10MHz. | ||
75 | * E - Alternate Open Drain output 2MHz. | ||
76 | * F - Alternate Open Drain output 50MHz. | ||
77 | * Please refer to the STM32 Reference Manual for details. | ||
78 | */ | ||
79 | |||
80 | /* | ||
81 | * Port A setup. | ||
82 | * Everything input with pull-up except: | ||
83 | */ | ||
84 | #define VAL_GPIOACRL 0x88888888 /* PA7...PA0 */ | ||
85 | #define VAL_GPIOACRH 0x88888888 /* PA15...PA8 */ | ||
86 | #define VAL_GPIOAODR 0xFFFFFFFF | ||
87 | |||
88 | /* | ||
89 | * Port B setup. | ||
90 | * Everything input with pull-up except: | ||
91 | */ | ||
92 | #define VAL_GPIOBCRL 0x88888888 /* PB7...PB0 */ | ||
93 | #define VAL_GPIOBCRH 0x88888888 /* PB15...PB8 */ | ||
94 | #define VAL_GPIOBODR 0xFFFFFFFF | ||
95 | |||
96 | /* | ||
97 | * Port C setup. | ||
98 | * Everything input with pull-up except: | ||
99 | */ | ||
100 | #define VAL_GPIOCCRL 0x88888888 /* PC7...PC0 */ | ||
101 | #define VAL_GPIOCCRH 0x88888888 /* PC15...PC8 */ | ||
102 | #define VAL_GPIOCODR 0xFFFFFFFF | ||
103 | |||
104 | /* | ||
105 | * Port D setup. | ||
106 | * Everything input with pull-up except: | ||
107 | * PD0 - Normal input (XTAL). | ||
108 | * PD1 - Normal input (XTAL). | ||
109 | */ | ||
110 | #define VAL_GPIODCRL 0x88888844 /* PD7...PD0 */ | ||
111 | #define VAL_GPIODCRH 0x88888888 /* PD15...PD8 */ | ||
112 | #define VAL_GPIODODR 0xFFFFFFFF | ||
113 | |||
114 | /* | ||
115 | * Port E setup. | ||
116 | * Everything input with pull-up except: | ||
117 | */ | ||
118 | #define VAL_GPIOECRL 0x88888888 /* PE7...PE0 */ | ||
119 | #define VAL_GPIOECRH 0x88888888 /* PE15...PE8 */ | ||
120 | #define VAL_GPIOEODR 0xFFFFFFFF | ||
121 | |||
122 | /* | ||
123 | * USB bus activation macro, required by the USB driver. | ||
124 | */ | ||
125 | #define usb_lld_connect_bus(usbp) /* always connected */ | ||
126 | |||
127 | /* | ||
128 | * USB bus de-activation macro, required by the USB driver. | ||
129 | */ | ||
130 | #define usb_lld_disconnect_bus(usbp) /* always connected */ | ||
131 | |||
132 | #if !defined(_FROM_ASM_) | ||
133 | #ifdef __cplusplus | ||
134 | extern "C" { | ||
135 | #endif | ||
136 | void boardInit(void); | ||
137 | #ifdef __cplusplus | ||
138 | } | ||
139 | #endif | ||
140 | #endif /* _FROM_ASM_ */ | ||
141 | |||
142 | #endif /* _BOARD_H_ */ | ||
diff --git a/keyboards/jm60/boards/JM60_BOARD/board.mk b/keyboards/jm60/boards/JM60_BOARD/board.mk deleted file mode 100644 index e2f051c31..000000000 --- a/keyboards/jm60/boards/JM60_BOARD/board.mk +++ /dev/null | |||
@@ -1,5 +0,0 @@ | |||
1 | # List of all the board related files. | ||
2 | BOARDSRC = $(BOARD_PATH)/boards/JM60_BOARD/board.c | ||
3 | |||
4 | # Required include directories | ||
5 | BOARDINC = $(BOARD_PATH)/boards/JM60_BOARD | ||
diff --git a/keyboards/jm60/rules.mk b/keyboards/jm60/rules.mk index 5992cc055..6aa824bae 100644 --- a/keyboards/jm60/rules.mk +++ b/keyboards/jm60/rules.mk | |||
@@ -2,7 +2,7 @@ | |||
2 | MCU = STM32F103 | 2 | MCU = STM32F103 |
3 | 3 | ||
4 | MCU_LDSCRIPT = jm60_bootloader | 4 | MCU_LDSCRIPT = jm60_bootloader |
5 | BOARD = JM60_BOARD | 5 | BOARD = ST_NUCLEO64_F103RB |
6 | 6 | ||
7 | # Build Options | 7 | # Build Options |
8 | # change yes to no to disable | 8 | # change yes to no to disable |
diff --git a/keyboards/matrix/m20add/boards/m20add_bd/board.h b/keyboards/matrix/m20add/board.h index 9d8c248c5..9d8c248c5 100644 --- a/keyboards/matrix/m20add/boards/m20add_bd/board.h +++ b/keyboards/matrix/m20add/board.h | |||
diff --git a/keyboards/matrix/m20add/boards/m20add_bd/board.c b/keyboards/matrix/m20add/boards/m20add_bd/board.c deleted file mode 100644 index fa5723ec2..000000000 --- a/keyboards/matrix/m20add/boards/m20add_bd/board.c +++ /dev/null | |||
@@ -1,266 +0,0 @@ | |||
1 | /* | ||
2 | ChibiOS - Copyright (C) 2006..2018 Giovanni Di Sirio | ||
3 | |||
4 | Licensed under the Apache License, Version 2.0 (the "License"); | ||
5 | you may not use this file except in compliance with the License. | ||
6 | You may obtain a copy of the License at | ||
7 | |||
8 | http://www.apache.org/licenses/LICENSE-2.0 | ||
9 | |||
10 | Unless required by applicable law or agreed to in writing, software | ||
11 | distributed under the License is distributed on an "AS IS" BASIS, | ||
12 | WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. | ||
13 | See the License for the specific language governing permissions and | ||
14 | limitations under the License. | ||
15 | */ | ||
16 | |||
17 | /* | ||
18 | * This file has been automatically generated using ChibiStudio board | ||
19 | * generator plugin. Do not edit manually. | ||
20 | */ | ||
21 | |||
22 | #include <hal.h> | ||
23 | #include <stm32_gpio.h> | ||
24 | |||
25 | /*===========================================================================*/ | ||
26 | /* Driver local definitions. */ | ||
27 | /*===========================================================================*/ | ||
28 | |||
29 | /*===========================================================================*/ | ||
30 | /* Driver exported variables. */ | ||
31 | /*===========================================================================*/ | ||
32 | |||
33 | /*===========================================================================*/ | ||
34 | /* Driver local variables and types. */ | ||
35 | /*===========================================================================*/ | ||
36 | |||
37 | /** | ||
38 | * @brief Type of STM32 GPIO port setup. | ||
39 | */ | ||
40 | typedef struct { | ||
41 | uint32_t moder; | ||
42 | uint32_t otyper; | ||
43 | uint32_t ospeedr; | ||
44 | uint32_t pupdr; | ||
45 | uint32_t odr; | ||
46 | uint32_t afrl; | ||
47 | uint32_t afrh; | ||
48 | } gpio_setup_t; | ||
49 | |||
50 | /** | ||
51 | * @brief Type of STM32 GPIO initialization data. | ||
52 | */ | ||
53 | typedef struct { | ||
54 | #if STM32_HAS_GPIOA || defined(__DOXYGEN__) | ||
55 | gpio_setup_t PAData; | ||
56 | #endif | ||
57 | #if STM32_HAS_GPIOB || defined(__DOXYGEN__) | ||
58 | gpio_setup_t PBData; | ||
59 | #endif | ||
60 | #if STM32_HAS_GPIOC || defined(__DOXYGEN__) | ||
61 | gpio_setup_t PCData; | ||
62 | #endif | ||
63 | #if STM32_HAS_GPIOD || defined(__DOXYGEN__) | ||
64 | gpio_setup_t PDData; | ||
65 | #endif | ||
66 | #if STM32_HAS_GPIOE || defined(__DOXYGEN__) | ||
67 | gpio_setup_t PEData; | ||
68 | #endif | ||
69 | #if STM32_HAS_GPIOF || defined(__DOXYGEN__) | ||
70 | gpio_setup_t PFData; | ||
71 | #endif | ||
72 | #if STM32_HAS_GPIOG || defined(__DOXYGEN__) | ||
73 | gpio_setup_t PGData; | ||
74 | #endif | ||
75 | #if STM32_HAS_GPIOH || defined(__DOXYGEN__) | ||
76 | gpio_setup_t PHData; | ||
77 | #endif | ||
78 | #if STM32_HAS_GPIOI || defined(__DOXYGEN__) | ||
79 | gpio_setup_t PIData; | ||
80 | #endif | ||
81 | #if STM32_HAS_GPIOJ || defined(__DOXYGEN__) | ||
82 | gpio_setup_t PJData; | ||
83 | #endif | ||
84 | #if STM32_HAS_GPIOK || defined(__DOXYGEN__) | ||
85 | gpio_setup_t PKData; | ||
86 | #endif | ||
87 | } gpio_config_t; | ||
88 | |||
89 | /** | ||
90 | * @brief STM32 GPIO static initialization data. | ||
91 | */ | ||
92 | static const gpio_config_t gpio_default_config = { | ||
93 | #if STM32_HAS_GPIOA | ||
94 | {VAL_GPIOA_MODER, VAL_GPIOA_OTYPER, VAL_GPIOA_OSPEEDR, VAL_GPIOA_PUPDR, | ||
95 | VAL_GPIOA_ODR, VAL_GPIOA_AFRL, VAL_GPIOA_AFRH}, | ||
96 | #endif | ||
97 | #if STM32_HAS_GPIOB | ||
98 | {VAL_GPIOB_MODER, VAL_GPIOB_OTYPER, VAL_GPIOB_OSPEEDR, VAL_GPIOB_PUPDR, | ||
99 | VAL_GPIOB_ODR, VAL_GPIOB_AFRL, VAL_GPIOB_AFRH}, | ||
100 | #endif | ||
101 | #if STM32_HAS_GPIOC | ||
102 | {VAL_GPIOC_MODER, VAL_GPIOC_OTYPER, VAL_GPIOC_OSPEEDR, VAL_GPIOC_PUPDR, | ||
103 | VAL_GPIOC_ODR, VAL_GPIOC_AFRL, VAL_GPIOC_AFRH}, | ||
104 | #endif | ||
105 | #if STM32_HAS_GPIOD | ||
106 | {VAL_GPIOD_MODER, VAL_GPIOD_OTYPER, VAL_GPIOD_OSPEEDR, VAL_GPIOD_PUPDR, | ||
107 | VAL_GPIOD_ODR, VAL_GPIOD_AFRL, VAL_GPIOD_AFRH}, | ||
108 | #endif | ||
109 | #if STM32_HAS_GPIOE | ||
110 | {VAL_GPIOE_MODER, VAL_GPIOE_OTYPER, VAL_GPIOE_OSPEEDR, VAL_GPIOE_PUPDR, | ||
111 | VAL_GPIOE_ODR, VAL_GPIOE_AFRL, VAL_GPIOE_AFRH}, | ||
112 | #endif | ||
113 | #if STM32_HAS_GPIOF | ||
114 | {VAL_GPIOF_MODER, VAL_GPIOF_OTYPER, VAL_GPIOF_OSPEEDR, VAL_GPIOF_PUPDR, | ||
115 | VAL_GPIOF_ODR, VAL_GPIOF_AFRL, VAL_GPIOF_AFRH}, | ||
116 | #endif | ||
117 | #if STM32_HAS_GPIOG | ||
118 | {VAL_GPIOG_MODER, VAL_GPIOG_OTYPER, VAL_GPIOG_OSPEEDR, VAL_GPIOG_PUPDR, | ||
119 | VAL_GPIOG_ODR, VAL_GPIOG_AFRL, VAL_GPIOG_AFRH}, | ||
120 | #endif | ||
121 | #if STM32_HAS_GPIOH | ||
122 | {VAL_GPIOH_MODER, VAL_GPIOH_OTYPER, VAL_GPIOH_OSPEEDR, VAL_GPIOH_PUPDR, | ||
123 | VAL_GPIOH_ODR, VAL_GPIOH_AFRL, VAL_GPIOH_AFRH}, | ||
124 | #endif | ||
125 | #if STM32_HAS_GPIOI | ||
126 | {VAL_GPIOI_MODER, VAL_GPIOI_OTYPER, VAL_GPIOI_OSPEEDR, VAL_GPIOI_PUPDR, | ||
127 | VAL_GPIOI_ODR, VAL_GPIOI_AFRL, VAL_GPIOI_AFRH}, | ||
128 | #endif | ||
129 | #if STM32_HAS_GPIOJ | ||
130 | {VAL_GPIOJ_MODER, VAL_GPIOJ_OTYPER, VAL_GPIOJ_OSPEEDR, VAL_GPIOJ_PUPDR, | ||
131 | VAL_GPIOJ_ODR, VAL_GPIOJ_AFRL, VAL_GPIOJ_AFRH}, | ||
132 | #endif | ||
133 | #if STM32_HAS_GPIOK | ||
134 | {VAL_GPIOK_MODER, VAL_GPIOK_OTYPER, VAL_GPIOK_OSPEEDR, VAL_GPIOK_PUPDR, | ||
135 | VAL_GPIOK_ODR, VAL_GPIOK_AFRL, VAL_GPIOK_AFRH} | ||
136 | #endif | ||
137 | }; | ||
138 | |||
139 | /*===========================================================================*/ | ||
140 | /* Driver local functions. */ | ||
141 | /*===========================================================================*/ | ||
142 | |||
143 | static void gpio_init(stm32_gpio_t *gpiop, const gpio_setup_t *config) { | ||
144 | |||
145 | gpiop->OTYPER = config->otyper; | ||
146 | gpiop->OSPEEDR = config->ospeedr; | ||
147 | gpiop->PUPDR = config->pupdr; | ||
148 | gpiop->ODR = config->odr; | ||
149 | gpiop->AFRL = config->afrl; | ||
150 | gpiop->AFRH = config->afrh; | ||
151 | gpiop->MODER = config->moder; | ||
152 | } | ||
153 | |||
154 | static void stm32_gpio_init(void) { | ||
155 | |||
156 | /* Enabling GPIO-related clocks, the mask comes from the | ||
157 | registry header file.*/ | ||
158 | rccResetAHB1(STM32_GPIO_EN_MASK); | ||
159 | rccEnableAHB1(STM32_GPIO_EN_MASK, true); | ||
160 | |||
161 | /* Initializing all the defined GPIO ports.*/ | ||
162 | #if STM32_HAS_GPIOA | ||
163 | gpio_init(GPIOA, &gpio_default_config.PAData); | ||
164 | #endif | ||
165 | #if STM32_HAS_GPIOB | ||
166 | gpio_init(GPIOB, &gpio_default_config.PBData); | ||
167 | #endif | ||
168 | #if STM32_HAS_GPIOC | ||
169 | gpio_init(GPIOC, &gpio_default_config.PCData); | ||
170 | #endif | ||
171 | #if STM32_HAS_GPIOD | ||
172 | gpio_init(GPIOD, &gpio_default_config.PDData); | ||
173 | #endif | ||
174 | #if STM32_HAS_GPIOE | ||
175 | gpio_init(GPIOE, &gpio_default_config.PEData); | ||
176 | #endif | ||
177 | #if STM32_HAS_GPIOF | ||
178 | gpio_init(GPIOF, &gpio_default_config.PFData); | ||
179 | #endif | ||
180 | #if STM32_HAS_GPIOG | ||
181 | gpio_init(GPIOG, &gpio_default_config.PGData); | ||
182 | #endif | ||
183 | #if STM32_HAS_GPIOH | ||
184 | gpio_init(GPIOH, &gpio_default_config.PHData); | ||
185 | #endif | ||
186 | #if STM32_HAS_GPIOI | ||
187 | gpio_init(GPIOI, &gpio_default_config.PIData); | ||
188 | #endif | ||
189 | #if STM32_HAS_GPIOJ | ||
190 | gpio_init(GPIOJ, &gpio_default_config.PJData); | ||
191 | #endif | ||
192 | #if STM32_HAS_GPIOK | ||
193 | gpio_init(GPIOK, &gpio_default_config.PKData); | ||
194 | #endif | ||
195 | } | ||
196 | |||
197 | /*===========================================================================*/ | ||
198 | /* Driver interrupt handlers. */ | ||
199 | /*===========================================================================*/ | ||
200 | |||
201 | /*===========================================================================*/ | ||
202 | /* Driver exported functions. */ | ||
203 | /*===========================================================================*/ | ||
204 | |||
205 | /** | ||
206 | * @brief Early initialization code. | ||
207 | * @details GPIO ports and system clocks are initialized before everything | ||
208 | * else. | ||
209 | */ | ||
210 | void __early_init(void) { | ||
211 | |||
212 | stm32_gpio_init(); | ||
213 | stm32_clock_init(); | ||
214 | } | ||
215 | |||
216 | #if HAL_USE_SDC || defined(__DOXYGEN__) | ||
217 | /** | ||
218 | * @brief SDC card detection. | ||
219 | */ | ||
220 | bool sdc_lld_is_card_inserted(SDCDriver *sdcp) { | ||
221 | |||
222 | (void)sdcp; | ||
223 | /* TODO: Fill the implementation.*/ | ||
224 | return true; | ||
225 | } | ||
226 | |||
227 | /** | ||
228 | * @brief SDC card write protection detection. | ||
229 | */ | ||
230 | bool sdc_lld_is_write_protected(SDCDriver *sdcp) { | ||
231 | |||
232 | (void)sdcp; | ||
233 | /* TODO: Fill the implementation.*/ | ||
234 | return false; | ||
235 | } | ||
236 | #endif /* HAL_USE_SDC */ | ||
237 | |||
238 | #if HAL_USE_MMC_SPI || defined(__DOXYGEN__) | ||
239 | /** | ||
240 | * @brief MMC_SPI card detection. | ||
241 | */ | ||
242 | bool mmc_lld_is_card_inserted(MMCDriver *mmcp) { | ||
243 | |||
244 | (void)mmcp; | ||
245 | /* TODO: Fill the implementation.*/ | ||
246 | return true; | ||
247 | } | ||
248 | |||
249 | /** | ||
250 | * @brief MMC_SPI card write protection detection. | ||
251 | */ | ||
252 | bool mmc_lld_is_write_protected(MMCDriver *mmcp) { | ||
253 | |||
254 | (void)mmcp; | ||
255 | /* TODO: Fill the implementation.*/ | ||
256 | return false; | ||
257 | } | ||
258 | #endif | ||
259 | |||
260 | /** | ||
261 | * @brief Board-specific initialization code. | ||
262 | * @todo Add your board-specific code, if any. | ||
263 | */ | ||
264 | void boardInit(void) { | ||
265 | |||
266 | } | ||
diff --git a/keyboards/matrix/m20add/boards/m20add_bd/board.mk b/keyboards/matrix/m20add/boards/m20add_bd/board.mk deleted file mode 100644 index a12d8670d..000000000 --- a/keyboards/matrix/m20add/boards/m20add_bd/board.mk +++ /dev/null | |||
@@ -1,9 +0,0 @@ | |||
1 | # List of all the board related files. | ||
2 | BOARDSRC = $(BOARD_PATH)/boards/m20add_bd/board.c | ||
3 | |||
4 | # Required include directories | ||
5 | BOARDINC = $(BOARD_PATH)/boards/m20add_bd | ||
6 | |||
7 | # Shared variables | ||
8 | ALLCSRC += $(BOARDSRC) | ||
9 | ALLINC += $(BOARDINC) | ||
diff --git a/keyboards/matrix/m20add/rules.mk b/keyboards/matrix/m20add/rules.mk index fb97c1d3c..93ddf05e9 100644 --- a/keyboards/matrix/m20add/rules.mk +++ b/keyboards/matrix/m20add/rules.mk | |||
@@ -8,7 +8,7 @@ MCU_LDSCRIPT = m20add_boot | |||
8 | 8 | ||
9 | # Board: it should exist either in <chibios>/os/hal/boards/ | 9 | # Board: it should exist either in <chibios>/os/hal/boards/ |
10 | # or <this_dir>/boards | 10 | # or <this_dir>/boards |
11 | BOARD = m20add_bd | 11 | BOARD = ST_NUCLEO64_F411RE |
12 | 12 | ||
13 | # Build Options | 13 | # Build Options |
14 | # comment out to disable the options. | 14 | # comment out to disable the options. |
diff --git a/keyboards/matrix/noah/boards/noah_bd/board.h b/keyboards/matrix/noah/board.h index 37d1d1362..37d1d1362 100644 --- a/keyboards/matrix/noah/boards/noah_bd/board.h +++ b/keyboards/matrix/noah/board.h | |||
diff --git a/keyboards/matrix/noah/boards/noah_bd/board.c b/keyboards/matrix/noah/boards/noah_bd/board.c deleted file mode 100644 index fa5723ec2..000000000 --- a/keyboards/matrix/noah/boards/noah_bd/board.c +++ /dev/null | |||
@@ -1,266 +0,0 @@ | |||
1 | /* | ||
2 | ChibiOS - Copyright (C) 2006..2018 Giovanni Di Sirio | ||
3 | |||
4 | Licensed under the Apache License, Version 2.0 (the "License"); | ||
5 | you may not use this file except in compliance with the License. | ||
6 | You may obtain a copy of the License at | ||
7 | |||
8 | http://www.apache.org/licenses/LICENSE-2.0 | ||
9 | |||
10 | Unless required by applicable law or agreed to in writing, software | ||
11 | distributed under the License is distributed on an "AS IS" BASIS, | ||
12 | WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. | ||
13 | See the License for the specific language governing permissions and | ||
14 | limitations under the License. | ||
15 | */ | ||
16 | |||
17 | /* | ||
18 | * This file has been automatically generated using ChibiStudio board | ||
19 | * generator plugin. Do not edit manually. | ||
20 | */ | ||
21 | |||
22 | #include <hal.h> | ||
23 | #include <stm32_gpio.h> | ||
24 | |||
25 | /*===========================================================================*/ | ||
26 | /* Driver local definitions. */ | ||
27 | /*===========================================================================*/ | ||
28 | |||
29 | /*===========================================================================*/ | ||
30 | /* Driver exported variables. */ | ||
31 | /*===========================================================================*/ | ||
32 | |||
33 | /*===========================================================================*/ | ||
34 | /* Driver local variables and types. */ | ||
35 | /*===========================================================================*/ | ||
36 | |||
37 | /** | ||
38 | * @brief Type of STM32 GPIO port setup. | ||
39 | */ | ||
40 | typedef struct { | ||
41 | uint32_t moder; | ||
42 | uint32_t otyper; | ||
43 | uint32_t ospeedr; | ||
44 | uint32_t pupdr; | ||
45 | uint32_t odr; | ||
46 | uint32_t afrl; | ||
47 | uint32_t afrh; | ||
48 | } gpio_setup_t; | ||
49 | |||
50 | /** | ||
51 | * @brief Type of STM32 GPIO initialization data. | ||
52 | */ | ||
53 | typedef struct { | ||
54 | #if STM32_HAS_GPIOA || defined(__DOXYGEN__) | ||
55 | gpio_setup_t PAData; | ||
56 | #endif | ||
57 | #if STM32_HAS_GPIOB || defined(__DOXYGEN__) | ||
58 | gpio_setup_t PBData; | ||
59 | #endif | ||
60 | #if STM32_HAS_GPIOC || defined(__DOXYGEN__) | ||
61 | gpio_setup_t PCData; | ||
62 | #endif | ||
63 | #if STM32_HAS_GPIOD || defined(__DOXYGEN__) | ||
64 | gpio_setup_t PDData; | ||
65 | #endif | ||
66 | #if STM32_HAS_GPIOE || defined(__DOXYGEN__) | ||
67 | gpio_setup_t PEData; | ||
68 | #endif | ||
69 | #if STM32_HAS_GPIOF || defined(__DOXYGEN__) | ||
70 | gpio_setup_t PFData; | ||
71 | #endif | ||
72 | #if STM32_HAS_GPIOG || defined(__DOXYGEN__) | ||
73 | gpio_setup_t PGData; | ||
74 | #endif | ||
75 | #if STM32_HAS_GPIOH || defined(__DOXYGEN__) | ||
76 | gpio_setup_t PHData; | ||
77 | #endif | ||
78 | #if STM32_HAS_GPIOI || defined(__DOXYGEN__) | ||
79 | gpio_setup_t PIData; | ||
80 | #endif | ||
81 | #if STM32_HAS_GPIOJ || defined(__DOXYGEN__) | ||
82 | gpio_setup_t PJData; | ||
83 | #endif | ||
84 | #if STM32_HAS_GPIOK || defined(__DOXYGEN__) | ||
85 | gpio_setup_t PKData; | ||
86 | #endif | ||
87 | } gpio_config_t; | ||
88 | |||
89 | /** | ||
90 | * @brief STM32 GPIO static initialization data. | ||
91 | */ | ||
92 | static const gpio_config_t gpio_default_config = { | ||
93 | #if STM32_HAS_GPIOA | ||
94 | {VAL_GPIOA_MODER, VAL_GPIOA_OTYPER, VAL_GPIOA_OSPEEDR, VAL_GPIOA_PUPDR, | ||
95 | VAL_GPIOA_ODR, VAL_GPIOA_AFRL, VAL_GPIOA_AFRH}, | ||
96 | #endif | ||
97 | #if STM32_HAS_GPIOB | ||
98 | {VAL_GPIOB_MODER, VAL_GPIOB_OTYPER, VAL_GPIOB_OSPEEDR, VAL_GPIOB_PUPDR, | ||
99 | VAL_GPIOB_ODR, VAL_GPIOB_AFRL, VAL_GPIOB_AFRH}, | ||
100 | #endif | ||
101 | #if STM32_HAS_GPIOC | ||
102 | {VAL_GPIOC_MODER, VAL_GPIOC_OTYPER, VAL_GPIOC_OSPEEDR, VAL_GPIOC_PUPDR, | ||
103 | VAL_GPIOC_ODR, VAL_GPIOC_AFRL, VAL_GPIOC_AFRH}, | ||
104 | #endif | ||
105 | #if STM32_HAS_GPIOD | ||
106 | {VAL_GPIOD_MODER, VAL_GPIOD_OTYPER, VAL_GPIOD_OSPEEDR, VAL_GPIOD_PUPDR, | ||
107 | VAL_GPIOD_ODR, VAL_GPIOD_AFRL, VAL_GPIOD_AFRH}, | ||
108 | #endif | ||
109 | #if STM32_HAS_GPIOE | ||
110 | {VAL_GPIOE_MODER, VAL_GPIOE_OTYPER, VAL_GPIOE_OSPEEDR, VAL_GPIOE_PUPDR, | ||
111 | VAL_GPIOE_ODR, VAL_GPIOE_AFRL, VAL_GPIOE_AFRH}, | ||
112 | #endif | ||
113 | #if STM32_HAS_GPIOF | ||
114 | {VAL_GPIOF_MODER, VAL_GPIOF_OTYPER, VAL_GPIOF_OSPEEDR, VAL_GPIOF_PUPDR, | ||
115 | VAL_GPIOF_ODR, VAL_GPIOF_AFRL, VAL_GPIOF_AFRH}, | ||
116 | #endif | ||
117 | #if STM32_HAS_GPIOG | ||
118 | {VAL_GPIOG_MODER, VAL_GPIOG_OTYPER, VAL_GPIOG_OSPEEDR, VAL_GPIOG_PUPDR, | ||
119 | VAL_GPIOG_ODR, VAL_GPIOG_AFRL, VAL_GPIOG_AFRH}, | ||
120 | #endif | ||
121 | #if STM32_HAS_GPIOH | ||
122 | {VAL_GPIOH_MODER, VAL_GPIOH_OTYPER, VAL_GPIOH_OSPEEDR, VAL_GPIOH_PUPDR, | ||
123 | VAL_GPIOH_ODR, VAL_GPIOH_AFRL, VAL_GPIOH_AFRH}, | ||
124 | #endif | ||
125 | #if STM32_HAS_GPIOI | ||
126 | {VAL_GPIOI_MODER, VAL_GPIOI_OTYPER, VAL_GPIOI_OSPEEDR, VAL_GPIOI_PUPDR, | ||
127 | VAL_GPIOI_ODR, VAL_GPIOI_AFRL, VAL_GPIOI_AFRH}, | ||
128 | #endif | ||
129 | #if STM32_HAS_GPIOJ | ||
130 | {VAL_GPIOJ_MODER, VAL_GPIOJ_OTYPER, VAL_GPIOJ_OSPEEDR, VAL_GPIOJ_PUPDR, | ||
131 | VAL_GPIOJ_ODR, VAL_GPIOJ_AFRL, VAL_GPIOJ_AFRH}, | ||
132 | #endif | ||
133 | #if STM32_HAS_GPIOK | ||
134 | {VAL_GPIOK_MODER, VAL_GPIOK_OTYPER, VAL_GPIOK_OSPEEDR, VAL_GPIOK_PUPDR, | ||
135 | VAL_GPIOK_ODR, VAL_GPIOK_AFRL, VAL_GPIOK_AFRH} | ||
136 | #endif | ||
137 | }; | ||
138 | |||
139 | /*===========================================================================*/ | ||
140 | /* Driver local functions. */ | ||
141 | /*===========================================================================*/ | ||
142 | |||
143 | static void gpio_init(stm32_gpio_t *gpiop, const gpio_setup_t *config) { | ||
144 | |||
145 | gpiop->OTYPER = config->otyper; | ||
146 | gpiop->OSPEEDR = config->ospeedr; | ||
147 | gpiop->PUPDR = config->pupdr; | ||
148 | gpiop->ODR = config->odr; | ||
149 | gpiop->AFRL = config->afrl; | ||
150 | gpiop->AFRH = config->afrh; | ||
151 | gpiop->MODER = config->moder; | ||
152 | } | ||
153 | |||
154 | static void stm32_gpio_init(void) { | ||
155 | |||
156 | /* Enabling GPIO-related clocks, the mask comes from the | ||
157 | registry header file.*/ | ||
158 | rccResetAHB1(STM32_GPIO_EN_MASK); | ||
159 | rccEnableAHB1(STM32_GPIO_EN_MASK, true); | ||
160 | |||
161 | /* Initializing all the defined GPIO ports.*/ | ||
162 | #if STM32_HAS_GPIOA | ||
163 | gpio_init(GPIOA, &gpio_default_config.PAData); | ||
164 | #endif | ||
165 | #if STM32_HAS_GPIOB | ||
166 | gpio_init(GPIOB, &gpio_default_config.PBData); | ||
167 | #endif | ||
168 | #if STM32_HAS_GPIOC | ||
169 | gpio_init(GPIOC, &gpio_default_config.PCData); | ||
170 | #endif | ||
171 | #if STM32_HAS_GPIOD | ||
172 | gpio_init(GPIOD, &gpio_default_config.PDData); | ||
173 | #endif | ||
174 | #if STM32_HAS_GPIOE | ||
175 | gpio_init(GPIOE, &gpio_default_config.PEData); | ||
176 | #endif | ||
177 | #if STM32_HAS_GPIOF | ||
178 | gpio_init(GPIOF, &gpio_default_config.PFData); | ||
179 | #endif | ||
180 | #if STM32_HAS_GPIOG | ||
181 | gpio_init(GPIOG, &gpio_default_config.PGData); | ||
182 | #endif | ||
183 | #if STM32_HAS_GPIOH | ||
184 | gpio_init(GPIOH, &gpio_default_config.PHData); | ||
185 | #endif | ||
186 | #if STM32_HAS_GPIOI | ||
187 | gpio_init(GPIOI, &gpio_default_config.PIData); | ||
188 | #endif | ||
189 | #if STM32_HAS_GPIOJ | ||
190 | gpio_init(GPIOJ, &gpio_default_config.PJData); | ||
191 | #endif | ||
192 | #if STM32_HAS_GPIOK | ||
193 | gpio_init(GPIOK, &gpio_default_config.PKData); | ||
194 | #endif | ||
195 | } | ||
196 | |||
197 | /*===========================================================================*/ | ||
198 | /* Driver interrupt handlers. */ | ||
199 | /*===========================================================================*/ | ||
200 | |||
201 | /*===========================================================================*/ | ||
202 | /* Driver exported functions. */ | ||
203 | /*===========================================================================*/ | ||
204 | |||
205 | /** | ||
206 | * @brief Early initialization code. | ||
207 | * @details GPIO ports and system clocks are initialized before everything | ||
208 | * else. | ||
209 | */ | ||
210 | void __early_init(void) { | ||
211 | |||
212 | stm32_gpio_init(); | ||
213 | stm32_clock_init(); | ||
214 | } | ||
215 | |||
216 | #if HAL_USE_SDC || defined(__DOXYGEN__) | ||
217 | /** | ||
218 | * @brief SDC card detection. | ||
219 | */ | ||
220 | bool sdc_lld_is_card_inserted(SDCDriver *sdcp) { | ||
221 | |||
222 | (void)sdcp; | ||
223 | /* TODO: Fill the implementation.*/ | ||
224 | return true; | ||
225 | } | ||
226 | |||
227 | /** | ||
228 | * @brief SDC card write protection detection. | ||
229 | */ | ||
230 | bool sdc_lld_is_write_protected(SDCDriver *sdcp) { | ||
231 | |||
232 | (void)sdcp; | ||
233 | /* TODO: Fill the implementation.*/ | ||
234 | return false; | ||
235 | } | ||
236 | #endif /* HAL_USE_SDC */ | ||
237 | |||
238 | #if HAL_USE_MMC_SPI || defined(__DOXYGEN__) | ||
239 | /** | ||
240 | * @brief MMC_SPI card detection. | ||
241 | */ | ||
242 | bool mmc_lld_is_card_inserted(MMCDriver *mmcp) { | ||
243 | |||
244 | (void)mmcp; | ||
245 | /* TODO: Fill the implementation.*/ | ||
246 | return true; | ||
247 | } | ||
248 | |||
249 | /** | ||
250 | * @brief MMC_SPI card write protection detection. | ||
251 | */ | ||
252 | bool mmc_lld_is_write_protected(MMCDriver *mmcp) { | ||
253 | |||
254 | (void)mmcp; | ||
255 | /* TODO: Fill the implementation.*/ | ||
256 | return false; | ||
257 | } | ||
258 | #endif | ||
259 | |||
260 | /** | ||
261 | * @brief Board-specific initialization code. | ||
262 | * @todo Add your board-specific code, if any. | ||
263 | */ | ||
264 | void boardInit(void) { | ||
265 | |||
266 | } | ||
diff --git a/keyboards/matrix/noah/boards/noah_bd/board.mk b/keyboards/matrix/noah/boards/noah_bd/board.mk deleted file mode 100644 index 185f9e1e9..000000000 --- a/keyboards/matrix/noah/boards/noah_bd/board.mk +++ /dev/null | |||
@@ -1,9 +0,0 @@ | |||
1 | # List of all the board related files. | ||
2 | BOARDSRC = $(BOARD_PATH)/boards/noah_bd/board.c | ||
3 | |||
4 | # Required include directories | ||
5 | BOARDINC = $(BOARD_PATH)/boards/noah_bd | ||
6 | |||
7 | # Shared variables | ||
8 | ALLCSRC += $(BOARDSRC) | ||
9 | ALLINC += $(BOARDINC) | ||
diff --git a/keyboards/matrix/noah/rules.mk b/keyboards/matrix/noah/rules.mk index aacd2882b..5566bd26a 100644 --- a/keyboards/matrix/noah/rules.mk +++ b/keyboards/matrix/noah/rules.mk | |||
@@ -8,7 +8,7 @@ MCU_LDSCRIPT = noah_boot | |||
8 | 8 | ||
9 | # Board: it should exist either in <chibios>/os/hal/boards/ | 9 | # Board: it should exist either in <chibios>/os/hal/boards/ |
10 | # or <this_dir>/boards | 10 | # or <this_dir>/boards |
11 | BOARD = noah_bd | 11 | BOARD = ST_NUCLEO64_F411RE |
12 | 12 | ||
13 | # Build Options | 13 | # Build Options |
14 | # comment out to disable the options. | 14 | # comment out to disable the options. |