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authorJoel Challis <git@zvecr.com>2020-06-03 00:49:52 +0100
committerGitHub <noreply@github.com>2020-06-03 00:49:52 +0100
commit517d607fa4292a03fb8a880a07d27cb14020ed1d (patch)
tree2e9eb8e8eb8a89719743076cfe54f90d60437fce
parent1110fe6c6f86a684ba098d9c87665887278b068a (diff)
downloadqmk_firmware-517d607fa4292a03fb8a880a07d27cb14020ed1d.tar.gz
qmk_firmware-517d607fa4292a03fb8a880a07d27cb14020ed1d.zip
[Keyboard] Add zvecr/zv48 (#9227)
* Add zv48 keyboard * tidy up rules * correct product name
Diffstat
-rw-r--r--keyboards/zvecr/zv48/config.h186
-rw-r--r--keyboards/zvecr/zv48/f401/chconf.h714
-rw-r--r--keyboards/zvecr/zv48/f401/halconf.h525
-rw-r--r--keyboards/zvecr/zv48/f401/mcuconf.h253
-rw-r--r--keyboards/zvecr/zv48/f401/rules.mk27
-rw-r--r--keyboards/zvecr/zv48/f411/chconf.h714
-rw-r--r--keyboards/zvecr/zv48/f411/halconf.h525
-rw-r--r--keyboards/zvecr/zv48/f411/mcuconf.h253
-rw-r--r--keyboards/zvecr/zv48/f411/rules.mk27
-rw-r--r--keyboards/zvecr/zv48/info.json13
-rw-r--r--keyboards/zvecr/zv48/keymaps/default/keymap.c91
-rw-r--r--keyboards/zvecr/zv48/readme.md16
-rw-r--r--keyboards/zvecr/zv48/rules.mk29
-rw-r--r--keyboards/zvecr/zv48/zv48.c27
-rw-r--r--keyboards/zvecr/zv48/zv48.h35
15 files changed, 3435 insertions, 0 deletions
diff --git a/keyboards/zvecr/zv48/config.h b/keyboards/zvecr/zv48/config.h
new file mode 100644
index 000000000..226efe675
--- /dev/null
+++ b/keyboards/zvecr/zv48/config.h
@@ -0,0 +1,186 @@
1/* Copyright 2020 zvecr <git@zvecr.com>
2 *
3 * This program is free software: you can redistribute it and/or modify
4 * it under the terms of the GNU General Public License as published by
5 * the Free Software Foundation, either version 2 of the License, or
6 * (at your option) any later version.
7 *
8 * This program is distributed in the hope that it will be useful,
9 * but WITHOUT ANY WARRANTY; without even the implied warranty of
10 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
11 * GNU General Public License for more details.
12 *
13 * You should have received a copy of the GNU General Public License
14 * along with this program. If not, see <http://www.gnu.org/licenses/>.
15 */
16#pragma once
17
18#include "config_common.h"
19
20/* USB Device descriptor parameter */
21#define VENDOR_ID 0x5A56
22#define PRODUCT_ID 0x0048
23#define DEVICE_VER 0x0001
24#define MANUFACTURER zvecr
25#define PRODUCT zv48
26#define DESCRIPTION ARM Split ortho_4x12
27
28/* key matrix size */
29#define MATRIX_ROWS 8 // Rows are doubled-up
30#define MATRIX_COLS 6
31
32/*
33 * Keyboard Matrix Assignments
34 *
35 * Change this to how you wired your keyboard
36 * COLS: AVR pins used for columns, left to right
37 * ROWS: AVR pins used for rows, top to bottom
38 * DIODE_DIRECTION: COL2ROW = COL = Anode (+), ROW = Cathode (-, marked on diode)
39 * ROW2COL = ROW = Anode (+), COL = Cathode (-, marked on diode)
40 *
41 */
42#define MATRIX_COL_PINS { B15, B10, B0, A5, A4, A3 }
43#define MATRIX_ROW_PINS { A10, A15, B3, B4 }
44#define MATRIX_COL_PINS_RIGHT { B10, B15, A10, A15, B3, B4 }
45#define MATRIX_ROW_PINS_RIGHT { B0, A5, A4, A3 }
46
47/* COL2ROW, ROW2COL*/
48#define DIODE_DIRECTION COL2ROW
49
50#define MATRIX_IO_DELAY 5
51
52/*
53 * Split Keyboard specific options, make sure you have 'SPLIT_KEYBOARD = yes' in your rules.mk, and define SOFT_SERIAL_PIN.
54 */
55#define SPLIT_HAND_PIN B9
56#define SOFT_SERIAL_PIN B6
57//#define SELECT_SOFT_SERIAL_SPEED 0
58#define SERIAL_USART_SPEED 921600
59
60#define ENCODERS_PAD_A { B5 }
61#define ENCODERS_PAD_B { A2 }
62
63#define RGB_DI_PIN B1
64#define RGBLED_NUM 48
65#define RGBLED_SPLIT {24, 24}
66#define RGBLIGHT_LIMIT_VAL 120
67#define RGBLIGHT_ANIMATIONS
68
69#define WS2812_PWM_DRIVER PWMD3
70#define WS2812_PWM_CHANNEL 4
71#define WS2812_PWM_PAL_MODE 2
72#define WS2812_DMA_STREAM STM32_DMA1_STREAM2
73#define WS2812_DMA_CHANNEL 5
74
75/* Debounce reduces chatter (unintended double-presses) - set 0 if debouncing is not needed */
76#define DEBOUNCE 5
77
78/* Mechanical locking support. Use KC_LCAP, KC_LNUM or KC_LSCR instead in keymap */
79#define LOCKING_SUPPORT_ENABLE
80/* Locking resynchronize hack */
81#define LOCKING_RESYNC_ENABLE
82
83/* If defined, GRAVE_ESC will always act as ESC when CTRL is held.
84 * This is userful for the Windows task manager shortcut (ctrl+shift+esc).
85 */
86// #define GRAVE_ESC_CTRL_OVERRIDE
87
88/*
89 * Force NKRO
90 *
91 * Force NKRO (nKey Rollover) to be enabled by default, regardless of the saved
92 * state in the bootmagic EEPROM settings. (Note that NKRO must be enabled in the
93 * makefile for this to work.)
94 *
95 * If forced on, NKRO can be disabled via magic key (default = LShift+RShift+N)
96 * until the next keyboard reset.
97 *
98 * NKRO may prevent your keystrokes from being detected in the BIOS, but it is
99 * fully operational during normal computer usage.
100 *
101 * For a less heavy-handed approach, enable NKRO via magic key (LShift+RShift+N)
102 * or via bootmagic (hold SPACE+N while plugging in the keyboard). Once set by
103 * bootmagic, NKRO mode will always be enabled until it is toggled again during a
104 * power-up.
105 *
106 */
107//#define FORCE_NKRO
108
109/*
110 * Magic Key Options
111 *
112 * Magic keys are hotkey commands that allow control over firmware functions of
113 * the keyboard. They are best used in combination with the HID Listen program,
114 * found here: https://www.pjrc.com/teensy/hid_listen.html
115 *
116 * The options below allow the magic key functionality to be changed. This is
117 * useful if your keyboard/keypad is missing keys and you want magic key support.
118 *
119 */
120
121/* key combination for magic key command */
122/* defined by default; to change, uncomment and set to the combination you want */
123// #define IS_COMMAND() (get_mods() == MOD_MASK_SHIFT)
124
125/* control how magic key switches layers */
126//#define MAGIC_KEY_SWITCH_LAYER_WITH_FKEYS true
127//#define MAGIC_KEY_SWITCH_LAYER_WITH_NKEYS true
128//#define MAGIC_KEY_SWITCH_LAYER_WITH_CUSTOM false
129
130/* override magic key keymap */
131//#define MAGIC_KEY_SWITCH_LAYER_WITH_FKEYS
132//#define MAGIC_KEY_SWITCH_LAYER_WITH_NKEYS
133//#define MAGIC_KEY_SWITCH_LAYER_WITH_CUSTOM
134//#define MAGIC_KEY_HELP H
135//#define MAGIC_KEY_HELP_ALT SLASH
136//#define MAGIC_KEY_DEBUG D
137//#define MAGIC_KEY_DEBUG_MATRIX X
138//#define MAGIC_KEY_DEBUG_KBD K
139//#define MAGIC_KEY_DEBUG_MOUSE M
140//#define MAGIC_KEY_VERSION V
141//#define MAGIC_KEY_STATUS S
142//#define MAGIC_KEY_CONSOLE C
143//#define MAGIC_KEY_LAYER0 0
144//#define MAGIC_KEY_LAYER0_ALT GRAVE
145//#define MAGIC_KEY_LAYER1 1
146//#define MAGIC_KEY_LAYER2 2
147//#define MAGIC_KEY_LAYER3 3
148//#define MAGIC_KEY_LAYER4 4
149//#define MAGIC_KEY_LAYER5 5
150//#define MAGIC_KEY_LAYER6 6
151//#define MAGIC_KEY_LAYER7 7
152//#define MAGIC_KEY_LAYER8 8
153//#define MAGIC_KEY_LAYER9 9
154//#define MAGIC_KEY_BOOTLOADER B
155//#define MAGIC_KEY_BOOTLOADER_ALT ESC
156//#define MAGIC_KEY_LOCK CAPS
157//#define MAGIC_KEY_EEPROM E
158//#define MAGIC_KEY_EEPROM_CLEAR BSPACE
159//#define MAGIC_KEY_NKRO N
160//#define MAGIC_KEY_SLEEP_LED Z
161
162/*
163 * Feature disable options
164 * These options are also useful to firmware size reduction.
165 */
166
167/* disable debug print */
168//#define NO_DEBUG
169
170/* disable print */
171//#define NO_PRINT
172
173/* disable action features */
174//#define NO_ACTION_LAYER
175//#define NO_ACTION_TAPPING
176//#define NO_ACTION_ONESHOT
177
178/* disable these deprecated features by default */
179#define NO_ACTION_MACRO
180#define NO_ACTION_FUNCTION
181
182/* Bootmagic Lite key configuration */
183#define BOOTMAGIC_LITE_ROW 0
184#define BOOTMAGIC_LITE_COLUMN 0
185#define BOOTMAGIC_LITE_ROW_RIGHT 4
186#define BOOTMAGIC_LITE_COLUMN_RIGHT 0
diff --git a/keyboards/zvecr/zv48/f401/chconf.h b/keyboards/zvecr/zv48/f401/chconf.h
new file mode 100644
index 000000000..0b8b69b0e
--- /dev/null
+++ b/keyboards/zvecr/zv48/f401/chconf.h
@@ -0,0 +1,714 @@
1/*
2 ChibiOS - Copyright (C) 2006..2018 Giovanni Di Sirio
3
4 Licensed under the Apache License, Version 2.0 (the "License");
5 you may not use this file except in compliance with the License.
6 You may obtain a copy of the License at
7
8 http://www.apache.org/licenses/LICENSE-2.0
9
10 Unless required by applicable law or agreed to in writing, software
11 distributed under the License is distributed on an "AS IS" BASIS,
12 WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
13 See the License for the specific language governing permissions and
14 limitations under the License.
15*/
16
17/**
18 * @file rt/templates/chconf.h
19 * @brief Configuration file template.
20 * @details A copy of this file must be placed in each project directory, it
21 * contains the application specific kernel settings.
22 *
23 * @addtogroup config
24 * @details Kernel related settings and hooks.
25 * @{
26 */
27
28#ifndef CHCONF_H
29#define CHCONF_H
30
31#define _CHIBIOS_RT_CONF_
32#define _CHIBIOS_RT_CONF_VER_6_0_
33
34/*===========================================================================*/
35/**
36 * @name System timers settings
37 * @{
38 */
39/*===========================================================================*/
40
41/**
42 * @brief System time counter resolution.
43 * @note Allowed values are 16 or 32 bits.
44 */
45#if !defined(CH_CFG_ST_RESOLUTION)
46#define CH_CFG_ST_RESOLUTION 32
47#endif
48
49/**
50 * @brief System tick frequency.
51 * @details Frequency of the system timer that drives the system ticks. This
52 * setting also defines the system tick time unit.
53 */
54#if !defined(CH_CFG_ST_FREQUENCY)
55#define CH_CFG_ST_FREQUENCY 100000
56#endif
57
58/**
59 * @brief Time intervals data size.
60 * @note Allowed values are 16, 32 or 64 bits.
61 */
62#if !defined(CH_CFG_INTERVALS_SIZE)
63#define CH_CFG_INTERVALS_SIZE 32
64#endif
65
66/**
67 * @brief Time types data size.
68 * @note Allowed values are 16 or 32 bits.
69 */
70#if !defined(CH_CFG_TIME_TYPES_SIZE)
71#define CH_CFG_TIME_TYPES_SIZE 32
72#endif
73
74/**
75 * @brief Time delta constant for the tick-less mode.
76 * @note If this value is zero then the system uses the classic
77 * periodic tick. This value represents the minimum number
78 * of ticks that is safe to specify in a timeout directive.
79 * The value one is not valid, timeouts are rounded up to
80 * this value.
81 */
82#if !defined(CH_CFG_ST_TIMEDELTA)
83#define CH_CFG_ST_TIMEDELTA 2
84#endif
85
86/** @} */
87
88/*===========================================================================*/
89/**
90 * @name Kernel parameters and options
91 * @{
92 */
93/*===========================================================================*/
94
95/**
96 * @brief Round robin interval.
97 * @details This constant is the number of system ticks allowed for the
98 * threads before preemption occurs. Setting this value to zero
99 * disables the preemption for threads with equal priority and the
100 * round robin becomes cooperative. Note that higher priority
101 * threads can still preempt, the kernel is always preemptive.
102 * @note Disabling the round robin preemption makes the kernel more compact
103 * and generally faster.
104 * @note The round robin preemption is not supported in tickless mode and
105 * must be set to zero in that case.
106 */
107#if !defined(CH_CFG_TIME_QUANTUM)
108#define CH_CFG_TIME_QUANTUM 0
109#endif
110
111/**
112 * @brief Managed RAM size.
113 * @details Size of the RAM area to be managed by the OS. If set to zero
114 * then the whole available RAM is used. The core memory is made
115 * available to the heap allocator and/or can be used directly through
116 * the simplified core memory allocator.
117 *
118 * @note In order to let the OS manage the whole RAM the linker script must
119 * provide the @p __heap_base__ and @p __heap_end__ symbols.
120 * @note Requires @p CH_CFG_USE_MEMCORE.
121 */
122#if !defined(CH_CFG_MEMCORE_SIZE)
123#define CH_CFG_MEMCORE_SIZE 0
124#endif
125
126/**
127 * @brief Idle thread automatic spawn suppression.
128 * @details When this option is activated the function @p chSysInit()
129 * does not spawn the idle thread. The application @p main()
130 * function becomes the idle thread and must implement an
131 * infinite loop.
132 */
133#if !defined(CH_CFG_NO_IDLE_THREAD)
134#define CH_CFG_NO_IDLE_THREAD FALSE
135#endif
136
137/** @} */
138
139/*===========================================================================*/
140/**
141 * @name Performance options
142 * @{
143 */
144/*===========================================================================*/
145
146/**
147 * @brief OS optimization.
148 * @details If enabled then time efficient rather than space efficient code
149 * is used when two possible implementations exist.
150 *
151 * @note This is not related to the compiler optimization options.
152 * @note The default is @p TRUE.
153 */
154#if !defined(CH_CFG_OPTIMIZE_SPEED)
155#define CH_CFG_OPTIMIZE_SPEED TRUE
156#endif
157
158/** @} */
159
160/*===========================================================================*/
161/**
162 * @name Subsystem options
163 * @{
164 */
165/*===========================================================================*/
166
167/**
168 * @brief Time Measurement APIs.
169 * @details If enabled then the time measurement APIs are included in
170 * the kernel.
171 *
172 * @note The default is @p TRUE.
173 */
174#if !defined(CH_CFG_USE_TM)
175#define CH_CFG_USE_TM TRUE
176#endif
177
178/**
179 * @brief Threads registry APIs.
180 * @details If enabled then the registry APIs are included in the kernel.
181 *
182 * @note The default is @p TRUE.
183 */
184#if !defined(CH_CFG_USE_REGISTRY)
185#define CH_CFG_USE_REGISTRY TRUE
186#endif
187
188/**
189 * @brief Threads synchronization APIs.
190 * @details If enabled then the @p chThdWait() function is included in
191 * the kernel.
192 *
193 * @note The default is @p TRUE.
194 */
195#if !defined(CH_CFG_USE_WAITEXIT)
196#define CH_CFG_USE_WAITEXIT TRUE
197#endif
198
199/**
200 * @brief Semaphores APIs.
201 * @details If enabled then the Semaphores APIs are included in the kernel.
202 *
203 * @note The default is @p TRUE.
204 */
205#if !defined(CH_CFG_USE_SEMAPHORES)
206#define CH_CFG_USE_SEMAPHORES TRUE
207#endif
208
209/**
210 * @brief Semaphores queuing mode.
211 * @details If enabled then the threads are enqueued on semaphores by
212 * priority rather than in FIFO order.
213 *
214 * @note The default is @p FALSE. Enable this if you have special
215 * requirements.
216 * @note Requires @p CH_CFG_USE_SEMAPHORES.
217 */
218#if !defined(CH_CFG_USE_SEMAPHORES_PRIORITY)
219#define CH_CFG_USE_SEMAPHORES_PRIORITY FALSE
220#endif
221
222/**
223 * @brief Mutexes APIs.
224 * @details If enabled then the mutexes APIs are included in the kernel.
225 *
226 * @note The default is @p TRUE.
227 */
228#if !defined(CH_CFG_USE_MUTEXES)
229#define CH_CFG_USE_MUTEXES TRUE
230#endif
231
232/**
233 * @brief Enables recursive behavior on mutexes.
234 * @note Recursive mutexes are heavier and have an increased
235 * memory footprint.
236 *
237 * @note The default is @p FALSE.
238 * @note Requires @p CH_CFG_USE_MUTEXES.
239 */
240#if !defined(CH_CFG_USE_MUTEXES_RECURSIVE)
241#define CH_CFG_USE_MUTEXES_RECURSIVE FALSE
242#endif
243
244/**
245 * @brief Conditional Variables APIs.
246 * @details If enabled then the conditional variables APIs are included
247 * in the kernel.
248 *
249 * @note The default is @p TRUE.
250 * @note Requires @p CH_CFG_USE_MUTEXES.
251 */
252#if !defined(CH_CFG_USE_CONDVARS)
253#define CH_CFG_USE_CONDVARS TRUE
254#endif
255
256/**
257 * @brief Conditional Variables APIs with timeout.
258 * @details If enabled then the conditional variables APIs with timeout
259 * specification are included in the kernel.
260 *
261 * @note The default is @p TRUE.
262 * @note Requires @p CH_CFG_USE_CONDVARS.
263 */
264#if !defined(CH_CFG_USE_CONDVARS_TIMEOUT)
265#define CH_CFG_USE_CONDVARS_TIMEOUT TRUE
266#endif
267
268/**
269 * @brief Events Flags APIs.
270 * @details If enabled then the event flags APIs are included in the kernel.
271 *
272 * @note The default is @p TRUE.
273 */
274#if !defined(CH_CFG_USE_EVENTS)
275#define CH_CFG_USE_EVENTS TRUE
276#endif
277
278/**
279 * @brief Events Flags APIs with timeout.
280 * @details If enabled then the events APIs with timeout specification
281 * are included in the kernel.
282 *
283 * @note The default is @p TRUE.
284 * @note Requires @p CH_CFG_USE_EVENTS.
285 */
286#if !defined(CH_CFG_USE_EVENTS_TIMEOUT)
287#define CH_CFG_USE_EVENTS_TIMEOUT TRUE
288#endif
289
290/**
291 * @brief Synchronous Messages APIs.
292 * @details If enabled then the synchronous messages APIs are included
293 * in the kernel.
294 *
295 * @note The default is @p TRUE.
296 */
297#if !defined(CH_CFG_USE_MESSAGES)
298#define CH_CFG_USE_MESSAGES TRUE
299#endif
300
301/**
302 * @brief Synchronous Messages queuing mode.
303 * @details If enabled then messages are served by priority rather than in
304 * FIFO order.
305 *
306 * @note The default is @p FALSE. Enable this if you have special
307 * requirements.
308 * @note Requires @p CH_CFG_USE_MESSAGES.
309 */
310#if !defined(CH_CFG_USE_MESSAGES_PRIORITY)
311#define CH_CFG_USE_MESSAGES_PRIORITY FALSE
312#endif
313
314/**
315 * @brief Mailboxes APIs.
316 * @details If enabled then the asynchronous messages (mailboxes) APIs are
317 * included in the kernel.
318 *
319 * @note The default is @p TRUE.
320 * @note Requires @p CH_CFG_USE_SEMAPHORES.
321 */
322#if !defined(CH_CFG_USE_MAILBOXES)
323#define CH_CFG_USE_MAILBOXES TRUE
324#endif
325
326/**
327 * @brief Core Memory Manager APIs.
328 * @details If enabled then the core memory manager APIs are included
329 * in the kernel.
330 *
331 * @note The default is @p TRUE.
332 */
333#if !defined(CH_CFG_USE_MEMCORE)
334#define CH_CFG_USE_MEMCORE TRUE
335#endif
336
337/**
338 * @brief Heap Allocator APIs.
339 * @details If enabled then the memory heap allocator APIs are included
340 * in the kernel.
341 *
342 * @note The default is @p TRUE.
343 * @note Requires @p CH_CFG_USE_MEMCORE and either @p CH_CFG_USE_MUTEXES or
344 * @p CH_CFG_USE_SEMAPHORES.
345 * @note Mutexes are recommended.
346 */
347#if !defined(CH_CFG_USE_HEAP)
348#define CH_CFG_USE_HEAP TRUE
349#endif
350
351/**
352 * @brief Memory Pools Allocator APIs.
353 * @details If enabled then the memory pools allocator APIs are included
354 * in the kernel.
355 *
356 * @note The default is @p TRUE.
357 */
358#if !defined(CH_CFG_USE_MEMPOOLS)
359#define CH_CFG_USE_MEMPOOLS TRUE
360#endif
361
362/**
363 * @brief Objects FIFOs APIs.
364 * @details If enabled then the objects FIFOs APIs are included
365 * in the kernel.
366 *
367 * @note The default is @p TRUE.
368 */
369#if !defined(CH_CFG_USE_OBJ_FIFOS)
370#define CH_CFG_USE_OBJ_FIFOS TRUE
371#endif
372
373/**
374 * @brief Pipes APIs.
375 * @details If enabled then the pipes APIs are included
376 * in the kernel.
377 *
378 * @note The default is @p TRUE.
379 */
380#if !defined(CH_CFG_USE_PIPES)
381#define CH_CFG_USE_PIPES TRUE
382#endif
383
384/**
385 * @brief Dynamic Threads APIs.
386 * @details If enabled then the dynamic threads creation APIs are included
387 * in the kernel.
388 *
389 * @note The default is @p TRUE.
390 * @note Requires @p CH_CFG_USE_WAITEXIT.
391 * @note Requires @p CH_CFG_USE_HEAP and/or @p CH_CFG_USE_MEMPOOLS.
392 */
393#if !defined(CH_CFG_USE_DYNAMIC)
394#define CH_CFG_USE_DYNAMIC TRUE
395#endif
396
397/** @} */
398
399/*===========================================================================*/
400/**
401 * @name Objects factory options
402 * @{
403 */
404/*===========================================================================*/
405
406/**
407 * @brief Objects Factory APIs.
408 * @details If enabled then the objects factory APIs are included in the
409 * kernel.
410 *
411 * @note The default is @p FALSE.
412 */
413#if !defined(CH_CFG_USE_FACTORY)
414#define CH_CFG_USE_FACTORY TRUE
415#endif
416
417/**
418 * @brief Maximum length for object names.
419 * @details If the specified length is zero then the name is stored by
420 * pointer but this could have unintended side effects.
421 */
422#if !defined(CH_CFG_FACTORY_MAX_NAMES_LENGTH)
423#define CH_CFG_FACTORY_MAX_NAMES_LENGTH 8
424#endif
425
426/**
427 * @brief Enables the registry of generic objects.
428 */
429#if !defined(CH_CFG_FACTORY_OBJECTS_REGISTRY)
430#define CH_CFG_FACTORY_OBJECTS_REGISTRY TRUE
431#endif
432
433/**
434 * @brief Enables factory for generic buffers.
435 */
436#if !defined(CH_CFG_FACTORY_GENERIC_BUFFERS)
437#define CH_CFG_FACTORY_GENERIC_BUFFERS TRUE
438#endif
439
440/**
441 * @brief Enables factory for semaphores.
442 */
443#if !defined(CH_CFG_FACTORY_SEMAPHORES)
444#define CH_CFG_FACTORY_SEMAPHORES TRUE
445#endif
446
447/**
448 * @brief Enables factory for mailboxes.
449 */
450#if !defined(CH_CFG_FACTORY_MAILBOXES)
451#define CH_CFG_FACTORY_MAILBOXES TRUE
452#endif
453
454/**
455 * @brief Enables factory for objects FIFOs.
456 */
457#if !defined(CH_CFG_FACTORY_OBJ_FIFOS)
458#define CH_CFG_FACTORY_OBJ_FIFOS TRUE
459#endif
460
461/**
462 * @brief Enables factory for Pipes.
463 */
464#if !defined(CH_CFG_FACTORY_PIPES) || defined(__DOXYGEN__)
465#define CH_CFG_FACTORY_PIPES TRUE
466#endif
467
468/** @} */
469
470/*===========================================================================*/
471/**
472 * @name Debug options
473 * @{
474 */
475/*===========================================================================*/
476
477/**
478 * @brief Debug option, kernel statistics.
479 *
480 * @note The default is @p FALSE.
481 */
482#if !defined(CH_DBG_STATISTICS)
483#define CH_DBG_STATISTICS FALSE
484#endif
485
486/**
487 * @brief Debug option, system state check.
488 * @details If enabled the correct call protocol for system APIs is checked
489 * at runtime.
490 *
491 * @note The default is @p FALSE.
492 */
493#if !defined(CH_DBG_SYSTEM_STATE_CHECK)
494#define CH_DBG_SYSTEM_STATE_CHECK FALSE
495#endif
496
497/**
498 * @brief Debug option, parameters checks.
499 * @details If enabled then the checks on the API functions input
500 * parameters are activated.
501 *
502 * @note The default is @p FALSE.
503 */
504#if !defined(CH_DBG_ENABLE_CHECKS)
505#define CH_DBG_ENABLE_CHECKS FALSE
506#endif
507
508/**
509 * @brief Debug option, consistency checks.
510 * @details If enabled then all the assertions in the kernel code are
511 * activated. This includes consistency checks inside the kernel,
512 * runtime anomalies and port-defined checks.
513 *
514 * @note The default is @p FALSE.
515 */
516#if !defined(CH_DBG_ENABLE_ASSERTS)
517#define CH_DBG_ENABLE_ASSERTS FALSE
518#endif
519
520/**
521 * @brief Debug option, trace buffer.
522 * @details If enabled then the trace buffer is activated.
523 *
524 * @note The default is @p CH_DBG_TRACE_MASK_DISABLED.
525 */
526#if !defined(CH_DBG_TRACE_MASK)
527#define CH_DBG_TRACE_MASK CH_DBG_TRACE_MASK_DISABLED
528#endif
529
530/**
531 * @brief Trace buffer entries.
532 * @note The trace buffer is only allocated if @p CH_DBG_TRACE_MASK is
533 * different from @p CH_DBG_TRACE_MASK_DISABLED.
534 */
535#if !defined(CH_DBG_TRACE_BUFFER_SIZE)
536#define CH_DBG_TRACE_BUFFER_SIZE 128
537#endif
538
539/**
540 * @brief Debug option, stack checks.
541 * @details If enabled then a runtime stack check is performed.
542 *
543 * @note The default is @p FALSE.
544 * @note The stack check is performed in a architecture/port dependent way.
545 * It may not be implemented or some ports.
546 * @note The default failure mode is to halt the system with the global
547 * @p panic_msg variable set to @p NULL.
548 */
549#if !defined(CH_DBG_ENABLE_STACK_CHECK)
550#define CH_DBG_ENABLE_STACK_CHECK FALSE
551#endif
552
553/**
554 * @brief Debug option, stacks initialization.
555 * @details If enabled then the threads working area is filled with a byte
556 * value when a thread is created. This can be useful for the
557 * runtime measurement of the used stack.
558 *
559 * @note The default is @p FALSE.
560 */
561#if !defined(CH_DBG_FILL_THREADS)
562#define CH_DBG_FILL_THREADS FALSE
563#endif
564
565/**
566 * @brief Debug option, threads profiling.
567 * @details If enabled then a field is added to the @p thread_t structure that
568 * counts the system ticks occurred while executing the thread.
569 *
570 * @note The default is @p FALSE.
571 * @note This debug option is not currently compatible with the
572 * tickless mode.
573 */
574#if !defined(CH_DBG_THREADS_PROFILING)
575#define CH_DBG_THREADS_PROFILING FALSE
576#endif
577
578/** @} */
579
580/*===========================================================================*/
581/**
582 * @name Kernel hooks
583 * @{
584 */
585/*===========================================================================*/
586
587/**
588 * @brief System structure extension.
589 * @details User fields added to the end of the @p ch_system_t structure.
590 */
591#define CH_CFG_SYSTEM_EXTRA_FIELDS \
592 /* Add threads custom fields here.*/
593
594/**
595 * @brief System initialization hook.
596 * @details User initialization code added to the @p chSysInit() function
597 * just before interrupts are enabled globally.
598 */
599#define CH_CFG_SYSTEM_INIT_HOOK() { \
600 /* Add threads initialization code here.*/ \
601}
602
603/**
604 * @brief Threads descriptor structure extension.
605 * @details User fields added to the end of the @p thread_t structure.
606 */
607#define CH_CFG_THREAD_EXTRA_FIELDS \
608 /* Add threads custom fields here.*/
609
610/**
611 * @brief Threads initialization hook.
612 * @details User initialization code added to the @p _thread_init() function.
613 *
614 * @note It is invoked from within @p _thread_init() and implicitly from all
615 * the threads creation APIs.
616 */
617#define CH_CFG_THREAD_INIT_HOOK(tp) { \
618 /* Add threads initialization code here.*/ \
619}
620
621/**
622 * @brief Threads finalization hook.
623 * @details User finalization code added to the @p chThdExit() API.
624 */
625#define CH_CFG_THREAD_EXIT_HOOK(tp) { \
626 /* Add threads finalization code here.*/ \
627}
628
629/**
630 * @brief Context switch hook.
631 * @details This hook is invoked just before switching between threads.
632 */
633#define CH_CFG_CONTEXT_SWITCH_HOOK(ntp, otp) { \
634 /* Context switch code here.*/ \
635}
636
637/**
638 * @brief ISR enter hook.
639 */
640#define CH_CFG_IRQ_PROLOGUE_HOOK() { \
641 /* IRQ prologue code here.*/ \
642}
643
644/**
645 * @brief ISR exit hook.
646 */
647#define CH_CFG_IRQ_EPILOGUE_HOOK() { \
648 /* IRQ epilogue code here.*/ \
649}
650
651/**
652 * @brief Idle thread enter hook.
653 * @note This hook is invoked within a critical zone, no OS functions
654 * should be invoked from here.
655 * @note This macro can be used to activate a power saving mode.
656 */
657#define CH_CFG_IDLE_ENTER_HOOK() { \
658 /* Idle-enter code here.*/ \
659}
660
661/**
662 * @brief Idle thread leave hook.
663 * @note This hook is invoked within a critical zone, no OS functions
664 * should be invoked from here.
665 * @note This macro can be used to deactivate a power saving mode.
666 */
667#define CH_CFG_IDLE_LEAVE_HOOK() { \
668 /* Idle-leave code here.*/ \
669}
670
671/**
672 * @brief Idle Loop hook.
673 * @details This hook is continuously invoked by the idle thread loop.
674 */
675#define CH_CFG_IDLE_LOOP_HOOK() { \
676 /* Idle loop code here.*/ \
677}
678
679/**
680 * @brief System tick event hook.
681 * @details This hook is invoked in the system tick handler immediately
682 * after processing the virtual timers queue.
683 */
684#define CH_CFG_SYSTEM_TICK_HOOK() { \
685 /* System tick event code here.*/ \
686}
687
688/**
689 * @brief System halt hook.
690 * @details This hook is invoked in case to a system halting error before
691 * the system is halted.
692 */
693#define CH_CFG_SYSTEM_HALT_HOOK(reason) { \
694 /* System halt code here.*/ \
695}
696
697/**
698 * @brief Trace hook.
699 * @details This hook is invoked each time a new record is written in the
700 * trace buffer.
701 */
702#define CH_CFG_TRACE_HOOK(tep) { \
703 /* Trace code here.*/ \
704}
705
706/** @} */
707
708/*===========================================================================*/
709/* Port-specific settings (override port settings defaulted in chcore.h). */
710/*===========================================================================*/
711
712#endif /* CHCONF_H */
713
714/** @} */
diff --git a/keyboards/zvecr/zv48/f401/halconf.h b/keyboards/zvecr/zv48/f401/halconf.h
new file mode 100644
index 000000000..1f8df5dbb
--- /dev/null
+++ b/keyboards/zvecr/zv48/f401/halconf.h
@@ -0,0 +1,525 @@
1/*
2 ChibiOS - Copyright (C) 2006..2018 Giovanni Di Sirio
3
4 Licensed under the Apache License, Version 2.0 (the "License");
5 you may not use this file except in compliance with the License.
6 You may obtain a copy of the License at
7
8 http://www.apache.org/licenses/LICENSE-2.0
9
10 Unless required by applicable law or agreed to in writing, software
11 distributed under the License is distributed on an "AS IS" BASIS,
12 WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
13 See the License for the specific language governing permissions and
14 limitations under the License.
15*/
16
17/**
18 * @file templates/halconf.h
19 * @brief HAL configuration header.
20 * @details HAL configuration file, this file allows to enable or disable the
21 * various device drivers from your application. You may also use
22 * this file in order to override the device drivers default settings.
23 *
24 * @addtogroup HAL_CONF
25 * @{
26 */
27
28#ifndef HALCONF_H
29#define HALCONF_H
30
31#define _CHIBIOS_HAL_CONF_
32#define _CHIBIOS_HAL_CONF_VER_7_0_
33
34#include "mcuconf.h"
35
36/**
37 * @brief Enables the PAL subsystem.
38 */
39#if !defined(HAL_USE_PAL) || defined(__DOXYGEN__)
40#define HAL_USE_PAL TRUE
41#endif
42
43/**
44 * @brief Enables the ADC subsystem.
45 */
46#if !defined(HAL_USE_ADC) || defined(__DOXYGEN__)
47#define HAL_USE_ADC FALSE
48#endif
49
50/**
51 * @brief Enables the CAN subsystem.
52 */
53#if !defined(HAL_USE_CAN) || defined(__DOXYGEN__)
54#define HAL_USE_CAN FALSE
55#endif
56
57/**
58 * @brief Enables the cryptographic subsystem.
59 */
60#if !defined(HAL_USE_CRY) || defined(__DOXYGEN__)
61#define HAL_USE_CRY FALSE
62#endif
63
64/**
65 * @brief Enables the DAC subsystem.
66 */
67#if !defined(HAL_USE_DAC) || defined(__DOXYGEN__)
68#define HAL_USE_DAC FALSE
69#endif
70
71/**
72 * @brief Enables the GPT subsystem.
73 */
74#if !defined(HAL_USE_GPT) || defined(__DOXYGEN__)
75#define HAL_USE_GPT FALSE
76#endif
77
78/**
79 * @brief Enables the I2C subsystem.
80 */
81#if !defined(HAL_USE_I2C) || defined(__DOXYGEN__)
82#define HAL_USE_I2C FALSE
83#endif
84
85/**
86 * @brief Enables the I2S subsystem.
87 */
88#if !defined(HAL_USE_I2S) || defined(__DOXYGEN__)
89#define HAL_USE_I2S FALSE
90#endif
91
92/**
93 * @brief Enables the ICU subsystem.
94 */
95#if !defined(HAL_USE_ICU) || defined(__DOXYGEN__)
96#define HAL_USE_ICU FALSE
97#endif
98
99/**
100 * @brief Enables the MAC subsystem.
101 */
102#if !defined(HAL_USE_MAC) || defined(__DOXYGEN__)
103#define HAL_USE_MAC FALSE
104#endif
105
106/**
107 * @brief Enables the MMC_SPI subsystem.
108 */
109#if !defined(HAL_USE_MMC_SPI) || defined(__DOXYGEN__)
110#define HAL_USE_MMC_SPI FALSE
111#endif
112
113/**
114 * @brief Enables the PWM subsystem.
115 */
116#if !defined(HAL_USE_PWM) || defined(__DOXYGEN__)
117#define HAL_USE_PWM TRUE
118#endif
119
120/**
121 * @brief Enables the RTC subsystem.
122 */
123#if !defined(HAL_USE_RTC) || defined(__DOXYGEN__)
124#define HAL_USE_RTC FALSE
125#endif
126
127/**
128 * @brief Enables the SDC subsystem.
129 */
130#if !defined(HAL_USE_SDC) || defined(__DOXYGEN__)
131#define HAL_USE_SDC FALSE
132#endif
133
134/**
135 * @brief Enables the SERIAL subsystem.
136 */
137#if !defined(HAL_USE_SERIAL) || defined(__DOXYGEN__)
138#define HAL_USE_SERIAL TRUE
139#endif
140
141/**
142 * @brief Enables the SERIAL over USB subsystem.
143 */
144#if !defined(HAL_USE_SERIAL_USB) || defined(__DOXYGEN__)
145#define HAL_USE_SERIAL_USB FALSE
146#endif
147
148/**
149 * @brief Enables the SIO subsystem.
150 */
151#if !defined(HAL_USE_SIO) || defined(__DOXYGEN__)
152#define HAL_USE_SIO FALSE
153#endif
154
155/**
156 * @brief Enables the SPI subsystem.
157 */
158#if !defined(HAL_USE_SPI) || defined(__DOXYGEN__)
159#define HAL_USE_SPI FALSE
160#endif
161
162/**
163 * @brief Enables the TRNG subsystem.
164 */
165#if !defined(HAL_USE_TRNG) || defined(__DOXYGEN__)
166#define HAL_USE_TRNG FALSE
167#endif
168
169/**
170 * @brief Enables the UART subsystem.
171 */
172#if !defined(HAL_USE_UART) || defined(__DOXYGEN__)
173#define HAL_USE_UART FALSE
174#endif
175
176/**
177 * @brief Enables the USB subsystem.
178 */
179#if !defined(HAL_USE_USB) || defined(__DOXYGEN__)
180#define HAL_USE_USB TRUE
181#endif
182
183/**
184 * @brief Enables the WDG subsystem.
185 */
186#if !defined(HAL_USE_WDG) || defined(__DOXYGEN__)
187#define HAL_USE_WDG FALSE
188#endif
189
190/**
191 * @brief Enables the WSPI subsystem.
192 */
193#if !defined(HAL_USE_WSPI) || defined(__DOXYGEN__)
194#define HAL_USE_WSPI FALSE
195#endif
196
197/*===========================================================================*/
198/* PAL driver related settings. */
199/*===========================================================================*/
200
201/**
202 * @brief Enables synchronous APIs.
203 * @note Disabling this option saves both code and data space.
204 */
205#if !defined(PAL_USE_CALLBACKS) || defined(__DOXYGEN__)
206#define PAL_USE_CALLBACKS FALSE
207#endif
208
209/**
210 * @brief Enables synchronous APIs.
211 * @note Disabling this option saves both code and data space.
212 */
213#if !defined(PAL_USE_WAIT) || defined(__DOXYGEN__)
214#define PAL_USE_WAIT FALSE
215#endif
216
217/*===========================================================================*/
218/* ADC driver related settings. */
219/*===========================================================================*/
220
221/**
222 * @brief Enables synchronous APIs.
223 * @note Disabling this option saves both code and data space.
224 */
225#if !defined(ADC_USE_WAIT) || defined(__DOXYGEN__)
226#define ADC_USE_WAIT TRUE
227#endif
228
229/**
230 * @brief Enables the @p adcAcquireBus() and @p adcReleaseBus() APIs.
231 * @note Disabling this option saves both code and data space.
232 */
233#if !defined(ADC_USE_MUTUAL_EXCLUSION) || defined(__DOXYGEN__)
234#define ADC_USE_MUTUAL_EXCLUSION TRUE
235#endif
236
237/*===========================================================================*/
238/* CAN driver related settings. */
239/*===========================================================================*/
240
241/**
242 * @brief Sleep mode related APIs inclusion switch.
243 */
244#if !defined(CAN_USE_SLEEP_MODE) || defined(__DOXYGEN__)
245#define CAN_USE_SLEEP_MODE TRUE
246#endif
247
248/**
249 * @brief Enforces the driver to use direct callbacks rather than OSAL events.
250 */
251#if !defined(CAN_ENFORCE_USE_CALLBACKS) || defined(__DOXYGEN__)
252#define CAN_ENFORCE_USE_CALLBACKS FALSE
253#endif
254
255/*===========================================================================*/
256/* CRY driver related settings. */
257/*===========================================================================*/
258
259/**
260 * @brief Enables the SW fall-back of the cryptographic driver.
261 * @details When enabled, this option, activates a fall-back software
262 * implementation for algorithms not supported by the underlying
263 * hardware.
264 * @note Fall-back implementations may not be present for all algorithms.
265 */
266#if !defined(HAL_CRY_USE_FALLBACK) || defined(__DOXYGEN__)
267#define HAL_CRY_USE_FALLBACK FALSE
268#endif
269
270/**
271 * @brief Makes the driver forcibly use the fall-back implementations.
272 */
273#if !defined(HAL_CRY_ENFORCE_FALLBACK) || defined(__DOXYGEN__)
274#define HAL_CRY_ENFORCE_FALLBACK FALSE
275#endif
276
277/*===========================================================================*/
278/* DAC driver related settings. */
279/*===========================================================================*/
280
281/**
282 * @brief Enables synchronous APIs.
283 * @note Disabling this option saves both code and data space.
284 */
285#if !defined(DAC_USE_WAIT) || defined(__DOXYGEN__)
286#define DAC_USE_WAIT TRUE
287#endif
288
289/**
290 * @brief Enables the @p dacAcquireBus() and @p dacReleaseBus() APIs.
291 * @note Disabling this option saves both code and data space.
292 */
293#if !defined(DAC_USE_MUTUAL_EXCLUSION) || defined(__DOXYGEN__)
294#define DAC_USE_MUTUAL_EXCLUSION TRUE
295#endif
296
297/*===========================================================================*/
298/* I2C driver related settings. */
299/*===========================================================================*/
300
301/**
302 * @brief Enables the mutual exclusion APIs on the I2C bus.
303 */
304#if !defined(I2C_USE_MUTUAL_EXCLUSION) || defined(__DOXYGEN__)
305#define I2C_USE_MUTUAL_EXCLUSION TRUE
306#endif
307
308/*===========================================================================*/
309/* MAC driver related settings. */
310/*===========================================================================*/
311
312/**
313 * @brief Enables the zero-copy API.
314 */
315#if !defined(MAC_USE_ZERO_COPY) || defined(__DOXYGEN__)
316#define MAC_USE_ZERO_COPY FALSE
317#endif
318
319/**
320 * @brief Enables an event sources for incoming packets.
321 */
322#if !defined(MAC_USE_EVENTS) || defined(__DOXYGEN__)
323#define MAC_USE_EVENTS TRUE
324#endif
325
326/*===========================================================================*/
327/* MMC_SPI driver related settings. */
328/*===========================================================================*/
329
330/**
331 * @brief Delays insertions.
332 * @details If enabled this options inserts delays into the MMC waiting
333 * routines releasing some extra CPU time for the threads with
334 * lower priority, this may slow down the driver a bit however.
335 * This option is recommended also if the SPI driver does not
336 * use a DMA channel and heavily loads the CPU.
337 */
338#if !defined(MMC_NICE_WAITING) || defined(__DOXYGEN__)
339#define MMC_NICE_WAITING TRUE
340#endif
341
342/*===========================================================================*/
343/* SDC driver related settings. */
344/*===========================================================================*/
345
346/**
347 * @brief Number of initialization attempts before rejecting the card.
348 * @note Attempts are performed at 10mS intervals.
349 */
350#if !defined(SDC_INIT_RETRY) || defined(__DOXYGEN__)
351#define SDC_INIT_RETRY 100
352#endif
353
354/**
355 * @brief Include support for MMC cards.
356 * @note MMC support is not yet implemented so this option must be kept
357 * at @p FALSE.
358 */
359#if !defined(SDC_MMC_SUPPORT) || defined(__DOXYGEN__)
360#define SDC_MMC_SUPPORT FALSE
361#endif
362
363/**
364 * @brief Delays insertions.
365 * @details If enabled this options inserts delays into the MMC waiting
366 * routines releasing some extra CPU time for the threads with
367 * lower priority, this may slow down the driver a bit however.
368 */
369#if !defined(SDC_NICE_WAITING) || defined(__DOXYGEN__)
370#define SDC_NICE_WAITING TRUE
371#endif
372
373/**
374 * @brief OCR initialization constant for V20 cards.
375 */
376#if !defined(SDC_INIT_OCR_V20) || defined(__DOXYGEN__)
377#define SDC_INIT_OCR_V20 0x50FF8000U
378#endif
379
380/**
381 * @brief OCR initialization constant for non-V20 cards.
382 */
383#if !defined(SDC_INIT_OCR) || defined(__DOXYGEN__)
384#define SDC_INIT_OCR 0x80100000U
385#endif
386
387/*===========================================================================*/
388/* SERIAL driver related settings. */
389/*===========================================================================*/
390
391/**
392 * @brief Default bit rate.
393 * @details Configuration parameter, this is the baud rate selected for the
394 * default configuration.
395 */
396#if !defined(SERIAL_DEFAULT_BITRATE) || defined(__DOXYGEN__)
397#define SERIAL_DEFAULT_BITRATE 38400
398#endif
399
400/**
401 * @brief Serial buffers size.
402 * @details Configuration parameter, you can change the depth of the queue
403 * buffers depending on the requirements of your application.
404 * @note The default is 16 bytes for both the transmission and receive
405 * buffers.
406 */
407#if !defined(SERIAL_BUFFERS_SIZE) || defined(__DOXYGEN__)
408#define SERIAL_BUFFERS_SIZE 16
409#endif
410
411/*===========================================================================*/
412/* SERIAL_USB driver related setting. */
413/*===========================================================================*/
414
415/**
416 * @brief Serial over USB buffers size.
417 * @details Configuration parameter, the buffer size must be a multiple of
418 * the USB data endpoint maximum packet size.
419 * @note The default is 256 bytes for both the transmission and receive
420 * buffers.
421 */
422#if !defined(SERIAL_USB_BUFFERS_SIZE) || defined(__DOXYGEN__)
423#define SERIAL_USB_BUFFERS_SIZE 256
424#endif
425
426/**
427 * @brief Serial over USB number of buffers.
428 * @note The default is 2 buffers.
429 */
430#if !defined(SERIAL_USB_BUFFERS_NUMBER) || defined(__DOXYGEN__)
431#define SERIAL_USB_BUFFERS_NUMBER 2
432#endif
433
434/*===========================================================================*/
435/* SPI driver related settings. */
436/*===========================================================================*/
437
438/**
439 * @brief Enables synchronous APIs.
440 * @note Disabling this option saves both code and data space.
441 */
442#if !defined(SPI_USE_WAIT) || defined(__DOXYGEN__)
443#define SPI_USE_WAIT TRUE
444#endif
445
446/**
447 * @brief Enables circular transfers APIs.
448 * @note Disabling this option saves both code and data space.
449 */
450#if !defined(SPI_USE_CIRCULAR) || defined(__DOXYGEN__)
451#define SPI_USE_CIRCULAR FALSE
452#endif
453
454
455/**
456 * @brief Enables the @p spiAcquireBus() and @p spiReleaseBus() APIs.
457 * @note Disabling this option saves both code and data space.
458 */
459#if !defined(SPI_USE_MUTUAL_EXCLUSION) || defined(__DOXYGEN__)
460#define SPI_USE_MUTUAL_EXCLUSION TRUE
461#endif
462
463/**
464 * @brief Handling method for SPI CS line.
465 * @note Disabling this option saves both code and data space.
466 */
467#if !defined(SPI_SELECT_MODE) || defined(__DOXYGEN__)
468#define SPI_SELECT_MODE SPI_SELECT_MODE_PAD
469#endif
470
471/*===========================================================================*/
472/* UART driver related settings. */
473/*===========================================================================*/
474
475/**
476 * @brief Enables synchronous APIs.
477 * @note Disabling this option saves both code and data space.
478 */
479#if !defined(UART_USE_WAIT) || defined(__DOXYGEN__)
480#define UART_USE_WAIT FALSE
481#endif
482
483/**
484 * @brief Enables the @p uartAcquireBus() and @p uartReleaseBus() APIs.
485 * @note Disabling this option saves both code and data space.
486 */
487#if !defined(UART_USE_MUTUAL_EXCLUSION) || defined(__DOXYGEN__)
488#define UART_USE_MUTUAL_EXCLUSION FALSE
489#endif
490
491/*===========================================================================*/
492/* USB driver related settings. */
493/*===========================================================================*/
494
495/**
496 * @brief Enables synchronous APIs.
497 * @note Disabling this option saves both code and data space.
498 */
499#if !defined(USB_USE_WAIT) || defined(__DOXYGEN__)
500#define USB_USE_WAIT TRUE
501#endif
502
503/*===========================================================================*/
504/* WSPI driver related settings. */
505/*===========================================================================*/
506
507/**
508 * @brief Enables synchronous APIs.
509 * @note Disabling this option saves both code and data space.
510 */
511#if !defined(WSPI_USE_WAIT) || defined(__DOXYGEN__)
512#define WSPI_USE_WAIT TRUE
513#endif
514
515/**
516 * @brief Enables the @p wspiAcquireBus() and @p wspiReleaseBus() APIs.
517 * @note Disabling this option saves both code and data space.
518 */
519#if !defined(WSPI_USE_MUTUAL_EXCLUSION) || defined(__DOXYGEN__)
520#define WSPI_USE_MUTUAL_EXCLUSION TRUE
521#endif
522
523#endif /* HALCONF_H */
524
525/** @} */
diff --git a/keyboards/zvecr/zv48/f401/mcuconf.h b/keyboards/zvecr/zv48/f401/mcuconf.h
new file mode 100644
index 000000000..c0c96bc13
--- /dev/null
+++ b/keyboards/zvecr/zv48/f401/mcuconf.h
@@ -0,0 +1,253 @@
1/*
2 ChibiOS - Copyright (C) 2006..2018 Giovanni Di Sirio
3
4 Licensed under the Apache License, Version 2.0 (the "License");
5 you may not use this file except in compliance with the License.
6 You may obtain a copy of the License at
7
8 http://www.apache.org/licenses/LICENSE-2.0
9
10 Unless required by applicable law or agreed to in writing, software
11 distributed under the License is distributed on an "AS IS" BASIS,
12 WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
13 See the License for the specific language governing permissions and
14 limitations under the License.
15*/
16
17#ifndef MCUCONF_H
18#define MCUCONF_H
19
20/*
21 * STM32F4xx drivers configuration.
22 * The following settings override the default settings present in
23 * the various device driver implementation headers.
24 * Note that the settings for each driver only have effect if the whole
25 * driver is enabled in halconf.h.
26 *
27 * IRQ priorities:
28 * 15...0 Lowest...Highest.
29 *
30 * DMA priorities:
31 * 0...3 Lowest...Highest.
32 */
33
34#define STM32F4xx_MCUCONF
35
36/*
37 * HAL driver system settings.
38 */
39#define STM32_NO_INIT FALSE
40#define STM32_HSI_ENABLED TRUE
41#define STM32_LSI_ENABLED TRUE
42#define STM32_HSE_ENABLED TRUE
43#define STM32_LSE_ENABLED FALSE
44#define STM32_CLOCK48_REQUIRED TRUE
45#define STM32_SW STM32_SW_PLL
46#define STM32_PLLSRC STM32_PLLSRC_HSE
47#define STM32_PLLM_VALUE 25
48#define STM32_PLLN_VALUE 336
49#define STM32_PLLP_VALUE 4
50#define STM32_PLLQ_VALUE 7
51#define STM32_HPRE STM32_HPRE_DIV1
52#define STM32_PPRE1 STM32_PPRE1_DIV4
53#define STM32_PPRE2 STM32_PPRE2_DIV2
54#define STM32_RTCSEL STM32_RTCSEL_LSI
55#define STM32_RTCPRE_VALUE 8
56#define STM32_MCO1SEL STM32_MCO1SEL_HSI
57#define STM32_MCO1PRE STM32_MCO1PRE_DIV1
58#define STM32_MCO2SEL STM32_MCO2SEL_SYSCLK
59#define STM32_MCO2PRE STM32_MCO2PRE_DIV5
60#define STM32_I2SSRC STM32_I2SSRC_CKIN
61#define STM32_PLLI2SN_VALUE 192
62#define STM32_PLLI2SR_VALUE 5
63#define STM32_PVD_ENABLE FALSE
64#define STM32_PLS STM32_PLS_LEV0
65#define STM32_BKPRAM_ENABLE FALSE
66
67/*
68 * IRQ system settings.
69 */
70#define STM32_IRQ_EXTI0_PRIORITY 6
71#define STM32_IRQ_EXTI1_PRIORITY 6
72#define STM32_IRQ_EXTI2_PRIORITY 6
73#define STM32_IRQ_EXTI3_PRIORITY 6
74#define STM32_IRQ_EXTI4_PRIORITY 6
75#define STM32_IRQ_EXTI5_9_PRIORITY 6
76#define STM32_IRQ_EXTI10_15_PRIORITY 6
77#define STM32_IRQ_EXTI16_PRIORITY 6
78#define STM32_IRQ_EXTI17_PRIORITY 15
79#define STM32_IRQ_EXTI18_PRIORITY 6
80#define STM32_IRQ_EXTI19_PRIORITY 6
81#define STM32_IRQ_EXTI20_PRIORITY 6
82#define STM32_IRQ_EXTI21_PRIORITY 15
83#define STM32_IRQ_EXTI22_PRIORITY 15
84
85/*
86 * ADC driver system settings.
87 */
88#define STM32_ADC_ADCPRE ADC_CCR_ADCPRE_DIV4
89#define STM32_ADC_USE_ADC1 FALSE
90#define STM32_ADC_ADC1_DMA_STREAM STM32_DMA_STREAM_ID(2, 4)
91#define STM32_ADC_ADC1_DMA_PRIORITY 2
92#define STM32_ADC_IRQ_PRIORITY 6
93#define STM32_ADC_ADC1_DMA_IRQ_PRIORITY 6
94
95/*
96 * GPT driver system settings.
97 */
98#define STM32_GPT_USE_TIM1 FALSE
99#define STM32_GPT_USE_TIM2 FALSE
100#define STM32_GPT_USE_TIM3 FALSE
101#define STM32_GPT_USE_TIM4 FALSE
102#define STM32_GPT_USE_TIM5 FALSE
103#define STM32_GPT_USE_TIM9 FALSE
104#define STM32_GPT_USE_TIM11 FALSE
105#define STM32_GPT_TIM1_IRQ_PRIORITY 7
106#define STM32_GPT_TIM2_IRQ_PRIORITY 7
107#define STM32_GPT_TIM3_IRQ_PRIORITY 7
108#define STM32_GPT_TIM4_IRQ_PRIORITY 7
109#define STM32_GPT_TIM5_IRQ_PRIORITY 7
110#define STM32_GPT_TIM9_IRQ_PRIORITY 7
111#define STM32_GPT_TIM11_IRQ_PRIORITY 7
112
113/*
114 * I2C driver system settings.
115 */
116#define STM32_I2C_USE_I2C1 FALSE
117#define STM32_I2C_USE_I2C2 FALSE
118#define STM32_I2C_USE_I2C3 FALSE
119#define STM32_I2C_BUSY_TIMEOUT 50
120#define STM32_I2C_I2C1_RX_DMA_STREAM STM32_DMA_STREAM_ID(1, 0)
121#define STM32_I2C_I2C1_TX_DMA_STREAM STM32_DMA_STREAM_ID(1, 6)
122#define STM32_I2C_I2C2_RX_DMA_STREAM STM32_DMA_STREAM_ID(1, 2)
123#define STM32_I2C_I2C2_TX_DMA_STREAM STM32_DMA_STREAM_ID(1, 7)
124#define STM32_I2C_I2C3_RX_DMA_STREAM STM32_DMA_STREAM_ID(1, 2)
125#define STM32_I2C_I2C3_TX_DMA_STREAM STM32_DMA_STREAM_ID(1, 4)
126#define STM32_I2C_I2C1_IRQ_PRIORITY 5
127#define STM32_I2C_I2C2_IRQ_PRIORITY 5
128#define STM32_I2C_I2C3_IRQ_PRIORITY 5
129#define STM32_I2C_I2C1_DMA_PRIORITY 3
130#define STM32_I2C_I2C2_DMA_PRIORITY 3
131#define STM32_I2C_I2C3_DMA_PRIORITY 3
132#define STM32_I2C_DMA_ERROR_HOOK(i2cp) osalSysHalt("DMA failure")
133
134/*
135 * I2S driver system settings.
136 */
137#define STM32_I2S_USE_SPI2 FALSE
138#define STM32_I2S_USE_SPI3 FALSE
139#define STM32_I2S_SPI2_IRQ_PRIORITY 10
140#define STM32_I2S_SPI3_IRQ_PRIORITY 10
141#define STM32_I2S_SPI2_DMA_PRIORITY 1
142#define STM32_I2S_SPI3_DMA_PRIORITY 1
143#define STM32_I2S_SPI2_RX_DMA_STREAM STM32_DMA_STREAM_ID(1, 3)
144#define STM32_I2S_SPI2_TX_DMA_STREAM STM32_DMA_STREAM_ID(1, 4)
145#define STM32_I2S_SPI3_RX_DMA_STREAM STM32_DMA_STREAM_ID(1, 0)
146#define STM32_I2S_SPI3_TX_DMA_STREAM STM32_DMA_STREAM_ID(1, 7)
147#define STM32_I2S_DMA_ERROR_HOOK(i2sp) osalSysHalt("DMA failure")
148
149/*
150 * ICU driver system settings.
151 */
152#define STM32_ICU_USE_TIM1 FALSE
153#define STM32_ICU_USE_TIM2 FALSE
154#define STM32_ICU_USE_TIM3 FALSE
155#define STM32_ICU_USE_TIM4 FALSE
156#define STM32_ICU_USE_TIM5 FALSE
157#define STM32_ICU_USE_TIM9 FALSE
158#define STM32_ICU_TIM1_IRQ_PRIORITY 7
159#define STM32_ICU_TIM2_IRQ_PRIORITY 7
160#define STM32_ICU_TIM3_IRQ_PRIORITY 7
161#define STM32_ICU_TIM4_IRQ_PRIORITY 7
162#define STM32_ICU_TIM5_IRQ_PRIORITY 7
163#define STM32_ICU_TIM9_IRQ_PRIORITY 7
164
165/*
166 * PWM driver system settings.
167 */
168#define STM32_PWM_USE_ADVANCED FALSE
169#define STM32_PWM_USE_TIM1 FALSE
170#define STM32_PWM_USE_TIM2 FALSE
171#define STM32_PWM_USE_TIM3 TRUE
172#define STM32_PWM_USE_TIM4 FALSE
173#define STM32_PWM_USE_TIM5 FALSE
174#define STM32_PWM_USE_TIM9 FALSE
175#define STM32_PWM_TIM1_IRQ_PRIORITY 7
176#define STM32_PWM_TIM2_IRQ_PRIORITY 7
177#define STM32_PWM_TIM3_IRQ_PRIORITY 7
178#define STM32_PWM_TIM4_IRQ_PRIORITY 7
179#define STM32_PWM_TIM5_IRQ_PRIORITY 7
180#define STM32_PWM_TIM9_IRQ_PRIORITY 7
181
182/*
183 * SERIAL driver system settings.
184 */
185#define STM32_SERIAL_USE_USART1 TRUE
186#define STM32_SERIAL_USE_USART2 FALSE
187#define STM32_SERIAL_USE_USART6 FALSE
188#define STM32_SERIAL_USART1_PRIORITY 12
189#define STM32_SERIAL_USART2_PRIORITY 12
190#define STM32_SERIAL_USART6_PRIORITY 12
191
192/*
193 * SPI driver system settings.
194 */
195#define STM32_SPI_USE_SPI1 FALSE
196#define STM32_SPI_USE_SPI2 FALSE
197#define STM32_SPI_USE_SPI3 FALSE
198#define STM32_SPI_SPI1_RX_DMA_STREAM STM32_DMA_STREAM_ID(2, 0)
199#define STM32_SPI_SPI1_TX_DMA_STREAM STM32_DMA_STREAM_ID(2, 3)
200#define STM32_SPI_SPI2_RX_DMA_STREAM STM32_DMA_STREAM_ID(1, 3)
201#define STM32_SPI_SPI2_TX_DMA_STREAM STM32_DMA_STREAM_ID(1, 4)
202#define STM32_SPI_SPI3_RX_DMA_STREAM STM32_DMA_STREAM_ID(1, 0)
203#define STM32_SPI_SPI3_TX_DMA_STREAM STM32_DMA_STREAM_ID(1, 7)
204#define STM32_SPI_SPI1_DMA_PRIORITY 1
205#define STM32_SPI_SPI2_DMA_PRIORITY 1
206#define STM32_SPI_SPI3_DMA_PRIORITY 1
207#define STM32_SPI_SPI1_IRQ_PRIORITY 10
208#define STM32_SPI_SPI2_IRQ_PRIORITY 10
209#define STM32_SPI_SPI3_IRQ_PRIORITY 10
210#define STM32_SPI_DMA_ERROR_HOOK(spip) osalSysHalt("DMA failure")
211
212/*
213 * ST driver system settings.
214 */
215#define STM32_ST_IRQ_PRIORITY 8
216#define STM32_ST_USE_TIMER 2
217
218/*
219 * UART driver system settings.
220 */
221#define STM32_UART_USE_USART1 FALSE
222#define STM32_UART_USE_USART2 FALSE
223#define STM32_UART_USE_USART6 FALSE
224#define STM32_UART_USART1_RX_DMA_STREAM STM32_DMA_STREAM_ID(2, 5)
225#define STM32_UART_USART1_TX_DMA_STREAM STM32_DMA_STREAM_ID(2, 7)
226#define STM32_UART_USART2_RX_DMA_STREAM STM32_DMA_STREAM_ID(1, 5)
227#define STM32_UART_USART2_TX_DMA_STREAM STM32_DMA_STREAM_ID(1, 6)
228#define STM32_UART_USART6_RX_DMA_STREAM STM32_DMA_STREAM_ID(2, 2)
229#define STM32_UART_USART6_TX_DMA_STREAM STM32_DMA_STREAM_ID(2, 7)
230#define STM32_UART_USART1_IRQ_PRIORITY 12
231#define STM32_UART_USART2_IRQ_PRIORITY 12
232#define STM32_UART_USART6_IRQ_PRIORITY 12
233#define STM32_UART_USART1_DMA_PRIORITY 0
234#define STM32_UART_USART2_DMA_PRIORITY 0
235#define STM32_UART_USART6_DMA_PRIORITY 0
236#define STM32_UART_DMA_ERROR_HOOK(uartp) osalSysHalt("DMA failure")
237
238/*
239 * USB driver system settings.
240 */
241#define STM32_USB_USE_OTG1 TRUE
242#define STM32_USB_OTG1_IRQ_PRIORITY 14
243#define STM32_USB_OTG1_RX_FIFO_SIZE 512
244#define STM32_USB_OTG_THREAD_PRIO NORMALPRIO+1
245#define STM32_USB_OTG_THREAD_STACK_SIZE 128
246#define STM32_USB_OTGFIFO_FILL_BASEPRI 0
247
248/*
249 * WDG driver system settings.
250 */
251#define STM32_WDG_USE_IWDG FALSE
252
253#endif /* MCUCONF_H */
diff --git a/keyboards/zvecr/zv48/f401/rules.mk b/keyboards/zvecr/zv48/f401/rules.mk
new file mode 100644
index 000000000..e41d5ef7a
--- /dev/null
+++ b/keyboards/zvecr/zv48/f401/rules.mk
@@ -0,0 +1,27 @@
1## chip/board settings
2# the next two should match the directories in
3# <chibios>/os/hal/ports/$(MCU_FAMILY)/$(MCU_SERIES)
4MCU_FAMILY = STM32
5MCU_SERIES = STM32F4xx
6# linker script to use
7# it should exist either in <chibios>/os/common/ports/ARMCMx/compilers/GCC/ld/
8# or <this_dir>/ld/
9MCU_LDSCRIPT = STM32F401xC
10# startup code to use
11# is should exist in <chibios>/os/common/ports/ARMCMx/compilers/GCC/mk/
12MCU_STARTUP = stm32f4xx
13# it should exist either in <chibios>/os/hal/boards/
14# or <this_dir>/boards
15BOARD = BLACKPILL_STM32_F401
16# Cortex version
17# Teensy LC is cortex-m0; Teensy 3.x are cortex-m4
18MCU = cortex-m4
19# ARM version, CORTEX-M0/M1 are 6, CORTEX-M3/M4/M7 are 7
20ARMV = 7
21USE_FPU = yes
22# Address of the booloader in system memory
23STM32_BOOTLOADER_ADDRESS = 0x1FFF0000
24
25# Options to pass to dfu-util when flashing
26DFU_ARGS = -d 0483:df11 -a 0 -s 0x08000000:leave
27DFU_SUFFIX_ARGS = -v 0483 -p df11
diff --git a/keyboards/zvecr/zv48/f411/chconf.h b/keyboards/zvecr/zv48/f411/chconf.h
new file mode 100644
index 000000000..0b8b69b0e
--- /dev/null
+++ b/keyboards/zvecr/zv48/f411/chconf.h
@@ -0,0 +1,714 @@
1/*
2 ChibiOS - Copyright (C) 2006..2018 Giovanni Di Sirio
3
4 Licensed under the Apache License, Version 2.0 (the "License");
5 you may not use this file except in compliance with the License.
6 You may obtain a copy of the License at
7
8 http://www.apache.org/licenses/LICENSE-2.0
9
10 Unless required by applicable law or agreed to in writing, software
11 distributed under the License is distributed on an "AS IS" BASIS,
12 WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
13 See the License for the specific language governing permissions and
14 limitations under the License.
15*/
16
17/**
18 * @file rt/templates/chconf.h
19 * @brief Configuration file template.
20 * @details A copy of this file must be placed in each project directory, it
21 * contains the application specific kernel settings.
22 *
23 * @addtogroup config
24 * @details Kernel related settings and hooks.
25 * @{
26 */
27
28#ifndef CHCONF_H
29#define CHCONF_H
30
31#define _CHIBIOS_RT_CONF_
32#define _CHIBIOS_RT_CONF_VER_6_0_
33
34/*===========================================================================*/
35/**
36 * @name System timers settings
37 * @{
38 */
39/*===========================================================================*/
40
41/**
42 * @brief System time counter resolution.
43 * @note Allowed values are 16 or 32 bits.
44 */
45#if !defined(CH_CFG_ST_RESOLUTION)
46#define CH_CFG_ST_RESOLUTION 32
47#endif
48
49/**
50 * @brief System tick frequency.
51 * @details Frequency of the system timer that drives the system ticks. This
52 * setting also defines the system tick time unit.
53 */
54#if !defined(CH_CFG_ST_FREQUENCY)
55#define CH_CFG_ST_FREQUENCY 100000
56#endif
57
58/**
59 * @brief Time intervals data size.
60 * @note Allowed values are 16, 32 or 64 bits.
61 */
62#if !defined(CH_CFG_INTERVALS_SIZE)
63#define CH_CFG_INTERVALS_SIZE 32
64#endif
65
66/**
67 * @brief Time types data size.
68 * @note Allowed values are 16 or 32 bits.
69 */
70#if !defined(CH_CFG_TIME_TYPES_SIZE)
71#define CH_CFG_TIME_TYPES_SIZE 32
72#endif
73
74/**
75 * @brief Time delta constant for the tick-less mode.
76 * @note If this value is zero then the system uses the classic
77 * periodic tick. This value represents the minimum number
78 * of ticks that is safe to specify in a timeout directive.
79 * The value one is not valid, timeouts are rounded up to
80 * this value.
81 */
82#if !defined(CH_CFG_ST_TIMEDELTA)
83#define CH_CFG_ST_TIMEDELTA 2
84#endif
85
86/** @} */
87
88/*===========================================================================*/
89/**
90 * @name Kernel parameters and options
91 * @{
92 */
93/*===========================================================================*/
94
95/**
96 * @brief Round robin interval.
97 * @details This constant is the number of system ticks allowed for the
98 * threads before preemption occurs. Setting this value to zero
99 * disables the preemption for threads with equal priority and the
100 * round robin becomes cooperative. Note that higher priority
101 * threads can still preempt, the kernel is always preemptive.
102 * @note Disabling the round robin preemption makes the kernel more compact
103 * and generally faster.
104 * @note The round robin preemption is not supported in tickless mode and
105 * must be set to zero in that case.
106 */
107#if !defined(CH_CFG_TIME_QUANTUM)
108#define CH_CFG_TIME_QUANTUM 0
109#endif
110
111/**
112 * @brief Managed RAM size.
113 * @details Size of the RAM area to be managed by the OS. If set to zero
114 * then the whole available RAM is used. The core memory is made
115 * available to the heap allocator and/or can be used directly through
116 * the simplified core memory allocator.
117 *
118 * @note In order to let the OS manage the whole RAM the linker script must
119 * provide the @p __heap_base__ and @p __heap_end__ symbols.
120 * @note Requires @p CH_CFG_USE_MEMCORE.
121 */
122#if !defined(CH_CFG_MEMCORE_SIZE)
123#define CH_CFG_MEMCORE_SIZE 0
124#endif
125
126/**
127 * @brief Idle thread automatic spawn suppression.
128 * @details When this option is activated the function @p chSysInit()
129 * does not spawn the idle thread. The application @p main()
130 * function becomes the idle thread and must implement an
131 * infinite loop.
132 */
133#if !defined(CH_CFG_NO_IDLE_THREAD)
134#define CH_CFG_NO_IDLE_THREAD FALSE
135#endif
136
137/** @} */
138
139/*===========================================================================*/
140/**
141 * @name Performance options
142 * @{
143 */
144/*===========================================================================*/
145
146/**
147 * @brief OS optimization.
148 * @details If enabled then time efficient rather than space efficient code
149 * is used when two possible implementations exist.
150 *
151 * @note This is not related to the compiler optimization options.
152 * @note The default is @p TRUE.
153 */
154#if !defined(CH_CFG_OPTIMIZE_SPEED)
155#define CH_CFG_OPTIMIZE_SPEED TRUE
156#endif
157
158/** @} */
159
160/*===========================================================================*/
161/**
162 * @name Subsystem options
163 * @{
164 */
165/*===========================================================================*/
166
167/**
168 * @brief Time Measurement APIs.
169 * @details If enabled then the time measurement APIs are included in
170 * the kernel.
171 *
172 * @note The default is @p TRUE.
173 */
174#if !defined(CH_CFG_USE_TM)
175#define CH_CFG_USE_TM TRUE
176#endif
177
178/**
179 * @brief Threads registry APIs.
180 * @details If enabled then the registry APIs are included in the kernel.
181 *
182 * @note The default is @p TRUE.
183 */
184#if !defined(CH_CFG_USE_REGISTRY)
185#define CH_CFG_USE_REGISTRY TRUE
186#endif
187
188/**
189 * @brief Threads synchronization APIs.
190 * @details If enabled then the @p chThdWait() function is included in
191 * the kernel.
192 *
193 * @note The default is @p TRUE.
194 */
195#if !defined(CH_CFG_USE_WAITEXIT)
196#define CH_CFG_USE_WAITEXIT TRUE
197#endif
198
199/**
200 * @brief Semaphores APIs.
201 * @details If enabled then the Semaphores APIs are included in the kernel.
202 *
203 * @note The default is @p TRUE.
204 */
205#if !defined(CH_CFG_USE_SEMAPHORES)
206#define CH_CFG_USE_SEMAPHORES TRUE
207#endif
208
209/**
210 * @brief Semaphores queuing mode.
211 * @details If enabled then the threads are enqueued on semaphores by
212 * priority rather than in FIFO order.
213 *
214 * @note The default is @p FALSE. Enable this if you have special
215 * requirements.
216 * @note Requires @p CH_CFG_USE_SEMAPHORES.
217 */
218#if !defined(CH_CFG_USE_SEMAPHORES_PRIORITY)
219#define CH_CFG_USE_SEMAPHORES_PRIORITY FALSE
220#endif
221
222/**
223 * @brief Mutexes APIs.
224 * @details If enabled then the mutexes APIs are included in the kernel.
225 *
226 * @note The default is @p TRUE.
227 */
228#if !defined(CH_CFG_USE_MUTEXES)
229#define CH_CFG_USE_MUTEXES TRUE
230#endif
231
232/**
233 * @brief Enables recursive behavior on mutexes.
234 * @note Recursive mutexes are heavier and have an increased
235 * memory footprint.
236 *
237 * @note The default is @p FALSE.
238 * @note Requires @p CH_CFG_USE_MUTEXES.
239 */
240#if !defined(CH_CFG_USE_MUTEXES_RECURSIVE)
241#define CH_CFG_USE_MUTEXES_RECURSIVE FALSE
242#endif
243
244/**
245 * @brief Conditional Variables APIs.
246 * @details If enabled then the conditional variables APIs are included
247 * in the kernel.
248 *
249 * @note The default is @p TRUE.
250 * @note Requires @p CH_CFG_USE_MUTEXES.
251 */
252#if !defined(CH_CFG_USE_CONDVARS)
253#define CH_CFG_USE_CONDVARS TRUE
254#endif
255
256/**
257 * @brief Conditional Variables APIs with timeout.
258 * @details If enabled then the conditional variables APIs with timeout
259 * specification are included in the kernel.
260 *
261 * @note The default is @p TRUE.
262 * @note Requires @p CH_CFG_USE_CONDVARS.
263 */
264#if !defined(CH_CFG_USE_CONDVARS_TIMEOUT)
265#define CH_CFG_USE_CONDVARS_TIMEOUT TRUE
266#endif
267
268/**
269 * @brief Events Flags APIs.
270 * @details If enabled then the event flags APIs are included in the kernel.
271 *
272 * @note The default is @p TRUE.
273 */
274#if !defined(CH_CFG_USE_EVENTS)
275#define CH_CFG_USE_EVENTS TRUE
276#endif
277
278/**
279 * @brief Events Flags APIs with timeout.
280 * @details If enabled then the events APIs with timeout specification
281 * are included in the kernel.
282 *
283 * @note The default is @p TRUE.
284 * @note Requires @p CH_CFG_USE_EVENTS.
285 */
286#if !defined(CH_CFG_USE_EVENTS_TIMEOUT)
287#define CH_CFG_USE_EVENTS_TIMEOUT TRUE
288#endif
289
290/**
291 * @brief Synchronous Messages APIs.
292 * @details If enabled then the synchronous messages APIs are included
293 * in the kernel.
294 *
295 * @note The default is @p TRUE.
296 */
297#if !defined(CH_CFG_USE_MESSAGES)
298#define CH_CFG_USE_MESSAGES TRUE
299#endif
300
301/**
302 * @brief Synchronous Messages queuing mode.
303 * @details If enabled then messages are served by priority rather than in
304 * FIFO order.
305 *
306 * @note The default is @p FALSE. Enable this if you have special
307 * requirements.
308 * @note Requires @p CH_CFG_USE_MESSAGES.
309 */
310#if !defined(CH_CFG_USE_MESSAGES_PRIORITY)
311#define CH_CFG_USE_MESSAGES_PRIORITY FALSE
312#endif
313
314/**
315 * @brief Mailboxes APIs.
316 * @details If enabled then the asynchronous messages (mailboxes) APIs are
317 * included in the kernel.
318 *
319 * @note The default is @p TRUE.
320 * @note Requires @p CH_CFG_USE_SEMAPHORES.
321 */
322#if !defined(CH_CFG_USE_MAILBOXES)
323#define CH_CFG_USE_MAILBOXES TRUE
324#endif
325
326/**
327 * @brief Core Memory Manager APIs.
328 * @details If enabled then the core memory manager APIs are included
329 * in the kernel.
330 *
331 * @note The default is @p TRUE.
332 */
333#if !defined(CH_CFG_USE_MEMCORE)
334#define CH_CFG_USE_MEMCORE TRUE
335#endif
336
337/**
338 * @brief Heap Allocator APIs.
339 * @details If enabled then the memory heap allocator APIs are included
340 * in the kernel.
341 *
342 * @note The default is @p TRUE.
343 * @note Requires @p CH_CFG_USE_MEMCORE and either @p CH_CFG_USE_MUTEXES or
344 * @p CH_CFG_USE_SEMAPHORES.
345 * @note Mutexes are recommended.
346 */
347#if !defined(CH_CFG_USE_HEAP)
348#define CH_CFG_USE_HEAP TRUE
349#endif
350
351/**
352 * @brief Memory Pools Allocator APIs.
353 * @details If enabled then the memory pools allocator APIs are included
354 * in the kernel.
355 *
356 * @note The default is @p TRUE.
357 */
358#if !defined(CH_CFG_USE_MEMPOOLS)
359#define CH_CFG_USE_MEMPOOLS TRUE
360#endif
361
362/**
363 * @brief Objects FIFOs APIs.
364 * @details If enabled then the objects FIFOs APIs are included
365 * in the kernel.
366 *
367 * @note The default is @p TRUE.
368 */
369#if !defined(CH_CFG_USE_OBJ_FIFOS)
370#define CH_CFG_USE_OBJ_FIFOS TRUE
371#endif
372
373/**
374 * @brief Pipes APIs.
375 * @details If enabled then the pipes APIs are included
376 * in the kernel.
377 *
378 * @note The default is @p TRUE.
379 */
380#if !defined(CH_CFG_USE_PIPES)
381#define CH_CFG_USE_PIPES TRUE
382#endif
383
384/**
385 * @brief Dynamic Threads APIs.
386 * @details If enabled then the dynamic threads creation APIs are included
387 * in the kernel.
388 *
389 * @note The default is @p TRUE.
390 * @note Requires @p CH_CFG_USE_WAITEXIT.
391 * @note Requires @p CH_CFG_USE_HEAP and/or @p CH_CFG_USE_MEMPOOLS.
392 */
393#if !defined(CH_CFG_USE_DYNAMIC)
394#define CH_CFG_USE_DYNAMIC TRUE
395#endif
396
397/** @} */
398
399/*===========================================================================*/
400/**
401 * @name Objects factory options
402 * @{
403 */
404/*===========================================================================*/
405
406/**
407 * @brief Objects Factory APIs.
408 * @details If enabled then the objects factory APIs are included in the
409 * kernel.
410 *
411 * @note The default is @p FALSE.
412 */
413#if !defined(CH_CFG_USE_FACTORY)
414#define CH_CFG_USE_FACTORY TRUE
415#endif
416
417/**
418 * @brief Maximum length for object names.
419 * @details If the specified length is zero then the name is stored by
420 * pointer but this could have unintended side effects.
421 */
422#if !defined(CH_CFG_FACTORY_MAX_NAMES_LENGTH)
423#define CH_CFG_FACTORY_MAX_NAMES_LENGTH 8
424#endif
425
426/**
427 * @brief Enables the registry of generic objects.
428 */
429#if !defined(CH_CFG_FACTORY_OBJECTS_REGISTRY)
430#define CH_CFG_FACTORY_OBJECTS_REGISTRY TRUE
431#endif
432
433/**
434 * @brief Enables factory for generic buffers.
435 */
436#if !defined(CH_CFG_FACTORY_GENERIC_BUFFERS)
437#define CH_CFG_FACTORY_GENERIC_BUFFERS TRUE
438#endif
439
440/**
441 * @brief Enables factory for semaphores.
442 */
443#if !defined(CH_CFG_FACTORY_SEMAPHORES)
444#define CH_CFG_FACTORY_SEMAPHORES TRUE
445#endif
446
447/**
448 * @brief Enables factory for mailboxes.
449 */
450#if !defined(CH_CFG_FACTORY_MAILBOXES)
451#define CH_CFG_FACTORY_MAILBOXES TRUE
452#endif
453
454/**
455 * @brief Enables factory for objects FIFOs.
456 */
457#if !defined(CH_CFG_FACTORY_OBJ_FIFOS)
458#define CH_CFG_FACTORY_OBJ_FIFOS TRUE
459#endif
460
461/**
462 * @brief Enables factory for Pipes.
463 */
464#if !defined(CH_CFG_FACTORY_PIPES) || defined(__DOXYGEN__)
465#define CH_CFG_FACTORY_PIPES TRUE
466#endif
467
468/** @} */
469
470/*===========================================================================*/
471/**
472 * @name Debug options
473 * @{
474 */
475/*===========================================================================*/
476
477/**
478 * @brief Debug option, kernel statistics.
479 *
480 * @note The default is @p FALSE.
481 */
482#if !defined(CH_DBG_STATISTICS)
483#define CH_DBG_STATISTICS FALSE
484#endif
485
486/**
487 * @brief Debug option, system state check.
488 * @details If enabled the correct call protocol for system APIs is checked
489 * at runtime.
490 *
491 * @note The default is @p FALSE.
492 */
493#if !defined(CH_DBG_SYSTEM_STATE_CHECK)
494#define CH_DBG_SYSTEM_STATE_CHECK FALSE
495#endif
496
497/**
498 * @brief Debug option, parameters checks.
499 * @details If enabled then the checks on the API functions input
500 * parameters are activated.
501 *
502 * @note The default is @p FALSE.
503 */
504#if !defined(CH_DBG_ENABLE_CHECKS)
505#define CH_DBG_ENABLE_CHECKS FALSE
506#endif
507
508/**
509 * @brief Debug option, consistency checks.
510 * @details If enabled then all the assertions in the kernel code are
511 * activated. This includes consistency checks inside the kernel,
512 * runtime anomalies and port-defined checks.
513 *
514 * @note The default is @p FALSE.
515 */
516#if !defined(CH_DBG_ENABLE_ASSERTS)
517#define CH_DBG_ENABLE_ASSERTS FALSE
518#endif
519
520/**
521 * @brief Debug option, trace buffer.
522 * @details If enabled then the trace buffer is activated.
523 *
524 * @note The default is @p CH_DBG_TRACE_MASK_DISABLED.
525 */
526#if !defined(CH_DBG_TRACE_MASK)
527#define CH_DBG_TRACE_MASK CH_DBG_TRACE_MASK_DISABLED
528#endif
529
530/**
531 * @brief Trace buffer entries.
532 * @note The trace buffer is only allocated if @p CH_DBG_TRACE_MASK is
533 * different from @p CH_DBG_TRACE_MASK_DISABLED.
534 */
535#if !defined(CH_DBG_TRACE_BUFFER_SIZE)
536#define CH_DBG_TRACE_BUFFER_SIZE 128
537#endif
538
539/**
540 * @brief Debug option, stack checks.
541 * @details If enabled then a runtime stack check is performed.
542 *
543 * @note The default is @p FALSE.
544 * @note The stack check is performed in a architecture/port dependent way.
545 * It may not be implemented or some ports.
546 * @note The default failure mode is to halt the system with the global
547 * @p panic_msg variable set to @p NULL.
548 */
549#if !defined(CH_DBG_ENABLE_STACK_CHECK)
550#define CH_DBG_ENABLE_STACK_CHECK FALSE
551#endif
552
553/**
554 * @brief Debug option, stacks initialization.
555 * @details If enabled then the threads working area is filled with a byte
556 * value when a thread is created. This can be useful for the
557 * runtime measurement of the used stack.
558 *
559 * @note The default is @p FALSE.
560 */
561#if !defined(CH_DBG_FILL_THREADS)
562#define CH_DBG_FILL_THREADS FALSE
563#endif
564
565/**
566 * @brief Debug option, threads profiling.
567 * @details If enabled then a field is added to the @p thread_t structure that
568 * counts the system ticks occurred while executing the thread.
569 *
570 * @note The default is @p FALSE.
571 * @note This debug option is not currently compatible with the
572 * tickless mode.
573 */
574#if !defined(CH_DBG_THREADS_PROFILING)
575#define CH_DBG_THREADS_PROFILING FALSE
576#endif
577
578/** @} */
579
580/*===========================================================================*/
581/**
582 * @name Kernel hooks
583 * @{
584 */
585/*===========================================================================*/
586
587/**
588 * @brief System structure extension.
589 * @details User fields added to the end of the @p ch_system_t structure.
590 */
591#define CH_CFG_SYSTEM_EXTRA_FIELDS \
592 /* Add threads custom fields here.*/
593
594/**
595 * @brief System initialization hook.
596 * @details User initialization code added to the @p chSysInit() function
597 * just before interrupts are enabled globally.
598 */
599#define CH_CFG_SYSTEM_INIT_HOOK() { \
600 /* Add threads initialization code here.*/ \
601}
602
603/**
604 * @brief Threads descriptor structure extension.
605 * @details User fields added to the end of the @p thread_t structure.
606 */
607#define CH_CFG_THREAD_EXTRA_FIELDS \
608 /* Add threads custom fields here.*/
609
610/**
611 * @brief Threads initialization hook.
612 * @details User initialization code added to the @p _thread_init() function.
613 *
614 * @note It is invoked from within @p _thread_init() and implicitly from all
615 * the threads creation APIs.
616 */
617#define CH_CFG_THREAD_INIT_HOOK(tp) { \
618 /* Add threads initialization code here.*/ \
619}
620
621/**
622 * @brief Threads finalization hook.
623 * @details User finalization code added to the @p chThdExit() API.
624 */
625#define CH_CFG_THREAD_EXIT_HOOK(tp) { \
626 /* Add threads finalization code here.*/ \
627}
628
629/**
630 * @brief Context switch hook.
631 * @details This hook is invoked just before switching between threads.
632 */
633#define CH_CFG_CONTEXT_SWITCH_HOOK(ntp, otp) { \
634 /* Context switch code here.*/ \
635}
636
637/**
638 * @brief ISR enter hook.
639 */
640#define CH_CFG_IRQ_PROLOGUE_HOOK() { \
641 /* IRQ prologue code here.*/ \
642}
643
644/**
645 * @brief ISR exit hook.
646 */
647#define CH_CFG_IRQ_EPILOGUE_HOOK() { \
648 /* IRQ epilogue code here.*/ \
649}
650
651/**
652 * @brief Idle thread enter hook.
653 * @note This hook is invoked within a critical zone, no OS functions
654 * should be invoked from here.
655 * @note This macro can be used to activate a power saving mode.
656 */
657#define CH_CFG_IDLE_ENTER_HOOK() { \
658 /* Idle-enter code here.*/ \
659}
660
661/**
662 * @brief Idle thread leave hook.
663 * @note This hook is invoked within a critical zone, no OS functions
664 * should be invoked from here.
665 * @note This macro can be used to deactivate a power saving mode.
666 */
667#define CH_CFG_IDLE_LEAVE_HOOK() { \
668 /* Idle-leave code here.*/ \
669}
670
671/**
672 * @brief Idle Loop hook.
673 * @details This hook is continuously invoked by the idle thread loop.
674 */
675#define CH_CFG_IDLE_LOOP_HOOK() { \
676 /* Idle loop code here.*/ \
677}
678
679/**
680 * @brief System tick event hook.
681 * @details This hook is invoked in the system tick handler immediately
682 * after processing the virtual timers queue.
683 */
684#define CH_CFG_SYSTEM_TICK_HOOK() { \
685 /* System tick event code here.*/ \
686}
687
688/**
689 * @brief System halt hook.
690 * @details This hook is invoked in case to a system halting error before
691 * the system is halted.
692 */
693#define CH_CFG_SYSTEM_HALT_HOOK(reason) { \
694 /* System halt code here.*/ \
695}
696
697/**
698 * @brief Trace hook.
699 * @details This hook is invoked each time a new record is written in the
700 * trace buffer.
701 */
702#define CH_CFG_TRACE_HOOK(tep) { \
703 /* Trace code here.*/ \
704}
705
706/** @} */
707
708/*===========================================================================*/
709/* Port-specific settings (override port settings defaulted in chcore.h). */
710/*===========================================================================*/
711
712#endif /* CHCONF_H */
713
714/** @} */
diff --git a/keyboards/zvecr/zv48/f411/halconf.h b/keyboards/zvecr/zv48/f411/halconf.h
new file mode 100644
index 000000000..1f8df5dbb
--- /dev/null
+++ b/keyboards/zvecr/zv48/f411/halconf.h
@@ -0,0 +1,525 @@
1/*
2 ChibiOS - Copyright (C) 2006..2018 Giovanni Di Sirio
3
4 Licensed under the Apache License, Version 2.0 (the "License");
5 you may not use this file except in compliance with the License.
6 You may obtain a copy of the License at
7
8 http://www.apache.org/licenses/LICENSE-2.0
9
10 Unless required by applicable law or agreed to in writing, software
11 distributed under the License is distributed on an "AS IS" BASIS,
12 WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
13 See the License for the specific language governing permissions and
14 limitations under the License.
15*/
16
17/**
18 * @file templates/halconf.h
19 * @brief HAL configuration header.
20 * @details HAL configuration file, this file allows to enable or disable the
21 * various device drivers from your application. You may also use
22 * this file in order to override the device drivers default settings.
23 *
24 * @addtogroup HAL_CONF
25 * @{
26 */
27
28#ifndef HALCONF_H
29#define HALCONF_H
30
31#define _CHIBIOS_HAL_CONF_
32#define _CHIBIOS_HAL_CONF_VER_7_0_
33
34#include "mcuconf.h"
35
36/**
37 * @brief Enables the PAL subsystem.
38 */
39#if !defined(HAL_USE_PAL) || defined(__DOXYGEN__)
40#define HAL_USE_PAL TRUE
41#endif
42
43/**
44 * @brief Enables the ADC subsystem.
45 */
46#if !defined(HAL_USE_ADC) || defined(__DOXYGEN__)
47#define HAL_USE_ADC FALSE
48#endif
49
50/**
51 * @brief Enables the CAN subsystem.
52 */
53#if !defined(HAL_USE_CAN) || defined(__DOXYGEN__)
54#define HAL_USE_CAN FALSE
55#endif
56
57/**
58 * @brief Enables the cryptographic subsystem.
59 */
60#if !defined(HAL_USE_CRY) || defined(__DOXYGEN__)
61#define HAL_USE_CRY FALSE
62#endif
63
64/**
65 * @brief Enables the DAC subsystem.
66 */
67#if !defined(HAL_USE_DAC) || defined(__DOXYGEN__)
68#define HAL_USE_DAC FALSE
69#endif
70
71/**
72 * @brief Enables the GPT subsystem.
73 */
74#if !defined(HAL_USE_GPT) || defined(__DOXYGEN__)
75#define HAL_USE_GPT FALSE
76#endif
77
78/**
79 * @brief Enables the I2C subsystem.
80 */
81#if !defined(HAL_USE_I2C) || defined(__DOXYGEN__)
82#define HAL_USE_I2C FALSE
83#endif
84
85/**
86 * @brief Enables the I2S subsystem.
87 */
88#if !defined(HAL_USE_I2S) || defined(__DOXYGEN__)
89#define HAL_USE_I2S FALSE
90#endif
91
92/**
93 * @brief Enables the ICU subsystem.
94 */
95#if !defined(HAL_USE_ICU) || defined(__DOXYGEN__)
96#define HAL_USE_ICU FALSE
97#endif
98
99/**
100 * @brief Enables the MAC subsystem.
101 */
102#if !defined(HAL_USE_MAC) || defined(__DOXYGEN__)
103#define HAL_USE_MAC FALSE
104#endif
105
106/**
107 * @brief Enables the MMC_SPI subsystem.
108 */
109#if !defined(HAL_USE_MMC_SPI) || defined(__DOXYGEN__)
110#define HAL_USE_MMC_SPI FALSE
111#endif
112
113/**
114 * @brief Enables the PWM subsystem.
115 */
116#if !defined(HAL_USE_PWM) || defined(__DOXYGEN__)
117#define HAL_USE_PWM TRUE
118#endif
119
120/**
121 * @brief Enables the RTC subsystem.
122 */
123#if !defined(HAL_USE_RTC) || defined(__DOXYGEN__)
124#define HAL_USE_RTC FALSE
125#endif
126
127/**
128 * @brief Enables the SDC subsystem.
129 */
130#if !defined(HAL_USE_SDC) || defined(__DOXYGEN__)
131#define HAL_USE_SDC FALSE
132#endif
133
134/**
135 * @brief Enables the SERIAL subsystem.
136 */
137#if !defined(HAL_USE_SERIAL) || defined(__DOXYGEN__)
138#define HAL_USE_SERIAL TRUE
139#endif
140
141/**
142 * @brief Enables the SERIAL over USB subsystem.
143 */
144#if !defined(HAL_USE_SERIAL_USB) || defined(__DOXYGEN__)
145#define HAL_USE_SERIAL_USB FALSE
146#endif
147
148/**
149 * @brief Enables the SIO subsystem.
150 */
151#if !defined(HAL_USE_SIO) || defined(__DOXYGEN__)
152#define HAL_USE_SIO FALSE
153#endif
154
155/**
156 * @brief Enables the SPI subsystem.
157 */
158#if !defined(HAL_USE_SPI) || defined(__DOXYGEN__)
159#define HAL_USE_SPI FALSE
160#endif
161
162/**
163 * @brief Enables the TRNG subsystem.
164 */
165#if !defined(HAL_USE_TRNG) || defined(__DOXYGEN__)
166#define HAL_USE_TRNG FALSE
167#endif
168
169/**
170 * @brief Enables the UART subsystem.
171 */
172#if !defined(HAL_USE_UART) || defined(__DOXYGEN__)
173#define HAL_USE_UART FALSE
174#endif
175
176/**
177 * @brief Enables the USB subsystem.
178 */
179#if !defined(HAL_USE_USB) || defined(__DOXYGEN__)
180#define HAL_USE_USB TRUE
181#endif
182
183/**
184 * @brief Enables the WDG subsystem.
185 */
186#if !defined(HAL_USE_WDG) || defined(__DOXYGEN__)
187#define HAL_USE_WDG FALSE
188#endif
189
190/**
191 * @brief Enables the WSPI subsystem.
192 */
193#if !defined(HAL_USE_WSPI) || defined(__DOXYGEN__)
194#define HAL_USE_WSPI FALSE
195#endif
196
197/*===========================================================================*/
198/* PAL driver related settings. */
199/*===========================================================================*/
200
201/**
202 * @brief Enables synchronous APIs.
203 * @note Disabling this option saves both code and data space.
204 */
205#if !defined(PAL_USE_CALLBACKS) || defined(__DOXYGEN__)
206#define PAL_USE_CALLBACKS FALSE
207#endif
208
209/**
210 * @brief Enables synchronous APIs.
211 * @note Disabling this option saves both code and data space.
212 */
213#if !defined(PAL_USE_WAIT) || defined(__DOXYGEN__)
214#define PAL_USE_WAIT FALSE
215#endif
216
217/*===========================================================================*/
218/* ADC driver related settings. */
219/*===========================================================================*/
220
221/**
222 * @brief Enables synchronous APIs.
223 * @note Disabling this option saves both code and data space.
224 */
225#if !defined(ADC_USE_WAIT) || defined(__DOXYGEN__)
226#define ADC_USE_WAIT TRUE
227#endif
228
229/**
230 * @brief Enables the @p adcAcquireBus() and @p adcReleaseBus() APIs.
231 * @note Disabling this option saves both code and data space.
232 */
233#if !defined(ADC_USE_MUTUAL_EXCLUSION) || defined(__DOXYGEN__)
234#define ADC_USE_MUTUAL_EXCLUSION TRUE
235#endif
236
237/*===========================================================================*/
238/* CAN driver related settings. */
239/*===========================================================================*/
240
241/**
242 * @brief Sleep mode related APIs inclusion switch.
243 */
244#if !defined(CAN_USE_SLEEP_MODE) || defined(__DOXYGEN__)
245#define CAN_USE_SLEEP_MODE TRUE
246#endif
247
248/**
249 * @brief Enforces the driver to use direct callbacks rather than OSAL events.
250 */
251#if !defined(CAN_ENFORCE_USE_CALLBACKS) || defined(__DOXYGEN__)
252#define CAN_ENFORCE_USE_CALLBACKS FALSE
253#endif
254
255/*===========================================================================*/
256/* CRY driver related settings. */
257/*===========================================================================*/
258
259/**
260 * @brief Enables the SW fall-back of the cryptographic driver.
261 * @details When enabled, this option, activates a fall-back software
262 * implementation for algorithms not supported by the underlying
263 * hardware.
264 * @note Fall-back implementations may not be present for all algorithms.
265 */
266#if !defined(HAL_CRY_USE_FALLBACK) || defined(__DOXYGEN__)
267#define HAL_CRY_USE_FALLBACK FALSE
268#endif
269
270/**
271 * @brief Makes the driver forcibly use the fall-back implementations.
272 */
273#if !defined(HAL_CRY_ENFORCE_FALLBACK) || defined(__DOXYGEN__)
274#define HAL_CRY_ENFORCE_FALLBACK FALSE
275#endif
276
277/*===========================================================================*/
278/* DAC driver related settings. */
279/*===========================================================================*/
280
281/**
282 * @brief Enables synchronous APIs.
283 * @note Disabling this option saves both code and data space.
284 */
285#if !defined(DAC_USE_WAIT) || defined(__DOXYGEN__)
286#define DAC_USE_WAIT TRUE
287#endif
288
289/**
290 * @brief Enables the @p dacAcquireBus() and @p dacReleaseBus() APIs.
291 * @note Disabling this option saves both code and data space.
292 */
293#if !defined(DAC_USE_MUTUAL_EXCLUSION) || defined(__DOXYGEN__)
294#define DAC_USE_MUTUAL_EXCLUSION TRUE
295#endif
296
297/*===========================================================================*/
298/* I2C driver related settings. */
299/*===========================================================================*/
300
301/**
302 * @brief Enables the mutual exclusion APIs on the I2C bus.
303 */
304#if !defined(I2C_USE_MUTUAL_EXCLUSION) || defined(__DOXYGEN__)
305#define I2C_USE_MUTUAL_EXCLUSION TRUE
306#endif
307
308/*===========================================================================*/
309/* MAC driver related settings. */
310/*===========================================================================*/
311
312/**
313 * @brief Enables the zero-copy API.
314 */
315#if !defined(MAC_USE_ZERO_COPY) || defined(__DOXYGEN__)
316#define MAC_USE_ZERO_COPY FALSE
317#endif
318
319/**
320 * @brief Enables an event sources for incoming packets.
321 */
322#if !defined(MAC_USE_EVENTS) || defined(__DOXYGEN__)
323#define MAC_USE_EVENTS TRUE
324#endif
325
326/*===========================================================================*/
327/* MMC_SPI driver related settings. */
328/*===========================================================================*/
329
330/**
331 * @brief Delays insertions.
332 * @details If enabled this options inserts delays into the MMC waiting
333 * routines releasing some extra CPU time for the threads with
334 * lower priority, this may slow down the driver a bit however.
335 * This option is recommended also if the SPI driver does not
336 * use a DMA channel and heavily loads the CPU.
337 */
338#if !defined(MMC_NICE_WAITING) || defined(__DOXYGEN__)
339#define MMC_NICE_WAITING TRUE
340#endif
341
342/*===========================================================================*/
343/* SDC driver related settings. */
344/*===========================================================================*/
345
346/**
347 * @brief Number of initialization attempts before rejecting the card.
348 * @note Attempts are performed at 10mS intervals.
349 */
350#if !defined(SDC_INIT_RETRY) || defined(__DOXYGEN__)
351#define SDC_INIT_RETRY 100
352#endif
353
354/**
355 * @brief Include support for MMC cards.
356 * @note MMC support is not yet implemented so this option must be kept
357 * at @p FALSE.
358 */
359#if !defined(SDC_MMC_SUPPORT) || defined(__DOXYGEN__)
360#define SDC_MMC_SUPPORT FALSE
361#endif
362
363/**
364 * @brief Delays insertions.
365 * @details If enabled this options inserts delays into the MMC waiting
366 * routines releasing some extra CPU time for the threads with
367 * lower priority, this may slow down the driver a bit however.
368 */
369#if !defined(SDC_NICE_WAITING) || defined(__DOXYGEN__)
370#define SDC_NICE_WAITING TRUE
371#endif
372
373/**
374 * @brief OCR initialization constant for V20 cards.
375 */
376#if !defined(SDC_INIT_OCR_V20) || defined(__DOXYGEN__)
377#define SDC_INIT_OCR_V20 0x50FF8000U
378#endif
379
380/**
381 * @brief OCR initialization constant for non-V20 cards.
382 */
383#if !defined(SDC_INIT_OCR) || defined(__DOXYGEN__)
384#define SDC_INIT_OCR 0x80100000U
385#endif
386
387/*===========================================================================*/
388/* SERIAL driver related settings. */
389/*===========================================================================*/
390
391/**
392 * @brief Default bit rate.
393 * @details Configuration parameter, this is the baud rate selected for the
394 * default configuration.
395 */
396#if !defined(SERIAL_DEFAULT_BITRATE) || defined(__DOXYGEN__)
397#define SERIAL_DEFAULT_BITRATE 38400
398#endif
399
400/**
401 * @brief Serial buffers size.
402 * @details Configuration parameter, you can change the depth of the queue
403 * buffers depending on the requirements of your application.
404 * @note The default is 16 bytes for both the transmission and receive
405 * buffers.
406 */
407#if !defined(SERIAL_BUFFERS_SIZE) || defined(__DOXYGEN__)
408#define SERIAL_BUFFERS_SIZE 16
409#endif
410
411/*===========================================================================*/
412/* SERIAL_USB driver related setting. */
413/*===========================================================================*/
414
415/**
416 * @brief Serial over USB buffers size.
417 * @details Configuration parameter, the buffer size must be a multiple of
418 * the USB data endpoint maximum packet size.
419 * @note The default is 256 bytes for both the transmission and receive
420 * buffers.
421 */
422#if !defined(SERIAL_USB_BUFFERS_SIZE) || defined(__DOXYGEN__)
423#define SERIAL_USB_BUFFERS_SIZE 256
424#endif
425
426/**
427 * @brief Serial over USB number of buffers.
428 * @note The default is 2 buffers.
429 */
430#if !defined(SERIAL_USB_BUFFERS_NUMBER) || defined(__DOXYGEN__)
431#define SERIAL_USB_BUFFERS_NUMBER 2
432#endif
433
434/*===========================================================================*/
435/* SPI driver related settings. */
436/*===========================================================================*/
437
438/**
439 * @brief Enables synchronous APIs.
440 * @note Disabling this option saves both code and data space.
441 */
442#if !defined(SPI_USE_WAIT) || defined(__DOXYGEN__)
443#define SPI_USE_WAIT TRUE
444#endif
445
446/**
447 * @brief Enables circular transfers APIs.
448 * @note Disabling this option saves both code and data space.
449 */
450#if !defined(SPI_USE_CIRCULAR) || defined(__DOXYGEN__)
451#define SPI_USE_CIRCULAR FALSE
452#endif
453
454
455/**
456 * @brief Enables the @p spiAcquireBus() and @p spiReleaseBus() APIs.
457 * @note Disabling this option saves both code and data space.
458 */
459#if !defined(SPI_USE_MUTUAL_EXCLUSION) || defined(__DOXYGEN__)
460#define SPI_USE_MUTUAL_EXCLUSION TRUE
461#endif
462
463/**
464 * @brief Handling method for SPI CS line.
465 * @note Disabling this option saves both code and data space.
466 */
467#if !defined(SPI_SELECT_MODE) || defined(__DOXYGEN__)
468#define SPI_SELECT_MODE SPI_SELECT_MODE_PAD
469#endif
470
471/*===========================================================================*/
472/* UART driver related settings. */
473/*===========================================================================*/
474
475/**
476 * @brief Enables synchronous APIs.
477 * @note Disabling this option saves both code and data space.
478 */
479#if !defined(UART_USE_WAIT) || defined(__DOXYGEN__)
480#define UART_USE_WAIT FALSE
481#endif
482
483/**
484 * @brief Enables the @p uartAcquireBus() and @p uartReleaseBus() APIs.
485 * @note Disabling this option saves both code and data space.
486 */
487#if !defined(UART_USE_MUTUAL_EXCLUSION) || defined(__DOXYGEN__)
488#define UART_USE_MUTUAL_EXCLUSION FALSE
489#endif
490
491/*===========================================================================*/
492/* USB driver related settings. */
493/*===========================================================================*/
494
495/**
496 * @brief Enables synchronous APIs.
497 * @note Disabling this option saves both code and data space.
498 */
499#if !defined(USB_USE_WAIT) || defined(__DOXYGEN__)
500#define USB_USE_WAIT TRUE
501#endif
502
503/*===========================================================================*/
504/* WSPI driver related settings. */
505/*===========================================================================*/
506
507/**
508 * @brief Enables synchronous APIs.
509 * @note Disabling this option saves both code and data space.
510 */
511#if !defined(WSPI_USE_WAIT) || defined(__DOXYGEN__)
512#define WSPI_USE_WAIT TRUE
513#endif
514
515/**
516 * @brief Enables the @p wspiAcquireBus() and @p wspiReleaseBus() APIs.
517 * @note Disabling this option saves both code and data space.
518 */
519#if !defined(WSPI_USE_MUTUAL_EXCLUSION) || defined(__DOXYGEN__)
520#define WSPI_USE_MUTUAL_EXCLUSION TRUE
521#endif
522
523#endif /* HALCONF_H */
524
525/** @} */
diff --git a/keyboards/zvecr/zv48/f411/mcuconf.h b/keyboards/zvecr/zv48/f411/mcuconf.h
new file mode 100644
index 000000000..f3a017731
--- /dev/null
+++ b/keyboards/zvecr/zv48/f411/mcuconf.h
@@ -0,0 +1,253 @@
1/*
2 ChibiOS - Copyright (C) 2006..2018 Giovanni Di Sirio
3
4 Licensed under the Apache License, Version 2.0 (the "License");
5 you may not use this file except in compliance with the License.
6 You may obtain a copy of the License at
7
8 http://www.apache.org/licenses/LICENSE-2.0
9
10 Unless required by applicable law or agreed to in writing, software
11 distributed under the License is distributed on an "AS IS" BASIS,
12 WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
13 See the License for the specific language governing permissions and
14 limitations under the License.
15*/
16
17#ifndef MCUCONF_H
18#define MCUCONF_H
19
20/*
21 * STM32F4xx drivers configuration.
22 * The following settings override the default settings present in
23 * the various device driver implementation headers.
24 * Note that the settings for each driver only have effect if the whole
25 * driver is enabled in halconf.h.
26 *
27 * IRQ priorities:
28 * 15...0 Lowest...Highest.
29 *
30 * DMA priorities:
31 * 0...3 Lowest...Highest.
32 */
33
34#define STM32F4xx_MCUCONF
35
36/*
37 * HAL driver system settings.
38 */
39#define STM32_NO_INIT FALSE
40#define STM32_HSI_ENABLED TRUE
41#define STM32_LSI_ENABLED TRUE
42#define STM32_HSE_ENABLED TRUE
43#define STM32_LSE_ENABLED FALSE
44#define STM32_CLOCK48_REQUIRED TRUE
45#define STM32_SW STM32_SW_PLL
46#define STM32_PLLSRC STM32_PLLSRC_HSE
47#define STM32_PLLM_VALUE 25
48#define STM32_PLLN_VALUE 384
49#define STM32_PLLP_VALUE 4
50#define STM32_PLLQ_VALUE 8
51#define STM32_HPRE STM32_HPRE_DIV1
52#define STM32_PPRE1 STM32_PPRE1_DIV4
53#define STM32_PPRE2 STM32_PPRE2_DIV2
54#define STM32_RTCSEL STM32_RTCSEL_LSI
55#define STM32_RTCPRE_VALUE 8
56#define STM32_MCO1SEL STM32_MCO1SEL_HSI
57#define STM32_MCO1PRE STM32_MCO1PRE_DIV1
58#define STM32_MCO2SEL STM32_MCO2SEL_SYSCLK
59#define STM32_MCO2PRE STM32_MCO2PRE_DIV5
60#define STM32_I2SSRC STM32_I2SSRC_CKIN
61#define STM32_PLLI2SN_VALUE 192
62#define STM32_PLLI2SR_VALUE 5
63#define STM32_PVD_ENABLE FALSE
64#define STM32_PLS STM32_PLS_LEV0
65#define STM32_BKPRAM_ENABLE FALSE
66
67/*
68 * IRQ system settings.
69 */
70#define STM32_IRQ_EXTI0_PRIORITY 6
71#define STM32_IRQ_EXTI1_PRIORITY 6
72#define STM32_IRQ_EXTI2_PRIORITY 6
73#define STM32_IRQ_EXTI3_PRIORITY 6
74#define STM32_IRQ_EXTI4_PRIORITY 6
75#define STM32_IRQ_EXTI5_9_PRIORITY 6
76#define STM32_IRQ_EXTI10_15_PRIORITY 6
77#define STM32_IRQ_EXTI16_PRIORITY 6
78#define STM32_IRQ_EXTI17_PRIORITY 15
79#define STM32_IRQ_EXTI18_PRIORITY 6
80#define STM32_IRQ_EXTI19_PRIORITY 6
81#define STM32_IRQ_EXTI20_PRIORITY 6
82#define STM32_IRQ_EXTI21_PRIORITY 15
83#define STM32_IRQ_EXTI22_PRIORITY 15
84
85/*
86 * ADC driver system settings.
87 */
88#define STM32_ADC_ADCPRE ADC_CCR_ADCPRE_DIV4
89#define STM32_ADC_USE_ADC1 FALSE
90#define STM32_ADC_ADC1_DMA_STREAM STM32_DMA_STREAM_ID(2, 4)
91#define STM32_ADC_ADC1_DMA_PRIORITY 2
92#define STM32_ADC_IRQ_PRIORITY 6
93#define STM32_ADC_ADC1_DMA_IRQ_PRIORITY 6
94
95/*
96 * GPT driver system settings.
97 */
98#define STM32_GPT_USE_TIM1 FALSE
99#define STM32_GPT_USE_TIM2 FALSE
100#define STM32_GPT_USE_TIM3 FALSE
101#define STM32_GPT_USE_TIM4 FALSE
102#define STM32_GPT_USE_TIM5 FALSE
103#define STM32_GPT_USE_TIM9 FALSE
104#define STM32_GPT_USE_TIM11 FALSE
105#define STM32_GPT_TIM1_IRQ_PRIORITY 7
106#define STM32_GPT_TIM2_IRQ_PRIORITY 7
107#define STM32_GPT_TIM3_IRQ_PRIORITY 7
108#define STM32_GPT_TIM4_IRQ_PRIORITY 7
109#define STM32_GPT_TIM5_IRQ_PRIORITY 7
110#define STM32_GPT_TIM9_IRQ_PRIORITY 7
111#define STM32_GPT_TIM11_IRQ_PRIORITY 7
112
113/*
114 * I2C driver system settings.
115 */
116#define STM32_I2C_USE_I2C1 FALSE
117#define STM32_I2C_USE_I2C2 FALSE
118#define STM32_I2C_USE_I2C3 FALSE
119#define STM32_I2C_BUSY_TIMEOUT 50
120#define STM32_I2C_I2C1_RX_DMA_STREAM STM32_DMA_STREAM_ID(1, 0)
121#define STM32_I2C_I2C1_TX_DMA_STREAM STM32_DMA_STREAM_ID(1, 6)
122#define STM32_I2C_I2C2_RX_DMA_STREAM STM32_DMA_STREAM_ID(1, 2)
123#define STM32_I2C_I2C2_TX_DMA_STREAM STM32_DMA_STREAM_ID(1, 7)
124#define STM32_I2C_I2C3_RX_DMA_STREAM STM32_DMA_STREAM_ID(1, 2)
125#define STM32_I2C_I2C3_TX_DMA_STREAM STM32_DMA_STREAM_ID(1, 4)
126#define STM32_I2C_I2C1_IRQ_PRIORITY 5
127#define STM32_I2C_I2C2_IRQ_PRIORITY 5
128#define STM32_I2C_I2C3_IRQ_PRIORITY 5
129#define STM32_I2C_I2C1_DMA_PRIORITY 3
130#define STM32_I2C_I2C2_DMA_PRIORITY 3
131#define STM32_I2C_I2C3_DMA_PRIORITY 3
132#define STM32_I2C_DMA_ERROR_HOOK(i2cp) osalSysHalt("DMA failure")
133
134/*
135 * I2S driver system settings.
136 */
137#define STM32_I2S_USE_SPI2 FALSE
138#define STM32_I2S_USE_SPI3 FALSE
139#define STM32_I2S_SPI2_IRQ_PRIORITY 10
140#define STM32_I2S_SPI3_IRQ_PRIORITY 10
141#define STM32_I2S_SPI2_DMA_PRIORITY 1
142#define STM32_I2S_SPI3_DMA_PRIORITY 1
143#define STM32_I2S_SPI2_RX_DMA_STREAM STM32_DMA_STREAM_ID(1, 3)
144#define STM32_I2S_SPI2_TX_DMA_STREAM STM32_DMA_STREAM_ID(1, 4)
145#define STM32_I2S_SPI3_RX_DMA_STREAM STM32_DMA_STREAM_ID(1, 0)
146#define STM32_I2S_SPI3_TX_DMA_STREAM STM32_DMA_STREAM_ID(1, 7)
147#define STM32_I2S_DMA_ERROR_HOOK(i2sp) osalSysHalt("DMA failure")
148
149/*
150 * ICU driver system settings.
151 */
152#define STM32_ICU_USE_TIM1 FALSE
153#define STM32_ICU_USE_TIM2 FALSE
154#define STM32_ICU_USE_TIM3 FALSE
155#define STM32_ICU_USE_TIM4 FALSE
156#define STM32_ICU_USE_TIM5 FALSE
157#define STM32_ICU_USE_TIM9 FALSE
158#define STM32_ICU_TIM1_IRQ_PRIORITY 7
159#define STM32_ICU_TIM2_IRQ_PRIORITY 7
160#define STM32_ICU_TIM3_IRQ_PRIORITY 7
161#define STM32_ICU_TIM4_IRQ_PRIORITY 7
162#define STM32_ICU_TIM5_IRQ_PRIORITY 7
163#define STM32_ICU_TIM9_IRQ_PRIORITY 7
164
165/*
166 * PWM driver system settings.
167 */
168#define STM32_PWM_USE_ADVANCED FALSE
169#define STM32_PWM_USE_TIM1 FALSE
170#define STM32_PWM_USE_TIM2 FALSE
171#define STM32_PWM_USE_TIM3 TRUE
172#define STM32_PWM_USE_TIM4 FALSE
173#define STM32_PWM_USE_TIM5 FALSE
174#define STM32_PWM_USE_TIM9 FALSE
175#define STM32_PWM_TIM1_IRQ_PRIORITY 7
176#define STM32_PWM_TIM2_IRQ_PRIORITY 7
177#define STM32_PWM_TIM3_IRQ_PRIORITY 7
178#define STM32_PWM_TIM4_IRQ_PRIORITY 7
179#define STM32_PWM_TIM5_IRQ_PRIORITY 7
180#define STM32_PWM_TIM9_IRQ_PRIORITY 7
181
182/*
183 * SERIAL driver system settings.
184 */
185#define STM32_SERIAL_USE_USART1 TRUE
186#define STM32_SERIAL_USE_USART2 FALSE
187#define STM32_SERIAL_USE_USART6 FALSE
188#define STM32_SERIAL_USART1_PRIORITY 12
189#define STM32_SERIAL_USART2_PRIORITY 12
190#define STM32_SERIAL_USART6_PRIORITY 12
191
192/*
193 * SPI driver system settings.
194 */
195#define STM32_SPI_USE_SPI1 FALSE
196#define STM32_SPI_USE_SPI2 FALSE
197#define STM32_SPI_USE_SPI3 FALSE
198#define STM32_SPI_SPI1_RX_DMA_STREAM STM32_DMA_STREAM_ID(2, 0)
199#define STM32_SPI_SPI1_TX_DMA_STREAM STM32_DMA_STREAM_ID(2, 3)
200#define STM32_SPI_SPI2_RX_DMA_STREAM STM32_DMA_STREAM_ID(1, 3)
201#define STM32_SPI_SPI2_TX_DMA_STREAM STM32_DMA_STREAM_ID(1, 4)
202#define STM32_SPI_SPI3_RX_DMA_STREAM STM32_DMA_STREAM_ID(1, 0)
203#define STM32_SPI_SPI3_TX_DMA_STREAM STM32_DMA_STREAM_ID(1, 7)
204#define STM32_SPI_SPI1_DMA_PRIORITY 1
205#define STM32_SPI_SPI2_DMA_PRIORITY 1
206#define STM32_SPI_SPI3_DMA_PRIORITY 1
207#define STM32_SPI_SPI1_IRQ_PRIORITY 10
208#define STM32_SPI_SPI2_IRQ_PRIORITY 10
209#define STM32_SPI_SPI3_IRQ_PRIORITY 10
210#define STM32_SPI_DMA_ERROR_HOOK(spip) osalSysHalt("DMA failure")
211
212/*
213 * ST driver system settings.
214 */
215#define STM32_ST_IRQ_PRIORITY 8
216#define STM32_ST_USE_TIMER 2
217
218/*
219 * UART driver system settings.
220 */
221#define STM32_UART_USE_USART1 FALSE
222#define STM32_UART_USE_USART2 FALSE
223#define STM32_UART_USE_USART6 FALSE
224#define STM32_UART_USART1_RX_DMA_STREAM STM32_DMA_STREAM_ID(2, 5)
225#define STM32_UART_USART1_TX_DMA_STREAM STM32_DMA_STREAM_ID(2, 7)
226#define STM32_UART_USART2_RX_DMA_STREAM STM32_DMA_STREAM_ID(1, 5)
227#define STM32_UART_USART2_TX_DMA_STREAM STM32_DMA_STREAM_ID(1, 6)
228#define STM32_UART_USART6_RX_DMA_STREAM STM32_DMA_STREAM_ID(2, 2)
229#define STM32_UART_USART6_TX_DMA_STREAM STM32_DMA_STREAM_ID(2, 7)
230#define STM32_UART_USART1_IRQ_PRIORITY 12
231#define STM32_UART_USART2_IRQ_PRIORITY 12
232#define STM32_UART_USART6_IRQ_PRIORITY 12
233#define STM32_UART_USART1_DMA_PRIORITY 0
234#define STM32_UART_USART2_DMA_PRIORITY 0
235#define STM32_UART_USART6_DMA_PRIORITY 0
236#define STM32_UART_DMA_ERROR_HOOK(uartp) osalSysHalt("DMA failure")
237
238/*
239 * USB driver system settings.
240 */
241#define STM32_USB_USE_OTG1 TRUE
242#define STM32_USB_OTG1_IRQ_PRIORITY 14
243#define STM32_USB_OTG1_RX_FIFO_SIZE 512
244#define STM32_USB_OTG_THREAD_PRIO NORMALPRIO+1
245#define STM32_USB_OTG_THREAD_STACK_SIZE 128
246#define STM32_USB_OTGFIFO_FILL_BASEPRI 0
247
248/*
249 * WDG driver system settings.
250 */
251#define STM32_WDG_USE_IWDG FALSE
252
253#endif /* MCUCONF_H */
diff --git a/keyboards/zvecr/zv48/f411/rules.mk b/keyboards/zvecr/zv48/f411/rules.mk
new file mode 100644
index 000000000..61add3aed
--- /dev/null
+++ b/keyboards/zvecr/zv48/f411/rules.mk
@@ -0,0 +1,27 @@
1## chip/board settings
2# the next two should match the directories in
3# <chibios>/os/hal/ports/$(MCU_FAMILY)/$(MCU_SERIES)
4MCU_FAMILY = STM32
5MCU_SERIES = STM32F4xx
6# linker script to use
7# it should exist either in <chibios>/os/common/ports/ARMCMx/compilers/GCC/ld/
8# or <this_dir>/ld/
9MCU_LDSCRIPT = STM32F411xE
10# startup code to use
11# is should exist in <chibios>/os/common/ports/ARMCMx/compilers/GCC/mk/
12MCU_STARTUP = stm32f4xx
13# it should exist either in <chibios>/os/hal/boards/
14# or <this_dir>/boards
15BOARD = BLACKPILL_STM32_F411
16# Cortex version
17# Teensy LC is cortex-m0; Teensy 3.x are cortex-m4
18MCU = cortex-m4
19# ARM version, CORTEX-M0/M1 are 6, CORTEX-M3/M4/M7 are 7
20ARMV = 7
21USE_FPU = yes
22# Address of the booloader in system memory
23STM32_BOOTLOADER_ADDRESS = 0x1FFF0000
24
25# Options to pass to dfu-util when flashing
26DFU_ARGS = -d 0483:df11 -a 0 -s 0x08000000:leave
27DFU_SUFFIX_ARGS = -v 0483 -p df11
diff --git a/keyboards/zvecr/zv48/info.json b/keyboards/zvecr/zv48/info.json
new file mode 100644
index 000000000..b6a9c7693
--- /dev/null
+++ b/keyboards/zvecr/zv48/info.json
@@ -0,0 +1,13 @@
1{
2 "keyboard_name": "zv48",
3 "url": "",
4 "maintainer": "zvecr",
5 "width": 12,
6 "height": 4,
7 "layouts": {
8 "LAYOUT_ortho_4x12": {
9 "key_count": 48,
10 "layout": [{"x":0, "y":0}, {"x":1, "y":0}, {"x":2, "y":0}, {"x":3, "y":0}, {"x":4, "y":0}, {"x":5, "y":0}, {"x":6, "y":0}, {"x":7, "y":0}, {"x":8, "y":0}, {"x":9, "y":0}, {"x":10, "y":0}, {"x":11, "y":0}, {"x":0, "y":1}, {"x":1, "y":1}, {"x":2, "y":1}, {"x":3, "y":1}, {"x":4, "y":1}, {"x":5, "y":1}, {"x":6, "y":1}, {"x":7, "y":1}, {"x":8, "y":1}, {"x":9, "y":1}, {"x":10, "y":1}, {"x":11, "y":1}, {"x":0, "y":2}, {"x":1, "y":2}, {"x":2, "y":2}, {"x":3, "y":2}, {"x":4, "y":2}, {"x":5, "y":2}, {"x":6, "y":2}, {"x":7, "y":2}, {"x":8, "y":2}, {"x":9, "y":2}, {"x":10, "y":2}, {"x":11, "y":2}, {"x":0, "y":3}, {"x":1, "y":3}, {"x":2, "y":3}, {"x":3, "y":3}, {"x":4, "y":3}, {"x":5, "y":3}, {"x":6, "y":3}, {"x":7, "y":3}, {"x":8, "y":3}, {"x":9, "y":3}, {"x":10, "y":3}, {"x":11, "y":3}]
11 }
12 }
13}
diff --git a/keyboards/zvecr/zv48/keymaps/default/keymap.c b/keyboards/zvecr/zv48/keymaps/default/keymap.c
new file mode 100644
index 000000000..f9428c329
--- /dev/null
+++ b/keyboards/zvecr/zv48/keymaps/default/keymap.c
@@ -0,0 +1,91 @@
1#include QMK_KEYBOARD_H
2
3// Defines names for use in layer keycodes and the keymap
4enum layer_names {
5 _QWERTY,
6 _LOWER,
7 _RAISE,
8 _ADJUST,
9};
10
11#define LOWER MO(_LOWER)
12#define RAISE MO(_RAISE)
13
14const uint16_t PROGMEM keymaps[][MATRIX_ROWS][MATRIX_COLS] = {
15/* Qwerty
16 * ,-----------------------------------------------------------------------------------.
17 * | Esc | Q | W | E | R | T | Y | U | I | O | P | Bksp |
18 * |------+------+------+------+------+-------------+------+------+------+------+------|
19 * | Tab | A | S | D | F | G | H | J | K | L | ; | " |
20 * |------+------+------+------+------+------|------+------+------+------+------+------|
21 * | Shift| Z | X | C | V | B | N | M | , | . | / |Enter |
22 * |------+------+------+------+------+------+------+------+------+------+------+------|
23 * | Ctrl | GUI | Alt | App |Lower | Space |Raise | Left | Down | Up |Right |
24 * `-----------------------------------------------------------------------------------'
25 */
26[_QWERTY] = LAYOUT_ortho_4x12(
27 KC_ESC, KC_Q, KC_W, KC_E, KC_R, KC_T, KC_Y, KC_U, KC_I, KC_O, KC_P, KC_BSPC,
28 KC_TAB, KC_A, KC_S, KC_D, KC_F, KC_G, KC_H, KC_J, KC_K, KC_L, KC_SCLN, KC_QUOT,
29 KC_LSFT, KC_Z, KC_X, KC_C, KC_V, KC_B, KC_N, KC_M, KC_COMM, KC_DOT, KC_SLSH, KC_ENT ,
30 KC_LCTL, KC_LGUI, KC_LALT, KC_APP, LOWER, KC_SPC, KC_SPC, RAISE, KC_LEFT, KC_DOWN, KC_UP, KC_RGHT
31),
32
33/* Lower
34 * ,-----------------------------------------------------------------------------------.
35 * | ~ | ! | @ | # | $ | % | ^ | & | * | ( | ) | Del |
36 * |------+------+------+------+------+-------------+------+------+------+------+------|
37 * | Del | F1 | F2 | F3 | F4 | F5 | F6 | _ | + | { | } | | |
38 * |------+------+------+------+------+------|------+------+------+------+------+------|
39 * | | F7 | F8 | F9 | F10 | F11 | F12 |ISO ~ |ISO | | | | |
40 * |------+------+------+------+------+------+------+------+------+------+------+------|
41 * | | | | | | | | | Next | Vol- | Vol+ | Play |
42 * `-----------------------------------------------------------------------------------'
43 */
44[_LOWER] = LAYOUT_ortho_4x12(
45 KC_TILD, KC_EXLM, KC_AT, KC_HASH, KC_DLR, KC_PERC, KC_CIRC, KC_AMPR, KC_ASTR, KC_LPRN, KC_RPRN, KC_DEL,
46 KC_DEL, KC_F1, KC_F2, KC_F3, KC_F4, KC_F5, KC_F6, KC_UNDS, KC_PLUS, KC_LCBR, KC_RCBR, KC_PIPE,
47 _______, KC_F7, KC_F8, KC_F9, KC_F10, KC_F11, KC_F12,S(KC_NUHS),S(KC_NUBS),_______, _______, _______,
48 _______, _______, _______, _______, _______, _______, _______, _______, KC_MNXT, KC_VOLD, KC_VOLU, KC_MPLY
49),
50
51/* Raise
52 * ,-----------------------------------------------------------------------------------.
53 * | ` | 1 | 2 | 3 | 4 | 5 | 6 | 7 | 8 | 9 | 0 | Del |
54 * |------+------+------+------+------+-------------+------+------+------+------+------|
55 * | Del | F1 | F2 | F3 | F4 | F5 | F6 | - | = | [ | ] | \ |
56 * |------+------+------+------+------+------|------+------+------+------+------+------|
57 * | | F7 | F8 | F9 | F10 | F11 | F12 |ISO # |ISO / | | | |
58 * |------+------+------+------+------+------+------+------+------+------+------+------|
59 * | | | | | | | | | Next | Vol- | Vol+ | Play |
60 * `-----------------------------------------------------------------------------------'
61 */
62[_RAISE] = LAYOUT_ortho_4x12(
63 KC_GRV, KC_1, KC_2, KC_3, KC_4, KC_5, KC_6, KC_7, KC_8, KC_9, KC_0, KC_DEL,
64 KC_DEL, KC_F1, KC_F2, KC_F3, KC_F4, KC_F5, KC_F6, KC_MINS, KC_EQL, KC_LBRC, KC_RBRC, KC_BSLS,
65 _______, KC_F7, KC_F8, KC_F9, KC_F10, KC_F11, KC_F12, KC_NUHS, KC_NUBS, _______, _______, _______,
66 _______, _______, _______, _______, _______, _______, _______, _______, KC_MNXT, KC_VOLD, KC_VOLU, KC_MPLY
67),
68
69/* Adjust (Lower + Raise)
70 * ,-----------------------------------------------------------------------------------.
71 * | | Reset| | | | |R Tog |R Mode|R Rev |R Grad| Reset| |
72 * |------+------+------+------+------+-------------+------+------+------+------+------|
73 * | | | | | | |R HUI|R SAI|R VAI| | | |
74 * |------+------+------+------+------+------|------+------+------+------+------+------|
75 * | | | | | | |R HUD|R SAD|R VAD| | | |
76 * |------+------+------+------+------+------+------+------+------+------+------+------|
77 * | | | | | | | | | | | | |
78 * `-----------------------------------------------------------------------------------'
79 */
80[_ADJUST] = LAYOUT_ortho_4x12(
81 _______, RESET, _______, _______, _______, _______, RGB_TOG, RGB_MOD, RGB_RMOD,RGB_M_G, RESET, _______,
82 _______, _______, _______, _______, _______, _______, RGB_HUI, RGB_SAI, RGB_VAI, _______, _______, _______,
83 _______, _______, _______, _______, _______, _______, RGB_HUD, RGB_SAD, RGB_VAD, _______, _______, _______,
84 _______, _______, _______, _______, _______, _______, _______, _______, _______, _______, _______, _______
85)
86
87};
88
89layer_state_t layer_state_set_user(layer_state_t state) {
90 return update_tri_layer_state(state, _LOWER, _RAISE, _ADJUST);
91}
diff --git a/keyboards/zvecr/zv48/readme.md b/keyboards/zvecr/zv48/readme.md
new file mode 100644
index 000000000..88db2533a
--- /dev/null
+++ b/keyboards/zvecr/zv48/readme.md
@@ -0,0 +1,16 @@
1# zv48
2
3![zv48](https://i.imgur.com/ZJ9GfF6l.jpg)
4
5ARM Split ortho_4x12 mechanical keyboard.
6
7* Keyboard Maintainer: [zvecr](https://github.com/zvecr)
8* Hardware Supported: f401/f411 blackpill
9* Hardware Availability: [repo](https://github.com/zvecr/zv48)
10
11Make example for this keyboard (after setting up your build environment):
12
13 make zvecr/zv48/f401:default
14 make zvecr/zv48/f411:default
15
16See the [build environment setup](https://docs.qmk.fm/#/getting_started_build_tools) and the [make instructions](https://docs.qmk.fm/#/getting_started_make_guide) for more information. Brand new to QMK? Start with our [Complete Newbs Guide](https://docs.qmk.fm/#/newbs).
diff --git a/keyboards/zvecr/zv48/rules.mk b/keyboards/zvecr/zv48/rules.mk
new file mode 100644
index 000000000..41ec506e6
--- /dev/null
+++ b/keyboards/zvecr/zv48/rules.mk
@@ -0,0 +1,29 @@
1# Build Options
2# change yes to no to disable
3#
4BOOTMAGIC_ENABLE = lite # Virtual DIP switch configuration
5KEYBOARD_SHARED_EP = yes # Free up some extra endpoints - needed if console+mouse+extra
6MOUSEKEY_ENABLE = yes # Mouse keys
7EXTRAKEY_ENABLE = yes # Audio control and System control
8CONSOLE_ENABLE = no # Console for debug
9COMMAND_ENABLE = no # Commands for debug and configuration
10# Do not enable SLEEP_LED_ENABLE. it uses the same timer as BACKLIGHT_ENABLE
11SLEEP_LED_ENABLE = no # Breathing sleep LED during USB suspend
12# if this doesn't work, see here: https://github.com/tmk/tmk_keyboard/wiki/FAQ#nkro-doesnt-work
13NKRO_ENABLE = yes # USB Nkey Rollover
14BACKLIGHT_ENABLE = no # Enable keyboard backlight functionality
15RGBLIGHT_ENABLE = yes # Enable keyboard RGB underglow
16ENCODER_ENABLE = yes # Enable rotary encoder support
17MIDI_ENABLE = no # MIDI support
18BLUETOOTH_ENABLE = no # Enable Bluetooth with the Adafruit EZ-Key HID
19AUDIO_ENABLE = no # Audio output
20FAUXCLICKY_ENABLE = no # Use buzzer to emulate clicky switches
21
22SPLIT_KEYBOARD = yes
23SERIAL_DRIVER = usart
24WS2812_DRIVER = pwm
25OPT_DEFS += -DSTM32_DMA_REQUIRED=TRUE
26
27DEFAULT_FOLDER = zvecr/zv48/f401
28
29LAYOUTS = ortho_4x12
diff --git a/keyboards/zvecr/zv48/zv48.c b/keyboards/zvecr/zv48/zv48.c
new file mode 100644
index 000000000..3c3d1ab77
--- /dev/null
+++ b/keyboards/zvecr/zv48/zv48.c
@@ -0,0 +1,27 @@
1/* Copyright 2020 zvecr <git@zvecr.com>
2 *
3 * This program is free software: you can redistribute it and/or modify
4 * it under the terms of the GNU General Public License as published by
5 * the Free Software Foundation, either version 2 of the License, or
6 * (at your option) any later version.
7 *
8 * This program is distributed in the hope that it will be useful,
9 * but WITHOUT ANY WARRANTY; without even the implied warranty of
10 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
11 * GNU General Public License for more details.
12 *
13 * You should have received a copy of the GNU General Public License
14 * along with this program. If not, see <http://www.gnu.org/licenses/>.
15 */
16#include "zv48.h"
17
18void keyboard_pre_init_kb(void){
19 // Workaround for reversible pcb/mcu
20 palSetLineMode(C13, PAL_MODE_INPUT_PULLUP);
21 palSetLineMode(C15, PAL_MODE_INPUT_PULLUP);
22 palSetLineMode(B7, PAL_MODE_OUTPUT_OPENDRAIN);
23 palSetLineMode(A0, PAL_MODE_OUTPUT_OPENDRAIN);
24 palSetLineMode(A1, PAL_MODE_OUTPUT_OPENDRAIN);
25
26 keyboard_pre_init_user();
27}
diff --git a/keyboards/zvecr/zv48/zv48.h b/keyboards/zvecr/zv48/zv48.h
new file mode 100644
index 000000000..27504492e
--- /dev/null
+++ b/keyboards/zvecr/zv48/zv48.h
@@ -0,0 +1,35 @@
1/* Copyright 2020 zvecr <git@zvecr.com>
2 *
3 * This program is free software: you can redistribute it and/or modify
4 * it under the terms of the GNU General Public License as published by
5 * the Free Software Foundation, either version 2 of the License, or
6 * (at your option) any later version.
7 *
8 * This program is distributed in the hope that it will be useful,
9 * but WITHOUT ANY WARRANTY; without even the implied warranty of
10 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
11 * GNU General Public License for more details.
12 *
13 * You should have received a copy of the GNU General Public License
14 * along with this program. If not, see <http://www.gnu.org/licenses/>.
15 */
16#pragma once
17
18#include "quantum.h"
19
20#define LAYOUT_ortho_4x12( \
21 L00, L01, L02, L03, L04, L05, R00, R01, R02, R03, R04, R05, \
22 L10, L11, L12, L13, L14, L15, R10, R11, R12, R13, R14, R15, \
23 L20, L21, L22, L23, L24, L25, R20, R21, R22, R23, R24, R25, \
24 L30, L31, L32, L33, L34, L35, R30, R31, R32, R33, R34, R35 \
25 ) \
26 { \
27 { L00, L01, L02, L03, L04, L05 }, \
28 { L10, L11, L12, L13, L14, L15 }, \
29 { L20, L21, L22, L23, L24, L25 }, \
30 { L30, L31, L32, L33, L34, L35 }, \
31 { R05, R04, R03, R02, R01, R00 }, \
32 { R15, R14, R13, R12, R11, R10 }, \
33 { R25, R24, R23, R22, R21, R20 }, \
34 { R35, R34, R33, R32, R31, R30 } \
35 }
generated by cgit v1.2.3 (git 2.25.1) at 2025-07-13 22:13:42 +0000