Add STM32L433 and L443 support (#12063)

* initial L433 commit * change to XC * fix L433 * disable all peripherals * update system and peripheral clocks * 433 change * use its own board files * revert its own board files * l433 specific change * fix stm32l432xx define * remove duplicate #define * fix bootloader jump * move to L443xx and add i2c2, spi2, usart3 to mcuconf.h * move to L443 * move to L443 * fix sdmmc in mcuconf.h * include STM32L443 * add L443 * Include L443 in compatible microcontrollers Co-authored-by: Nick Brassel <nick@tzarc.org> * Include L443 in compatible microcontrollers Co-authored-by: Nick Brassel <nick@tzarc.org> * Update config bootloader jump description Co-authored-by: Nick Brassel <nick@tzarc.org> * Update ChibiOS define reasoning Co-authored-by: Nick Brassel <nick@tzarc.org> * Update quantum/mcu_selection.mk Co-authored-by: Nick Brassel <nick@tzarc.org> * fix git conflict Co-authored-by: Nick Brassel <nick@tzarc.org>
author: Xelus22 <17491233+Xelus22@users.noreply.github.com> 2021-04-26 03:07:15 +0000
committer: GitHub <noreply@github.com> 2021-04-26 13:07:15 +1000
commit: 9cf82fae9566c68ea2ffcb120375868f27f94ecf (patch)
tree: 81cd0c82ec0ae607dbdafa6d47c131a19d4862dd
parent: 5168af9a9bd0693cd5bddd4a07bea464015b5e5a (diff)
download: qmk_firmware-9cf82fae9566c68ea2ffcb120375868f27f94ecf.tar.gz
qmk_firmware-9cf82fae9566c68ea2ffcb120375868f27f94ecf.zip
9 files changed, 395 insertions, 2 deletions
diff --git a/data/schemas/keyboard.jsonschema b/data/schemas/keyboard.jsonschema
index 99121d79e..c335f49d5 100644
--- a/data/schemas/keyboard.jsonschema
+++ b/data/schemas/keyboard.jsonschema
@@ -25,7 +25,7 @@
        },
        "processor": {
            "type": "string",
-            "enum": ["cortex-m0", "cortex-m0plus", "cortex-m3", "cortex-m4", "MKL26Z64", "MK20DX128", "MK20DX256", "MK66F18", "STM32F042", "STM32F072", "STM32F103", "STM32F303", "STM32F401", "STM32F411", "STM32F446", "STM32G431", "STM32G474", "atmega16u2", "atmega32u2", "atmega16u4", "atmega32u4", "at90usb162", "at90usb646", "at90usb647", "at90usb1286", "at90usb1287", "atmega32a", "atmega328p", "atmega328", "attiny85", "unknown"]
+            "enum": ["cortex-m0", "cortex-m0plus", "cortex-m3", "cortex-m4", "MKL26Z64", "MK20DX128", "MK20DX256", "MK66F18", "STM32F042", "STM32F072", "STM32F103", "STM32F303", "STM32F401", "STM32F411", "STM32F446", "STM32G431", "STM32G474", "STM32L433", "STM32L443", "atmega16u2", "atmega32u2", "atmega16u4", "atmega32u4", "at90usb162", "at90usb646", "at90usb647", "at90usb1286", "at90usb1287", "atmega32a", "atmega328p", "atmega328", "attiny85", "unknown"]
        },
        "board": {
            "type": "string",
diff --git a/docs/compatible_microcontrollers.md b/docs/compatible_microcontrollers.md
index 5e16ab277..0f5b140de 100644
--- a/docs/compatible_microcontrollers.md
+++ b/docs/compatible_microcontrollers.md
@@ -31,6 +31,8 @@ You can also use any ARM chip with USB that [ChibiOS](https://www.chibios.org) s
 * [STM32F446](https://www.st.com/en/microcontrollers-microprocessors/stm32f446.html)
 * [STM32G431](https://www.st.com/en/microcontrollers-microprocessors/stm32g4x1.html)
 * [STM32G474](https://www.st.com/en/microcontrollers-microprocessors/stm32g4x4.html)
+ * [STM32L433](https://www.st.com/en/microcontrollers-microprocessors/stm32l4x3.html)
+ * [STM32L443](https://www.st.com/en/microcontrollers-microprocessors/stm32l4x3.html)
 ### NXP (Kinetis)
diff --git a/docs/ja/compatible_microcontrollers.md b/docs/ja/compatible_microcontrollers.md
index 69da70f2c..b675b038d 100644
--- a/docs/ja/compatible_microcontrollers.md
+++ b/docs/ja/compatible_microcontrollers.md
@@ -36,6 +36,8 @@ QMK は十分な容量のフラッシュメモリを備えた USB 対応 AVR ま
 * [STM32F446](https://www.st.com/en/microcontrollers-microprocessors/stm32f446.html)
 * [STM32G431](https://www.st.com/en/microcontrollers-microprocessors/stm32g4x1.html)
 * [STM32G474](https://www.st.com/en/microcontrollers-microprocessors/stm32g4x4.html)
+* [STM32L433](https://www.st.com/en/microcontrollers-microprocessors/stm32l4x3.html)
+* [STM32L443](https://www.st.com/en/microcontrollers-microprocessors/stm32l4x3.html)
 ### NXP (Kinetis)
diff --git a/lib/python/qmk/constants.py b/lib/python/qmk/constants.py
index 33adb0a13..49e5e0eb4 100644
--- a/lib/python/qmk/constants.py
+++ b/lib/python/qmk/constants.py
@@ -10,7 +10,7 @@ QMK_FIRMWARE = Path.cwd()
 MAX_KEYBOARD_SUBFOLDERS = 5
 # Supported processor types
-CHIBIOS_PROCESSORS = 'cortex-m0', 'cortex-m0plus', 'cortex-m3', 'cortex-m4', 'MKL26Z64', 'MK20DX128', 'MK20DX256', 'MK66F18', 'STM32F042', 'STM32F072', 'STM32F103', 'STM32F303', 'STM32F401', 'STM32F411', 'STM32F446', 'STM32G431', 'STM32G474'
+CHIBIOS_PROCESSORS = 'cortex-m0', 'cortex-m0plus', 'cortex-m3', 'cortex-m4', 'MKL26Z64', 'MK20DX128', 'MK20DX256', 'MK66F18', 'STM32F042', 'STM32F072', 'STM32F103', 'STM32F303', 'STM32F401', 'STM32F411', 'STM32F446', 'STM32G431', 'STM32G474', 'STM32L433', 'STM32L443'
 LUFA_PROCESSORS = 'at90usb162', 'atmega16u2', 'atmega32u2', 'atmega16u4', 'atmega32u4', 'at90usb646', 'at90usb647', 'at90usb1286', 'at90usb1287', None
 VUSB_PROCESSORS = 'atmega32a', 'atmega328p', 'atmega328', 'attiny85'
diff --git a/platforms/chibios/GENERIC_STM32_L433XC/board/board.mk b/platforms/chibios/GENERIC_STM32_L433XC/board/board.mk
new file mode 100644
index 000000000..1250385eb
--- /dev/null
+++ b/platforms/chibios/GENERIC_STM32_L433XC/board/board.mk
@@ -0,0 +1,9 @@
+# List of all the board related files.
+BOARDSRC = $(CHIBIOS)/os/hal/boards/ST_NUCLEO32_L432KC/board.c
+# Required include directories
+BOARDINC = $(CHIBIOS)/os/hal/boards/ST_NUCLEO32_L432KC
+# Shared variables
+ALLCSRC += $(BOARDSRC)
+ALLINC  += $(BOARDINC)
diff --git a/platforms/chibios/GENERIC_STM32_L433XC/configs/board.h b/platforms/chibios/GENERIC_STM32_L433XC/configs/board.h
new file mode 100644
index 000000000..51f9724f9
--- /dev/null
+++ b/platforms/chibios/GENERIC_STM32_L433XC/configs/board.h
@@ -0,0 +1,24 @@
+/* Copyright 2018-2021 Harrison Chan (@Xelus)
+ *
+ *  This program is free software: you can redistribute it and/or modify
+ *  it under the terms of the GNU General Public License as published by
+ *  the Free Software Foundation, either version 3 of the License, or
+ *  (at your option) any later version.
+ *
+ *  This program is distributed in the hope that it will be useful,
+ *  but WITHOUT ANY WARRANTY; without even the implied warranty of
+ *  MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ *  GNU General Public License for more details.
+ *
+ *  You should have received a copy of the GNU General Public License
+ *  along with this program.  If not, see <https://www.gnu.org/licenses/>.
+ */
+#pragma once
+#include_next "board.h"
+#undef STM32L432xx
+// Pretend that we're an L443xx as the ChibiOS definitions for L432/L433 mistakenly don't enable GPIOH, I2C2, or SPI2.
+// Until ChibiOS upstream is fixed, this should be kept at L443, as nothing in QMK currently utilises the crypto peripheral on the L443.
+#define STM32L443xx
diff --git a/platforms/chibios/GENERIC_STM32_L433XC/configs/config.h b/platforms/chibios/GENERIC_STM32_L433XC/configs/config.h
new file mode 100644
index 000000000..c27c61b19
--- /dev/null
+++ b/platforms/chibios/GENERIC_STM32_L433XC/configs/config.h
@@ -0,0 +1,26 @@
+/* Copyright 2018-2021 Harrison Chan (@Xelus)
+ *
+ * This program is free software: you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation, either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program.  If not, see <http://www.gnu.org/licenses/>.
+ */
+/* Address for jumping to bootloader on STM32 chips. */
+/* It is chip dependent, the correct number can be looked up by checking against ST's application note AN2606.
+ */
+#define STM32_BOOTLOADER_ADDRESS 0x1FFF0000
+#define PAL_STM32_OSPEED_HIGHEST PAL_STM32_OSPEED_HIGH
+#ifndef EARLY_INIT_PERFORM_BOOTLOADER_JUMP
+#    define EARLY_INIT_PERFORM_BOOTLOADER_JUMP TRUE
+#endif
diff --git a/platforms/chibios/GENERIC_STM32_L433XC/configs/mcuconf.h b/platforms/chibios/GENERIC_STM32_L433XC/configs/mcuconf.h
new file mode 100644
index 000000000..948c740f6
--- /dev/null
+++ b/platforms/chibios/GENERIC_STM32_L433XC/configs/mcuconf.h
@@ -0,0 +1,292 @@
+/*
+    ChibiOS - Copyright (C) 2006..2018 Giovanni Di Sirio
+    Licensed under the Apache License, Version 2.0 (the "License");
+    you may not use this file except in compliance with the License.
+    You may obtain a copy of the License at
+        http://www.apache.org/licenses/LICENSE-2.0
+    Unless required by applicable law or agreed to in writing, software
+    distributed under the License is distributed on an "AS IS" BASIS,
+    WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+    See the License for the specific language governing permissions and
+    limitations under the License.
+*/
+/*
+ * STM32L4xx drivers configuration.
+ * The following settings override the default settings present in
+ * the various device driver implementation headers.
+ * Note that the settings for each driver only have effect if the whole
+ * driver is enabled in halconf.h.
+ *
+ * IRQ priorities:
+ * 15...0       Lowest...Highest.
+ *
+ * DMA priorities:
+ * 0...3        Lowest...Highest.
+ */
+#ifndef MCUCONF_H
+#define MCUCONF_H
+#define STM32L4xx_MCUCONF
+#define STM32L443_MCUCONF
+/*
+ * HAL driver system settings.
+ */
+#define STM32_NO_INIT                       FALSE
+#define STM32_VOS                           STM32_VOS_RANGE1
+#define STM32_PVD_ENABLE                    FALSE
+#define STM32_PLS                           STM32_PLS_LEV0
+#define STM32_HSI16_ENABLED                 TRUE
+#define STM32_HSI48_ENABLED                 TRUE
+#define STM32_LSI_ENABLED                   TRUE
+#define STM32_HSE_ENABLED                   FALSE
+#define STM32_LSE_ENABLED                   FALSE
+#define STM32_MSIPLL_ENABLED                FALSE
+#define STM32_MSIRANGE                      STM32_MSIRANGE_4M
+#define STM32_MSISRANGE                     STM32_MSISRANGE_4M
+#define STM32_SW                            STM32_SW_PLL
+#define STM32_PLLSRC                        STM32_PLLSRC_HSI16
+#define STM32_PLLM_VALUE                    1
+#define STM32_PLLN_VALUE                    10
+#define STM32_PLLPDIV_VALUE                 0
+#define STM32_PLLP_VALUE                    7
+#define STM32_PLLQ_VALUE                    2
+#define STM32_PLLR_VALUE                    2
+#define STM32_HPRE                          STM32_HPRE_DIV1
+#define STM32_PPRE1                         STM32_PPRE1_DIV1
+#define STM32_PPRE2                         STM32_PPRE2_DIV1
+#define STM32_STOPWUCK                      STM32_STOPWUCK_MSI
+#define STM32_MCOSEL                        STM32_MCOSEL_NOCLOCK
+#define STM32_MCOPRE                        STM32_MCOPRE_DIV1
+#define STM32_LSCOSEL                       STM32_LSCOSEL_NOCLOCK
+#define STM32_PLLSAI1N_VALUE                24
+#define STM32_PLLSAI1PDIV_VALUE             0
+#define STM32_PLLSAI1P_VALUE                7
+#define STM32_PLLSAI1Q_VALUE                2
+#define STM32_PLLSAI1R_VALUE                2
+/*
+ * Peripherals clock sources.
+ */
+#define STM32_USART1SEL                     STM32_USART1SEL_SYSCLK
+#define STM32_USART2SEL                     STM32_USART2SEL_SYSCLK
+#define STM32_USART3SEL                     STM32_USART3SEL_SYSCLK
+#define STM32_LPUART1SEL                    STM32_LPUART1SEL_SYSCLK
+#define STM32_I2C1SEL                       STM32_I2C1SEL_SYSCLK
+#define STM32_I2C2SEL                       STM32_I2C2SEL_SYSCLK
+#define STM32_I2C3SEL                       STM32_I2C3SEL_SYSCLK
+#define STM32_LPTIM1SEL                     STM32_LPTIM1SEL_PCLK1
+#define STM32_LPTIM2SEL                     STM32_LPTIM2SEL_PCLK1
+#define STM32_SAI1SEL                       STM32_SAI1SEL_OFF
+#define STM32_CLK48SEL                      STM32_CLK48SEL_HSI48
+#define STM32_ADCSEL                        STM32_ADCSEL_SYSCLK
+#define STM32_SWPMI1SEL                     STM32_SWPMI1SEL_PCLK1
+#define STM32_RTCSEL                        STM32_RTCSEL_LSI
+/*
+ * IRQ system settings.
+ */
+#define STM32_IRQ_EXTI0_PRIORITY            6
+#define STM32_IRQ_EXTI1_PRIORITY            6
+#define STM32_IRQ_EXTI2_PRIORITY            6
+#define STM32_IRQ_EXTI3_PRIORITY            6
+#define STM32_IRQ_EXTI4_PRIORITY            6
+#define STM32_IRQ_EXTI5_9_PRIORITY          6
+#define STM32_IRQ_EXTI10_15_PRIORITY        6
+#define STM32_IRQ_EXTI1635_38_PRIORITY      6
+#define STM32_IRQ_EXTI18_PRIORITY           6
+#define STM32_IRQ_EXTI19_PRIORITY           6
+#define STM32_IRQ_EXTI20_PRIORITY           6
+#define STM32_IRQ_EXTI21_22_PRIORITY        15
+#define STM32_IRQ_TIM1_BRK_TIM15_PRIORITY   7
+#define STM32_IRQ_TIM1_UP_TIM16_PRIORITY    7
+#define STM32_IRQ_TIM1_TRGCO_TIM17_PRIORITY 7
+#define STM32_IRQ_TIM1_CC_PRIORITY          7
+#define STM32_IRQ_TIM2_PRIORITY             7
+#define STM32_IRQ_TIM6_PRIORITY             7
+#define STM32_IRQ_TIM7_PRIORITY             7
+#define STM32_IRQ_USART1_PRIORITY           12
+#define STM32_IRQ_USART2_PRIORITY           12
+#define STM32_IRQ_USART3_PRIORITY           12
+#define STM32_IRQ_LPUART1_PRIORITY          12
+/*
+ * ADC driver system settings.
+ */
+#define STM32_ADC_COMPACT_SAMPLES           FALSE
+#define STM32_ADC_USE_ADC1                  FALSE
+#define STM32_ADC_ADC1_DMA_STREAM           STM32_DMA_STREAM_ID(1, 1)
+#define STM32_ADC_ADC1_DMA_PRIORITY         2
+#define STM32_ADC_ADC12_IRQ_PRIORITY        5
+#define STM32_ADC_ADC1_DMA_IRQ_PRIORITY     5
+#define STM32_ADC_ADC123_CLOCK_MODE         ADC_CCR_CKMODE_AHB_DIV1
+#define STM32_ADC_ADC123_PRESC              ADC_CCR_PRESC_DIV2
+/*
+ * CAN driver system settings.
+ */
+#define STM32_CAN_USE_CAN1                  FALSE
+#define STM32_CAN_CAN1_IRQ_PRIORITY         11
+/*
+ * DAC driver system settings.
+ */
+#define STM32_DAC_DUAL_MODE                 FALSE
+#define STM32_DAC_USE_DAC1_CH1              FALSE
+#define STM32_DAC_USE_DAC1_CH2              FALSE
+#define STM32_DAC_DAC1_CH1_IRQ_PRIORITY     10
+#define STM32_DAC_DAC1_CH2_IRQ_PRIORITY     10
+#define STM32_DAC_DAC1_CH1_DMA_PRIORITY     2
+#define STM32_DAC_DAC1_CH2_DMA_PRIORITY     2
+#define STM32_DAC_DAC1_CH1_DMA_STREAM       STM32_DMA_STREAM_ID(2, 4)
+#define STM32_DAC_DAC1_CH2_DMA_STREAM       STM32_DMA_STREAM_ID(1, 4)
+/*
+ * GPT driver system settings.
+ */
+#define STM32_GPT_USE_TIM1                  FALSE
+#define STM32_GPT_USE_TIM2                  FALSE
+#define STM32_GPT_USE_TIM6                  FALSE
+#define STM32_GPT_USE_TIM7                  FALSE
+#define STM32_GPT_USE_TIM15                 FALSE
+#define STM32_GPT_USE_TIM16                 FALSE
+/*
+ * I2C driver system settings.
+ */
+#define STM32_I2C_USE_I2C1                  FALSE
+#define STM32_I2C_USE_I2C2                  FALSE
+#define STM32_I2C_USE_I2C3                  FALSE
+#define STM32_I2C_BUSY_TIMEOUT              50
+#define STM32_I2C_I2C1_RX_DMA_STREAM        STM32_DMA_STREAM_ID(1, 7)
+#define STM32_I2C_I2C1_TX_DMA_STREAM        STM32_DMA_STREAM_ID(1, 6)
+#define STM32_I2C_I2C2_RX_DMA_STREAM        STM32_DMA_STREAM_ID(1, 5)
+#define STM32_I2C_I2C2_TX_DMA_STREAM        STM32_DMA_STREAM_ID(1, 4)
+#define STM32_I2C_I2C3_RX_DMA_STREAM        STM32_DMA_STREAM_ID(1, 3)
+#define STM32_I2C_I2C3_TX_DMA_STREAM        STM32_DMA_STREAM_ID(1, 2)
+#define STM32_I2C_I2C1_IRQ_PRIORITY         5
+#define STM32_I2C_I2C2_IRQ_PRIORITY         5
+#define STM32_I2C_I2C3_IRQ_PRIORITY         5
+#define STM32_I2C_I2C1_DMA_PRIORITY         3
+#define STM32_I2C_I2C2_DMA_PRIORITY         3
+#define STM32_I2C_I2C3_DMA_PRIORITY         3
+#define STM32_I2C_DMA_ERROR_HOOK(i2cp)      osalSysHalt("DMA failure")
+/*
+ * ICU driver system settings.
+ */
+#define STM32_ICU_USE_TIM1                  FALSE
+#define STM32_ICU_USE_TIM2                  FALSE
+#define STM32_ICU_USE_TIM15                 FALSE
+#define STM32_ICU_USE_TIM16                 FALSE
+/*
+ * PWM driver system settings.
+ */
+#define STM32_PWM_USE_ADVANCED              FALSE
+#define STM32_PWM_USE_TIM1                  FALSE
+#define STM32_PWM_USE_TIM2                  FALSE
+#define STM32_PWM_USE_TIM15                 FALSE
+#define STM32_PWM_USE_TIM16                 FALSE
+/*
+ * RTC driver system settings.
+ */
+#define STM32_RTC_PRESA_VALUE               32
+#define STM32_RTC_PRESS_VALUE               1024
+#define STM32_RTC_CR_INIT                   0
+#define STM32_RTC_TAMPCR_INIT               0
+/*
+ * SDMMC drive system settings.
+ */
+#define STM32_SDC_USE_SDMMC1                FALSE
+#define STM32_SDC_SDMMC_UNALIGNED_SUPPORT   TRUE
+#define STM32_SDC_SDMMC_WRITE_TIMEOUT       1000
+#define STM32_SDC_SDMMC_READ_TIMEOUT        1000
+#define STM32_SDC_SDMMC_CLOCK_DELAY         10
+#define STM32_SDC_SDMMC1_DMA_PRIORITY       3
+#define STM32_SDC_SDMMC1_IRQ_PRIORITY       9
+#define STM32_SDC_SDMMC1_DMA_STREAM         STM32_DMA_STREAM_ID(2, 4)
+/*
+ * SERIAL driver system settings.
+ */
+#define STM32_SERIAL_USE_USART1             FALSE
+#define STM32_SERIAL_USE_USART2             FALSE
+#define STM32_SERIAL_USE_USART3             FALSE
+#define STM32_SERIAL_USE_LPUART1            FALSE
+#define STM32_SERIAL_USART1_PRIORITY        12
+#define STM32_SERIAL_USART2_PRIORITY        12
+#define STM32_SERIAL_USART3_PRIORITY        12
+#define STM32_SERIAL_LPUART1_PRIORITY       12
+/*
+ * SPI driver system settings.
+ */
+#define STM32_SPI_USE_SPI1                  FALSE
+#define STM32_SPI_USE_SPI2                  FALSE
+#define STM32_SPI_USE_SPI3                  FALSE
+#define STM32_SPI_SPI1_RX_DMA_STREAM        STM32_DMA_STREAM_ID(2, 3)
+#define STM32_SPI_SPI1_TX_DMA_STREAM        STM32_DMA_STREAM_ID(2, 4)
+#define STM32_SPI_SPI2_RX_DMA_STREAM        STM32_DMA_STREAM_ID(1, 4)
+#define STM32_SPI_SPI2_TX_DMA_STREAM        STM32_DMA_STREAM_ID(1, 5)
+#define STM32_SPI_SPI3_RX_DMA_STREAM        STM32_DMA_STREAM_ID(2, 1)
+#define STM32_SPI_SPI3_TX_DMA_STREAM        STM32_DMA_STREAM_ID(2, 2)
+#define STM32_SPI_SPI1_DMA_PRIORITY         1
+#define STM32_SPI_SPI2_DMA_PRIORITY         1
+#define STM32_SPI_SPI3_DMA_PRIORITY         1
+#define STM32_SPI_SPI1_IRQ_PRIORITY         10
+#define STM32_SPI_SPI2_IRQ_PRIORITY         10
+#define STM32_SPI_SPI3_IRQ_PRIORITY         10
+#define STM32_SPI_DMA_ERROR_HOOK(spip)      osalSysHalt("DMA failure")
+/*
+ * ST driver system settings.
+ */
+#define STM32_ST_IRQ_PRIORITY               8
+#define STM32_ST_USE_TIMER                  2
+/*
+ * TRNG driver system settings.
+ */
+#define STM32_TRNG_USE_RNG1                 FALSE
+/*
+ * UART driver system settings.
+ */
+#define STM32_UART_USE_USART1               FALSE
+#define STM32_UART_USE_USART2               FALSE
+#define STM32_UART_USE_USART3               FALSE
+#define STM32_UART_USART1_RX_DMA_STREAM     STM32_DMA_STREAM_ID(2, 7)
+#define STM32_UART_USART1_TX_DMA_STREAM     STM32_DMA_STREAM_ID(2, 6)
+#define STM32_UART_USART2_RX_DMA_STREAM     STM32_DMA_STREAM_ID(1, 6)
+#define STM32_UART_USART2_TX_DMA_STREAM     STM32_DMA_STREAM_ID(1, 7)
+#define STM32_UART_USART3_RX_DMA_STREAM     STM32_DMA_STREAM_ID(1, 3)
+#define STM32_UART_USART3_TX_DMA_STREAM     STM32_DMA_STREAM_ID(1, 2)
+#define STM32_UART_DMA_ERROR_HOOK(uartp)    osalSysHalt("DMA failure")
+/*
+ * USB driver system settings.
+ */
+#define STM32_USB_USE_USB1                  TRUE
+#define STM32_USB_LOW_POWER_ON_SUSPEND      FALSE
+#define STM32_USB_USB1_HP_IRQ_PRIORITY      13
+#define STM32_USB_USB1_LP_IRQ_PRIORITY      14
+/*
+ * WDG driver system settings.
+ */
+#define STM32_WDG_USE_IWDG                  FALSE
+/*
+ * WSPI driver system settings.
+ */
+#define STM32_WSPI_USE_QUADSPI1             FALSE
+#define STM32_WSPI_QUADSPI1_DMA_STREAM      STM32_DMA_STREAM_ID(2, 7)
+#endif /* MCUCONF_H */
diff --git a/quantum/mcu_selection.mk b/quantum/mcu_selection.mk
index edf44f5dc..9268c4522 100644
--- a/quantum/mcu_selection.mk
+++ b/quantum/mcu_selection.mk
@@ -435,6 +435,44 @@ ifneq ($(findstring STM32G474, $(MCU)),)
  UF2_FAMILY ?= STM32G4
 endif
+ifneq (,$(filter $(MCU),STM32L433 STM32L443))
+  # Cortex version
+  MCU = cortex-m4
+  # ARM version, CORTEX-M0/M1 are 6, CORTEX-M3/M4/M7 are 7
+  ARMV = 7
+  ## chip/board settings
+  # - the next two should match the directories in
+  #   <chibios>/os/hal/ports/$(MCU_FAMILY)/$(MCU_SERIES)
+  MCU_FAMILY = STM32
+  MCU_SERIES = STM32L4xx
+  # Linker script to use
+  # - it should exist either in <chibios>/os/common/ports/ARMCMx/compilers/GCC/ld/
+  #   or <keyboard_dir>/ld/
+  MCU_LDSCRIPT ?= STM32L432xC
+  # Startup code to use
+  #  - it should exist in <chibios>/os/common/startup/ARMCMx/compilers/GCC/mk/
+  MCU_STARTUP ?= stm32l4xx
+  # Board: it should exist either in <chibios>/os/hal/boards/,
+  # <keyboard_dir>/boards/, or drivers/boards/
+  BOARD ?= GENERIC_STM32_L433XC
+  PLATFORM_NAME ?= platform_l432
+  USE_FPU ?= yes
+  # Options to pass to dfu-util when flashing
+  DFU_ARGS ?= -d 0483:DF11 -a 0 -s 0x08000000:leave
+  DFU_SUFFIX_ARGS ?= -v 0483 -p DF11
+  # UF2 settings
+  UF2_FAMILY ?= STM32L4
+endif
 ifneq (,$(filter $(MCU),at90usb162 atmega16u2 atmega32u2 atmega16u4 atmega32u4 at90usb646 at90usb647 at90usb1286 at90usb1287))
  PROTOCOL = LUFA
author	Xelus22 <17491233+Xelus22@users.noreply.github.com>	2021-04-26 03:07:15 +0000
committer	GitHub <noreply@github.com>	2021-04-26 13:07:15 +1000
commit	9cf82fae9566c68ea2ffcb120375868f27f94ecf (patch)
tree	81cd0c82ec0ae607dbdafa6d47c131a19d4862dd
parent	5168af9a9bd0693cd5bddd4a07bea464015b5e5a (diff)
download	qmk_firmware-9cf82fae9566c68ea2ffcb120375868f27f94ecf.tar.gz qmk_firmware-9cf82fae9566c68ea2ffcb120375868f27f94ecf.zip

diff --git a/data/schemas/keyboard.jsonschema b/data/schemas/keyboard.jsonschema index 99121d79e..c335f49d5 100644 --- a/data/schemas/keyboard.jsonschema +++ b/data/schemas/keyboard.jsonschema
@@ -25,7 +25,7 @@
25	},	25	},
26	"processor": {	26	"processor": {
27	"type": "string",	27	"type": "string",
28	"enum": ["cortex-m0", "cortex-m0plus", "cortex-m3", "cortex-m4", "MKL26Z64", "MK20DX128", "MK20DX256", "MK66F18", "STM32F042", "STM32F072", "STM32F103", "STM32F303", "STM32F401", "STM32F411", "STM32F446", "STM32G431", "STM32G474", "atmega16u2", "atmega32u2", "atmega16u4", "atmega32u4", "at90usb162", "at90usb646", "at90usb647", "at90usb1286", "at90usb1287", "atmega32a", "atmega328p", "atmega328", "attiny85", "unknown"]	28	"enum": ["cortex-m0", "cortex-m0plus", "cortex-m3", "cortex-m4", "MKL26Z64", "MK20DX128", "MK20DX256", "MK66F18", "STM32F042", "STM32F072", "STM32F103", "STM32F303", "STM32F401", "STM32F411", "STM32F446", "STM32G431", "STM32G474", "STM32L433", "STM32L443", "atmega16u2", "atmega32u2", "atmega16u4", "atmega32u4", "at90usb162", "at90usb646", "at90usb647", "at90usb1286", "at90usb1287", "atmega32a", "atmega328p", "atmega328", "attiny85", "unknown"]
29	},	29	},
30	"board": {	30	"board": {
31	"type": "string",	31	"type": "string",


diff --git a/docs/compatible_microcontrollers.md b/docs/compatible_microcontrollers.md index 5e16ab277..0f5b140de 100644 --- a/docs/compatible_microcontrollers.md +++ b/docs/compatible_microcontrollers.md
@@ -31,6 +31,8 @@ You can also use any ARM chip with USB that [ChibiOS](https://www.chibios.org) s
31	* [STM32F446](https://www.st.com/en/microcontrollers-microprocessors/stm32f446.html)	31	* [STM32F446](https://www.st.com/en/microcontrollers-microprocessors/stm32f446.html)
32	* [STM32G431](https://www.st.com/en/microcontrollers-microprocessors/stm32g4x1.html)	32	* [STM32G431](https://www.st.com/en/microcontrollers-microprocessors/stm32g4x1.html)
33	* [STM32G474](https://www.st.com/en/microcontrollers-microprocessors/stm32g4x4.html)	33	* [STM32G474](https://www.st.com/en/microcontrollers-microprocessors/stm32g4x4.html)
		34	* [STM32L433](https://www.st.com/en/microcontrollers-microprocessors/stm32l4x3.html)
		35	* [STM32L443](https://www.st.com/en/microcontrollers-microprocessors/stm32l4x3.html)
34		36
35	### NXP (Kinetis)	37	### NXP (Kinetis)
36		38


diff --git a/docs/ja/compatible_microcontrollers.md b/docs/ja/compatible_microcontrollers.md index 69da70f2c..b675b038d 100644 --- a/docs/ja/compatible_microcontrollers.md +++ b/docs/ja/compatible_microcontrollers.md
@@ -36,6 +36,8 @@ QMK は十分な容量のフラッシュメモリを備えた USB 対応 AVR ま
36	* [STM32F446](https://www.st.com/en/microcontrollers-microprocessors/stm32f446.html)	36	* [STM32F446](https://www.st.com/en/microcontrollers-microprocessors/stm32f446.html)
37	* [STM32G431](https://www.st.com/en/microcontrollers-microprocessors/stm32g4x1.html)	37	* [STM32G431](https://www.st.com/en/microcontrollers-microprocessors/stm32g4x1.html)
38	* [STM32G474](https://www.st.com/en/microcontrollers-microprocessors/stm32g4x4.html)	38	* [STM32G474](https://www.st.com/en/microcontrollers-microprocessors/stm32g4x4.html)
		39	* [STM32L433](https://www.st.com/en/microcontrollers-microprocessors/stm32l4x3.html)
		40	* [STM32L443](https://www.st.com/en/microcontrollers-microprocessors/stm32l4x3.html)
39		41
40	### NXP (Kinetis)	42	### NXP (Kinetis)
41		43


diff --git a/lib/python/qmk/constants.py b/lib/python/qmk/constants.py index 33adb0a13..49e5e0eb4 100644 --- a/lib/python/qmk/constants.py +++ b/lib/python/qmk/constants.py
@@ -10,7 +10,7 @@ QMK_FIRMWARE = Path.cwd()
10	MAX_KEYBOARD_SUBFOLDERS = 5	10	MAX_KEYBOARD_SUBFOLDERS = 5
11		11
12	# Supported processor types	12	# Supported processor types
13	CHIBIOS_PROCESSORS = 'cortex-m0', 'cortex-m0plus', 'cortex-m3', 'cortex-m4', 'MKL26Z64', 'MK20DX128', 'MK20DX256', 'MK66F18', 'STM32F042', 'STM32F072', 'STM32F103', 'STM32F303', 'STM32F401', 'STM32F411', 'STM32F446', 'STM32G431', 'STM32G474'	13	CHIBIOS_PROCESSORS = 'cortex-m0', 'cortex-m0plus', 'cortex-m3', 'cortex-m4', 'MKL26Z64', 'MK20DX128', 'MK20DX256', 'MK66F18', 'STM32F042', 'STM32F072', 'STM32F103', 'STM32F303', 'STM32F401', 'STM32F411', 'STM32F446', 'STM32G431', 'STM32G474', 'STM32L433', 'STM32L443'
14	LUFA_PROCESSORS = 'at90usb162', 'atmega16u2', 'atmega32u2', 'atmega16u4', 'atmega32u4', 'at90usb646', 'at90usb647', 'at90usb1286', 'at90usb1287', None	14	LUFA_PROCESSORS = 'at90usb162', 'atmega16u2', 'atmega32u2', 'atmega16u4', 'atmega32u4', 'at90usb646', 'at90usb647', 'at90usb1286', 'at90usb1287', None
15	VUSB_PROCESSORS = 'atmega32a', 'atmega328p', 'atmega328', 'attiny85'	15	VUSB_PROCESSORS = 'atmega32a', 'atmega328p', 'atmega328', 'attiny85'
16		16


diff --git a/platforms/chibios/GENERIC_STM32_L433XC/board/board.mk b/platforms/chibios/GENERIC_STM32_L433XC/board/board.mk new file mode 100644 index 000000000..1250385eb --- /dev/null +++ b/platforms/chibios/GENERIC_STM32_L433XC/board/board.mk
@@ -0,0 +1,9 @@
		1	# List of all the board related files.
		2	BOARDSRC = $(CHIBIOS)/os/hal/boards/ST_NUCLEO32_L432KC/board.c
		3
		4	# Required include directories
		5	BOARDINC = $(CHIBIOS)/os/hal/boards/ST_NUCLEO32_L432KC
		6
		7	# Shared variables
		8	ALLCSRC += $(BOARDSRC)
		9	ALLINC += $(BOARDINC)


diff --git a/platforms/chibios/GENERIC_STM32_L433XC/configs/board.h b/platforms/chibios/GENERIC_STM32_L433XC/configs/board.h new file mode 100644 index 000000000..51f9724f9 --- /dev/null +++ b/platforms/chibios/GENERIC_STM32_L433XC/configs/board.h
@@ -0,0 +1,24 @@
		1	/* Copyright 2018-2021 Harrison Chan (@Xelus)
		2	*
		3	* This program is free software: you can redistribute it and/or modify
		4	* it under the terms of the GNU General Public License as published by
		5	* the Free Software Foundation, either version 3 of the License, or
		6	* (at your option) any later version.
		7	*
		8	* This program is distributed in the hope that it will be useful,
		9	* but WITHOUT ANY WARRANTY; without even the implied warranty of
		10	* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
		11	* GNU General Public License for more details.
		12	*
		13	* You should have received a copy of the GNU General Public License
		14	* along with this program. If not, see <https://www.gnu.org/licenses/>.
		15	*/
		16	#pragma once
		17
		18	#include_next "board.h"
		19
		20	#undef STM32L432xx
		21
		22	// Pretend that we're an L443xx as the ChibiOS definitions for L432/L433 mistakenly don't enable GPIOH, I2C2, or SPI2.
		23	// Until ChibiOS upstream is fixed, this should be kept at L443, as nothing in QMK currently utilises the crypto peripheral on the L443.
		24	#define STM32L443xx


diff --git a/platforms/chibios/GENERIC_STM32_L433XC/configs/config.h b/platforms/chibios/GENERIC_STM32_L433XC/configs/config.h new file mode 100644 index 000000000..c27c61b19 --- /dev/null +++ b/platforms/chibios/GENERIC_STM32_L433XC/configs/config.h
@@ -0,0 +1,26 @@
		1	/* Copyright 2018-2021 Harrison Chan (@Xelus)
		2	*
		3	* This program is free software: you can redistribute it and/or modify
		4	* it under the terms of the GNU General Public License as published by
		5	* the Free Software Foundation, either version 2 of the License, or
		6	* (at your option) any later version.
		7	*
		8	* This program is distributed in the hope that it will be useful,
		9	* but WITHOUT ANY WARRANTY; without even the implied warranty of
		10	* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
		11	* GNU General Public License for more details.
		12	*
		13	* You should have received a copy of the GNU General Public License
		14	* along with this program. If not, see <http://www.gnu.org/licenses/>.
		15	*/
		16
		17	/* Address for jumping to bootloader on STM32 chips. */
		18	/* It is chip dependent, the correct number can be looked up by checking against ST's application note AN2606.
		19	*/
		20	#define STM32_BOOTLOADER_ADDRESS 0x1FFF0000
		21
		22	#define PAL_STM32_OSPEED_HIGHEST PAL_STM32_OSPEED_HIGH
		23
		24	#ifndef EARLY_INIT_PERFORM_BOOTLOADER_JUMP
		25	# define EARLY_INIT_PERFORM_BOOTLOADER_JUMP TRUE
		26	#endif


diff --git a/platforms/chibios/GENERIC_STM32_L433XC/configs/mcuconf.h b/platforms/chibios/GENERIC_STM32_L433XC/configs/mcuconf.h new file mode 100644 index 000000000..948c740f6 --- /dev/null +++ b/platforms/chibios/GENERIC_STM32_L433XC/configs/mcuconf.h
@@ -0,0 +1,292 @@
		1	/*
		2	ChibiOS - Copyright (C) 2006..2018 Giovanni Di Sirio
		3	Licensed under the Apache License, Version 2.0 (the "License");
		4	you may not use this file except in compliance with the License.
		5	You may obtain a copy of the License at
		6	http://www.apache.org/licenses/LICENSE-2.0
		7	Unless required by applicable law or agreed to in writing, software
		8	distributed under the License is distributed on an "AS IS" BASIS,
		9	WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
		10	See the License for the specific language governing permissions and
		11	limitations under the License.
		12	*/
		13
		14	/*
		15	* STM32L4xx drivers configuration.
		16	* The following settings override the default settings present in
		17	* the various device driver implementation headers.
		18	* Note that the settings for each driver only have effect if the whole
		19	* driver is enabled in halconf.h.
		20	*
		21	* IRQ priorities:
		22	* 15...0 Lowest...Highest.
		23	*
		24	* DMA priorities:
		25	* 0...3 Lowest...Highest.
		26	*/
		27
		28	#ifndef MCUCONF_H
		29	#define MCUCONF_H
		30
		31	#define STM32L4xx_MCUCONF
		32	#define STM32L443_MCUCONF
		33
		34	/*
		35	* HAL driver system settings.
		36	*/
		37	#define STM32_NO_INIT FALSE
		38	#define STM32_VOS STM32_VOS_RANGE1
		39	#define STM32_PVD_ENABLE FALSE
		40	#define STM32_PLS STM32_PLS_LEV0
		41	#define STM32_HSI16_ENABLED TRUE
		42	#define STM32_HSI48_ENABLED TRUE
		43	#define STM32_LSI_ENABLED TRUE
		44	#define STM32_HSE_ENABLED FALSE
		45	#define STM32_LSE_ENABLED FALSE
		46	#define STM32_MSIPLL_ENABLED FALSE
		47	#define STM32_MSIRANGE STM32_MSIRANGE_4M
		48	#define STM32_MSISRANGE STM32_MSISRANGE_4M
		49	#define STM32_SW STM32_SW_PLL
		50	#define STM32_PLLSRC STM32_PLLSRC_HSI16
		51	#define STM32_PLLM_VALUE 1
		52	#define STM32_PLLN_VALUE 10
		53	#define STM32_PLLPDIV_VALUE 0
		54	#define STM32_PLLP_VALUE 7
		55	#define STM32_PLLQ_VALUE 2
		56	#define STM32_PLLR_VALUE 2
		57	#define STM32_HPRE STM32_HPRE_DIV1
		58	#define STM32_PPRE1 STM32_PPRE1_DIV1
		59	#define STM32_PPRE2 STM32_PPRE2_DIV1
		60	#define STM32_STOPWUCK STM32_STOPWUCK_MSI
		61	#define STM32_MCOSEL STM32_MCOSEL_NOCLOCK
		62	#define STM32_MCOPRE STM32_MCOPRE_DIV1
		63	#define STM32_LSCOSEL STM32_LSCOSEL_NOCLOCK
		64	#define STM32_PLLSAI1N_VALUE 24
		65	#define STM32_PLLSAI1PDIV_VALUE 0
		66	#define STM32_PLLSAI1P_VALUE 7
		67	#define STM32_PLLSAI1Q_VALUE 2
		68	#define STM32_PLLSAI1R_VALUE 2
		69
		70	/*
		71	* Peripherals clock sources.
		72	*/
		73	#define STM32_USART1SEL STM32_USART1SEL_SYSCLK
		74	#define STM32_USART2SEL STM32_USART2SEL_SYSCLK
		75	#define STM32_USART3SEL STM32_USART3SEL_SYSCLK
		76	#define STM32_LPUART1SEL STM32_LPUART1SEL_SYSCLK
		77	#define STM32_I2C1SEL STM32_I2C1SEL_SYSCLK
		78	#define STM32_I2C2SEL STM32_I2C2SEL_SYSCLK
		79	#define STM32_I2C3SEL STM32_I2C3SEL_SYSCLK
		80	#define STM32_LPTIM1SEL STM32_LPTIM1SEL_PCLK1
		81	#define STM32_LPTIM2SEL STM32_LPTIM2SEL_PCLK1
		82	#define STM32_SAI1SEL STM32_SAI1SEL_OFF
		83	#define STM32_CLK48SEL STM32_CLK48SEL_HSI48
		84	#define STM32_ADCSEL STM32_ADCSEL_SYSCLK
		85	#define STM32_SWPMI1SEL STM32_SWPMI1SEL_PCLK1
		86	#define STM32_RTCSEL STM32_RTCSEL_LSI
		87
		88	/*
		89	* IRQ system settings.
		90	*/
		91	#define STM32_IRQ_EXTI0_PRIORITY 6
		92	#define STM32_IRQ_EXTI1_PRIORITY 6
		93	#define STM32_IRQ_EXTI2_PRIORITY 6
		94	#define STM32_IRQ_EXTI3_PRIORITY 6
		95	#define STM32_IRQ_EXTI4_PRIORITY 6
		96	#define STM32_IRQ_EXTI5_9_PRIORITY 6
		97	#define STM32_IRQ_EXTI10_15_PRIORITY 6
		98	#define STM32_IRQ_EXTI1635_38_PRIORITY 6
		99	#define STM32_IRQ_EXTI18_PRIORITY 6
		100	#define STM32_IRQ_EXTI19_PRIORITY 6
		101	#define STM32_IRQ_EXTI20_PRIORITY 6
		102	#define STM32_IRQ_EXTI21_22_PRIORITY 15
		103
		104	#define STM32_IRQ_TIM1_BRK_TIM15_PRIORITY 7
		105	#define STM32_IRQ_TIM1_UP_TIM16_PRIORITY 7
		106	#define STM32_IRQ_TIM1_TRGCO_TIM17_PRIORITY 7
		107	#define STM32_IRQ_TIM1_CC_PRIORITY 7
		108	#define STM32_IRQ_TIM2_PRIORITY 7
		109	#define STM32_IRQ_TIM6_PRIORITY 7
		110	#define STM32_IRQ_TIM7_PRIORITY 7
		111
		112	#define STM32_IRQ_USART1_PRIORITY 12
		113	#define STM32_IRQ_USART2_PRIORITY 12
		114	#define STM32_IRQ_USART3_PRIORITY 12
		115	#define STM32_IRQ_LPUART1_PRIORITY 12
		116
		117	/*
		118	* ADC driver system settings.
		119	*/
		120	#define STM32_ADC_COMPACT_SAMPLES FALSE
		121	#define STM32_ADC_USE_ADC1 FALSE
		122	#define STM32_ADC_ADC1_DMA_STREAM STM32_DMA_STREAM_ID(1, 1)
		123	#define STM32_ADC_ADC1_DMA_PRIORITY 2
		124	#define STM32_ADC_ADC12_IRQ_PRIORITY 5
		125	#define STM32_ADC_ADC1_DMA_IRQ_PRIORITY 5
		126	#define STM32_ADC_ADC123_CLOCK_MODE ADC_CCR_CKMODE_AHB_DIV1
		127	#define STM32_ADC_ADC123_PRESC ADC_CCR_PRESC_DIV2
		128
		129	/*
		130	* CAN driver system settings.
		131	*/
		132	#define STM32_CAN_USE_CAN1 FALSE
		133	#define STM32_CAN_CAN1_IRQ_PRIORITY 11
		134
		135	/*
		136	* DAC driver system settings.
		137	*/
		138	#define STM32_DAC_DUAL_MODE FALSE
		139	#define STM32_DAC_USE_DAC1_CH1 FALSE
		140	#define STM32_DAC_USE_DAC1_CH2 FALSE
		141	#define STM32_DAC_DAC1_CH1_IRQ_PRIORITY 10
		142	#define STM32_DAC_DAC1_CH2_IRQ_PRIORITY 10
		143	#define STM32_DAC_DAC1_CH1_DMA_PRIORITY 2
		144	#define STM32_DAC_DAC1_CH2_DMA_PRIORITY 2
		145	#define STM32_DAC_DAC1_CH1_DMA_STREAM STM32_DMA_STREAM_ID(2, 4)
		146	#define STM32_DAC_DAC1_CH2_DMA_STREAM STM32_DMA_STREAM_ID(1, 4)
		147
		148	/*
		149	* GPT driver system settings.
		150	*/
		151	#define STM32_GPT_USE_TIM1 FALSE
		152	#define STM32_GPT_USE_TIM2 FALSE
		153	#define STM32_GPT_USE_TIM6 FALSE
		154	#define STM32_GPT_USE_TIM7 FALSE
		155	#define STM32_GPT_USE_TIM15 FALSE
		156	#define STM32_GPT_USE_TIM16 FALSE
		157
		158	/*
		159	* I2C driver system settings.
		160	*/
		161	#define STM32_I2C_USE_I2C1 FALSE
		162	#define STM32_I2C_USE_I2C2 FALSE
		163	#define STM32_I2C_USE_I2C3 FALSE
		164	#define STM32_I2C_BUSY_TIMEOUT 50
		165	#define STM32_I2C_I2C1_RX_DMA_STREAM STM32_DMA_STREAM_ID(1, 7)
		166	#define STM32_I2C_I2C1_TX_DMA_STREAM STM32_DMA_STREAM_ID(1, 6)
		167	#define STM32_I2C_I2C2_RX_DMA_STREAM STM32_DMA_STREAM_ID(1, 5)
		168	#define STM32_I2C_I2C2_TX_DMA_STREAM STM32_DMA_STREAM_ID(1, 4)
		169	#define STM32_I2C_I2C3_RX_DMA_STREAM STM32_DMA_STREAM_ID(1, 3)
		170	#define STM32_I2C_I2C3_TX_DMA_STREAM STM32_DMA_STREAM_ID(1, 2)
		171	#define STM32_I2C_I2C1_IRQ_PRIORITY 5
		172	#define STM32_I2C_I2C2_IRQ_PRIORITY 5
		173	#define STM32_I2C_I2C3_IRQ_PRIORITY 5
		174	#define STM32_I2C_I2C1_DMA_PRIORITY 3
		175	#define STM32_I2C_I2C2_DMA_PRIORITY 3
		176	#define STM32_I2C_I2C3_DMA_PRIORITY 3
		177	#define STM32_I2C_DMA_ERROR_HOOK(i2cp) osalSysHalt("DMA failure")
		178
		179	/*
		180	* ICU driver system settings.
		181	*/
		182	#define STM32_ICU_USE_TIM1 FALSE
		183	#define STM32_ICU_USE_TIM2 FALSE
		184	#define STM32_ICU_USE_TIM15 FALSE
		185	#define STM32_ICU_USE_TIM16 FALSE
		186
		187	/*
		188	* PWM driver system settings.
		189	*/
		190	#define STM32_PWM_USE_ADVANCED FALSE
		191	#define STM32_PWM_USE_TIM1 FALSE
		192	#define STM32_PWM_USE_TIM2 FALSE
		193	#define STM32_PWM_USE_TIM15 FALSE
		194	#define STM32_PWM_USE_TIM16 FALSE
		195
		196	/*
		197	* RTC driver system settings.
		198	*/
		199	#define STM32_RTC_PRESA_VALUE 32
		200	#define STM32_RTC_PRESS_VALUE 1024
		201	#define STM32_RTC_CR_INIT 0
		202	#define STM32_RTC_TAMPCR_INIT 0
		203
		204	/*
		205	* SDMMC drive system settings.
		206	*/
		207	#define STM32_SDC_USE_SDMMC1 FALSE
		208	#define STM32_SDC_SDMMC_UNALIGNED_SUPPORT TRUE
		209	#define STM32_SDC_SDMMC_WRITE_TIMEOUT 1000
		210	#define STM32_SDC_SDMMC_READ_TIMEOUT 1000
		211	#define STM32_SDC_SDMMC_CLOCK_DELAY 10
		212	#define STM32_SDC_SDMMC1_DMA_PRIORITY 3
		213	#define STM32_SDC_SDMMC1_IRQ_PRIORITY 9
		214	#define STM32_SDC_SDMMC1_DMA_STREAM STM32_DMA_STREAM_ID(2, 4)
		215
		216	/*
		217	* SERIAL driver system settings.
		218	*/
		219	#define STM32_SERIAL_USE_USART1 FALSE
		220	#define STM32_SERIAL_USE_USART2 FALSE
		221	#define STM32_SERIAL_USE_USART3 FALSE
		222	#define STM32_SERIAL_USE_LPUART1 FALSE
		223	#define STM32_SERIAL_USART1_PRIORITY 12
		224	#define STM32_SERIAL_USART2_PRIORITY 12
		225	#define STM32_SERIAL_USART3_PRIORITY 12
		226	#define STM32_SERIAL_LPUART1_PRIORITY 12
		227
		228	/*
		229	* SPI driver system settings.
		230	*/
		231	#define STM32_SPI_USE_SPI1 FALSE
		232	#define STM32_SPI_USE_SPI2 FALSE
		233	#define STM32_SPI_USE_SPI3 FALSE
		234	#define STM32_SPI_SPI1_RX_DMA_STREAM STM32_DMA_STREAM_ID(2, 3)
		235	#define STM32_SPI_SPI1_TX_DMA_STREAM STM32_DMA_STREAM_ID(2, 4)
		236	#define STM32_SPI_SPI2_RX_DMA_STREAM STM32_DMA_STREAM_ID(1, 4)
		237	#define STM32_SPI_SPI2_TX_DMA_STREAM STM32_DMA_STREAM_ID(1, 5)
		238	#define STM32_SPI_SPI3_RX_DMA_STREAM STM32_DMA_STREAM_ID(2, 1)
		239	#define STM32_SPI_SPI3_TX_DMA_STREAM STM32_DMA_STREAM_ID(2, 2)
		240	#define STM32_SPI_SPI1_DMA_PRIORITY 1
		241	#define STM32_SPI_SPI2_DMA_PRIORITY 1
		242	#define STM32_SPI_SPI3_DMA_PRIORITY 1
		243	#define STM32_SPI_SPI1_IRQ_PRIORITY 10
		244	#define STM32_SPI_SPI2_IRQ_PRIORITY 10
		245	#define STM32_SPI_SPI3_IRQ_PRIORITY 10
		246	#define STM32_SPI_DMA_ERROR_HOOK(spip) osalSysHalt("DMA failure")
		247
		248	/*
		249	* ST driver system settings.
		250	*/
		251	#define STM32_ST_IRQ_PRIORITY 8
		252	#define STM32_ST_USE_TIMER 2
		253
		254	/*
		255	* TRNG driver system settings.
		256	*/
		257	#define STM32_TRNG_USE_RNG1 FALSE
		258
		259	/*
		260	* UART driver system settings.
		261	*/
		262	#define STM32_UART_USE_USART1 FALSE
		263	#define STM32_UART_USE_USART2 FALSE
		264	#define STM32_UART_USE_USART3 FALSE
		265	#define STM32_UART_USART1_RX_DMA_STREAM STM32_DMA_STREAM_ID(2, 7)
		266	#define STM32_UART_USART1_TX_DMA_STREAM STM32_DMA_STREAM_ID(2, 6)
		267	#define STM32_UART_USART2_RX_DMA_STREAM STM32_DMA_STREAM_ID(1, 6)
		268	#define STM32_UART_USART2_TX_DMA_STREAM STM32_DMA_STREAM_ID(1, 7)
		269	#define STM32_UART_USART3_RX_DMA_STREAM STM32_DMA_STREAM_ID(1, 3)
		270	#define STM32_UART_USART3_TX_DMA_STREAM STM32_DMA_STREAM_ID(1, 2)
		271	#define STM32_UART_DMA_ERROR_HOOK(uartp) osalSysHalt("DMA failure")
		272
		273	/*
		274	* USB driver system settings.
		275	*/
		276	#define STM32_USB_USE_USB1 TRUE
		277	#define STM32_USB_LOW_POWER_ON_SUSPEND FALSE
		278	#define STM32_USB_USB1_HP_IRQ_PRIORITY 13
		279	#define STM32_USB_USB1_LP_IRQ_PRIORITY 14
		280
		281	/*
		282	* WDG driver system settings.
		283	*/
		284	#define STM32_WDG_USE_IWDG FALSE
		285
		286	/*
		287	* WSPI driver system settings.
		288	*/
		289	#define STM32_WSPI_USE_QUADSPI1 FALSE
		290	#define STM32_WSPI_QUADSPI1_DMA_STREAM STM32_DMA_STREAM_ID(2, 7)
		291
		292	#endif /* MCUCONF_H */


diff --git a/quantum/mcu_selection.mk b/quantum/mcu_selection.mk index edf44f5dc..9268c4522 100644 --- a/quantum/mcu_selection.mk +++ b/quantum/mcu_selection.mk
@@ -435,6 +435,44 @@ ifneq ($(findstring STM32G474, $(MCU)),)
435	UF2_FAMILY ?= STM32G4	435	UF2_FAMILY ?= STM32G4
436	endif	436	endif
437		437
		438	ifneq (,$(filter $(MCU),STM32L433 STM32L443))
		439	# Cortex version
		440	MCU = cortex-m4
		441
		442	# ARM version, CORTEX-M0/M1 are 6, CORTEX-M3/M4/M7 are 7
		443	ARMV = 7
		444
		445	## chip/board settings
		446	# - the next two should match the directories in
		447	# <chibios>/os/hal/ports/$(MCU_FAMILY)/$(MCU_SERIES)
		448	MCU_FAMILY = STM32
		449	MCU_SERIES = STM32L4xx
		450
		451	# Linker script to use
		452	# - it should exist either in <chibios>/os/common/ports/ARMCMx/compilers/GCC/ld/
		453	# or <keyboard_dir>/ld/
		454	MCU_LDSCRIPT ?= STM32L432xC
		455
		456	# Startup code to use
		457	# - it should exist in <chibios>/os/common/startup/ARMCMx/compilers/GCC/mk/
		458	MCU_STARTUP ?= stm32l4xx
		459
		460	# Board: it should exist either in <chibios>/os/hal/boards/,
		461	# <keyboard_dir>/boards/, or drivers/boards/
		462	BOARD ?= GENERIC_STM32_L433XC
		463
		464	PLATFORM_NAME ?= platform_l432
		465
		466	USE_FPU ?= yes
		467
		468	# Options to pass to dfu-util when flashing
		469	DFU_ARGS ?= -d 0483:DF11 -a 0 -s 0x08000000:leave
		470	DFU_SUFFIX_ARGS ?= -v 0483 -p DF11
		471
		472	# UF2 settings
		473	UF2_FAMILY ?= STM32L4
		474	endif
		475
438	ifneq (,$(filter $(MCU),at90usb162 atmega16u2 atmega32u2 atmega16u4 atmega32u4 at90usb646 at90usb647 at90usb1286 at90usb1287))	476	ifneq (,$(filter $(MCU),at90usb162 atmega16u2 atmega32u2 atmega16u4 atmega32u4 at90usb646 at90usb647 at90usb1286 at90usb1287))
439	PROTOCOL = LUFA	477	PROTOCOL = LUFA
440		478