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| author | skullY <skullydazed@gmail.com> | 2019-08-30 11:19:03 -0700 |
|---|---|---|
| committer | skullydazed <skullydazed@users.noreply.github.com> | 2019-08-30 15:01:52 -0700 |
| commit | b624f32f944acdc59dcb130674c09090c5c404cb (patch) | |
| tree | bc13adbba137d122d9a2c2fb2fafcbb08ac10e25 /drivers/arm/i2c_master.c | |
| parent | 61af76a10d00aba185b8338604171de490a13e3b (diff) | |
| download | qmk_firmware-b624f32f944acdc59dcb130674c09090c5c404cb.tar.gz qmk_firmware-b624f32f944acdc59dcb130674c09090c5c404cb.zip | |
clang-format changes
Diffstat (limited to 'drivers/arm/i2c_master.c')
| -rw-r--r-- | drivers/arm/i2c_master.c | 121 |
1 files changed, 53 insertions, 68 deletions
diff --git a/drivers/arm/i2c_master.c b/drivers/arm/i2c_master.c index cba5a1c67..18068d3a6 100644 --- a/drivers/arm/i2c_master.c +++ b/drivers/arm/i2c_master.c | |||
| @@ -34,98 +34,83 @@ static uint8_t i2c_address; | |||
| 34 | 34 | ||
| 35 | static const I2CConfig i2cconfig = { | 35 | static const I2CConfig i2cconfig = { |
| 36 | #ifdef USE_I2CV1 | 36 | #ifdef USE_I2CV1 |
| 37 | I2C1_OPMODE, | 37 | I2C1_OPMODE, |
| 38 | I2C1_CLOCK_SPEED, | 38 | I2C1_CLOCK_SPEED, |
| 39 | I2C1_DUTY_CYCLE, | 39 | I2C1_DUTY_CYCLE, |
| 40 | #else | 40 | #else |
| 41 | STM32_TIMINGR_PRESC(I2C1_TIMINGR_PRESC) | | 41 | STM32_TIMINGR_PRESC(I2C1_TIMINGR_PRESC) | STM32_TIMINGR_SCLDEL(I2C1_TIMINGR_SCLDEL) | STM32_TIMINGR_SDADEL(I2C1_TIMINGR_SDADEL) | STM32_TIMINGR_SCLH(I2C1_TIMINGR_SCLH) | STM32_TIMINGR_SCLL(I2C1_TIMINGR_SCLL), 0, 0 |
| 42 | STM32_TIMINGR_SCLDEL(I2C1_TIMINGR_SCLDEL) | STM32_TIMINGR_SDADEL(I2C1_TIMINGR_SDADEL) | | ||
| 43 | STM32_TIMINGR_SCLH(I2C1_TIMINGR_SCLH) | STM32_TIMINGR_SCLL(I2C1_TIMINGR_SCLL), | ||
| 44 | 0, | ||
| 45 | 0 | ||
| 46 | #endif | 42 | #endif |
| 47 | }; | 43 | }; |
| 48 | 44 | ||
| 49 | static i2c_status_t chibios_to_qmk(const msg_t* status) { | 45 | static i2c_status_t chibios_to_qmk(const msg_t* status) { |
| 50 | switch (*status) { | 46 | switch (*status) { |
| 51 | case I2C_NO_ERROR: | 47 | case I2C_NO_ERROR: |
| 52 | return I2C_STATUS_SUCCESS; | 48 | return I2C_STATUS_SUCCESS; |
| 53 | case I2C_TIMEOUT: | 49 | case I2C_TIMEOUT: |
| 54 | return I2C_STATUS_TIMEOUT; | 50 | return I2C_STATUS_TIMEOUT; |
| 55 | // I2C_BUS_ERROR, I2C_ARBITRATION_LOST, I2C_ACK_FAILURE, I2C_OVERRUN, I2C_PEC_ERROR, I2C_SMB_ALERT | 51 | // I2C_BUS_ERROR, I2C_ARBITRATION_LOST, I2C_ACK_FAILURE, I2C_OVERRUN, I2C_PEC_ERROR, I2C_SMB_ALERT |
| 56 | default: | 52 | default: |
| 57 | return I2C_STATUS_ERROR; | 53 | return I2C_STATUS_ERROR; |
| 58 | } | 54 | } |
| 59 | } | 55 | } |
| 60 | 56 | ||
| 61 | __attribute__ ((weak)) | 57 | __attribute__((weak)) void i2c_init(void) { |
| 62 | void i2c_init(void) | 58 | // Try releasing special pins for a short time |
| 63 | { | 59 | palSetPadMode(I2C1_SCL_BANK, I2C1_SCL, PAL_MODE_INPUT); |
| 64 | // Try releasing special pins for a short time | 60 | palSetPadMode(I2C1_SDA_BANK, I2C1_SDA, PAL_MODE_INPUT); |
| 65 | palSetPadMode(I2C1_SCL_BANK, I2C1_SCL, PAL_MODE_INPUT); | ||
| 66 | palSetPadMode(I2C1_SDA_BANK, I2C1_SDA, PAL_MODE_INPUT); | ||
| 67 | 61 | ||
| 68 | chThdSleepMilliseconds(10); | 62 | chThdSleepMilliseconds(10); |
| 69 | 63 | ||
| 70 | #ifdef USE_I2CV1 | 64 | #ifdef USE_I2CV1 |
| 71 | palSetPadMode(I2C1_SCL_BANK, I2C1_SCL, PAL_MODE_STM32_ALTERNATE_OPENDRAIN); | 65 | palSetPadMode(I2C1_SCL_BANK, I2C1_SCL, PAL_MODE_STM32_ALTERNATE_OPENDRAIN); |
| 72 | palSetPadMode(I2C1_SDA_BANK, I2C1_SDA, PAL_MODE_STM32_ALTERNATE_OPENDRAIN); | 66 | palSetPadMode(I2C1_SDA_BANK, I2C1_SDA, PAL_MODE_STM32_ALTERNATE_OPENDRAIN); |
| 73 | #else | 67 | #else |
| 74 | palSetPadMode(I2C1_SCL_BANK, I2C1_SCL, PAL_MODE_ALTERNATE(I2C1_SCL_PAL_MODE) | PAL_STM32_OTYPE_OPENDRAIN); | 68 | palSetPadMode(I2C1_SCL_BANK, I2C1_SCL, PAL_MODE_ALTERNATE(I2C1_SCL_PAL_MODE) | PAL_STM32_OTYPE_OPENDRAIN); |
| 75 | palSetPadMode(I2C1_SDA_BANK, I2C1_SDA, PAL_MODE_ALTERNATE(I2C1_SDA_PAL_MODE) | PAL_STM32_OTYPE_OPENDRAIN); | 69 | palSetPadMode(I2C1_SDA_BANK, I2C1_SDA, PAL_MODE_ALTERNATE(I2C1_SDA_PAL_MODE) | PAL_STM32_OTYPE_OPENDRAIN); |
| 76 | #endif | 70 | #endif |
| 77 | 71 | ||
| 78 | //i2cInit(); //This is invoked by halInit() so no need to redo it. | 72 | // i2cInit(); //This is invoked by halInit() so no need to redo it. |
| 79 | } | 73 | } |
| 80 | 74 | ||
| 81 | i2c_status_t i2c_start(uint8_t address) | 75 | i2c_status_t i2c_start(uint8_t address) { |
| 82 | { | 76 | i2c_address = address; |
| 83 | i2c_address = address; | 77 | i2cStart(&I2C_DRIVER, &i2cconfig); |
| 84 | i2cStart(&I2C_DRIVER, &i2cconfig); | 78 | return I2C_STATUS_SUCCESS; |
| 85 | return I2C_STATUS_SUCCESS; | ||
| 86 | } | 79 | } |
| 87 | 80 | ||
| 88 | i2c_status_t i2c_transmit(uint8_t address, const uint8_t* data, uint16_t length, uint16_t timeout) | 81 | i2c_status_t i2c_transmit(uint8_t address, const uint8_t* data, uint16_t length, uint16_t timeout) { |
| 89 | { | 82 | i2c_address = address; |
| 90 | i2c_address = address; | 83 | i2cStart(&I2C_DRIVER, &i2cconfig); |
| 91 | i2cStart(&I2C_DRIVER, &i2cconfig); | 84 | msg_t status = i2cMasterTransmitTimeout(&I2C_DRIVER, (i2c_address >> 1), data, length, 0, 0, MS2ST(timeout)); |
| 92 | msg_t status = i2cMasterTransmitTimeout(&I2C_DRIVER, (i2c_address >> 1), data, length, 0, 0, MS2ST(timeout)); | 85 | return chibios_to_qmk(&status); |
| 93 | return chibios_to_qmk(&status); | ||
| 94 | } | 86 | } |
| 95 | 87 | ||
| 96 | i2c_status_t i2c_receive(uint8_t address, uint8_t* data, uint16_t length, uint16_t timeout) | 88 | i2c_status_t i2c_receive(uint8_t address, uint8_t* data, uint16_t length, uint16_t timeout) { |
| 97 | { | 89 | i2c_address = address; |
| 98 | i2c_address = address; | 90 | i2cStart(&I2C_DRIVER, &i2cconfig); |
| 99 | i2cStart(&I2C_DRIVER, &i2cconfig); | 91 | msg_t status = i2cMasterReceiveTimeout(&I2C_DRIVER, (i2c_address >> 1), data, length, MS2ST(timeout)); |
| 100 | msg_t status = i2cMasterReceiveTimeout(&I2C_DRIVER, (i2c_address >> 1), data, length, MS2ST(timeout)); | 92 | return chibios_to_qmk(&status); |
| 101 | return chibios_to_qmk(&status); | ||
| 102 | } | 93 | } |
| 103 | 94 | ||
| 104 | i2c_status_t i2c_writeReg(uint8_t devaddr, uint8_t regaddr, const uint8_t* data, uint16_t length, uint16_t timeout) | 95 | i2c_status_t i2c_writeReg(uint8_t devaddr, uint8_t regaddr, const uint8_t* data, uint16_t length, uint16_t timeout) { |
| 105 | { | 96 | i2c_address = devaddr; |
| 106 | i2c_address = devaddr; | 97 | i2cStart(&I2C_DRIVER, &i2cconfig); |
| 107 | i2cStart(&I2C_DRIVER, &i2cconfig); | ||
| 108 | 98 | ||
| 109 | uint8_t complete_packet[length + 1]; | 99 | uint8_t complete_packet[length + 1]; |
| 110 | for(uint8_t i = 0; i < length; i++) | 100 | for (uint8_t i = 0; i < length; i++) { |
| 111 | { | 101 | complete_packet[i + 1] = data[i]; |
| 112 | complete_packet[i+1] = data[i]; | 102 | } |
| 113 | } | 103 | complete_packet[0] = regaddr; |
| 114 | complete_packet[0] = regaddr; | ||
| 115 | 104 | ||
| 116 | msg_t status = i2cMasterTransmitTimeout(&I2C_DRIVER, (i2c_address >> 1), complete_packet, length + 1, 0, 0, MS2ST(timeout)); | 105 | msg_t status = i2cMasterTransmitTimeout(&I2C_DRIVER, (i2c_address >> 1), complete_packet, length + 1, 0, 0, MS2ST(timeout)); |
| 117 | return chibios_to_qmk(&status); | 106 | return chibios_to_qmk(&status); |
| 118 | } | 107 | } |
| 119 | 108 | ||
| 120 | i2c_status_t i2c_readReg(uint8_t devaddr, uint8_t regaddr, uint8_t* data, uint16_t length, uint16_t timeout) | 109 | i2c_status_t i2c_readReg(uint8_t devaddr, uint8_t regaddr, uint8_t* data, uint16_t length, uint16_t timeout) { |
| 121 | { | 110 | i2c_address = devaddr; |
| 122 | i2c_address = devaddr; | 111 | i2cStart(&I2C_DRIVER, &i2cconfig); |
| 123 | i2cStart(&I2C_DRIVER, &i2cconfig); | 112 | msg_t status = i2cMasterTransmitTimeout(&I2C_DRIVER, (i2c_address >> 1), ®addr, 1, data, length, MS2ST(timeout)); |
| 124 | msg_t status = i2cMasterTransmitTimeout(&I2C_DRIVER, (i2c_address >> 1), ®addr, 1, data, length, MS2ST(timeout)); | 113 | return chibios_to_qmk(&status); |
| 125 | return chibios_to_qmk(&status); | ||
| 126 | } | 114 | } |
| 127 | 115 | ||
| 128 | void i2c_stop(void) | 116 | void i2c_stop(void) { i2cStop(&I2C_DRIVER); } |
| 129 | { | ||
| 130 | i2cStop(&I2C_DRIVER); | ||
| 131 | } | ||
