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| author | yiancar <yiangosyiangou@cytanet.com.cy> | 2018-07-18 19:55:57 +0300 |
|---|---|---|
| committer | Jack Humbert <jack.humb@gmail.com> | 2018-07-18 12:55:57 -0400 |
| commit | 72fd49b1468d6bbfa59e1c6334866d7aa34f31c1 (patch) | |
| tree | d9d5d7a66eebd37765e2ff103e09ed57d787eae9 /drivers/avr/i2c_master.c | |
| parent | 7e9a7af672ab226cc57f05f362d6b1e965ac56e6 (diff) | |
| download | qmk_firmware-72fd49b1468d6bbfa59e1c6334866d7aa34f31c1.tar.gz qmk_firmware-72fd49b1468d6bbfa59e1c6334866d7aa34f31c1.zip | |
DC01 keyboard addition (#3428)
* DC01 initial commit
- Addition of directories
- Left readme
* Initial commit of left half
* Initial files for right half
* arrow
* i2c adjustments
* I2C slave and DC01 refractoring
- Cleaned up state machine of I2C slave driver
- Modified DC01 left to use already pressent I2C master driver
- Modified DC01 matrixes
* Fixed tabs to spaces
* Addition of Numpad
* Add keymaps
- Orthopad keymap for numpad module
- Numpad keymap for numpad module
- ISO, ANSI and HHKB version of keymap for right module
* Minor matrix.c fixes
* Update Readmes
Diffstat (limited to 'drivers/avr/i2c_master.c')
| -rwxr-xr-x | drivers/avr/i2c_master.c | 110 |
1 files changed, 55 insertions, 55 deletions
diff --git a/drivers/avr/i2c_master.c b/drivers/avr/i2c_master.c index 4e76e2e7c..47c6f8e6c 100755 --- a/drivers/avr/i2c_master.c +++ b/drivers/avr/i2c_master.c | |||
| @@ -15,15 +15,15 @@ | |||
| 15 | void i2c_init(void) | 15 | void i2c_init(void) |
| 16 | { | 16 | { |
| 17 | TWSR = 0; /* no prescaler */ | 17 | TWSR = 0; /* no prescaler */ |
| 18 | TWBR = (uint8_t)TWBR_val; | 18 | TWBR = (uint8_t)TWBR_val; |
| 19 | } | 19 | } |
| 20 | 20 | ||
| 21 | i2c_status_t i2c_start(uint8_t address, uint16_t timeout) | 21 | i2c_status_t i2c_start(uint8_t address, uint16_t timeout) |
| 22 | { | 22 | { |
| 23 | // reset TWI control register | 23 | // reset TWI control register |
| 24 | TWCR = 0; | 24 | TWCR = 0; |
| 25 | // transmit START condition | 25 | // transmit START condition |
| 26 | TWCR = (1<<TWINT) | (1<<TWSTA) | (1<<TWEN); | 26 | TWCR = (1<<TWINT) | (1<<TWSTA) | (1<<TWEN); |
| 27 | 27 | ||
| 28 | uint16_t timeout_timer = timer_read(); | 28 | uint16_t timeout_timer = timer_read(); |
| 29 | while( !(TWCR & (1<<TWINT)) ) { | 29 | while( !(TWCR & (1<<TWINT)) ) { |
| @@ -32,13 +32,13 @@ i2c_status_t i2c_start(uint8_t address, uint16_t timeout) | |||
| 32 | } | 32 | } |
| 33 | } | 33 | } |
| 34 | 34 | ||
| 35 | // check if the start condition was successfully transmitted | 35 | // check if the start condition was successfully transmitted |
| 36 | if(((TW_STATUS & 0xF8) != TW_START) && ((TW_STATUS & 0xF8) != TW_REP_START)){ return I2C_STATUS_ERROR; } | 36 | if(((TW_STATUS & 0xF8) != TW_START) && ((TW_STATUS & 0xF8) != TW_REP_START)){ return I2C_STATUS_ERROR; } |
| 37 | 37 | ||
| 38 | // load slave address into data register | 38 | // load slave address into data register |
| 39 | TWDR = address; | 39 | TWDR = address; |
| 40 | // start transmission of address | 40 | // start transmission of address |
| 41 | TWCR = (1<<TWINT) | (1<<TWEN); | 41 | TWCR = (1<<TWINT) | (1<<TWEN); |
| 42 | 42 | ||
| 43 | timeout_timer = timer_read(); | 43 | timeout_timer = timer_read(); |
| 44 | while( !(TWCR & (1<<TWINT)) ) { | 44 | while( !(TWCR & (1<<TWINT)) ) { |
| @@ -47,19 +47,19 @@ i2c_status_t i2c_start(uint8_t address, uint16_t timeout) | |||
| 47 | } | 47 | } |
| 48 | } | 48 | } |
| 49 | 49 | ||
| 50 | // check if the device has acknowledged the READ / WRITE mode | 50 | // check if the device has acknowledged the READ / WRITE mode |
| 51 | uint8_t twst = TW_STATUS & 0xF8; | 51 | uint8_t twst = TW_STATUS & 0xF8; |
| 52 | if ( (twst != TW_MT_SLA_ACK) && (twst != TW_MR_SLA_ACK) ) return I2C_STATUS_ERROR; | 52 | if ( (twst != TW_MT_SLA_ACK) && (twst != TW_MR_SLA_ACK) ) return I2C_STATUS_ERROR; |
| 53 | 53 | ||
| 54 | return I2C_STATUS_SUCCESS; | 54 | return I2C_STATUS_SUCCESS; |
| 55 | } | 55 | } |
| 56 | 56 | ||
| 57 | i2c_status_t i2c_write(uint8_t data, uint16_t timeout) | 57 | i2c_status_t i2c_write(uint8_t data, uint16_t timeout) |
| 58 | { | 58 | { |
| 59 | // load data into data register | 59 | // load data into data register |
| 60 | TWDR = data; | 60 | TWDR = data; |
| 61 | // start transmission of data | 61 | // start transmission of data |
| 62 | TWCR = (1<<TWINT) | (1<<TWEN); | 62 | TWCR = (1<<TWINT) | (1<<TWEN); |
| 63 | 63 | ||
| 64 | uint16_t timeout_timer = timer_read(); | 64 | uint16_t timeout_timer = timer_read(); |
| 65 | while( !(TWCR & (1<<TWINT)) ) { | 65 | while( !(TWCR & (1<<TWINT)) ) { |
| @@ -68,16 +68,16 @@ i2c_status_t i2c_write(uint8_t data, uint16_t timeout) | |||
| 68 | } | 68 | } |
| 69 | } | 69 | } |
| 70 | 70 | ||
| 71 | if( (TW_STATUS & 0xF8) != TW_MT_DATA_ACK ){ return I2C_STATUS_ERROR; } | 71 | if( (TW_STATUS & 0xF8) != TW_MT_DATA_ACK ){ return I2C_STATUS_ERROR; } |
| 72 | 72 | ||
| 73 | return I2C_STATUS_SUCCESS; | 73 | return I2C_STATUS_SUCCESS; |
| 74 | } | 74 | } |
| 75 | 75 | ||
| 76 | int16_t i2c_read_ack(uint16_t timeout) | 76 | int16_t i2c_read_ack(uint16_t timeout) |
| 77 | { | 77 | { |
| 78 | 78 | ||
| 79 | // start TWI module and acknowledge data after reception | 79 | // start TWI module and acknowledge data after reception |
| 80 | TWCR = (1<<TWINT) | (1<<TWEN) | (1<<TWEA); | 80 | TWCR = (1<<TWINT) | (1<<TWEN) | (1<<TWEA); |
| 81 | 81 | ||
| 82 | uint16_t timeout_timer = timer_read(); | 82 | uint16_t timeout_timer = timer_read(); |
| 83 | while( !(TWCR & (1<<TWINT)) ) { | 83 | while( !(TWCR & (1<<TWINT)) ) { |
| @@ -86,15 +86,15 @@ int16_t i2c_read_ack(uint16_t timeout) | |||
| 86 | } | 86 | } |
| 87 | } | 87 | } |
| 88 | 88 | ||
| 89 | // return received data from TWDR | 89 | // return received data from TWDR |
| 90 | return TWDR; | 90 | return TWDR; |
| 91 | } | 91 | } |
| 92 | 92 | ||
| 93 | int16_t i2c_read_nack(uint16_t timeout) | 93 | int16_t i2c_read_nack(uint16_t timeout) |
| 94 | { | 94 | { |
| 95 | 95 | ||
| 96 | // start receiving without acknowledging reception | 96 | // start receiving without acknowledging reception |
| 97 | TWCR = (1<<TWINT) | (1<<TWEN); | 97 | TWCR = (1<<TWINT) | (1<<TWEN); |
| 98 | 98 | ||
| 99 | uint16_t timeout_timer = timer_read(); | 99 | uint16_t timeout_timer = timer_read(); |
| 100 | while( !(TWCR & (1<<TWINT)) ) { | 100 | while( !(TWCR & (1<<TWINT)) ) { |
| @@ -103,39 +103,39 @@ int16_t i2c_read_nack(uint16_t timeout) | |||
| 103 | } | 103 | } |
| 104 | } | 104 | } |
| 105 | 105 | ||
| 106 | // return received data from TWDR | 106 | // return received data from TWDR |
| 107 | return TWDR; | 107 | return TWDR; |
| 108 | } | 108 | } |
| 109 | 109 | ||
| 110 | i2c_status_t i2c_transmit(uint8_t address, uint8_t* data, uint16_t length, uint16_t timeout) | 110 | i2c_status_t i2c_transmit(uint8_t address, uint8_t* data, uint16_t length, uint16_t timeout) |
| 111 | { | 111 | { |
| 112 | i2c_status_t status = i2c_start(address | I2C_WRITE, timeout); | 112 | i2c_status_t status = i2c_start(address | I2C_WRITE, timeout); |
| 113 | if (status) return status; | 113 | if (status) return status; |
| 114 | 114 | ||
| 115 | for (uint16_t i = 0; i < length; i++) { | 115 | for (uint16_t i = 0; i < length; i++) { |
| 116 | status = i2c_write(data[i], timeout); | 116 | status = i2c_write(data[i], timeout); |
| 117 | if (status) return status; | 117 | if (status) return status; |
| 118 | } | 118 | } |
| 119 | 119 | ||
| 120 | status = i2c_stop(timeout); | 120 | status = i2c_stop(timeout); |
| 121 | if (status) return status; | 121 | if (status) return status; |
| 122 | 122 | ||
| 123 | return I2C_STATUS_SUCCESS; | 123 | return I2C_STATUS_SUCCESS; |
| 124 | } | 124 | } |
| 125 | 125 | ||
| 126 | i2c_status_t i2c_receive(uint8_t address, uint8_t* data, uint16_t length, uint16_t timeout) | 126 | i2c_status_t i2c_receive(uint8_t address, uint8_t* data, uint16_t length, uint16_t timeout) |
| 127 | { | 127 | { |
| 128 | i2c_status_t status = i2c_start(address | I2C_READ, timeout); | 128 | i2c_status_t status = i2c_start(address | I2C_READ, timeout); |
| 129 | if (status) return status; | 129 | if (status) return status; |
| 130 | 130 | ||
| 131 | for (uint16_t i = 0; i < (length-1); i++) { | 131 | for (uint16_t i = 0; i < (length-1); i++) { |
| 132 | status = i2c_read_ack(timeout); | 132 | status = i2c_read_ack(timeout); |
| 133 | if (status >= 0) { | 133 | if (status >= 0) { |
| 134 | data[i] = status; | 134 | data[i] = status; |
| 135 | } else { | 135 | } else { |
| 136 | return status; | 136 | return status; |
| 137 | } | 137 | } |
| 138 | } | 138 | } |
| 139 | 139 | ||
| 140 | status = i2c_read_nack(timeout); | 140 | status = i2c_read_nack(timeout); |
| 141 | if (status >= 0 ) { | 141 | if (status >= 0 ) { |
| @@ -147,47 +147,47 @@ i2c_status_t i2c_receive(uint8_t address, uint8_t* data, uint16_t length, uint16 | |||
| 147 | status = i2c_stop(timeout); | 147 | status = i2c_stop(timeout); |
| 148 | if (status) return status; | 148 | if (status) return status; |
| 149 | 149 | ||
| 150 | return I2C_STATUS_SUCCESS; | 150 | return I2C_STATUS_SUCCESS; |
| 151 | } | 151 | } |
| 152 | 152 | ||
| 153 | i2c_status_t i2c_writeReg(uint8_t devaddr, uint8_t regaddr, uint8_t* data, uint16_t length, uint16_t timeout) | 153 | i2c_status_t i2c_writeReg(uint8_t devaddr, uint8_t regaddr, uint8_t* data, uint16_t length, uint16_t timeout) |
| 154 | { | 154 | { |
| 155 | i2c_status_t status = i2c_start(devaddr | 0x00, timeout); | 155 | i2c_status_t status = i2c_start(devaddr | 0x00, timeout); |
| 156 | if (status) return status; | 156 | if (status) return status; |
| 157 | 157 | ||
| 158 | status = i2c_write(regaddr, timeout); | 158 | status = i2c_write(regaddr, timeout); |
| 159 | if (status) return status; | 159 | if (status) return status; |
| 160 | 160 | ||
| 161 | for (uint16_t i = 0; i < length; i++) { | 161 | for (uint16_t i = 0; i < length; i++) { |
| 162 | status = i2c_write(data[i], timeout); | 162 | status = i2c_write(data[i], timeout); |
| 163 | if (status) return status; | 163 | if (status) return status; |
| 164 | } | 164 | } |
| 165 | 165 | ||
| 166 | status = i2c_stop(timeout); | 166 | status = i2c_stop(timeout); |
| 167 | if (status) return status; | 167 | if (status) return status; |
| 168 | 168 | ||
| 169 | return I2C_STATUS_SUCCESS; | 169 | return I2C_STATUS_SUCCESS; |
| 170 | } | 170 | } |
| 171 | 171 | ||
| 172 | i2c_status_t i2c_readReg(uint8_t devaddr, uint8_t regaddr, uint8_t* data, uint16_t length, uint16_t timeout) | 172 | i2c_status_t i2c_readReg(uint8_t devaddr, uint8_t regaddr, uint8_t* data, uint16_t length, uint16_t timeout) |
| 173 | { | 173 | { |
| 174 | i2c_status_t status = i2c_start(devaddr, timeout); | 174 | i2c_status_t status = i2c_start(devaddr, timeout); |
| 175 | if (status) return status; | 175 | if (status) return status; |
| 176 | 176 | ||
| 177 | status = i2c_write(regaddr, timeout); | 177 | status = i2c_write(regaddr, timeout); |
| 178 | if (status) return status; | 178 | if (status) return status; |
| 179 | 179 | ||
| 180 | status = i2c_start(devaddr | 0x01, timeout); | 180 | status = i2c_start(devaddr | 0x01, timeout); |
| 181 | if (status) return status; | 181 | if (status) return status; |
| 182 | 182 | ||
| 183 | for (uint16_t i = 0; i < (length-1); i++) { | 183 | for (uint16_t i = 0; i < (length-1); i++) { |
| 184 | status = i2c_read_ack(timeout); | 184 | status = i2c_read_ack(timeout); |
| 185 | if (status >= 0) { | 185 | if (status >= 0) { |
| 186 | data[i] = status; | 186 | data[i] = status; |
| 187 | } else { | 187 | } else { |
| 188 | return status; | 188 | return status; |
| 189 | } | 189 | } |
| 190 | } | 190 | } |
| 191 | 191 | ||
| 192 | status = i2c_read_nack(timeout); | 192 | status = i2c_read_nack(timeout); |
| 193 | if (status >= 0 ) { | 193 | if (status >= 0 ) { |
| @@ -199,13 +199,13 @@ i2c_status_t i2c_readReg(uint8_t devaddr, uint8_t regaddr, uint8_t* data, uint16 | |||
| 199 | status = i2c_stop(timeout); | 199 | status = i2c_stop(timeout); |
| 200 | if (status) return status; | 200 | if (status) return status; |
| 201 | 201 | ||
| 202 | return I2C_STATUS_SUCCESS; | 202 | return I2C_STATUS_SUCCESS; |
| 203 | } | 203 | } |
| 204 | 204 | ||
| 205 | i2c_status_t i2c_stop(uint16_t timeout) | 205 | i2c_status_t i2c_stop(uint16_t timeout) |
| 206 | { | 206 | { |
| 207 | // transmit STOP condition | 207 | // transmit STOP condition |
| 208 | TWCR = (1<<TWINT) | (1<<TWEN) | (1<<TWSTO); | 208 | TWCR = (1<<TWINT) | (1<<TWEN) | (1<<TWSTO); |
| 209 | 209 | ||
| 210 | uint16_t timeout_timer = timer_read(); | 210 | uint16_t timeout_timer = timer_read(); |
| 211 | while(TWCR & (1<<TWSTO)) { | 211 | while(TWCR & (1<<TWSTO)) { |
| @@ -215,4 +215,4 @@ i2c_status_t i2c_stop(uint16_t timeout) | |||
| 215 | } | 215 | } |
| 216 | 216 | ||
| 217 | return I2C_STATUS_SUCCESS; | 217 | return I2C_STATUS_SUCCESS; |
| 218 | } | 218 | } \ No newline at end of file |
