diff options
| author | skullY <skullydazed@gmail.com> | 2019-08-30 11:19:03 -0700 |
|---|---|---|
| committer | skullydazed <skullydazed@users.noreply.github.com> | 2019-08-30 15:01:52 -0700 |
| commit | b624f32f944acdc59dcb130674c09090c5c404cb (patch) | |
| tree | bc13adbba137d122d9a2c2fb2fafcbb08ac10e25 /drivers/issi | |
| parent | 61af76a10d00aba185b8338604171de490a13e3b (diff) | |
| download | qmk_firmware-b624f32f944acdc59dcb130674c09090c5c404cb.tar.gz qmk_firmware-b624f32f944acdc59dcb130674c09090c5c404cb.zip | |
clang-format changes
Diffstat (limited to 'drivers/issi')
| -rw-r--r-- | drivers/issi/is31fl3218.c | 100 | ||||
| -rw-r--r-- | drivers/issi/is31fl3218.h | 4 | ||||
| -rw-r--r-- | drivers/issi/is31fl3731-simple.c | 71 | ||||
| -rw-r--r-- | drivers/issi/is31fl3731-simple.h | 171 | ||||
| -rw-r--r-- | drivers/issi/is31fl3731.c | 160 | ||||
| -rw-r--r-- | drivers/issi/is31fl3731.h | 195 | ||||
| -rw-r--r-- | drivers/issi/is31fl3733.c | 177 | ||||
| -rw-r--r-- | drivers/issi/is31fl3733.h | 437 | ||||
| -rw-r--r-- | drivers/issi/is31fl3736.c | 219 | ||||
| -rw-r--r-- | drivers/issi/is31fl3736.h | 254 | ||||
| -rw-r--r-- | drivers/issi/is31fl3737.c | 177 | ||||
| -rw-r--r-- | drivers/issi/is31fl3737.h | 341 |
12 files changed, 1103 insertions, 1203 deletions
diff --git a/drivers/issi/is31fl3218.c b/drivers/issi/is31fl3218.c index db44f7256..d43863ac4 100644 --- a/drivers/issi/is31fl3218.c +++ b/drivers/issi/is31fl3218.c | |||
| @@ -35,68 +35,62 @@ uint8_t g_twi_transfer_buffer[20]; | |||
| 35 | // IS31FL3218 has 18 PWM outputs and a fixed I2C address, so no chaining. | 35 | // IS31FL3218 has 18 PWM outputs and a fixed I2C address, so no chaining. |
| 36 | // If used as RGB LED driver, LEDs are assigned RGB,RGB,RGB,RGB,RGB,RGB | 36 | // If used as RGB LED driver, LEDs are assigned RGB,RGB,RGB,RGB,RGB,RGB |
| 37 | uint8_t g_pwm_buffer[18]; | 37 | uint8_t g_pwm_buffer[18]; |
| 38 | bool g_pwm_buffer_update_required = false; | 38 | bool g_pwm_buffer_update_required = false; |
| 39 | 39 | ||
| 40 | void IS31FL3218_write_register( uint8_t reg, uint8_t data ) | 40 | void IS31FL3218_write_register(uint8_t reg, uint8_t data) { |
| 41 | { | 41 | g_twi_transfer_buffer[0] = reg; |
| 42 | g_twi_transfer_buffer[0] = reg; | 42 | g_twi_transfer_buffer[1] = data; |
| 43 | g_twi_transfer_buffer[1] = data; | 43 | i2c_transmit(ISSI_ADDRESS, g_twi_transfer_buffer, 2, ISSI_TIMEOUT); |
| 44 | i2c_transmit( ISSI_ADDRESS, g_twi_transfer_buffer, 2, ISSI_TIMEOUT); | ||
| 45 | } | 44 | } |
| 46 | 45 | ||
| 47 | void IS31FL3218_write_pwm_buffer( uint8_t *pwm_buffer ) | 46 | void IS31FL3218_write_pwm_buffer(uint8_t *pwm_buffer) { |
| 48 | { | 47 | g_twi_transfer_buffer[0] = ISSI_REG_PWM; |
| 49 | g_twi_transfer_buffer[0] = ISSI_REG_PWM; | 48 | for (int i = 0; i < 18; i++) { |
| 50 | for ( int i=0; i<18; i++ ) { | 49 | g_twi_transfer_buffer[1 + i] = pwm_buffer[i]; |
| 51 | g_twi_transfer_buffer[1+i] = pwm_buffer[i]; | 50 | } |
| 52 | } | 51 | |
| 53 | 52 | i2c_transmit(ISSI_ADDRESS, g_twi_transfer_buffer, 19, ISSI_TIMEOUT); | |
| 54 | i2c_transmit( ISSI_ADDRESS, g_twi_transfer_buffer, 19, ISSI_TIMEOUT); | ||
| 55 | } | 53 | } |
| 56 | 54 | ||
| 57 | void IS31FL3218_init(void) | 55 | void IS31FL3218_init(void) { |
| 58 | { | 56 | // In case we ever want to reinitialize (?) |
| 59 | // In case we ever want to reinitialize (?) | 57 | IS31FL3218_write_register(ISSI_REG_RESET, 0x00); |
| 60 | IS31FL3218_write_register( ISSI_REG_RESET, 0x00 ); | 58 | |
| 61 | 59 | // Turn off software shutdown | |
| 62 | // Turn off software shutdown | 60 | IS31FL3218_write_register(ISSI_REG_SHUTDOWN, 0x01); |
| 63 | IS31FL3218_write_register( ISSI_REG_SHUTDOWN, 0x01 ); | 61 | |
| 64 | 62 | // Set all PWM values to zero | |
| 65 | // Set all PWM values to zero | 63 | for (uint8_t i = 0; i < 18; i++) { |
| 66 | for ( uint8_t i = 0; i < 18; i++ ) { | 64 | IS31FL3218_write_register(ISSI_REG_PWM + i, 0x00); |
| 67 | IS31FL3218_write_register( ISSI_REG_PWM+i, 0x00 ); | 65 | } |
| 68 | } | 66 | |
| 69 | 67 | // Enable all channels | |
| 70 | // Enable all channels | 68 | for (uint8_t i = 0; i < 3; i++) { |
| 71 | for ( uint8_t i = 0; i < 3; i++ ) { | 69 | IS31FL3218_write_register(ISSI_REG_CONTROL + i, 0b00111111); |
| 72 | IS31FL3218_write_register( ISSI_REG_CONTROL+i, 0b00111111 ); | 70 | } |
| 73 | } | 71 | |
| 74 | 72 | // Load PWM registers and LED Control register data | |
| 75 | // Load PWM registers and LED Control register data | 73 | IS31FL3218_write_register(ISSI_REG_UPDATE, 0x01); |
| 76 | IS31FL3218_write_register( ISSI_REG_UPDATE, 0x01 ); | ||
| 77 | } | 74 | } |
| 78 | 75 | ||
| 79 | void IS31FL3218_set_color( int index, uint8_t red, uint8_t green, uint8_t blue ) | 76 | void IS31FL3218_set_color(int index, uint8_t red, uint8_t green, uint8_t blue) { |
| 80 | { | 77 | g_pwm_buffer[index * 3 + 0] = red; |
| 81 | g_pwm_buffer[index * 3 + 0] = red; | 78 | g_pwm_buffer[index * 3 + 1] = green; |
| 82 | g_pwm_buffer[index * 3 + 1] = green; | 79 | g_pwm_buffer[index * 3 + 2] = blue; |
| 83 | g_pwm_buffer[index * 3 + 2] = blue; | 80 | g_pwm_buffer_update_required = true; |
| 84 | g_pwm_buffer_update_required = true; | ||
| 85 | } | 81 | } |
| 86 | 82 | ||
| 87 | void IS31FL3218_set_color_all( uint8_t red, uint8_t green, uint8_t blue ) | 83 | void IS31FL3218_set_color_all(uint8_t red, uint8_t green, uint8_t blue) { |
| 88 | { | 84 | for (int i = 0; i < 6; i++) { |
| 89 | for ( int i = 0; i < 6; i++ ) { | 85 | IS31FL3218_set_color(i, red, green, blue); |
| 90 | IS31FL3218_set_color( i, red, green, blue ); | 86 | } |
| 91 | } | ||
| 92 | } | 87 | } |
| 93 | 88 | ||
| 94 | void IS31FL3218_update_pwm_buffers(void) | 89 | void IS31FL3218_update_pwm_buffers(void) { |
| 95 | { | 90 | if (g_pwm_buffer_update_required) { |
| 96 | if ( g_pwm_buffer_update_required ) { | 91 | IS31FL3218_write_pwm_buffer(g_pwm_buffer); |
| 97 | IS31FL3218_write_pwm_buffer( g_pwm_buffer ); | 92 | // Load PWM registers and LED Control register data |
| 98 | // Load PWM registers and LED Control register data | 93 | IS31FL3218_write_register(ISSI_REG_UPDATE, 0x01); |
| 99 | IS31FL3218_write_register( ISSI_REG_UPDATE, 0x01 ); | 94 | } |
| 100 | } | 95 | g_pwm_buffer_update_required = false; |
| 101 | g_pwm_buffer_update_required = false; | ||
| 102 | } | 96 | } |
diff --git a/drivers/issi/is31fl3218.h b/drivers/issi/is31fl3218.h index 2d24e5146..a70cc1e79 100644 --- a/drivers/issi/is31fl3218.h +++ b/drivers/issi/is31fl3218.h | |||
| @@ -19,6 +19,6 @@ | |||
| 19 | #include <stdbool.h> | 19 | #include <stdbool.h> |
| 20 | 20 | ||
| 21 | void IS31FL3218_init(void); | 21 | void IS31FL3218_init(void); |
| 22 | void IS31FL3218_set_color( int index, uint8_t red, uint8_t green, uint8_t blue ); | 22 | void IS31FL3218_set_color(int index, uint8_t red, uint8_t green, uint8_t blue); |
| 23 | void IS31FL3218_set_color_all( uint8_t red, uint8_t green, uint8_t blue ); | 23 | void IS31FL3218_set_color_all(uint8_t red, uint8_t green, uint8_t blue); |
| 24 | void IS31FL3218_update_pwm_buffers(void); | 24 | void IS31FL3218_update_pwm_buffers(void); |
diff --git a/drivers/issi/is31fl3731-simple.c b/drivers/issi/is31fl3731-simple.c index a7faa9c38..fad4676de 100644 --- a/drivers/issi/is31fl3731-simple.c +++ b/drivers/issi/is31fl3731-simple.c | |||
| @@ -17,11 +17,11 @@ | |||
| 17 | */ | 17 | */ |
| 18 | 18 | ||
| 19 | #ifdef __AVR__ | 19 | #ifdef __AVR__ |
| 20 | #include <avr/interrupt.h> | 20 | # include <avr/interrupt.h> |
| 21 | #include <avr/io.h> | 21 | # include <avr/io.h> |
| 22 | #include <util/delay.h> | 22 | # include <util/delay.h> |
| 23 | #else | 23 | #else |
| 24 | #include "wait.h" | 24 | # include "wait.h" |
| 25 | #endif | 25 | #endif |
| 26 | 26 | ||
| 27 | #include <stdint.h> | 27 | #include <stdint.h> |
| @@ -41,7 +41,7 @@ | |||
| 41 | // 0b1110110 AD <-> SDA | 41 | // 0b1110110 AD <-> SDA |
| 42 | #define ISSI_ADDR_DEFAULT 0x74 | 42 | #define ISSI_ADDR_DEFAULT 0x74 |
| 43 | 43 | ||
| 44 | #define ISSI_REG_CONFIG 0x00 | 44 | #define ISSI_REG_CONFIG 0x00 |
| 45 | #define ISSI_REG_CONFIG_PICTUREMODE 0x00 | 45 | #define ISSI_REG_CONFIG_PICTUREMODE 0x00 |
| 46 | #define ISSI_REG_CONFIG_AUTOPLAYMODE 0x08 | 46 | #define ISSI_REG_CONFIG_AUTOPLAYMODE 0x08 |
| 47 | #define ISSI_REG_CONFIG_AUDIOPLAYMODE 0x18 | 47 | #define ISSI_REG_CONFIG_AUDIOPLAYMODE 0x18 |
| @@ -50,20 +50,20 @@ | |||
| 50 | #define ISSI_CONF_AUTOFRAMEMODE 0x04 | 50 | #define ISSI_CONF_AUTOFRAMEMODE 0x04 |
| 51 | #define ISSI_CONF_AUDIOMODE 0x08 | 51 | #define ISSI_CONF_AUDIOMODE 0x08 |
| 52 | 52 | ||
| 53 | #define ISSI_REG_PICTUREFRAME 0x01 | 53 | #define ISSI_REG_PICTUREFRAME 0x01 |
| 54 | 54 | ||
| 55 | #define ISSI_REG_SHUTDOWN 0x0A | 55 | #define ISSI_REG_SHUTDOWN 0x0A |
| 56 | #define ISSI_REG_AUDIOSYNC 0x06 | 56 | #define ISSI_REG_AUDIOSYNC 0x06 |
| 57 | 57 | ||
| 58 | #define ISSI_COMMANDREGISTER 0xFD | 58 | #define ISSI_COMMANDREGISTER 0xFD |
| 59 | #define ISSI_BANK_FUNCTIONREG 0x0B // helpfully called 'page nine' | 59 | #define ISSI_BANK_FUNCTIONREG 0x0B // helpfully called 'page nine' |
| 60 | 60 | ||
| 61 | #ifndef ISSI_TIMEOUT | 61 | #ifndef ISSI_TIMEOUT |
| 62 | #define ISSI_TIMEOUT 100 | 62 | # define ISSI_TIMEOUT 100 |
| 63 | #endif | 63 | #endif |
| 64 | 64 | ||
| 65 | #ifndef ISSI_PERSISTENCE | 65 | #ifndef ISSI_PERSISTENCE |
| 66 | #define ISSI_PERSISTENCE 0 | 66 | # define ISSI_PERSISTENCE 0 |
| 67 | #endif | 67 | #endif |
| 68 | 68 | ||
| 69 | // Transfer buffer for TWITransmitData() | 69 | // Transfer buffer for TWITransmitData() |
| @@ -75,17 +75,17 @@ uint8_t g_twi_transfer_buffer[20]; | |||
| 75 | // buffers and the transfers in IS31FL3731_write_pwm_buffer() but it's | 75 | // buffers and the transfers in IS31FL3731_write_pwm_buffer() but it's |
| 76 | // probably not worth the extra complexity. | 76 | // probably not worth the extra complexity. |
| 77 | uint8_t g_pwm_buffer[LED_DRIVER_COUNT][144]; | 77 | uint8_t g_pwm_buffer[LED_DRIVER_COUNT][144]; |
| 78 | bool g_pwm_buffer_update_required = false; | 78 | bool g_pwm_buffer_update_required = false; |
| 79 | 79 | ||
| 80 | /* There's probably a better way to init this... */ | 80 | /* There's probably a better way to init this... */ |
| 81 | #if LED_DRIVER_COUNT == 1 | 81 | #if LED_DRIVER_COUNT == 1 |
| 82 | uint8_t g_led_control_registers[LED_DRIVER_COUNT][18] = {{0}}; | 82 | uint8_t g_led_control_registers[LED_DRIVER_COUNT][18] = {{0}}; |
| 83 | #elif LED_DRIVER_COUNT == 2 | 83 | #elif LED_DRIVER_COUNT == 2 |
| 84 | uint8_t g_led_control_registers[LED_DRIVER_COUNT][18] = {{0}, {0}}; | 84 | uint8_t g_led_control_registers[LED_DRIVER_COUNT][18] = {{0}, {0}}; |
| 85 | #elif LED_DRIVER_COUNT == 3 | 85 | #elif LED_DRIVER_COUNT == 3 |
| 86 | uint8_t g_led_control_registers[LED_DRIVER_COUNT][18] = {{0}, {0}, {0}}; | 86 | uint8_t g_led_control_registers[LED_DRIVER_COUNT][18] = {{0}, {0}, {0}}; |
| 87 | #elif LED_DRIVER_COUNT == 4 | 87 | #elif LED_DRIVER_COUNT == 4 |
| 88 | uint8_t g_led_control_registers[LED_DRIVER_COUNT][18] = {{0}, {0}, {0}, {0}}; | 88 | uint8_t g_led_control_registers[LED_DRIVER_COUNT][18] = {{0}, {0}, {0}, {0}}; |
| 89 | #endif | 89 | #endif |
| 90 | bool g_led_control_registers_update_required = false; | 90 | bool g_led_control_registers_update_required = false; |
| 91 | 91 | ||
| @@ -103,20 +103,19 @@ bool g_led_control_registers_update_required = false; | |||
| 103 | // 0x0E - R17,G15,G14,G13,G12,G11,G10,G09 | 103 | // 0x0E - R17,G15,G14,G13,G12,G11,G10,G09 |
| 104 | // 0x10 - R16,R15,R14,R13,R12,R11,R10,R09 | 104 | // 0x10 - R16,R15,R14,R13,R12,R11,R10,R09 |
| 105 | 105 | ||
| 106 | |||
| 107 | void IS31FL3731_write_register(uint8_t addr, uint8_t reg, uint8_t data) { | 106 | void IS31FL3731_write_register(uint8_t addr, uint8_t reg, uint8_t data) { |
| 108 | g_twi_transfer_buffer[0] = reg; | 107 | g_twi_transfer_buffer[0] = reg; |
| 109 | g_twi_transfer_buffer[1] = data; | 108 | g_twi_transfer_buffer[1] = data; |
| 110 | 109 | ||
| 111 | #if ISSI_PERSISTENCE > 0 | 110 | #if ISSI_PERSISTENCE > 0 |
| 112 | for (uint8_t i = 0; i < ISSI_PERSISTENCE; i++) { | 111 | for (uint8_t i = 0; i < ISSI_PERSISTENCE; i++) { |
| 113 | if (i2c_transmit(addr << 1, g_twi_transfer_buffer, 2, ISSI_TIMEOUT) == 0) { | 112 | if (i2c_transmit(addr << 1, g_twi_transfer_buffer, 2, ISSI_TIMEOUT) == 0) { |
| 114 | break; | 113 | break; |
| 115 | } | ||
| 116 | } | 114 | } |
| 117 | #else | 115 | } |
| 118 | i2c_transmit(addr << 1, g_twi_transfer_buffer, 2, ISSI_TIMEOUT); | 116 | #else |
| 119 | #endif | 117 | i2c_transmit(addr << 1, g_twi_transfer_buffer, 2, ISSI_TIMEOUT); |
| 118 | #endif | ||
| 120 | } | 119 | } |
| 121 | 120 | ||
| 122 | void IS31FL3731_write_pwm_buffer(uint8_t addr, uint8_t *pwm_buffer) { | 121 | void IS31FL3731_write_pwm_buffer(uint8_t addr, uint8_t *pwm_buffer) { |
| @@ -136,14 +135,13 @@ void IS31FL3731_write_pwm_buffer(uint8_t addr, uint8_t *pwm_buffer) { | |||
| 136 | g_twi_transfer_buffer[1 + j] = pwm_buffer[i + j]; | 135 | g_twi_transfer_buffer[1 + j] = pwm_buffer[i + j]; |
| 137 | } | 136 | } |
| 138 | 137 | ||
| 139 | #if ISSI_PERSISTENCE > 0 | 138 | #if ISSI_PERSISTENCE > 0 |
| 140 | for (uint8_t i = 0; i < ISSI_PERSISTENCE; i++) { | 139 | for (uint8_t i = 0; i < ISSI_PERSISTENCE; i++) { |
| 141 | if (i2c_transmit(addr << 1, g_twi_transfer_buffer, 17, ISSI_TIMEOUT) == 0) | 140 | if (i2c_transmit(addr << 1, g_twi_transfer_buffer, 17, ISSI_TIMEOUT) == 0) break; |
| 142 | break; | 141 | } |
| 143 | } | 142 | #else |
| 144 | #else | 143 | i2c_transmit(addr << 1, g_twi_transfer_buffer, 17, ISSI_TIMEOUT); |
| 145 | i2c_transmit(addr << 1, g_twi_transfer_buffer, 17, ISSI_TIMEOUT); | 144 | #endif |
| 146 | #endif | ||
| 147 | } | 145 | } |
| 148 | } | 146 | } |
| 149 | 147 | ||
| @@ -196,7 +194,6 @@ void IS31FL3731_init(uint8_t addr) { | |||
| 196 | // most usage after initialization is just writing PWM buffers in bank 0 | 194 | // most usage after initialization is just writing PWM buffers in bank 0 |
| 197 | // as there's not much point in double-buffering | 195 | // as there's not much point in double-buffering |
| 198 | IS31FL3731_write_register(addr, ISSI_COMMANDREGISTER, 0); | 196 | IS31FL3731_write_register(addr, ISSI_COMMANDREGISTER, 0); |
| 199 | |||
| 200 | } | 197 | } |
| 201 | 198 | ||
| 202 | void IS31FL3731_set_value(int index, uint8_t value) { | 199 | void IS31FL3731_set_value(int index, uint8_t value) { |
| @@ -205,7 +202,7 @@ void IS31FL3731_set_value(int index, uint8_t value) { | |||
| 205 | 202 | ||
| 206 | // Subtract 0x24 to get the second index of g_pwm_buffer | 203 | // Subtract 0x24 to get the second index of g_pwm_buffer |
| 207 | g_pwm_buffer[led.driver][led.v - 0x24] = value; | 204 | g_pwm_buffer[led.driver][led.v - 0x24] = value; |
| 208 | g_pwm_buffer_update_required = true; | 205 | g_pwm_buffer_update_required = true; |
| 209 | } | 206 | } |
| 210 | } | 207 | } |
| 211 | 208 | ||
| @@ -216,10 +213,10 @@ void IS31FL3731_set_value_all(uint8_t value) { | |||
| 216 | } | 213 | } |
| 217 | 214 | ||
| 218 | void IS31FL3731_set_led_control_register(uint8_t index, bool value) { | 215 | void IS31FL3731_set_led_control_register(uint8_t index, bool value) { |
| 219 | is31_led led = g_is31_leds[index]; | 216 | is31_led led = g_is31_leds[index]; |
| 220 | 217 | ||
| 221 | uint8_t control_register = (led.v - 0x24) / 8; | 218 | uint8_t control_register = (led.v - 0x24) / 8; |
| 222 | uint8_t bit_value = (led.v - 0x24) % 8; | 219 | uint8_t bit_value = (led.v - 0x24) % 8; |
| 223 | 220 | ||
| 224 | if (value) { | 221 | if (value) { |
| 225 | g_led_control_registers[led.driver][control_register] |= (1 << bit_value); | 222 | g_led_control_registers[led.driver][control_register] |= (1 << bit_value); |
| @@ -239,7 +236,7 @@ void IS31FL3731_update_pwm_buffers(uint8_t addr, uint8_t index) { | |||
| 239 | 236 | ||
| 240 | void IS31FL3731_update_led_control_registers(uint8_t addr, uint8_t index) { | 237 | void IS31FL3731_update_led_control_registers(uint8_t addr, uint8_t index) { |
| 241 | if (g_led_control_registers_update_required) { | 238 | if (g_led_control_registers_update_required) { |
| 242 | for (int i=0; i<18; i++) { | 239 | for (int i = 0; i < 18; i++) { |
| 243 | IS31FL3731_write_register(addr, i, g_led_control_registers[index][i]); | 240 | IS31FL3731_write_register(addr, i, g_led_control_registers[index][i]); |
| 244 | } | 241 | } |
| 245 | } | 242 | } |
diff --git a/drivers/issi/is31fl3731-simple.h b/drivers/issi/is31fl3731-simple.h index dbe498281..a223c351e 100644 --- a/drivers/issi/is31fl3731-simple.h +++ b/drivers/issi/is31fl3731-simple.h | |||
| @@ -16,14 +16,12 @@ | |||
| 16 | * along with this program. If not, see <http://www.gnu.org/licenses/>. | 16 | * along with this program. If not, see <http://www.gnu.org/licenses/>. |
| 17 | */ | 17 | */ |
| 18 | 18 | ||
| 19 | |||
| 20 | #ifndef IS31FL3731_DRIVER_H | 19 | #ifndef IS31FL3731_DRIVER_H |
| 21 | #define IS31FL3731_DRIVER_H | 20 | #define IS31FL3731_DRIVER_H |
| 22 | 21 | ||
| 23 | |||
| 24 | typedef struct is31_led { | 22 | typedef struct is31_led { |
| 25 | uint8_t driver:2; | 23 | uint8_t driver : 2; |
| 26 | uint8_t v; | 24 | uint8_t v; |
| 27 | } __attribute__((packed)) is31_led; | 25 | } __attribute__((packed)) is31_led; |
| 28 | 26 | ||
| 29 | extern const is31_led g_is31_leds[LED_DRIVER_LED_COUNT]; | 27 | extern const is31_led g_is31_leds[LED_DRIVER_LED_COUNT]; |
| @@ -44,16 +42,16 @@ void IS31FL3731_set_led_control_register(uint8_t index, bool value); | |||
| 44 | void IS31FL3731_update_pwm_buffers(uint8_t addr, uint8_t index); | 42 | void IS31FL3731_update_pwm_buffers(uint8_t addr, uint8_t index); |
| 45 | void IS31FL3731_update_led_control_registers(uint8_t addr, uint8_t index); | 43 | void IS31FL3731_update_led_control_registers(uint8_t addr, uint8_t index); |
| 46 | 44 | ||
| 47 | #define C1_1 0x24 | 45 | #define C1_1 0x24 |
| 48 | #define C1_2 0x25 | 46 | #define C1_2 0x25 |
| 49 | #define C1_3 0x26 | 47 | #define C1_3 0x26 |
| 50 | #define C1_4 0x27 | 48 | #define C1_4 0x27 |
| 51 | #define C1_5 0x28 | 49 | #define C1_5 0x28 |
| 52 | #define C1_6 0x29 | 50 | #define C1_6 0x29 |
| 53 | #define C1_7 0x2A | 51 | #define C1_7 0x2A |
| 54 | #define C1_8 0x2B | 52 | #define C1_8 0x2B |
| 55 | 53 | ||
| 56 | #define C1_9 0x2C | 54 | #define C1_9 0x2C |
| 57 | #define C1_10 0x2D | 55 | #define C1_10 0x2D |
| 58 | #define C1_11 0x2E | 56 | #define C1_11 0x2E |
| 59 | #define C1_12 0x2F | 57 | #define C1_12 0x2F |
| @@ -62,16 +60,16 @@ void IS31FL3731_update_led_control_registers(uint8_t addr, uint8_t index); | |||
| 62 | #define C1_15 0x32 | 60 | #define C1_15 0x32 |
| 63 | #define C1_16 0x33 | 61 | #define C1_16 0x33 |
| 64 | 62 | ||
| 65 | #define C2_1 0x34 | 63 | #define C2_1 0x34 |
| 66 | #define C2_2 0x35 | 64 | #define C2_2 0x35 |
| 67 | #define C2_3 0x36 | 65 | #define C2_3 0x36 |
| 68 | #define C2_4 0x37 | 66 | #define C2_4 0x37 |
| 69 | #define C2_5 0x38 | 67 | #define C2_5 0x38 |
| 70 | #define C2_6 0x39 | 68 | #define C2_6 0x39 |
| 71 | #define C2_7 0x3A | 69 | #define C2_7 0x3A |
| 72 | #define C2_8 0x3B | 70 | #define C2_8 0x3B |
| 73 | 71 | ||
| 74 | #define C2_9 0x3C | 72 | #define C2_9 0x3C |
| 75 | #define C2_10 0x3D | 73 | #define C2_10 0x3D |
| 76 | #define C2_11 0x3E | 74 | #define C2_11 0x3E |
| 77 | #define C2_12 0x3F | 75 | #define C2_12 0x3F |
| @@ -80,16 +78,16 @@ void IS31FL3731_update_led_control_registers(uint8_t addr, uint8_t index); | |||
| 80 | #define C2_15 0x42 | 78 | #define C2_15 0x42 |
| 81 | #define C2_16 0x43 | 79 | #define C2_16 0x43 |
| 82 | 80 | ||
| 83 | #define C3_1 0x44 | 81 | #define C3_1 0x44 |
| 84 | #define C3_2 0x45 | 82 | #define C3_2 0x45 |
| 85 | #define C3_3 0x46 | 83 | #define C3_3 0x46 |
| 86 | #define C3_4 0x47 | 84 | #define C3_4 0x47 |
| 87 | #define C3_5 0x48 | 85 | #define C3_5 0x48 |
| 88 | #define C3_6 0x49 | 86 | #define C3_6 0x49 |
| 89 | #define C3_7 0x4A | 87 | #define C3_7 0x4A |
| 90 | #define C3_8 0x4B | 88 | #define C3_8 0x4B |
| 91 | 89 | ||
| 92 | #define C3_9 0x4C | 90 | #define C3_9 0x4C |
| 93 | #define C3_10 0x4D | 91 | #define C3_10 0x4D |
| 94 | #define C3_11 0x4E | 92 | #define C3_11 0x4E |
| 95 | #define C3_12 0x4F | 93 | #define C3_12 0x4F |
| @@ -98,16 +96,16 @@ void IS31FL3731_update_led_control_registers(uint8_t addr, uint8_t index); | |||
| 98 | #define C3_15 0x52 | 96 | #define C3_15 0x52 |
| 99 | #define C3_16 0x53 | 97 | #define C3_16 0x53 |
| 100 | 98 | ||
| 101 | #define C4_1 0x54 | 99 | #define C4_1 0x54 |
| 102 | #define C4_2 0x55 | 100 | #define C4_2 0x55 |
| 103 | #define C4_3 0x56 | 101 | #define C4_3 0x56 |
| 104 | #define C4_4 0x57 | 102 | #define C4_4 0x57 |
| 105 | #define C4_5 0x58 | 103 | #define C4_5 0x58 |
| 106 | #define C4_6 0x59 | 104 | #define C4_6 0x59 |
| 107 | #define C4_7 0x5A | 105 | #define C4_7 0x5A |
| 108 | #define C4_8 0x5B | 106 | #define C4_8 0x5B |
| 109 | 107 | ||
| 110 | #define C4_9 0x5C | 108 | #define C4_9 0x5C |
| 111 | #define C4_10 0x5D | 109 | #define C4_10 0x5D |
| 112 | #define C4_11 0x5E | 110 | #define C4_11 0x5E |
| 113 | #define C4_12 0x5F | 111 | #define C4_12 0x5F |
| @@ -116,16 +114,16 @@ void IS31FL3731_update_led_control_registers(uint8_t addr, uint8_t index); | |||
| 116 | #define C4_15 0x62 | 114 | #define C4_15 0x62 |
| 117 | #define C4_16 0x63 | 115 | #define C4_16 0x63 |
| 118 | 116 | ||
| 119 | #define C5_1 0x64 | 117 | #define C5_1 0x64 |
| 120 | #define C5_2 0x65 | 118 | #define C5_2 0x65 |
| 121 | #define C5_3 0x66 | 119 | #define C5_3 0x66 |
| 122 | #define C5_4 0x67 | 120 | #define C5_4 0x67 |
| 123 | #define C5_5 0x68 | 121 | #define C5_5 0x68 |
| 124 | #define C5_6 0x69 | 122 | #define C5_6 0x69 |
| 125 | #define C5_7 0x6A | 123 | #define C5_7 0x6A |
| 126 | #define C5_8 0x6B | 124 | #define C5_8 0x6B |
| 127 | 125 | ||
| 128 | #define C5_9 0x6C | 126 | #define C5_9 0x6C |
| 129 | #define C5_10 0x6D | 127 | #define C5_10 0x6D |
| 130 | #define C5_11 0x6E | 128 | #define C5_11 0x6E |
| 131 | #define C5_12 0x6F | 129 | #define C5_12 0x6F |
| @@ -134,16 +132,16 @@ void IS31FL3731_update_led_control_registers(uint8_t addr, uint8_t index); | |||
| 134 | #define C5_15 0x72 | 132 | #define C5_15 0x72 |
| 135 | #define C5_16 0x73 | 133 | #define C5_16 0x73 |
| 136 | 134 | ||
| 137 | #define C6_1 0x74 | 135 | #define C6_1 0x74 |
| 138 | #define C6_2 0x75 | 136 | #define C6_2 0x75 |
| 139 | #define C6_3 0x76 | 137 | #define C6_3 0x76 |
| 140 | #define C6_4 0x77 | 138 | #define C6_4 0x77 |
| 141 | #define C6_5 0x78 | 139 | #define C6_5 0x78 |
| 142 | #define C6_6 0x79 | 140 | #define C6_6 0x79 |
| 143 | #define C6_7 0x7A | 141 | #define C6_7 0x7A |
| 144 | #define C6_8 0x7B | 142 | #define C6_8 0x7B |
| 145 | 143 | ||
| 146 | #define C6_9 0x7C | 144 | #define C6_9 0x7C |
| 147 | #define C6_10 0x7D | 145 | #define C6_10 0x7D |
| 148 | #define C6_11 0x7E | 146 | #define C6_11 0x7E |
| 149 | #define C6_12 0x7F | 147 | #define C6_12 0x7F |
| @@ -152,16 +150,16 @@ void IS31FL3731_update_led_control_registers(uint8_t addr, uint8_t index); | |||
| 152 | #define C6_15 0x82 | 150 | #define C6_15 0x82 |
| 153 | #define C6_16 0x83 | 151 | #define C6_16 0x83 |
| 154 | 152 | ||
| 155 | #define C7_1 0x84 | 153 | #define C7_1 0x84 |
| 156 | #define C7_2 0x85 | 154 | #define C7_2 0x85 |
| 157 | #define C7_3 0x86 | 155 | #define C7_3 0x86 |
| 158 | #define C7_4 0x87 | 156 | #define C7_4 0x87 |
| 159 | #define C7_5 0x88 | 157 | #define C7_5 0x88 |
| 160 | #define C7_6 0x89 | 158 | #define C7_6 0x89 |
| 161 | #define C7_7 0x8A | 159 | #define C7_7 0x8A |
| 162 | #define C7_8 0x8B | 160 | #define C7_8 0x8B |
| 163 | 161 | ||
| 164 | #define C7_9 0x8C | 162 | #define C7_9 0x8C |
| 165 | #define C7_10 0x8D | 163 | #define C7_10 0x8D |
| 166 | #define C7_11 0x8E | 164 | #define C7_11 0x8E |
| 167 | #define C7_12 0x8F | 165 | #define C7_12 0x8F |
| @@ -170,16 +168,16 @@ void IS31FL3731_update_led_control_registers(uint8_t addr, uint8_t index); | |||
| 170 | #define C7_15 0x92 | 168 | #define C7_15 0x92 |
| 171 | #define C7_16 0x93 | 169 | #define C7_16 0x93 |
| 172 | 170 | ||
| 173 | #define C8_1 0x94 | 171 | #define C8_1 0x94 |
| 174 | #define C8_2 0x95 | 172 | #define C8_2 0x95 |
| 175 | #define C8_3 0x96 | 173 | #define C8_3 0x96 |
| 176 | #define C8_4 0x97 | 174 | #define C8_4 0x97 |
| 177 | #define C8_5 0x98 | 175 | #define C8_5 0x98 |
| 178 | #define C8_6 0x99 | 176 | #define C8_6 0x99 |
| 179 | #define C8_7 0x9A | 177 | #define C8_7 0x9A |
| 180 | #define C8_8 0x9B | 178 | #define C8_8 0x9B |
| 181 | 179 | ||
| 182 | #define C8_9 0x9C | 180 | #define C8_9 0x9C |
| 183 | #define C8_10 0x9D | 181 | #define C8_10 0x9D |
| 184 | #define C8_11 0x9E | 182 | #define C8_11 0x9E |
| 185 | #define C8_12 0x9F | 183 | #define C8_12 0x9F |
| @@ -188,16 +186,16 @@ void IS31FL3731_update_led_control_registers(uint8_t addr, uint8_t index); | |||
| 188 | #define C8_15 0xA2 | 186 | #define C8_15 0xA2 |
| 189 | #define C8_16 0xA3 | 187 | #define C8_16 0xA3 |
| 190 | 188 | ||
| 191 | #define C9_1 0xA4 | 189 | #define C9_1 0xA4 |
| 192 | #define C9_2 0xA5 | 190 | #define C9_2 0xA5 |
| 193 | #define C9_3 0xA6 | 191 | #define C9_3 0xA6 |
| 194 | #define C9_4 0xA7 | 192 | #define C9_4 0xA7 |
| 195 | #define C9_5 0xA8 | 193 | #define C9_5 0xA8 |
| 196 | #define C9_6 0xA9 | 194 | #define C9_6 0xA9 |
| 197 | #define C9_7 0xAA | 195 | #define C9_7 0xAA |
| 198 | #define C9_8 0xAB | 196 | #define C9_8 0xAB |
| 199 | 197 | ||
| 200 | #define C9_9 0xAC | 198 | #define C9_9 0xAC |
| 201 | #define C9_10 0xAD | 199 | #define C9_10 0xAD |
| 202 | #define C9_11 0xAE | 200 | #define C9_11 0xAE |
| 203 | #define C9_12 0xAF | 201 | #define C9_12 0xAF |
| @@ -206,5 +204,4 @@ void IS31FL3731_update_led_control_registers(uint8_t addr, uint8_t index); | |||
| 206 | #define C9_15 0xB2 | 204 | #define C9_15 0xB2 |
| 207 | #define C9_16 0xB3 | 205 | #define C9_16 0xB3 |
| 208 | 206 | ||
| 209 | 207 | #endif // IS31FL3731_DRIVER_H | |
| 210 | #endif // IS31FL3731_DRIVER_H | ||
diff --git a/drivers/issi/is31fl3731.c b/drivers/issi/is31fl3731.c index 30c7dd053..0b6f3e985 100644 --- a/drivers/issi/is31fl3731.c +++ b/drivers/issi/is31fl3731.c | |||
| @@ -16,11 +16,11 @@ | |||
| 16 | */ | 16 | */ |
| 17 | 17 | ||
| 18 | #ifdef __AVR__ | 18 | #ifdef __AVR__ |
| 19 | #include <avr/interrupt.h> | 19 | # include <avr/interrupt.h> |
| 20 | #include <avr/io.h> | 20 | # include <avr/io.h> |
| 21 | #include <util/delay.h> | 21 | # include <util/delay.h> |
| 22 | #else | 22 | #else |
| 23 | #include "wait.h" | 23 | # include "wait.h" |
| 24 | #endif | 24 | #endif |
| 25 | 25 | ||
| 26 | #include "is31fl3731.h" | 26 | #include "is31fl3731.h" |
| @@ -37,7 +37,7 @@ | |||
| 37 | // 0b1110110 AD <-> SDA | 37 | // 0b1110110 AD <-> SDA |
| 38 | #define ISSI_ADDR_DEFAULT 0x74 | 38 | #define ISSI_ADDR_DEFAULT 0x74 |
| 39 | 39 | ||
| 40 | #define ISSI_REG_CONFIG 0x00 | 40 | #define ISSI_REG_CONFIG 0x00 |
| 41 | #define ISSI_REG_CONFIG_PICTUREMODE 0x00 | 41 | #define ISSI_REG_CONFIG_PICTUREMODE 0x00 |
| 42 | #define ISSI_REG_CONFIG_AUTOPLAYMODE 0x08 | 42 | #define ISSI_REG_CONFIG_AUTOPLAYMODE 0x08 |
| 43 | #define ISSI_REG_CONFIG_AUDIOPLAYMODE 0x18 | 43 | #define ISSI_REG_CONFIG_AUDIOPLAYMODE 0x18 |
| @@ -46,20 +46,20 @@ | |||
| 46 | #define ISSI_CONF_AUTOFRAMEMODE 0x04 | 46 | #define ISSI_CONF_AUTOFRAMEMODE 0x04 |
| 47 | #define ISSI_CONF_AUDIOMODE 0x08 | 47 | #define ISSI_CONF_AUDIOMODE 0x08 |
| 48 | 48 | ||
| 49 | #define ISSI_REG_PICTUREFRAME 0x01 | 49 | #define ISSI_REG_PICTUREFRAME 0x01 |
| 50 | 50 | ||
| 51 | #define ISSI_REG_SHUTDOWN 0x0A | 51 | #define ISSI_REG_SHUTDOWN 0x0A |
| 52 | #define ISSI_REG_AUDIOSYNC 0x06 | 52 | #define ISSI_REG_AUDIOSYNC 0x06 |
| 53 | 53 | ||
| 54 | #define ISSI_COMMANDREGISTER 0xFD | 54 | #define ISSI_COMMANDREGISTER 0xFD |
| 55 | #define ISSI_BANK_FUNCTIONREG 0x0B // helpfully called 'page nine' | 55 | #define ISSI_BANK_FUNCTIONREG 0x0B // helpfully called 'page nine' |
| 56 | 56 | ||
| 57 | #ifndef ISSI_TIMEOUT | 57 | #ifndef ISSI_TIMEOUT |
| 58 | #define ISSI_TIMEOUT 100 | 58 | # define ISSI_TIMEOUT 100 |
| 59 | #endif | 59 | #endif |
| 60 | 60 | ||
| 61 | #ifndef ISSI_PERSISTENCE | 61 | #ifndef ISSI_PERSISTENCE |
| 62 | #define ISSI_PERSISTENCE 0 | 62 | # define ISSI_PERSISTENCE 0 |
| 63 | #endif | 63 | #endif |
| 64 | 64 | ||
| 65 | // Transfer buffer for TWITransmitData() | 65 | // Transfer buffer for TWITransmitData() |
| @@ -71,10 +71,10 @@ uint8_t g_twi_transfer_buffer[20]; | |||
| 71 | // buffers and the transfers in IS31FL3731_write_pwm_buffer() but it's | 71 | // buffers and the transfers in IS31FL3731_write_pwm_buffer() but it's |
| 72 | // probably not worth the extra complexity. | 72 | // probably not worth the extra complexity. |
| 73 | uint8_t g_pwm_buffer[DRIVER_COUNT][144]; | 73 | uint8_t g_pwm_buffer[DRIVER_COUNT][144]; |
| 74 | bool g_pwm_buffer_update_required[DRIVER_COUNT] = { false }; | 74 | bool g_pwm_buffer_update_required[DRIVER_COUNT] = {false}; |
| 75 | 75 | ||
| 76 | uint8_t g_led_control_registers[DRIVER_COUNT][18] = { { 0 }, { 0 } }; | 76 | uint8_t g_led_control_registers[DRIVER_COUNT][18] = {{0}, {0}}; |
| 77 | bool g_led_control_registers_update_required[DRIVER_COUNT] = { false }; | 77 | bool g_led_control_registers_update_required[DRIVER_COUNT] = {false}; |
| 78 | 78 | ||
| 79 | // This is the bit pattern in the LED control registers | 79 | // This is the bit pattern in the LED control registers |
| 80 | // (for matrix A, add one to register for matrix B) | 80 | // (for matrix A, add one to register for matrix B) |
| @@ -90,179 +90,159 @@ bool g_led_control_registers_update_required[DRIVER_COUNT] = { false }; | |||
| 90 | // 0x0E - R17,G15,G14,G13,G12,G11,G10,G09 | 90 | // 0x0E - R17,G15,G14,G13,G12,G11,G10,G09 |
| 91 | // 0x10 - R16,R15,R14,R13,R12,R11,R10,R09 | 91 | // 0x10 - R16,R15,R14,R13,R12,R11,R10,R09 |
| 92 | 92 | ||
| 93 | 93 | void IS31FL3731_write_register(uint8_t addr, uint8_t reg, uint8_t data) { | |
| 94 | void IS31FL3731_write_register( uint8_t addr, uint8_t reg, uint8_t data ) | ||
| 95 | { | ||
| 96 | g_twi_transfer_buffer[0] = reg; | 94 | g_twi_transfer_buffer[0] = reg; |
| 97 | g_twi_transfer_buffer[1] = data; | 95 | g_twi_transfer_buffer[1] = data; |
| 98 | 96 | ||
| 99 | #if ISSI_PERSISTENCE > 0 | 97 | #if ISSI_PERSISTENCE > 0 |
| 100 | for (uint8_t i = 0; i < ISSI_PERSISTENCE; i++) { | 98 | for (uint8_t i = 0; i < ISSI_PERSISTENCE; i++) { |
| 101 | if (i2c_transmit(addr << 1, g_twi_transfer_buffer, 2, ISSI_TIMEOUT) == 0) | 99 | if (i2c_transmit(addr << 1, g_twi_transfer_buffer, 2, ISSI_TIMEOUT) == 0) break; |
| 102 | break; | ||
| 103 | } | 100 | } |
| 104 | #else | 101 | #else |
| 105 | i2c_transmit(addr << 1, g_twi_transfer_buffer, 2, ISSI_TIMEOUT); | 102 | i2c_transmit(addr << 1, g_twi_transfer_buffer, 2, ISSI_TIMEOUT); |
| 106 | #endif | 103 | #endif |
| 107 | } | 104 | } |
| 108 | 105 | ||
| 109 | void IS31FL3731_write_pwm_buffer( uint8_t addr, uint8_t *pwm_buffer ) | 106 | void IS31FL3731_write_pwm_buffer(uint8_t addr, uint8_t *pwm_buffer) { |
| 110 | { | ||
| 111 | // assumes bank is already selected | 107 | // assumes bank is already selected |
| 112 | 108 | ||
| 113 | // transmit PWM registers in 9 transfers of 16 bytes | 109 | // transmit PWM registers in 9 transfers of 16 bytes |
| 114 | // g_twi_transfer_buffer[] is 20 bytes | 110 | // g_twi_transfer_buffer[] is 20 bytes |
| 115 | 111 | ||
| 116 | // iterate over the pwm_buffer contents at 16 byte intervals | 112 | // iterate over the pwm_buffer contents at 16 byte intervals |
| 117 | for ( int i = 0; i < 144; i += 16 ) { | 113 | for (int i = 0; i < 144; i += 16) { |
| 118 | // set the first register, e.g. 0x24, 0x34, 0x44, etc. | 114 | // set the first register, e.g. 0x24, 0x34, 0x44, etc. |
| 119 | g_twi_transfer_buffer[0] = 0x24 + i; | 115 | g_twi_transfer_buffer[0] = 0x24 + i; |
| 120 | // copy the data from i to i+15 | 116 | // copy the data from i to i+15 |
| 121 | // device will auto-increment register for data after the first byte | 117 | // device will auto-increment register for data after the first byte |
| 122 | // thus this sets registers 0x24-0x33, 0x34-0x43, etc. in one transfer | 118 | // thus this sets registers 0x24-0x33, 0x34-0x43, etc. in one transfer |
| 123 | for ( int j = 0; j < 16; j++ ) { | 119 | for (int j = 0; j < 16; j++) { |
| 124 | g_twi_transfer_buffer[1 + j] = pwm_buffer[i + j]; | 120 | g_twi_transfer_buffer[1 + j] = pwm_buffer[i + j]; |
| 125 | } | 121 | } |
| 126 | 122 | ||
| 127 | #if ISSI_PERSISTENCE > 0 | 123 | #if ISSI_PERSISTENCE > 0 |
| 128 | for (uint8_t i = 0; i < ISSI_PERSISTENCE; i++) { | 124 | for (uint8_t i = 0; i < ISSI_PERSISTENCE; i++) { |
| 129 | if (i2c_transmit(addr << 1, g_twi_transfer_buffer, 17, ISSI_TIMEOUT) == 0) | 125 | if (i2c_transmit(addr << 1, g_twi_transfer_buffer, 17, ISSI_TIMEOUT) == 0) break; |
| 130 | break; | 126 | } |
| 131 | } | 127 | #else |
| 132 | #else | 128 | i2c_transmit(addr << 1, g_twi_transfer_buffer, 17, ISSI_TIMEOUT); |
| 133 | i2c_transmit(addr << 1, g_twi_transfer_buffer, 17, ISSI_TIMEOUT); | 129 | #endif |
| 134 | #endif | ||
| 135 | } | 130 | } |
| 136 | } | 131 | } |
| 137 | 132 | ||
| 138 | void IS31FL3731_init( uint8_t addr ) | 133 | void IS31FL3731_init(uint8_t addr) { |
| 139 | { | ||
| 140 | // In order to avoid the LEDs being driven with garbage data | 134 | // In order to avoid the LEDs being driven with garbage data |
| 141 | // in the LED driver's PWM registers, first enable software shutdown, | 135 | // in the LED driver's PWM registers, first enable software shutdown, |
| 142 | // then set up the mode and other settings, clear the PWM registers, | 136 | // then set up the mode and other settings, clear the PWM registers, |
| 143 | // then disable software shutdown. | 137 | // then disable software shutdown. |
| 144 | 138 | ||
| 145 | // select "function register" bank | 139 | // select "function register" bank |
| 146 | IS31FL3731_write_register( addr, ISSI_COMMANDREGISTER, ISSI_BANK_FUNCTIONREG ); | 140 | IS31FL3731_write_register(addr, ISSI_COMMANDREGISTER, ISSI_BANK_FUNCTIONREG); |
| 147 | 141 | ||
| 148 | // enable software shutdown | 142 | // enable software shutdown |
| 149 | IS31FL3731_write_register( addr, ISSI_REG_SHUTDOWN, 0x00 ); | 143 | IS31FL3731_write_register(addr, ISSI_REG_SHUTDOWN, 0x00); |
| 150 | // this delay was copied from other drivers, might not be needed | 144 | // this delay was copied from other drivers, might not be needed |
| 151 | #ifdef __AVR__ | 145 | #ifdef __AVR__ |
| 152 | _delay_ms( 10 ); | 146 | _delay_ms(10); |
| 153 | #else | 147 | #else |
| 154 | wait_ms(10); | 148 | wait_ms(10); |
| 155 | #endif | 149 | #endif |
| 156 | 150 | ||
| 157 | // picture mode | 151 | // picture mode |
| 158 | IS31FL3731_write_register( addr, ISSI_REG_CONFIG, ISSI_REG_CONFIG_PICTUREMODE ); | 152 | IS31FL3731_write_register(addr, ISSI_REG_CONFIG, ISSI_REG_CONFIG_PICTUREMODE); |
| 159 | // display frame 0 | 153 | // display frame 0 |
| 160 | IS31FL3731_write_register( addr, ISSI_REG_PICTUREFRAME, 0x00 ); | 154 | IS31FL3731_write_register(addr, ISSI_REG_PICTUREFRAME, 0x00); |
| 161 | // audio sync off | 155 | // audio sync off |
| 162 | IS31FL3731_write_register( addr, ISSI_REG_AUDIOSYNC, 0x00 ); | 156 | IS31FL3731_write_register(addr, ISSI_REG_AUDIOSYNC, 0x00); |
| 163 | 157 | ||
| 164 | // select bank 0 | 158 | // select bank 0 |
| 165 | IS31FL3731_write_register( addr, ISSI_COMMANDREGISTER, 0 ); | 159 | IS31FL3731_write_register(addr, ISSI_COMMANDREGISTER, 0); |
| 166 | 160 | ||
| 167 | // turn off all LEDs in the LED control register | 161 | // turn off all LEDs in the LED control register |
| 168 | for ( int i = 0x00; i <= 0x11; i++ ) | 162 | for (int i = 0x00; i <= 0x11; i++) { |
| 169 | { | 163 | IS31FL3731_write_register(addr, i, 0x00); |
| 170 | IS31FL3731_write_register( addr, i, 0x00 ); | ||
| 171 | } | 164 | } |
| 172 | 165 | ||
| 173 | // turn off all LEDs in the blink control register (not really needed) | 166 | // turn off all LEDs in the blink control register (not really needed) |
| 174 | for ( int i = 0x12; i <= 0x23; i++ ) | 167 | for (int i = 0x12; i <= 0x23; i++) { |
| 175 | { | 168 | IS31FL3731_write_register(addr, i, 0x00); |
| 176 | IS31FL3731_write_register( addr, i, 0x00 ); | ||
| 177 | } | 169 | } |
| 178 | 170 | ||
| 179 | // set PWM on all LEDs to 0 | 171 | // set PWM on all LEDs to 0 |
| 180 | for ( int i = 0x24; i <= 0xB3; i++ ) | 172 | for (int i = 0x24; i <= 0xB3; i++) { |
| 181 | { | 173 | IS31FL3731_write_register(addr, i, 0x00); |
| 182 | IS31FL3731_write_register( addr, i, 0x00 ); | ||
| 183 | } | 174 | } |
| 184 | 175 | ||
| 185 | // select "function register" bank | 176 | // select "function register" bank |
| 186 | IS31FL3731_write_register( addr, ISSI_COMMANDREGISTER, ISSI_BANK_FUNCTIONREG ); | 177 | IS31FL3731_write_register(addr, ISSI_COMMANDREGISTER, ISSI_BANK_FUNCTIONREG); |
| 187 | 178 | ||
| 188 | // disable software shutdown | 179 | // disable software shutdown |
| 189 | IS31FL3731_write_register( addr, ISSI_REG_SHUTDOWN, 0x01 ); | 180 | IS31FL3731_write_register(addr, ISSI_REG_SHUTDOWN, 0x01); |
| 190 | 181 | ||
| 191 | // select bank 0 and leave it selected. | 182 | // select bank 0 and leave it selected. |
| 192 | // most usage after initialization is just writing PWM buffers in bank 0 | 183 | // most usage after initialization is just writing PWM buffers in bank 0 |
| 193 | // as there's not much point in double-buffering | 184 | // as there's not much point in double-buffering |
| 194 | IS31FL3731_write_register( addr, ISSI_COMMANDREGISTER, 0 ); | 185 | IS31FL3731_write_register(addr, ISSI_COMMANDREGISTER, 0); |
| 195 | |||
| 196 | } | 186 | } |
| 197 | 187 | ||
| 198 | void IS31FL3731_set_color( int index, uint8_t red, uint8_t green, uint8_t blue ) | 188 | void IS31FL3731_set_color(int index, uint8_t red, uint8_t green, uint8_t blue) { |
| 199 | { | 189 | if (index >= 0 && index < DRIVER_LED_TOTAL) { |
| 200 | if ( index >= 0 && index < DRIVER_LED_TOTAL ) { | ||
| 201 | is31_led led = g_is31_leds[index]; | 190 | is31_led led = g_is31_leds[index]; |
| 202 | 191 | ||
| 203 | // Subtract 0x24 to get the second index of g_pwm_buffer | 192 | // Subtract 0x24 to get the second index of g_pwm_buffer |
| 204 | g_pwm_buffer[led.driver][led.r - 0x24] = red; | 193 | g_pwm_buffer[led.driver][led.r - 0x24] = red; |
| 205 | g_pwm_buffer[led.driver][led.g - 0x24] = green; | 194 | g_pwm_buffer[led.driver][led.g - 0x24] = green; |
| 206 | g_pwm_buffer[led.driver][led.b - 0x24] = blue; | 195 | g_pwm_buffer[led.driver][led.b - 0x24] = blue; |
| 207 | g_pwm_buffer_update_required[led.driver] = true; | 196 | g_pwm_buffer_update_required[led.driver] = true; |
| 208 | } | 197 | } |
| 209 | } | 198 | } |
| 210 | 199 | ||
| 211 | void IS31FL3731_set_color_all( uint8_t red, uint8_t green, uint8_t blue ) | 200 | void IS31FL3731_set_color_all(uint8_t red, uint8_t green, uint8_t blue) { |
| 212 | { | 201 | for (int i = 0; i < DRIVER_LED_TOTAL; i++) { |
| 213 | for ( int i = 0; i < DRIVER_LED_TOTAL; i++ ) | 202 | IS31FL3731_set_color(i, red, green, blue); |
| 214 | { | ||
| 215 | IS31FL3731_set_color( i, red, green, blue ); | ||
| 216 | } | 203 | } |
| 217 | } | 204 | } |
| 218 | 205 | ||
| 219 | void IS31FL3731_set_led_control_register( uint8_t index, bool red, bool green, bool blue ) | 206 | void IS31FL3731_set_led_control_register(uint8_t index, bool red, bool green, bool blue) { |
| 220 | { | ||
| 221 | is31_led led = g_is31_leds[index]; | 207 | is31_led led = g_is31_leds[index]; |
| 222 | 208 | ||
| 223 | uint8_t control_register_r = (led.r - 0x24) / 8; | 209 | uint8_t control_register_r = (led.r - 0x24) / 8; |
| 224 | uint8_t control_register_g = (led.g - 0x24) / 8; | 210 | uint8_t control_register_g = (led.g - 0x24) / 8; |
| 225 | uint8_t control_register_b = (led.b - 0x24) / 8; | 211 | uint8_t control_register_b = (led.b - 0x24) / 8; |
| 226 | uint8_t bit_r = (led.r - 0x24) % 8; | 212 | uint8_t bit_r = (led.r - 0x24) % 8; |
| 227 | uint8_t bit_g = (led.g - 0x24) % 8; | 213 | uint8_t bit_g = (led.g - 0x24) % 8; |
| 228 | uint8_t bit_b = (led.b - 0x24) % 8; | 214 | uint8_t bit_b = (led.b - 0x24) % 8; |
| 229 | 215 | ||
| 230 | if ( red ) { | 216 | if (red) { |
| 231 | g_led_control_registers[led.driver][control_register_r] |= (1 << bit_r); | 217 | g_led_control_registers[led.driver][control_register_r] |= (1 << bit_r); |
| 232 | } else { | 218 | } else { |
| 233 | g_led_control_registers[led.driver][control_register_r] &= ~(1 << bit_r); | 219 | g_led_control_registers[led.driver][control_register_r] &= ~(1 << bit_r); |
| 234 | } | 220 | } |
| 235 | if ( green ) { | 221 | if (green) { |
| 236 | g_led_control_registers[led.driver][control_register_g] |= (1 << bit_g); | 222 | g_led_control_registers[led.driver][control_register_g] |= (1 << bit_g); |
| 237 | } else { | 223 | } else { |
| 238 | g_led_control_registers[led.driver][control_register_g] &= ~(1 << bit_g); | 224 | g_led_control_registers[led.driver][control_register_g] &= ~(1 << bit_g); |
| 239 | } | 225 | } |
| 240 | if ( blue ) { | 226 | if (blue) { |
| 241 | g_led_control_registers[led.driver][control_register_b] |= (1 << bit_b); | 227 | g_led_control_registers[led.driver][control_register_b] |= (1 << bit_b); |
| 242 | } else { | 228 | } else { |
| 243 | g_led_control_registers[led.driver][control_register_b] &= ~(1 << bit_b); | 229 | g_led_control_registers[led.driver][control_register_b] &= ~(1 << bit_b); |
| 244 | } | 230 | } |
| 245 | 231 | ||
| 246 | g_led_control_registers_update_required[led.driver] = true; | 232 | g_led_control_registers_update_required[led.driver] = true; |
| 247 | |||
| 248 | } | 233 | } |
| 249 | 234 | ||
| 250 | void IS31FL3731_update_pwm_buffers( uint8_t addr, uint8_t index ) | 235 | void IS31FL3731_update_pwm_buffers(uint8_t addr, uint8_t index) { |
| 251 | { | 236 | if (g_pwm_buffer_update_required[index]) { |
| 252 | if ( g_pwm_buffer_update_required[index] ) | 237 | IS31FL3731_write_pwm_buffer(addr, g_pwm_buffer[index]); |
| 253 | { | ||
| 254 | IS31FL3731_write_pwm_buffer( addr, g_pwm_buffer[index] ); | ||
| 255 | } | 238 | } |
| 256 | g_pwm_buffer_update_required[index] = false; | 239 | g_pwm_buffer_update_required[index] = false; |
| 257 | } | 240 | } |
| 258 | 241 | ||
| 259 | void IS31FL3731_update_led_control_registers( uint8_t addr, uint8_t index ) | 242 | void IS31FL3731_update_led_control_registers(uint8_t addr, uint8_t index) { |
| 260 | { | 243 | if (g_led_control_registers_update_required[index]) { |
| 261 | if ( g_led_control_registers_update_required[index] ) | 244 | for (int i = 0; i < 18; i++) { |
| 262 | { | 245 | IS31FL3731_write_register(addr, i, g_led_control_registers[index][i]); |
| 263 | for ( int i=0; i<18; i++ ) | ||
| 264 | { | ||
| 265 | IS31FL3731_write_register( addr, i, g_led_control_registers[index][i] ); | ||
| 266 | } | 246 | } |
| 267 | } | 247 | } |
| 268 | } | 248 | } |
diff --git a/drivers/issi/is31fl3731.h b/drivers/issi/is31fl3731.h index 968638f86..6a7a45d8f 100644 --- a/drivers/issi/is31fl3731.h +++ b/drivers/issi/is31fl3731.h | |||
| @@ -15,7 +15,6 @@ | |||
| 15 | * along with this program. If not, see <http://www.gnu.org/licenses/>. | 15 | * along with this program. If not, see <http://www.gnu.org/licenses/>. |
| 16 | */ | 16 | */ |
| 17 | 17 | ||
| 18 | |||
| 19 | #ifndef IS31FL3731_DRIVER_H | 18 | #ifndef IS31FL3731_DRIVER_H |
| 20 | #define IS31FL3731_DRIVER_H | 19 | #define IS31FL3731_DRIVER_H |
| 21 | 20 | ||
| @@ -23,40 +22,40 @@ | |||
| 23 | #include <stdbool.h> | 22 | #include <stdbool.h> |
| 24 | 23 | ||
| 25 | typedef struct is31_led { | 24 | typedef struct is31_led { |
| 26 | uint8_t driver:2; | 25 | uint8_t driver : 2; |
| 27 | uint8_t r; | 26 | uint8_t r; |
| 28 | uint8_t g; | 27 | uint8_t g; |
| 29 | uint8_t b; | 28 | uint8_t b; |
| 30 | } __attribute__((packed)) is31_led; | 29 | } __attribute__((packed)) is31_led; |
| 31 | 30 | ||
| 32 | extern const is31_led g_is31_leds[DRIVER_LED_TOTAL]; | 31 | extern const is31_led g_is31_leds[DRIVER_LED_TOTAL]; |
| 33 | 32 | ||
| 34 | void IS31FL3731_init( uint8_t addr ); | 33 | void IS31FL3731_init(uint8_t addr); |
| 35 | void IS31FL3731_write_register( uint8_t addr, uint8_t reg, uint8_t data ); | 34 | void IS31FL3731_write_register(uint8_t addr, uint8_t reg, uint8_t data); |
| 36 | void IS31FL3731_write_pwm_buffer( uint8_t addr, uint8_t *pwm_buffer ); | 35 | void IS31FL3731_write_pwm_buffer(uint8_t addr, uint8_t *pwm_buffer); |
| 37 | 36 | ||
| 38 | void IS31FL3731_set_color( int index, uint8_t red, uint8_t green, uint8_t blue ); | 37 | void IS31FL3731_set_color(int index, uint8_t red, uint8_t green, uint8_t blue); |
| 39 | void IS31FL3731_set_color_all( uint8_t red, uint8_t green, uint8_t blue ); | 38 | void IS31FL3731_set_color_all(uint8_t red, uint8_t green, uint8_t blue); |
| 40 | 39 | ||
| 41 | void IS31FL3731_set_led_control_register( uint8_t index, bool red, bool green, bool blue ); | 40 | void IS31FL3731_set_led_control_register(uint8_t index, bool red, bool green, bool blue); |
| 42 | 41 | ||
| 43 | // This should not be called from an interrupt | 42 | // This should not be called from an interrupt |
| 44 | // (eg. from a timer interrupt). | 43 | // (eg. from a timer interrupt). |
| 45 | // Call this while idle (in between matrix scans). | 44 | // Call this while idle (in between matrix scans). |
| 46 | // If the buffer is dirty, it will update the driver with the buffer. | 45 | // If the buffer is dirty, it will update the driver with the buffer. |
| 47 | void IS31FL3731_update_pwm_buffers( uint8_t addr, uint8_t index ); | 46 | void IS31FL3731_update_pwm_buffers(uint8_t addr, uint8_t index); |
| 48 | void IS31FL3731_update_led_control_registers( uint8_t addr, uint8_t index ); | 47 | void IS31FL3731_update_led_control_registers(uint8_t addr, uint8_t index); |
| 49 | 48 | ||
| 50 | #define C1_1 0x24 | 49 | #define C1_1 0x24 |
| 51 | #define C1_2 0x25 | 50 | #define C1_2 0x25 |
| 52 | #define C1_3 0x26 | 51 | #define C1_3 0x26 |
| 53 | #define C1_4 0x27 | 52 | #define C1_4 0x27 |
| 54 | #define C1_5 0x28 | 53 | #define C1_5 0x28 |
| 55 | #define C1_6 0x29 | 54 | #define C1_6 0x29 |
| 56 | #define C1_7 0x2A | 55 | #define C1_7 0x2A |
| 57 | #define C1_8 0x2B | 56 | #define C1_8 0x2B |
| 58 | 57 | ||
| 59 | #define C1_9 0x2C | 58 | #define C1_9 0x2C |
| 60 | #define C1_10 0x2D | 59 | #define C1_10 0x2D |
| 61 | #define C1_11 0x2E | 60 | #define C1_11 0x2E |
| 62 | #define C1_12 0x2F | 61 | #define C1_12 0x2F |
| @@ -65,16 +64,16 @@ void IS31FL3731_update_led_control_registers( uint8_t addr, uint8_t index ); | |||
| 65 | #define C1_15 0x32 | 64 | #define C1_15 0x32 |
| 66 | #define C1_16 0x33 | 65 | #define C1_16 0x33 |
| 67 | 66 | ||
| 68 | #define C2_1 0x34 | 67 | #define C2_1 0x34 |
| 69 | #define C2_2 0x35 | 68 | #define C2_2 0x35 |
| 70 | #define C2_3 0x36 | 69 | #define C2_3 0x36 |
| 71 | #define C2_4 0x37 | 70 | #define C2_4 0x37 |
| 72 | #define C2_5 0x38 | 71 | #define C2_5 0x38 |
| 73 | #define C2_6 0x39 | 72 | #define C2_6 0x39 |
| 74 | #define C2_7 0x3A | 73 | #define C2_7 0x3A |
| 75 | #define C2_8 0x3B | 74 | #define C2_8 0x3B |
| 76 | 75 | ||
| 77 | #define C2_9 0x3C | 76 | #define C2_9 0x3C |
| 78 | #define C2_10 0x3D | 77 | #define C2_10 0x3D |
| 79 | #define C2_11 0x3E | 78 | #define C2_11 0x3E |
| 80 | #define C2_12 0x3F | 79 | #define C2_12 0x3F |
| @@ -83,16 +82,16 @@ void IS31FL3731_update_led_control_registers( uint8_t addr, uint8_t index ); | |||
| 83 | #define C2_15 0x42 | 82 | #define C2_15 0x42 |
| 84 | #define C2_16 0x43 | 83 | #define C2_16 0x43 |
| 85 | 84 | ||
| 86 | #define C3_1 0x44 | 85 | #define C3_1 0x44 |
| 87 | #define C3_2 0x45 | 86 | #define C3_2 0x45 |
| 88 | #define C3_3 0x46 | 87 | #define C3_3 0x46 |
| 89 | #define C3_4 0x47 | 88 | #define C3_4 0x47 |
| 90 | #define C3_5 0x48 | 89 | #define C3_5 0x48 |
| 91 | #define C3_6 0x49 | 90 | #define C3_6 0x49 |
| 92 | #define C3_7 0x4A | 91 | #define C3_7 0x4A |
| 93 | #define C3_8 0x4B | 92 | #define C3_8 0x4B |
| 94 | 93 | ||
| 95 | #define C3_9 0x4C | 94 | #define C3_9 0x4C |
| 96 | #define C3_10 0x4D | 95 | #define C3_10 0x4D |
| 97 | #define C3_11 0x4E | 96 | #define C3_11 0x4E |
| 98 | #define C3_12 0x4F | 97 | #define C3_12 0x4F |
| @@ -101,16 +100,16 @@ void IS31FL3731_update_led_control_registers( uint8_t addr, uint8_t index ); | |||
| 101 | #define C3_15 0x52 | 100 | #define C3_15 0x52 |
| 102 | #define C3_16 0x53 | 101 | #define C3_16 0x53 |
| 103 | 102 | ||
| 104 | #define C4_1 0x54 | 103 | #define C4_1 0x54 |
| 105 | #define C4_2 0x55 | 104 | #define C4_2 0x55 |
| 106 | #define C4_3 0x56 | 105 | #define C4_3 0x56 |
| 107 | #define C4_4 0x57 | 106 | #define C4_4 0x57 |
| 108 | #define C4_5 0x58 | 107 | #define C4_5 0x58 |
| 109 | #define C4_6 0x59 | 108 | #define C4_6 0x59 |
| 110 | #define C4_7 0x5A | 109 | #define C4_7 0x5A |
| 111 | #define C4_8 0x5B | 110 | #define C4_8 0x5B |
| 112 | 111 | ||
| 113 | #define C4_9 0x5C | 112 | #define C4_9 0x5C |
| 114 | #define C4_10 0x5D | 113 | #define C4_10 0x5D |
| 115 | #define C4_11 0x5E | 114 | #define C4_11 0x5E |
| 116 | #define C4_12 0x5F | 115 | #define C4_12 0x5F |
| @@ -119,16 +118,16 @@ void IS31FL3731_update_led_control_registers( uint8_t addr, uint8_t index ); | |||
| 119 | #define C4_15 0x62 | 118 | #define C4_15 0x62 |
| 120 | #define C4_16 0x63 | 119 | #define C4_16 0x63 |
| 121 | 120 | ||
| 122 | #define C5_1 0x64 | 121 | #define C5_1 0x64 |
| 123 | #define C5_2 0x65 | 122 | #define C5_2 0x65 |
| 124 | #define C5_3 0x66 | 123 | #define C5_3 0x66 |
| 125 | #define C5_4 0x67 | 124 | #define C5_4 0x67 |
| 126 | #define C5_5 0x68 | 125 | #define C5_5 0x68 |
| 127 | #define C5_6 0x69 | 126 | #define C5_6 0x69 |
| 128 | #define C5_7 0x6A | 127 | #define C5_7 0x6A |
| 129 | #define C5_8 0x6B | 128 | #define C5_8 0x6B |
| 130 | 129 | ||
| 131 | #define C5_9 0x6C | 130 | #define C5_9 0x6C |
| 132 | #define C5_10 0x6D | 131 | #define C5_10 0x6D |
| 133 | #define C5_11 0x6E | 132 | #define C5_11 0x6E |
| 134 | #define C5_12 0x6F | 133 | #define C5_12 0x6F |
| @@ -137,16 +136,16 @@ void IS31FL3731_update_led_control_registers( uint8_t addr, uint8_t index ); | |||
| 137 | #define C5_15 0x72 | 136 | #define C5_15 0x72 |
| 138 | #define C5_16 0x73 | 137 | #define C5_16 0x73 |
| 139 | 138 | ||
| 140 | #define C6_1 0x74 | 139 | #define C6_1 0x74 |
| 141 | #define C6_2 0x75 | 140 | #define C6_2 0x75 |
| 142 | #define C6_3 0x76 | 141 | #define C6_3 0x76 |
| 143 | #define C6_4 0x77 | 142 | #define C6_4 0x77 |
| 144 | #define C6_5 0x78 | 143 | #define C6_5 0x78 |
| 145 | #define C6_6 0x79 | 144 | #define C6_6 0x79 |
| 146 | #define C6_7 0x7A | 145 | #define C6_7 0x7A |
| 147 | #define C6_8 0x7B | 146 | #define C6_8 0x7B |
| 148 | 147 | ||
| 149 | #define C6_9 0x7C | 148 | #define C6_9 0x7C |
| 150 | #define C6_10 0x7D | 149 | #define C6_10 0x7D |
| 151 | #define C6_11 0x7E | 150 | #define C6_11 0x7E |
| 152 | #define C6_12 0x7F | 151 | #define C6_12 0x7F |
| @@ -155,16 +154,16 @@ void IS31FL3731_update_led_control_registers( uint8_t addr, uint8_t index ); | |||
| 155 | #define C6_15 0x82 | 154 | #define C6_15 0x82 |
| 156 | #define C6_16 0x83 | 155 | #define C6_16 0x83 |
| 157 | 156 | ||
| 158 | #define C7_1 0x84 | 157 | #define C7_1 0x84 |
| 159 | #define C7_2 0x85 | 158 | #define C7_2 0x85 |
| 160 | #define C7_3 0x86 | 159 | #define C7_3 0x86 |
| 161 | #define C7_4 0x87 | 160 | #define C7_4 0x87 |
| 162 | #define C7_5 0x88 | 161 | #define C7_5 0x88 |
| 163 | #define C7_6 0x89 | 162 | #define C7_6 0x89 |
| 164 | #define C7_7 0x8A | 163 | #define C7_7 0x8A |
| 165 | #define C7_8 0x8B | 164 | #define C7_8 0x8B |
| 166 | 165 | ||
| 167 | #define C7_9 0x8C | 166 | #define C7_9 0x8C |
| 168 | #define C7_10 0x8D | 167 | #define C7_10 0x8D |
| 169 | #define C7_11 0x8E | 168 | #define C7_11 0x8E |
| 170 | #define C7_12 0x8F | 169 | #define C7_12 0x8F |
| @@ -173,16 +172,16 @@ void IS31FL3731_update_led_control_registers( uint8_t addr, uint8_t index ); | |||
| 173 | #define C7_15 0x92 | 172 | #define C7_15 0x92 |
| 174 | #define C7_16 0x93 | 173 | #define C7_16 0x93 |
| 175 | 174 | ||
| 176 | #define C8_1 0x94 | 175 | #define C8_1 0x94 |
| 177 | #define C8_2 0x95 | 176 | #define C8_2 0x95 |
| 178 | #define C8_3 0x96 | 177 | #define C8_3 0x96 |
| 179 | #define C8_4 0x97 | 178 | #define C8_4 0x97 |
| 180 | #define C8_5 0x98 | 179 | #define C8_5 0x98 |
| 181 | #define C8_6 0x99 | 180 | #define C8_6 0x99 |
| 182 | #define C8_7 0x9A | 181 | #define C8_7 0x9A |
| 183 | #define C8_8 0x9B | 182 | #define C8_8 0x9B |
| 184 | 183 | ||
| 185 | #define C8_9 0x9C | 184 | #define C8_9 0x9C |
| 186 | #define C8_10 0x9D | 185 | #define C8_10 0x9D |
| 187 | #define C8_11 0x9E | 186 | #define C8_11 0x9E |
| 188 | #define C8_12 0x9F | 187 | #define C8_12 0x9F |
| @@ -191,16 +190,16 @@ void IS31FL3731_update_led_control_registers( uint8_t addr, uint8_t index ); | |||
| 191 | #define C8_15 0xA2 | 190 | #define C8_15 0xA2 |
| 192 | #define C8_16 0xA3 | 191 | #define C8_16 0xA3 |
| 193 | 192 | ||
| 194 | #define C9_1 0xA4 | 193 | #define C9_1 0xA4 |
| 195 | #define C9_2 0xA5 | 194 | #define C9_2 0xA5 |
| 196 | #define C9_3 0xA6 | 195 | #define C9_3 0xA6 |
| 197 | #define C9_4 0xA7 | 196 | #define C9_4 0xA7 |
| 198 | #define C9_5 0xA8 | 197 | #define C9_5 0xA8 |
| 199 | #define C9_6 0xA9 | 198 | #define C9_6 0xA9 |
| 200 | #define C9_7 0xAA | 199 | #define C9_7 0xAA |
| 201 | #define C9_8 0xAB | 200 | #define C9_8 0xAB |
| 202 | 201 | ||
| 203 | #define C9_9 0xAC | 202 | #define C9_9 0xAC |
| 204 | #define C9_10 0xAD | 203 | #define C9_10 0xAD |
| 205 | #define C9_11 0xAE | 204 | #define C9_11 0xAE |
| 206 | #define C9_12 0xAF | 205 | #define C9_12 0xAF |
| @@ -209,6 +208,4 @@ void IS31FL3731_update_led_control_registers( uint8_t addr, uint8_t index ); | |||
| 209 | #define C9_15 0xB2 | 208 | #define C9_15 0xB2 |
| 210 | #define C9_16 0xB3 | 209 | #define C9_16 0xB3 |
| 211 | 210 | ||
| 212 | 211 | #endif // IS31FL3731_DRIVER_H | |
| 213 | |||
| 214 | #endif // IS31FL3731_DRIVER_H | ||
diff --git a/drivers/issi/is31fl3733.c b/drivers/issi/is31fl3733.c index aa247f4e8..968f072de 100644 --- a/drivers/issi/is31fl3733.c +++ b/drivers/issi/is31fl3733.c | |||
| @@ -17,11 +17,11 @@ | |||
| 17 | */ | 17 | */ |
| 18 | 18 | ||
| 19 | #ifdef __AVR__ | 19 | #ifdef __AVR__ |
| 20 | #include <avr/interrupt.h> | 20 | # include <avr/interrupt.h> |
| 21 | #include <avr/io.h> | 21 | # include <avr/io.h> |
| 22 | #include <util/delay.h> | 22 | # include <util/delay.h> |
| 23 | #else | 23 | #else |
| 24 | #include "wait.h" | 24 | # include "wait.h" |
| 25 | #endif | 25 | #endif |
| 26 | 26 | ||
| 27 | #include "is31fl3733.h" | 27 | #include "is31fl3733.h" |
| @@ -46,23 +46,23 @@ | |||
| 46 | #define ISSI_INTERRUPTMASKREGISTER 0xF0 | 46 | #define ISSI_INTERRUPTMASKREGISTER 0xF0 |
| 47 | #define ISSI_INTERRUPTSTATUSREGISTER 0xF1 | 47 | #define ISSI_INTERRUPTSTATUSREGISTER 0xF1 |
| 48 | 48 | ||
| 49 | #define ISSI_PAGE_LEDCONTROL 0x00 //PG0 | 49 | #define ISSI_PAGE_LEDCONTROL 0x00 // PG0 |
| 50 | #define ISSI_PAGE_PWM 0x01 //PG1 | 50 | #define ISSI_PAGE_PWM 0x01 // PG1 |
| 51 | #define ISSI_PAGE_AUTOBREATH 0x02 //PG2 | 51 | #define ISSI_PAGE_AUTOBREATH 0x02 // PG2 |
| 52 | #define ISSI_PAGE_FUNCTION 0x03 //PG3 | 52 | #define ISSI_PAGE_FUNCTION 0x03 // PG3 |
| 53 | 53 | ||
| 54 | #define ISSI_REG_CONFIGURATION 0x00 //PG3 | 54 | #define ISSI_REG_CONFIGURATION 0x00 // PG3 |
| 55 | #define ISSI_REG_GLOBALCURRENT 0x01 //PG3 | 55 | #define ISSI_REG_GLOBALCURRENT 0x01 // PG3 |
| 56 | #define ISSI_REG_RESET 0x11// PG3 | 56 | #define ISSI_REG_RESET 0x11 // PG3 |
| 57 | #define ISSI_REG_SWPULLUP 0x0F //PG3 | 57 | #define ISSI_REG_SWPULLUP 0x0F // PG3 |
| 58 | #define ISSI_REG_CSPULLUP 0x10 //PG3 | 58 | #define ISSI_REG_CSPULLUP 0x10 // PG3 |
| 59 | 59 | ||
| 60 | #ifndef ISSI_TIMEOUT | 60 | #ifndef ISSI_TIMEOUT |
| 61 | #define ISSI_TIMEOUT 100 | 61 | # define ISSI_TIMEOUT 100 |
| 62 | #endif | 62 | #endif |
| 63 | 63 | ||
| 64 | #ifndef ISSI_PERSISTENCE | 64 | #ifndef ISSI_PERSISTENCE |
| 65 | #define ISSI_PERSISTENCE 0 | 65 | # define ISSI_PERSISTENCE 0 |
| 66 | #endif | 66 | #endif |
| 67 | 67 | ||
| 68 | // Transfer buffer for TWITransmitData() | 68 | // Transfer buffer for TWITransmitData() |
| @@ -75,56 +75,51 @@ uint8_t g_twi_transfer_buffer[20]; | |||
| 75 | // buffers and the transfers in IS31FL3733_write_pwm_buffer() but it's | 75 | // buffers and the transfers in IS31FL3733_write_pwm_buffer() but it's |
| 76 | // probably not worth the extra complexity. | 76 | // probably not worth the extra complexity. |
| 77 | uint8_t g_pwm_buffer[DRIVER_COUNT][192]; | 77 | uint8_t g_pwm_buffer[DRIVER_COUNT][192]; |
| 78 | bool g_pwm_buffer_update_required[DRIVER_COUNT] = { false }; | 78 | bool g_pwm_buffer_update_required[DRIVER_COUNT] = {false}; |
| 79 | 79 | ||
| 80 | uint8_t g_led_control_registers[DRIVER_COUNT][24] = { { 0 }, { 0 } }; | 80 | uint8_t g_led_control_registers[DRIVER_COUNT][24] = {{0}, {0}}; |
| 81 | bool g_led_control_registers_update_required[DRIVER_COUNT] = { false }; | 81 | bool g_led_control_registers_update_required[DRIVER_COUNT] = {false}; |
| 82 | 82 | ||
| 83 | void IS31FL3733_write_register( uint8_t addr, uint8_t reg, uint8_t data ) | 83 | void IS31FL3733_write_register(uint8_t addr, uint8_t reg, uint8_t data) { |
| 84 | { | ||
| 85 | g_twi_transfer_buffer[0] = reg; | 84 | g_twi_transfer_buffer[0] = reg; |
| 86 | g_twi_transfer_buffer[1] = data; | 85 | g_twi_transfer_buffer[1] = data; |
| 87 | 86 | ||
| 88 | #if ISSI_PERSISTENCE > 0 | 87 | #if ISSI_PERSISTENCE > 0 |
| 89 | for (uint8_t i = 0; i < ISSI_PERSISTENCE; i++) { | 88 | for (uint8_t i = 0; i < ISSI_PERSISTENCE; i++) { |
| 90 | if (i2c_transmit(addr << 1, g_twi_transfer_buffer, 2, ISSI_TIMEOUT) == 0) | 89 | if (i2c_transmit(addr << 1, g_twi_transfer_buffer, 2, ISSI_TIMEOUT) == 0) break; |
| 91 | break; | ||
| 92 | } | 90 | } |
| 93 | #else | 91 | #else |
| 94 | i2c_transmit(addr << 1, g_twi_transfer_buffer, 2, ISSI_TIMEOUT); | 92 | i2c_transmit(addr << 1, g_twi_transfer_buffer, 2, ISSI_TIMEOUT); |
| 95 | #endif | 93 | #endif |
| 96 | } | 94 | } |
| 97 | 95 | ||
| 98 | void IS31FL3733_write_pwm_buffer( uint8_t addr, uint8_t *pwm_buffer ) | 96 | void IS31FL3733_write_pwm_buffer(uint8_t addr, uint8_t *pwm_buffer) { |
| 99 | { | ||
| 100 | // assumes PG1 is already selected | 97 | // assumes PG1 is already selected |
| 101 | 98 | ||
| 102 | // transmit PWM registers in 12 transfers of 16 bytes | 99 | // transmit PWM registers in 12 transfers of 16 bytes |
| 103 | // g_twi_transfer_buffer[] is 20 bytes | 100 | // g_twi_transfer_buffer[] is 20 bytes |
| 104 | 101 | ||
| 105 | // iterate over the pwm_buffer contents at 16 byte intervals | 102 | // iterate over the pwm_buffer contents at 16 byte intervals |
| 106 | for ( int i = 0; i < 192; i += 16 ) { | 103 | for (int i = 0; i < 192; i += 16) { |
| 107 | g_twi_transfer_buffer[0] = i; | 104 | g_twi_transfer_buffer[0] = i; |
| 108 | // copy the data from i to i+15 | 105 | // copy the data from i to i+15 |
| 109 | // device will auto-increment register for data after the first byte | 106 | // device will auto-increment register for data after the first byte |
| 110 | // thus this sets registers 0x00-0x0F, 0x10-0x1F, etc. in one transfer | 107 | // thus this sets registers 0x00-0x0F, 0x10-0x1F, etc. in one transfer |
| 111 | for ( int j = 0; j < 16; j++ ) { | 108 | for (int j = 0; j < 16; j++) { |
| 112 | g_twi_transfer_buffer[1 + j] = pwm_buffer[i + j]; | 109 | g_twi_transfer_buffer[1 + j] = pwm_buffer[i + j]; |
| 113 | } | 110 | } |
| 114 | 111 | ||
| 115 | #if ISSI_PERSISTENCE > 0 | 112 | #if ISSI_PERSISTENCE > 0 |
| 116 | for (uint8_t i = 0; i < ISSI_PERSISTENCE; i++) { | 113 | for (uint8_t i = 0; i < ISSI_PERSISTENCE; i++) { |
| 117 | if (i2c_transmit(addr << 1, g_twi_transfer_buffer, 17, ISSI_TIMEOUT) == 0) | 114 | if (i2c_transmit(addr << 1, g_twi_transfer_buffer, 17, ISSI_TIMEOUT) == 0) break; |
| 118 | break; | 115 | } |
| 119 | } | 116 | #else |
| 120 | #else | 117 | i2c_transmit(addr << 1, g_twi_transfer_buffer, 17, ISSI_TIMEOUT); |
| 121 | i2c_transmit(addr << 1, g_twi_transfer_buffer, 17, ISSI_TIMEOUT); | 118 | #endif |
| 122 | #endif | ||
| 123 | } | 119 | } |
| 124 | } | 120 | } |
| 125 | 121 | ||
| 126 | void IS31FL3733_init( uint8_t addr, uint8_t sync) | 122 | void IS31FL3733_init(uint8_t addr, uint8_t sync) { |
| 127 | { | ||
| 128 | // In order to avoid the LEDs being driven with garbage data | 123 | // In order to avoid the LEDs being driven with garbage data |
| 129 | // in the LED driver's PWM registers, shutdown is enabled last. | 124 | // in the LED driver's PWM registers, shutdown is enabled last. |
| 130 | // Set up the mode and other settings, clear the PWM registers, | 125 | // Set up the mode and other settings, clear the PWM registers, |
| @@ -132,120 +127,108 @@ void IS31FL3733_init( uint8_t addr, uint8_t sync) | |||
| 132 | // Sync is passed so set it according to the datasheet. | 127 | // Sync is passed so set it according to the datasheet. |
| 133 | 128 | ||
| 134 | // Unlock the command register. | 129 | // Unlock the command register. |
| 135 | IS31FL3733_write_register( addr, ISSI_COMMANDREGISTER_WRITELOCK, 0xC5 ); | 130 | IS31FL3733_write_register(addr, ISSI_COMMANDREGISTER_WRITELOCK, 0xC5); |
| 136 | 131 | ||
| 137 | // Select PG0 | 132 | // Select PG0 |
| 138 | IS31FL3733_write_register( addr, ISSI_COMMANDREGISTER, ISSI_PAGE_LEDCONTROL ); | 133 | IS31FL3733_write_register(addr, ISSI_COMMANDREGISTER, ISSI_PAGE_LEDCONTROL); |
| 139 | // Turn off all LEDs. | 134 | // Turn off all LEDs. |
| 140 | for ( int i = 0x00; i <= 0x17; i++ ) | 135 | for (int i = 0x00; i <= 0x17; i++) { |
| 141 | { | 136 | IS31FL3733_write_register(addr, i, 0x00); |
| 142 | IS31FL3733_write_register( addr, i, 0x00 ); | ||
| 143 | } | 137 | } |
| 144 | 138 | ||
| 145 | // Unlock the command register. | 139 | // Unlock the command register. |
| 146 | IS31FL3733_write_register( addr, ISSI_COMMANDREGISTER_WRITELOCK, 0xC5 ); | 140 | IS31FL3733_write_register(addr, ISSI_COMMANDREGISTER_WRITELOCK, 0xC5); |
| 147 | 141 | ||
| 148 | // Select PG1 | 142 | // Select PG1 |
| 149 | IS31FL3733_write_register( addr, ISSI_COMMANDREGISTER, ISSI_PAGE_PWM ); | 143 | IS31FL3733_write_register(addr, ISSI_COMMANDREGISTER, ISSI_PAGE_PWM); |
| 150 | // Set PWM on all LEDs to 0 | 144 | // Set PWM on all LEDs to 0 |
| 151 | // No need to setup Breath registers to PWM as that is the default. | 145 | // No need to setup Breath registers to PWM as that is the default. |
| 152 | for ( int i = 0x00; i <= 0xBF; i++ ) | 146 | for (int i = 0x00; i <= 0xBF; i++) { |
| 153 | { | 147 | IS31FL3733_write_register(addr, i, 0x00); |
| 154 | IS31FL3733_write_register( addr, i, 0x00 ); | ||
| 155 | } | 148 | } |
| 156 | 149 | ||
| 157 | // Unlock the command register. | 150 | // Unlock the command register. |
| 158 | IS31FL3733_write_register( addr, ISSI_COMMANDREGISTER_WRITELOCK, 0xC5 ); | 151 | IS31FL3733_write_register(addr, ISSI_COMMANDREGISTER_WRITELOCK, 0xC5); |
| 159 | 152 | ||
| 160 | // Select PG3 | 153 | // Select PG3 |
| 161 | IS31FL3733_write_register( addr, ISSI_COMMANDREGISTER, ISSI_PAGE_FUNCTION ); | 154 | IS31FL3733_write_register(addr, ISSI_COMMANDREGISTER, ISSI_PAGE_FUNCTION); |
| 162 | // Set global current to maximum. | 155 | // Set global current to maximum. |
| 163 | IS31FL3733_write_register( addr, ISSI_REG_GLOBALCURRENT, 0xFF ); | 156 | IS31FL3733_write_register(addr, ISSI_REG_GLOBALCURRENT, 0xFF); |
| 164 | // Disable software shutdown. | 157 | // Disable software shutdown. |
| 165 | IS31FL3733_write_register( addr, ISSI_REG_CONFIGURATION, (sync << 6) | 0x01 ); | 158 | IS31FL3733_write_register(addr, ISSI_REG_CONFIGURATION, (sync << 6) | 0x01); |
| 166 | 159 | ||
| 167 | // Wait 10ms to ensure the device has woken up. | 160 | // Wait 10ms to ensure the device has woken up. |
| 168 | #ifdef __AVR__ | 161 | #ifdef __AVR__ |
| 169 | _delay_ms( 10 ); | 162 | _delay_ms(10); |
| 170 | #else | 163 | #else |
| 171 | wait_ms(10); | 164 | wait_ms(10); |
| 172 | #endif | 165 | #endif |
| 173 | } | 166 | } |
| 174 | 167 | ||
| 175 | void IS31FL3733_set_color( int index, uint8_t red, uint8_t green, uint8_t blue ) | 168 | void IS31FL3733_set_color(int index, uint8_t red, uint8_t green, uint8_t blue) { |
| 176 | { | 169 | if (index >= 0 && index < DRIVER_LED_TOTAL) { |
| 177 | if ( index >= 0 && index < DRIVER_LED_TOTAL ) { | ||
| 178 | is31_led led = g_is31_leds[index]; | 170 | is31_led led = g_is31_leds[index]; |
| 179 | 171 | ||
| 180 | g_pwm_buffer[led.driver][led.r] = red; | 172 | g_pwm_buffer[led.driver][led.r] = red; |
| 181 | g_pwm_buffer[led.driver][led.g] = green; | 173 | g_pwm_buffer[led.driver][led.g] = green; |
| 182 | g_pwm_buffer[led.driver][led.b] = blue; | 174 | g_pwm_buffer[led.driver][led.b] = blue; |
| 183 | g_pwm_buffer_update_required[led.driver] = true; | 175 | g_pwm_buffer_update_required[led.driver] = true; |
| 184 | } | 176 | } |
| 185 | } | 177 | } |
| 186 | 178 | ||
| 187 | void IS31FL3733_set_color_all( uint8_t red, uint8_t green, uint8_t blue ) | 179 | void IS31FL3733_set_color_all(uint8_t red, uint8_t green, uint8_t blue) { |
| 188 | { | 180 | for (int i = 0; i < DRIVER_LED_TOTAL; i++) { |
| 189 | for ( int i = 0; i < DRIVER_LED_TOTAL; i++ ) | 181 | IS31FL3733_set_color(i, red, green, blue); |
| 190 | { | ||
| 191 | IS31FL3733_set_color( i, red, green, blue ); | ||
| 192 | } | 182 | } |
| 193 | } | 183 | } |
| 194 | 184 | ||
| 195 | void IS31FL3733_set_led_control_register( uint8_t index, bool red, bool green, bool blue ) | 185 | void IS31FL3733_set_led_control_register(uint8_t index, bool red, bool green, bool blue) { |
| 196 | { | ||
| 197 | is31_led led = g_is31_leds[index]; | 186 | is31_led led = g_is31_leds[index]; |
| 198 | 187 | ||
| 199 | uint8_t control_register_r = led.r / 8; | 188 | uint8_t control_register_r = led.r / 8; |
| 200 | uint8_t control_register_g = led.g / 8; | 189 | uint8_t control_register_g = led.g / 8; |
| 201 | uint8_t control_register_b = led.b / 8; | 190 | uint8_t control_register_b = led.b / 8; |
| 202 | uint8_t bit_r = led.r % 8; | 191 | uint8_t bit_r = led.r % 8; |
| 203 | uint8_t bit_g = led.g % 8; | 192 | uint8_t bit_g = led.g % 8; |
| 204 | uint8_t bit_b = led.b % 8; | 193 | uint8_t bit_b = led.b % 8; |
| 205 | 194 | ||
| 206 | if ( red ) { | 195 | if (red) { |
| 207 | g_led_control_registers[led.driver][control_register_r] |= (1 << bit_r); | 196 | g_led_control_registers[led.driver][control_register_r] |= (1 << bit_r); |
| 208 | } else { | 197 | } else { |
| 209 | g_led_control_registers[led.driver][control_register_r] &= ~(1 << bit_r); | 198 | g_led_control_registers[led.driver][control_register_r] &= ~(1 << bit_r); |
| 210 | } | 199 | } |
| 211 | if ( green ) { | 200 | if (green) { |
| 212 | g_led_control_registers[led.driver][control_register_g] |= (1 << bit_g); | 201 | g_led_control_registers[led.driver][control_register_g] |= (1 << bit_g); |
| 213 | } else { | 202 | } else { |
| 214 | g_led_control_registers[led.driver][control_register_g] &= ~(1 << bit_g); | 203 | g_led_control_registers[led.driver][control_register_g] &= ~(1 << bit_g); |
| 215 | } | 204 | } |
| 216 | if ( blue ) { | 205 | if (blue) { |
| 217 | g_led_control_registers[led.driver][control_register_b] |= (1 << bit_b); | 206 | g_led_control_registers[led.driver][control_register_b] |= (1 << bit_b); |
| 218 | } else { | 207 | } else { |
| 219 | g_led_control_registers[led.driver][control_register_b] &= ~(1 << bit_b); | 208 | g_led_control_registers[led.driver][control_register_b] &= ~(1 << bit_b); |
| 220 | } | 209 | } |
| 221 | 210 | ||
| 222 | g_led_control_registers_update_required[led.driver] = true; | 211 | g_led_control_registers_update_required[led.driver] = true; |
| 223 | |||
| 224 | } | 212 | } |
| 225 | 213 | ||
| 226 | void IS31FL3733_update_pwm_buffers( uint8_t addr, uint8_t index ) | 214 | void IS31FL3733_update_pwm_buffers(uint8_t addr, uint8_t index) { |
| 227 | { | 215 | if (g_pwm_buffer_update_required[index]) { |
| 228 | if ( g_pwm_buffer_update_required[index] ) | ||
| 229 | { | ||
| 230 | // Firstly we need to unlock the command register and select PG1 | 216 | // Firstly we need to unlock the command register and select PG1 |
| 231 | IS31FL3733_write_register( addr, ISSI_COMMANDREGISTER_WRITELOCK, 0xC5 ); | 217 | IS31FL3733_write_register(addr, ISSI_COMMANDREGISTER_WRITELOCK, 0xC5); |
| 232 | IS31FL3733_write_register( addr, ISSI_COMMANDREGISTER, ISSI_PAGE_PWM ); | 218 | IS31FL3733_write_register(addr, ISSI_COMMANDREGISTER, ISSI_PAGE_PWM); |
| 233 | 219 | ||
| 234 | IS31FL3733_write_pwm_buffer( addr, g_pwm_buffer[index] ); | 220 | IS31FL3733_write_pwm_buffer(addr, g_pwm_buffer[index]); |
| 235 | } | 221 | } |
| 236 | g_pwm_buffer_update_required[index] = false; | 222 | g_pwm_buffer_update_required[index] = false; |
| 237 | } | 223 | } |
| 238 | 224 | ||
| 239 | void IS31FL3733_update_led_control_registers( uint8_t addr, uint8_t index ) | 225 | void IS31FL3733_update_led_control_registers(uint8_t addr, uint8_t index) { |
| 240 | { | 226 | if (g_led_control_registers_update_required[index]) { |
| 241 | if ( g_led_control_registers_update_required[index] ) | ||
| 242 | { | ||
| 243 | // Firstly we need to unlock the command register and select PG0 | 227 | // Firstly we need to unlock the command register and select PG0 |
| 244 | IS31FL3733_write_register( addr, ISSI_COMMANDREGISTER_WRITELOCK, 0xC5 ); | 228 | IS31FL3733_write_register(addr, ISSI_COMMANDREGISTER_WRITELOCK, 0xC5); |
| 245 | IS31FL3733_write_register( addr, ISSI_COMMANDREGISTER, ISSI_PAGE_LEDCONTROL ); | 229 | IS31FL3733_write_register(addr, ISSI_COMMANDREGISTER, ISSI_PAGE_LEDCONTROL); |
| 246 | for ( int i=0; i<24; i++ ) | 230 | for (int i = 0; i < 24; i++) { |
| 247 | { | 231 | IS31FL3733_write_register(addr, i, g_led_control_registers[index][i]); |
| 248 | IS31FL3733_write_register(addr, i, g_led_control_registers[index][i] ); | ||
| 249 | } | 232 | } |
| 250 | } | 233 | } |
| 251 | g_led_control_registers_update_required[index] = false; | 234 | g_led_control_registers_update_required[index] = false; |
diff --git a/drivers/issi/is31fl3733.h b/drivers/issi/is31fl3733.h index e117b2546..5b3283e03 100644 --- a/drivers/issi/is31fl3733.h +++ b/drivers/issi/is31fl3733.h | |||
| @@ -16,7 +16,6 @@ | |||
| 16 | * along with this program. If not, see <http://www.gnu.org/licenses/>. | 16 | * along with this program. If not, see <http://www.gnu.org/licenses/>. |
| 17 | */ | 17 | */ |
| 18 | 18 | ||
| 19 | |||
| 20 | #ifndef IS31FL3733_DRIVER_H | 19 | #ifndef IS31FL3733_DRIVER_H |
| 21 | #define IS31FL3733_DRIVER_H | 20 | #define IS31FL3733_DRIVER_H |
| 22 | 21 | ||
| @@ -24,232 +23,232 @@ | |||
| 24 | #include <stdbool.h> | 23 | #include <stdbool.h> |
| 25 | 24 | ||
| 26 | typedef struct is31_led { | 25 | typedef struct is31_led { |
| 27 | uint8_t driver:2; | 26 | uint8_t driver : 2; |
| 28 | uint8_t r; | 27 | uint8_t r; |
| 29 | uint8_t g; | 28 | uint8_t g; |
| 30 | uint8_t b; | 29 | uint8_t b; |
| 31 | } __attribute__((packed)) is31_led; | 30 | } __attribute__((packed)) is31_led; |
| 32 | 31 | ||
| 33 | extern const is31_led g_is31_leds[DRIVER_LED_TOTAL]; | 32 | extern const is31_led g_is31_leds[DRIVER_LED_TOTAL]; |
| 34 | 33 | ||
| 35 | void IS31FL3733_init( uint8_t addr, uint8_t sync ); | 34 | void IS31FL3733_init(uint8_t addr, uint8_t sync); |
| 36 | void IS31FL3733_write_register( uint8_t addr, uint8_t reg, uint8_t data ); | 35 | void IS31FL3733_write_register(uint8_t addr, uint8_t reg, uint8_t data); |
| 37 | void IS31FL3733_write_pwm_buffer( uint8_t addr, uint8_t *pwm_buffer ); | 36 | void IS31FL3733_write_pwm_buffer(uint8_t addr, uint8_t *pwm_buffer); |
| 38 | 37 | ||
| 39 | void IS31FL3733_set_color( int index, uint8_t red, uint8_t green, uint8_t blue ); | 38 | void IS31FL3733_set_color(int index, uint8_t red, uint8_t green, uint8_t blue); |
| 40 | void IS31FL3733_set_color_all( uint8_t red, uint8_t green, uint8_t blue ); | 39 | void IS31FL3733_set_color_all(uint8_t red, uint8_t green, uint8_t blue); |
| 41 | 40 | ||
| 42 | void IS31FL3733_set_led_control_register( uint8_t index, bool red, bool green, bool blue ); | 41 | void IS31FL3733_set_led_control_register(uint8_t index, bool red, bool green, bool blue); |
| 43 | 42 | ||
| 44 | // This should not be called from an interrupt | 43 | // This should not be called from an interrupt |
| 45 | // (eg. from a timer interrupt). | 44 | // (eg. from a timer interrupt). |
| 46 | // Call this while idle (in between matrix scans). | 45 | // Call this while idle (in between matrix scans). |
| 47 | // If the buffer is dirty, it will update the driver with the buffer. | 46 | // If the buffer is dirty, it will update the driver with the buffer. |
| 48 | void IS31FL3733_update_pwm_buffers( uint8_t addr, uint8_t index ); | 47 | void IS31FL3733_update_pwm_buffers(uint8_t addr, uint8_t index); |
| 49 | void IS31FL3733_update_led_control_registers( uint8_t addr, uint8_t index ); | 48 | void IS31FL3733_update_led_control_registers(uint8_t addr, uint8_t index); |
| 50 | 49 | ||
| 51 | #define A_1 0x00 | 50 | #define A_1 0x00 |
| 52 | #define A_2 0x01 | 51 | #define A_2 0x01 |
| 53 | #define A_3 0x02 | 52 | #define A_3 0x02 |
| 54 | #define A_4 0x03 | 53 | #define A_4 0x03 |
| 55 | #define A_5 0x04 | 54 | #define A_5 0x04 |
| 56 | #define A_6 0x05 | 55 | #define A_6 0x05 |
| 57 | #define A_7 0x06 | 56 | #define A_7 0x06 |
| 58 | #define A_8 0x07 | 57 | #define A_8 0x07 |
| 59 | #define A_9 0x08 | 58 | #define A_9 0x08 |
| 60 | #define A_10 0x09 | 59 | #define A_10 0x09 |
| 61 | #define A_11 0x0A | 60 | #define A_11 0x0A |
| 62 | #define A_12 0x0B | 61 | #define A_12 0x0B |
| 63 | #define A_13 0x0C | 62 | #define A_13 0x0C |
| 64 | #define A_14 0x0D | 63 | #define A_14 0x0D |
| 65 | #define A_15 0x0E | 64 | #define A_15 0x0E |
| 66 | #define A_16 0x0F | 65 | #define A_16 0x0F |
| 67 | 66 | ||
| 68 | #define B_1 0x10 | 67 | #define B_1 0x10 |
| 69 | #define B_2 0x11 | 68 | #define B_2 0x11 |
| 70 | #define B_3 0x12 | 69 | #define B_3 0x12 |
| 71 | #define B_4 0x13 | 70 | #define B_4 0x13 |
| 72 | #define B_5 0x14 | 71 | #define B_5 0x14 |
| 73 | #define B_6 0x15 | 72 | #define B_6 0x15 |
| 74 | #define B_7 0x16 | 73 | #define B_7 0x16 |
| 75 | #define B_8 0x17 | 74 | #define B_8 0x17 |
| 76 | #define B_9 0x18 | 75 | #define B_9 0x18 |
| 77 | #define B_10 0x19 | 76 | #define B_10 0x19 |
| 78 | #define B_11 0x1A | 77 | #define B_11 0x1A |
| 79 | #define B_12 0x1B | 78 | #define B_12 0x1B |
| 80 | #define B_13 0x1C | 79 | #define B_13 0x1C |
| 81 | #define B_14 0x1D | 80 | #define B_14 0x1D |
| 82 | #define B_15 0x1E | 81 | #define B_15 0x1E |
| 83 | #define B_16 0x1F | 82 | #define B_16 0x1F |
| 84 | 83 | ||
| 85 | #define C_1 0x20 | 84 | #define C_1 0x20 |
| 86 | #define C_2 0x21 | 85 | #define C_2 0x21 |
| 87 | #define C_3 0x22 | 86 | #define C_3 0x22 |
| 88 | #define C_4 0x23 | 87 | #define C_4 0x23 |
| 89 | #define C_5 0x24 | 88 | #define C_5 0x24 |
| 90 | #define C_6 0x25 | 89 | #define C_6 0x25 |
| 91 | #define C_7 0x26 | 90 | #define C_7 0x26 |
| 92 | #define C_8 0x27 | 91 | #define C_8 0x27 |
| 93 | #define C_9 0x28 | 92 | #define C_9 0x28 |
| 94 | #define C_10 0x29 | 93 | #define C_10 0x29 |
| 95 | #define C_11 0x2A | 94 | #define C_11 0x2A |
| 96 | #define C_12 0x2B | 95 | #define C_12 0x2B |
| 97 | #define C_13 0x2C | 96 | #define C_13 0x2C |
| 98 | #define C_14 0x2D | 97 | #define C_14 0x2D |
| 99 | #define C_15 0x2E | 98 | #define C_15 0x2E |
| 100 | #define C_16 0x2F | 99 | #define C_16 0x2F |
| 101 | 100 | ||
| 102 | #define D_1 0x30 | 101 | #define D_1 0x30 |
| 103 | #define D_2 0x31 | 102 | #define D_2 0x31 |
| 104 | #define D_3 0x32 | 103 | #define D_3 0x32 |
| 105 | #define D_4 0x33 | 104 | #define D_4 0x33 |
| 106 | #define D_5 0x34 | 105 | #define D_5 0x34 |
| 107 | #define D_6 0x35 | 106 | #define D_6 0x35 |
| 108 | #define D_7 0x36 | 107 | #define D_7 0x36 |
| 109 | #define D_8 0x37 | 108 | #define D_8 0x37 |
| 110 | #define D_9 0x38 | 109 | #define D_9 0x38 |
| 111 | #define D_10 0x39 | 110 | #define D_10 0x39 |
| 112 | #define D_11 0x3A | 111 | #define D_11 0x3A |
| 113 | #define D_12 0x3B | 112 | #define D_12 0x3B |
| 114 | #define D_13 0x3C | 113 | #define D_13 0x3C |
| 115 | #define D_14 0x3D | 114 | #define D_14 0x3D |
| 116 | #define D_15 0x3E | 115 | #define D_15 0x3E |
| 117 | #define D_16 0x3F | 116 | #define D_16 0x3F |
| 118 | 117 | ||
| 119 | #define E_1 0x40 | 118 | #define E_1 0x40 |
| 120 | #define E_2 0x41 | 119 | #define E_2 0x41 |
| 121 | #define E_3 0x42 | 120 | #define E_3 0x42 |
| 122 | #define E_4 0x43 | 121 | #define E_4 0x43 |
| 123 | #define E_5 0x44 | 122 | #define E_5 0x44 |
| 124 | #define E_6 0x45 | 123 | #define E_6 0x45 |
| 125 | #define E_7 0x46 | 124 | #define E_7 0x46 |
| 126 | #define E_8 0x47 | 125 | #define E_8 0x47 |
| 127 | #define E_9 0x48 | 126 | #define E_9 0x48 |
| 128 | #define E_10 0x49 | 127 | #define E_10 0x49 |
| 129 | #define E_11 0x4A | 128 | #define E_11 0x4A |
| 130 | #define E_12 0x4B | 129 | #define E_12 0x4B |
| 131 | #define E_13 0x4C | 130 | #define E_13 0x4C |
| 132 | #define E_14 0x4D | 131 | #define E_14 0x4D |
| 133 | #define E_15 0x4E | 132 | #define E_15 0x4E |
| 134 | #define E_16 0x4F | 133 | #define E_16 0x4F |
| 135 | 134 | ||
| 136 | #define F_1 0x50 | 135 | #define F_1 0x50 |
| 137 | #define F_2 0x51 | 136 | #define F_2 0x51 |
| 138 | #define F_3 0x52 | 137 | #define F_3 0x52 |
| 139 | #define F_4 0x53 | 138 | #define F_4 0x53 |
| 140 | #define F_5 0x54 | 139 | #define F_5 0x54 |
| 141 | #define F_6 0x55 | 140 | #define F_6 0x55 |
| 142 | #define F_7 0x56 | 141 | #define F_7 0x56 |
| 143 | #define F_8 0x57 | 142 | #define F_8 0x57 |
| 144 | #define F_9 0x58 | 143 | #define F_9 0x58 |
| 145 | #define F_10 0x59 | 144 | #define F_10 0x59 |
| 146 | #define F_11 0x5A | 145 | #define F_11 0x5A |
| 147 | #define F_12 0x5B | 146 | #define F_12 0x5B |
| 148 | #define F_13 0x5C | 147 | #define F_13 0x5C |
| 149 | #define F_14 0x5D | 148 | #define F_14 0x5D |
| 150 | #define F_15 0x5E | 149 | #define F_15 0x5E |
| 151 | #define F_16 0x5F | 150 | #define F_16 0x5F |
| 152 | 151 | ||
| 153 | #define G_1 0x60 | 152 | #define G_1 0x60 |
| 154 | #define G_2 0x61 | 153 | #define G_2 0x61 |
| 155 | #define G_3 0x62 | 154 | #define G_3 0x62 |
| 156 | #define G_4 0x63 | 155 | #define G_4 0x63 |
| 157 | #define G_5 0x64 | 156 | #define G_5 0x64 |
| 158 | #define G_6 0x65 | 157 | #define G_6 0x65 |
| 159 | #define G_7 0x66 | 158 | #define G_7 0x66 |
| 160 | #define G_8 0x67 | 159 | #define G_8 0x67 |
| 161 | #define G_9 0x68 | 160 | #define G_9 0x68 |
| 162 | #define G_10 0x69 | 161 | #define G_10 0x69 |
| 163 | #define G_11 0x6A | 162 | #define G_11 0x6A |
| 164 | #define G_12 0x6B | 163 | #define G_12 0x6B |
| 165 | #define G_13 0x6C | 164 | #define G_13 0x6C |
| 166 | #define G_14 0x6D | 165 | #define G_14 0x6D |
| 167 | #define G_15 0x6E | 166 | #define G_15 0x6E |
| 168 | #define G_16 0x6F | 167 | #define G_16 0x6F |
| 169 | 168 | ||
| 170 | #define H_1 0x70 | 169 | #define H_1 0x70 |
| 171 | #define H_2 0x71 | 170 | #define H_2 0x71 |
| 172 | #define H_3 0x72 | 171 | #define H_3 0x72 |
| 173 | #define H_4 0x73 | 172 | #define H_4 0x73 |
| 174 | #define H_5 0x74 | 173 | #define H_5 0x74 |
| 175 | #define H_6 0x75 | 174 | #define H_6 0x75 |
| 176 | #define H_7 0x76 | 175 | #define H_7 0x76 |
| 177 | #define H_8 0x77 | 176 | #define H_8 0x77 |
| 178 | #define H_9 0x78 | 177 | #define H_9 0x78 |
| 179 | #define H_10 0x79 | 178 | #define H_10 0x79 |
| 180 | #define H_11 0x7A | 179 | #define H_11 0x7A |
| 181 | #define H_12 0x7B | 180 | #define H_12 0x7B |
| 182 | #define H_13 0x7C | 181 | #define H_13 0x7C |
| 183 | #define H_14 0x7D | 182 | #define H_14 0x7D |
| 184 | #define H_15 0x7E | 183 | #define H_15 0x7E |
| 185 | #define H_16 0x7F | 184 | #define H_16 0x7F |
| 186 | 185 | ||
| 187 | #define I_1 0x80 | 186 | #define I_1 0x80 |
| 188 | #define I_2 0x81 | 187 | #define I_2 0x81 |
| 189 | #define I_3 0x82 | 188 | #define I_3 0x82 |
| 190 | #define I_4 0x83 | 189 | #define I_4 0x83 |
| 191 | #define I_5 0x84 | 190 | #define I_5 0x84 |
| 192 | #define I_6 0x85 | 191 | #define I_6 0x85 |
| 193 | #define I_7 0x86 | 192 | #define I_7 0x86 |
| 194 | #define I_8 0x87 | 193 | #define I_8 0x87 |
| 195 | #define I_9 0x88 | 194 | #define I_9 0x88 |
| 196 | #define I_10 0x89 | 195 | #define I_10 0x89 |
| 197 | #define I_11 0x8A | 196 | #define I_11 0x8A |
| 198 | #define I_12 0x8B | 197 | #define I_12 0x8B |
| 199 | #define I_13 0x8C | 198 | #define I_13 0x8C |
| 200 | #define I_14 0x8D | 199 | #define I_14 0x8D |
| 201 | #define I_15 0x8E | 200 | #define I_15 0x8E |
| 202 | #define I_16 0x8F | 201 | #define I_16 0x8F |
| 203 | 202 | ||
| 204 | #define J_1 0x90 | 203 | #define J_1 0x90 |
| 205 | #define J_2 0x91 | 204 | #define J_2 0x91 |
| 206 | #define J_3 0x92 | 205 | #define J_3 0x92 |
| 207 | #define J_4 0x93 | 206 | #define J_4 0x93 |
| 208 | #define J_5 0x94 | 207 | #define J_5 0x94 |
| 209 | #define J_6 0x95 | 208 | #define J_6 0x95 |
| 210 | #define J_7 0x96 | 209 | #define J_7 0x96 |
| 211 | #define J_8 0x97 | 210 | #define J_8 0x97 |
| 212 | #define J_9 0x98 | 211 | #define J_9 0x98 |
| 213 | #define J_10 0x99 | 212 | #define J_10 0x99 |
| 214 | #define J_11 0x9A | 213 | #define J_11 0x9A |
| 215 | #define J_12 0x9B | 214 | #define J_12 0x9B |
| 216 | #define J_13 0x9C | 215 | #define J_13 0x9C |
| 217 | #define J_14 0x9D | 216 | #define J_14 0x9D |
| 218 | #define J_15 0x9E | 217 | #define J_15 0x9E |
| 219 | #define J_16 0x9F | 218 | #define J_16 0x9F |
| 220 | 219 | ||
| 221 | #define K_1 0xA0 | 220 | #define K_1 0xA0 |
| 222 | #define K_2 0xA1 | 221 | #define K_2 0xA1 |
| 223 | #define K_3 0xA2 | 222 | #define K_3 0xA2 |
| 224 | #define K_4 0xA3 | 223 | #define K_4 0xA3 |
| 225 | #define K_5 0xA4 | 224 | #define K_5 0xA4 |
| 226 | #define K_6 0xA5 | 225 | #define K_6 0xA5 |
| 227 | #define K_7 0xA6 | 226 | #define K_7 0xA6 |
| 228 | #define K_8 0xA7 | 227 | #define K_8 0xA7 |
| 229 | #define K_9 0xA8 | 228 | #define K_9 0xA8 |
| 230 | #define K_10 0xA9 | 229 | #define K_10 0xA9 |
| 231 | #define K_11 0xAA | 230 | #define K_11 0xAA |
| 232 | #define K_12 0xAB | 231 | #define K_12 0xAB |
| 233 | #define K_13 0xAC | 232 | #define K_13 0xAC |
| 234 | #define K_14 0xAD | 233 | #define K_14 0xAD |
| 235 | #define K_15 0xAE | 234 | #define K_15 0xAE |
| 236 | #define K_16 0xAF | 235 | #define K_16 0xAF |
| 237 | 236 | ||
| 238 | #define L_1 0xB0 | 237 | #define L_1 0xB0 |
| 239 | #define L_2 0xB1 | 238 | #define L_2 0xB1 |
| 240 | #define L_3 0xB2 | 239 | #define L_3 0xB2 |
| 241 | #define L_4 0xB3 | 240 | #define L_4 0xB3 |
| 242 | #define L_5 0xB4 | 241 | #define L_5 0xB4 |
| 243 | #define L_6 0xB5 | 242 | #define L_6 0xB5 |
| 244 | #define L_7 0xB6 | 243 | #define L_7 0xB6 |
| 245 | #define L_8 0xB7 | 244 | #define L_8 0xB7 |
| 246 | #define L_9 0xB8 | 245 | #define L_9 0xB8 |
| 247 | #define L_10 0xB9 | 246 | #define L_10 0xB9 |
| 248 | #define L_11 0xBA | 247 | #define L_11 0xBA |
| 249 | #define L_12 0xBB | 248 | #define L_12 0xBB |
| 250 | #define L_13 0xBC | 249 | #define L_13 0xBC |
| 251 | #define L_14 0xBD | 250 | #define L_14 0xBD |
| 252 | #define L_15 0xBE | 251 | #define L_15 0xBE |
| 253 | #define L_16 0xBF | 252 | #define L_16 0xBF |
| 254 | 253 | ||
| 255 | #endif // IS31FL3733_DRIVER_H | 254 | #endif // IS31FL3733_DRIVER_H |
diff --git a/drivers/issi/is31fl3736.c b/drivers/issi/is31fl3736.c index c5d431097..754292425 100644 --- a/drivers/issi/is31fl3736.c +++ b/drivers/issi/is31fl3736.c | |||
| @@ -14,13 +14,12 @@ | |||
| 14 | * along with this program. If not, see <http://www.gnu.org/licenses/>. | 14 | * along with this program. If not, see <http://www.gnu.org/licenses/>. |
| 15 | */ | 15 | */ |
| 16 | 16 | ||
| 17 | |||
| 18 | #ifdef __AVR__ | 17 | #ifdef __AVR__ |
| 19 | #include <avr/interrupt.h> | 18 | # include <avr/interrupt.h> |
| 20 | #include <avr/io.h> | 19 | # include <avr/io.h> |
| 21 | #include <util/delay.h> | 20 | # include <util/delay.h> |
| 22 | #else | 21 | #else |
| 23 | #include "wait.h" | 22 | # include "wait.h" |
| 24 | #endif | 23 | #endif |
| 25 | 24 | ||
| 26 | #include "is31fl3736.h" | 25 | #include "is31fl3736.h" |
| @@ -28,8 +27,6 @@ | |||
| 28 | #include "i2c_master.h" | 27 | #include "i2c_master.h" |
| 29 | #include "progmem.h" | 28 | #include "progmem.h" |
| 30 | 29 | ||
| 31 | |||
| 32 | |||
| 33 | // This is a 7-bit address, that gets left-shifted and bit 0 | 30 | // This is a 7-bit address, that gets left-shifted and bit 0 |
| 34 | // set to 0 for write, 1 for read (as per I2C protocol) | 31 | // set to 0 for write, 1 for read (as per I2C protocol) |
| 35 | // The address will vary depending on your wiring: | 32 | // The address will vary depending on your wiring: |
| @@ -47,23 +44,23 @@ | |||
| 47 | #define ISSI_INTERRUPTMASKREGISTER 0xF0 | 44 | #define ISSI_INTERRUPTMASKREGISTER 0xF0 |
| 48 | #define ISSI_INTERRUPTSTATUSREGISTER 0xF1 | 45 | #define ISSI_INTERRUPTSTATUSREGISTER 0xF1 |
| 49 | 46 | ||
| 50 | #define ISSI_PAGE_LEDCONTROL 0x00 //PG0 | 47 | #define ISSI_PAGE_LEDCONTROL 0x00 // PG0 |
| 51 | #define ISSI_PAGE_PWM 0x01 //PG1 | 48 | #define ISSI_PAGE_PWM 0x01 // PG1 |
| 52 | #define ISSI_PAGE_AUTOBREATH 0x02 //PG2 | 49 | #define ISSI_PAGE_AUTOBREATH 0x02 // PG2 |
| 53 | #define ISSI_PAGE_FUNCTION 0x03 //PG3 | 50 | #define ISSI_PAGE_FUNCTION 0x03 // PG3 |
| 54 | 51 | ||
| 55 | #define ISSI_REG_CONFIGURATION 0x00 //PG3 | 52 | #define ISSI_REG_CONFIGURATION 0x00 // PG3 |
| 56 | #define ISSI_REG_GLOBALCURRENT 0x01 //PG3 | 53 | #define ISSI_REG_GLOBALCURRENT 0x01 // PG3 |
| 57 | #define ISSI_REG_RESET 0x11// PG3 | 54 | #define ISSI_REG_RESET 0x11 // PG3 |
| 58 | #define ISSI_REG_SWPULLUP 0x0F //PG3 | 55 | #define ISSI_REG_SWPULLUP 0x0F // PG3 |
| 59 | #define ISSI_REG_CSPULLUP 0x10 //PG3 | 56 | #define ISSI_REG_CSPULLUP 0x10 // PG3 |
| 60 | 57 | ||
| 61 | #ifndef ISSI_TIMEOUT | 58 | #ifndef ISSI_TIMEOUT |
| 62 | #define ISSI_TIMEOUT 100 | 59 | # define ISSI_TIMEOUT 100 |
| 63 | #endif | 60 | #endif |
| 64 | 61 | ||
| 65 | #ifndef ISSI_PERSISTENCE | 62 | #ifndef ISSI_PERSISTENCE |
| 66 | #define ISSI_PERSISTENCE 0 | 63 | # define ISSI_PERSISTENCE 0 |
| 67 | #endif | 64 | #endif |
| 68 | 65 | ||
| 69 | // Transfer buffer for TWITransmitData() | 66 | // Transfer buffer for TWITransmitData() |
| @@ -76,124 +73,113 @@ uint8_t g_twi_transfer_buffer[20]; | |||
| 76 | // buffers and the transfers in IS31FL3736_write_pwm_buffer() but it's | 73 | // buffers and the transfers in IS31FL3736_write_pwm_buffer() but it's |
| 77 | // probably not worth the extra complexity. | 74 | // probably not worth the extra complexity. |
| 78 | uint8_t g_pwm_buffer[DRIVER_COUNT][192]; | 75 | uint8_t g_pwm_buffer[DRIVER_COUNT][192]; |
| 79 | bool g_pwm_buffer_update_required = false; | 76 | bool g_pwm_buffer_update_required = false; |
| 80 | 77 | ||
| 81 | uint8_t g_led_control_registers[DRIVER_COUNT][24] = { { 0 }, { 0 } }; | 78 | uint8_t g_led_control_registers[DRIVER_COUNT][24] = {{0}, {0}}; |
| 82 | bool g_led_control_registers_update_required = false; | 79 | bool g_led_control_registers_update_required = false; |
| 83 | 80 | ||
| 84 | void IS31FL3736_write_register( uint8_t addr, uint8_t reg, uint8_t data ) | 81 | void IS31FL3736_write_register(uint8_t addr, uint8_t reg, uint8_t data) { |
| 85 | { | ||
| 86 | g_twi_transfer_buffer[0] = reg; | 82 | g_twi_transfer_buffer[0] = reg; |
| 87 | g_twi_transfer_buffer[1] = data; | 83 | g_twi_transfer_buffer[1] = data; |
| 88 | 84 | ||
| 89 | #if ISSI_PERSISTENCE > 0 | 85 | #if ISSI_PERSISTENCE > 0 |
| 90 | for (uint8_t i = 0; i < ISSI_PERSISTENCE; i++) { | 86 | for (uint8_t i = 0; i < ISSI_PERSISTENCE; i++) { |
| 91 | if (i2c_transmit(addr << 1, g_twi_transfer_buffer, 2, ISSI_TIMEOUT) == 0) | 87 | if (i2c_transmit(addr << 1, g_twi_transfer_buffer, 2, ISSI_TIMEOUT) == 0) break; |
| 92 | break; | ||
| 93 | } | 88 | } |
| 94 | #else | 89 | #else |
| 95 | i2c_transmit(addr << 1, g_twi_transfer_buffer, 2, ISSI_TIMEOUT); | 90 | i2c_transmit(addr << 1, g_twi_transfer_buffer, 2, ISSI_TIMEOUT); |
| 96 | #endif | 91 | #endif |
| 97 | } | 92 | } |
| 98 | 93 | ||
| 99 | void IS31FL3736_write_pwm_buffer( uint8_t addr, uint8_t *pwm_buffer ) | 94 | void IS31FL3736_write_pwm_buffer(uint8_t addr, uint8_t *pwm_buffer) { |
| 100 | { | ||
| 101 | // assumes PG1 is already selected | 95 | // assumes PG1 is already selected |
| 102 | 96 | ||
| 103 | // transmit PWM registers in 12 transfers of 16 bytes | 97 | // transmit PWM registers in 12 transfers of 16 bytes |
| 104 | // g_twi_transfer_buffer[] is 20 bytes | 98 | // g_twi_transfer_buffer[] is 20 bytes |
| 105 | 99 | ||
| 106 | // iterate over the pwm_buffer contents at 16 byte intervals | 100 | // iterate over the pwm_buffer contents at 16 byte intervals |
| 107 | for ( int i = 0; i < 192; i += 16 ) { | 101 | for (int i = 0; i < 192; i += 16) { |
| 108 | g_twi_transfer_buffer[0] = i; | 102 | g_twi_transfer_buffer[0] = i; |
| 109 | // copy the data from i to i+15 | 103 | // copy the data from i to i+15 |
| 110 | // device will auto-increment register for data after the first byte | 104 | // device will auto-increment register for data after the first byte |
| 111 | // thus this sets registers 0x00-0x0F, 0x10-0x1F, etc. in one transfer | 105 | // thus this sets registers 0x00-0x0F, 0x10-0x1F, etc. in one transfer |
| 112 | for ( int j = 0; j < 16; j++ ) { | 106 | for (int j = 0; j < 16; j++) { |
| 113 | g_twi_transfer_buffer[1 + j] = pwm_buffer[i + j]; | 107 | g_twi_transfer_buffer[1 + j] = pwm_buffer[i + j]; |
| 114 | } | 108 | } |
| 115 | 109 | ||
| 116 | #if ISSI_PERSISTENCE > 0 | 110 | #if ISSI_PERSISTENCE > 0 |
| 117 | for (uint8_t i = 0; i < ISSI_PERSISTENCE; i++) { | 111 | for (uint8_t i = 0; i < ISSI_PERSISTENCE; i++) { |
| 118 | if (i2c_transmit(addr << 1, g_twi_transfer_buffer, 17, ISSI_TIMEOUT) == 0) | 112 | if (i2c_transmit(addr << 1, g_twi_transfer_buffer, 17, ISSI_TIMEOUT) == 0) break; |
| 119 | break; | 113 | } |
| 120 | } | 114 | #else |
| 121 | #else | 115 | i2c_transmit(addr << 1, g_twi_transfer_buffer, 17, ISSI_TIMEOUT); |
| 122 | i2c_transmit(addr << 1, g_twi_transfer_buffer, 17, ISSI_TIMEOUT); | 116 | #endif |
| 123 | #endif | ||
| 124 | } | 117 | } |
| 125 | } | 118 | } |
| 126 | 119 | ||
| 127 | void IS31FL3736_init( uint8_t addr ) | 120 | void IS31FL3736_init(uint8_t addr) { |
| 128 | { | ||
| 129 | // In order to avoid the LEDs being driven with garbage data | 121 | // In order to avoid the LEDs being driven with garbage data |
| 130 | // in the LED driver's PWM registers, shutdown is enabled last. | 122 | // in the LED driver's PWM registers, shutdown is enabled last. |
| 131 | // Set up the mode and other settings, clear the PWM registers, | 123 | // Set up the mode and other settings, clear the PWM registers, |
| 132 | // then disable software shutdown. | 124 | // then disable software shutdown. |
| 133 | 125 | ||
| 134 | // Unlock the command register. | 126 | // Unlock the command register. |
| 135 | IS31FL3736_write_register( addr, ISSI_COMMANDREGISTER_WRITELOCK, 0xC5 ); | 127 | IS31FL3736_write_register(addr, ISSI_COMMANDREGISTER_WRITELOCK, 0xC5); |
| 136 | 128 | ||
| 137 | // Select PG0 | 129 | // Select PG0 |
| 138 | IS31FL3736_write_register( addr, ISSI_COMMANDREGISTER, ISSI_PAGE_LEDCONTROL ); | 130 | IS31FL3736_write_register(addr, ISSI_COMMANDREGISTER, ISSI_PAGE_LEDCONTROL); |
| 139 | // Turn off all LEDs. | 131 | // Turn off all LEDs. |
| 140 | for ( int i = 0x00; i <= 0x17; i++ ) | 132 | for (int i = 0x00; i <= 0x17; i++) { |
| 141 | { | 133 | IS31FL3736_write_register(addr, i, 0x00); |
| 142 | IS31FL3736_write_register( addr, i, 0x00 ); | ||
| 143 | } | 134 | } |
| 144 | 135 | ||
| 145 | // Unlock the command register. | 136 | // Unlock the command register. |
| 146 | IS31FL3736_write_register( addr, ISSI_COMMANDREGISTER_WRITELOCK, 0xC5 ); | 137 | IS31FL3736_write_register(addr, ISSI_COMMANDREGISTER_WRITELOCK, 0xC5); |
| 147 | 138 | ||
| 148 | // Select PG1 | 139 | // Select PG1 |
| 149 | IS31FL3736_write_register( addr, ISSI_COMMANDREGISTER, ISSI_PAGE_PWM ); | 140 | IS31FL3736_write_register(addr, ISSI_COMMANDREGISTER, ISSI_PAGE_PWM); |
| 150 | // Set PWM on all LEDs to 0 | 141 | // Set PWM on all LEDs to 0 |
| 151 | // No need to setup Breath registers to PWM as that is the default. | 142 | // No need to setup Breath registers to PWM as that is the default. |
| 152 | for ( int i = 0x00; i <= 0xBF; i++ ) | 143 | for (int i = 0x00; i <= 0xBF; i++) { |
| 153 | { | 144 | IS31FL3736_write_register(addr, i, 0x00); |
| 154 | IS31FL3736_write_register( addr, i, 0x00 ); | ||
| 155 | } | 145 | } |
| 156 | 146 | ||
| 157 | // Unlock the command register. | 147 | // Unlock the command register. |
| 158 | IS31FL3736_write_register( addr, ISSI_COMMANDREGISTER_WRITELOCK, 0xC5 ); | 148 | IS31FL3736_write_register(addr, ISSI_COMMANDREGISTER_WRITELOCK, 0xC5); |
| 159 | 149 | ||
| 160 | // Select PG3 | 150 | // Select PG3 |
| 161 | IS31FL3736_write_register( addr, ISSI_COMMANDREGISTER, ISSI_PAGE_FUNCTION ); | 151 | IS31FL3736_write_register(addr, ISSI_COMMANDREGISTER, ISSI_PAGE_FUNCTION); |
| 162 | // Set global current to maximum. | 152 | // Set global current to maximum. |
| 163 | IS31FL3736_write_register( addr, ISSI_REG_GLOBALCURRENT, 0xFF ); | 153 | IS31FL3736_write_register(addr, ISSI_REG_GLOBALCURRENT, 0xFF); |
| 164 | // Disable software shutdown. | 154 | // Disable software shutdown. |
| 165 | IS31FL3736_write_register( addr, ISSI_REG_CONFIGURATION, 0x01 ); | 155 | IS31FL3736_write_register(addr, ISSI_REG_CONFIGURATION, 0x01); |
| 166 | 156 | ||
| 167 | // Wait 10ms to ensure the device has woken up. | 157 | // Wait 10ms to ensure the device has woken up. |
| 168 | #ifdef __AVR__ | 158 | #ifdef __AVR__ |
| 169 | _delay_ms( 10 ); | 159 | _delay_ms(10); |
| 170 | #else | 160 | #else |
| 171 | wait_ms(10); | 161 | wait_ms(10); |
| 172 | #endif | 162 | #endif |
| 173 | } | 163 | } |
| 174 | 164 | ||
| 175 | void IS31FL3736_set_color( int index, uint8_t red, uint8_t green, uint8_t blue ) | 165 | void IS31FL3736_set_color(int index, uint8_t red, uint8_t green, uint8_t blue) { |
| 176 | { | 166 | if (index >= 0 && index < DRIVER_LED_TOTAL) { |
| 177 | if ( index >= 0 && index < DRIVER_LED_TOTAL ) { | ||
| 178 | is31_led led = g_is31_leds[index]; | 167 | is31_led led = g_is31_leds[index]; |
| 179 | 168 | ||
| 180 | g_pwm_buffer[led.driver][led.r] = red; | 169 | g_pwm_buffer[led.driver][led.r] = red; |
| 181 | g_pwm_buffer[led.driver][led.g] = green; | 170 | g_pwm_buffer[led.driver][led.g] = green; |
| 182 | g_pwm_buffer[led.driver][led.b] = blue; | 171 | g_pwm_buffer[led.driver][led.b] = blue; |
| 183 | g_pwm_buffer_update_required = true; | 172 | g_pwm_buffer_update_required = true; |
| 184 | } | 173 | } |
| 185 | } | 174 | } |
| 186 | 175 | ||
| 187 | void IS31FL3736_set_color_all( uint8_t red, uint8_t green, uint8_t blue ) | 176 | void IS31FL3736_set_color_all(uint8_t red, uint8_t green, uint8_t blue) { |
| 188 | { | 177 | for (int i = 0; i < DRIVER_LED_TOTAL; i++) { |
| 189 | for ( int i = 0; i < DRIVER_LED_TOTAL; i++ ) | 178 | IS31FL3736_set_color(i, red, green, blue); |
| 190 | { | ||
| 191 | IS31FL3736_set_color( i, red, green, blue ); | ||
| 192 | } | 179 | } |
| 193 | } | 180 | } |
| 194 | 181 | ||
| 195 | void IS31FL3736_set_led_control_register( uint8_t index, bool red, bool green, bool blue ) | 182 | void IS31FL3736_set_led_control_register(uint8_t index, bool red, bool green, bool blue) { |
| 196 | { | ||
| 197 | is31_led led = g_is31_leds[index]; | 183 | is31_led led = g_is31_leds[index]; |
| 198 | 184 | ||
| 199 | // IS31FL3733 | 185 | // IS31FL3733 |
| @@ -209,64 +195,59 @@ void IS31FL3736_set_led_control_register( uint8_t index, bool red, bool green, b | |||
| 209 | // A1-A4=0x00 A5-A8=0x01 | 195 | // A1-A4=0x00 A5-A8=0x01 |
| 210 | // So, the same math applies. | 196 | // So, the same math applies. |
| 211 | 197 | ||
| 212 | uint8_t control_register_r = led.r / 8; | 198 | uint8_t control_register_r = led.r / 8; |
| 213 | uint8_t control_register_g = led.g / 8; | 199 | uint8_t control_register_g = led.g / 8; |
| 214 | uint8_t control_register_b = led.b / 8; | 200 | uint8_t control_register_b = led.b / 8; |
| 215 | 201 | ||
| 216 | uint8_t bit_r = led.r % 8; | 202 | uint8_t bit_r = led.r % 8; |
| 217 | uint8_t bit_g = led.g % 8; | 203 | uint8_t bit_g = led.g % 8; |
| 218 | uint8_t bit_b = led.b % 8; | 204 | uint8_t bit_b = led.b % 8; |
| 219 | 205 | ||
| 220 | if ( red ) { | 206 | if (red) { |
| 221 | g_led_control_registers[led.driver][control_register_r] |= (1 << bit_r); | 207 | g_led_control_registers[led.driver][control_register_r] |= (1 << bit_r); |
| 222 | } else { | 208 | } else { |
| 223 | g_led_control_registers[led.driver][control_register_r] &= ~(1 << bit_r); | 209 | g_led_control_registers[led.driver][control_register_r] &= ~(1 << bit_r); |
| 224 | } | 210 | } |
| 225 | if ( green ) { | 211 | if (green) { |
| 226 | g_led_control_registers[led.driver][control_register_g] |= (1 << bit_g); | 212 | g_led_control_registers[led.driver][control_register_g] |= (1 << bit_g); |
| 227 | } else { | 213 | } else { |
| 228 | g_led_control_registers[led.driver][control_register_g] &= ~(1 << bit_g); | 214 | g_led_control_registers[led.driver][control_register_g] &= ~(1 << bit_g); |
| 229 | } | 215 | } |
| 230 | if ( blue ) { | 216 | if (blue) { |
| 231 | g_led_control_registers[led.driver][control_register_b] |= (1 << bit_b); | 217 | g_led_control_registers[led.driver][control_register_b] |= (1 << bit_b); |
| 232 | } else { | 218 | } else { |
| 233 | g_led_control_registers[led.driver][control_register_b] &= ~(1 << bit_b); | 219 | g_led_control_registers[led.driver][control_register_b] &= ~(1 << bit_b); |
| 234 | } | 220 | } |
| 235 | 221 | ||
| 236 | g_led_control_registers_update_required = true; | 222 | g_led_control_registers_update_required = true; |
| 237 | |||
| 238 | } | 223 | } |
| 239 | 224 | ||
| 240 | void IS31FL3736_mono_set_brightness( int index, uint8_t value ) | 225 | void IS31FL3736_mono_set_brightness(int index, uint8_t value) { |
| 241 | { | 226 | if (index >= 0 && index < 96) { |
| 242 | if ( index >= 0 && index < 96 ) { | 227 | // Index in range 0..95 -> A1..A8, B1..B8, etc. |
| 243 | // Index in range 0..95 -> A1..A8, B1..B8, etc. | 228 | // Map index 0..95 to registers 0x00..0xBE (interleaved) |
| 244 | // Map index 0..95 to registers 0x00..0xBE (interleaved) | 229 | uint8_t pwm_register = index * 2; |
| 245 | uint8_t pwm_register = index * 2; | ||
| 246 | g_pwm_buffer[0][pwm_register] = value; | 230 | g_pwm_buffer[0][pwm_register] = value; |
| 247 | g_pwm_buffer_update_required = true; | 231 | g_pwm_buffer_update_required = true; |
| 248 | } | 232 | } |
| 249 | } | 233 | } |
| 250 | 234 | ||
| 251 | void IS31FL3736_mono_set_brightness_all( uint8_t value ) | 235 | void IS31FL3736_mono_set_brightness_all(uint8_t value) { |
| 252 | { | 236 | for (int i = 0; i < 96; i++) { |
| 253 | for ( int i = 0; i < 96; i++ ) | 237 | IS31FL3736_mono_set_brightness(i, value); |
| 254 | { | ||
| 255 | IS31FL3736_mono_set_brightness( i, value ); | ||
| 256 | } | 238 | } |
| 257 | } | 239 | } |
| 258 | 240 | ||
| 259 | void IS31FL3736_mono_set_led_control_register( uint8_t index, bool enabled ) | 241 | void IS31FL3736_mono_set_led_control_register(uint8_t index, bool enabled) { |
| 260 | { | 242 | // Index in range 0..95 -> A1..A8, B1..B8, etc. |
| 261 | // Index in range 0..95 -> A1..A8, B1..B8, etc. | ||
| 262 | 243 | ||
| 263 | // Map index 0..95 to registers 0x00..0xBE (interleaved) | 244 | // Map index 0..95 to registers 0x00..0xBE (interleaved) |
| 264 | uint8_t pwm_register = index * 2; | 245 | uint8_t pwm_register = index * 2; |
| 265 | // Map register 0x00..0xBE (interleaved) into control register and bit | 246 | // Map register 0x00..0xBE (interleaved) into control register and bit |
| 266 | uint8_t control_register = pwm_register / 8; | 247 | uint8_t control_register = pwm_register / 8; |
| 267 | uint8_t bit = pwm_register % 8; | 248 | uint8_t bit = pwm_register % 8; |
| 268 | 249 | ||
| 269 | if ( enabled ) { | 250 | if (enabled) { |
| 270 | g_led_control_registers[0][control_register] |= (1 << bit); | 251 | g_led_control_registers[0][control_register] |= (1 << bit); |
| 271 | } else { | 252 | } else { |
| 272 | g_led_control_registers[0][control_register] &= ~(1 << bit); | 253 | g_led_control_registers[0][control_register] &= ~(1 << bit); |
| @@ -275,32 +256,26 @@ void IS31FL3736_mono_set_led_control_register( uint8_t index, bool enabled ) | |||
| 275 | g_led_control_registers_update_required = true; | 256 | g_led_control_registers_update_required = true; |
| 276 | } | 257 | } |
| 277 | 258 | ||
| 278 | void IS31FL3736_update_pwm_buffers( uint8_t addr1, uint8_t addr2 ) | 259 | void IS31FL3736_update_pwm_buffers(uint8_t addr1, uint8_t addr2) { |
| 279 | { | 260 | if (g_pwm_buffer_update_required) { |
| 280 | if ( g_pwm_buffer_update_required ) | ||
| 281 | { | ||
| 282 | // Firstly we need to unlock the command register and select PG1 | 261 | // Firstly we need to unlock the command register and select PG1 |
| 283 | IS31FL3736_write_register( addr1, ISSI_COMMANDREGISTER_WRITELOCK, 0xC5 ); | 262 | IS31FL3736_write_register(addr1, ISSI_COMMANDREGISTER_WRITELOCK, 0xC5); |
| 284 | IS31FL3736_write_register( addr1, ISSI_COMMANDREGISTER, ISSI_PAGE_PWM ); | 263 | IS31FL3736_write_register(addr1, ISSI_COMMANDREGISTER, ISSI_PAGE_PWM); |
| 285 | 264 | ||
| 286 | IS31FL3736_write_pwm_buffer( addr1, g_pwm_buffer[0] ); | 265 | IS31FL3736_write_pwm_buffer(addr1, g_pwm_buffer[0]); |
| 287 | //IS31FL3736_write_pwm_buffer( addr2, g_pwm_buffer[1] ); | 266 | // IS31FL3736_write_pwm_buffer( addr2, g_pwm_buffer[1] ); |
| 288 | } | 267 | } |
| 289 | g_pwm_buffer_update_required = false; | 268 | g_pwm_buffer_update_required = false; |
| 290 | } | 269 | } |
| 291 | 270 | ||
| 292 | void IS31FL3736_update_led_control_registers( uint8_t addr1, uint8_t addr2 ) | 271 | void IS31FL3736_update_led_control_registers(uint8_t addr1, uint8_t addr2) { |
| 293 | { | 272 | if (g_led_control_registers_update_required) { |
| 294 | if ( g_led_control_registers_update_required ) | ||
| 295 | { | ||
| 296 | // Firstly we need to unlock the command register and select PG0 | 273 | // Firstly we need to unlock the command register and select PG0 |
| 297 | IS31FL3736_write_register( addr1, ISSI_COMMANDREGISTER_WRITELOCK, 0xC5 ); | 274 | IS31FL3736_write_register(addr1, ISSI_COMMANDREGISTER_WRITELOCK, 0xC5); |
| 298 | IS31FL3736_write_register( addr1, ISSI_COMMANDREGISTER, ISSI_PAGE_LEDCONTROL ); | 275 | IS31FL3736_write_register(addr1, ISSI_COMMANDREGISTER, ISSI_PAGE_LEDCONTROL); |
| 299 | for ( int i=0; i<24; i++ ) | 276 | for (int i = 0; i < 24; i++) { |
| 300 | { | 277 | IS31FL3736_write_register(addr1, i, g_led_control_registers[0][i]); |
| 301 | IS31FL3736_write_register(addr1, i, g_led_control_registers[0][i] ); | 278 | // IS31FL3736_write_register(addr2, i, g_led_control_registers[1][i] ); |
| 302 | //IS31FL3736_write_register(addr2, i, g_led_control_registers[1][i] ); | ||
| 303 | } | 279 | } |
| 304 | } | 280 | } |
| 305 | } | 281 | } |
| 306 | |||
diff --git a/drivers/issi/is31fl3736.h b/drivers/issi/is31fl3736.h index cff50fd0d..e48e31c27 100644 --- a/drivers/issi/is31fl3736.h +++ b/drivers/issi/is31fl3736.h | |||
| @@ -19,154 +19,150 @@ | |||
| 19 | #include <stdint.h> | 19 | #include <stdint.h> |
| 20 | #include <stdbool.h> | 20 | #include <stdbool.h> |
| 21 | 21 | ||
| 22 | |||
| 23 | // Simple interface option. | 22 | // Simple interface option. |
| 24 | // If these aren't defined, just define them to make it compile | 23 | // If these aren't defined, just define them to make it compile |
| 25 | 24 | ||
| 26 | |||
| 27 | #ifndef DRIVER_COUNT | 25 | #ifndef DRIVER_COUNT |
| 28 | #define DRIVER_COUNT 2 | 26 | # define DRIVER_COUNT 2 |
| 29 | #endif | 27 | #endif |
| 30 | 28 | ||
| 31 | #ifndef DRIVER_LED_TOTAL | 29 | #ifndef DRIVER_LED_TOTAL |
| 32 | #define DRIVER_LED_TOTAL 96 | 30 | # define DRIVER_LED_TOTAL 96 |
| 33 | #endif | 31 | #endif |
| 34 | 32 | ||
| 35 | |||
| 36 | typedef struct is31_led { | 33 | typedef struct is31_led { |
| 37 | uint8_t driver:2; | 34 | uint8_t driver : 2; |
| 38 | uint8_t r; | 35 | uint8_t r; |
| 39 | uint8_t g; | 36 | uint8_t g; |
| 40 | uint8_t b; | 37 | uint8_t b; |
| 41 | } __attribute__((packed)) is31_led; | 38 | } __attribute__((packed)) is31_led; |
| 42 | 39 | ||
| 43 | extern const is31_led g_is31_leds[DRIVER_LED_TOTAL]; | 40 | extern const is31_led g_is31_leds[DRIVER_LED_TOTAL]; |
| 44 | 41 | ||
| 45 | void IS31FL3736_init( uint8_t addr ); | 42 | void IS31FL3736_init(uint8_t addr); |
| 46 | void IS31FL3736_write_register( uint8_t addr, uint8_t reg, uint8_t data ); | 43 | void IS31FL3736_write_register(uint8_t addr, uint8_t reg, uint8_t data); |
| 47 | void IS31FL3736_write_pwm_buffer( uint8_t addr, uint8_t *pwm_buffer ); | 44 | void IS31FL3736_write_pwm_buffer(uint8_t addr, uint8_t *pwm_buffer); |
| 48 | 45 | ||
| 49 | void IS31FL3736_set_color( int index, uint8_t red, uint8_t green, uint8_t blue ); | 46 | void IS31FL3736_set_color(int index, uint8_t red, uint8_t green, uint8_t blue); |
| 50 | void IS31FL3736_set_color_all( uint8_t red, uint8_t green, uint8_t blue ); | 47 | void IS31FL3736_set_color_all(uint8_t red, uint8_t green, uint8_t blue); |
| 51 | 48 | ||
| 52 | void IS31FL3736_set_led_control_register( uint8_t index, bool red, bool green, bool blue ); | 49 | void IS31FL3736_set_led_control_register(uint8_t index, bool red, bool green, bool blue); |
| 53 | 50 | ||
| 54 | void IS31FL3736_mono_set_brightness( int index, uint8_t value ); | 51 | void IS31FL3736_mono_set_brightness(int index, uint8_t value); |
| 55 | void IS31FL3736_mono_set_brightness_all( uint8_t value ); | 52 | void IS31FL3736_mono_set_brightness_all(uint8_t value); |
| 56 | void IS31FL3736_mono_set_led_control_register( uint8_t index, bool enabled ); | 53 | void IS31FL3736_mono_set_led_control_register(uint8_t index, bool enabled); |
| 57 | 54 | ||
| 58 | // This should not be called from an interrupt | 55 | // This should not be called from an interrupt |
| 59 | // (eg. from a timer interrupt). | 56 | // (eg. from a timer interrupt). |
| 60 | // Call this while idle (in between matrix scans). | 57 | // Call this while idle (in between matrix scans). |
| 61 | // If the buffer is dirty, it will update the driver with the buffer. | 58 | // If the buffer is dirty, it will update the driver with the buffer. |
| 62 | void IS31FL3736_update_pwm_buffers( uint8_t addr1, uint8_t addr2 ); | 59 | void IS31FL3736_update_pwm_buffers(uint8_t addr1, uint8_t addr2); |
| 63 | void IS31FL3736_update_led_control_registers( uint8_t addr1, uint8_t addr2 ); | 60 | void IS31FL3736_update_led_control_registers(uint8_t addr1, uint8_t addr2); |
| 64 | 61 | ||
| 65 | #define A_1 0x00 | 62 | #define A_1 0x00 |
| 66 | #define A_2 0x02 | 63 | #define A_2 0x02 |
| 67 | #define A_3 0x04 | 64 | #define A_3 0x04 |
| 68 | #define A_4 0x06 | 65 | #define A_4 0x06 |
| 69 | #define A_5 0x08 | 66 | #define A_5 0x08 |
| 70 | #define A_6 0x0A | 67 | #define A_6 0x0A |
| 71 | #define A_7 0x0C | 68 | #define A_7 0x0C |
| 72 | #define A_8 0x0E | 69 | #define A_8 0x0E |
| 73 | 70 | ||
| 74 | #define B_1 0x10 | 71 | #define B_1 0x10 |
| 75 | #define B_2 0x12 | 72 | #define B_2 0x12 |
| 76 | #define B_3 0x14 | 73 | #define B_3 0x14 |
| 77 | #define B_4 0x16 | 74 | #define B_4 0x16 |
| 78 | #define B_5 0x18 | 75 | #define B_5 0x18 |
| 79 | #define B_6 0x1A | 76 | #define B_6 0x1A |
| 80 | #define B_7 0x1C | 77 | #define B_7 0x1C |
| 81 | #define B_8 0x1E | 78 | #define B_8 0x1E |
| 82 | 79 | ||
| 83 | #define C_1 0x20 | 80 | #define C_1 0x20 |
| 84 | #define C_2 0x22 | 81 | #define C_2 0x22 |
| 85 | #define C_3 0x24 | 82 | #define C_3 0x24 |
| 86 | #define C_4 0x26 | 83 | #define C_4 0x26 |
| 87 | #define C_5 0x28 | 84 | #define C_5 0x28 |
| 88 | #define C_6 0x2A | 85 | #define C_6 0x2A |
| 89 | #define C_7 0x2C | 86 | #define C_7 0x2C |
| 90 | #define C_8 0x2E | 87 | #define C_8 0x2E |
| 91 | 88 | ||
| 92 | #define D_1 0x30 | 89 | #define D_1 0x30 |
| 93 | #define D_2 0x32 | 90 | #define D_2 0x32 |
| 94 | #define D_3 0x34 | 91 | #define D_3 0x34 |
| 95 | #define D_4 0x36 | 92 | #define D_4 0x36 |
| 96 | #define D_5 0x38 | 93 | #define D_5 0x38 |
| 97 | #define D_6 0x3A | 94 | #define D_6 0x3A |
| 98 | #define D_7 0x3C | 95 | #define D_7 0x3C |
| 99 | #define D_8 0x3E | 96 | #define D_8 0x3E |
| 100 | 97 | ||
| 101 | #define E_1 0x40 | 98 | #define E_1 0x40 |
| 102 | #define E_2 0x42 | 99 | #define E_2 0x42 |
| 103 | #define E_3 0x44 | 100 | #define E_3 0x44 |
| 104 | #define E_4 0x46 | 101 | #define E_4 0x46 |
| 105 | #define E_5 0x48 | 102 | #define E_5 0x48 |
| 106 | #define E_6 0x4A | 103 | #define E_6 0x4A |
| 107 | #define E_7 0x4C | 104 | #define E_7 0x4C |
| 108 | #define E_8 0x4E | 105 | #define E_8 0x4E |
| 109 | 106 | ||
| 110 | #define F_1 0x50 | 107 | #define F_1 0x50 |
| 111 | #define F_2 0x52 | 108 | #define F_2 0x52 |
| 112 | #define F_3 0x54 | 109 | #define F_3 0x54 |
| 113 | #define F_4 0x56 | 110 | #define F_4 0x56 |
| 114 | #define F_5 0x58 | 111 | #define F_5 0x58 |
| 115 | #define F_6 0x5A | 112 | #define F_6 0x5A |
| 116 | #define F_7 0x5C | 113 | #define F_7 0x5C |
| 117 | #define F_8 0x5E | 114 | #define F_8 0x5E |
| 118 | 115 | ||
| 119 | #define G_1 0x60 | 116 | #define G_1 0x60 |
| 120 | #define G_2 0x62 | 117 | #define G_2 0x62 |
| 121 | #define G_3 0x64 | 118 | #define G_3 0x64 |
| 122 | #define G_4 0x66 | 119 | #define G_4 0x66 |
| 123 | #define G_5 0x68 | 120 | #define G_5 0x68 |
| 124 | #define G_6 0x6A | 121 | #define G_6 0x6A |
| 125 | #define G_7 0x6C | 122 | #define G_7 0x6C |
| 126 | #define G_8 0x6E | 123 | #define G_8 0x6E |
| 127 | 124 | ||
| 128 | #define H_1 0x70 | 125 | #define H_1 0x70 |
| 129 | #define H_2 0x72 | 126 | #define H_2 0x72 |
| 130 | #define H_3 0x74 | 127 | #define H_3 0x74 |
| 131 | #define H_4 0x76 | 128 | #define H_4 0x76 |
| 132 | #define H_5 0x78 | 129 | #define H_5 0x78 |
| 133 | #define H_6 0x7A | 130 | #define H_6 0x7A |
| 134 | #define H_7 0x7C | 131 | #define H_7 0x7C |
| 135 | #define H_8 0x7E | 132 | #define H_8 0x7E |
| 136 | 133 | ||
| 137 | #define I_1 0x80 | 134 | #define I_1 0x80 |
| 138 | #define I_2 0x82 | 135 | #define I_2 0x82 |
| 139 | #define I_3 0x84 | 136 | #define I_3 0x84 |
| 140 | #define I_4 0x86 | 137 | #define I_4 0x86 |
| 141 | #define I_5 0x88 | 138 | #define I_5 0x88 |
| 142 | #define I_6 0x8A | 139 | #define I_6 0x8A |
| 143 | #define I_7 0x8C | 140 | #define I_7 0x8C |
| 144 | #define I_8 0x8E | 141 | #define I_8 0x8E |
| 145 | 142 | ||
| 146 | #define J_1 0x90 | 143 | #define J_1 0x90 |
| 147 | #define J_2 0x92 | 144 | #define J_2 0x92 |
| 148 | #define J_3 0x94 | 145 | #define J_3 0x94 |
| 149 | #define J_4 0x96 | 146 | #define J_4 0x96 |
| 150 | #define J_5 0x98 | 147 | #define J_5 0x98 |
| 151 | #define J_6 0x9A | 148 | #define J_6 0x9A |
| 152 | #define J_7 0x9C | 149 | #define J_7 0x9C |
| 153 | #define J_8 0x9E | 150 | #define J_8 0x9E |
| 154 | 151 | ||
| 155 | #define K_1 0xA0 | 152 | #define K_1 0xA0 |
| 156 | #define K_2 0xA2 | 153 | #define K_2 0xA2 |
| 157 | #define K_3 0xA4 | 154 | #define K_3 0xA4 |
| 158 | #define K_4 0xA6 | 155 | #define K_4 0xA6 |
| 159 | #define K_5 0xA8 | 156 | #define K_5 0xA8 |
| 160 | #define K_6 0xAA | 157 | #define K_6 0xAA |
| 161 | #define K_7 0xAC | 158 | #define K_7 0xAC |
| 162 | #define K_8 0xAE | 159 | #define K_8 0xAE |
| 163 | 160 | ||
| 164 | #define L_1 0xB0 | 161 | #define L_1 0xB0 |
| 165 | #define L_2 0xB2 | 162 | #define L_2 0xB2 |
| 166 | #define L_3 0xB4 | 163 | #define L_3 0xB4 |
| 167 | #define L_4 0xB6 | 164 | #define L_4 0xB6 |
| 168 | #define L_5 0xB8 | 165 | #define L_5 0xB8 |
| 169 | #define L_6 0xBA | 166 | #define L_6 0xBA |
| 170 | #define L_7 0xBC | 167 | #define L_7 0xBC |
| 171 | #define L_8 0xBE | 168 | #define L_8 0xBE |
| 172 | |||
diff --git a/drivers/issi/is31fl3737.c b/drivers/issi/is31fl3737.c index 649104927..4cc46272e 100644 --- a/drivers/issi/is31fl3737.c +++ b/drivers/issi/is31fl3737.c | |||
| @@ -17,11 +17,11 @@ | |||
| 17 | */ | 17 | */ |
| 18 | 18 | ||
| 19 | #ifdef __AVR__ | 19 | #ifdef __AVR__ |
| 20 | #include <avr/interrupt.h> | 20 | # include <avr/interrupt.h> |
| 21 | #include <avr/io.h> | 21 | # include <avr/io.h> |
| 22 | #include <util/delay.h> | 22 | # include <util/delay.h> |
| 23 | #else | 23 | #else |
| 24 | #include "wait.h" | 24 | # include "wait.h" |
| 25 | #endif | 25 | #endif |
| 26 | 26 | ||
| 27 | #include <string.h> | 27 | #include <string.h> |
| @@ -46,23 +46,23 @@ | |||
| 46 | #define ISSI_INTERRUPTMASKREGISTER 0xF0 | 46 | #define ISSI_INTERRUPTMASKREGISTER 0xF0 |
| 47 | #define ISSI_INTERRUPTSTATUSREGISTER 0xF1 | 47 | #define ISSI_INTERRUPTSTATUSREGISTER 0xF1 |
| 48 | 48 | ||
| 49 | #define ISSI_PAGE_LEDCONTROL 0x00 //PG0 | 49 | #define ISSI_PAGE_LEDCONTROL 0x00 // PG0 |
| 50 | #define ISSI_PAGE_PWM 0x01 //PG1 | 50 | #define ISSI_PAGE_PWM 0x01 // PG1 |
| 51 | #define ISSI_PAGE_AUTOBREATH 0x02 //PG2 | 51 | #define ISSI_PAGE_AUTOBREATH 0x02 // PG2 |
| 52 | #define ISSI_PAGE_FUNCTION 0x03 //PG3 | 52 | #define ISSI_PAGE_FUNCTION 0x03 // PG3 |
| 53 | 53 | ||
| 54 | #define ISSI_REG_CONFIGURATION 0x00 //PG3 | 54 | #define ISSI_REG_CONFIGURATION 0x00 // PG3 |
| 55 | #define ISSI_REG_GLOBALCURRENT 0x01 //PG3 | 55 | #define ISSI_REG_GLOBALCURRENT 0x01 // PG3 |
| 56 | #define ISSI_REG_RESET 0x11// PG3 | 56 | #define ISSI_REG_RESET 0x11 // PG3 |
| 57 | #define ISSI_REG_SWPULLUP 0x0F //PG3 | 57 | #define ISSI_REG_SWPULLUP 0x0F // PG3 |
| 58 | #define ISSI_REG_CSPULLUP 0x10 //PG3 | 58 | #define ISSI_REG_CSPULLUP 0x10 // PG3 |
| 59 | 59 | ||
| 60 | #ifndef ISSI_TIMEOUT | 60 | #ifndef ISSI_TIMEOUT |
| 61 | #define ISSI_TIMEOUT 100 | 61 | # define ISSI_TIMEOUT 100 |
| 62 | #endif | 62 | #endif |
| 63 | 63 | ||
| 64 | #ifndef ISSI_PERSISTENCE | 64 | #ifndef ISSI_PERSISTENCE |
| 65 | #define ISSI_PERSISTENCE 0 | 65 | # define ISSI_PERSISTENCE 0 |
| 66 | #endif | 66 | #endif |
| 67 | 67 | ||
| 68 | // Transfer buffer for TWITransmitData() | 68 | // Transfer buffer for TWITransmitData() |
| @@ -75,178 +75,161 @@ uint8_t g_twi_transfer_buffer[20]; | |||
| 75 | // buffers and the transfers in IS31FL3737_write_pwm_buffer() but it's | 75 | // buffers and the transfers in IS31FL3737_write_pwm_buffer() but it's |
| 76 | // probably not worth the extra complexity. | 76 | // probably not worth the extra complexity. |
| 77 | uint8_t g_pwm_buffer[DRIVER_COUNT][192]; | 77 | uint8_t g_pwm_buffer[DRIVER_COUNT][192]; |
| 78 | bool g_pwm_buffer_update_required = false; | 78 | bool g_pwm_buffer_update_required = false; |
| 79 | 79 | ||
| 80 | uint8_t g_led_control_registers[DRIVER_COUNT][24] = { { 0 } }; | 80 | uint8_t g_led_control_registers[DRIVER_COUNT][24] = {{0}}; |
| 81 | bool g_led_control_registers_update_required = false; | 81 | bool g_led_control_registers_update_required = false; |
| 82 | 82 | ||
| 83 | void IS31FL3737_write_register( uint8_t addr, uint8_t reg, uint8_t data ) | 83 | void IS31FL3737_write_register(uint8_t addr, uint8_t reg, uint8_t data) { |
| 84 | { | ||
| 85 | g_twi_transfer_buffer[0] = reg; | 84 | g_twi_transfer_buffer[0] = reg; |
| 86 | g_twi_transfer_buffer[1] = data; | 85 | g_twi_transfer_buffer[1] = data; |
| 87 | 86 | ||
| 88 | #if ISSI_PERSISTENCE > 0 | 87 | #if ISSI_PERSISTENCE > 0 |
| 89 | for (uint8_t i = 0; i < ISSI_PERSISTENCE; i++) { | 88 | for (uint8_t i = 0; i < ISSI_PERSISTENCE; i++) { |
| 90 | if (i2c_transmit(addr << 1, g_twi_transfer_buffer, 2, ISSI_TIMEOUT) == 0) | 89 | if (i2c_transmit(addr << 1, g_twi_transfer_buffer, 2, ISSI_TIMEOUT) == 0) break; |
| 91 | break; | ||
| 92 | } | 90 | } |
| 93 | #else | 91 | #else |
| 94 | i2c_transmit(addr << 1, g_twi_transfer_buffer, 2, ISSI_TIMEOUT); | 92 | i2c_transmit(addr << 1, g_twi_transfer_buffer, 2, ISSI_TIMEOUT); |
| 95 | #endif | 93 | #endif |
| 96 | } | 94 | } |
| 97 | 95 | ||
| 98 | void IS31FL3737_write_pwm_buffer( uint8_t addr, uint8_t *pwm_buffer ) | 96 | void IS31FL3737_write_pwm_buffer(uint8_t addr, uint8_t *pwm_buffer) { |
| 99 | { | ||
| 100 | // assumes PG1 is already selected | 97 | // assumes PG1 is already selected |
| 101 | 98 | ||
| 102 | // transmit PWM registers in 12 transfers of 16 bytes | 99 | // transmit PWM registers in 12 transfers of 16 bytes |
| 103 | // g_twi_transfer_buffer[] is 20 bytes | 100 | // g_twi_transfer_buffer[] is 20 bytes |
| 104 | 101 | ||
| 105 | // iterate over the pwm_buffer contents at 16 byte intervals | 102 | // iterate over the pwm_buffer contents at 16 byte intervals |
| 106 | for ( int i = 0; i < 192; i += 16 ) { | 103 | for (int i = 0; i < 192; i += 16) { |
| 107 | g_twi_transfer_buffer[0] = i; | 104 | g_twi_transfer_buffer[0] = i; |
| 108 | // copy the data from i to i+15 | 105 | // copy the data from i to i+15 |
| 109 | // device will auto-increment register for data after the first byte | 106 | // device will auto-increment register for data after the first byte |
| 110 | // thus this sets registers 0x00-0x0F, 0x10-0x1F, etc. in one transfer | 107 | // thus this sets registers 0x00-0x0F, 0x10-0x1F, etc. in one transfer |
| 111 | for ( int j = 0; j < 16; j++ ) { | 108 | for (int j = 0; j < 16; j++) { |
| 112 | g_twi_transfer_buffer[1 + j] = pwm_buffer[i + j]; | 109 | g_twi_transfer_buffer[1 + j] = pwm_buffer[i + j]; |
| 113 | } | 110 | } |
| 114 | 111 | ||
| 115 | #if ISSI_PERSISTENCE > 0 | 112 | #if ISSI_PERSISTENCE > 0 |
| 116 | for (uint8_t i = 0; i < ISSI_PERSISTENCE; i++) { | 113 | for (uint8_t i = 0; i < ISSI_PERSISTENCE; i++) { |
| 117 | if (i2c_transmit(addr << 1, g_twi_transfer_buffer, 17, ISSI_TIMEOUT) == 0) | 114 | if (i2c_transmit(addr << 1, g_twi_transfer_buffer, 17, ISSI_TIMEOUT) == 0) break; |
| 118 | break; | 115 | } |
| 119 | } | 116 | #else |
| 120 | #else | 117 | i2c_transmit(addr << 1, g_twi_transfer_buffer, 17, ISSI_TIMEOUT); |
| 121 | i2c_transmit(addr << 1, g_twi_transfer_buffer, 17, ISSI_TIMEOUT); | 118 | #endif |
| 122 | #endif | ||
| 123 | } | 119 | } |
| 124 | } | 120 | } |
| 125 | 121 | ||
| 126 | void IS31FL3737_init( uint8_t addr ) | 122 | void IS31FL3737_init(uint8_t addr) { |
| 127 | { | ||
| 128 | // In order to avoid the LEDs being driven with garbage data | 123 | // In order to avoid the LEDs being driven with garbage data |
| 129 | // in the LED driver's PWM registers, shutdown is enabled last. | 124 | // in the LED driver's PWM registers, shutdown is enabled last. |
| 130 | // Set up the mode and other settings, clear the PWM registers, | 125 | // Set up the mode and other settings, clear the PWM registers, |
| 131 | // then disable software shutdown. | 126 | // then disable software shutdown. |
| 132 | 127 | ||
| 133 | // Unlock the command register. | 128 | // Unlock the command register. |
| 134 | IS31FL3737_write_register( addr, ISSI_COMMANDREGISTER_WRITELOCK, 0xC5 ); | 129 | IS31FL3737_write_register(addr, ISSI_COMMANDREGISTER_WRITELOCK, 0xC5); |
| 135 | 130 | ||
| 136 | // Select PG0 | 131 | // Select PG0 |
| 137 | IS31FL3737_write_register( addr, ISSI_COMMANDREGISTER, ISSI_PAGE_LEDCONTROL ); | 132 | IS31FL3737_write_register(addr, ISSI_COMMANDREGISTER, ISSI_PAGE_LEDCONTROL); |
| 138 | // Turn off all LEDs. | 133 | // Turn off all LEDs. |
| 139 | for ( int i = 0x00; i <= 0x17; i++ ) | 134 | for (int i = 0x00; i <= 0x17; i++) { |
| 140 | { | 135 | IS31FL3737_write_register(addr, i, 0x00); |
| 141 | IS31FL3737_write_register( addr, i, 0x00 ); | ||
| 142 | } | 136 | } |
| 143 | 137 | ||
| 144 | // Unlock the command register. | 138 | // Unlock the command register. |
| 145 | IS31FL3737_write_register( addr, ISSI_COMMANDREGISTER_WRITELOCK, 0xC5 ); | 139 | IS31FL3737_write_register(addr, ISSI_COMMANDREGISTER_WRITELOCK, 0xC5); |
| 146 | 140 | ||
| 147 | // Select PG1 | 141 | // Select PG1 |
| 148 | IS31FL3737_write_register( addr, ISSI_COMMANDREGISTER, ISSI_PAGE_PWM ); | 142 | IS31FL3737_write_register(addr, ISSI_COMMANDREGISTER, ISSI_PAGE_PWM); |
| 149 | // Set PWM on all LEDs to 0 | 143 | // Set PWM on all LEDs to 0 |
| 150 | // No need to setup Breath registers to PWM as that is the default. | 144 | // No need to setup Breath registers to PWM as that is the default. |
| 151 | for ( int i = 0x00; i <= 0xBF; i++ ) | 145 | for (int i = 0x00; i <= 0xBF; i++) { |
| 152 | { | 146 | IS31FL3737_write_register(addr, i, 0x00); |
| 153 | IS31FL3737_write_register( addr, i, 0x00 ); | ||
| 154 | } | 147 | } |
| 155 | 148 | ||
| 156 | // Unlock the command register. | 149 | // Unlock the command register. |
| 157 | IS31FL3737_write_register( addr, ISSI_COMMANDREGISTER_WRITELOCK, 0xC5 ); | 150 | IS31FL3737_write_register(addr, ISSI_COMMANDREGISTER_WRITELOCK, 0xC5); |
| 158 | 151 | ||
| 159 | // Select PG3 | 152 | // Select PG3 |
| 160 | IS31FL3737_write_register( addr, ISSI_COMMANDREGISTER, ISSI_PAGE_FUNCTION ); | 153 | IS31FL3737_write_register(addr, ISSI_COMMANDREGISTER, ISSI_PAGE_FUNCTION); |
| 161 | // Set global current to maximum. | 154 | // Set global current to maximum. |
| 162 | IS31FL3737_write_register( addr, ISSI_REG_GLOBALCURRENT, 0xFF ); | 155 | IS31FL3737_write_register(addr, ISSI_REG_GLOBALCURRENT, 0xFF); |
| 163 | // Disable software shutdown. | 156 | // Disable software shutdown. |
| 164 | IS31FL3737_write_register( addr, ISSI_REG_CONFIGURATION, 0x01 ); | 157 | IS31FL3737_write_register(addr, ISSI_REG_CONFIGURATION, 0x01); |
| 165 | 158 | ||
| 166 | // Wait 10ms to ensure the device has woken up. | 159 | // Wait 10ms to ensure the device has woken up. |
| 167 | #ifdef __AVR__ | 160 | #ifdef __AVR__ |
| 168 | _delay_ms( 10 ); | 161 | _delay_ms(10); |
| 169 | #else | 162 | #else |
| 170 | wait_ms(10); | 163 | wait_ms(10); |
| 171 | #endif | 164 | #endif |
| 172 | } | 165 | } |
| 173 | 166 | ||
| 174 | void IS31FL3737_set_color( int index, uint8_t red, uint8_t green, uint8_t blue ) | 167 | void IS31FL3737_set_color(int index, uint8_t red, uint8_t green, uint8_t blue) { |
| 175 | { | 168 | if (index >= 0 && index < DRIVER_LED_TOTAL) { |
| 176 | if ( index >= 0 && index < DRIVER_LED_TOTAL ) { | ||
| 177 | is31_led led = g_is31_leds[index]; | 169 | is31_led led = g_is31_leds[index]; |
| 178 | 170 | ||
| 179 | g_pwm_buffer[led.driver][led.r] = red; | 171 | g_pwm_buffer[led.driver][led.r] = red; |
| 180 | g_pwm_buffer[led.driver][led.g] = green; | 172 | g_pwm_buffer[led.driver][led.g] = green; |
| 181 | g_pwm_buffer[led.driver][led.b] = blue; | 173 | g_pwm_buffer[led.driver][led.b] = blue; |
| 182 | g_pwm_buffer_update_required = true; | 174 | g_pwm_buffer_update_required = true; |
| 183 | } | 175 | } |
| 184 | } | 176 | } |
| 185 | 177 | ||
| 186 | void IS31FL3737_set_color_all( uint8_t red, uint8_t green, uint8_t blue ) | 178 | void IS31FL3737_set_color_all(uint8_t red, uint8_t green, uint8_t blue) { |
| 187 | { | 179 | for (int i = 0; i < DRIVER_LED_TOTAL; i++) { |
| 188 | for ( int i = 0; i < DRIVER_LED_TOTAL; i++ ) | 180 | IS31FL3737_set_color(i, red, green, blue); |
| 189 | { | ||
| 190 | IS31FL3737_set_color( i, red, green, blue ); | ||
| 191 | } | 181 | } |
| 192 | } | 182 | } |
| 193 | 183 | ||
| 194 | void IS31FL3737_set_led_control_register( uint8_t index, bool red, bool green, bool blue ) | 184 | void IS31FL3737_set_led_control_register(uint8_t index, bool red, bool green, bool blue) { |
| 195 | { | ||
| 196 | is31_led led = g_is31_leds[index]; | 185 | is31_led led = g_is31_leds[index]; |
| 197 | 186 | ||
| 198 | uint8_t control_register_r = led.r / 8; | 187 | uint8_t control_register_r = led.r / 8; |
| 199 | uint8_t control_register_g = led.g / 8; | 188 | uint8_t control_register_g = led.g / 8; |
| 200 | uint8_t control_register_b = led.b / 8; | 189 | uint8_t control_register_b = led.b / 8; |
| 201 | uint8_t bit_r = led.r % 8; | 190 | uint8_t bit_r = led.r % 8; |
| 202 | uint8_t bit_g = led.g % 8; | 191 | uint8_t bit_g = led.g % 8; |
| 203 | uint8_t bit_b = led.b % 8; | 192 | uint8_t bit_b = led.b % 8; |
| 204 | 193 | ||
| 205 | if ( red ) { | 194 | if (red) { |
| 206 | g_led_control_registers[led.driver][control_register_r] |= (1 << bit_r); | 195 | g_led_control_registers[led.driver][control_register_r] |= (1 << bit_r); |
| 207 | } else { | 196 | } else { |
| 208 | g_led_control_registers[led.driver][control_register_r] &= ~(1 << bit_r); | 197 | g_led_control_registers[led.driver][control_register_r] &= ~(1 << bit_r); |
| 209 | } | 198 | } |
| 210 | if ( green ) { | 199 | if (green) { |
| 211 | g_led_control_registers[led.driver][control_register_g] |= (1 << bit_g); | 200 | g_led_control_registers[led.driver][control_register_g] |= (1 << bit_g); |
| 212 | } else { | 201 | } else { |
| 213 | g_led_control_registers[led.driver][control_register_g] &= ~(1 << bit_g); | 202 | g_led_control_registers[led.driver][control_register_g] &= ~(1 << bit_g); |
| 214 | } | 203 | } |
| 215 | if ( blue ) { | 204 | if (blue) { |
| 216 | g_led_control_registers[led.driver][control_register_b] |= (1 << bit_b); | 205 | g_led_control_registers[led.driver][control_register_b] |= (1 << bit_b); |
| 217 | } else { | 206 | } else { |
| 218 | g_led_control_registers[led.driver][control_register_b] &= ~(1 << bit_b); | 207 | g_led_control_registers[led.driver][control_register_b] &= ~(1 << bit_b); |
| 219 | } | 208 | } |
| 220 | 209 | ||
| 221 | g_led_control_registers_update_required = true; | 210 | g_led_control_registers_update_required = true; |
| 222 | |||
| 223 | } | 211 | } |
| 224 | 212 | ||
| 225 | void IS31FL3737_update_pwm_buffers( uint8_t addr1, uint8_t addr2 ) | 213 | void IS31FL3737_update_pwm_buffers(uint8_t addr1, uint8_t addr2) { |
| 226 | { | 214 | if (g_pwm_buffer_update_required) { |
| 227 | if ( g_pwm_buffer_update_required ) | ||
| 228 | { | ||
| 229 | // Firstly we need to unlock the command register and select PG1 | 215 | // Firstly we need to unlock the command register and select PG1 |
| 230 | IS31FL3737_write_register( addr1, ISSI_COMMANDREGISTER_WRITELOCK, 0xC5 ); | 216 | IS31FL3737_write_register(addr1, ISSI_COMMANDREGISTER_WRITELOCK, 0xC5); |
| 231 | IS31FL3737_write_register( addr1, ISSI_COMMANDREGISTER, ISSI_PAGE_PWM ); | 217 | IS31FL3737_write_register(addr1, ISSI_COMMANDREGISTER, ISSI_PAGE_PWM); |
| 232 | 218 | ||
| 233 | IS31FL3737_write_pwm_buffer( addr1, g_pwm_buffer[0] ); | 219 | IS31FL3737_write_pwm_buffer(addr1, g_pwm_buffer[0]); |
| 234 | //IS31FL3737_write_pwm_buffer( addr2, g_pwm_buffer[1] ); | 220 | // IS31FL3737_write_pwm_buffer( addr2, g_pwm_buffer[1] ); |
| 235 | } | 221 | } |
| 236 | g_pwm_buffer_update_required = false; | 222 | g_pwm_buffer_update_required = false; |
| 237 | } | 223 | } |
| 238 | 224 | ||
| 239 | void IS31FL3737_update_led_control_registers( uint8_t addr1, uint8_t addr2 ) | 225 | void IS31FL3737_update_led_control_registers(uint8_t addr1, uint8_t addr2) { |
| 240 | { | 226 | if (g_led_control_registers_update_required) { |
| 241 | if ( g_led_control_registers_update_required ) | ||
| 242 | { | ||
| 243 | // Firstly we need to unlock the command register and select PG0 | 227 | // Firstly we need to unlock the command register and select PG0 |
| 244 | IS31FL3737_write_register( addr1, ISSI_COMMANDREGISTER_WRITELOCK, 0xC5 ); | 228 | IS31FL3737_write_register(addr1, ISSI_COMMANDREGISTER_WRITELOCK, 0xC5); |
| 245 | IS31FL3737_write_register( addr1, ISSI_COMMANDREGISTER, ISSI_PAGE_LEDCONTROL ); | 229 | IS31FL3737_write_register(addr1, ISSI_COMMANDREGISTER, ISSI_PAGE_LEDCONTROL); |
| 246 | for ( int i=0; i<24; i++ ) | 230 | for (int i = 0; i < 24; i++) { |
| 247 | { | 231 | IS31FL3737_write_register(addr1, i, g_led_control_registers[0][i]); |
| 248 | IS31FL3737_write_register(addr1, i, g_led_control_registers[0][i] ); | 232 | // IS31FL3737_write_register(addr2, i, g_led_control_registers[1][i] ); |
| 249 | //IS31FL3737_write_register(addr2, i, g_led_control_registers[1][i] ); | ||
| 250 | } | 233 | } |
| 251 | } | 234 | } |
| 252 | } | 235 | } |
diff --git a/drivers/issi/is31fl3737.h b/drivers/issi/is31fl3737.h index 69c4b9b53..2c2fb1964 100644 --- a/drivers/issi/is31fl3737.h +++ b/drivers/issi/is31fl3737.h | |||
| @@ -16,7 +16,6 @@ | |||
| 16 | * along with this program. If not, see <http://www.gnu.org/licenses/>. | 16 | * along with this program. If not, see <http://www.gnu.org/licenses/>. |
| 17 | */ | 17 | */ |
| 18 | 18 | ||
| 19 | |||
| 20 | #ifndef IS31FL3737_DRIVER_H | 19 | #ifndef IS31FL3737_DRIVER_H |
| 21 | #define IS31FL3737_DRIVER_H | 20 | #define IS31FL3737_DRIVER_H |
| 22 | 21 | ||
| @@ -24,184 +23,184 @@ | |||
| 24 | #include <stdbool.h> | 23 | #include <stdbool.h> |
| 25 | 24 | ||
| 26 | typedef struct is31_led { | 25 | typedef struct is31_led { |
| 27 | uint8_t driver:2; | 26 | uint8_t driver : 2; |
| 28 | uint8_t r; | 27 | uint8_t r; |
| 29 | uint8_t g; | 28 | uint8_t g; |
| 30 | uint8_t b; | 29 | uint8_t b; |
| 31 | } __attribute__((packed)) is31_led; | 30 | } __attribute__((packed)) is31_led; |
| 32 | 31 | ||
| 33 | extern const is31_led g_is31_leds[DRIVER_LED_TOTAL]; | 32 | extern const is31_led g_is31_leds[DRIVER_LED_TOTAL]; |
| 34 | 33 | ||
| 35 | void IS31FL3737_init( uint8_t addr ); | 34 | void IS31FL3737_init(uint8_t addr); |
| 36 | void IS31FL3737_write_register( uint8_t addr, uint8_t reg, uint8_t data ); | 35 | void IS31FL3737_write_register(uint8_t addr, uint8_t reg, uint8_t data); |
| 37 | void IS31FL3737_write_pwm_buffer( uint8_t addr, uint8_t *pwm_buffer ); | 36 | void IS31FL3737_write_pwm_buffer(uint8_t addr, uint8_t *pwm_buffer); |
| 38 | 37 | ||
| 39 | void IS31FL3737_set_color( int index, uint8_t red, uint8_t green, uint8_t blue ); | 38 | void IS31FL3737_set_color(int index, uint8_t red, uint8_t green, uint8_t blue); |
| 40 | void IS31FL3737_set_color_all( uint8_t red, uint8_t green, uint8_t blue ); | 39 | void IS31FL3737_set_color_all(uint8_t red, uint8_t green, uint8_t blue); |
| 41 | 40 | ||
| 42 | void IS31FL3737_set_led_control_register( uint8_t index, bool red, bool green, bool blue ); | 41 | void IS31FL3737_set_led_control_register(uint8_t index, bool red, bool green, bool blue); |
| 43 | 42 | ||
| 44 | // This should not be called from an interrupt | 43 | // This should not be called from an interrupt |
| 45 | // (eg. from a timer interrupt). | 44 | // (eg. from a timer interrupt). |
| 46 | // Call this while idle (in between matrix scans). | 45 | // Call this while idle (in between matrix scans). |
| 47 | // If the buffer is dirty, it will update the driver with the buffer. | 46 | // If the buffer is dirty, it will update the driver with the buffer. |
| 48 | void IS31FL3737_update_pwm_buffers( uint8_t addr1, uint8_t addr2 ); | 47 | void IS31FL3737_update_pwm_buffers(uint8_t addr1, uint8_t addr2); |
| 49 | void IS31FL3737_update_led_control_registers( uint8_t addr1, uint8_t addr2 ); | 48 | void IS31FL3737_update_led_control_registers(uint8_t addr1, uint8_t addr2); |
| 50 | 49 | ||
| 51 | #define A_1 0x00 | 50 | #define A_1 0x00 |
| 52 | #define A_2 0x01 | 51 | #define A_2 0x01 |
| 53 | #define A_3 0x02 | 52 | #define A_3 0x02 |
| 54 | #define A_4 0x03 | 53 | #define A_4 0x03 |
| 55 | #define A_5 0x04 | 54 | #define A_5 0x04 |
| 56 | #define A_6 0x05 | 55 | #define A_6 0x05 |
| 57 | #define A_7 0x08 | 56 | #define A_7 0x08 |
| 58 | #define A_8 0x09 | 57 | #define A_8 0x09 |
| 59 | #define A_9 0x0A | 58 | #define A_9 0x0A |
| 60 | #define A_10 0x0B | 59 | #define A_10 0x0B |
| 61 | #define A_11 0x0C | 60 | #define A_11 0x0C |
| 62 | #define A_12 0x0D | 61 | #define A_12 0x0D |
| 63 | 62 | ||
| 64 | #define B_1 0x10 | 63 | #define B_1 0x10 |
| 65 | #define B_2 0x11 | 64 | #define B_2 0x11 |
| 66 | #define B_3 0x12 | 65 | #define B_3 0x12 |
| 67 | #define B_4 0x13 | 66 | #define B_4 0x13 |
| 68 | #define B_5 0x14 | 67 | #define B_5 0x14 |
| 69 | #define B_6 0x15 | 68 | #define B_6 0x15 |
| 70 | #define B_7 0x18 | 69 | #define B_7 0x18 |
| 71 | #define B_8 0x19 | 70 | #define B_8 0x19 |
| 72 | #define B_9 0x1A | 71 | #define B_9 0x1A |
| 73 | #define B_10 0x1B | 72 | #define B_10 0x1B |
| 74 | #define B_11 0x1C | 73 | #define B_11 0x1C |
| 75 | #define B_12 0x1D | 74 | #define B_12 0x1D |
| 76 | 75 | ||
| 77 | #define C_1 0x20 | 76 | #define C_1 0x20 |
| 78 | #define C_2 0x21 | 77 | #define C_2 0x21 |
| 79 | #define C_3 0x22 | 78 | #define C_3 0x22 |
| 80 | #define C_4 0x23 | 79 | #define C_4 0x23 |
| 81 | #define C_5 0x24 | 80 | #define C_5 0x24 |
| 82 | #define C_6 0x25 | 81 | #define C_6 0x25 |
| 83 | #define C_7 0x28 | 82 | #define C_7 0x28 |
| 84 | #define C_8 0x29 | 83 | #define C_8 0x29 |
| 85 | #define C_9 0x2A | 84 | #define C_9 0x2A |
| 86 | #define C_10 0x2B | 85 | #define C_10 0x2B |
| 87 | #define C_11 0x2C | 86 | #define C_11 0x2C |
| 88 | #define C_12 0x2D | 87 | #define C_12 0x2D |
| 89 | 88 | ||
| 90 | #define D_1 0x30 | 89 | #define D_1 0x30 |
| 91 | #define D_2 0x31 | 90 | #define D_2 0x31 |
| 92 | #define D_3 0x32 | 91 | #define D_3 0x32 |
| 93 | #define D_4 0x33 | 92 | #define D_4 0x33 |
| 94 | #define D_5 0x34 | 93 | #define D_5 0x34 |
| 95 | #define D_6 0x35 | 94 | #define D_6 0x35 |
| 96 | #define D_7 0x38 | 95 | #define D_7 0x38 |
| 97 | #define D_8 0x39 | 96 | #define D_8 0x39 |
| 98 | #define D_9 0x3A | 97 | #define D_9 0x3A |
| 99 | #define D_10 0x3B | 98 | #define D_10 0x3B |
| 100 | #define D_11 0x3C | 99 | #define D_11 0x3C |
| 101 | #define D_12 0x3D | 100 | #define D_12 0x3D |
| 102 | 101 | ||
| 103 | #define E_1 0x40 | 102 | #define E_1 0x40 |
| 104 | #define E_2 0x41 | 103 | #define E_2 0x41 |
| 105 | #define E_3 0x42 | 104 | #define E_3 0x42 |
| 106 | #define E_4 0x43 | 105 | #define E_4 0x43 |
| 107 | #define E_5 0x44 | 106 | #define E_5 0x44 |
| 108 | #define E_6 0x45 | 107 | #define E_6 0x45 |
| 109 | #define E_7 0x48 | 108 | #define E_7 0x48 |
| 110 | #define E_8 0x49 | 109 | #define E_8 0x49 |
| 111 | #define E_9 0x4A | 110 | #define E_9 0x4A |
| 112 | #define E_10 0x4B | 111 | #define E_10 0x4B |
| 113 | #define E_11 0x4C | 112 | #define E_11 0x4C |
| 114 | #define E_12 0x4D | 113 | #define E_12 0x4D |
| 115 | 114 | ||
| 116 | #define F_1 0x50 | 115 | #define F_1 0x50 |
| 117 | #define F_2 0x51 | 116 | #define F_2 0x51 |
| 118 | #define F_3 0x52 | 117 | #define F_3 0x52 |
| 119 | #define F_4 0x53 | 118 | #define F_4 0x53 |
| 120 | #define F_5 0x54 | 119 | #define F_5 0x54 |
| 121 | #define F_6 0x55 | 120 | #define F_6 0x55 |
| 122 | #define F_7 0x58 | 121 | #define F_7 0x58 |
| 123 | #define F_8 0x59 | 122 | #define F_8 0x59 |
| 124 | #define F_9 0x5A | 123 | #define F_9 0x5A |
| 125 | #define F_10 0x5B | 124 | #define F_10 0x5B |
| 126 | #define F_11 0x5C | 125 | #define F_11 0x5C |
| 127 | #define F_12 0x5D | 126 | #define F_12 0x5D |
| 128 | 127 | ||
| 129 | #define G_1 0x60 | 128 | #define G_1 0x60 |
| 130 | #define G_2 0x61 | 129 | #define G_2 0x61 |
| 131 | #define G_3 0x62 | 130 | #define G_3 0x62 |
| 132 | #define G_4 0x63 | 131 | #define G_4 0x63 |
| 133 | #define G_5 0x64 | 132 | #define G_5 0x64 |
| 134 | #define G_6 0x65 | 133 | #define G_6 0x65 |
| 135 | #define G_7 0x68 | 134 | #define G_7 0x68 |
| 136 | #define G_8 0x69 | 135 | #define G_8 0x69 |
| 137 | #define G_9 0x6A | 136 | #define G_9 0x6A |
| 138 | #define G_10 0x6B | 137 | #define G_10 0x6B |
| 139 | #define G_11 0x6C | 138 | #define G_11 0x6C |
| 140 | #define G_12 0x6D | 139 | #define G_12 0x6D |
| 141 | 140 | ||
| 142 | #define H_1 0x70 | 141 | #define H_1 0x70 |
| 143 | #define H_2 0x71 | 142 | #define H_2 0x71 |
| 144 | #define H_3 0x72 | 143 | #define H_3 0x72 |
| 145 | #define H_4 0x73 | 144 | #define H_4 0x73 |
| 146 | #define H_5 0x74 | 145 | #define H_5 0x74 |
| 147 | #define H_6 0x75 | 146 | #define H_6 0x75 |
| 148 | #define H_7 0x78 | 147 | #define H_7 0x78 |
| 149 | #define H_8 0x79 | 148 | #define H_8 0x79 |
| 150 | #define H_9 0x7A | 149 | #define H_9 0x7A |
| 151 | #define H_10 0x7B | 150 | #define H_10 0x7B |
| 152 | #define H_11 0x7C | 151 | #define H_11 0x7C |
| 153 | #define H_12 0x7D | 152 | #define H_12 0x7D |
| 154 | 153 | ||
| 155 | #define I_1 0x80 | 154 | #define I_1 0x80 |
| 156 | #define I_2 0x81 | 155 | #define I_2 0x81 |
| 157 | #define I_3 0x82 | 156 | #define I_3 0x82 |
| 158 | #define I_4 0x83 | 157 | #define I_4 0x83 |
| 159 | #define I_5 0x84 | 158 | #define I_5 0x84 |
| 160 | #define I_6 0x85 | 159 | #define I_6 0x85 |
| 161 | #define I_7 0x88 | 160 | #define I_7 0x88 |
| 162 | #define I_8 0x89 | 161 | #define I_8 0x89 |
| 163 | #define I_9 0x8A | 162 | #define I_9 0x8A |
| 164 | #define I_10 0x8B | 163 | #define I_10 0x8B |
| 165 | #define I_11 0x8C | 164 | #define I_11 0x8C |
| 166 | #define I_12 0x8D | 165 | #define I_12 0x8D |
| 167 | 166 | ||
| 168 | #define J_1 0x90 | 167 | #define J_1 0x90 |
| 169 | #define J_2 0x91 | 168 | #define J_2 0x91 |
| 170 | #define J_3 0x92 | 169 | #define J_3 0x92 |
| 171 | #define J_4 0x93 | 170 | #define J_4 0x93 |
| 172 | #define J_5 0x94 | 171 | #define J_5 0x94 |
| 173 | #define J_6 0x95 | 172 | #define J_6 0x95 |
| 174 | #define J_7 0x98 | 173 | #define J_7 0x98 |
| 175 | #define J_8 0x99 | 174 | #define J_8 0x99 |
| 176 | #define J_9 0x9A | 175 | #define J_9 0x9A |
| 177 | #define J_10 0x9B | 176 | #define J_10 0x9B |
| 178 | #define J_11 0x9C | 177 | #define J_11 0x9C |
| 179 | #define J_12 0x9D | 178 | #define J_12 0x9D |
| 180 | 179 | ||
| 181 | #define K_1 0xA0 | 180 | #define K_1 0xA0 |
| 182 | #define K_2 0xA1 | 181 | #define K_2 0xA1 |
| 183 | #define K_3 0xA2 | 182 | #define K_3 0xA2 |
| 184 | #define K_4 0xA3 | 183 | #define K_4 0xA3 |
| 185 | #define K_5 0xA4 | 184 | #define K_5 0xA4 |
| 186 | #define K_6 0xA5 | 185 | #define K_6 0xA5 |
| 187 | #define K_7 0xA8 | 186 | #define K_7 0xA8 |
| 188 | #define K_8 0xA9 | 187 | #define K_8 0xA9 |
| 189 | #define K_9 0xAA | 188 | #define K_9 0xAA |
| 190 | #define K_10 0xAB | 189 | #define K_10 0xAB |
| 191 | #define K_11 0xAC | 190 | #define K_11 0xAC |
| 192 | #define K_12 0xAD | 191 | #define K_12 0xAD |
| 193 | 192 | ||
| 194 | #define L_1 0xB0 | 193 | #define L_1 0xB0 |
| 195 | #define L_2 0xB1 | 194 | #define L_2 0xB1 |
| 196 | #define L_3 0xB2 | 195 | #define L_3 0xB2 |
| 197 | #define L_4 0xB3 | 196 | #define L_4 0xB3 |
| 198 | #define L_5 0xB4 | 197 | #define L_5 0xB4 |
| 199 | #define L_6 0xB5 | 198 | #define L_6 0xB5 |
| 200 | #define L_7 0xB8 | 199 | #define L_7 0xB8 |
| 201 | #define L_8 0xB9 | 200 | #define L_8 0xB9 |
| 202 | #define L_9 0xBA | 201 | #define L_9 0xBA |
| 203 | #define L_10 0xBB | 202 | #define L_10 0xBB |
| 204 | #define L_11 0xBC | 203 | #define L_11 0xBC |
| 205 | #define L_12 0xBD | 204 | #define L_12 0xBD |
| 206 | 205 | ||
| 207 | #endif // IS31FL3737_DRIVER_H | 206 | #endif // IS31FL3737_DRIVER_H |
