diff options
| author | Jack Humbert <jack.humb@gmail.com> | 2018-05-08 15:24:18 -0400 |
|---|---|---|
| committer | GitHub <noreply@github.com> | 2018-05-08 15:24:18 -0400 |
| commit | 14b7602a65dedaf51db1c9288144765d43a83a15 (patch) | |
| tree | 8e21e6b77db1581deaeecfa3373fe70470e64c1f /drivers | |
| parent | 46dca121fd2f51c4f5b87e48af37f43340591433 (diff) | |
| download | qmk_firmware-14b7602a65dedaf51db1c9288144765d43a83a15.tar.gz qmk_firmware-14b7602a65dedaf51db1c9288144765d43a83a15.zip | |
Adds IS31FL3731 RGB Matrix Implementation (#2910)
* adds is31fl3731 rgb matrix implementation
* fix build script for force pushes
* allow bootloader size to be overwritten
* adds planck light implementation
* split led config into 2 arrays
* idk
* betterize register handling
* update planck implementation
* update planck
* refine rgb interface
* cleanup names, rgb matrix
* start documentation
* finish up docs
* add effects list
* clean-up merge
* add RGB_MATRIX_SKIP_FRAMES
* add support for at90usb1286 to bootloader options
Diffstat (limited to 'drivers')
| -rw-r--r-- | drivers/avr/TWIlib.c | 232 | ||||
| -rw-r--r-- | drivers/avr/TWIlib.h | 82 | ||||
| -rw-r--r-- | drivers/avr/is31fl3731.c | 258 | ||||
| -rw-r--r-- | drivers/avr/is31fl3731.h | 214 |
4 files changed, 786 insertions, 0 deletions
diff --git a/drivers/avr/TWIlib.c b/drivers/avr/TWIlib.c new file mode 100644 index 000000000..b39e3054a --- /dev/null +++ b/drivers/avr/TWIlib.c | |||
| @@ -0,0 +1,232 @@ | |||
| 1 | /* | ||
| 2 | * TWIlib.c | ||
| 3 | * | ||
| 4 | * Created: 6/01/2014 10:41:33 PM | ||
| 5 | * Author: Chris Herring | ||
| 6 | * http://www.chrisherring.net/all/tutorial-interrupt-driven-twi-interface-for-avr-part1/ | ||
| 7 | */ | ||
| 8 | |||
| 9 | #include <avr/io.h> | ||
| 10 | #include <avr/interrupt.h> | ||
| 11 | #include "TWIlib.h" | ||
| 12 | #include "util/delay.h" | ||
| 13 | |||
| 14 | void TWIInit() | ||
| 15 | { | ||
| 16 | TWIInfo.mode = Ready; | ||
| 17 | TWIInfo.errorCode = 0xFF; | ||
| 18 | TWIInfo.repStart = 0; | ||
| 19 | // Set pre-scalers (no pre-scaling) | ||
| 20 | TWSR = 0; | ||
| 21 | // Set bit rate | ||
| 22 | TWBR = ((F_CPU / TWI_FREQ) - 16) / 2; | ||
| 23 | // Enable TWI and interrupt | ||
| 24 | TWCR = (1 << TWIE) | (1 << TWEN); | ||
| 25 | } | ||
| 26 | |||
| 27 | uint8_t isTWIReady() | ||
| 28 | { | ||
| 29 | if ( (TWIInfo.mode == Ready) | (TWIInfo.mode == RepeatedStartSent) ) | ||
| 30 | { | ||
| 31 | return 1; | ||
| 32 | } | ||
| 33 | else | ||
| 34 | { | ||
| 35 | return 0; | ||
| 36 | } | ||
| 37 | } | ||
| 38 | |||
| 39 | uint8_t TWITransmitData(void *const TXdata, uint8_t dataLen, uint8_t repStart) | ||
| 40 | { | ||
| 41 | if (dataLen <= TXMAXBUFLEN) | ||
| 42 | { | ||
| 43 | // Wait until ready | ||
| 44 | while (!isTWIReady()) {_delay_us(1);} | ||
| 45 | // Set repeated start mode | ||
| 46 | TWIInfo.repStart = repStart; | ||
| 47 | // Copy data into the transmit buffer | ||
| 48 | uint8_t *data = (uint8_t *)TXdata; | ||
| 49 | for (int i = 0; i < dataLen; i++) | ||
| 50 | { | ||
| 51 | TWITransmitBuffer[i] = data[i]; | ||
| 52 | } | ||
| 53 | // Copy transmit info to global variables | ||
| 54 | TXBuffLen = dataLen; | ||
| 55 | TXBuffIndex = 0; | ||
| 56 | |||
| 57 | // If a repeated start has been sent, then devices are already listening for an address | ||
| 58 | // and another start does not need to be sent. | ||
| 59 | if (TWIInfo.mode == RepeatedStartSent) | ||
| 60 | { | ||
| 61 | TWIInfo.mode = Initializing; | ||
| 62 | TWDR = TWITransmitBuffer[TXBuffIndex++]; // Load data to transmit buffer | ||
| 63 | TWISendTransmit(); // Send the data | ||
| 64 | } | ||
| 65 | else // Otherwise, just send the normal start signal to begin transmission. | ||
| 66 | { | ||
| 67 | TWIInfo.mode = Initializing; | ||
| 68 | TWISendStart(); | ||
| 69 | } | ||
| 70 | |||
| 71 | } | ||
| 72 | else | ||
| 73 | { | ||
| 74 | return 1; // return an error if data length is longer than buffer | ||
| 75 | } | ||
| 76 | return 0; | ||
| 77 | } | ||
| 78 | |||
| 79 | uint8_t TWIReadData(uint8_t TWIaddr, uint8_t bytesToRead, uint8_t repStart) | ||
| 80 | { | ||
| 81 | // Check if number of bytes to read can fit in the RXbuffer | ||
| 82 | if (bytesToRead < RXMAXBUFLEN) | ||
| 83 | { | ||
| 84 | // Reset buffer index and set RXBuffLen to the number of bytes to read | ||
| 85 | RXBuffIndex = 0; | ||
| 86 | RXBuffLen = bytesToRead; | ||
| 87 | // Create the one value array for the address to be transmitted | ||
| 88 | uint8_t TXdata[1]; | ||
| 89 | // Shift the address and AND a 1 into the read write bit (set to write mode) | ||
| 90 | TXdata[0] = (TWIaddr << 1) | 0x01; | ||
| 91 | // Use the TWITransmitData function to initialize the transfer and address the slave | ||
| 92 | TWITransmitData(TXdata, 1, repStart); | ||
| 93 | } | ||
| 94 | else | ||
| 95 | { | ||
| 96 | return 0; | ||
| 97 | } | ||
| 98 | return 1; | ||
| 99 | } | ||
| 100 | |||
| 101 | ISR (TWI_vect) | ||
| 102 | { | ||
| 103 | switch (TWI_STATUS) | ||
| 104 | { | ||
| 105 | // ----\/ ---- MASTER TRANSMITTER OR WRITING ADDRESS ----\/ ---- // | ||
| 106 | case TWI_MT_SLAW_ACK: // SLA+W transmitted and ACK received | ||
| 107 | // Set mode to Master Transmitter | ||
| 108 | TWIInfo.mode = MasterTransmitter; | ||
| 109 | case TWI_START_SENT: // Start condition has been transmitted | ||
| 110 | case TWI_MT_DATA_ACK: // Data byte has been transmitted, ACK received | ||
| 111 | if (TXBuffIndex < TXBuffLen) // If there is more data to send | ||
| 112 | { | ||
| 113 | TWDR = TWITransmitBuffer[TXBuffIndex++]; // Load data to transmit buffer | ||
| 114 | TWIInfo.errorCode = TWI_NO_RELEVANT_INFO; | ||
| 115 | TWISendTransmit(); // Send the data | ||
| 116 | } | ||
| 117 | // This transmission is complete however do not release bus yet | ||
| 118 | else if (TWIInfo.repStart) | ||
| 119 | { | ||
| 120 | TWIInfo.errorCode = 0xFF; | ||
| 121 | TWISendStart(); | ||
| 122 | } | ||
| 123 | // All transmissions are complete, exit | ||
| 124 | else | ||
| 125 | { | ||
| 126 | TWIInfo.mode = Ready; | ||
| 127 | TWIInfo.errorCode = 0xFF; | ||
| 128 | TWISendStop(); | ||
| 129 | } | ||
| 130 | break; | ||
| 131 | |||
| 132 | // ----\/ ---- MASTER RECEIVER ----\/ ---- // | ||
| 133 | |||
| 134 | case TWI_MR_SLAR_ACK: // SLA+R has been transmitted, ACK has been received | ||
| 135 | // Switch to Master Receiver mode | ||
| 136 | TWIInfo.mode = MasterReceiver; | ||
| 137 | // If there is more than one byte to be read, receive data byte and return an ACK | ||
| 138 | if (RXBuffIndex < RXBuffLen-1) | ||
| 139 | { | ||
| 140 | TWIInfo.errorCode = TWI_NO_RELEVANT_INFO; | ||
| 141 | TWISendACK(); | ||
| 142 | } | ||
| 143 | // Otherwise when a data byte (the only data byte) is received, return NACK | ||
| 144 | else | ||
| 145 | { | ||
| 146 | TWIInfo.errorCode = TWI_NO_RELEVANT_INFO; | ||
| 147 | TWISendNACK(); | ||
| 148 | } | ||
| 149 | break; | ||
| 150 | |||
| 151 | case TWI_MR_DATA_ACK: // Data has been received, ACK has been transmitted. | ||
| 152 | |||
| 153 | /// -- HANDLE DATA BYTE --- /// | ||
| 154 | TWIReceiveBuffer[RXBuffIndex++] = TWDR; | ||
| 155 | // If there is more than one byte to be read, receive data byte and return an ACK | ||
| 156 | if (RXBuffIndex < RXBuffLen-1) | ||
| 157 | { | ||
| 158 | TWIInfo.errorCode = TWI_NO_RELEVANT_INFO; | ||
| 159 | TWISendACK(); | ||
| 160 | } | ||
| 161 | // Otherwise when a data byte (the only data byte) is received, return NACK | ||
| 162 | else | ||
| 163 | { | ||
| 164 | TWIInfo.errorCode = TWI_NO_RELEVANT_INFO; | ||
| 165 | TWISendNACK(); | ||
| 166 | } | ||
| 167 | break; | ||
| 168 | |||
| 169 | case TWI_MR_DATA_NACK: // Data byte has been received, NACK has been transmitted. End of transmission. | ||
| 170 | |||
| 171 | /// -- HANDLE DATA BYTE --- /// | ||
| 172 | TWIReceiveBuffer[RXBuffIndex++] = TWDR; | ||
| 173 | // This transmission is complete however do not release bus yet | ||
| 174 | if (TWIInfo.repStart) | ||
| 175 | { | ||
| 176 | TWIInfo.errorCode = 0xFF; | ||
| 177 | TWISendStart(); | ||
| 178 | } | ||
| 179 | // All transmissions are complete, exit | ||
| 180 | else | ||
| 181 | { | ||
| 182 | TWIInfo.mode = Ready; | ||
| 183 | TWIInfo.errorCode = 0xFF; | ||
| 184 | TWISendStop(); | ||
| 185 | } | ||
| 186 | break; | ||
| 187 | |||
| 188 | // ----\/ ---- MT and MR common ----\/ ---- // | ||
| 189 | |||
| 190 | case TWI_MR_SLAR_NACK: // SLA+R transmitted, NACK received | ||
| 191 | case TWI_MT_SLAW_NACK: // SLA+W transmitted, NACK received | ||
| 192 | case TWI_MT_DATA_NACK: // Data byte has been transmitted, NACK received | ||
| 193 | case TWI_LOST_ARBIT: // Arbitration has been lost | ||
| 194 | // Return error and send stop and set mode to ready | ||
| 195 | if (TWIInfo.repStart) | ||
| 196 | { | ||
| 197 | TWIInfo.errorCode = TWI_STATUS; | ||
| 198 | TWISendStart(); | ||
| 199 | } | ||
| 200 | // All transmissions are complete, exit | ||
| 201 | else | ||
| 202 | { | ||
| 203 | TWIInfo.mode = Ready; | ||
| 204 | TWIInfo.errorCode = TWI_STATUS; | ||
| 205 | TWISendStop(); | ||
| 206 | } | ||
| 207 | break; | ||
| 208 | case TWI_REP_START_SENT: // Repeated start has been transmitted | ||
| 209 | // Set the mode but DO NOT clear TWINT as the next data is not yet ready | ||
| 210 | TWIInfo.mode = RepeatedStartSent; | ||
| 211 | break; | ||
| 212 | |||
| 213 | // ----\/ ---- SLAVE RECEIVER ----\/ ---- // | ||
| 214 | |||
| 215 | // TODO IMPLEMENT SLAVE RECEIVER FUNCTIONALITY | ||
| 216 | |||
| 217 | // ----\/ ---- SLAVE TRANSMITTER ----\/ ---- // | ||
| 218 | |||
| 219 | // TODO IMPLEMENT SLAVE TRANSMITTER FUNCTIONALITY | ||
| 220 | |||
| 221 | // ----\/ ---- MISCELLANEOUS STATES ----\/ ---- // | ||
| 222 | case TWI_NO_RELEVANT_INFO: // It is not really possible to get into this ISR on this condition | ||
| 223 | // Rather, it is there to be manually set between operations | ||
| 224 | break; | ||
| 225 | case TWI_ILLEGAL_START_STOP: // Illegal START/STOP, abort and return error | ||
| 226 | TWIInfo.errorCode = TWI_ILLEGAL_START_STOP; | ||
| 227 | TWIInfo.mode = Ready; | ||
| 228 | TWISendStop(); | ||
| 229 | break; | ||
| 230 | } | ||
| 231 | |||
| 232 | } | ||
diff --git a/drivers/avr/TWIlib.h b/drivers/avr/TWIlib.h new file mode 100644 index 000000000..23fd1f09a --- /dev/null +++ b/drivers/avr/TWIlib.h | |||
| @@ -0,0 +1,82 @@ | |||
| 1 | /* | ||
| 2 | * TWIlib.h | ||
| 3 | * | ||
| 4 | * Created: 6/01/2014 10:38:42 PM | ||
| 5 | * Author: Chris Herring | ||
| 6 | * http://www.chrisherring.net/all/tutorial-interrupt-driven-twi-interface-for-avr-part1/ | ||
| 7 | */ | ||
| 8 | |||
| 9 | |||
| 10 | #ifndef TWILIB_H_ | ||
| 11 | #define TWILIB_H_ | ||
| 12 | // TWI bit rate (was 100000) | ||
| 13 | #define TWI_FREQ 400000 | ||
| 14 | // Get TWI status | ||
| 15 | #define TWI_STATUS (TWSR & 0xF8) | ||
| 16 | // Transmit buffer length | ||
| 17 | #define TXMAXBUFLEN 20 | ||
| 18 | // Receive buffer length | ||
| 19 | #define RXMAXBUFLEN 20 | ||
| 20 | // Global transmit buffer | ||
| 21 | uint8_t TWITransmitBuffer[TXMAXBUFLEN]; | ||
| 22 | // Global receive buffer | ||
| 23 | volatile uint8_t TWIReceiveBuffer[RXMAXBUFLEN]; | ||
| 24 | // Buffer indexes | ||
| 25 | volatile int TXBuffIndex; // Index of the transmit buffer. Is volatile, can change at any time. | ||
| 26 | int RXBuffIndex; // Current index in the receive buffer | ||
| 27 | // Buffer lengths | ||
| 28 | int TXBuffLen; // The total length of the transmit buffer | ||
| 29 | int RXBuffLen; // The total number of bytes to read (should be less than RXMAXBUFFLEN) | ||
| 30 | |||
| 31 | typedef enum { | ||
| 32 | Ready, | ||
| 33 | Initializing, | ||
| 34 | RepeatedStartSent, | ||
| 35 | MasterTransmitter, | ||
| 36 | MasterReceiver, | ||
| 37 | SlaceTransmitter, | ||
| 38 | SlaveReciever | ||
| 39 | } TWIMode; | ||
| 40 | |||
| 41 | typedef struct TWIInfoStruct{ | ||
| 42 | TWIMode mode; | ||
| 43 | uint8_t errorCode; | ||
| 44 | uint8_t repStart; | ||
| 45 | }TWIInfoStruct; | ||
| 46 | TWIInfoStruct TWIInfo; | ||
| 47 | |||
| 48 | |||
| 49 | // TWI Status Codes | ||
| 50 | #define TWI_START_SENT 0x08 // Start sent | ||
| 51 | #define TWI_REP_START_SENT 0x10 // Repeated Start sent | ||
| 52 | // Master Transmitter Mode | ||
| 53 | #define TWI_MT_SLAW_ACK 0x18 // SLA+W sent and ACK received | ||
| 54 | #define TWI_MT_SLAW_NACK 0x20 // SLA+W sent and NACK received | ||
| 55 | #define TWI_MT_DATA_ACK 0x28 // DATA sent and ACK received | ||
| 56 | #define TWI_MT_DATA_NACK 0x30 // DATA sent and NACK received | ||
| 57 | // Master Receiver Mode | ||
| 58 | #define TWI_MR_SLAR_ACK 0x40 // SLA+R sent, ACK received | ||
| 59 | #define TWI_MR_SLAR_NACK 0x48 // SLA+R sent, NACK received | ||
| 60 | #define TWI_MR_DATA_ACK 0x50 // Data received, ACK returned | ||
| 61 | #define TWI_MR_DATA_NACK 0x58 // Data received, NACK returned | ||
| 62 | |||
| 63 | // Miscellaneous States | ||
| 64 | #define TWI_LOST_ARBIT 0x38 // Arbitration has been lost | ||
| 65 | #define TWI_NO_RELEVANT_INFO 0xF8 // No relevant information available | ||
| 66 | #define TWI_ILLEGAL_START_STOP 0x00 // Illegal START or STOP condition has been detected | ||
| 67 | #define TWI_SUCCESS 0xFF // Successful transfer, this state is impossible from TWSR as bit2 is 0 and read only | ||
| 68 | |||
| 69 | |||
| 70 | #define TWISendStart() (TWCR = (1<<TWINT)|(1<<TWSTA)|(1<<TWEN)|(1<<TWIE)) // Send the START signal, enable interrupts and TWI, clear TWINT flag to resume transfer. | ||
| 71 | #define TWISendStop() (TWCR = (1<<TWINT)|(1<<TWSTO)|(1<<TWEN)|(1<<TWIE)) // Send the STOP signal, enable interrupts and TWI, clear TWINT flag. | ||
| 72 | #define TWISendTransmit() (TWCR = (1<<TWINT)|(1<<TWEN)|(1<<TWIE)) // Used to resume a transfer, clear TWINT and ensure that TWI and interrupts are enabled. | ||
| 73 | #define TWISendACK() (TWCR = (1<<TWINT)|(1<<TWEN)|(1<<TWIE)|(1<<TWEA)) // FOR MR mode. Resume a transfer, ensure that TWI and interrupts are enabled and respond with an ACK if the device is addressed as a slave or after it receives a byte. | ||
| 74 | #define TWISendNACK() (TWCR = (1<<TWINT)|(1<<TWEN)|(1<<TWIE)) // FOR MR mode. Resume a transfer, ensure that TWI and interrupts are enabled but DO NOT respond with an ACK if the device is addressed as a slave or after it receives a byte. | ||
| 75 | |||
| 76 | // Function declarations | ||
| 77 | uint8_t TWITransmitData(void *const TXdata, uint8_t dataLen, uint8_t repStart); | ||
| 78 | void TWIInit(void); | ||
| 79 | uint8_t TWIReadData(uint8_t TWIaddr, uint8_t bytesToRead, uint8_t repStart); | ||
| 80 | uint8_t isTWIReady(void); | ||
| 81 | |||
| 82 | #endif // TWICOMMS_H_ \ No newline at end of file | ||
diff --git a/drivers/avr/is31fl3731.c b/drivers/avr/is31fl3731.c new file mode 100644 index 000000000..e5941cf41 --- /dev/null +++ b/drivers/avr/is31fl3731.c | |||
| @@ -0,0 +1,258 @@ | |||
| 1 | /* Copyright 2017 Jason Williams | ||
| 2 | * Copyright 2018 Jack Humbert | ||
| 3 | * | ||
| 4 | * This program is free software: you can redistribute it and/or modify | ||
| 5 | * it under the terms of the GNU General Public License as published by | ||
| 6 | * the Free Software Foundation, either version 2 of the License, or | ||
| 7 | * (at your option) any later version. | ||
| 8 | * | ||
| 9 | * This program is distributed in the hope that it will be useful, | ||
| 10 | * but WITHOUT ANY WARRANTY; without even the implied warranty of | ||
| 11 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | ||
| 12 | * GNU General Public License for more details. | ||
| 13 | * | ||
| 14 | * You should have received a copy of the GNU General Public License | ||
| 15 | * along with this program. If not, see <http://www.gnu.org/licenses/>. | ||
| 16 | */ | ||
| 17 | |||
| 18 | #include "is31fl3731.h" | ||
| 19 | #include <avr/interrupt.h> | ||
| 20 | #include <avr/io.h> | ||
| 21 | #include <util/delay.h> | ||
| 22 | #include <string.h> | ||
| 23 | #include "TWIlib.h" | ||
| 24 | #include "progmem.h" | ||
| 25 | |||
| 26 | // This is a 7-bit address, that gets left-shifted and bit 0 | ||
| 27 | // set to 0 for write, 1 for read (as per I2C protocol) | ||
| 28 | // The address will vary depending on your wiring: | ||
| 29 | // 0b1110100 AD <-> GND | ||
| 30 | // 0b1110111 AD <-> VCC | ||
| 31 | // 0b1110101 AD <-> SCL | ||
| 32 | // 0b1110110 AD <-> SDA | ||
| 33 | #define ISSI_ADDR_DEFAULT 0x74 | ||
| 34 | |||
| 35 | #define ISSI_REG_CONFIG 0x00 | ||
| 36 | #define ISSI_REG_CONFIG_PICTUREMODE 0x00 | ||
| 37 | #define ISSI_REG_CONFIG_AUTOPLAYMODE 0x08 | ||
| 38 | #define ISSI_REG_CONFIG_AUDIOPLAYMODE 0x18 | ||
| 39 | |||
| 40 | #define ISSI_CONF_PICTUREMODE 0x00 | ||
| 41 | #define ISSI_CONF_AUTOFRAMEMODE 0x04 | ||
| 42 | #define ISSI_CONF_AUDIOMODE 0x08 | ||
| 43 | |||
| 44 | #define ISSI_REG_PICTUREFRAME 0x01 | ||
| 45 | |||
| 46 | #define ISSI_REG_SHUTDOWN 0x0A | ||
| 47 | #define ISSI_REG_AUDIOSYNC 0x06 | ||
| 48 | |||
| 49 | #define ISSI_COMMANDREGISTER 0xFD | ||
| 50 | #define ISSI_BANK_FUNCTIONREG 0x0B // helpfully called 'page nine' | ||
| 51 | |||
| 52 | // Transfer buffer for TWITransmitData() | ||
| 53 | uint8_t g_twi_transfer_buffer[TXMAXBUFLEN]; | ||
| 54 | |||
| 55 | // These buffers match the IS31FL3731 PWM registers 0x24-0xB3. | ||
| 56 | // Storing them like this is optimal for I2C transfers to the registers. | ||
| 57 | // We could optimize this and take out the unused registers from these | ||
| 58 | // buffers and the transfers in IS31FL3731_write_pwm_buffer() but it's | ||
| 59 | // probably not worth the extra complexity. | ||
| 60 | uint8_t g_pwm_buffer[DRIVER_COUNT][144]; | ||
| 61 | bool g_pwm_buffer_update_required = false; | ||
| 62 | |||
| 63 | uint8_t g_led_control_registers[DRIVER_COUNT][18] = { { 0 }, { 0 } }; | ||
| 64 | bool g_led_control_registers_update_required = false; | ||
| 65 | |||
| 66 | // This is the bit pattern in the LED control registers | ||
| 67 | // (for matrix A, add one to register for matrix B) | ||
| 68 | // | ||
| 69 | // reg - b7 b6 b5 b4 b3 b2 b1 b0 | ||
| 70 | // 0x00 - R08,R07,R06,R05,R04,R03,R02,R01 | ||
| 71 | // 0x02 - G08,G07,G06,G05,G04,G03,G02,R00 | ||
| 72 | // 0x04 - B08,B07,B06,B05,B04,B03,G01,G00 | ||
| 73 | // 0x06 - - , - , - , - , - ,B02,B01,B00 | ||
| 74 | // 0x08 - - , - , - , - , - , - , - , - | ||
| 75 | // 0x0A - B17,B16,B15, - , - , - , - , - | ||
| 76 | // 0x0C - G17,G16,B14,B13,B12,B11,B10,B09 | ||
| 77 | // 0x0E - R17,G15,G14,G13,G12,G11,G10,G09 | ||
| 78 | // 0x10 - R16,R15,R14,R13,R12,R11,R10,R09 | ||
| 79 | |||
| 80 | |||
| 81 | void IS31FL3731_write_register( uint8_t addr, uint8_t reg, uint8_t data ) | ||
| 82 | { | ||
| 83 | g_twi_transfer_buffer[0] = (addr << 1) | 0x00; | ||
| 84 | g_twi_transfer_buffer[1] = reg; | ||
| 85 | g_twi_transfer_buffer[2] = data; | ||
| 86 | |||
| 87 | // Set the error code to have no relevant information | ||
| 88 | TWIInfo.errorCode = TWI_NO_RELEVANT_INFO; | ||
| 89 | // Continuously attempt to transmit data until a successful transmission occurs | ||
| 90 | //while ( TWIInfo.errorCode != 0xFF ) | ||
| 91 | //{ | ||
| 92 | TWITransmitData( g_twi_transfer_buffer, 3, 0 ); | ||
| 93 | //} | ||
| 94 | } | ||
| 95 | |||
| 96 | void IS31FL3731_write_pwm_buffer( uint8_t addr, uint8_t *pwm_buffer ) | ||
| 97 | { | ||
| 98 | // assumes bank is already selected | ||
| 99 | |||
| 100 | // transmit PWM registers in 9 transfers of 16 bytes | ||
| 101 | // g_twi_transfer_buffer[] is 20 bytes | ||
| 102 | |||
| 103 | // set the I2C address | ||
| 104 | g_twi_transfer_buffer[0] = (addr << 1) | 0x00; | ||
| 105 | |||
| 106 | // iterate over the pwm_buffer contents at 16 byte intervals | ||
| 107 | for ( int i = 0; i < 144; i += 16 ) | ||
| 108 | { | ||
| 109 | // set the first register, e.g. 0x24, 0x34, 0x44, etc. | ||
| 110 | g_twi_transfer_buffer[1] = 0x24 + i; | ||
| 111 | // copy the data from i to i+15 | ||
| 112 | // device will auto-increment register for data after the first byte | ||
| 113 | // thus this sets registers 0x24-0x33, 0x34-0x43, etc. in one transfer | ||
| 114 | for ( int j = 0; j < 16; j++ ) | ||
| 115 | { | ||
| 116 | g_twi_transfer_buffer[2 + j] = pwm_buffer[i + j]; | ||
| 117 | } | ||
| 118 | |||
| 119 | // Set the error code to have no relevant information | ||
| 120 | TWIInfo.errorCode = TWI_NO_RELEVANT_INFO; | ||
| 121 | // Continuously attempt to transmit data until a successful transmission occurs | ||
| 122 | while ( TWIInfo.errorCode != 0xFF ) | ||
| 123 | { | ||
| 124 | TWITransmitData( g_twi_transfer_buffer, 16 + 2, 0 ); | ||
| 125 | } | ||
| 126 | } | ||
| 127 | } | ||
| 128 | |||
| 129 | void IS31FL3731_init( uint8_t addr ) | ||
| 130 | { | ||
| 131 | // In order to avoid the LEDs being driven with garbage data | ||
| 132 | // in the LED driver's PWM registers, first enable software shutdown, | ||
| 133 | // then set up the mode and other settings, clear the PWM registers, | ||
| 134 | // then disable software shutdown. | ||
| 135 | |||
| 136 | // select "function register" bank | ||
| 137 | IS31FL3731_write_register( addr, ISSI_COMMANDREGISTER, ISSI_BANK_FUNCTIONREG ); | ||
| 138 | |||
| 139 | // enable software shutdown | ||
| 140 | IS31FL3731_write_register( addr, ISSI_REG_SHUTDOWN, 0x00 ); | ||
| 141 | // this delay was copied from other drivers, might not be needed | ||
| 142 | _delay_ms( 10 ); | ||
| 143 | |||
| 144 | // picture mode | ||
| 145 | IS31FL3731_write_register( addr, ISSI_REG_CONFIG, ISSI_REG_CONFIG_PICTUREMODE ); | ||
| 146 | // display frame 0 | ||
| 147 | IS31FL3731_write_register( addr, ISSI_REG_PICTUREFRAME, 0x00 ); | ||
| 148 | // audio sync off | ||
| 149 | IS31FL3731_write_register( addr, ISSI_REG_AUDIOSYNC, 0x00 ); | ||
| 150 | |||
| 151 | // select bank 0 | ||
| 152 | IS31FL3731_write_register( addr, ISSI_COMMANDREGISTER, 0 ); | ||
| 153 | |||
| 154 | // turn off all LEDs in the LED control register | ||
| 155 | for ( int i = 0x00; i <= 0x11; i++ ) | ||
| 156 | { | ||
| 157 | IS31FL3731_write_register( addr, i, 0x00 ); | ||
| 158 | } | ||
| 159 | |||
| 160 | // turn off all LEDs in the blink control register (not really needed) | ||
| 161 | for ( int i = 0x12; i <= 0x23; i++ ) | ||
| 162 | { | ||
| 163 | IS31FL3731_write_register( addr, i, 0x00 ); | ||
| 164 | } | ||
| 165 | |||
| 166 | // set PWM on all LEDs to 0 | ||
| 167 | for ( int i = 0x24; i <= 0xB3; i++ ) | ||
| 168 | { | ||
| 169 | IS31FL3731_write_register( addr, i, 0x00 ); | ||
| 170 | } | ||
| 171 | |||
| 172 | // select "function register" bank | ||
| 173 | IS31FL3731_write_register( addr, ISSI_COMMANDREGISTER, ISSI_BANK_FUNCTIONREG ); | ||
| 174 | |||
| 175 | // disable software shutdown | ||
| 176 | IS31FL3731_write_register( addr, ISSI_REG_SHUTDOWN, 0x01 ); | ||
| 177 | |||
| 178 | // select bank 0 and leave it selected. | ||
| 179 | // most usage after initialization is just writing PWM buffers in bank 0 | ||
| 180 | // as there's not much point in double-buffering | ||
| 181 | IS31FL3731_write_register( addr, ISSI_COMMANDREGISTER, 0 ); | ||
| 182 | } | ||
| 183 | |||
| 184 | void IS31FL3731_set_color( int index, uint8_t red, uint8_t green, uint8_t blue ) | ||
| 185 | { | ||
| 186 | if ( index >= 0 && index < DRIVER_LED_TOTAL ) { | ||
| 187 | is31_led led = g_is31_leds[index]; | ||
| 188 | |||
| 189 | // Subtract 0x24 to get the second index of g_pwm_buffer | ||
| 190 | g_pwm_buffer[led.driver][led.r - 0x24] = red; | ||
| 191 | g_pwm_buffer[led.driver][led.g - 0x24] = green; | ||
| 192 | g_pwm_buffer[led.driver][led.b - 0x24] = blue; | ||
| 193 | g_pwm_buffer_update_required = true; | ||
| 194 | } | ||
| 195 | } | ||
| 196 | |||
| 197 | void IS31FL3731_set_color_all( uint8_t red, uint8_t green, uint8_t blue ) | ||
| 198 | { | ||
| 199 | for ( int i = 0; i < DRIVER_LED_TOTAL; i++ ) | ||
| 200 | { | ||
| 201 | IS31FL3731_set_color( i, red, green, blue ); | ||
| 202 | } | ||
| 203 | } | ||
| 204 | |||
| 205 | void IS31FL3731_set_led_control_register( uint8_t index, bool red, bool green, bool blue ) | ||
| 206 | { | ||
| 207 | is31_led led = g_is31_leds[index]; | ||
| 208 | |||
| 209 | uint8_t control_register_r = (led.r - 0x24) / 8; | ||
| 210 | uint8_t control_register_g = (led.g - 0x24) / 8; | ||
| 211 | uint8_t control_register_b = (led.b - 0x24) / 8; | ||
| 212 | uint8_t bit_r = (led.r - 0x24) % 8; | ||
| 213 | uint8_t bit_g = (led.g - 0x24) % 8; | ||
| 214 | uint8_t bit_b = (led.b - 0x24) % 8; | ||
| 215 | |||
| 216 | if ( red ) { | ||
| 217 | g_led_control_registers[led.driver][control_register_r] |= (1 << bit_r); | ||
| 218 | } else { | ||
| 219 | g_led_control_registers[led.driver][control_register_r] &= ~(1 << bit_r); | ||
| 220 | } | ||
| 221 | if ( green ) { | ||
| 222 | g_led_control_registers[led.driver][control_register_g] |= (1 << bit_g); | ||
| 223 | } else { | ||
| 224 | g_led_control_registers[led.driver][control_register_g] &= ~(1 << bit_g); | ||
| 225 | } | ||
| 226 | if ( blue ) { | ||
| 227 | g_led_control_registers[led.driver][control_register_b] |= (1 << bit_b); | ||
| 228 | } else { | ||
| 229 | g_led_control_registers[led.driver][control_register_b] &= ~(1 << bit_b); | ||
| 230 | } | ||
| 231 | |||
| 232 | g_led_control_registers_update_required = true; | ||
| 233 | |||
| 234 | |||
| 235 | } | ||
| 236 | |||
| 237 | void IS31FL3731_update_pwm_buffers( uint8_t addr1, uint8_t addr2 ) | ||
| 238 | { | ||
| 239 | if ( g_pwm_buffer_update_required ) | ||
| 240 | { | ||
| 241 | IS31FL3731_write_pwm_buffer( addr1, g_pwm_buffer[0] ); | ||
| 242 | IS31FL3731_write_pwm_buffer( addr2, g_pwm_buffer[1] ); | ||
| 243 | } | ||
| 244 | g_pwm_buffer_update_required = false; | ||
| 245 | } | ||
| 246 | |||
| 247 | void IS31FL3731_update_led_control_registers( uint8_t addr1, uint8_t addr2 ) | ||
| 248 | { | ||
| 249 | if ( g_led_control_registers_update_required ) | ||
| 250 | { | ||
| 251 | for ( int i=0; i<18; i++ ) | ||
| 252 | { | ||
| 253 | IS31FL3731_write_register(addr1, i, g_led_control_registers[0][i] ); | ||
| 254 | IS31FL3731_write_register(addr2, i, g_led_control_registers[1][i] ); | ||
| 255 | } | ||
| 256 | } | ||
| 257 | } | ||
| 258 | |||
diff --git a/drivers/avr/is31fl3731.h b/drivers/avr/is31fl3731.h new file mode 100644 index 000000000..3d30fc67b --- /dev/null +++ b/drivers/avr/is31fl3731.h | |||
| @@ -0,0 +1,214 @@ | |||
| 1 | /* Copyright 2017 Jason Williams | ||
| 2 | * Copyright 2018 Jack Humbert | ||
| 3 | * | ||
| 4 | * This program is free software: you can redistribute it and/or modify | ||
| 5 | * it under the terms of the GNU General Public License as published by | ||
| 6 | * the Free Software Foundation, either version 2 of the License, or | ||
| 7 | * (at your option) any later version. | ||
| 8 | * | ||
| 9 | * This program is distributed in the hope that it will be useful, | ||
| 10 | * but WITHOUT ANY WARRANTY; without even the implied warranty of | ||
| 11 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | ||
| 12 | * GNU General Public License for more details. | ||
| 13 | * | ||
| 14 | * You should have received a copy of the GNU General Public License | ||
| 15 | * along with this program. If not, see <http://www.gnu.org/licenses/>. | ||
| 16 | */ | ||
| 17 | |||
| 18 | |||
| 19 | #ifndef IS31FL3731_DRIVER_H | ||
| 20 | #define IS31FL3731_DRIVER_H | ||
| 21 | |||
| 22 | #include <stdint.h> | ||
| 23 | #include <stdbool.h> | ||
| 24 | |||
| 25 | typedef struct is31_led { | ||
| 26 | uint8_t driver:2; | ||
| 27 | uint8_t r; | ||
| 28 | uint8_t g; | ||
| 29 | uint8_t b; | ||
| 30 | } __attribute__((packed)) is31_led; | ||
| 31 | |||
| 32 | extern const is31_led g_is31_leds[DRIVER_LED_TOTAL]; | ||
| 33 | |||
| 34 | void IS31FL3731_init( uint8_t addr ); | ||
| 35 | void IS31FL3731_write_register( uint8_t addr, uint8_t reg, uint8_t data ); | ||
| 36 | void IS31FL3731_write_pwm_buffer( uint8_t addr, uint8_t *pwm_buffer ); | ||
| 37 | |||
| 38 | void IS31FL3731_set_color( int index, uint8_t red, uint8_t green, uint8_t blue ); | ||
| 39 | void IS31FL3731_set_color_all( uint8_t red, uint8_t green, uint8_t blue ); | ||
| 40 | |||
| 41 | void IS31FL3731_set_led_control_register( uint8_t index, bool red, bool green, bool blue ); | ||
| 42 | |||
| 43 | // This should not be called from an interrupt | ||
| 44 | // (eg. from a timer interrupt). | ||
| 45 | // Call this while idle (in between matrix scans). | ||
| 46 | // If the buffer is dirty, it will update the driver with the buffer. | ||
| 47 | void IS31FL3731_update_pwm_buffers( uint8_t addr1, uint8_t addr2 ); | ||
| 48 | void IS31FL3731_update_led_control_registers( uint8_t addr1, uint8_t addr2 ); | ||
| 49 | |||
| 50 | #define C1_1 0x24 | ||
| 51 | #define C1_2 0x25 | ||
| 52 | #define C1_3 0x26 | ||
| 53 | #define C1_4 0x27 | ||
| 54 | #define C1_5 0x28 | ||
| 55 | #define C1_6 0x29 | ||
| 56 | #define C1_7 0x2A | ||
| 57 | #define C1_8 0x2B | ||
| 58 | |||
| 59 | #define C1_9 0x2C | ||
| 60 | #define C1_10 0x2D | ||
| 61 | #define C1_11 0x2E | ||
| 62 | #define C1_12 0x2F | ||
| 63 | #define C1_13 0x30 | ||
| 64 | #define C1_14 0x31 | ||
| 65 | #define C1_15 0x32 | ||
| 66 | #define C1_16 0x33 | ||
| 67 | |||
| 68 | #define C2_1 0x34 | ||
| 69 | #define C2_2 0x35 | ||
| 70 | #define C2_3 0x36 | ||
| 71 | #define C2_4 0x37 | ||
| 72 | #define C2_5 0x38 | ||
| 73 | #define C2_6 0x39 | ||
| 74 | #define C2_7 0x3A | ||
| 75 | #define C2_8 0x3B | ||
| 76 | |||
| 77 | #define C2_9 0x3C | ||
| 78 | #define C2_10 0x3D | ||
| 79 | #define C2_11 0x3E | ||
| 80 | #define C2_12 0x3F | ||
| 81 | #define C2_13 0x40 | ||
| 82 | #define C2_14 0x41 | ||
| 83 | #define C2_15 0x42 | ||
| 84 | #define C2_16 0x43 | ||
| 85 | |||
| 86 | #define C3_1 0x44 | ||
| 87 | #define C3_2 0x45 | ||
| 88 | #define C3_3 0x46 | ||
| 89 | #define C3_4 0x47 | ||
| 90 | #define C3_5 0x48 | ||
| 91 | #define C3_6 0x49 | ||
| 92 | #define C3_7 0x4A | ||
| 93 | #define C3_8 0x4B | ||
| 94 | |||
| 95 | #define C3_9 0x4C | ||
| 96 | #define C3_10 0x4D | ||
| 97 | #define C3_11 0x4E | ||
| 98 | #define C3_12 0x4F | ||
| 99 | #define C3_13 0x50 | ||
| 100 | #define C3_14 0x51 | ||
| 101 | #define C3_15 0x52 | ||
| 102 | #define C3_16 0x53 | ||
| 103 | |||
| 104 | #define C4_1 0x54 | ||
| 105 | #define C4_2 0x55 | ||
| 106 | #define C4_3 0x56 | ||
| 107 | #define C4_4 0x57 | ||
| 108 | #define C4_5 0x58 | ||
| 109 | #define C4_6 0x59 | ||
| 110 | #define C4_7 0x5A | ||
| 111 | #define C4_8 0x5B | ||
| 112 | |||
| 113 | #define C4_9 0x5C | ||
| 114 | #define C4_10 0x5D | ||
| 115 | #define C4_11 0x5E | ||
| 116 | #define C4_12 0x5F | ||
| 117 | #define C4_13 0x60 | ||
| 118 | #define C4_14 0x61 | ||
| 119 | #define C4_15 0x62 | ||
| 120 | #define C4_16 0x63 | ||
| 121 | |||
| 122 | #define C5_1 0x64 | ||
| 123 | #define C5_2 0x65 | ||
| 124 | #define C5_3 0x66 | ||
| 125 | #define C5_4 0x67 | ||
| 126 | #define C5_5 0x68 | ||
| 127 | #define C5_6 0x69 | ||
| 128 | #define C5_7 0x6A | ||
| 129 | #define C5_8 0x6B | ||
| 130 | |||
| 131 | #define C5_9 0x6C | ||
| 132 | #define C5_10 0x6D | ||
| 133 | #define C5_11 0x6E | ||
| 134 | #define C5_12 0x6F | ||
| 135 | #define C5_13 0x70 | ||
| 136 | #define C5_14 0x71 | ||
| 137 | #define C5_15 0x72 | ||
| 138 | #define C5_16 0x73 | ||
| 139 | |||
| 140 | #define C6_1 0x74 | ||
| 141 | #define C6_2 0x75 | ||
| 142 | #define C6_3 0x76 | ||
| 143 | #define C6_4 0x77 | ||
| 144 | #define C6_5 0x78 | ||
| 145 | #define C6_6 0x79 | ||
| 146 | #define C6_7 0x7A | ||
| 147 | #define C6_8 0x7B | ||
| 148 | |||
| 149 | #define C6_9 0x7C | ||
| 150 | #define C6_10 0x7D | ||
| 151 | #define C6_11 0x7E | ||
| 152 | #define C6_12 0x7F | ||
| 153 | #define C6_13 0x80 | ||
| 154 | #define C6_14 0x81 | ||
| 155 | #define C6_15 0x82 | ||
| 156 | #define C6_16 0x83 | ||
| 157 | |||
| 158 | #define C7_1 0x84 | ||
| 159 | #define C7_2 0x85 | ||
| 160 | #define C7_3 0x86 | ||
| 161 | #define C7_4 0x87 | ||
| 162 | #define C7_5 0x88 | ||
| 163 | #define C7_6 0x89 | ||
| 164 | #define C7_7 0x8A | ||
| 165 | #define C7_8 0x8B | ||
| 166 | |||
| 167 | #define C7_9 0x8C | ||
| 168 | #define C7_10 0x8D | ||
| 169 | #define C7_11 0x8E | ||
| 170 | #define C7_12 0x8F | ||
| 171 | #define C7_13 0x90 | ||
| 172 | #define C7_14 0x91 | ||
| 173 | #define C7_15 0x92 | ||
| 174 | #define C7_16 0x93 | ||
| 175 | |||
| 176 | #define C8_1 0x94 | ||
| 177 | #define C8_2 0x95 | ||
| 178 | #define C8_3 0x96 | ||
| 179 | #define C8_4 0x97 | ||
| 180 | #define C8_5 0x98 | ||
| 181 | #define C8_6 0x99 | ||
| 182 | #define C8_7 0x9A | ||
| 183 | #define C8_8 0x9B | ||
| 184 | |||
| 185 | #define C8_9 0x9C | ||
| 186 | #define C8_10 0x9D | ||
| 187 | #define C8_11 0x9E | ||
| 188 | #define C8_12 0x9F | ||
| 189 | #define C8_13 0xA0 | ||
| 190 | #define C8_14 0xA1 | ||
| 191 | #define C8_15 0xA2 | ||
| 192 | #define C8_16 0xA3 | ||
| 193 | |||
| 194 | #define C9_1 0xA4 | ||
| 195 | #define C9_2 0xA5 | ||
| 196 | #define C9_3 0xA6 | ||
| 197 | #define C9_4 0xA7 | ||
| 198 | #define C9_5 0xA8 | ||
| 199 | #define C9_6 0xA9 | ||
| 200 | #define C9_7 0xAA | ||
| 201 | #define C9_8 0xAB | ||
| 202 | |||
| 203 | #define C9_9 0xAC | ||
| 204 | #define C9_10 0xAD | ||
| 205 | #define C9_11 0xAE | ||
| 206 | #define C9_12 0xAF | ||
| 207 | #define C9_13 0xB0 | ||
| 208 | #define C9_14 0xB1 | ||
| 209 | #define C9_15 0xB2 | ||
| 210 | #define C9_16 0xB3 | ||
| 211 | |||
| 212 | |||
| 213 | |||
| 214 | #endif // IS31FL3731_DRIVER_H | ||
