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authorChris Cullin <chris@miplace.com>2021-07-16 07:52:05 +1000
committerGitHub <noreply@github.com>2021-07-15 22:52:05 +0100
commit70267b35c357f2744262300db03eafe642159734 (patch)
tree954f0ed828294d30c4beed4c02a00cb7ad507c60 /drivers
parente07401bb5ac4f0e23aac8c943d9f03fa257834a3 (diff)
downloadqmk_firmware-70267b35c357f2744262300db03eafe642159734.tar.gz
qmk_firmware-70267b35c357f2744262300db03eafe642159734.zip
Dual RGB Matrix IS31FL3737 driver support to address #13442 (#13457)
* initial commit * removed changes to write_pwm_buffer * backward compatbility added * fixed issue with backward compatibility * documentation update * removed unneccessary comment. branched from master * updated per comments #13457 * removed blank line * cformat on diff files
Diffstat (limited to 'drivers')
-rw-r--r--drivers/issi/is31fl3737.c43
1 files changed, 21 insertions, 22 deletions
diff --git a/drivers/issi/is31fl3737.c b/drivers/issi/is31fl3737.c
index e40bfa0d7..30906b484 100644
--- a/drivers/issi/is31fl3737.c
+++ b/drivers/issi/is31fl3737.c
@@ -66,11 +66,12 @@ uint8_t g_twi_transfer_buffer[20];
66// We could optimize this and take out the unused registers from these 66// We could optimize this and take out the unused registers from these
67// buffers and the transfers in IS31FL3737_write_pwm_buffer() but it's 67// buffers and the transfers in IS31FL3737_write_pwm_buffer() but it's
68// probably not worth the extra complexity. 68// probably not worth the extra complexity.
69
69uint8_t g_pwm_buffer[DRIVER_COUNT][192]; 70uint8_t g_pwm_buffer[DRIVER_COUNT][192];
70bool g_pwm_buffer_update_required = false; 71bool g_pwm_buffer_update_required[DRIVER_COUNT] = {false};
71 72
72uint8_t g_led_control_registers[DRIVER_COUNT][24] = {{0}}; 73uint8_t g_led_control_registers[DRIVER_COUNT][24] = {0};
73bool g_led_control_registers_update_required = false; 74bool g_led_control_registers_update_required[DRIVER_COUNT] = {false};
74 75
75void IS31FL3737_write_register(uint8_t addr, uint8_t reg, uint8_t data) { 76void IS31FL3737_write_register(uint8_t addr, uint8_t reg, uint8_t data) {
76 g_twi_transfer_buffer[0] = reg; 77 g_twi_transfer_buffer[0] = reg;
@@ -158,10 +159,10 @@ void IS31FL3737_set_color(int index, uint8_t red, uint8_t green, uint8_t blue) {
158 is31_led led; 159 is31_led led;
159 memcpy_P(&led, (&g_is31_leds[index]), sizeof(led)); 160 memcpy_P(&led, (&g_is31_leds[index]), sizeof(led));
160 161
161 g_pwm_buffer[led.driver][led.r] = red; 162 g_pwm_buffer[led.driver][led.r] = red;
162 g_pwm_buffer[led.driver][led.g] = green; 163 g_pwm_buffer[led.driver][led.g] = green;
163 g_pwm_buffer[led.driver][led.b] = blue; 164 g_pwm_buffer[led.driver][led.b] = blue;
164 g_pwm_buffer_update_required = true; 165 g_pwm_buffer_update_required[led.driver] = true;
165 } 166 }
166} 167}
167 168
@@ -199,30 +200,28 @@ void IS31FL3737_set_led_control_register(uint8_t index, bool red, bool green, bo
199 g_led_control_registers[led.driver][control_register_b] &= ~(1 << bit_b); 200 g_led_control_registers[led.driver][control_register_b] &= ~(1 << bit_b);
200 } 201 }
201 202
202 g_led_control_registers_update_required = true; 203 g_led_control_registers_update_required[led.driver] = true;
203} 204}
204 205
205void IS31FL3737_update_pwm_buffers(uint8_t addr1, uint8_t addr2) { 206void IS31FL3737_update_pwm_buffers(uint8_t addr, uint8_t index) {
206 if (g_pwm_buffer_update_required) { 207 if (g_pwm_buffer_update_required[index]) {
207 // Firstly we need to unlock the command register and select PG1 208 // Firstly we need to unlock the command register and select PG1
208 IS31FL3737_write_register(addr1, ISSI_COMMANDREGISTER_WRITELOCK, 0xC5); 209 IS31FL3737_write_register(addr, ISSI_COMMANDREGISTER_WRITELOCK, 0xC5);
209 IS31FL3737_write_register(addr1, ISSI_COMMANDREGISTER, ISSI_PAGE_PWM); 210 IS31FL3737_write_register(addr, ISSI_COMMANDREGISTER, ISSI_PAGE_PWM);
210 211
211 IS31FL3737_write_pwm_buffer(addr1, g_pwm_buffer[0]); 212 IS31FL3737_write_pwm_buffer(addr, g_pwm_buffer[index]);
212 // IS31FL3737_write_pwm_buffer(addr2, g_pwm_buffer[1]);
213 } 213 }
214 g_pwm_buffer_update_required = false; 214 g_pwm_buffer_update_required[index] = false;
215} 215}
216 216
217void IS31FL3737_update_led_control_registers(uint8_t addr1, uint8_t addr2) { 217void IS31FL3737_update_led_control_registers(uint8_t addr, uint8_t index) {
218 if (g_led_control_registers_update_required) { 218 if (g_led_control_registers_update_required[index]) {
219 // Firstly we need to unlock the command register and select PG0 219 // Firstly we need to unlock the command register and select PG0
220 IS31FL3737_write_register(addr1, ISSI_COMMANDREGISTER_WRITELOCK, 0xC5); 220 IS31FL3737_write_register(addr, ISSI_COMMANDREGISTER_WRITELOCK, 0xC5);
221 IS31FL3737_write_register(addr1, ISSI_COMMANDREGISTER, ISSI_PAGE_LEDCONTROL); 221 IS31FL3737_write_register(addr, ISSI_COMMANDREGISTER, ISSI_PAGE_LEDCONTROL);
222 for (int i = 0; i < 24; i++) { 222 for (int i = 0; i < 24; i++) {
223 IS31FL3737_write_register(addr1, i, g_led_control_registers[0][i]); 223 IS31FL3737_write_register(addr, i, g_led_control_registers[index][i]);
224 // IS31FL3737_write_register(addr2, i, g_led_control_registers[1][i]);
225 } 224 }
226 g_led_control_registers_update_required = false;
227 } 225 }
226 g_led_control_registers_update_required[index] = false;
228} 227}