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author | Joel Challis <git@zvecr.com> | 2021-11-01 19:18:33 +0000 |
---|---|---|
committer | GitHub <noreply@github.com> | 2021-11-01 19:18:33 +0000 |
commit | 92385e30cdad61ddfc0461b1ce1340bcb494a68a (patch) | |
tree | d472f93ed9f4e42e4972630d8178a387b91a51bc /drivers | |
parent | ee371c1295f00c119dd5a1bb2f3d4acedff832a7 (diff) | |
download | qmk_firmware-92385e30cdad61ddfc0461b1ce1340bcb494a68a.tar.gz qmk_firmware-92385e30cdad61ddfc0461b1ce1340bcb494a68a.zip |
Manually format develop (#15003)
Diffstat (limited to 'drivers')
-rw-r--r-- | drivers/sensors/adns5050.c | 23 | ||||
-rw-r--r-- | drivers/sensors/adns5050.h | 18 | ||||
-rw-r--r-- | drivers/sensors/adns9800.c | 119 | ||||
-rw-r--r-- | drivers/sensors/adns9800.h | 4 | ||||
-rw-r--r-- | drivers/sensors/pmw3360.c | 96 | ||||
-rw-r--r-- | drivers/sensors/pmw3360.h | 19 |
6 files changed, 130 insertions, 149 deletions
diff --git a/drivers/sensors/adns5050.c b/drivers/sensors/adns5050.c index e7273977d..254ef2ee8 100644 --- a/drivers/sensors/adns5050.c +++ b/drivers/sensors/adns5050.c | |||
@@ -17,7 +17,6 @@ | |||
17 | * along with this program. If not, see <http://www.gnu.org/licenses/>. | 17 | * along with this program. If not, see <http://www.gnu.org/licenses/>. |
18 | */ | 18 | */ |
19 | 19 | ||
20 | |||
21 | #include "adns5050.h" | 20 | #include "adns5050.h" |
22 | #include "wait.h" | 21 | #include "wait.h" |
23 | #include "debug.h" | 22 | #include "debug.h" |
@@ -61,13 +60,9 @@ void adns_sync(void) { | |||
61 | writePinHigh(ADNS_CS_PIN); | 60 | writePinHigh(ADNS_CS_PIN); |
62 | } | 61 | } |
63 | 62 | ||
64 | void adns_cs_select(void) { | 63 | void adns_cs_select(void) { writePinLow(ADNS_CS_PIN); } |
65 | writePinLow(ADNS_CS_PIN); | ||
66 | } | ||
67 | 64 | ||
68 | void adns_cs_deselect(void) { | 65 | void adns_cs_deselect(void) { writePinHigh(ADNS_CS_PIN); } |
69 | writePinHigh(ADNS_CS_PIN); | ||
70 | } | ||
71 | 66 | ||
72 | uint8_t adns_serial_read(void) { | 67 | uint8_t adns_serial_read(void) { |
73 | setPinInput(ADNS_SDIO_PIN); | 68 | setPinInput(ADNS_SDIO_PIN); |
@@ -121,7 +116,7 @@ uint8_t adns_read_reg(uint8_t reg_addr) { | |||
121 | // We don't need a minimum tSRAD here. That's because a 4ms wait time is | 116 | // We don't need a minimum tSRAD here. That's because a 4ms wait time is |
122 | // already included in adns_serial_write(), so we're good. | 117 | // already included in adns_serial_write(), so we're good. |
123 | // See page 10 and 15 of the ADNS spec sheet. | 118 | // See page 10 and 15 of the ADNS spec sheet. |
124 | //wait_us(4); | 119 | // wait_us(4); |
125 | 120 | ||
126 | uint8_t byte = adns_serial_read(); | 121 | uint8_t byte = adns_serial_read(); |
127 | 122 | ||
@@ -138,7 +133,7 @@ uint8_t adns_read_reg(uint8_t reg_addr) { | |||
138 | 133 | ||
139 | void adns_write_reg(uint8_t reg_addr, uint8_t data) { | 134 | void adns_write_reg(uint8_t reg_addr, uint8_t data) { |
140 | adns_cs_select(); | 135 | adns_cs_select(); |
141 | adns_serial_write( 0b10000000 | reg_addr ); | 136 | adns_serial_write(0b10000000 | reg_addr); |
142 | adns_serial_write(data); | 137 | adns_serial_write(data); |
143 | adns_cs_deselect(); | 138 | adns_cs_deselect(); |
144 | } | 139 | } |
@@ -155,7 +150,7 @@ report_adns_t adns_read_burst(void) { | |||
155 | // We don't need a minimum tSRAD here. That's because a 4ms wait time is | 150 | // We don't need a minimum tSRAD here. That's because a 4ms wait time is |
156 | // already included in adns_serial_write(), so we're good. | 151 | // already included in adns_serial_write(), so we're good. |
157 | // See page 10 and 15 of the ADNS spec sheet. | 152 | // See page 10 and 15 of the ADNS spec sheet. |
158 | //wait_us(4); | 153 | // wait_us(4); |
159 | 154 | ||
160 | uint8_t x = adns_serial_read(); | 155 | uint8_t x = adns_serial_read(); |
161 | uint8_t y = adns_serial_read(); | 156 | uint8_t y = adns_serial_read(); |
@@ -180,13 +175,11 @@ int8_t convert_twoscomp(uint8_t data) { | |||
180 | } | 175 | } |
181 | 176 | ||
182 | // Don't forget to use the definitions for CPI in the header file. | 177 | // Don't forget to use the definitions for CPI in the header file. |
183 | void adns_set_cpi(uint8_t cpi) { | 178 | void adns_set_cpi(uint8_t cpi) { adns_write_reg(REG_MOUSE_CONTROL2, cpi); } |
184 | adns_write_reg(REG_MOUSE_CONTROL2, cpi); | ||
185 | } | ||
186 | 179 | ||
187 | bool adns_check_signature(void) { | 180 | bool adns_check_signature(void) { |
188 | uint8_t pid = adns_read_reg(REG_PRODUCT_ID); | 181 | uint8_t pid = adns_read_reg(REG_PRODUCT_ID); |
189 | uint8_t rid = adns_read_reg(REG_REVISION_ID); | 182 | uint8_t rid = adns_read_reg(REG_REVISION_ID); |
190 | uint8_t pid2 = adns_read_reg(REG_PRODUCT_ID2); | 183 | uint8_t pid2 = adns_read_reg(REG_PRODUCT_ID2); |
191 | 184 | ||
192 | return (pid == 0x12 && rid == 0x01 && pid2 == 0x26); | 185 | return (pid == 0x12 && rid == 0x01 && pid2 == 0x26); |
diff --git a/drivers/sensors/adns5050.h b/drivers/sensors/adns5050.h index ff8e8f78e..5e9edc296 100644 --- a/drivers/sensors/adns5050.h +++ b/drivers/sensors/adns5050.h | |||
@@ -67,13 +67,13 @@ typedef struct { | |||
67 | // A bunch of functions to implement the ADNS5050-specific serial protocol. | 67 | // A bunch of functions to implement the ADNS5050-specific serial protocol. |
68 | // Note that the "serial.h" driver is insufficient, because it does not | 68 | // Note that the "serial.h" driver is insufficient, because it does not |
69 | // manually manipulate a serial clock signal. | 69 | // manually manipulate a serial clock signal. |
70 | void adns_init(void); | 70 | void adns_init(void); |
71 | void adns_sync(void); | 71 | void adns_sync(void); |
72 | uint8_t adns_serial_read(void); | 72 | uint8_t adns_serial_read(void); |
73 | void adns_serial_write(uint8_t data); | 73 | void adns_serial_write(uint8_t data); |
74 | uint8_t adns_read_reg(uint8_t reg_addr); | 74 | uint8_t adns_read_reg(uint8_t reg_addr); |
75 | void adns_write_reg(uint8_t reg_addr, uint8_t data); | 75 | void adns_write_reg(uint8_t reg_addr, uint8_t data); |
76 | report_adns_t adns_read_burst(void); | 76 | report_adns_t adns_read_burst(void); |
77 | int8_t convert_twoscomp(uint8_t data); | 77 | int8_t convert_twoscomp(uint8_t data); |
78 | void adns_set_cpi(uint8_t cpi); | 78 | void adns_set_cpi(uint8_t cpi); |
79 | bool adns_check_signature(void); | 79 | bool adns_check_signature(void); |
diff --git a/drivers/sensors/adns9800.c b/drivers/sensors/adns9800.c index 17966b81f..b4f683452 100644 --- a/drivers/sensors/adns9800.c +++ b/drivers/sensors/adns9800.c | |||
@@ -20,57 +20,57 @@ | |||
20 | #include "adns9800.h" | 20 | #include "adns9800.h" |
21 | 21 | ||
22 | // registers | 22 | // registers |
23 | #define REG_Product_ID 0x00 | 23 | #define REG_Product_ID 0x00 |
24 | #define REG_Revision_ID 0x01 | 24 | #define REG_Revision_ID 0x01 |
25 | #define REG_Motion 0x02 | 25 | #define REG_Motion 0x02 |
26 | #define REG_Delta_X_L 0x03 | 26 | #define REG_Delta_X_L 0x03 |
27 | #define REG_Delta_X_H 0x04 | 27 | #define REG_Delta_X_H 0x04 |
28 | #define REG_Delta_Y_L 0x05 | 28 | #define REG_Delta_Y_L 0x05 |
29 | #define REG_Delta_Y_H 0x06 | 29 | #define REG_Delta_Y_H 0x06 |
30 | #define REG_SQUAL 0x07 | 30 | #define REG_SQUAL 0x07 |
31 | #define REG_Pixel_Sum 0x08 | 31 | #define REG_Pixel_Sum 0x08 |
32 | #define REG_Maximum_Pixel 0x09 | 32 | #define REG_Maximum_Pixel 0x09 |
33 | #define REG_Minimum_Pixel 0x0a | 33 | #define REG_Minimum_Pixel 0x0a |
34 | #define REG_Shutter_Lower 0x0b | 34 | #define REG_Shutter_Lower 0x0b |
35 | #define REG_Shutter_Upper 0x0c | 35 | #define REG_Shutter_Upper 0x0c |
36 | #define REG_Frame_Period_Lower 0x0d | 36 | #define REG_Frame_Period_Lower 0x0d |
37 | #define REG_Frame_Period_Upper 0x0e | 37 | #define REG_Frame_Period_Upper 0x0e |
38 | #define REG_Configuration_I 0x0f | 38 | #define REG_Configuration_I 0x0f |
39 | #define REG_Configuration_II 0x10 | 39 | #define REG_Configuration_II 0x10 |
40 | #define REG_Frame_Capture 0x12 | 40 | #define REG_Frame_Capture 0x12 |
41 | #define REG_SROM_Enable 0x13 | 41 | #define REG_SROM_Enable 0x13 |
42 | #define REG_Run_Downshift 0x14 | 42 | #define REG_Run_Downshift 0x14 |
43 | #define REG_Rest1_Rate 0x15 | 43 | #define REG_Rest1_Rate 0x15 |
44 | #define REG_Rest1_Downshift 0x16 | 44 | #define REG_Rest1_Downshift 0x16 |
45 | #define REG_Rest2_Rate 0x17 | 45 | #define REG_Rest2_Rate 0x17 |
46 | #define REG_Rest2_Downshift 0x18 | 46 | #define REG_Rest2_Downshift 0x18 |
47 | #define REG_Rest3_Rate 0x19 | 47 | #define REG_Rest3_Rate 0x19 |
48 | #define REG_Frame_Period_Max_Bound_Lower 0x1a | 48 | #define REG_Frame_Period_Max_Bound_Lower 0x1a |
49 | #define REG_Frame_Period_Max_Bound_Upper 0x1b | 49 | #define REG_Frame_Period_Max_Bound_Upper 0x1b |
50 | #define REG_Frame_Period_Min_Bound_Lower 0x1c | 50 | #define REG_Frame_Period_Min_Bound_Lower 0x1c |
51 | #define REG_Frame_Period_Min_Bound_Upper 0x1d | 51 | #define REG_Frame_Period_Min_Bound_Upper 0x1d |
52 | #define REG_Shutter_Max_Bound_Lower 0x1e | 52 | #define REG_Shutter_Max_Bound_Lower 0x1e |
53 | #define REG_Shutter_Max_Bound_Upper 0x1f | 53 | #define REG_Shutter_Max_Bound_Upper 0x1f |
54 | #define REG_LASER_CTRL0 0x20 | 54 | #define REG_LASER_CTRL0 0x20 |
55 | #define REG_Observation 0x24 | 55 | #define REG_Observation 0x24 |
56 | #define REG_Data_Out_Lower 0x25 | 56 | #define REG_Data_Out_Lower 0x25 |
57 | #define REG_Data_Out_Upper 0x26 | 57 | #define REG_Data_Out_Upper 0x26 |
58 | #define REG_SROM_ID 0x2a | 58 | #define REG_SROM_ID 0x2a |
59 | #define REG_Lift_Detection_Thr 0x2e | 59 | #define REG_Lift_Detection_Thr 0x2e |
60 | #define REG_Configuration_V 0x2f | 60 | #define REG_Configuration_V 0x2f |
61 | #define REG_Configuration_IV 0x39 | 61 | #define REG_Configuration_IV 0x39 |
62 | #define REG_Power_Up_Reset 0x3a | 62 | #define REG_Power_Up_Reset 0x3a |
63 | #define REG_Shutdown 0x3b | 63 | #define REG_Shutdown 0x3b |
64 | #define REG_Inverse_Product_ID 0x3f | 64 | #define REG_Inverse_Product_ID 0x3f |
65 | #define REG_Motion_Burst 0x50 | 65 | #define REG_Motion_Burst 0x50 |
66 | #define REG_SROM_Load_Burst 0x62 | 66 | #define REG_SROM_Load_Burst 0x62 |
67 | #define REG_Pixel_Burst 0x64 | 67 | #define REG_Pixel_Burst 0x64 |
68 | 68 | ||
69 | #define ADNS_CLOCK_SPEED 2000000 | 69 | #define ADNS_CLOCK_SPEED 2000000 |
70 | #define MIN_CPI 200 | 70 | #define MIN_CPI 200 |
71 | #define MAX_CPI 8200 | 71 | #define MAX_CPI 8200 |
72 | #define CPI_STEP 200 | 72 | #define CPI_STEP 200 |
73 | #define CLAMP_CPI(value) value < MIN_CPI ? MIN_CPI : value > MAX_CPI ? MAX_CPI : value | 73 | #define CLAMP_CPI(value) value<MIN_CPI ? MIN_CPI : value> MAX_CPI ? MAX_CPI : value |
74 | #define SPI_MODE 3 | 74 | #define SPI_MODE 3 |
75 | #define SPI_DIVISOR (F_CPU / ADNS_CLOCK_SPEED) | 75 | #define SPI_DIVISOR (F_CPU / ADNS_CLOCK_SPEED) |
76 | #define US_BETWEEN_WRITES 120 | 76 | #define US_BETWEEN_WRITES 120 |
@@ -80,12 +80,9 @@ | |||
80 | 80 | ||
81 | extern const uint8_t firmware_data[]; | 81 | extern const uint8_t firmware_data[]; |
82 | 82 | ||
83 | void adns_spi_start(void){ | 83 | void adns_spi_start(void) { spi_start(SPI_SS_PIN, false, SPI_MODE, SPI_DIVISOR); } |
84 | spi_start(SPI_SS_PIN, false, SPI_MODE, SPI_DIVISOR); | ||
85 | } | ||
86 | |||
87 | void adns_write(uint8_t reg_addr, uint8_t data){ | ||
88 | 84 | ||
85 | void adns_write(uint8_t reg_addr, uint8_t data) { | ||
89 | adns_spi_start(); | 86 | adns_spi_start(); |
90 | spi_write(reg_addr | MSB1); | 87 | spi_write(reg_addr | MSB1); |
91 | spi_write(data); | 88 | spi_write(data); |
@@ -93,10 +90,9 @@ void adns_write(uint8_t reg_addr, uint8_t data){ | |||
93 | wait_us(US_BETWEEN_WRITES); | 90 | wait_us(US_BETWEEN_WRITES); |
94 | } | 91 | } |
95 | 92 | ||
96 | uint8_t adns_read(uint8_t reg_addr){ | 93 | uint8_t adns_read(uint8_t reg_addr) { |
97 | |||
98 | adns_spi_start(); | 94 | adns_spi_start(); |
99 | spi_write(reg_addr & 0x7f ); | 95 | spi_write(reg_addr & 0x7f); |
100 | uint8_t data = spi_read(); | 96 | uint8_t data = spi_read(); |
101 | spi_stop(); | 97 | spi_stop(); |
102 | wait_us(US_BETWEEN_READS); | 98 | wait_us(US_BETWEEN_READS); |
@@ -105,7 +101,6 @@ uint8_t adns_read(uint8_t reg_addr){ | |||
105 | } | 101 | } |
106 | 102 | ||
107 | void adns_init() { | 103 | void adns_init() { |
108 | |||
109 | setPinOutput(SPI_SS_PIN); | 104 | setPinOutput(SPI_SS_PIN); |
110 | 105 | ||
111 | spi_init(); | 106 | spi_init(); |
@@ -144,7 +139,7 @@ void adns_init() { | |||
144 | 139 | ||
145 | // send all bytes of the firmware | 140 | // send all bytes of the firmware |
146 | unsigned char c; | 141 | unsigned char c; |
147 | for(int i = 0; i < FIRMWARE_LENGTH; i++){ | 142 | for (int i = 0; i < FIRMWARE_LENGTH; i++) { |
148 | c = (unsigned char)pgm_read_byte(firmware_data + i); | 143 | c = (unsigned char)pgm_read_byte(firmware_data + i); |
149 | spi_write(c); | 144 | spi_write(c); |
150 | wait_us(15); | 145 | wait_us(15); |
@@ -161,7 +156,7 @@ void adns_init() { | |||
161 | 156 | ||
162 | config_adns_t adns_get_config(void) { | 157 | config_adns_t adns_get_config(void) { |
163 | uint8_t config_1 = adns_read(REG_Configuration_I); | 158 | uint8_t config_1 = adns_read(REG_Configuration_I); |
164 | return (config_adns_t){ (config_1 & 0xFF) * CPI_STEP }; | 159 | return (config_adns_t){(config_1 & 0xFF) * CPI_STEP}; |
165 | } | 160 | } |
166 | 161 | ||
167 | void adns_set_config(config_adns_t config) { | 162 | void adns_set_config(config_adns_t config) { |
@@ -169,20 +164,17 @@ void adns_set_config(config_adns_t config) { | |||
169 | adns_write(REG_Configuration_I, config_1); | 164 | adns_write(REG_Configuration_I, config_1); |
170 | } | 165 | } |
171 | 166 | ||
172 | static int16_t convertDeltaToInt(uint8_t high, uint8_t low){ | 167 | static int16_t convertDeltaToInt(uint8_t high, uint8_t low) { |
173 | |||
174 | // join bytes into twos compliment | 168 | // join bytes into twos compliment |
175 | uint16_t twos_comp = (high << 8) | low; | 169 | uint16_t twos_comp = (high << 8) | low; |
176 | 170 | ||
177 | // convert twos comp to int | 171 | // convert twos comp to int |
178 | if (twos_comp & 0x8000) | 172 | if (twos_comp & 0x8000) return -1 * (~twos_comp + 1); |
179 | return -1 * (~twos_comp + 1); | ||
180 | 173 | ||
181 | return twos_comp; | 174 | return twos_comp; |
182 | } | 175 | } |
183 | 176 | ||
184 | report_adns_t adns_get_report(void) { | 177 | report_adns_t adns_get_report(void) { |
185 | |||
186 | report_adns_t report = {0, 0}; | 178 | report_adns_t report = {0, 0}; |
187 | 179 | ||
188 | adns_spi_start(); | 180 | adns_spi_start(); |
@@ -194,8 +186,7 @@ report_adns_t adns_get_report(void) { | |||
194 | 186 | ||
195 | uint8_t motion = spi_read(); | 187 | uint8_t motion = spi_read(); |
196 | 188 | ||
197 | if(motion & 0x80) { | 189 | if (motion & 0x80) { |
198 | |||
199 | // clear observation register | 190 | // clear observation register |
200 | spi_read(); | 191 | spi_read(); |
201 | 192 | ||
diff --git a/drivers/sensors/adns9800.h b/drivers/sensors/adns9800.h index 2f50b8f1b..d19ded401 100644 --- a/drivers/sensors/adns9800.h +++ b/drivers/sensors/adns9800.h | |||
@@ -28,8 +28,8 @@ typedef struct { | |||
28 | int16_t y; | 28 | int16_t y; |
29 | } report_adns_t; | 29 | } report_adns_t; |
30 | 30 | ||
31 | void adns_init(void); | 31 | void adns_init(void); |
32 | config_adns_t adns_get_config(void); | 32 | config_adns_t adns_get_config(void); |
33 | void adns_set_config(config_adns_t); | 33 | void adns_set_config(config_adns_t); |
34 | /* Reads and clears the current delta values on the ADNS sensor */ | 34 | /* Reads and clears the current delta values on the ADNS sensor */ |
35 | report_adns_t adns_get_report(void); | 35 | report_adns_t adns_get_report(void); |
diff --git a/drivers/sensors/pmw3360.c b/drivers/sensors/pmw3360.c index 5463bfc59..79b653e45 100644 --- a/drivers/sensors/pmw3360.c +++ b/drivers/sensors/pmw3360.c | |||
@@ -23,55 +23,55 @@ | |||
23 | #include "pmw3360_firmware.h" | 23 | #include "pmw3360_firmware.h" |
24 | 24 | ||
25 | // Registers | 25 | // Registers |
26 | #define REG_Product_ID 0x00 | 26 | #define REG_Product_ID 0x00 |
27 | #define REG_Revision_ID 0x01 | 27 | #define REG_Revision_ID 0x01 |
28 | #define REG_Motion 0x02 | 28 | #define REG_Motion 0x02 |
29 | #define REG_Delta_X_L 0x03 | 29 | #define REG_Delta_X_L 0x03 |
30 | #define REG_Delta_X_H 0x04 | 30 | #define REG_Delta_X_H 0x04 |
31 | #define REG_Delta_Y_L 0x05 | 31 | #define REG_Delta_Y_L 0x05 |
32 | #define REG_Delta_Y_H 0x06 | 32 | #define REG_Delta_Y_H 0x06 |
33 | #define REG_SQUAL 0x07 | 33 | #define REG_SQUAL 0x07 |
34 | #define REG_Raw_Data_Sum 0x08 | 34 | #define REG_Raw_Data_Sum 0x08 |
35 | #define REG_Maximum_Raw_data 0x09 | 35 | #define REG_Maximum_Raw_data 0x09 |
36 | #define REG_Minimum_Raw_data 0x0A | 36 | #define REG_Minimum_Raw_data 0x0A |
37 | #define REG_Shutter_Lower 0x0B | 37 | #define REG_Shutter_Lower 0x0B |
38 | #define REG_Shutter_Upper 0x0C | 38 | #define REG_Shutter_Upper 0x0C |
39 | #define REG_Control 0x0D | 39 | #define REG_Control 0x0D |
40 | #define REG_Config1 0x0F | 40 | #define REG_Config1 0x0F |
41 | #define REG_Config2 0x10 | 41 | #define REG_Config2 0x10 |
42 | #define REG_Angle_Tune 0x11 | 42 | #define REG_Angle_Tune 0x11 |
43 | #define REG_Frame_Capture 0x12 | 43 | #define REG_Frame_Capture 0x12 |
44 | #define REG_SROM_Enable 0x13 | 44 | #define REG_SROM_Enable 0x13 |
45 | #define REG_Run_Downshift 0x14 | 45 | #define REG_Run_Downshift 0x14 |
46 | #define REG_Rest1_Rate_Lower 0x15 | 46 | #define REG_Rest1_Rate_Lower 0x15 |
47 | #define REG_Rest1_Rate_Upper 0x16 | 47 | #define REG_Rest1_Rate_Upper 0x16 |
48 | #define REG_Rest1_Downshift 0x17 | 48 | #define REG_Rest1_Downshift 0x17 |
49 | #define REG_Rest2_Rate_Lower 0x18 | 49 | #define REG_Rest2_Rate_Lower 0x18 |
50 | #define REG_Rest2_Rate_Upper 0x19 | 50 | #define REG_Rest2_Rate_Upper 0x19 |
51 | #define REG_Rest2_Downshift 0x1A | 51 | #define REG_Rest2_Downshift 0x1A |
52 | #define REG_Rest3_Rate_Lower 0x1B | 52 | #define REG_Rest3_Rate_Lower 0x1B |
53 | #define REG_Rest3_Rate_Upper 0x1C | 53 | #define REG_Rest3_Rate_Upper 0x1C |
54 | #define REG_Observation 0x24 | 54 | #define REG_Observation 0x24 |
55 | #define REG_Data_Out_Lower 0x25 | 55 | #define REG_Data_Out_Lower 0x25 |
56 | #define REG_Data_Out_Upper 0x26 | 56 | #define REG_Data_Out_Upper 0x26 |
57 | #define REG_Raw_Data_Dump 0x29 | 57 | #define REG_Raw_Data_Dump 0x29 |
58 | #define REG_SROM_ID 0x2A | 58 | #define REG_SROM_ID 0x2A |
59 | #define REG_Min_SQ_Run 0x2B | 59 | #define REG_Min_SQ_Run 0x2B |
60 | #define REG_Raw_Data_Threshold 0x2C | 60 | #define REG_Raw_Data_Threshold 0x2C |
61 | #define REG_Config5 0x2F | 61 | #define REG_Config5 0x2F |
62 | #define REG_Power_Up_Reset 0x3A | 62 | #define REG_Power_Up_Reset 0x3A |
63 | #define REG_Shutdown 0x3B | 63 | #define REG_Shutdown 0x3B |
64 | #define REG_Inverse_Product_ID 0x3F | 64 | #define REG_Inverse_Product_ID 0x3F |
65 | #define REG_LiftCutoff_Tune3 0x41 | 65 | #define REG_LiftCutoff_Tune3 0x41 |
66 | #define REG_Angle_Snap 0x42 | 66 | #define REG_Angle_Snap 0x42 |
67 | #define REG_LiftCutoff_Tune1 0x4A | 67 | #define REG_LiftCutoff_Tune1 0x4A |
68 | #define REG_Motion_Burst 0x50 | 68 | #define REG_Motion_Burst 0x50 |
69 | #define REG_LiftCutoff_Tune_Timeout 0x58 | 69 | #define REG_LiftCutoff_Tune_Timeout 0x58 |
70 | #define REG_LiftCutoff_Tune_Min_Length 0x5A | 70 | #define REG_LiftCutoff_Tune_Min_Length 0x5A |
71 | #define REG_SROM_Load_Burst 0x62 | 71 | #define REG_SROM_Load_Burst 0x62 |
72 | #define REG_Lift_Config 0x63 | 72 | #define REG_Lift_Config 0x63 |
73 | #define REG_Raw_Data_Burst 0x64 | 73 | #define REG_Raw_Data_Burst 0x64 |
74 | #define REG_LiftCutoff_Tune2 0x65 | 74 | #define REG_LiftCutoff_Tune2 0x65 |
75 | 75 | ||
76 | bool _inBurst = false; | 76 | bool _inBurst = false; |
77 | 77 | ||
diff --git a/drivers/sensors/pmw3360.h b/drivers/sensors/pmw3360.h index 124c62cf0..7429a6ba0 100644 --- a/drivers/sensors/pmw3360.h +++ b/drivers/sensors/pmw3360.h | |||
@@ -66,20 +66,17 @@ typedef struct { | |||
66 | int8_t mdy; | 66 | int8_t mdy; |
67 | } report_pmw_t; | 67 | } report_pmw_t; |
68 | 68 | ||
69 | 69 | bool spi_start_adv(void); | |
70 | 70 | void spi_stop_adv(void); | |
71 | bool spi_start_adv(void); | ||
72 | void spi_stop_adv(void); | ||
73 | spi_status_t spi_write_adv(uint8_t reg_addr, uint8_t data); | 71 | spi_status_t spi_write_adv(uint8_t reg_addr, uint8_t data); |
74 | uint8_t spi_read_adv(uint8_t reg_addr); | 72 | uint8_t spi_read_adv(uint8_t reg_addr); |
75 | bool pmw_spi_init(void); | 73 | bool pmw_spi_init(void); |
76 | void pmw_set_cpi(uint16_t cpi); | 74 | void pmw_set_cpi(uint16_t cpi); |
77 | uint16_t pmw_get_cpi(void); | 75 | uint16_t pmw_get_cpi(void); |
78 | void pmw_upload_firmware(void); | 76 | void pmw_upload_firmware(void); |
79 | bool pmw_check_signature(void); | 77 | bool pmw_check_signature(void); |
80 | report_pmw_t pmw_read_burst(void); | 78 | report_pmw_t pmw_read_burst(void); |
81 | 79 | ||
82 | |||
83 | #define degToRad(angleInDegrees) ((angleInDegrees)*M_PI / 180.0) | 80 | #define degToRad(angleInDegrees) ((angleInDegrees)*M_PI / 180.0) |
84 | #define radToDeg(angleInRadians) ((angleInRadians)*180.0 / M_PI) | 81 | #define radToDeg(angleInRadians) ((angleInRadians)*180.0 / M_PI) |
85 | #define constrain(amt, low, high) ((amt) < (low) ? (low) : ((amt) > (high) ? (high) : (amt))) | 82 | #define constrain(amt, low, high) ((amt) < (low) ? (low) : ((amt) > (high) ? (high) : (amt))) |