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authorJames Young <18669334+noroadsleft@users.noreply.github.com>2020-11-28 12:02:18 -0800
committerGitHub <noreply@github.com>2020-11-28 12:02:18 -0800
commitc66df1664497546f32662409778731143e45a552 (patch)
treeda73a2d532a27685a31d932b3a44a707d4a3af81 /platforms/chibios
parent15385d4113414d42bd062c60c9de5df797d3157f (diff)
downloadqmk_firmware-c66df1664497546f32662409778731143e45a552.tar.gz
qmk_firmware-c66df1664497546f32662409778731143e45a552.zip
2020 November 28 Breaking Changes Update (#11053)
* Branch point for 2020 November 28 Breaking Change * Remove matrix_col_t to allow MATRIX_ROWS > 32 (#10183) * Add support for soft serial to ATmega32U2 (#10204) * Change MIDI velocity implementation to allow direct control of velocity value (#9940) * Add ability to build a subset of all keyboards based on platform. * Actually use eeprom_driver_init(). * Make bootloader_jump weak for ChibiOS. (#10417) * Joystick 16-bit support (#10439) * Per-encoder resolutions (#10259) * Share button state from mousekey to pointing_device (#10179) * Add hotfix for chibios keyboards not wake (#10088) * Add advanced/efficient RGB Matrix Indicators (#8564) * Naming change. * Support for STM32 GPIOF,G,H,I,J,K (#10206) * Add milc as a dependency and remove the installed milc (#10563) * ChibiOS upgrade: early init conversions (#10214) * ChibiOS upgrade: configuration file migrator (#9952) * Haptic and solenoid cleanup (#9700) * XD75 cleanup (#10524) * OLED display update interval support (#10388) * Add definition based on currently-selected serial driver. (#10716) * New feature: Retro Tapping per key (#10622) * Allow for modification of output RGB values when using rgblight/rgb_matrix. (#10638) * Add housekeeping task callbacks so that keyboards/keymaps are capable of executing code for each main loop iteration. (#10530) * Rescale both ChibiOS and AVR backlighting. * Reduce Helix keyboard build variation (#8669) * Minor change to behavior allowing display updates to continue between task ticks (#10750) * Some GPIO manipulations in matrix.c change to atomic. (#10491) * qmk cformat (#10767) * [Keyboard] Update the Speedo firmware for v3.0 (#10657) * Maartenwut/Maarten namechange to evyd13/Evy (#10274) * [quantum] combine repeated lines of code (#10837) * Add step sequencer feature (#9703) * aeboards/ext65 refactor (#10820) * Refactor xelus/dawn60 for Rev2 later (#10584) * add DEBUG_MATRIX_SCAN_RATE_ENABLE to common_features.mk (#10824) * [Core] Added `add_oneshot_mods` & `del_oneshot_mods` (#10549) * update chibios os usb for the otg driver (#8893) * Remove HD44780 References, Part 4 (#10735) * [Keyboard] Add Valor FRL TKL (+refactor) (#10512) * Fix cursor position bug in oled_write_raw functions (#10800) * Fixup version.h writing when using SKIP_VERSION=yes (#10972) * Allow for certain code in the codebase assuming length of string. (#10974) * Add AT90USB support for serial.c (#10706) * Auto shift: support repeats and early registration (#9826) * Rename ledmatrix.h to match .c file (#7949) * Split RGB_MATRIX_ENABLE into _ENABLE and _DRIVER (#10231) * Split LED_MATRIX_ENABLE into _ENABLE and _DRIVER (#10840) * Merge point for 2020 Nov 28 Breaking Change
Diffstat (limited to 'platforms/chibios')
-rw-r--r--platforms/chibios/BLACKPILL_STM32_F401/configs/config.h4
-rw-r--r--platforms/chibios/BLACKPILL_STM32_F411/configs/config.h4
-rw-r--r--platforms/chibios/GENERIC_STM32_F042X6/configs/mcuconf.h168
-rw-r--r--platforms/chibios/GENERIC_STM32_F072XB/board/board.c250
-rw-r--r--platforms/chibios/GENERIC_STM32_F072XB/board/board.h407
-rw-r--r--platforms/chibios/GENERIC_STM32_F072XB/board/board.mk4
-rw-r--r--platforms/chibios/GENERIC_STM32_F072XB/configs/board.h20
-rw-r--r--platforms/chibios/GENERIC_STM32_F072XB/configs/mcuconf.h177
-rw-r--r--platforms/chibios/GENERIC_STM32_F303XC/configs/config.h4
-rw-r--r--platforms/chibios/STM32_F103_STM32DUINO/configs/mcuconf.h209
-rw-r--r--platforms/chibios/common/configs/chconf.h (renamed from platforms/chibios/GENERIC_STM32_F303XC/configs/chconf.h)0
-rw-r--r--platforms/chibios/common/configs/halconf.h (renamed from platforms/chibios/GENERIC_STM32_F303XC/configs/halconf.h)0
-rw-r--r--platforms/chibios/common/ld/MKL26Z64.ld (renamed from platforms/chibios/ld/MKL26Z64.ld)0
-rw-r--r--platforms/chibios/common/ld/STM32F103x8_stm32duino_bootloader.ld (renamed from platforms/chibios/ld/STM32F103x8_stm32duino_bootloader.ld)0
14 files changed, 585 insertions, 662 deletions
diff --git a/platforms/chibios/BLACKPILL_STM32_F401/configs/config.h b/platforms/chibios/BLACKPILL_STM32_F401/configs/config.h
index eb73e72ef..1c9d9c612 100644
--- a/platforms/chibios/BLACKPILL_STM32_F401/configs/config.h
+++ b/platforms/chibios/BLACKPILL_STM32_F401/configs/config.h
@@ -20,4 +20,6 @@
20#define STM32_LSECLK 32768U 20#define STM32_LSECLK 32768U
21#define STM32_HSECLK 25000000U 21#define STM32_HSECLK 25000000U
22 22
23#define EARLY_INIT_PERFORM_BOOTLOADER_JUMP TRUE 23#ifndef EARLY_INIT_PERFORM_BOOTLOADER_JUMP
24# define EARLY_INIT_PERFORM_BOOTLOADER_JUMP TRUE
25#endif
diff --git a/platforms/chibios/BLACKPILL_STM32_F411/configs/config.h b/platforms/chibios/BLACKPILL_STM32_F411/configs/config.h
index eb73e72ef..1c9d9c612 100644
--- a/platforms/chibios/BLACKPILL_STM32_F411/configs/config.h
+++ b/platforms/chibios/BLACKPILL_STM32_F411/configs/config.h
@@ -20,4 +20,6 @@
20#define STM32_LSECLK 32768U 20#define STM32_LSECLK 32768U
21#define STM32_HSECLK 25000000U 21#define STM32_HSECLK 25000000U
22 22
23#define EARLY_INIT_PERFORM_BOOTLOADER_JUMP TRUE 23#ifndef EARLY_INIT_PERFORM_BOOTLOADER_JUMP
24# define EARLY_INIT_PERFORM_BOOTLOADER_JUMP TRUE
25#endif
diff --git a/platforms/chibios/GENERIC_STM32_F042X6/configs/mcuconf.h b/platforms/chibios/GENERIC_STM32_F042X6/configs/mcuconf.h
new file mode 100644
index 000000000..4643e9f92
--- /dev/null
+++ b/platforms/chibios/GENERIC_STM32_F042X6/configs/mcuconf.h
@@ -0,0 +1,168 @@
1/*
2 ChibiOS - Copyright (C) 2006..2015 Giovanni Di Sirio
3 Licensed under the Apache License, Version 2.0 (the "License");
4 you may not use this file except in compliance with the License.
5 You may obtain a copy of the License at
6 http://www.apache.org/licenses/LICENSE-2.0
7 Unless required by applicable law or agreed to in writing, software
8 distributed under the License is distributed on an "AS IS" BASIS,
9 WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
10 See the License for the specific language governing permissions and
11 limitations under the License.
12*/
13
14#ifndef _MCUCONF_H_
15#define _MCUCONF_H_
16
17/*
18 * STM32F0xx drivers configuration.
19 * The following settings override the default settings present in
20 * the various device driver implementation headers.
21 * Note that the settings for each driver only have effect if the whole
22 * driver is enabled in halconf.h.
23 *
24 * IRQ priorities:
25 * 3...0 Lowest...Highest.
26 *
27 * DMA priorities:
28 * 0...3 Lowest...Highest.
29 */
30
31#define STM32F0xx_MCUCONF
32
33/*
34 * HAL driver system settings.
35 */
36#define STM32_NO_INIT FALSE
37#define STM32_PVD_ENABLE FALSE
38#define STM32_PLS STM32_PLS_LEV0
39#define STM32_HSI_ENABLED TRUE
40#define STM32_HSI14_ENABLED TRUE
41#define STM32_HSI48_ENABLED FALSE
42#define STM32_LSI_ENABLED TRUE
43#define STM32_HSE_ENABLED FALSE
44#define STM32_LSE_ENABLED FALSE
45#define STM32_SW STM32_SW_PLL
46#define STM32_PLLSRC STM32_PLLSRC_HSI_DIV2
47#define STM32_PREDIV_VALUE 1
48#define STM32_PLLMUL_VALUE 12
49#define STM32_HPRE STM32_HPRE_DIV1
50#define STM32_PPRE STM32_PPRE_DIV1
51#define STM32_ADCSW STM32_ADCSW_HSI14
52#define STM32_ADCPRE STM32_ADCPRE_DIV4
53#define STM32_MCOSEL STM32_MCOSEL_NOCLOCK
54#define STM32_ADCPRE STM32_ADCPRE_DIV4
55#define STM32_ADCSW STM32_ADCSW_HSI14
56#define STM32_USBSW STM32_USBSW_HSI48
57#define STM32_CECSW STM32_CECSW_HSI
58#define STM32_I2C1SW STM32_I2C1SW_HSI
59#define STM32_USART1SW STM32_USART1SW_PCLK
60#define STM32_RTCSEL STM32_RTCSEL_LSI
61
62/*
63 * ADC driver system settings.
64 */
65#define STM32_ADC_USE_ADC1 FALSE
66#define STM32_ADC_ADC1_DMA_PRIORITY 2
67#define STM32_ADC_IRQ_PRIORITY 2
68#define STM32_ADC_ADC1_DMA_IRQ_PRIORITY 2
69
70/*
71 * EXT driver system settings.
72 */
73#define STM32_EXT_EXTI0_1_IRQ_PRIORITY 3
74#define STM32_EXT_EXTI2_3_IRQ_PRIORITY 3
75#define STM32_EXT_EXTI4_15_IRQ_PRIORITY 3
76#define STM32_EXT_EXTI16_IRQ_PRIORITY 3
77#define STM32_EXT_EXTI17_IRQ_PRIORITY 3
78
79/*
80 * GPT driver system settings.
81 */
82#define STM32_GPT_USE_TIM1 FALSE
83#define STM32_GPT_USE_TIM2 FALSE
84#define STM32_GPT_USE_TIM3 FALSE
85#define STM32_GPT_USE_TIM14 FALSE
86#define STM32_GPT_TIM1_IRQ_PRIORITY 2
87#define STM32_GPT_TIM2_IRQ_PRIORITY 2
88#define STM32_GPT_TIM3_IRQ_PRIORITY 2
89#define STM32_GPT_TIM14_IRQ_PRIORITY 2
90
91/*
92 * I2C driver system settings.
93 */
94#define STM32_I2C_USE_I2C1 FALSE
95#define STM32_I2C_USE_I2C2 FALSE
96#define STM32_I2C_BUSY_TIMEOUT 50
97#define STM32_I2C_I2C1_IRQ_PRIORITY 3
98#define STM32_I2C_I2C2_IRQ_PRIORITY 3
99#define STM32_I2C_USE_DMA TRUE
100#define STM32_I2C_I2C1_DMA_PRIORITY 1
101#define STM32_I2C_I2C2_DMA_PRIORITY 1
102#define STM32_I2C_DMA_ERROR_HOOK(i2cp) osalSysHalt("DMA failure")
103
104/*
105 * ICU driver system settings.
106 */
107#define STM32_ICU_USE_TIM1 FALSE
108#define STM32_ICU_USE_TIM2 FALSE
109#define STM32_ICU_USE_TIM3 FALSE
110#define STM32_ICU_TIM1_IRQ_PRIORITY 3
111#define STM32_ICU_TIM2_IRQ_PRIORITY 3
112#define STM32_ICU_TIM3_IRQ_PRIORITY 3
113
114/*
115 * PWM driver system settings.
116 */
117#define STM32_PWM_USE_ADVANCED FALSE
118#define STM32_PWM_USE_TIM1 FALSE
119#define STM32_PWM_USE_TIM2 FALSE
120#define STM32_PWM_USE_TIM3 FALSE
121#define STM32_PWM_TIM1_IRQ_PRIORITY 3
122#define STM32_PWM_TIM2_IRQ_PRIORITY 3
123#define STM32_PWM_TIM3_IRQ_PRIORITY 3
124
125/*
126 * SERIAL driver system settings.
127 */
128#define STM32_SERIAL_USE_USART1 FALSE
129#define STM32_SERIAL_USE_USART2 FALSE
130#define STM32_SERIAL_USART1_PRIORITY 3
131#define STM32_SERIAL_USART2_PRIORITY 3
132
133/*
134 * SPI driver system settings.
135 */
136#define STM32_SPI_USE_SPI1 FALSE
137#define STM32_SPI_USE_SPI2 FALSE
138#define STM32_SPI_SPI1_DMA_PRIORITY 1
139#define STM32_SPI_SPI2_DMA_PRIORITY 1
140#define STM32_SPI_SPI1_IRQ_PRIORITY 2
141#define STM32_SPI_SPI2_IRQ_PRIORITY 2
142#define STM32_SPI_DMA_ERROR_HOOK(spip) osalSysHalt("DMA failure")
143
144/*
145 * ST driver system settings.
146 */
147#define STM32_ST_IRQ_PRIORITY 2
148#define STM32_ST_USE_TIMER 2
149
150/*
151 * UART driver system settings.
152 */
153#define STM32_UART_USE_USART1 FALSE
154#define STM32_UART_USE_USART2 FALSE
155#define STM32_UART_USART1_IRQ_PRIORITY 3
156#define STM32_UART_USART2_IRQ_PRIORITY 3
157#define STM32_UART_USART1_DMA_PRIORITY 0
158#define STM32_UART_USART2_DMA_PRIORITY 0
159#define STM32_UART_DMA_ERROR_HOOK(uartp) osalSysHalt("DMA failure")
160
161/*
162 * USB driver system settings.
163 */
164#define STM32_USB_USE_USB1 TRUE
165#define STM32_USB_LOW_POWER_ON_SUSPEND FALSE
166#define STM32_USB_USB1_LP_IRQ_PRIORITY 3
167
168#endif /* _MCUCONF_H_ */ \ No newline at end of file
diff --git a/platforms/chibios/GENERIC_STM32_F072XB/board/board.c b/platforms/chibios/GENERIC_STM32_F072XB/board/board.c
deleted file mode 100644
index c91136e8f..000000000
--- a/platforms/chibios/GENERIC_STM32_F072XB/board/board.c
+++ /dev/null
@@ -1,250 +0,0 @@
1/*
2 ChibiOS - Copyright (C) 2006..2018 Giovanni Di Sirio
3
4 Licensed under the Apache License, Version 2.0 (the "License");
5 you may not use this file except in compliance with the License.
6 You may obtain a copy of the License at
7
8 http://www.apache.org/licenses/LICENSE-2.0
9
10 Unless required by applicable law or agreed to in writing, software
11 distributed under the License is distributed on an "AS IS" BASIS,
12 WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
13 See the License for the specific language governing permissions and
14 limitations under the License.
15*/
16
17/*
18 * This file has been automatically generated using ChibiStudio board
19 * generator plugin. Do not edit manually.
20 */
21
22#include "hal.h"
23#include "stm32_gpio.h"
24
25/*===========================================================================*/
26/* Driver local definitions. */
27/*===========================================================================*/
28
29/*===========================================================================*/
30/* Driver exported variables. */
31/*===========================================================================*/
32
33/*===========================================================================*/
34/* Driver local variables and types. */
35/*===========================================================================*/
36
37/**
38 * @brief Type of STM32 GPIO port setup.
39 */
40typedef struct {
41 uint32_t moder;
42 uint32_t otyper;
43 uint32_t ospeedr;
44 uint32_t pupdr;
45 uint32_t odr;
46 uint32_t afrl;
47 uint32_t afrh;
48} gpio_setup_t;
49
50/**
51 * @brief Type of STM32 GPIO initialization data.
52 */
53typedef struct {
54#if STM32_HAS_GPIOA || defined(__DOXYGEN__)
55 gpio_setup_t PAData;
56#endif
57#if STM32_HAS_GPIOB || defined(__DOXYGEN__)
58 gpio_setup_t PBData;
59#endif
60#if STM32_HAS_GPIOC || defined(__DOXYGEN__)
61 gpio_setup_t PCData;
62#endif
63#if STM32_HAS_GPIOD || defined(__DOXYGEN__)
64 gpio_setup_t PDData;
65#endif
66#if STM32_HAS_GPIOE || defined(__DOXYGEN__)
67 gpio_setup_t PEData;
68#endif
69#if STM32_HAS_GPIOF || defined(__DOXYGEN__)
70 gpio_setup_t PFData;
71#endif
72#if STM32_HAS_GPIOG || defined(__DOXYGEN__)
73 gpio_setup_t PGData;
74#endif
75#if STM32_HAS_GPIOH || defined(__DOXYGEN__)
76 gpio_setup_t PHData;
77#endif
78#if STM32_HAS_GPIOI || defined(__DOXYGEN__)
79 gpio_setup_t PIData;
80#endif
81#if STM32_HAS_GPIOJ || defined(__DOXYGEN__)
82 gpio_setup_t PJData;
83#endif
84#if STM32_HAS_GPIOK || defined(__DOXYGEN__)
85 gpio_setup_t PKData;
86#endif
87} gpio_config_t;
88
89/**
90 * @brief STM32 GPIO static initialization data.
91 */
92static const gpio_config_t gpio_default_config = {
93#if STM32_HAS_GPIOA
94 {VAL_GPIOA_MODER, VAL_GPIOA_OTYPER, VAL_GPIOA_OSPEEDR, VAL_GPIOA_PUPDR, VAL_GPIOA_ODR, VAL_GPIOA_AFRL, VAL_GPIOA_AFRH},
95#endif
96#if STM32_HAS_GPIOB
97 {VAL_GPIOB_MODER, VAL_GPIOB_OTYPER, VAL_GPIOB_OSPEEDR, VAL_GPIOB_PUPDR, VAL_GPIOB_ODR, VAL_GPIOB_AFRL, VAL_GPIOB_AFRH},
98#endif
99#if STM32_HAS_GPIOC
100 {VAL_GPIOC_MODER, VAL_GPIOC_OTYPER, VAL_GPIOC_OSPEEDR, VAL_GPIOC_PUPDR, VAL_GPIOC_ODR, VAL_GPIOC_AFRL, VAL_GPIOC_AFRH},
101#endif
102#if STM32_HAS_GPIOD
103 {VAL_GPIOD_MODER, VAL_GPIOD_OTYPER, VAL_GPIOD_OSPEEDR, VAL_GPIOD_PUPDR, VAL_GPIOD_ODR, VAL_GPIOD_AFRL, VAL_GPIOD_AFRH},
104#endif
105#if STM32_HAS_GPIOE
106 {VAL_GPIOE_MODER, VAL_GPIOE_OTYPER, VAL_GPIOE_OSPEEDR, VAL_GPIOE_PUPDR, VAL_GPIOE_ODR, VAL_GPIOE_AFRL, VAL_GPIOE_AFRH},
107#endif
108#if STM32_HAS_GPIOF
109 {VAL_GPIOF_MODER, VAL_GPIOF_OTYPER, VAL_GPIOF_OSPEEDR, VAL_GPIOF_PUPDR, VAL_GPIOF_ODR, VAL_GPIOF_AFRL, VAL_GPIOF_AFRH},
110#endif
111#if STM32_HAS_GPIOG
112 {VAL_GPIOG_MODER, VAL_GPIOG_OTYPER, VAL_GPIOG_OSPEEDR, VAL_GPIOG_PUPDR, VAL_GPIOG_ODR, VAL_GPIOG_AFRL, VAL_GPIOG_AFRH},
113#endif
114#if STM32_HAS_GPIOH
115 {VAL_GPIOH_MODER, VAL_GPIOH_OTYPER, VAL_GPIOH_OSPEEDR, VAL_GPIOH_PUPDR, VAL_GPIOH_ODR, VAL_GPIOH_AFRL, VAL_GPIOH_AFRH},
116#endif
117#if STM32_HAS_GPIOI
118 {VAL_GPIOI_MODER, VAL_GPIOI_OTYPER, VAL_GPIOI_OSPEEDR, VAL_GPIOI_PUPDR, VAL_GPIOI_ODR, VAL_GPIOI_AFRL, VAL_GPIOI_AFRH},
119#endif
120#if STM32_HAS_GPIOJ
121 {VAL_GPIOJ_MODER, VAL_GPIOJ_OTYPER, VAL_GPIOJ_OSPEEDR, VAL_GPIOJ_PUPDR, VAL_GPIOJ_ODR, VAL_GPIOJ_AFRL, VAL_GPIOJ_AFRH},
122#endif
123#if STM32_HAS_GPIOK
124 {VAL_GPIOK_MODER, VAL_GPIOK_OTYPER, VAL_GPIOK_OSPEEDR, VAL_GPIOK_PUPDR, VAL_GPIOK_ODR, VAL_GPIOK_AFRL, VAL_GPIOK_AFRH}
125#endif
126};
127
128/*===========================================================================*/
129/* Driver local functions. */
130/*===========================================================================*/
131
132static void gpio_init(stm32_gpio_t *gpiop, const gpio_setup_t *config) {
133 gpiop->OTYPER = config->otyper;
134 gpiop->OSPEEDR = config->ospeedr;
135 gpiop->PUPDR = config->pupdr;
136 gpiop->ODR = config->odr;
137 gpiop->AFRL = config->afrl;
138 gpiop->AFRH = config->afrh;
139 gpiop->MODER = config->moder;
140}
141
142static void stm32_gpio_init(void) {
143 /* Enabling GPIO-related clocks, the mask comes from the
144 registry header file.*/
145 rccResetAHB(STM32_GPIO_EN_MASK);
146 rccEnableAHB(STM32_GPIO_EN_MASK, true);
147
148 /* Initializing all the defined GPIO ports.*/
149#if STM32_HAS_GPIOA
150 gpio_init(GPIOA, &gpio_default_config.PAData);
151#endif
152#if STM32_HAS_GPIOB
153 gpio_init(GPIOB, &gpio_default_config.PBData);
154#endif
155#if STM32_HAS_GPIOC
156 gpio_init(GPIOC, &gpio_default_config.PCData);
157#endif
158#if STM32_HAS_GPIOD
159 gpio_init(GPIOD, &gpio_default_config.PDData);
160#endif
161#if STM32_HAS_GPIOE
162 gpio_init(GPIOE, &gpio_default_config.PEData);
163#endif
164#if STM32_HAS_GPIOF
165 gpio_init(GPIOF, &gpio_default_config.PFData);
166#endif
167#if STM32_HAS_GPIOG
168 gpio_init(GPIOG, &gpio_default_config.PGData);
169#endif
170#if STM32_HAS_GPIOH
171 gpio_init(GPIOH, &gpio_default_config.PHData);
172#endif
173#if STM32_HAS_GPIOI
174 gpio_init(GPIOI, &gpio_default_config.PIData);
175#endif
176#if STM32_HAS_GPIOJ
177 gpio_init(GPIOJ, &gpio_default_config.PJData);
178#endif
179#if STM32_HAS_GPIOK
180 gpio_init(GPIOK, &gpio_default_config.PKData);
181#endif
182}
183
184/*===========================================================================*/
185/* Driver interrupt handlers. */
186/*===========================================================================*/
187
188/*===========================================================================*/
189/* Driver exported functions. */
190/*===========================================================================*/
191
192__attribute__((weak)) void enter_bootloader_mode_if_requested(void) {}
193
194/**
195 * @brief Early initialization code.
196 * @details GPIO ports and system clocks are initialized before everything
197 * else.
198 */
199void __early_init(void) {
200 enter_bootloader_mode_if_requested();
201
202 stm32_gpio_init();
203 stm32_clock_init();
204}
205
206#if HAL_USE_SDC || defined(__DOXYGEN__)
207/**
208 * @brief SDC card detection.
209 */
210bool sdc_lld_is_card_inserted(SDCDriver *sdcp) {
211 (void)sdcp;
212 /* TODO: Fill the implementation.*/
213 return true;
214}
215
216/**
217 * @brief SDC card write protection detection.
218 */
219bool sdc_lld_is_write_protected(SDCDriver *sdcp) {
220 (void)sdcp;
221 /* TODO: Fill the implementation.*/
222 return false;
223}
224#endif /* HAL_USE_SDC */
225
226#if HAL_USE_MMC_SPI || defined(__DOXYGEN__)
227/**
228 * @brief MMC_SPI card detection.
229 */
230bool mmc_lld_is_card_inserted(MMCDriver *mmcp) {
231 (void)mmcp;
232 /* TODO: Fill the implementation.*/
233 return true;
234}
235
236/**
237 * @brief MMC_SPI card write protection detection.
238 */
239bool mmc_lld_is_write_protected(MMCDriver *mmcp) {
240 (void)mmcp;
241 /* TODO: Fill the implementation.*/
242 return false;
243}
244#endif
245
246/**
247 * @brief Board-specific initialization code.
248 * @todo Add your board-specific code, if any.
249 */
250void boardInit(void) {}
diff --git a/platforms/chibios/GENERIC_STM32_F072XB/board/board.h b/platforms/chibios/GENERIC_STM32_F072XB/board/board.h
deleted file mode 100644
index 87570e62d..000000000
--- a/platforms/chibios/GENERIC_STM32_F072XB/board/board.h
+++ /dev/null
@@ -1,407 +0,0 @@
1/*
2 ChibiOS - Copyright (C) 2006..2018 Giovanni Di Sirio
3
4 Licensed under the Apache License, Version 2.0 (the "License");
5 you may not use this file except in compliance with the License.
6 You may obtain a copy of the License at
7
8 http://www.apache.org/licenses/LICENSE-2.0
9
10 Unless required by applicable law or agreed to in writing, software
11 distributed under the License is distributed on an "AS IS" BASIS,
12 WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
13 See the License for the specific language governing permissions and
14 limitations under the License.
15*/
16
17/*
18 * This file has been automatically generated using ChibiStudio board
19 * generator plugin. Do not edit manually.
20 */
21
22#ifndef BOARD_H
23#define BOARD_H
24
25/*===========================================================================*/
26/* Driver constants. */
27/*===========================================================================*/
28
29/*
30 * Setup for Generic STM32_F072 Board
31 */
32
33/*
34 * Board identifier.
35 */
36#define BOARD_GENERIC_STM32_F072XB
37#define BOARD_NAME "STM32_F072"
38
39/*
40 * Board oscillators-related settings.
41 * NOTE: LSE not fitted.
42 * NOTE: HSE not fitted.
43 */
44#if !defined(STM32_LSECLK)
45# define STM32_LSECLK 0U
46#endif
47
48#define STM32_LSEDRV (3U << 3U)
49
50#if !defined(STM32_HSECLK)
51# define STM32_HSECLK 0U
52#endif
53
54#define STM32_HSE_BYPASS
55
56/*
57 * MCU type as defined in the ST header.
58 */
59#define STM32F072xB
60
61/*
62 * IO pins assignments.
63 */
64#define GPIOA_BUTTON 0U
65#define GPIOA_PIN1 1U
66#define GPIOA_PIN2 2U
67#define GPIOA_PIN3 3U
68#define GPIOA_PIN4 4U
69#define GPIOA_PIN5 5U
70#define GPIOA_PIN6 6U
71#define GPIOA_PIN7 7U
72#define GPIOA_PIN8 8U
73#define GPIOA_PIN9 9U
74#define GPIOA_PIN10 10U
75#define GPIOA_USB_DM 11U
76#define GPIOA_USB_DP 12U
77#define GPIOA_SWDIO 13U
78#define GPIOA_SWCLK 14U
79#define GPIOA_PIN15 15U
80
81#define GPIOB_PIN0 0U
82#define GPIOB_PIN1 1U
83#define GPIOB_PIN2 2U
84#define GPIOB_PIN3 3U
85#define GPIOB_PIN4 4U
86#define GPIOB_PIN5 5U
87#define GPIOB_PIN6 6U
88#define GPIOB_PIN7 7U
89#define GPIOB_PIN8 8U
90#define GPIOB_PIN9 9U
91#define GPIOB_PIN10 10U
92#define GPIOB_PIN11 11U
93#define GPIOB_PIN12 12U
94#define GPIOB_SPI2_SCK 13U
95#define GPIOB_SPI2_MISO 14U
96#define GPIOB_SPI2_MOSI 15U
97
98#define GPIOC_MEMS_CS 0U
99#define GPIOC_PIN1 1U
100#define GPIOC_PIN2 2U
101#define GPIOC_PIN3 3U
102#define GPIOC_PIN4 4U
103#define GPIOC_PIN5 5U
104#define GPIOC_LED_RED 6U
105#define GPIOC_LED_BLUE 7U
106#define GPIOC_LED_ORANGE 8U
107#define GPIOC_LED_GREEN 9U
108#define GPIOC_PIN10 10U
109#define GPIOC_PIN11 11U
110#define GPIOC_PIN12 12U
111#define GPIOC_PIN13 13U
112#define GPIOC_OSC32_IN 14U
113#define GPIOC_OSC32_OUT 15U
114
115#define GPIOD_PIN0 0U
116#define GPIOD_PIN1 1U
117#define GPIOD_PIN2 2U
118#define GPIOD_PIN3 3U
119#define GPIOD_PIN4 4U
120#define GPIOD_PIN5 5U
121#define GPIOD_PIN6 6U
122#define GPIOD_PIN7 7U
123#define GPIOD_PIN8 8U
124#define GPIOD_PIN9 9U
125#define GPIOD_PIN10 10U
126#define GPIOD_PIN11 11U
127#define GPIOD_PIN12 12U
128#define GPIOD_PIN13 13U
129#define GPIOD_PIN14 14U
130#define GPIOD_PIN15 15U
131
132#define GPIOE_PIN0 0U
133#define GPIOE_PIN1 1U
134#define GPIOE_PIN2 2U
135#define GPIOE_PIN3 3U
136#define GPIOE_PIN4 4U
137#define GPIOE_PIN5 5U
138#define GPIOE_PIN6 6U
139#define GPIOE_PIN7 7U
140#define GPIOE_PIN8 8U
141#define GPIOE_PIN9 9U
142#define GPIOE_PIN10 10U
143#define GPIOE_PIN11 11U
144#define GPIOE_PIN12 12U
145#define GPIOE_PIN13 13U
146#define GPIOE_PIN14 14U
147#define GPIOE_PIN15 15U
148
149#define GPIOF_OSC_IN 0U
150#define GPIOF_OSC_OUT 1U
151#define GPIOF_PIN2 2U
152#define GPIOF_PIN3 3U
153#define GPIOF_PIN4 4U
154#define GPIOF_PIN5 5U
155#define GPIOF_PIN6 6U
156#define GPIOF_PIN7 7U
157#define GPIOF_PIN8 8U
158#define GPIOF_PIN9 9U
159#define GPIOF_PIN10 10U
160#define GPIOF_PIN11 11U
161#define GPIOF_PIN12 12U
162#define GPIOF_PIN13 13U
163#define GPIOF_PIN14 14U
164#define GPIOF_PIN15 15U
165
166/*
167 * IO lines assignments.
168 */
169#define LINE_BUTTON PAL_LINE(GPIOA, 0U)
170#define LINE_USB_DM PAL_LINE(GPIOA, 11U)
171#define LINE_USB_DP PAL_LINE(GPIOA, 12U)
172#define LINE_SWDIO PAL_LINE(GPIOA, 13U)
173#define LINE_SWCLK PAL_LINE(GPIOA, 14U)
174#define LINE_SPI2_SCK PAL_LINE(GPIOB, 13U)
175#define LINE_SPI2_MISO PAL_LINE(GPIOB, 14U)
176#define LINE_SPI2_MOSI PAL_LINE(GPIOB, 15U)
177#define LINE_MEMS_CS PAL_LINE(GPIOC, 0U)
178#define LINE_LED_RED PAL_LINE(GPIOC, 6U)
179#define LINE_LED_BLUE PAL_LINE(GPIOC, 7U)
180#define LINE_LED_ORANGE PAL_LINE(GPIOC, 8U)
181#define LINE_LED_GREEN PAL_LINE(GPIOC, 9U)
182#define LINE_OSC32_IN PAL_LINE(GPIOC, 14U)
183#define LINE_OSC32_OUT PAL_LINE(GPIOC, 15U)
184#define LINE_OSC_IN PAL_LINE(GPIOF, 0U)
185#define LINE_OSC_OUT PAL_LINE(GPIOF, 1U)
186
187/*===========================================================================*/
188/* Driver pre-compile time settings. */
189/*===========================================================================*/
190
191/*===========================================================================*/
192/* Derived constants and error checks. */
193/*===========================================================================*/
194
195/*===========================================================================*/
196/* Driver data structures and types. */
197/*===========================================================================*/
198
199/*===========================================================================*/
200/* Driver macros. */
201/*===========================================================================*/
202
203/*
204 * I/O ports initial setup, this configuration is established soon after reset
205 * in the initialization code.
206 * Please refer to the STM32 Reference Manual for details.
207 */
208#define PIN_MODE_INPUT(n) (0U << ((n)*2U))
209#define PIN_MODE_OUTPUT(n) (1U << ((n)*2U))
210#define PIN_MODE_ALTERNATE(n) (2U << ((n)*2U))
211#define PIN_MODE_ANALOG(n) (3U << ((n)*2U))
212#define PIN_ODR_LOW(n) (0U << (n))
213#define PIN_ODR_HIGH(n) (1U << (n))
214#define PIN_OTYPE_PUSHPULL(n) (0U << (n))
215#define PIN_OTYPE_OPENDRAIN(n) (1U << (n))
216#define PIN_OSPEED_VERYLOW(n) (0U << ((n)*2U))
217#define PIN_OSPEED_LOW(n) (1U << ((n)*2U))
218#define PIN_OSPEED_MEDIUM(n) (2U << ((n)*2U))
219#define PIN_OSPEED_HIGH(n) (3U << ((n)*2U))
220#define PIN_PUPDR_FLOATING(n) (0U << ((n)*2U))
221#define PIN_PUPDR_PULLUP(n) (1U << ((n)*2U))
222#define PIN_PUPDR_PULLDOWN(n) (2U << ((n)*2U))
223#define PIN_AFIO_AF(n, v) ((v) << (((n) % 8U) * 4U))
224
225/*
226 * GPIOA setup:
227 *
228 * PA0 - BUTTON (input floating).
229 * PA1 - PIN1 (input pullup).
230 * PA2 - PIN2 (input pullup).
231 * PA3 - PIN3 (input pullup).
232 * PA4 - PIN4 (input pullup).
233 * PA5 - PIN5 (input pullup).
234 * PA6 - PIN6 (input pullup).
235 * PA7 - PIN7 (input pullup).
236 * PA8 - PIN8 (input pullup).
237 * PA9 - PIN9 (input pullup).
238 * PA10 - PIN10 (input pullup).
239 * PA11 - USB_DM (input floating).
240 * PA12 - USB_DP (input floating).
241 * PA13 - SWDIO (alternate 0).
242 * PA14 - SWCLK (alternate 0).
243 * PA15 - PIN15 (input pullup).
244 */
245#define VAL_GPIOA_MODER (PIN_MODE_INPUT(GPIOA_BUTTON) | PIN_MODE_INPUT(GPIOA_PIN1) | PIN_MODE_INPUT(GPIOA_PIN2) | PIN_MODE_INPUT(GPIOA_PIN3) | PIN_MODE_INPUT(GPIOA_PIN4) | PIN_MODE_INPUT(GPIOA_PIN5) | PIN_MODE_INPUT(GPIOA_PIN6) | PIN_MODE_INPUT(GPIOA_PIN7) | PIN_MODE_INPUT(GPIOA_PIN8) | PIN_MODE_INPUT(GPIOA_PIN9) | PIN_MODE_INPUT(GPIOA_PIN10) | PIN_MODE_INPUT(GPIOA_USB_DM) | PIN_MODE_INPUT(GPIOA_USB_DP) | PIN_MODE_ALTERNATE(GPIOA_SWDIO) | PIN_MODE_ALTERNATE(GPIOA_SWCLK) | PIN_MODE_INPUT(GPIOA_PIN15))
246#define VAL_GPIOA_OTYPER (PIN_OTYPE_PUSHPULL(GPIOA_BUTTON) | PIN_OTYPE_PUSHPULL(GPIOA_PIN1) | PIN_OTYPE_PUSHPULL(GPIOA_PIN2) | PIN_OTYPE_PUSHPULL(GPIOA_PIN3) | PIN_OTYPE_PUSHPULL(GPIOA_PIN4) | PIN_OTYPE_PUSHPULL(GPIOA_PIN5) | PIN_OTYPE_PUSHPULL(GPIOA_PIN6) | PIN_OTYPE_PUSHPULL(GPIOA_PIN7) | PIN_OTYPE_PUSHPULL(GPIOA_PIN8) | PIN_OTYPE_PUSHPULL(GPIOA_PIN9) | PIN_OTYPE_PUSHPULL(GPIOA_PIN10) | PIN_OTYPE_PUSHPULL(GPIOA_USB_DM) | PIN_OTYPE_PUSHPULL(GPIOA_USB_DP) | PIN_OTYPE_PUSHPULL(GPIOA_SWDIO) | PIN_OTYPE_PUSHPULL(GPIOA_SWCLK) | PIN_OTYPE_PUSHPULL(GPIOA_PIN15))
247#define VAL_GPIOA_OSPEEDR (PIN_OSPEED_VERYLOW(GPIOA_BUTTON) | PIN_OSPEED_VERYLOW(GPIOA_PIN1) | PIN_OSPEED_VERYLOW(GPIOA_PIN2) | PIN_OSPEED_VERYLOW(GPIOA_PIN3) | PIN_OSPEED_VERYLOW(GPIOA_PIN4) | PIN_OSPEED_VERYLOW(GPIOA_PIN5) | PIN_OSPEED_VERYLOW(GPIOA_PIN6) | PIN_OSPEED_VERYLOW(GPIOA_PIN7) | PIN_OSPEED_VERYLOW(GPIOA_PIN8) | PIN_OSPEED_VERYLOW(GPIOA_PIN9) | PIN_OSPEED_VERYLOW(GPIOA_PIN10) | PIN_OSPEED_VERYLOW(GPIOA_USB_DM) | PIN_OSPEED_VERYLOW(GPIOA_USB_DP) | PIN_OSPEED_HIGH(GPIOA_SWDIO) | PIN_OSPEED_HIGH(GPIOA_SWCLK) | PIN_OSPEED_HIGH(GPIOA_PIN15))
248#define VAL_GPIOA_PUPDR (PIN_PUPDR_FLOATING(GPIOA_BUTTON) | PIN_PUPDR_PULLUP(GPIOA_PIN1) | PIN_PUPDR_PULLUP(GPIOA_PIN2) | PIN_PUPDR_PULLUP(GPIOA_PIN3) | PIN_PUPDR_PULLUP(GPIOA_PIN4) | PIN_PUPDR_PULLUP(GPIOA_PIN5) | PIN_PUPDR_PULLUP(GPIOA_PIN6) | PIN_PUPDR_PULLUP(GPIOA_PIN7) | PIN_PUPDR_PULLUP(GPIOA_PIN8) | PIN_PUPDR_PULLUP(GPIOA_PIN9) | PIN_PUPDR_PULLUP(GPIOA_PIN10) | PIN_PUPDR_FLOATING(GPIOA_USB_DM) | PIN_PUPDR_FLOATING(GPIOA_USB_DP) | PIN_PUPDR_PULLUP(GPIOA_SWDIO) | PIN_PUPDR_PULLDOWN(GPIOA_SWCLK) | PIN_PUPDR_PULLUP(GPIOA_PIN15))
249#define VAL_GPIOA_ODR (PIN_ODR_HIGH(GPIOA_BUTTON) | PIN_ODR_HIGH(GPIOA_PIN1) | PIN_ODR_HIGH(GPIOA_PIN2) | PIN_ODR_HIGH(GPIOA_PIN3) | PIN_ODR_HIGH(GPIOA_PIN4) | PIN_ODR_HIGH(GPIOA_PIN5) | PIN_ODR_HIGH(GPIOA_PIN6) | PIN_ODR_HIGH(GPIOA_PIN7) | PIN_ODR_HIGH(GPIOA_PIN8) | PIN_ODR_HIGH(GPIOA_PIN9) | PIN_ODR_HIGH(GPIOA_PIN10) | PIN_ODR_HIGH(GPIOA_USB_DM) | PIN_ODR_HIGH(GPIOA_USB_DP) | PIN_ODR_HIGH(GPIOA_SWDIO) | PIN_ODR_HIGH(GPIOA_SWCLK) | PIN_ODR_HIGH(GPIOA_PIN15))
250#define VAL_GPIOA_AFRL (PIN_AFIO_AF(GPIOA_BUTTON, 0U) | PIN_AFIO_AF(GPIOA_PIN1, 0U) | PIN_AFIO_AF(GPIOA_PIN2, 0U) | PIN_AFIO_AF(GPIOA_PIN3, 0U) | PIN_AFIO_AF(GPIOA_PIN4, 0U) | PIN_AFIO_AF(GPIOA_PIN5, 0U) | PIN_AFIO_AF(GPIOA_PIN6, 0U) | PIN_AFIO_AF(GPIOA_PIN7, 0U))
251#define VAL_GPIOA_AFRH (PIN_AFIO_AF(GPIOA_PIN8, 0U) | PIN_AFIO_AF(GPIOA_PIN9, 0U) | PIN_AFIO_AF(GPIOA_PIN10, 0U) | PIN_AFIO_AF(GPIOA_USB_DM, 0U) | PIN_AFIO_AF(GPIOA_USB_DP, 0U) | PIN_AFIO_AF(GPIOA_SWDIO, 0U) | PIN_AFIO_AF(GPIOA_SWCLK, 0U) | PIN_AFIO_AF(GPIOA_PIN15, 0U))
252
253/*
254 * GPIOB setup:
255 *
256 * PB0 - PIN0 (input pullup).
257 * PB1 - PIN1 (input pullup).
258 * PB2 - PIN2 (input pullup).
259 * PB3 - PIN3 (input pullup).
260 * PB4 - PIN4 (input pullup).
261 * PB5 - PIN5 (input pullup).
262 * PB6 - PIN6 (input pullup).
263 * PB7 - PIN7 (input pullup).
264 * PB8 - PIN8 (input pullup).
265 * PB9 - PIN9 (input pullup).
266 * PB10 - PIN10 (input pullup).
267 * PB11 - PIN11 (input pullup).
268 * PB12 - PIN12 (input pullup).
269 * PB13 - SPI2_SCK (alternate 0).
270 * PB14 - SPI2_MISO (alternate 0).
271 * PB15 - SPI2_MOSI (alternate 0).
272 */
273#define VAL_GPIOB_MODER (PIN_MODE_INPUT(GPIOB_PIN0) | PIN_MODE_INPUT(GPIOB_PIN1) | PIN_MODE_INPUT(GPIOB_PIN2) | PIN_MODE_INPUT(GPIOB_PIN3) | PIN_MODE_INPUT(GPIOB_PIN4) | PIN_MODE_INPUT(GPIOB_PIN5) | PIN_MODE_INPUT(GPIOB_PIN6) | PIN_MODE_INPUT(GPIOB_PIN7) | PIN_MODE_INPUT(GPIOB_PIN8) | PIN_MODE_INPUT(GPIOB_PIN9) | PIN_MODE_INPUT(GPIOB_PIN10) | PIN_MODE_INPUT(GPIOB_PIN11) | PIN_MODE_INPUT(GPIOB_PIN12) | PIN_MODE_ALTERNATE(GPIOB_SPI2_SCK) | PIN_MODE_ALTERNATE(GPIOB_SPI2_MISO) | PIN_MODE_ALTERNATE(GPIOB_SPI2_MOSI))
274#define VAL_GPIOB_OTYPER (PIN_OTYPE_PUSHPULL(GPIOB_PIN0) | PIN_OTYPE_PUSHPULL(GPIOB_PIN1) | PIN_OTYPE_PUSHPULL(GPIOB_PIN2) | PIN_OTYPE_PUSHPULL(GPIOB_PIN3) | PIN_OTYPE_PUSHPULL(GPIOB_PIN4) | PIN_OTYPE_PUSHPULL(GPIOB_PIN5) | PIN_OTYPE_PUSHPULL(GPIOB_PIN6) | PIN_OTYPE_PUSHPULL(GPIOB_PIN7) | PIN_OTYPE_PUSHPULL(GPIOB_PIN8) | PIN_OTYPE_PUSHPULL(GPIOB_PIN9) | PIN_OTYPE_PUSHPULL(GPIOB_PIN10) | PIN_OTYPE_PUSHPULL(GPIOB_PIN11) | PIN_OTYPE_PUSHPULL(GPIOB_PIN12) | PIN_OTYPE_PUSHPULL(GPIOB_SPI2_SCK) | PIN_OTYPE_PUSHPULL(GPIOB_SPI2_MISO) | PIN_OTYPE_PUSHPULL(GPIOB_SPI2_MOSI))
275#define VAL_GPIOB_OSPEEDR (PIN_OSPEED_VERYLOW(GPIOB_PIN0) | PIN_OSPEED_VERYLOW(GPIOB_PIN1) | PIN_OSPEED_HIGH(GPIOB_PIN2) | PIN_OSPEED_HIGH(GPIOB_PIN3) | PIN_OSPEED_HIGH(GPIOB_PIN4) | PIN_OSPEED_VERYLOW(GPIOB_PIN5) | PIN_OSPEED_VERYLOW(GPIOB_PIN6) | PIN_OSPEED_VERYLOW(GPIOB_PIN7) | PIN_OSPEED_VERYLOW(GPIOB_PIN8) | PIN_OSPEED_VERYLOW(GPIOB_PIN9) | PIN_OSPEED_VERYLOW(GPIOB_PIN10) | PIN_OSPEED_VERYLOW(GPIOB_PIN11) | PIN_OSPEED_VERYLOW(GPIOB_PIN12) | PIN_OSPEED_VERYLOW(GPIOB_SPI2_SCK) | PIN_OSPEED_VERYLOW(GPIOB_SPI2_MISO) | PIN_OSPEED_VERYLOW(GPIOB_SPI2_MOSI))
276#define VAL_GPIOB_PUPDR (PIN_PUPDR_PULLUP(GPIOB_PIN0) | PIN_PUPDR_PULLUP(GPIOB_PIN1) | PIN_PUPDR_PULLUP(GPIOB_PIN2) | PIN_PUPDR_PULLUP(GPIOB_PIN3) | PIN_PUPDR_PULLUP(GPIOB_PIN4) | PIN_PUPDR_PULLUP(GPIOB_PIN5) | PIN_PUPDR_PULLUP(GPIOB_PIN6) | PIN_PUPDR_PULLUP(GPIOB_PIN7) | PIN_PUPDR_PULLUP(GPIOB_PIN8) | PIN_PUPDR_PULLUP(GPIOB_PIN9) | PIN_PUPDR_PULLUP(GPIOB_PIN10) | PIN_PUPDR_PULLUP(GPIOB_PIN11) | PIN_PUPDR_PULLUP(GPIOB_PIN12) | PIN_PUPDR_FLOATING(GPIOB_SPI2_SCK) | PIN_PUPDR_FLOATING(GPIOB_SPI2_MISO) | PIN_PUPDR_FLOATING(GPIOB_SPI2_MOSI))
277#define VAL_GPIOB_ODR (PIN_ODR_HIGH(GPIOB_PIN0) | PIN_ODR_HIGH(GPIOB_PIN1) | PIN_ODR_HIGH(GPIOB_PIN2) | PIN_ODR_HIGH(GPIOB_PIN3) | PIN_ODR_HIGH(GPIOB_PIN4) | PIN_ODR_HIGH(GPIOB_PIN5) | PIN_ODR_HIGH(GPIOB_PIN6) | PIN_ODR_HIGH(GPIOB_PIN7) | PIN_ODR_HIGH(GPIOB_PIN8) | PIN_ODR_HIGH(GPIOB_PIN9) | PIN_ODR_HIGH(GPIOB_PIN10) | PIN_ODR_HIGH(GPIOB_PIN11) | PIN_ODR_HIGH(GPIOB_PIN12) | PIN_ODR_HIGH(GPIOB_SPI2_SCK) | PIN_ODR_HIGH(GPIOB_SPI2_MISO) | PIN_ODR_HIGH(GPIOB_SPI2_MOSI))
278#define VAL_GPIOB_AFRL (PIN_AFIO_AF(GPIOB_PIN0, 0U) | PIN_AFIO_AF(GPIOB_PIN1, 0U) | PIN_AFIO_AF(GPIOB_PIN2, 0U) | PIN_AFIO_AF(GPIOB_PIN3, 0U) | PIN_AFIO_AF(GPIOB_PIN4, 0U) | PIN_AFIO_AF(GPIOB_PIN5, 0U) | PIN_AFIO_AF(GPIOB_PIN6, 0U) | PIN_AFIO_AF(GPIOB_PIN7, 0U))
279#define VAL_GPIOB_AFRH (PIN_AFIO_AF(GPIOB_PIN8, 0U) | PIN_AFIO_AF(GPIOB_PIN9, 0U) | PIN_AFIO_AF(GPIOB_PIN10, 0U) | PIN_AFIO_AF(GPIOB_PIN11, 0U) | PIN_AFIO_AF(GPIOB_PIN12, 0U) | PIN_AFIO_AF(GPIOB_SPI2_SCK, 0U) | PIN_AFIO_AF(GPIOB_SPI2_MISO, 0U) | PIN_AFIO_AF(GPIOB_SPI2_MOSI, 0U))
280
281/*
282 * GPIOC setup:
283 *
284 * PC0 - MEMS_CS (output pushpull maximum).
285 * PC1 - PIN1 (input pullup).
286 * PC2 - PIN2 (input pullup).
287 * PC3 - PIN3 (input pullup).
288 * PC4 - PIN4 (input pullup).
289 * PC5 - PIN5 (input pullup).
290 * PC6 - LED_RED (output pushpull maximum).
291 * PC7 - LED_BLUE (output pushpull maximum).
292 * PC8 - LED_ORANGE (output pushpull maximum).
293 * PC9 - LED_GREEN (output pushpull maximum).
294 * PC10 - PIN10 (input pullup).
295 * PC11 - PIN11 (input pullup).
296 * PC12 - PIN12 (input pullup).
297 * PC13 - PIN13 (input pullup).
298 * PC14 - OSC32_IN (input floating).
299 * PC15 - OSC32_OUT (input floating).
300 */
301#define VAL_GPIOC_MODER (PIN_MODE_OUTPUT(GPIOC_MEMS_CS) | PIN_MODE_INPUT(GPIOC_PIN1) | PIN_MODE_INPUT(GPIOC_PIN2) | PIN_MODE_INPUT(GPIOC_PIN3) | PIN_MODE_INPUT(GPIOC_PIN4) | PIN_MODE_INPUT(GPIOC_PIN5) | PIN_MODE_OUTPUT(GPIOC_LED_RED) | PIN_MODE_OUTPUT(GPIOC_LED_BLUE) | PIN_MODE_OUTPUT(GPIOC_LED_ORANGE) | PIN_MODE_OUTPUT(GPIOC_LED_GREEN) | PIN_MODE_INPUT(GPIOC_PIN10) | PIN_MODE_INPUT(GPIOC_PIN11) | PIN_MODE_INPUT(GPIOC_PIN12) | PIN_MODE_INPUT(GPIOC_PIN13) | PIN_MODE_INPUT(GPIOC_OSC32_IN) | PIN_MODE_INPUT(GPIOC_OSC32_OUT))
302#define VAL_GPIOC_OTYPER (PIN_OTYPE_PUSHPULL(GPIOC_MEMS_CS) | PIN_OTYPE_PUSHPULL(GPIOC_PIN1) | PIN_OTYPE_PUSHPULL(GPIOC_PIN2) | PIN_OTYPE_PUSHPULL(GPIOC_PIN3) | PIN_OTYPE_PUSHPULL(GPIOC_PIN4) | PIN_OTYPE_PUSHPULL(GPIOC_PIN5) | PIN_OTYPE_PUSHPULL(GPIOC_LED_RED) | PIN_OTYPE_PUSHPULL(GPIOC_LED_BLUE) | PIN_OTYPE_PUSHPULL(GPIOC_LED_ORANGE) | PIN_OTYPE_PUSHPULL(GPIOC_LED_GREEN) | PIN_OTYPE_PUSHPULL(GPIOC_PIN10) | PIN_OTYPE_PUSHPULL(GPIOC_PIN11) | PIN_OTYPE_PUSHPULL(GPIOC_PIN12) | PIN_OTYPE_PUSHPULL(GPIOC_PIN13) | PIN_OTYPE_PUSHPULL(GPIOC_OSC32_IN) | PIN_OTYPE_PUSHPULL(GPIOC_OSC32_OUT))
303#define VAL_GPIOC_OSPEEDR (PIN_OSPEED_HIGH(GPIOC_MEMS_CS) | PIN_OSPEED_VERYLOW(GPIOC_PIN1) | PIN_OSPEED_VERYLOW(GPIOC_PIN2) | PIN_OSPEED_VERYLOW(GPIOC_PIN3) | PIN_OSPEED_VERYLOW(GPIOC_PIN4) | PIN_OSPEED_VERYLOW(GPIOC_PIN5) | PIN_OSPEED_HIGH(GPIOC_LED_RED) | PIN_OSPEED_HIGH(GPIOC_LED_BLUE) | PIN_OSPEED_HIGH(GPIOC_LED_ORANGE) | PIN_OSPEED_HIGH(GPIOC_LED_GREEN) | PIN_OSPEED_VERYLOW(GPIOC_PIN10) | PIN_OSPEED_VERYLOW(GPIOC_PIN11) | PIN_OSPEED_VERYLOW(GPIOC_PIN12) | PIN_OSPEED_VERYLOW(GPIOC_PIN13) | PIN_OSPEED_HIGH(GPIOC_OSC32_IN) | PIN_OSPEED_HIGH(GPIOC_OSC32_OUT))
304#define VAL_GPIOC_PUPDR (PIN_PUPDR_FLOATING(GPIOC_MEMS_CS) | PIN_PUPDR_PULLUP(GPIOC_PIN1) | PIN_PUPDR_PULLUP(GPIOC_PIN2) | PIN_PUPDR_PULLUP(GPIOC_PIN3) | PIN_PUPDR_PULLUP(GPIOC_PIN4) | PIN_PUPDR_PULLUP(GPIOC_PIN5) | PIN_PUPDR_FLOATING(GPIOC_LED_RED) | PIN_PUPDR_FLOATING(GPIOC_LED_BLUE) | PIN_PUPDR_FLOATING(GPIOC_LED_ORANGE) | PIN_PUPDR_FLOATING(GPIOC_LED_GREEN) | PIN_PUPDR_PULLUP(GPIOC_PIN10) | PIN_PUPDR_PULLUP(GPIOC_PIN11) | PIN_PUPDR_PULLUP(GPIOC_PIN12) | PIN_PUPDR_PULLUP(GPIOC_PIN13) | PIN_PUPDR_FLOATING(GPIOC_OSC32_IN) | PIN_PUPDR_FLOATING(GPIOC_OSC32_OUT))
305#define VAL_GPIOC_ODR (PIN_ODR_HIGH(GPIOC_MEMS_CS) | PIN_ODR_HIGH(GPIOC_PIN1) | PIN_ODR_HIGH(GPIOC_PIN2) | PIN_ODR_HIGH(GPIOC_PIN3) | PIN_ODR_HIGH(GPIOC_PIN4) | PIN_ODR_HIGH(GPIOC_PIN5) | PIN_ODR_LOW(GPIOC_LED_RED) | PIN_ODR_LOW(GPIOC_LED_BLUE) | PIN_ODR_LOW(GPIOC_LED_ORANGE) | PIN_ODR_LOW(GPIOC_LED_GREEN) | PIN_ODR_HIGH(GPIOC_PIN10) | PIN_ODR_HIGH(GPIOC_PIN11) | PIN_ODR_HIGH(GPIOC_PIN12) | PIN_ODR_HIGH(GPIOC_PIN13) | PIN_ODR_HIGH(GPIOC_OSC32_IN) | PIN_ODR_HIGH(GPIOC_OSC32_OUT))
306#define VAL_GPIOC_AFRL (PIN_AFIO_AF(GPIOC_MEMS_CS, 0U) | PIN_AFIO_AF(GPIOC_PIN1, 0U) | PIN_AFIO_AF(GPIOC_PIN2, 0U) | PIN_AFIO_AF(GPIOC_PIN3, 0U) | PIN_AFIO_AF(GPIOC_PIN4, 0U) | PIN_AFIO_AF(GPIOC_PIN5, 0U) | PIN_AFIO_AF(GPIOC_LED_RED, 0U) | PIN_AFIO_AF(GPIOC_LED_BLUE, 0U))
307#define VAL_GPIOC_AFRH (PIN_AFIO_AF(GPIOC_LED_ORANGE, 0U) | PIN_AFIO_AF(GPIOC_LED_GREEN, 0U) | PIN_AFIO_AF(GPIOC_PIN10, 0U) | PIN_AFIO_AF(GPIOC_PIN11, 0U) | PIN_AFIO_AF(GPIOC_PIN12, 0U) | PIN_AFIO_AF(GPIOC_PIN13, 0U) | PIN_AFIO_AF(GPIOC_OSC32_IN, 0U) | PIN_AFIO_AF(GPIOC_OSC32_OUT, 0U))
308
309/*
310 * GPIOD setup:
311 *
312 * PD0 - PIN0 (input pullup).
313 * PD1 - PIN1 (input pullup).
314 * PD2 - PIN2 (input pullup).
315 * PD3 - PIN3 (input pullup).
316 * PD4 - PIN4 (input pullup).
317 * PD5 - PIN5 (input pullup).
318 * PD6 - PIN6 (input pullup).
319 * PD7 - PIN7 (input pullup).
320 * PD8 - PIN8 (input pullup).
321 * PD9 - PIN9 (input pullup).
322 * PD10 - PIN10 (input pullup).
323 * PD11 - PIN11 (input pullup).
324 * PD12 - PIN12 (input pullup).
325 * PD13 - PIN13 (input pullup).
326 * PD14 - PIN14 (input pullup).
327 * PD15 - PIN15 (input pullup).
328 */
329#define VAL_GPIOD_MODER (PIN_MODE_INPUT(GPIOD_PIN0) | PIN_MODE_INPUT(GPIOD_PIN1) | PIN_MODE_INPUT(GPIOD_PIN2) | PIN_MODE_INPUT(GPIOD_PIN3) | PIN_MODE_INPUT(GPIOD_PIN4) | PIN_MODE_INPUT(GPIOD_PIN5) | PIN_MODE_INPUT(GPIOD_PIN6) | PIN_MODE_INPUT(GPIOD_PIN7) | PIN_MODE_INPUT(GPIOD_PIN8) | PIN_MODE_INPUT(GPIOD_PIN9) | PIN_MODE_INPUT(GPIOD_PIN10) | PIN_MODE_INPUT(GPIOD_PIN11) | PIN_MODE_INPUT(GPIOD_PIN12) | PIN_MODE_INPUT(GPIOD_PIN13) | PIN_MODE_INPUT(GPIOD_PIN14) | PIN_MODE_INPUT(GPIOD_PIN15))
330#define VAL_GPIOD_OTYPER (PIN_OTYPE_PUSHPULL(GPIOD_PIN0) | PIN_OTYPE_PUSHPULL(GPIOD_PIN1) | PIN_OTYPE_PUSHPULL(GPIOD_PIN2) | PIN_OTYPE_PUSHPULL(GPIOD_PIN3) | PIN_OTYPE_PUSHPULL(GPIOD_PIN4) | PIN_OTYPE_PUSHPULL(GPIOD_PIN5) | PIN_OTYPE_PUSHPULL(GPIOD_PIN6) | PIN_OTYPE_PUSHPULL(GPIOD_PIN7) | PIN_OTYPE_PUSHPULL(GPIOD_PIN8) | PIN_OTYPE_PUSHPULL(GPIOD_PIN9) | PIN_OTYPE_PUSHPULL(GPIOD_PIN10) | PIN_OTYPE_PUSHPULL(GPIOD_PIN11) | PIN_OTYPE_PUSHPULL(GPIOD_PIN12) | PIN_OTYPE_PUSHPULL(GPIOD_PIN13) | PIN_OTYPE_PUSHPULL(GPIOD_PIN14) | PIN_OTYPE_PUSHPULL(GPIOD_PIN15))
331#define VAL_GPIOD_OSPEEDR (PIN_OSPEED_VERYLOW(GPIOD_PIN0) | PIN_OSPEED_VERYLOW(GPIOD_PIN1) | PIN_OSPEED_VERYLOW(GPIOD_PIN2) | PIN_OSPEED_VERYLOW(GPIOD_PIN3) | PIN_OSPEED_VERYLOW(GPIOD_PIN4) | PIN_OSPEED_VERYLOW(GPIOD_PIN5) | PIN_OSPEED_VERYLOW(GPIOD_PIN6) | PIN_OSPEED_VERYLOW(GPIOD_PIN7) | PIN_OSPEED_VERYLOW(GPIOD_PIN8) | PIN_OSPEED_VERYLOW(GPIOD_PIN9) | PIN_OSPEED_VERYLOW(GPIOD_PIN10) | PIN_OSPEED_VERYLOW(GPIOD_PIN11) | PIN_OSPEED_VERYLOW(GPIOD_PIN12) | PIN_OSPEED_VERYLOW(GPIOD_PIN13) | PIN_OSPEED_VERYLOW(GPIOD_PIN14) | PIN_OSPEED_VERYLOW(GPIOD_PIN15))
332#define VAL_GPIOD_PUPDR (PIN_PUPDR_PULLUP(GPIOD_PIN0) | PIN_PUPDR_PULLUP(GPIOD_PIN1) | PIN_PUPDR_PULLUP(GPIOD_PIN2) | PIN_PUPDR_PULLUP(GPIOD_PIN3) | PIN_PUPDR_PULLUP(GPIOD_PIN4) | PIN_PUPDR_PULLUP(GPIOD_PIN5) | PIN_PUPDR_PULLUP(GPIOD_PIN6) | PIN_PUPDR_PULLUP(GPIOD_PIN7) | PIN_PUPDR_PULLUP(GPIOD_PIN8) | PIN_PUPDR_PULLUP(GPIOD_PIN9) | PIN_PUPDR_PULLUP(GPIOD_PIN10) | PIN_PUPDR_PULLUP(GPIOD_PIN11) | PIN_PUPDR_PULLUP(GPIOD_PIN12) | PIN_PUPDR_PULLUP(GPIOD_PIN13) | PIN_PUPDR_PULLUP(GPIOD_PIN14) | PIN_PUPDR_PULLUP(GPIOD_PIN15))
333#define VAL_GPIOD_ODR (PIN_ODR_HIGH(GPIOD_PIN0) | PIN_ODR_HIGH(GPIOD_PIN1) | PIN_ODR_HIGH(GPIOD_PIN2) | PIN_ODR_HIGH(GPIOD_PIN3) | PIN_ODR_HIGH(GPIOD_PIN4) | PIN_ODR_HIGH(GPIOD_PIN5) | PIN_ODR_HIGH(GPIOD_PIN6) | PIN_ODR_HIGH(GPIOD_PIN7) | PIN_ODR_HIGH(GPIOD_PIN8) | PIN_ODR_HIGH(GPIOD_PIN9) | PIN_ODR_HIGH(GPIOD_PIN10) | PIN_ODR_HIGH(GPIOD_PIN11) | PIN_ODR_HIGH(GPIOD_PIN12) | PIN_ODR_HIGH(GPIOD_PIN13) | PIN_ODR_HIGH(GPIOD_PIN14) | PIN_ODR_HIGH(GPIOD_PIN15))
334#define VAL_GPIOD_AFRL (PIN_AFIO_AF(GPIOD_PIN0, 0U) | PIN_AFIO_AF(GPIOD_PIN1, 0U) | PIN_AFIO_AF(GPIOD_PIN2, 0U) | PIN_AFIO_AF(GPIOD_PIN3, 0U) | PIN_AFIO_AF(GPIOD_PIN4, 0U) | PIN_AFIO_AF(GPIOD_PIN5, 0U) | PIN_AFIO_AF(GPIOD_PIN6, 0U) | PIN_AFIO_AF(GPIOD_PIN7, 0U))
335#define VAL_GPIOD_AFRH (PIN_AFIO_AF(GPIOD_PIN8, 0U) | PIN_AFIO_AF(GPIOD_PIN9, 0U) | PIN_AFIO_AF(GPIOD_PIN10, 0U) | PIN_AFIO_AF(GPIOD_PIN11, 0U) | PIN_AFIO_AF(GPIOD_PIN12, 0U) | PIN_AFIO_AF(GPIOD_PIN13, 0U) | PIN_AFIO_AF(GPIOD_PIN14, 0U) | PIN_AFIO_AF(GPIOD_PIN15, 0U))
336
337/*
338 * GPIOE setup:
339 *
340 * PE0 - PIN0 (input pullup).
341 * PE1 - PIN1 (input pullup).
342 * PE2 - PIN2 (input pullup).
343 * PE3 - PIN3 (input pullup).
344 * PE4 - PIN4 (input pullup).
345 * PE5 - PIN5 (input pullup).
346 * PE6 - PIN6 (input pullup).
347 * PE7 - PIN7 (input pullup).
348 * PE8 - PIN8 (input pullup).
349 * PE9 - PIN9 (input pullup).
350 * PE10 - PIN10 (input pullup).
351 * PE11 - PIN11 (input pullup).
352 * PE12 - PIN12 (input pullup).
353 * PE13 - PIN13 (input pullup).
354 * PE14 - PIN14 (input pullup).
355 * PE15 - PIN15 (input pullup).
356 */
357#define VAL_GPIOE_MODER (PIN_MODE_INPUT(GPIOE_PIN0) | PIN_MODE_INPUT(GPIOE_PIN1) | PIN_MODE_INPUT(GPIOE_PIN2) | PIN_MODE_INPUT(GPIOE_PIN3) | PIN_MODE_INPUT(GPIOE_PIN4) | PIN_MODE_INPUT(GPIOE_PIN5) | PIN_MODE_INPUT(GPIOE_PIN6) | PIN_MODE_INPUT(GPIOE_PIN7) | PIN_MODE_INPUT(GPIOE_PIN8) | PIN_MODE_INPUT(GPIOE_PIN9) | PIN_MODE_INPUT(GPIOE_PIN10) | PIN_MODE_INPUT(GPIOE_PIN11) | PIN_MODE_INPUT(GPIOE_PIN12) | PIN_MODE_INPUT(GPIOE_PIN13) | PIN_MODE_INPUT(GPIOE_PIN14) | PIN_MODE_INPUT(GPIOE_PIN15))
358#define VAL_GPIOE_OTYPER (PIN_OTYPE_PUSHPULL(GPIOE_PIN0) | PIN_OTYPE_PUSHPULL(GPIOE_PIN1) | PIN_OTYPE_PUSHPULL(GPIOE_PIN2) | PIN_OTYPE_PUSHPULL(GPIOE_PIN3) | PIN_OTYPE_PUSHPULL(GPIOE_PIN4) | PIN_OTYPE_PUSHPULL(GPIOE_PIN5) | PIN_OTYPE_PUSHPULL(GPIOE_PIN6) | PIN_OTYPE_PUSHPULL(GPIOE_PIN7) | PIN_OTYPE_PUSHPULL(GPIOE_PIN8) | PIN_OTYPE_PUSHPULL(GPIOE_PIN9) | PIN_OTYPE_PUSHPULL(GPIOE_PIN10) | PIN_OTYPE_PUSHPULL(GPIOE_PIN11) | PIN_OTYPE_PUSHPULL(GPIOE_PIN12) | PIN_OTYPE_PUSHPULL(GPIOE_PIN13) | PIN_OTYPE_PUSHPULL(GPIOE_PIN14) | PIN_OTYPE_PUSHPULL(GPIOE_PIN15))
359#define VAL_GPIOE_OSPEEDR (PIN_OSPEED_VERYLOW(GPIOE_PIN0) | PIN_OSPEED_VERYLOW(GPIOE_PIN1) | PIN_OSPEED_VERYLOW(GPIOE_PIN2) | PIN_OSPEED_VERYLOW(GPIOE_PIN3) | PIN_OSPEED_VERYLOW(GPIOE_PIN4) | PIN_OSPEED_VERYLOW(GPIOE_PIN5) | PIN_OSPEED_VERYLOW(GPIOE_PIN6) | PIN_OSPEED_VERYLOW(GPIOE_PIN7) | PIN_OSPEED_VERYLOW(GPIOE_PIN8) | PIN_OSPEED_VERYLOW(GPIOE_PIN9) | PIN_OSPEED_VERYLOW(GPIOE_PIN10) | PIN_OSPEED_VERYLOW(GPIOE_PIN11) | PIN_OSPEED_VERYLOW(GPIOE_PIN12) | PIN_OSPEED_VERYLOW(GPIOE_PIN13) | PIN_OSPEED_VERYLOW(GPIOE_PIN14) | PIN_OSPEED_VERYLOW(GPIOE_PIN15))
360#define VAL_GPIOE_PUPDR (PIN_PUPDR_PULLUP(GPIOE_PIN0) | PIN_PUPDR_PULLUP(GPIOE_PIN1) | PIN_PUPDR_PULLUP(GPIOE_PIN2) | PIN_PUPDR_PULLUP(GPIOE_PIN3) | PIN_PUPDR_PULLUP(GPIOE_PIN4) | PIN_PUPDR_PULLUP(GPIOE_PIN5) | PIN_PUPDR_PULLUP(GPIOE_PIN6) | PIN_PUPDR_PULLUP(GPIOE_PIN7) | PIN_PUPDR_PULLUP(GPIOE_PIN8) | PIN_PUPDR_PULLUP(GPIOE_PIN9) | PIN_PUPDR_PULLUP(GPIOE_PIN10) | PIN_PUPDR_PULLUP(GPIOE_PIN11) | PIN_PUPDR_PULLUP(GPIOE_PIN12) | PIN_PUPDR_PULLUP(GPIOE_PIN13) | PIN_PUPDR_PULLUP(GPIOE_PIN14) | PIN_PUPDR_PULLUP(GPIOE_PIN15))
361#define VAL_GPIOE_ODR (PIN_ODR_HIGH(GPIOE_PIN0) | PIN_ODR_HIGH(GPIOE_PIN1) | PIN_ODR_HIGH(GPIOE_PIN2) | PIN_ODR_HIGH(GPIOE_PIN3) | PIN_ODR_HIGH(GPIOE_PIN4) | PIN_ODR_HIGH(GPIOE_PIN5) | PIN_ODR_HIGH(GPIOE_PIN6) | PIN_ODR_HIGH(GPIOE_PIN7) | PIN_ODR_HIGH(GPIOE_PIN8) | PIN_ODR_HIGH(GPIOE_PIN9) | PIN_ODR_HIGH(GPIOE_PIN10) | PIN_ODR_HIGH(GPIOE_PIN11) | PIN_ODR_HIGH(GPIOE_PIN12) | PIN_ODR_HIGH(GPIOE_PIN13) | PIN_ODR_HIGH(GPIOE_PIN14) | PIN_ODR_HIGH(GPIOE_PIN15))
362#define VAL_GPIOE_AFRL (PIN_AFIO_AF(GPIOE_PIN0, 0U) | PIN_AFIO_AF(GPIOE_PIN1, 0U) | PIN_AFIO_AF(GPIOE_PIN2, 0U) | PIN_AFIO_AF(GPIOE_PIN3, 0U) | PIN_AFIO_AF(GPIOE_PIN4, 0U) | PIN_AFIO_AF(GPIOE_PIN5, 0U) | PIN_AFIO_AF(GPIOE_PIN6, 0U) | PIN_AFIO_AF(GPIOE_PIN7, 0U))
363#define VAL_GPIOE_AFRH (PIN_AFIO_AF(GPIOE_PIN8, 0U) | PIN_AFIO_AF(GPIOE_PIN9, 0U) | PIN_AFIO_AF(GPIOE_PIN10, 0U) | PIN_AFIO_AF(GPIOE_PIN11, 0U) | PIN_AFIO_AF(GPIOE_PIN12, 0U) | PIN_AFIO_AF(GPIOE_PIN13, 0U) | PIN_AFIO_AF(GPIOE_PIN14, 0U) | PIN_AFIO_AF(GPIOE_PIN15, 0U))
364
365/*
366 * GPIOF setup:
367 *
368 * PF0 - OSC_IN (input floating).
369 * PF1 - OSC_OUT (input floating).
370 * PF2 - PIN2 (input pullup).
371 * PF3 - PIN3 (input pullup).
372 * PF4 - PIN4 (input pullup).
373 * PF5 - PIN5 (input pullup).
374 * PF6 - PIN6 (input pullup).
375 * PF7 - PIN7 (input pullup).
376 * PF8 - PIN8 (input pullup).
377 * PF9 - PIN9 (input pullup).
378 * PF10 - PIN10 (input pullup).
379 * PF11 - PIN11 (input pullup).
380 * PF12 - PIN12 (input pullup).
381 * PF13 - PIN13 (input pullup).
382 * PF14 - PIN14 (input pullup).
383 * PF15 - PIN15 (input pullup).
384 */
385#define VAL_GPIOF_MODER (PIN_MODE_INPUT(GPIOF_OSC_IN) | PIN_MODE_INPUT(GPIOF_OSC_OUT) | PIN_MODE_INPUT(GPIOF_PIN2) | PIN_MODE_INPUT(GPIOF_PIN3) | PIN_MODE_INPUT(GPIOF_PIN4) | PIN_MODE_INPUT(GPIOF_PIN5) | PIN_MODE_INPUT(GPIOF_PIN6) | PIN_MODE_INPUT(GPIOF_PIN7) | PIN_MODE_INPUT(GPIOF_PIN8) | PIN_MODE_INPUT(GPIOF_PIN9) | PIN_MODE_INPUT(GPIOF_PIN10) | PIN_MODE_INPUT(GPIOF_PIN11) | PIN_MODE_INPUT(GPIOF_PIN12) | PIN_MODE_INPUT(GPIOF_PIN13) | PIN_MODE_INPUT(GPIOF_PIN14) | PIN_MODE_INPUT(GPIOF_PIN15))
386#define VAL_GPIOF_OTYPER (PIN_OTYPE_PUSHPULL(GPIOF_OSC_IN) | PIN_OTYPE_PUSHPULL(GPIOF_OSC_OUT) | PIN_OTYPE_PUSHPULL(GPIOF_PIN2) | PIN_OTYPE_PUSHPULL(GPIOF_PIN3) | PIN_OTYPE_PUSHPULL(GPIOF_PIN4) | PIN_OTYPE_PUSHPULL(GPIOF_PIN5) | PIN_OTYPE_PUSHPULL(GPIOF_PIN6) | PIN_OTYPE_PUSHPULL(GPIOF_PIN7) | PIN_OTYPE_PUSHPULL(GPIOF_PIN8) | PIN_OTYPE_PUSHPULL(GPIOF_PIN9) | PIN_OTYPE_PUSHPULL(GPIOF_PIN10) | PIN_OTYPE_PUSHPULL(GPIOF_PIN11) | PIN_OTYPE_PUSHPULL(GPIOF_PIN12) | PIN_OTYPE_PUSHPULL(GPIOF_PIN13) | PIN_OTYPE_PUSHPULL(GPIOF_PIN14) | PIN_OTYPE_PUSHPULL(GPIOF_PIN15))
387#define VAL_GPIOF_OSPEEDR (PIN_OSPEED_VERYLOW(GPIOF_OSC_IN) | PIN_OSPEED_VERYLOW(GPIOF_OSC_OUT) | PIN_OSPEED_VERYLOW(GPIOF_PIN2) | PIN_OSPEED_VERYLOW(GPIOF_PIN3) | PIN_OSPEED_VERYLOW(GPIOF_PIN4) | PIN_OSPEED_VERYLOW(GPIOF_PIN5) | PIN_OSPEED_VERYLOW(GPIOF_PIN6) | PIN_OSPEED_VERYLOW(GPIOF_PIN7) | PIN_OSPEED_VERYLOW(GPIOF_PIN8) | PIN_OSPEED_VERYLOW(GPIOF_PIN9) | PIN_OSPEED_VERYLOW(GPIOF_PIN10) | PIN_OSPEED_VERYLOW(GPIOF_PIN11) | PIN_OSPEED_VERYLOW(GPIOF_PIN12) | PIN_OSPEED_VERYLOW(GPIOF_PIN13) | PIN_OSPEED_VERYLOW(GPIOF_PIN14) | PIN_OSPEED_VERYLOW(GPIOF_PIN15))
388#define VAL_GPIOF_PUPDR (PIN_PUPDR_FLOATING(GPIOF_OSC_IN) | PIN_PUPDR_FLOATING(GPIOF_OSC_OUT) | PIN_PUPDR_PULLUP(GPIOF_PIN2) | PIN_PUPDR_PULLUP(GPIOF_PIN3) | PIN_PUPDR_PULLUP(GPIOF_PIN4) | PIN_PUPDR_PULLUP(GPIOF_PIN5) | PIN_PUPDR_PULLUP(GPIOF_PIN6) | PIN_PUPDR_PULLUP(GPIOF_PIN7) | PIN_PUPDR_PULLUP(GPIOF_PIN8) | PIN_PUPDR_PULLUP(GPIOF_PIN9) | PIN_PUPDR_PULLUP(GPIOF_PIN10) | PIN_PUPDR_PULLUP(GPIOF_PIN11) | PIN_PUPDR_PULLUP(GPIOF_PIN12) | PIN_PUPDR_PULLUP(GPIOF_PIN13) | PIN_PUPDR_PULLUP(GPIOF_PIN14) | PIN_PUPDR_PULLUP(GPIOF_PIN15))
389#define VAL_GPIOF_ODR (PIN_ODR_HIGH(GPIOF_OSC_IN) | PIN_ODR_HIGH(GPIOF_OSC_OUT) | PIN_ODR_HIGH(GPIOF_PIN2) | PIN_ODR_HIGH(GPIOF_PIN3) | PIN_ODR_HIGH(GPIOF_PIN4) | PIN_ODR_HIGH(GPIOF_PIN5) | PIN_ODR_HIGH(GPIOF_PIN6) | PIN_ODR_HIGH(GPIOF_PIN7) | PIN_ODR_HIGH(GPIOF_PIN8) | PIN_ODR_HIGH(GPIOF_PIN9) | PIN_ODR_HIGH(GPIOF_PIN10) | PIN_ODR_HIGH(GPIOF_PIN11) | PIN_ODR_HIGH(GPIOF_PIN12) | PIN_ODR_HIGH(GPIOF_PIN13) | PIN_ODR_HIGH(GPIOF_PIN14) | PIN_ODR_HIGH(GPIOF_PIN15))
390#define VAL_GPIOF_AFRL (PIN_AFIO_AF(GPIOF_OSC_IN, 0U) | PIN_AFIO_AF(GPIOF_OSC_OUT, 0U) | PIN_AFIO_AF(GPIOF_PIN2, 0U) | PIN_AFIO_AF(GPIOF_PIN3, 0U) | PIN_AFIO_AF(GPIOF_PIN4, 0U) | PIN_AFIO_AF(GPIOF_PIN5, 0U) | PIN_AFIO_AF(GPIOF_PIN6, 0U) | PIN_AFIO_AF(GPIOF_PIN7, 0U))
391#define VAL_GPIOF_AFRH (PIN_AFIO_AF(GPIOF_PIN8, 0U) | PIN_AFIO_AF(GPIOF_PIN9, 0U) | PIN_AFIO_AF(GPIOF_PIN10, 0U) | PIN_AFIO_AF(GPIOF_PIN11, 0U) | PIN_AFIO_AF(GPIOF_PIN12, 0U) | PIN_AFIO_AF(GPIOF_PIN13, 0U) | PIN_AFIO_AF(GPIOF_PIN14, 0U) | PIN_AFIO_AF(GPIOF_PIN15, 0U))
392
393/*===========================================================================*/
394/* External declarations. */
395/*===========================================================================*/
396
397#if !defined(_FROM_ASM_)
398# ifdef __cplusplus
399extern "C" {
400# endif
401void boardInit(void);
402# ifdef __cplusplus
403}
404# endif
405#endif /* _FROM_ASM_ */
406
407#endif /* BOARD_H */
diff --git a/platforms/chibios/GENERIC_STM32_F072XB/board/board.mk b/platforms/chibios/GENERIC_STM32_F072XB/board/board.mk
index 842e33590..3f0e6c46e 100644
--- a/platforms/chibios/GENERIC_STM32_F072XB/board/board.mk
+++ b/platforms/chibios/GENERIC_STM32_F072XB/board/board.mk
@@ -1,8 +1,8 @@
1# List of all the board related files. 1# List of all the board related files.
2BOARDSRC = $(BOARD_PATH)/board/board.c 2BOARDSRC = $(CHIBIOS)/os/hal/boards/ST_NUCLEO64_F072RB/board.c
3 3
4# Required include directories 4# Required include directories
5BOARDINC = $(BOARD_PATH)/board 5BOARDINC = $(CHIBIOS)/os/hal/boards/ST_NUCLEO64_F072RB
6 6
7# Shared variables 7# Shared variables
8ALLCSRC += $(BOARDSRC) 8ALLCSRC += $(BOARDSRC)
diff --git a/platforms/chibios/GENERIC_STM32_F072XB/configs/board.h b/platforms/chibios/GENERIC_STM32_F072XB/configs/board.h
new file mode 100644
index 000000000..30af6b0c8
--- /dev/null
+++ b/platforms/chibios/GENERIC_STM32_F072XB/configs/board.h
@@ -0,0 +1,20 @@
1/* Copyright 2020 Nick Brassel (tzarc)
2 *
3 * This program is free software: you can redistribute it and/or modify
4 * it under the terms of the GNU General Public License as published by
5 * the Free Software Foundation, either version 3 of the License, or
6 * (at your option) any later version.
7 *
8 * This program is distributed in the hope that it will be useful,
9 * but WITHOUT ANY WARRANTY; without even the implied warranty of
10 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
11 * GNU General Public License for more details.
12 *
13 * You should have received a copy of the GNU General Public License
14 * along with this program. If not, see <https://www.gnu.org/licenses/>.
15 */
16#pragma once
17
18#include_next "board.h"
19
20#undef STM32_HSE_BYPASS
diff --git a/platforms/chibios/GENERIC_STM32_F072XB/configs/mcuconf.h b/platforms/chibios/GENERIC_STM32_F072XB/configs/mcuconf.h
new file mode 100644
index 000000000..688350e9c
--- /dev/null
+++ b/platforms/chibios/GENERIC_STM32_F072XB/configs/mcuconf.h
@@ -0,0 +1,177 @@
1/*
2 ChibiOS - Copyright (C) 2006..2015 Giovanni Di Sirio
3
4 Licensed under the Apache License, Version 2.0 (the "License");
5 you may not use this file except in compliance with the License.
6 You may obtain a copy of the License at
7
8 http://www.apache.org/licenses/LICENSE-2.0
9
10 Unless required by applicable law or agreed to in writing, software
11 distributed under the License is distributed on an "AS IS" BASIS,
12 WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
13 See the License for the specific language governing permissions and
14 limitations under the License.
15*/
16
17#ifndef _MCUCONF_H_
18#define _MCUCONF_H_
19
20/*
21 * STM32F0xx drivers configuration.
22 * The following settings override the default settings present in
23 * the various device driver implementation headers.
24 * Note that the settings for each driver only have effect if the whole
25 * driver is enabled in halconf.h.
26 *
27 * IRQ priorities:
28 * 3...0 Lowest...Highest.
29 *
30 * DMA priorities:
31 * 0...3 Lowest...Highest.
32 */
33
34#define STM32F0xx_MCUCONF
35// #define STM32F070xB
36
37/*
38 * HAL driver system settings.
39 */
40#define STM32_NO_INIT FALSE
41#define STM32_PVD_ENABLE FALSE
42#define STM32_PLS STM32_PLS_LEV0
43#define STM32_HSI_ENABLED TRUE
44#define STM32_HSI14_ENABLED TRUE
45#define STM32_HSI48_ENABLED FALSE
46#define STM32_LSI_ENABLED TRUE
47#define STM32_HSE_ENABLED FALSE
48#define STM32_LSE_ENABLED FALSE
49#define STM32_SW STM32_SW_PLL
50#define STM32_PLLSRC STM32_PLLSRC_HSI_DIV2
51#define STM32_PREDIV_VALUE 1
52#define STM32_PLLMUL_VALUE 12
53#define STM32_HPRE STM32_HPRE_DIV1
54#define STM32_PPRE STM32_PPRE_DIV1
55#define STM32_ADCSW STM32_ADCSW_HSI14
56#define STM32_ADCPRE STM32_ADCPRE_DIV4
57#define STM32_MCOSEL STM32_MCOSEL_NOCLOCK
58#define STM32_ADCPRE STM32_ADCPRE_DIV4
59#define STM32_ADCSW STM32_ADCSW_HSI14
60#define STM32_USBSW STM32_USBSW_HSI48
61#define STM32_CECSW STM32_CECSW_HSI
62#define STM32_I2C1SW STM32_I2C1SW_HSI
63#define STM32_USART1SW STM32_USART1SW_PCLK
64#define STM32_RTCSEL STM32_RTCSEL_LSI
65
66/*
67 * IRQ system settings.
68 */
69#define STM32_IRQ_EXTI0_1_IRQ_PRIORITY 3
70#define STM32_IRQ_EXTI2_3_IRQ_PRIORITY 3
71#define STM32_IRQ_EXTI4_15_IRQ_PRIORITY 3
72#define STM32_IRQ_EXTI16_IRQ_PRIORITY 3
73#define STM32_IRQ_EXTI17_20_IRQ_PRIORITY 3
74#define STM32_IRQ_EXTI21_22_IRQ_PRIORITY 3
75
76/*
77 * ADC driver system settings.
78 */
79#define STM32_ADC_USE_ADC1 FALSE
80#define STM32_ADC_ADC1_DMA_PRIORITY 2
81#define STM32_ADC_IRQ_PRIORITY 2
82#define STM32_ADC_ADC1_DMA_IRQ_PRIORITY 2
83
84/*
85 * GPT driver system settings.
86 */
87#define STM32_GPT_USE_TIM1 FALSE
88#define STM32_GPT_USE_TIM2 FALSE
89#define STM32_GPT_USE_TIM3 FALSE
90#define STM32_GPT_USE_TIM14 FALSE
91#define STM32_GPT_TIM1_IRQ_PRIORITY 2
92#define STM32_GPT_TIM2_IRQ_PRIORITY 2
93#define STM32_GPT_TIM3_IRQ_PRIORITY 2
94#define STM32_GPT_TIM14_IRQ_PRIORITY 2
95
96/*
97 * I2C driver system settings.
98 */
99#define STM32_I2C_USE_I2C1 FALSE
100#define STM32_I2C_USE_I2C2 FALSE
101#define STM32_I2C_BUSY_TIMEOUT 50
102#define STM32_I2C_I2C1_IRQ_PRIORITY 3
103#define STM32_I2C_I2C2_IRQ_PRIORITY 3
104#define STM32_I2C_USE_DMA TRUE
105#define STM32_I2C_I2C1_DMA_PRIORITY 1
106#define STM32_I2C_I2C2_DMA_PRIORITY 1
107#define STM32_I2C_I2C1_RX_DMA_STREAM STM32_DMA_STREAM_ID(1, 7)
108#define STM32_I2C_I2C1_TX_DMA_STREAM STM32_DMA_STREAM_ID(1, 6)
109#define STM32_I2C_DMA_ERROR_HOOK(i2cp) osalSysHalt("DMA failure")
110
111/*
112 * ICU driver system settings.
113 */
114#define STM32_ICU_USE_TIM1 FALSE
115#define STM32_ICU_USE_TIM2 FALSE
116#define STM32_ICU_USE_TIM3 FALSE
117#define STM32_ICU_TIM1_IRQ_PRIORITY 3
118#define STM32_ICU_TIM2_IRQ_PRIORITY 3
119#define STM32_ICU_TIM3_IRQ_PRIORITY 3
120
121/*
122 * PWM driver system settings.
123 */
124#define STM32_PWM_USE_ADVANCED FALSE
125#define STM32_PWM_USE_TIM1 FALSE
126#define STM32_PWM_USE_TIM2 FALSE
127#define STM32_PWM_USE_TIM3 TRUE
128#define STM32_PWM_TIM1_IRQ_PRIORITY 3
129#define STM32_PWM_TIM2_IRQ_PRIORITY 3
130#define STM32_PWM_TIM3_IRQ_PRIORITY 3
131
132/*
133 * SERIAL driver system settings.
134 */
135#define STM32_SERIAL_USE_USART1 FALSE
136#define STM32_SERIAL_USE_USART2 FALSE
137#define STM32_SERIAL_USART1_PRIORITY 3
138#define STM32_SERIAL_USART2_PRIORITY 3
139
140/*
141 * SPI driver system settings.
142 */
143#define STM32_SPI_USE_SPI1 FALSE
144#define STM32_SPI_USE_SPI2 TRUE
145#define STM32_SPI_SPI1_DMA_PRIORITY 1
146#define STM32_SPI_SPI2_DMA_PRIORITY 1
147#define STM32_SPI_SPI1_IRQ_PRIORITY 2
148#define STM32_SPI_SPI2_IRQ_PRIORITY 2
149#define STM32_SPI_SPI2_RX_DMA_STREAM STM32_DMA_STREAM_ID(1, 4)
150#define STM32_SPI_SPI2_TX_DMA_STREAM STM32_DMA_STREAM_ID(1, 5)
151#define STM32_SPI_DMA_ERROR_HOOK(spip) osalSysHalt("DMA failure")
152
153/*
154 * ST driver system settings.
155 */
156#define STM32_ST_IRQ_PRIORITY 2
157#define STM32_ST_USE_TIMER 2
158
159/*
160 * UART driver system settings.
161 */
162#define STM32_UART_USE_USART1 FALSE
163#define STM32_UART_USE_USART2 FALSE
164#define STM32_UART_USART1_IRQ_PRIORITY 3
165#define STM32_UART_USART2_IRQ_PRIORITY 3
166#define STM32_UART_USART1_DMA_PRIORITY 0
167#define STM32_UART_USART2_DMA_PRIORITY 0
168#define STM32_UART_DMA_ERROR_HOOK(uartp) osalSysHalt("DMA failure")
169
170/*
171 * USB driver system settings.
172 */
173#define STM32_USB_USE_USB1 TRUE
174#define STM32_USB_LOW_POWER_ON_SUSPEND FALSE
175#define STM32_USB_USB1_LP_IRQ_PRIORITY 3
176
177#endif /* _MCUCONF_H_ */
diff --git a/platforms/chibios/GENERIC_STM32_F303XC/configs/config.h b/platforms/chibios/GENERIC_STM32_F303XC/configs/config.h
index 48a7a9009..a73f0c0b4 100644
--- a/platforms/chibios/GENERIC_STM32_F303XC/configs/config.h
+++ b/platforms/chibios/GENERIC_STM32_F303XC/configs/config.h
@@ -15,4 +15,6 @@
15 */ 15 */
16#pragma once 16#pragma once
17 17
18#define EARLY_INIT_PERFORM_BOOTLOADER_JUMP TRUE 18#ifndef EARLY_INIT_PERFORM_BOOTLOADER_JUMP
19# define EARLY_INIT_PERFORM_BOOTLOADER_JUMP TRUE
20#endif
diff --git a/platforms/chibios/STM32_F103_STM32DUINO/configs/mcuconf.h b/platforms/chibios/STM32_F103_STM32DUINO/configs/mcuconf.h
new file mode 100644
index 000000000..9945e7408
--- /dev/null
+++ b/platforms/chibios/STM32_F103_STM32DUINO/configs/mcuconf.h
@@ -0,0 +1,209 @@
1/*
2 ChibiOS - Copyright (C) 2006..2015 Giovanni Di Sirio
3
4 Licensed under the Apache License, Version 2.0 (the "License");
5 you may not use this file except in compliance with the License.
6 You may obtain a copy of the License at
7
8 http://www.apache.org/licenses/LICENSE-2.0
9
10 Unless required by applicable law or agreed to in writing, software
11 distributed under the License is distributed on an "AS IS" BASIS,
12 WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
13 See the License for the specific language governing permissions and
14 limitations under the License.
15*/
16
17#ifndef _MCUCONF_H_
18#define _MCUCONF_H_
19
20#define STM32F103_MCUCONF
21
22/*
23 * STM32F103 drivers configuration.
24 * The following settings override the default settings present in
25 * the various device driver implementation headers.
26 * Note that the settings for each driver only have effect if the whole
27 * driver is enabled in halconf.h.
28 *
29 * IRQ priorities:
30 * 15...0 Lowest...Highest.
31 *
32 * DMA priorities:
33 * 0...3 Lowest...Highest.
34 */
35
36/*
37 * HAL driver system settings.
38 */
39#define STM32_NO_INIT FALSE
40#define STM32_HSI_ENABLED TRUE
41#define STM32_LSI_ENABLED FALSE
42#define STM32_HSE_ENABLED TRUE
43#define STM32_LSE_ENABLED FALSE
44#define STM32_SW STM32_SW_PLL
45#define STM32_PLLSRC STM32_PLLSRC_HSE
46#define STM32_PLLXTPRE STM32_PLLXTPRE_DIV1
47#define STM32_PLLMUL_VALUE 9
48#define STM32_HPRE STM32_HPRE_DIV1
49#define STM32_PPRE1 STM32_PPRE1_DIV2
50#define STM32_PPRE2 STM32_PPRE2_DIV2
51#define STM32_ADCPRE STM32_ADCPRE_DIV4
52#define STM32_USB_CLOCK_REQUIRED TRUE
53#define STM32_USBPRE STM32_USBPRE_DIV1P5
54#define STM32_MCOSEL STM32_MCOSEL_NOCLOCK
55#define STM32_RTCSEL STM32_RTCSEL_HSEDIV
56#define STM32_PVD_ENABLE FALSE
57#define STM32_PLS STM32_PLS_LEV0
58
59/*
60 * ADC driver system settings.
61 */
62#define STM32_ADC_USE_ADC1 FALSE
63#define STM32_ADC_ADC1_DMA_PRIORITY 2
64#define STM32_ADC_ADC1_IRQ_PRIORITY 6
65
66/*
67 * CAN driver system settings.
68 */
69#define STM32_CAN_USE_CAN1 FALSE
70#define STM32_CAN_CAN1_IRQ_PRIORITY 11
71
72/*
73 * EXT driver system settings.
74 */
75#define STM32_EXT_EXTI0_IRQ_PRIORITY 6
76#define STM32_EXT_EXTI1_IRQ_PRIORITY 6
77#define STM32_EXT_EXTI2_IRQ_PRIORITY 6
78#define STM32_EXT_EXTI3_IRQ_PRIORITY 6
79#define STM32_EXT_EXTI4_IRQ_PRIORITY 6
80#define STM32_EXT_EXTI5_9_IRQ_PRIORITY 6
81#define STM32_EXT_EXTI10_15_IRQ_PRIORITY 6
82#define STM32_EXT_EXTI16_IRQ_PRIORITY 6
83#define STM32_EXT_EXTI17_IRQ_PRIORITY 6
84#define STM32_EXT_EXTI18_IRQ_PRIORITY 6
85#define STM32_EXT_EXTI19_IRQ_PRIORITY 6
86
87/*
88 * GPT driver system settings.
89 */
90#define STM32_GPT_USE_TIM1 FALSE
91#define STM32_GPT_USE_TIM2 FALSE
92#define STM32_GPT_USE_TIM3 FALSE
93#define STM32_GPT_USE_TIM4 FALSE
94#define STM32_GPT_USE_TIM5 FALSE
95#define STM32_GPT_USE_TIM8 FALSE
96#define STM32_GPT_TIM1_IRQ_PRIORITY 7
97#define STM32_GPT_TIM2_IRQ_PRIORITY 7
98#define STM32_GPT_TIM3_IRQ_PRIORITY 7
99#define STM32_GPT_TIM4_IRQ_PRIORITY 7
100#define STM32_GPT_TIM5_IRQ_PRIORITY 7
101#define STM32_GPT_TIM8_IRQ_PRIORITY 7
102
103/*
104 * I2C driver system settings.
105 */
106#define STM32_I2C_USE_I2C1 FALSE
107#define STM32_I2C_USE_I2C2 FALSE
108#define STM32_I2C_BUSY_TIMEOUT 50
109#define STM32_I2C_I2C1_IRQ_PRIORITY 5
110#define STM32_I2C_I2C2_IRQ_PRIORITY 5
111#define STM32_I2C_I2C1_DMA_PRIORITY 3
112#define STM32_I2C_I2C2_DMA_PRIORITY 3
113#define STM32_I2C_DMA_ERROR_HOOK(i2cp) osalSysHalt("DMA failure")
114
115/*
116 * ICU driver system settings.
117 */
118#define STM32_ICU_USE_TIM1 FALSE
119#define STM32_ICU_USE_TIM2 FALSE
120#define STM32_ICU_USE_TIM3 FALSE
121#define STM32_ICU_USE_TIM4 FALSE
122#define STM32_ICU_USE_TIM5 FALSE
123#define STM32_ICU_USE_TIM8 FALSE
124#define STM32_ICU_TIM1_IRQ_PRIORITY 7
125#define STM32_ICU_TIM2_IRQ_PRIORITY 7
126#define STM32_ICU_TIM3_IRQ_PRIORITY 7
127#define STM32_ICU_TIM4_IRQ_PRIORITY 7
128#define STM32_ICU_TIM5_IRQ_PRIORITY 7
129#define STM32_ICU_TIM8_IRQ_PRIORITY 7
130
131/*
132 * PWM driver system settings.
133 */
134#define STM32_PWM_USE_ADVANCED FALSE
135#define STM32_PWM_USE_TIM1 FALSE
136#define STM32_PWM_USE_TIM2 FALSE
137#define STM32_PWM_USE_TIM3 FALSE
138#define STM32_PWM_USE_TIM4 FALSE
139#define STM32_PWM_USE_TIM5 FALSE
140#define STM32_PWM_USE_TIM8 FALSE
141#define STM32_PWM_TIM1_IRQ_PRIORITY 7
142#define STM32_PWM_TIM2_IRQ_PRIORITY 7
143#define STM32_PWM_TIM3_IRQ_PRIORITY 7
144#define STM32_PWM_TIM4_IRQ_PRIORITY 7
145#define STM32_PWM_TIM5_IRQ_PRIORITY 7
146#define STM32_PWM_TIM8_IRQ_PRIORITY 7
147
148/*
149 * RTC driver system settings.
150 */
151#define STM32_RTC_IRQ_PRIORITY 15
152
153/*
154 * SERIAL driver system settings.
155 */
156#define STM32_SERIAL_USE_USART1 FALSE
157#define STM32_SERIAL_USE_USART2 FALSE
158#define STM32_SERIAL_USE_USART3 FALSE
159#define STM32_SERIAL_USE_UART4 FALSE
160#define STM32_SERIAL_USE_UART5 FALSE
161#define STM32_SERIAL_USART1_PRIORITY 12
162#define STM32_SERIAL_USART2_PRIORITY 12
163#define STM32_SERIAL_USART3_PRIORITY 12
164#define STM32_SERIAL_UART4_PRIORITY 12
165#define STM32_SERIAL_UART5_PRIORITY 12
166
167/*
168 * SPI driver system settings.
169 */
170#define STM32_SPI_USE_SPI1 FALSE
171#define STM32_SPI_USE_SPI2 TRUE
172#define STM32_SPI_USE_SPI3 FALSE
173#define STM32_SPI_SPI1_DMA_PRIORITY 1
174#define STM32_SPI_SPI2_DMA_PRIORITY 1
175#define STM32_SPI_SPI3_DMA_PRIORITY 1
176#define STM32_SPI_SPI1_IRQ_PRIORITY 10
177#define STM32_SPI_SPI2_IRQ_PRIORITY 10
178#define STM32_SPI_SPI3_IRQ_PRIORITY 10
179#define STM32_SPI_DMA_ERROR_HOOK(spip) osalSysHalt("DMA failure")
180
181/*
182 * ST driver system settings.
183 */
184#define STM32_ST_IRQ_PRIORITY 8
185#define STM32_ST_USE_TIMER 2
186
187/*
188 * UART driver system settings.
189 */
190#define STM32_UART_USE_USART1 FALSE
191#define STM32_UART_USE_USART2 FALSE
192#define STM32_UART_USE_USART3 FALSE
193#define STM32_UART_USART1_IRQ_PRIORITY 12
194#define STM32_UART_USART2_IRQ_PRIORITY 12
195#define STM32_UART_USART3_IRQ_PRIORITY 12
196#define STM32_UART_USART1_DMA_PRIORITY 0
197#define STM32_UART_USART2_DMA_PRIORITY 0
198#define STM32_UART_USART3_DMA_PRIORITY 0
199#define STM32_UART_DMA_ERROR_HOOK(uartp) osalSysHalt("DMA failure")
200
201/*
202 * USB driver system settings.
203 */
204#define STM32_USB_USE_USB1 TRUE
205#define STM32_USB_LOW_POWER_ON_SUSPEND FALSE
206#define STM32_USB_USB1_HP_IRQ_PRIORITY 13
207#define STM32_USB_USB1_LP_IRQ_PRIORITY 14
208
209#endif /* _MCUCONF_H_ */
diff --git a/platforms/chibios/GENERIC_STM32_F303XC/configs/chconf.h b/platforms/chibios/common/configs/chconf.h
index aac330370..aac330370 100644
--- a/platforms/chibios/GENERIC_STM32_F303XC/configs/chconf.h
+++ b/platforms/chibios/common/configs/chconf.h
diff --git a/platforms/chibios/GENERIC_STM32_F303XC/configs/halconf.h b/platforms/chibios/common/configs/halconf.h
index 6b48e289f..6b48e289f 100644
--- a/platforms/chibios/GENERIC_STM32_F303XC/configs/halconf.h
+++ b/platforms/chibios/common/configs/halconf.h
diff --git a/platforms/chibios/ld/MKL26Z64.ld b/platforms/chibios/common/ld/MKL26Z64.ld
index c4ca8b874..c4ca8b874 100644
--- a/platforms/chibios/ld/MKL26Z64.ld
+++ b/platforms/chibios/common/ld/MKL26Z64.ld
diff --git a/platforms/chibios/ld/STM32F103x8_stm32duino_bootloader.ld b/platforms/chibios/common/ld/STM32F103x8_stm32duino_bootloader.ld
index bb852422a..bb852422a 100644
--- a/platforms/chibios/ld/STM32F103x8_stm32duino_bootloader.ld
+++ b/platforms/chibios/common/ld/STM32F103x8_stm32duino_bootloader.ld
generated by cgit v1.2.3 (git 2.25.1) at 2025-11-18 17:31:56 +0000