diff options
| author | skullY <skullydazed@gmail.com> | 2019-08-30 11:19:03 -0700 |
|---|---|---|
| committer | skullydazed <skullydazed@users.noreply.github.com> | 2019-08-30 15:01:52 -0700 |
| commit | b624f32f944acdc59dcb130674c09090c5c404cb (patch) | |
| tree | bc13adbba137d122d9a2c2fb2fafcbb08ac10e25 /quantum/stm32 | |
| parent | 61af76a10d00aba185b8338604171de490a13e3b (diff) | |
| download | qmk_firmware-b624f32f944acdc59dcb130674c09090c5c404cb.tar.gz qmk_firmware-b624f32f944acdc59dcb130674c09090c5c404cb.zip | |
clang-format changes
Diffstat (limited to 'quantum/stm32')
| -rw-r--r-- | quantum/stm32/chconf.h | 132 | ||||
| -rw-r--r-- | quantum/stm32/halconf.h | 244 | ||||
| -rw-r--r-- | quantum/stm32/mcuconf.h | 312 |
3 files changed, 338 insertions, 350 deletions
diff --git a/quantum/stm32/chconf.h b/quantum/stm32/chconf.h index 1d9f12ff1..f7b1b077d 100644 --- a/quantum/stm32/chconf.h +++ b/quantum/stm32/chconf.h | |||
| @@ -26,9 +26,9 @@ | |||
| 26 | */ | 26 | */ |
| 27 | 27 | ||
| 28 | #ifndef CHCONF_H | 28 | #ifndef CHCONF_H |
| 29 | #define CHCONF_H | 29 | # define CHCONF_H |
| 30 | 30 | ||
| 31 | #define _CHIBIOS_RT_CONF_ | 31 | # define _CHIBIOS_RT_CONF_ |
| 32 | 32 | ||
| 33 | /*===========================================================================*/ | 33 | /*===========================================================================*/ |
| 34 | /** | 34 | /** |
| @@ -41,14 +41,14 @@ | |||
| 41 | * @brief System time counter resolution. | 41 | * @brief System time counter resolution. |
| 42 | * @note Allowed values are 16 or 32 bits. | 42 | * @note Allowed values are 16 or 32 bits. |
| 43 | */ | 43 | */ |
| 44 | #define CH_CFG_ST_RESOLUTION 32 | 44 | # define CH_CFG_ST_RESOLUTION 32 |
| 45 | 45 | ||
| 46 | /** | 46 | /** |
| 47 | * @brief System tick frequency. | 47 | * @brief System tick frequency. |
| 48 | * @details Frequency of the system timer that drives the system ticks. This | 48 | * @details Frequency of the system timer that drives the system ticks. This |
| 49 | * setting also defines the system tick time unit. | 49 | * setting also defines the system tick time unit. |
| 50 | */ | 50 | */ |
| 51 | #define CH_CFG_ST_FREQUENCY 100000 | 51 | # define CH_CFG_ST_FREQUENCY 100000 |
| 52 | 52 | ||
| 53 | /** | 53 | /** |
| 54 | * @brief Time delta constant for the tick-less mode. | 54 | * @brief Time delta constant for the tick-less mode. |
| @@ -58,7 +58,7 @@ | |||
| 58 | * The value one is not valid, timeouts are rounded up to | 58 | * The value one is not valid, timeouts are rounded up to |
| 59 | * this value. | 59 | * this value. |
| 60 | */ | 60 | */ |
| 61 | #define CH_CFG_ST_TIMEDELTA 2 | 61 | # define CH_CFG_ST_TIMEDELTA 2 |
| 62 | 62 | ||
| 63 | /** @} */ | 63 | /** @} */ |
| 64 | 64 | ||
| @@ -81,7 +81,7 @@ | |||
| 81 | * @note The round robin preemption is not supported in tickless mode and | 81 | * @note The round robin preemption is not supported in tickless mode and |
| 82 | * must be set to zero in that case. | 82 | * must be set to zero in that case. |
| 83 | */ | 83 | */ |
| 84 | #define CH_CFG_TIME_QUANTUM 0 | 84 | # define CH_CFG_TIME_QUANTUM 0 |
| 85 | 85 | ||
| 86 | /** | 86 | /** |
| 87 | * @brief Managed RAM size. | 87 | * @brief Managed RAM size. |
| @@ -94,7 +94,7 @@ | |||
| 94 | * provide the @p __heap_base__ and @p __heap_end__ symbols. | 94 | * provide the @p __heap_base__ and @p __heap_end__ symbols. |
| 95 | * @note Requires @p CH_CFG_USE_MEMCORE. | 95 | * @note Requires @p CH_CFG_USE_MEMCORE. |
| 96 | */ | 96 | */ |
| 97 | #define CH_CFG_MEMCORE_SIZE 0 | 97 | # define CH_CFG_MEMCORE_SIZE 0 |
| 98 | 98 | ||
| 99 | /** | 99 | /** |
| 100 | * @brief Idle thread automatic spawn suppression. | 100 | * @brief Idle thread automatic spawn suppression. |
| @@ -103,7 +103,7 @@ | |||
| 103 | * function becomes the idle thread and must implement an | 103 | * function becomes the idle thread and must implement an |
| 104 | * infinite loop. | 104 | * infinite loop. |
| 105 | */ | 105 | */ |
| 106 | #define CH_CFG_NO_IDLE_THREAD FALSE | 106 | # define CH_CFG_NO_IDLE_THREAD FALSE |
| 107 | 107 | ||
| 108 | /** @} */ | 108 | /** @} */ |
| 109 | 109 | ||
| @@ -122,7 +122,7 @@ | |||
| 122 | * @note This is not related to the compiler optimization options. | 122 | * @note This is not related to the compiler optimization options. |
| 123 | * @note The default is @p TRUE. | 123 | * @note The default is @p TRUE. |
| 124 | */ | 124 | */ |
| 125 | #define CH_CFG_OPTIMIZE_SPEED TRUE | 125 | # define CH_CFG_OPTIMIZE_SPEED TRUE |
| 126 | 126 | ||
| 127 | /** @} */ | 127 | /** @} */ |
| 128 | 128 | ||
| @@ -140,7 +140,7 @@ | |||
| 140 | * | 140 | * |
| 141 | * @note The default is @p TRUE. | 141 | * @note The default is @p TRUE. |
| 142 | */ | 142 | */ |
| 143 | #define CH_CFG_USE_TM TRUE | 143 | # define CH_CFG_USE_TM TRUE |
| 144 | 144 | ||
| 145 | /** | 145 | /** |
| 146 | * @brief Threads registry APIs. | 146 | * @brief Threads registry APIs. |
| @@ -148,7 +148,7 @@ | |||
| 148 | * | 148 | * |
| 149 | * @note The default is @p TRUE. | 149 | * @note The default is @p TRUE. |
| 150 | */ | 150 | */ |
| 151 | #define CH_CFG_USE_REGISTRY TRUE | 151 | # define CH_CFG_USE_REGISTRY TRUE |
| 152 | 152 | ||
| 153 | /** | 153 | /** |
| 154 | * @brief Threads synchronization APIs. | 154 | * @brief Threads synchronization APIs. |
| @@ -157,7 +157,7 @@ | |||
| 157 | * | 157 | * |
| 158 | * @note The default is @p TRUE. | 158 | * @note The default is @p TRUE. |
| 159 | */ | 159 | */ |
| 160 | #define CH_CFG_USE_WAITEXIT TRUE | 160 | # define CH_CFG_USE_WAITEXIT TRUE |
| 161 | 161 | ||
| 162 | /** | 162 | /** |
| 163 | * @brief Semaphores APIs. | 163 | * @brief Semaphores APIs. |
| @@ -165,7 +165,7 @@ | |||
| 165 | * | 165 | * |
| 166 | * @note The default is @p TRUE. | 166 | * @note The default is @p TRUE. |
| 167 | */ | 167 | */ |
| 168 | #define CH_CFG_USE_SEMAPHORES TRUE | 168 | # define CH_CFG_USE_SEMAPHORES TRUE |
| 169 | 169 | ||
| 170 | /** | 170 | /** |
| 171 | * @brief Semaphores queuing mode. | 171 | * @brief Semaphores queuing mode. |
| @@ -176,7 +176,7 @@ | |||
| 176 | * requirements. | 176 | * requirements. |
| 177 | * @note Requires @p CH_CFG_USE_SEMAPHORES. | 177 | * @note Requires @p CH_CFG_USE_SEMAPHORES. |
| 178 | */ | 178 | */ |
| 179 | #define CH_CFG_USE_SEMAPHORES_PRIORITY FALSE | 179 | # define CH_CFG_USE_SEMAPHORES_PRIORITY FALSE |
| 180 | 180 | ||
| 181 | /** | 181 | /** |
| 182 | * @brief Mutexes APIs. | 182 | * @brief Mutexes APIs. |
| @@ -184,7 +184,7 @@ | |||
| 184 | * | 184 | * |
| 185 | * @note The default is @p TRUE. | 185 | * @note The default is @p TRUE. |
| 186 | */ | 186 | */ |
| 187 | #define CH_CFG_USE_MUTEXES TRUE | 187 | # define CH_CFG_USE_MUTEXES TRUE |
| 188 | 188 | ||
| 189 | /** | 189 | /** |
| 190 | * @brief Enables recursive behavior on mutexes. | 190 | * @brief Enables recursive behavior on mutexes. |
| @@ -194,7 +194,7 @@ | |||
| 194 | * @note The default is @p FALSE. | 194 | * @note The default is @p FALSE. |
| 195 | * @note Requires @p CH_CFG_USE_MUTEXES. | 195 | * @note Requires @p CH_CFG_USE_MUTEXES. |
| 196 | */ | 196 | */ |
| 197 | #define CH_CFG_USE_MUTEXES_RECURSIVE FALSE | 197 | # define CH_CFG_USE_MUTEXES_RECURSIVE FALSE |
| 198 | 198 | ||
| 199 | /** | 199 | /** |
| 200 | * @brief Conditional Variables APIs. | 200 | * @brief Conditional Variables APIs. |
| @@ -204,7 +204,7 @@ | |||
| 204 | * @note The default is @p TRUE. | 204 | * @note The default is @p TRUE. |
| 205 | * @note Requires @p CH_CFG_USE_MUTEXES. | 205 | * @note Requires @p CH_CFG_USE_MUTEXES. |
| 206 | */ | 206 | */ |
| 207 | #define CH_CFG_USE_CONDVARS TRUE | 207 | # define CH_CFG_USE_CONDVARS TRUE |
| 208 | 208 | ||
| 209 | /** | 209 | /** |
| 210 | * @brief Conditional Variables APIs with timeout. | 210 | * @brief Conditional Variables APIs with timeout. |
| @@ -214,7 +214,7 @@ | |||
| 214 | * @note The default is @p TRUE. | 214 | * @note The default is @p TRUE. |
| 215 | * @note Requires @p CH_CFG_USE_CONDVARS. | 215 | * @note Requires @p CH_CFG_USE_CONDVARS. |
| 216 | */ | 216 | */ |
| 217 | #define CH_CFG_USE_CONDVARS_TIMEOUT TRUE | 217 | # define CH_CFG_USE_CONDVARS_TIMEOUT TRUE |
| 218 | 218 | ||
| 219 | /** | 219 | /** |
| 220 | * @brief Events Flags APIs. | 220 | * @brief Events Flags APIs. |
| @@ -222,7 +222,7 @@ | |||
| 222 | * | 222 | * |
| 223 | * @note The default is @p TRUE. | 223 | * @note The default is @p TRUE. |
| 224 | */ | 224 | */ |
| 225 | #define CH_CFG_USE_EVENTS TRUE | 225 | # define CH_CFG_USE_EVENTS TRUE |
| 226 | 226 | ||
| 227 | /** | 227 | /** |
| 228 | * @brief Events Flags APIs with timeout. | 228 | * @brief Events Flags APIs with timeout. |
| @@ -232,7 +232,7 @@ | |||
| 232 | * @note The default is @p TRUE. | 232 | * @note The default is @p TRUE. |
| 233 | * @note Requires @p CH_CFG_USE_EVENTS. | 233 | * @note Requires @p CH_CFG_USE_EVENTS. |
| 234 | */ | 234 | */ |
| 235 | #define CH_CFG_USE_EVENTS_TIMEOUT TRUE | 235 | # define CH_CFG_USE_EVENTS_TIMEOUT TRUE |
| 236 | 236 | ||
| 237 | /** | 237 | /** |
| 238 | * @brief Synchronous Messages APIs. | 238 | * @brief Synchronous Messages APIs. |
| @@ -241,7 +241,7 @@ | |||
| 241 | * | 241 | * |
| 242 | * @note The default is @p TRUE. | 242 | * @note The default is @p TRUE. |
| 243 | */ | 243 | */ |
| 244 | #define CH_CFG_USE_MESSAGES TRUE | 244 | # define CH_CFG_USE_MESSAGES TRUE |
| 245 | 245 | ||
| 246 | /** | 246 | /** |
| 247 | * @brief Synchronous Messages queuing mode. | 247 | * @brief Synchronous Messages queuing mode. |
| @@ -252,7 +252,7 @@ | |||
| 252 | * requirements. | 252 | * requirements. |
| 253 | * @note Requires @p CH_CFG_USE_MESSAGES. | 253 | * @note Requires @p CH_CFG_USE_MESSAGES. |
| 254 | */ | 254 | */ |
| 255 | #define CH_CFG_USE_MESSAGES_PRIORITY TRUE | 255 | # define CH_CFG_USE_MESSAGES_PRIORITY TRUE |
| 256 | 256 | ||
| 257 | /** | 257 | /** |
| 258 | * @brief Mailboxes APIs. | 258 | * @brief Mailboxes APIs. |
| @@ -262,7 +262,7 @@ | |||
| 262 | * @note The default is @p TRUE. | 262 | * @note The default is @p TRUE. |
| 263 | * @note Requires @p CH_CFG_USE_SEMAPHORES. | 263 | * @note Requires @p CH_CFG_USE_SEMAPHORES. |
| 264 | */ | 264 | */ |
| 265 | #define CH_CFG_USE_MAILBOXES TRUE | 265 | # define CH_CFG_USE_MAILBOXES TRUE |
| 266 | 266 | ||
| 267 | /** | 267 | /** |
| 268 | * @brief Core Memory Manager APIs. | 268 | * @brief Core Memory Manager APIs. |
| @@ -271,7 +271,7 @@ | |||
| 271 | * | 271 | * |
| 272 | * @note The default is @p TRUE. | 272 | * @note The default is @p TRUE. |
| 273 | */ | 273 | */ |
| 274 | #define CH_CFG_USE_MEMCORE TRUE | 274 | # define CH_CFG_USE_MEMCORE TRUE |
| 275 | 275 | ||
| 276 | /** | 276 | /** |
| 277 | * @brief Heap Allocator APIs. | 277 | * @brief Heap Allocator APIs. |
| @@ -283,7 +283,7 @@ | |||
| 283 | * @p CH_CFG_USE_SEMAPHORES. | 283 | * @p CH_CFG_USE_SEMAPHORES. |
| 284 | * @note Mutexes are recommended. | 284 | * @note Mutexes are recommended. |
| 285 | */ | 285 | */ |
| 286 | #define CH_CFG_USE_HEAP TRUE | 286 | # define CH_CFG_USE_HEAP TRUE |
| 287 | 287 | ||
| 288 | /** | 288 | /** |
| 289 | * @brief Memory Pools Allocator APIs. | 289 | * @brief Memory Pools Allocator APIs. |
| @@ -292,7 +292,7 @@ | |||
| 292 | * | 292 | * |
| 293 | * @note The default is @p TRUE. | 293 | * @note The default is @p TRUE. |
| 294 | */ | 294 | */ |
| 295 | #define CH_CFG_USE_MEMPOOLS TRUE | 295 | # define CH_CFG_USE_MEMPOOLS TRUE |
| 296 | 296 | ||
| 297 | /** | 297 | /** |
| 298 | * @brief Dynamic Threads APIs. | 298 | * @brief Dynamic Threads APIs. |
| @@ -303,7 +303,7 @@ | |||
| 303 | * @note Requires @p CH_CFG_USE_WAITEXIT. | 303 | * @note Requires @p CH_CFG_USE_WAITEXIT. |
| 304 | * @note Requires @p CH_CFG_USE_HEAP and/or @p CH_CFG_USE_MEMPOOLS. | 304 | * @note Requires @p CH_CFG_USE_HEAP and/or @p CH_CFG_USE_MEMPOOLS. |
| 305 | */ | 305 | */ |
| 306 | #define CH_CFG_USE_DYNAMIC TRUE | 306 | # define CH_CFG_USE_DYNAMIC TRUE |
| 307 | 307 | ||
| 308 | /** @} */ | 308 | /** @} */ |
| 309 | 309 | ||
| @@ -319,7 +319,7 @@ | |||
| 319 | * | 319 | * |
| 320 | * @note The default is @p FALSE. | 320 | * @note The default is @p FALSE. |
| 321 | */ | 321 | */ |
| 322 | #define CH_DBG_STATISTICS FALSE | 322 | # define CH_DBG_STATISTICS FALSE |
| 323 | 323 | ||
| 324 | /** | 324 | /** |
| 325 | * @brief Debug option, system state check. | 325 | * @brief Debug option, system state check. |
| @@ -328,7 +328,7 @@ | |||
| 328 | * | 328 | * |
| 329 | * @note The default is @p FALSE. | 329 | * @note The default is @p FALSE. |
| 330 | */ | 330 | */ |
| 331 | #define CH_DBG_SYSTEM_STATE_CHECK FALSE | 331 | # define CH_DBG_SYSTEM_STATE_CHECK FALSE |
| 332 | 332 | ||
| 333 | /** | 333 | /** |
| 334 | * @brief Debug option, parameters checks. | 334 | * @brief Debug option, parameters checks. |
| @@ -337,7 +337,7 @@ | |||
| 337 | * | 337 | * |
| 338 | * @note The default is @p FALSE. | 338 | * @note The default is @p FALSE. |
| 339 | */ | 339 | */ |
| 340 | #define CH_DBG_ENABLE_CHECKS FALSE | 340 | # define CH_DBG_ENABLE_CHECKS FALSE |
| 341 | 341 | ||
| 342 | /** | 342 | /** |
| 343 | * @brief Debug option, consistency checks. | 343 | * @brief Debug option, consistency checks. |
| @@ -347,7 +347,7 @@ | |||
| 347 | * | 347 | * |
| 348 | * @note The default is @p FALSE. | 348 | * @note The default is @p FALSE. |
| 349 | */ | 349 | */ |
| 350 | #define CH_DBG_ENABLE_ASSERTS FALSE | 350 | # define CH_DBG_ENABLE_ASSERTS FALSE |
| 351 | 351 | ||
| 352 | /** | 352 | /** |
| 353 | * @brief Debug option, trace buffer. | 353 | * @brief Debug option, trace buffer. |
| @@ -355,14 +355,14 @@ | |||
| 355 | * | 355 | * |
| 356 | * @note The default is @p CH_DBG_TRACE_MASK_DISABLED. | 356 | * @note The default is @p CH_DBG_TRACE_MASK_DISABLED. |
| 357 | */ | 357 | */ |
| 358 | #define CH_DBG_TRACE_MASK CH_DBG_TRACE_MASK_DISABLED | 358 | # define CH_DBG_TRACE_MASK CH_DBG_TRACE_MASK_DISABLED |
| 359 | 359 | ||
| 360 | /** | 360 | /** |
| 361 | * @brief Trace buffer entries. | 361 | * @brief Trace buffer entries. |
| 362 | * @note The trace buffer is only allocated if @p CH_DBG_TRACE_MASK is | 362 | * @note The trace buffer is only allocated if @p CH_DBG_TRACE_MASK is |
| 363 | * different from @p CH_DBG_TRACE_MASK_DISABLED. | 363 | * different from @p CH_DBG_TRACE_MASK_DISABLED. |
| 364 | */ | 364 | */ |
| 365 | #define CH_DBG_TRACE_BUFFER_SIZE 128 | 365 | # define CH_DBG_TRACE_BUFFER_SIZE 128 |
| 366 | 366 | ||
| 367 | /** | 367 | /** |
| 368 | * @brief Debug option, stack checks. | 368 | * @brief Debug option, stack checks. |
| @@ -374,7 +374,7 @@ | |||
| 374 | * @note The default failure mode is to halt the system with the global | 374 | * @note The default failure mode is to halt the system with the global |
| 375 | * @p panic_msg variable set to @p NULL. | 375 | * @p panic_msg variable set to @p NULL. |
| 376 | */ | 376 | */ |
| 377 | #define CH_DBG_ENABLE_STACK_CHECK TRUE | 377 | # define CH_DBG_ENABLE_STACK_CHECK TRUE |
| 378 | 378 | ||
| 379 | /** | 379 | /** |
| 380 | * @brief Debug option, stacks initialization. | 380 | * @brief Debug option, stacks initialization. |
| @@ -384,7 +384,7 @@ | |||
| 384 | * | 384 | * |
| 385 | * @note The default is @p FALSE. | 385 | * @note The default is @p FALSE. |
| 386 | */ | 386 | */ |
| 387 | #define CH_DBG_FILL_THREADS FALSE | 387 | # define CH_DBG_FILL_THREADS FALSE |
| 388 | 388 | ||
| 389 | /** | 389 | /** |
| 390 | * @brief Debug option, threads profiling. | 390 | * @brief Debug option, threads profiling. |
| @@ -395,7 +395,7 @@ | |||
| 395 | * @note This debug option is not currently compatible with the | 395 | * @note This debug option is not currently compatible with the |
| 396 | * tickless mode. | 396 | * tickless mode. |
| 397 | */ | 397 | */ |
| 398 | #define CH_DBG_THREADS_PROFILING FALSE | 398 | # define CH_DBG_THREADS_PROFILING FALSE |
| 399 | 399 | ||
| 400 | /** @} */ | 400 | /** @} */ |
| 401 | 401 | ||
| @@ -410,8 +410,7 @@ | |||
| 410 | * @brief Threads descriptor structure extension. | 410 | * @brief Threads descriptor structure extension. |
| 411 | * @details User fields added to the end of the @p thread_t structure. | 411 | * @details User fields added to the end of the @p thread_t structure. |
| 412 | */ | 412 | */ |
| 413 | #define CH_CFG_THREAD_EXTRA_FIELDS \ | 413 | # define CH_CFG_THREAD_EXTRA_FIELDS /* Add threads custom fields here.*/ |
| 414 | /* Add threads custom fields here.*/ | ||
| 415 | 414 | ||
| 416 | /** | 415 | /** |
| 417 | * @brief Threads initialization hook. | 416 | * @brief Threads initialization hook. |
| @@ -420,39 +419,34 @@ | |||
| 420 | * @note It is invoked from within @p chThdInit() and implicitly from all | 419 | * @note It is invoked from within @p chThdInit() and implicitly from all |
| 421 | * the threads creation APIs. | 420 | * the threads creation APIs. |
| 422 | */ | 421 | */ |
| 423 | #define CH_CFG_THREAD_INIT_HOOK(tp) { \ | 422 | # define CH_CFG_THREAD_INIT_HOOK(tp) \ |
| 424 | /* Add threads initialization code here.*/ \ | 423 | { /* Add threads initialization code here.*/ } |
| 425 | } | ||
| 426 | 424 | ||
| 427 | /** | 425 | /** |
| 428 | * @brief Threads finalization hook. | 426 | * @brief Threads finalization hook. |
| 429 | * @details User finalization code added to the @p chThdExit() API. | 427 | * @details User finalization code added to the @p chThdExit() API. |
| 430 | */ | 428 | */ |
| 431 | #define CH_CFG_THREAD_EXIT_HOOK(tp) { \ | 429 | # define CH_CFG_THREAD_EXIT_HOOK(tp) \ |
| 432 | /* Add threads finalization code here.*/ \ | 430 | { /* Add threads finalization code here.*/ } |
| 433 | } | ||
| 434 | 431 | ||
| 435 | /** | 432 | /** |
| 436 | * @brief Context switch hook. | 433 | * @brief Context switch hook. |
| 437 | * @details This hook is invoked just before switching between threads. | 434 | * @details This hook is invoked just before switching between threads. |
| 438 | */ | 435 | */ |
| 439 | #define CH_CFG_CONTEXT_SWITCH_HOOK(ntp, otp) { \ | 436 | # define CH_CFG_CONTEXT_SWITCH_HOOK(ntp, otp) \ |
| 440 | /* Context switch code here.*/ \ | 437 | { /* Context switch code here.*/ } |
| 441 | } | ||
| 442 | 438 | ||
| 443 | /** | 439 | /** |
| 444 | * @brief ISR enter hook. | 440 | * @brief ISR enter hook. |
| 445 | */ | 441 | */ |
| 446 | #define CH_CFG_IRQ_PROLOGUE_HOOK() { \ | 442 | # define CH_CFG_IRQ_PROLOGUE_HOOK() \ |
| 447 | /* IRQ prologue code here.*/ \ | 443 | { /* IRQ prologue code here.*/ } |
| 448 | } | ||
| 449 | 444 | ||
| 450 | /** | 445 | /** |
| 451 | * @brief ISR exit hook. | 446 | * @brief ISR exit hook. |
| 452 | */ | 447 | */ |
| 453 | #define CH_CFG_IRQ_EPILOGUE_HOOK() { \ | 448 | # define CH_CFG_IRQ_EPILOGUE_HOOK() \ |
| 454 | /* IRQ epilogue code here.*/ \ | 449 | { /* IRQ epilogue code here.*/ } |
| 455 | } | ||
| 456 | 450 | ||
| 457 | /** | 451 | /** |
| 458 | * @brief Idle thread enter hook. | 452 | * @brief Idle thread enter hook. |
| @@ -460,9 +454,8 @@ | |||
| 460 | * should be invoked from here. | 454 | * should be invoked from here. |
| 461 | * @note This macro can be used to activate a power saving mode. | 455 | * @note This macro can be used to activate a power saving mode. |
| 462 | */ | 456 | */ |
| 463 | #define CH_CFG_IDLE_ENTER_HOOK() { \ | 457 | # define CH_CFG_IDLE_ENTER_HOOK() \ |
| 464 | /* Idle-enter code here.*/ \ | 458 | { /* Idle-enter code here.*/ } |
| 465 | } | ||
| 466 | 459 | ||
| 467 | /** | 460 | /** |
| 468 | * @brief Idle thread leave hook. | 461 | * @brief Idle thread leave hook. |
| @@ -470,44 +463,39 @@ | |||
| 470 | * should be invoked from here. | 463 | * should be invoked from here. |
| 471 | * @note This macro can be used to deactivate a power saving mode. | 464 | * @note This macro can be used to deactivate a power saving mode. |
| 472 | */ | 465 | */ |
| 473 | #define CH_CFG_IDLE_LEAVE_HOOK() { \ | 466 | # define CH_CFG_IDLE_LEAVE_HOOK() \ |
| 474 | /* Idle-leave code here.*/ \ | 467 | { /* Idle-leave code here.*/ } |
| 475 | } | ||
| 476 | 468 | ||
| 477 | /** | 469 | /** |
| 478 | * @brief Idle Loop hook. | 470 | * @brief Idle Loop hook. |
| 479 | * @details This hook is continuously invoked by the idle thread loop. | 471 | * @details This hook is continuously invoked by the idle thread loop. |
| 480 | */ | 472 | */ |
| 481 | #define CH_CFG_IDLE_LOOP_HOOK() { \ | 473 | # define CH_CFG_IDLE_LOOP_HOOK() \ |
| 482 | /* Idle loop code here.*/ \ | 474 | { /* Idle loop code here.*/ } |
| 483 | } | ||
| 484 | 475 | ||
| 485 | /** | 476 | /** |
| 486 | * @brief System tick event hook. | 477 | * @brief System tick event hook. |
| 487 | * @details This hook is invoked in the system tick handler immediately | 478 | * @details This hook is invoked in the system tick handler immediately |
| 488 | * after processing the virtual timers queue. | 479 | * after processing the virtual timers queue. |
| 489 | */ | 480 | */ |
| 490 | #define CH_CFG_SYSTEM_TICK_HOOK() { \ | 481 | # define CH_CFG_SYSTEM_TICK_HOOK() \ |
| 491 | /* System tick event code here.*/ \ | 482 | { /* System tick event code here.*/ } |
| 492 | } | ||
| 493 | 483 | ||
| 494 | /** | 484 | /** |
| 495 | * @brief System halt hook. | 485 | * @brief System halt hook. |
| 496 | * @details This hook is invoked in case to a system halting error before | 486 | * @details This hook is invoked in case to a system halting error before |
| 497 | * the system is halted. | 487 | * the system is halted. |
| 498 | */ | 488 | */ |
| 499 | #define CH_CFG_SYSTEM_HALT_HOOK(reason) { \ | 489 | # define CH_CFG_SYSTEM_HALT_HOOK(reason) \ |
| 500 | /* System halt code here.*/ \ | 490 | { /* System halt code here.*/ } |
| 501 | } | ||
| 502 | 491 | ||
| 503 | /** | 492 | /** |
| 504 | * @brief Trace hook. | 493 | * @brief Trace hook. |
| 505 | * @details This hook is invoked each time a new record is written in the | 494 | * @details This hook is invoked each time a new record is written in the |
| 506 | * trace buffer. | 495 | * trace buffer. |
| 507 | */ | 496 | */ |
| 508 | #define CH_CFG_TRACE_HOOK(tep) { \ | 497 | # define CH_CFG_TRACE_HOOK(tep) \ |
| 509 | /* Trace code here.*/ \ | 498 | { /* Trace code here.*/ } |
| 510 | } | ||
| 511 | 499 | ||
| 512 | /** @} */ | 500 | /** @} */ |
| 513 | 501 | ||
| @@ -515,6 +503,6 @@ | |||
| 515 | /* Port-specific settings (override port settings defaulted in chcore.h). */ | 503 | /* Port-specific settings (override port settings defaulted in chcore.h). */ |
| 516 | /*===========================================================================*/ | 504 | /*===========================================================================*/ |
| 517 | 505 | ||
| 518 | #endif /* CHCONF_H */ | 506 | #endif /* CHCONF_H */ |
| 519 | 507 | ||
| 520 | /** @} */ | 508 | /** @} */ |
diff --git a/quantum/stm32/halconf.h b/quantum/stm32/halconf.h index a14ace02b..72e011d3d 100644 --- a/quantum/stm32/halconf.h +++ b/quantum/stm32/halconf.h | |||
| @@ -26,156 +26,156 @@ | |||
| 26 | */ | 26 | */ |
| 27 | 27 | ||
| 28 | #ifndef HALCONF_H | 28 | #ifndef HALCONF_H |
| 29 | #define HALCONF_H | 29 | # define HALCONF_H |
| 30 | 30 | ||
| 31 | #include "mcuconf.h" | 31 | # include "mcuconf.h" |
| 32 | 32 | ||
| 33 | /** | 33 | /** |
| 34 | * @brief Enables the PAL subsystem. | 34 | * @brief Enables the PAL subsystem. |
| 35 | */ | 35 | */ |
| 36 | #if !defined(HAL_USE_PAL) || defined(__DOXYGEN__) | 36 | # if !defined(HAL_USE_PAL) || defined(__DOXYGEN__) |
| 37 | #define HAL_USE_PAL TRUE | 37 | # define HAL_USE_PAL TRUE |
| 38 | #endif | 38 | # endif |
| 39 | 39 | ||
| 40 | /** | 40 | /** |
| 41 | * @brief Enables the ADC subsystem. | 41 | * @brief Enables the ADC subsystem. |
| 42 | */ | 42 | */ |
| 43 | #if !defined(HAL_USE_ADC) || defined(__DOXYGEN__) | 43 | # if !defined(HAL_USE_ADC) || defined(__DOXYGEN__) |
| 44 | #define HAL_USE_ADC FALSE | 44 | # define HAL_USE_ADC FALSE |
| 45 | #endif | 45 | # endif |
| 46 | 46 | ||
| 47 | /** | 47 | /** |
| 48 | * @brief Enables the CAN subsystem. | 48 | * @brief Enables the CAN subsystem. |
| 49 | */ | 49 | */ |
| 50 | #if !defined(HAL_USE_CAN) || defined(__DOXYGEN__) | 50 | # if !defined(HAL_USE_CAN) || defined(__DOXYGEN__) |
| 51 | #define HAL_USE_CAN FALSE | 51 | # define HAL_USE_CAN FALSE |
| 52 | #endif | 52 | # endif |
| 53 | 53 | ||
| 54 | /** | 54 | /** |
| 55 | * @brief Enables the DAC subsystem. | 55 | * @brief Enables the DAC subsystem. |
| 56 | */ | 56 | */ |
| 57 | #if !defined(HAL_USE_DAC) || defined(__DOXYGEN__) | 57 | # if !defined(HAL_USE_DAC) || defined(__DOXYGEN__) |
| 58 | #define HAL_USE_DAC TRUE | 58 | # define HAL_USE_DAC TRUE |
| 59 | #endif | 59 | # endif |
| 60 | 60 | ||
| 61 | /** | 61 | /** |
| 62 | * @brief Enables the EXT subsystem. | 62 | * @brief Enables the EXT subsystem. |
| 63 | */ | 63 | */ |
| 64 | #if !defined(HAL_USE_EXT) || defined(__DOXYGEN__) | 64 | # if !defined(HAL_USE_EXT) || defined(__DOXYGEN__) |
| 65 | #define HAL_USE_EXT FALSE | 65 | # define HAL_USE_EXT FALSE |
| 66 | #endif | 66 | # endif |
| 67 | 67 | ||
| 68 | /** | 68 | /** |
| 69 | * @brief Enables the GPT subsystem. | 69 | * @brief Enables the GPT subsystem. |
| 70 | */ | 70 | */ |
| 71 | #if !defined(HAL_USE_GPT) || defined(__DOXYGEN__) | 71 | # if !defined(HAL_USE_GPT) || defined(__DOXYGEN__) |
| 72 | #define HAL_USE_GPT TRUE | 72 | # define HAL_USE_GPT TRUE |
| 73 | #endif | 73 | # endif |
| 74 | 74 | ||
| 75 | /** | 75 | /** |
| 76 | * @brief Enables the I2C subsystem. | 76 | * @brief Enables the I2C subsystem. |
| 77 | */ | 77 | */ |
| 78 | #if !defined(HAL_USE_I2C) || defined(__DOXYGEN__) | 78 | # if !defined(HAL_USE_I2C) || defined(__DOXYGEN__) |
| 79 | #define HAL_USE_I2C TRUE | 79 | # define HAL_USE_I2C TRUE |
| 80 | #endif | 80 | # endif |
| 81 | 81 | ||
| 82 | /** | 82 | /** |
| 83 | * @brief Enables the I2S subsystem. | 83 | * @brief Enables the I2S subsystem. |
| 84 | */ | 84 | */ |
| 85 | #if !defined(HAL_USE_I2S) || defined(__DOXYGEN__) | 85 | # if !defined(HAL_USE_I2S) || defined(__DOXYGEN__) |
| 86 | #define HAL_USE_I2S FALSE | 86 | # define HAL_USE_I2S FALSE |
| 87 | #endif | 87 | # endif |
| 88 | 88 | ||
| 89 | /** | 89 | /** |
| 90 | * @brief Enables the ICU subsystem. | 90 | * @brief Enables the ICU subsystem. |
| 91 | */ | 91 | */ |
| 92 | #if !defined(HAL_USE_ICU) || defined(__DOXYGEN__) | 92 | # if !defined(HAL_USE_ICU) || defined(__DOXYGEN__) |
| 93 | #define HAL_USE_ICU FALSE | 93 | # define HAL_USE_ICU FALSE |
| 94 | #endif | 94 | # endif |
| 95 | 95 | ||
| 96 | /** | 96 | /** |
| 97 | * @brief Enables the MAC subsystem. | 97 | * @brief Enables the MAC subsystem. |
| 98 | */ | 98 | */ |
| 99 | #if !defined(HAL_USE_MAC) || defined(__DOXYGEN__) | 99 | # if !defined(HAL_USE_MAC) || defined(__DOXYGEN__) |
| 100 | #define HAL_USE_MAC FALSE | 100 | # define HAL_USE_MAC FALSE |
| 101 | #endif | 101 | # endif |
| 102 | 102 | ||
| 103 | /** | 103 | /** |
| 104 | * @brief Enables the MMC_SPI subsystem. | 104 | * @brief Enables the MMC_SPI subsystem. |
| 105 | */ | 105 | */ |
| 106 | #if !defined(HAL_USE_MMC_SPI) || defined(__DOXYGEN__) | 106 | # if !defined(HAL_USE_MMC_SPI) || defined(__DOXYGEN__) |
| 107 | #define HAL_USE_MMC_SPI FALSE | 107 | # define HAL_USE_MMC_SPI FALSE |
| 108 | #endif | 108 | # endif |
| 109 | 109 | ||
| 110 | /** | 110 | /** |
| 111 | * @brief Enables the PWM subsystem. | 111 | * @brief Enables the PWM subsystem. |
| 112 | */ | 112 | */ |
| 113 | #if !defined(HAL_USE_PWM) || defined(__DOXYGEN__) | 113 | # if !defined(HAL_USE_PWM) || defined(__DOXYGEN__) |
| 114 | #define HAL_USE_PWM TRUE | 114 | # define HAL_USE_PWM TRUE |
| 115 | #endif | 115 | # endif |
| 116 | 116 | ||
| 117 | /** | 117 | /** |
| 118 | * @brief Enables the QSPI subsystem. | 118 | * @brief Enables the QSPI subsystem. |
| 119 | */ | 119 | */ |
| 120 | #if !defined(HAL_USE_QSPI) || defined(__DOXYGEN__) | 120 | # if !defined(HAL_USE_QSPI) || defined(__DOXYGEN__) |
| 121 | #define HAL_USE_QSPI FALSE | 121 | # define HAL_USE_QSPI FALSE |
| 122 | #endif | 122 | # endif |
| 123 | 123 | ||
| 124 | /** | 124 | /** |
| 125 | * @brief Enables the RTC subsystem. | 125 | * @brief Enables the RTC subsystem. |
| 126 | */ | 126 | */ |
| 127 | #if !defined(HAL_USE_RTC) || defined(__DOXYGEN__) | 127 | # if !defined(HAL_USE_RTC) || defined(__DOXYGEN__) |
| 128 | #define HAL_USE_RTC FALSE | 128 | # define HAL_USE_RTC FALSE |
| 129 | #endif | 129 | # endif |
| 130 | 130 | ||
| 131 | /** | 131 | /** |
| 132 | * @brief Enables the SDC subsystem. | 132 | * @brief Enables the SDC subsystem. |
| 133 | */ | 133 | */ |
| 134 | #if !defined(HAL_USE_SDC) || defined(__DOXYGEN__) | 134 | # if !defined(HAL_USE_SDC) || defined(__DOXYGEN__) |
| 135 | #define HAL_USE_SDC FALSE | 135 | # define HAL_USE_SDC FALSE |
| 136 | #endif | 136 | # endif |
| 137 | 137 | ||
| 138 | /** | 138 | /** |
| 139 | * @brief Enables the SERIAL subsystem. | 139 | * @brief Enables the SERIAL subsystem. |
| 140 | */ | 140 | */ |
| 141 | #if !defined(HAL_USE_SERIAL) || defined(__DOXYGEN__) | 141 | # if !defined(HAL_USE_SERIAL) || defined(__DOXYGEN__) |
| 142 | #define HAL_USE_SERIAL FALSE | 142 | # define HAL_USE_SERIAL FALSE |
| 143 | #endif | 143 | # endif |
| 144 | 144 | ||
| 145 | /** | 145 | /** |
| 146 | * @brief Enables the SERIAL over USB subsystem. | 146 | * @brief Enables the SERIAL over USB subsystem. |
| 147 | */ | 147 | */ |
| 148 | #if !defined(HAL_USE_SERIAL_USB) || defined(__DOXYGEN__) | 148 | # if !defined(HAL_USE_SERIAL_USB) || defined(__DOXYGEN__) |
| 149 | #define HAL_USE_SERIAL_USB TRUE | 149 | # define HAL_USE_SERIAL_USB TRUE |
| 150 | #endif | 150 | # endif |
| 151 | 151 | ||
| 152 | /** | 152 | /** |
| 153 | * @brief Enables the SPI subsystem. | 153 | * @brief Enables the SPI subsystem. |
| 154 | */ | 154 | */ |
| 155 | #if !defined(HAL_USE_SPI) || defined(__DOXYGEN__) | 155 | # if !defined(HAL_USE_SPI) || defined(__DOXYGEN__) |
| 156 | #define HAL_USE_SPI FALSE | 156 | # define HAL_USE_SPI FALSE |
| 157 | #endif | 157 | # endif |
| 158 | 158 | ||
| 159 | /** | 159 | /** |
| 160 | * @brief Enables the UART subsystem. | 160 | * @brief Enables the UART subsystem. |
| 161 | */ | 161 | */ |
| 162 | #if !defined(HAL_USE_UART) || defined(__DOXYGEN__) | 162 | # if !defined(HAL_USE_UART) || defined(__DOXYGEN__) |
| 163 | #define HAL_USE_UART FALSE | 163 | # define HAL_USE_UART FALSE |
| 164 | #endif | 164 | # endif |
| 165 | 165 | ||
| 166 | /** | 166 | /** |
| 167 | * @brief Enables the USB subsystem. | 167 | * @brief Enables the USB subsystem. |
| 168 | */ | 168 | */ |
| 169 | #if !defined(HAL_USE_USB) || defined(__DOXYGEN__) | 169 | # if !defined(HAL_USE_USB) || defined(__DOXYGEN__) |
| 170 | #define HAL_USE_USB TRUE | 170 | # define HAL_USE_USB TRUE |
| 171 | #endif | 171 | # endif |
| 172 | 172 | ||
| 173 | /** | 173 | /** |
| 174 | * @brief Enables the WDG subsystem. | 174 | * @brief Enables the WDG subsystem. |
| 175 | */ | 175 | */ |
| 176 | #if !defined(HAL_USE_WDG) || defined(__DOXYGEN__) | 176 | # if !defined(HAL_USE_WDG) || defined(__DOXYGEN__) |
| 177 | #define HAL_USE_WDG FALSE | 177 | # define HAL_USE_WDG FALSE |
| 178 | #endif | 178 | # endif |
| 179 | 179 | ||
| 180 | /*===========================================================================*/ | 180 | /*===========================================================================*/ |
| 181 | /* ADC driver related settings. */ | 181 | /* ADC driver related settings. */ |
| @@ -185,17 +185,17 @@ | |||
| 185 | * @brief Enables synchronous APIs. | 185 | * @brief Enables synchronous APIs. |
| 186 | * @note Disabling this option saves both code and data space. | 186 | * @note Disabling this option saves both code and data space. |
| 187 | */ | 187 | */ |
| 188 | #if !defined(ADC_USE_WAIT) || defined(__DOXYGEN__) | 188 | # if !defined(ADC_USE_WAIT) || defined(__DOXYGEN__) |
| 189 | #define ADC_USE_WAIT TRUE | 189 | # define ADC_USE_WAIT TRUE |
| 190 | #endif | 190 | # endif |
| 191 | 191 | ||
| 192 | /** | 192 | /** |
| 193 | * @brief Enables the @p adcAcquireBus() and @p adcReleaseBus() APIs. | 193 | * @brief Enables the @p adcAcquireBus() and @p adcReleaseBus() APIs. |
| 194 | * @note Disabling this option saves both code and data space. | 194 | * @note Disabling this option saves both code and data space. |
| 195 | */ | 195 | */ |
| 196 | #if !defined(ADC_USE_MUTUAL_EXCLUSION) || defined(__DOXYGEN__) | 196 | # if !defined(ADC_USE_MUTUAL_EXCLUSION) || defined(__DOXYGEN__) |
| 197 | #define ADC_USE_MUTUAL_EXCLUSION TRUE | 197 | # define ADC_USE_MUTUAL_EXCLUSION TRUE |
| 198 | #endif | 198 | # endif |
| 199 | 199 | ||
| 200 | /*===========================================================================*/ | 200 | /*===========================================================================*/ |
| 201 | /* CAN driver related settings. */ | 201 | /* CAN driver related settings. */ |
| @@ -204,9 +204,9 @@ | |||
| 204 | /** | 204 | /** |
| 205 | * @brief Sleep mode related APIs inclusion switch. | 205 | * @brief Sleep mode related APIs inclusion switch. |
| 206 | */ | 206 | */ |
| 207 | #if !defined(CAN_USE_SLEEP_MODE) || defined(__DOXYGEN__) | 207 | # if !defined(CAN_USE_SLEEP_MODE) || defined(__DOXYGEN__) |
| 208 | #define CAN_USE_SLEEP_MODE TRUE | 208 | # define CAN_USE_SLEEP_MODE TRUE |
| 209 | #endif | 209 | # endif |
| 210 | 210 | ||
| 211 | /*===========================================================================*/ | 211 | /*===========================================================================*/ |
| 212 | /* I2C driver related settings. */ | 212 | /* I2C driver related settings. */ |
| @@ -215,9 +215,9 @@ | |||
| 215 | /** | 215 | /** |
| 216 | * @brief Enables the mutual exclusion APIs on the I2C bus. | 216 | * @brief Enables the mutual exclusion APIs on the I2C bus. |
| 217 | */ | 217 | */ |
| 218 | #if !defined(I2C_USE_MUTUAL_EXCLUSION) || defined(__DOXYGEN__) | 218 | # if !defined(I2C_USE_MUTUAL_EXCLUSION) || defined(__DOXYGEN__) |
| 219 | #define I2C_USE_MUTUAL_EXCLUSION TRUE | 219 | # define I2C_USE_MUTUAL_EXCLUSION TRUE |
| 220 | #endif | 220 | # endif |
| 221 | 221 | ||
| 222 | /*===========================================================================*/ | 222 | /*===========================================================================*/ |
| 223 | /* MAC driver related settings. */ | 223 | /* MAC driver related settings. */ |
| @@ -226,16 +226,16 @@ | |||
| 226 | /** | 226 | /** |
| 227 | * @brief Enables an event sources for incoming packets. | 227 | * @brief Enables an event sources for incoming packets. |
| 228 | */ | 228 | */ |
| 229 | #if !defined(MAC_USE_ZERO_COPY) || defined(__DOXYGEN__) | 229 | # if !defined(MAC_USE_ZERO_COPY) || defined(__DOXYGEN__) |
| 230 | #define MAC_USE_ZERO_COPY FALSE | 230 | # define MAC_USE_ZERO_COPY FALSE |
| 231 | #endif | 231 | # endif |
| 232 | 232 | ||
| 233 | /** | 233 | /** |
| 234 | * @brief Enables an event sources for incoming packets. | 234 | * @brief Enables an event sources for incoming packets. |
| 235 | */ | 235 | */ |
| 236 | #if !defined(MAC_USE_EVENTS) || defined(__DOXYGEN__) | 236 | # if !defined(MAC_USE_EVENTS) || defined(__DOXYGEN__) |
| 237 | #define MAC_USE_EVENTS TRUE | 237 | # define MAC_USE_EVENTS TRUE |
| 238 | #endif | 238 | # endif |
| 239 | 239 | ||
| 240 | /*===========================================================================*/ | 240 | /*===========================================================================*/ |
| 241 | /* MMC_SPI driver related settings. */ | 241 | /* MMC_SPI driver related settings. */ |
| @@ -249,9 +249,9 @@ | |||
| 249 | * This option is recommended also if the SPI driver does not | 249 | * This option is recommended also if the SPI driver does not |
| 250 | * use a DMA channel and heavily loads the CPU. | 250 | * use a DMA channel and heavily loads the CPU. |
| 251 | */ | 251 | */ |
| 252 | #if !defined(MMC_NICE_WAITING) || defined(__DOXYGEN__) | 252 | # if !defined(MMC_NICE_WAITING) || defined(__DOXYGEN__) |
| 253 | #define MMC_NICE_WAITING TRUE | 253 | # define MMC_NICE_WAITING TRUE |
| 254 | #endif | 254 | # endif |
| 255 | 255 | ||
| 256 | /*===========================================================================*/ | 256 | /*===========================================================================*/ |
| 257 | /* SDC driver related settings. */ | 257 | /* SDC driver related settings. */ |
| @@ -261,18 +261,18 @@ | |||
| 261 | * @brief Number of initialization attempts before rejecting the card. | 261 | * @brief Number of initialization attempts before rejecting the card. |
| 262 | * @note Attempts are performed at 10mS intervals. | 262 | * @note Attempts are performed at 10mS intervals. |
| 263 | */ | 263 | */ |
| 264 | #if !defined(SDC_INIT_RETRY) || defined(__DOXYGEN__) | 264 | # if !defined(SDC_INIT_RETRY) || defined(__DOXYGEN__) |
| 265 | #define SDC_INIT_RETRY 100 | 265 | # define SDC_INIT_RETRY 100 |
| 266 | #endif | 266 | # endif |
| 267 | 267 | ||
| 268 | /** | 268 | /** |
| 269 | * @brief Include support for MMC cards. | 269 | * @brief Include support for MMC cards. |
| 270 | * @note MMC support is not yet implemented so this option must be kept | 270 | * @note MMC support is not yet implemented so this option must be kept |
| 271 | * at @p FALSE. | 271 | * at @p FALSE. |
| 272 | */ | 272 | */ |
| 273 | #if !defined(SDC_MMC_SUPPORT) || defined(__DOXYGEN__) | 273 | # if !defined(SDC_MMC_SUPPORT) || defined(__DOXYGEN__) |
| 274 | #define SDC_MMC_SUPPORT FALSE | 274 | # define SDC_MMC_SUPPORT FALSE |
| 275 | #endif | 275 | # endif |
| 276 | 276 | ||
| 277 | /** | 277 | /** |
| 278 | * @brief Delays insertions. | 278 | * @brief Delays insertions. |
| @@ -280,9 +280,9 @@ | |||
| 280 | * routines releasing some extra CPU time for the threads with | 280 | * routines releasing some extra CPU time for the threads with |
| 281 | * lower priority, this may slow down the driver a bit however. | 281 | * lower priority, this may slow down the driver a bit however. |
| 282 | */ | 282 | */ |
| 283 | #if !defined(SDC_NICE_WAITING) || defined(__DOXYGEN__) | 283 | # if !defined(SDC_NICE_WAITING) || defined(__DOXYGEN__) |
| 284 | #define SDC_NICE_WAITING TRUE | 284 | # define SDC_NICE_WAITING TRUE |
| 285 | #endif | 285 | # endif |
| 286 | 286 | ||
| 287 | /*===========================================================================*/ | 287 | /*===========================================================================*/ |
| 288 | /* SERIAL driver related settings. */ | 288 | /* SERIAL driver related settings. */ |
| @@ -293,9 +293,9 @@ | |||
| 293 | * @details Configuration parameter, this is the baud rate selected for the | 293 | * @details Configuration parameter, this is the baud rate selected for the |
| 294 | * default configuration. | 294 | * default configuration. |
| 295 | */ | 295 | */ |
| 296 | #if !defined(SERIAL_DEFAULT_BITRATE) || defined(__DOXYGEN__) | 296 | # if !defined(SERIAL_DEFAULT_BITRATE) || defined(__DOXYGEN__) |
| 297 | #define SERIAL_DEFAULT_BITRATE 38400 | 297 | # define SERIAL_DEFAULT_BITRATE 38400 |
| 298 | #endif | 298 | # endif |
| 299 | 299 | ||
| 300 | /** | 300 | /** |
| 301 | * @brief Serial buffers size. | 301 | * @brief Serial buffers size. |
| @@ -304,9 +304,9 @@ | |||
| 304 | * @note The default is 16 bytes for both the transmission and receive | 304 | * @note The default is 16 bytes for both the transmission and receive |
| 305 | * buffers. | 305 | * buffers. |
| 306 | */ | 306 | */ |
| 307 | #if !defined(SERIAL_BUFFERS_SIZE) || defined(__DOXYGEN__) | 307 | # if !defined(SERIAL_BUFFERS_SIZE) || defined(__DOXYGEN__) |
| 308 | #define SERIAL_BUFFERS_SIZE 16 | 308 | # define SERIAL_BUFFERS_SIZE 16 |
| 309 | #endif | 309 | # endif |
| 310 | 310 | ||
| 311 | /*===========================================================================*/ | 311 | /*===========================================================================*/ |
| 312 | /* SERIAL_USB driver related setting. */ | 312 | /* SERIAL_USB driver related setting. */ |
| @@ -319,17 +319,17 @@ | |||
| 319 | * @note The default is 256 bytes for both the transmission and receive | 319 | * @note The default is 256 bytes for both the transmission and receive |
| 320 | * buffers. | 320 | * buffers. |
| 321 | */ | 321 | */ |
| 322 | #if !defined(SERIAL_USB_BUFFERS_SIZE) || defined(__DOXYGEN__) | 322 | # if !defined(SERIAL_USB_BUFFERS_SIZE) || defined(__DOXYGEN__) |
| 323 | #define SERIAL_USB_BUFFERS_SIZE 1 | 323 | # define SERIAL_USB_BUFFERS_SIZE 1 |
| 324 | #endif | 324 | # endif |
| 325 | 325 | ||
| 326 | /** | 326 | /** |
| 327 | * @brief Serial over USB number of buffers. | 327 | * @brief Serial over USB number of buffers. |
| 328 | * @note The default is 2 buffers. | 328 | * @note The default is 2 buffers. |
| 329 | */ | 329 | */ |
| 330 | #if !defined(SERIAL_USB_BUFFERS_NUMBER) || defined(__DOXYGEN__) | 330 | # if !defined(SERIAL_USB_BUFFERS_NUMBER) || defined(__DOXYGEN__) |
| 331 | #define SERIAL_USB_BUFFERS_NUMBER 2 | 331 | # define SERIAL_USB_BUFFERS_NUMBER 2 |
| 332 | #endif | 332 | # endif |
| 333 | 333 | ||
| 334 | /*===========================================================================*/ | 334 | /*===========================================================================*/ |
| 335 | /* SPI driver related settings. */ | 335 | /* SPI driver related settings. */ |
| @@ -339,17 +339,17 @@ | |||
| 339 | * @brief Enables synchronous APIs. | 339 | * @brief Enables synchronous APIs. |
| 340 | * @note Disabling this option saves both code and data space. | 340 | * @note Disabling this option saves both code and data space. |
| 341 | */ | 341 | */ |
| 342 | #if !defined(SPI_USE_WAIT) || defined(__DOXYGEN__) | 342 | # if !defined(SPI_USE_WAIT) || defined(__DOXYGEN__) |
| 343 | #define SPI_USE_WAIT TRUE | 343 | # define SPI_USE_WAIT TRUE |
| 344 | #endif | 344 | # endif |
| 345 | 345 | ||
| 346 | /** | 346 | /** |
| 347 | * @brief Enables the @p spiAcquireBus() and @p spiReleaseBus() APIs. | 347 | * @brief Enables the @p spiAcquireBus() and @p spiReleaseBus() APIs. |
| 348 | * @note Disabling this option saves both code and data space. | 348 | * @note Disabling this option saves both code and data space. |
| 349 | */ | 349 | */ |
| 350 | #if !defined(SPI_USE_MUTUAL_EXCLUSION) || defined(__DOXYGEN__) | 350 | # if !defined(SPI_USE_MUTUAL_EXCLUSION) || defined(__DOXYGEN__) |
| 351 | #define SPI_USE_MUTUAL_EXCLUSION TRUE | 351 | # define SPI_USE_MUTUAL_EXCLUSION TRUE |
| 352 | #endif | 352 | # endif |
| 353 | 353 | ||
| 354 | /*===========================================================================*/ | 354 | /*===========================================================================*/ |
| 355 | /* UART driver related settings. */ | 355 | /* UART driver related settings. */ |
| @@ -359,17 +359,17 @@ | |||
| 359 | * @brief Enables synchronous APIs. | 359 | * @brief Enables synchronous APIs. |
| 360 | * @note Disabling this option saves both code and data space. | 360 | * @note Disabling this option saves both code and data space. |
| 361 | */ | 361 | */ |
| 362 | #if !defined(UART_USE_WAIT) || defined(__DOXYGEN__) | 362 | # if !defined(UART_USE_WAIT) || defined(__DOXYGEN__) |
| 363 | #define UART_USE_WAIT FALSE | 363 | # define UART_USE_WAIT FALSE |
| 364 | #endif | 364 | # endif |
| 365 | 365 | ||
| 366 | /** | 366 | /** |
| 367 | * @brief Enables the @p uartAcquireBus() and @p uartReleaseBus() APIs. | 367 | * @brief Enables the @p uartAcquireBus() and @p uartReleaseBus() APIs. |
| 368 | * @note Disabling this option saves both code and data space. | 368 | * @note Disabling this option saves both code and data space. |
| 369 | */ | 369 | */ |
| 370 | #if !defined(UART_USE_MUTUAL_EXCLUSION) || defined(__DOXYGEN__) | 370 | # if !defined(UART_USE_MUTUAL_EXCLUSION) || defined(__DOXYGEN__) |
| 371 | #define UART_USE_MUTUAL_EXCLUSION FALSE | 371 | # define UART_USE_MUTUAL_EXCLUSION FALSE |
| 372 | #endif | 372 | # endif |
| 373 | 373 | ||
| 374 | /*===========================================================================*/ | 374 | /*===========================================================================*/ |
| 375 | /* USB driver related settings. */ | 375 | /* USB driver related settings. */ |
| @@ -379,9 +379,9 @@ | |||
| 379 | * @brief Enables synchronous APIs. | 379 | * @brief Enables synchronous APIs. |
| 380 | * @note Disabling this option saves both code and data space. | 380 | * @note Disabling this option saves both code and data space. |
| 381 | */ | 381 | */ |
| 382 | #if !defined(USB_USE_WAIT) || defined(__DOXYGEN__) | 382 | # if !defined(USB_USE_WAIT) || defined(__DOXYGEN__) |
| 383 | #define USB_USE_WAIT TRUE | 383 | # define USB_USE_WAIT TRUE |
| 384 | #endif | 384 | # endif |
| 385 | 385 | ||
| 386 | #endif /* HALCONF_H */ | 386 | #endif /* HALCONF_H */ |
| 387 | 387 | ||
diff --git a/quantum/stm32/mcuconf.h b/quantum/stm32/mcuconf.h index 32a73fb38..4490dfed7 100644 --- a/quantum/stm32/mcuconf.h +++ b/quantum/stm32/mcuconf.h | |||
| @@ -36,35 +36,35 @@ | |||
| 36 | /* | 36 | /* |
| 37 | * HAL driver system settings. | 37 | * HAL driver system settings. |
| 38 | */ | 38 | */ |
| 39 | #define STM32_NO_INIT FALSE | 39 | #define STM32_NO_INIT FALSE |
| 40 | #define STM32_PVD_ENABLE FALSE | 40 | #define STM32_PVD_ENABLE FALSE |
| 41 | #define STM32_PLS STM32_PLS_LEV0 | 41 | #define STM32_PLS STM32_PLS_LEV0 |
| 42 | #define STM32_HSI_ENABLED TRUE | 42 | #define STM32_HSI_ENABLED TRUE |
| 43 | #define STM32_LSI_ENABLED TRUE | 43 | #define STM32_LSI_ENABLED TRUE |
| 44 | #define STM32_HSE_ENABLED TRUE | 44 | #define STM32_HSE_ENABLED TRUE |
| 45 | #define STM32_LSE_ENABLED FALSE | 45 | #define STM32_LSE_ENABLED FALSE |
| 46 | #define STM32_SW STM32_SW_PLL | 46 | #define STM32_SW STM32_SW_PLL |
| 47 | #define STM32_PLLSRC STM32_PLLSRC_HSE | 47 | #define STM32_PLLSRC STM32_PLLSRC_HSE |
| 48 | #define STM32_PREDIV_VALUE 1 | 48 | #define STM32_PREDIV_VALUE 1 |
| 49 | #define STM32_PLLMUL_VALUE 9 | 49 | #define STM32_PLLMUL_VALUE 9 |
| 50 | #define STM32_HPRE STM32_HPRE_DIV1 | 50 | #define STM32_HPRE STM32_HPRE_DIV1 |
| 51 | #define STM32_PPRE1 STM32_PPRE1_DIV2 | 51 | #define STM32_PPRE1 STM32_PPRE1_DIV2 |
| 52 | #define STM32_PPRE2 STM32_PPRE2_DIV2 | 52 | #define STM32_PPRE2 STM32_PPRE2_DIV2 |
| 53 | #define STM32_MCOSEL STM32_MCOSEL_NOCLOCK | 53 | #define STM32_MCOSEL STM32_MCOSEL_NOCLOCK |
| 54 | #define STM32_ADC12PRES STM32_ADC12PRES_DIV1 | 54 | #define STM32_ADC12PRES STM32_ADC12PRES_DIV1 |
| 55 | #define STM32_ADC34PRES STM32_ADC34PRES_DIV1 | 55 | #define STM32_ADC34PRES STM32_ADC34PRES_DIV1 |
| 56 | #define STM32_USART1SW STM32_USART1SW_PCLK | 56 | #define STM32_USART1SW STM32_USART1SW_PCLK |
| 57 | #define STM32_USART2SW STM32_USART2SW_PCLK | 57 | #define STM32_USART2SW STM32_USART2SW_PCLK |
| 58 | #define STM32_USART3SW STM32_USART3SW_PCLK | 58 | #define STM32_USART3SW STM32_USART3SW_PCLK |
| 59 | #define STM32_UART4SW STM32_UART4SW_PCLK | 59 | #define STM32_UART4SW STM32_UART4SW_PCLK |
| 60 | #define STM32_UART5SW STM32_UART5SW_PCLK | 60 | #define STM32_UART5SW STM32_UART5SW_PCLK |
| 61 | #define STM32_I2C1SW STM32_I2C1SW_SYSCLK | 61 | #define STM32_I2C1SW STM32_I2C1SW_SYSCLK |
| 62 | #define STM32_I2C2SW STM32_I2C2SW_SYSCLK | 62 | #define STM32_I2C2SW STM32_I2C2SW_SYSCLK |
| 63 | #define STM32_TIM1SW STM32_TIM1SW_PCLK2 | 63 | #define STM32_TIM1SW STM32_TIM1SW_PCLK2 |
| 64 | #define STM32_TIM8SW STM32_TIM8SW_PCLK2 | 64 | #define STM32_TIM8SW STM32_TIM8SW_PCLK2 |
| 65 | #define STM32_RTCSEL STM32_RTCSEL_LSI | 65 | #define STM32_RTCSEL STM32_RTCSEL_LSI |
| 66 | #define STM32_USB_CLOCK_REQUIRED TRUE | 66 | #define STM32_USB_CLOCK_REQUIRED TRUE |
| 67 | #define STM32_USBPRE STM32_USBPRE_DIV1P5 | 67 | #define STM32_USBPRE STM32_USBPRE_DIV1P5 |
| 68 | 68 | ||
| 69 | #undef STM32_HSE_BYPASS | 69 | #undef STM32_HSE_BYPASS |
| 70 | // #error "oh no" | 70 | // #error "oh no" |
| @@ -73,185 +73,185 @@ | |||
| 73 | /* | 73 | /* |
| 74 | * ADC driver system settings. | 74 | * ADC driver system settings. |
| 75 | */ | 75 | */ |
| 76 | #define STM32_ADC_DUAL_MODE FALSE | 76 | #define STM32_ADC_DUAL_MODE FALSE |
| 77 | #define STM32_ADC_COMPACT_SAMPLES FALSE | 77 | #define STM32_ADC_COMPACT_SAMPLES FALSE |
| 78 | #define STM32_ADC_USE_ADC1 FALSE | 78 | #define STM32_ADC_USE_ADC1 FALSE |
| 79 | #define STM32_ADC_USE_ADC2 FALSE | 79 | #define STM32_ADC_USE_ADC2 FALSE |
| 80 | #define STM32_ADC_USE_ADC3 FALSE | 80 | #define STM32_ADC_USE_ADC3 FALSE |
| 81 | #define STM32_ADC_USE_ADC4 FALSE | 81 | #define STM32_ADC_USE_ADC4 FALSE |
| 82 | #define STM32_ADC_ADC1_DMA_STREAM STM32_DMA_STREAM_ID(1, 1) | 82 | #define STM32_ADC_ADC1_DMA_STREAM STM32_DMA_STREAM_ID(1, 1) |
| 83 | #define STM32_ADC_ADC2_DMA_STREAM STM32_DMA_STREAM_ID(2, 1) | 83 | #define STM32_ADC_ADC2_DMA_STREAM STM32_DMA_STREAM_ID(2, 1) |
| 84 | #define STM32_ADC_ADC3_DMA_STREAM STM32_DMA_STREAM_ID(2, 5) | 84 | #define STM32_ADC_ADC3_DMA_STREAM STM32_DMA_STREAM_ID(2, 5) |
| 85 | #define STM32_ADC_ADC4_DMA_STREAM STM32_DMA_STREAM_ID(2, 2) | 85 | #define STM32_ADC_ADC4_DMA_STREAM STM32_DMA_STREAM_ID(2, 2) |
| 86 | #define STM32_ADC_ADC1_DMA_PRIORITY 2 | 86 | #define STM32_ADC_ADC1_DMA_PRIORITY 2 |
| 87 | #define STM32_ADC_ADC2_DMA_PRIORITY 2 | 87 | #define STM32_ADC_ADC2_DMA_PRIORITY 2 |
| 88 | #define STM32_ADC_ADC3_DMA_PRIORITY 2 | 88 | #define STM32_ADC_ADC3_DMA_PRIORITY 2 |
| 89 | #define STM32_ADC_ADC4_DMA_PRIORITY 2 | 89 | #define STM32_ADC_ADC4_DMA_PRIORITY 2 |
| 90 | #define STM32_ADC_ADC12_IRQ_PRIORITY 5 | 90 | #define STM32_ADC_ADC12_IRQ_PRIORITY 5 |
| 91 | #define STM32_ADC_ADC3_IRQ_PRIORITY 5 | 91 | #define STM32_ADC_ADC3_IRQ_PRIORITY 5 |
| 92 | #define STM32_ADC_ADC4_IRQ_PRIORITY 5 | 92 | #define STM32_ADC_ADC4_IRQ_PRIORITY 5 |
| 93 | #define STM32_ADC_ADC1_DMA_IRQ_PRIORITY 5 | 93 | #define STM32_ADC_ADC1_DMA_IRQ_PRIORITY 5 |
| 94 | #define STM32_ADC_ADC2_DMA_IRQ_PRIORITY 5 | 94 | #define STM32_ADC_ADC2_DMA_IRQ_PRIORITY 5 |
| 95 | #define STM32_ADC_ADC3_DMA_IRQ_PRIORITY 5 | 95 | #define STM32_ADC_ADC3_DMA_IRQ_PRIORITY 5 |
| 96 | #define STM32_ADC_ADC4_DMA_IRQ_PRIORITY 5 | 96 | #define STM32_ADC_ADC4_DMA_IRQ_PRIORITY 5 |
| 97 | #define STM32_ADC_ADC12_CLOCK_MODE ADC_CCR_CKMODE_AHB_DIV1 | 97 | #define STM32_ADC_ADC12_CLOCK_MODE ADC_CCR_CKMODE_AHB_DIV1 |
| 98 | #define STM32_ADC_ADC34_CLOCK_MODE ADC_CCR_CKMODE_AHB_DIV1 | 98 | #define STM32_ADC_ADC34_CLOCK_MODE ADC_CCR_CKMODE_AHB_DIV1 |
| 99 | 99 | ||
| 100 | /* | 100 | /* |
| 101 | * CAN driver system settings. | 101 | * CAN driver system settings. |
| 102 | */ | 102 | */ |
| 103 | #define STM32_CAN_USE_CAN1 FALSE | 103 | #define STM32_CAN_USE_CAN1 FALSE |
| 104 | #define STM32_CAN_CAN1_IRQ_PRIORITY 11 | 104 | #define STM32_CAN_CAN1_IRQ_PRIORITY 11 |
| 105 | 105 | ||
| 106 | /* | 106 | /* |
| 107 | * DAC driver system settings. | 107 | * DAC driver system settings. |
| 108 | */ | 108 | */ |
| 109 | #define STM32_DAC_DUAL_MODE FALSE | 109 | #define STM32_DAC_DUAL_MODE FALSE |
| 110 | #define STM32_DAC_USE_DAC1_CH1 TRUE | 110 | #define STM32_DAC_USE_DAC1_CH1 TRUE |
| 111 | #define STM32_DAC_USE_DAC1_CH2 TRUE | 111 | #define STM32_DAC_USE_DAC1_CH2 TRUE |
| 112 | #define STM32_DAC_DAC1_CH1_IRQ_PRIORITY 10 | 112 | #define STM32_DAC_DAC1_CH1_IRQ_PRIORITY 10 |
| 113 | #define STM32_DAC_DAC1_CH2_IRQ_PRIORITY 10 | 113 | #define STM32_DAC_DAC1_CH2_IRQ_PRIORITY 10 |
| 114 | #define STM32_DAC_DAC1_CH1_DMA_PRIORITY 2 | 114 | #define STM32_DAC_DAC1_CH1_DMA_PRIORITY 2 |
| 115 | #define STM32_DAC_DAC1_CH2_DMA_PRIORITY 2 | 115 | #define STM32_DAC_DAC1_CH2_DMA_PRIORITY 2 |
| 116 | 116 | ||
| 117 | /* | 117 | /* |
| 118 | * EXT driver system settings. | 118 | * EXT driver system settings. |
| 119 | */ | 119 | */ |
| 120 | #define STM32_EXT_EXTI0_IRQ_PRIORITY 6 | 120 | #define STM32_EXT_EXTI0_IRQ_PRIORITY 6 |
| 121 | #define STM32_EXT_EXTI1_IRQ_PRIORITY 6 | 121 | #define STM32_EXT_EXTI1_IRQ_PRIORITY 6 |
| 122 | #define STM32_EXT_EXTI2_IRQ_PRIORITY 6 | 122 | #define STM32_EXT_EXTI2_IRQ_PRIORITY 6 |
| 123 | #define STM32_EXT_EXTI3_IRQ_PRIORITY 6 | 123 | #define STM32_EXT_EXTI3_IRQ_PRIORITY 6 |
| 124 | #define STM32_EXT_EXTI4_IRQ_PRIORITY 6 | 124 | #define STM32_EXT_EXTI4_IRQ_PRIORITY 6 |
| 125 | #define STM32_EXT_EXTI5_9_IRQ_PRIORITY 6 | 125 | #define STM32_EXT_EXTI5_9_IRQ_PRIORITY 6 |
| 126 | #define STM32_EXT_EXTI10_15_IRQ_PRIORITY 6 | 126 | #define STM32_EXT_EXTI10_15_IRQ_PRIORITY 6 |
| 127 | #define STM32_EXT_EXTI16_IRQ_PRIORITY 6 | 127 | #define STM32_EXT_EXTI16_IRQ_PRIORITY 6 |
| 128 | #define STM32_EXT_EXTI17_IRQ_PRIORITY 6 | 128 | #define STM32_EXT_EXTI17_IRQ_PRIORITY 6 |
| 129 | #define STM32_EXT_EXTI18_IRQ_PRIORITY 6 | 129 | #define STM32_EXT_EXTI18_IRQ_PRIORITY 6 |
| 130 | #define STM32_EXT_EXTI19_IRQ_PRIORITY 6 | 130 | #define STM32_EXT_EXTI19_IRQ_PRIORITY 6 |
| 131 | #define STM32_EXT_EXTI20_IRQ_PRIORITY 6 | 131 | #define STM32_EXT_EXTI20_IRQ_PRIORITY 6 |
| 132 | #define STM32_EXT_EXTI21_22_29_IRQ_PRIORITY 6 | 132 | #define STM32_EXT_EXTI21_22_29_IRQ_PRIORITY 6 |
| 133 | #define STM32_EXT_EXTI30_32_IRQ_PRIORITY 6 | 133 | #define STM32_EXT_EXTI30_32_IRQ_PRIORITY 6 |
| 134 | #define STM32_EXT_EXTI33_IRQ_PRIORITY 6 | 134 | #define STM32_EXT_EXTI33_IRQ_PRIORITY 6 |
| 135 | 135 | ||
| 136 | /* | 136 | /* |
| 137 | * GPT driver system settings. | 137 | * GPT driver system settings. |
| 138 | */ | 138 | */ |
| 139 | #define STM32_GPT_USE_TIM1 FALSE | 139 | #define STM32_GPT_USE_TIM1 FALSE |
| 140 | #define STM32_GPT_USE_TIM2 FALSE | 140 | #define STM32_GPT_USE_TIM2 FALSE |
| 141 | #define STM32_GPT_USE_TIM3 FALSE | 141 | #define STM32_GPT_USE_TIM3 FALSE |
| 142 | #define STM32_GPT_USE_TIM4 FALSE | 142 | #define STM32_GPT_USE_TIM4 FALSE |
| 143 | #define STM32_GPT_USE_TIM6 TRUE | 143 | #define STM32_GPT_USE_TIM6 TRUE |
| 144 | #define STM32_GPT_USE_TIM7 TRUE | 144 | #define STM32_GPT_USE_TIM7 TRUE |
| 145 | #define STM32_GPT_USE_TIM8 TRUE | 145 | #define STM32_GPT_USE_TIM8 TRUE |
| 146 | #define STM32_GPT_TIM1_IRQ_PRIORITY 7 | 146 | #define STM32_GPT_TIM1_IRQ_PRIORITY 7 |
| 147 | #define STM32_GPT_TIM2_IRQ_PRIORITY 7 | 147 | #define STM32_GPT_TIM2_IRQ_PRIORITY 7 |
| 148 | #define STM32_GPT_TIM3_IRQ_PRIORITY 7 | 148 | #define STM32_GPT_TIM3_IRQ_PRIORITY 7 |
| 149 | #define STM32_GPT_TIM4_IRQ_PRIORITY 7 | 149 | #define STM32_GPT_TIM4_IRQ_PRIORITY 7 |
| 150 | #define STM32_GPT_TIM6_IRQ_PRIORITY 7 | 150 | #define STM32_GPT_TIM6_IRQ_PRIORITY 7 |
| 151 | #define STM32_GPT_TIM7_IRQ_PRIORITY 7 | 151 | #define STM32_GPT_TIM7_IRQ_PRIORITY 7 |
| 152 | #define STM32_GPT_TIM8_IRQ_PRIORITY 7 | 152 | #define STM32_GPT_TIM8_IRQ_PRIORITY 7 |
| 153 | 153 | ||
| 154 | /* | 154 | /* |
| 155 | * I2C driver system settings. | 155 | * I2C driver system settings. |
| 156 | */ | 156 | */ |
| 157 | #define STM32_I2C_USE_I2C1 TRUE | 157 | #define STM32_I2C_USE_I2C1 TRUE |
| 158 | #define STM32_I2C_USE_I2C2 FALSE | 158 | #define STM32_I2C_USE_I2C2 FALSE |
| 159 | #define STM32_I2C_BUSY_TIMEOUT 50 | 159 | #define STM32_I2C_BUSY_TIMEOUT 50 |
| 160 | #define STM32_I2C_I2C1_IRQ_PRIORITY 10 | 160 | #define STM32_I2C_I2C1_IRQ_PRIORITY 10 |
| 161 | #define STM32_I2C_I2C2_IRQ_PRIORITY 10 | 161 | #define STM32_I2C_I2C2_IRQ_PRIORITY 10 |
| 162 | #define STM32_I2C_USE_DMA TRUE | 162 | #define STM32_I2C_USE_DMA TRUE |
| 163 | #define STM32_I2C_I2C1_DMA_PRIORITY 1 | 163 | #define STM32_I2C_I2C1_DMA_PRIORITY 1 |
| 164 | #define STM32_I2C_I2C2_DMA_PRIORITY 1 | 164 | #define STM32_I2C_I2C2_DMA_PRIORITY 1 |
| 165 | #define STM32_I2C_DMA_ERROR_HOOK(i2cp) osalSysHalt("DMA failure") | 165 | #define STM32_I2C_DMA_ERROR_HOOK(i2cp) osalSysHalt("DMA failure") |
| 166 | 166 | ||
| 167 | /* | 167 | /* |
| 168 | * ICU driver system settings. | 168 | * ICU driver system settings. |
| 169 | */ | 169 | */ |
| 170 | #define STM32_ICU_USE_TIM1 FALSE | 170 | #define STM32_ICU_USE_TIM1 FALSE |
| 171 | #define STM32_ICU_USE_TIM2 FALSE | 171 | #define STM32_ICU_USE_TIM2 FALSE |
| 172 | #define STM32_ICU_USE_TIM3 FALSE | 172 | #define STM32_ICU_USE_TIM3 FALSE |
| 173 | #define STM32_ICU_USE_TIM4 FALSE | 173 | #define STM32_ICU_USE_TIM4 FALSE |
| 174 | #define STM32_ICU_USE_TIM8 FALSE | 174 | #define STM32_ICU_USE_TIM8 FALSE |
| 175 | #define STM32_ICU_TIM1_IRQ_PRIORITY 7 | 175 | #define STM32_ICU_TIM1_IRQ_PRIORITY 7 |
| 176 | #define STM32_ICU_TIM2_IRQ_PRIORITY 7 | 176 | #define STM32_ICU_TIM2_IRQ_PRIORITY 7 |
| 177 | #define STM32_ICU_TIM3_IRQ_PRIORITY 7 | 177 | #define STM32_ICU_TIM3_IRQ_PRIORITY 7 |
| 178 | #define STM32_ICU_TIM4_IRQ_PRIORITY 7 | 178 | #define STM32_ICU_TIM4_IRQ_PRIORITY 7 |
| 179 | #define STM32_ICU_TIM8_IRQ_PRIORITY 7 | 179 | #define STM32_ICU_TIM8_IRQ_PRIORITY 7 |
| 180 | 180 | ||
| 181 | /* | 181 | /* |
| 182 | * PWM driver system settings. | 182 | * PWM driver system settings. |
| 183 | */ | 183 | */ |
| 184 | #define STM32_PWM_USE_ADVANCED FALSE | 184 | #define STM32_PWM_USE_ADVANCED FALSE |
| 185 | #define STM32_PWM_USE_TIM1 FALSE | 185 | #define STM32_PWM_USE_TIM1 FALSE |
| 186 | #define STM32_PWM_USE_TIM2 FALSE | 186 | #define STM32_PWM_USE_TIM2 FALSE |
| 187 | #define STM32_PWM_USE_TIM3 TRUE | 187 | #define STM32_PWM_USE_TIM3 TRUE |
| 188 | #define STM32_PWM_USE_TIM4 TRUE | 188 | #define STM32_PWM_USE_TIM4 TRUE |
| 189 | #define STM32_PWM_USE_TIM8 FALSE | 189 | #define STM32_PWM_USE_TIM8 FALSE |
| 190 | #define STM32_PWM_TIM1_IRQ_PRIORITY 7 | 190 | #define STM32_PWM_TIM1_IRQ_PRIORITY 7 |
| 191 | #define STM32_PWM_TIM2_IRQ_PRIORITY 7 | 191 | #define STM32_PWM_TIM2_IRQ_PRIORITY 7 |
| 192 | #define STM32_PWM_TIM3_IRQ_PRIORITY 7 | 192 | #define STM32_PWM_TIM3_IRQ_PRIORITY 7 |
| 193 | #define STM32_PWM_TIM4_IRQ_PRIORITY 7 | 193 | #define STM32_PWM_TIM4_IRQ_PRIORITY 7 |
| 194 | #define STM32_PWM_TIM8_IRQ_PRIORITY 7 | 194 | #define STM32_PWM_TIM8_IRQ_PRIORITY 7 |
| 195 | 195 | ||
| 196 | /* | 196 | /* |
| 197 | * SERIAL driver system settings. | 197 | * SERIAL driver system settings. |
| 198 | */ | 198 | */ |
| 199 | #define STM32_SERIAL_USE_USART1 FALSE | 199 | #define STM32_SERIAL_USE_USART1 FALSE |
| 200 | #define STM32_SERIAL_USE_USART2 TRUE | 200 | #define STM32_SERIAL_USE_USART2 TRUE |
| 201 | #define STM32_SERIAL_USE_USART3 FALSE | 201 | #define STM32_SERIAL_USE_USART3 FALSE |
| 202 | #define STM32_SERIAL_USE_UART4 FALSE | 202 | #define STM32_SERIAL_USE_UART4 FALSE |
| 203 | #define STM32_SERIAL_USE_UART5 FALSE | 203 | #define STM32_SERIAL_USE_UART5 FALSE |
| 204 | #define STM32_SERIAL_USART1_PRIORITY 12 | 204 | #define STM32_SERIAL_USART1_PRIORITY 12 |
| 205 | #define STM32_SERIAL_USART2_PRIORITY 12 | 205 | #define STM32_SERIAL_USART2_PRIORITY 12 |
| 206 | #define STM32_SERIAL_USART3_PRIORITY 12 | 206 | #define STM32_SERIAL_USART3_PRIORITY 12 |
| 207 | #define STM32_SERIAL_UART4_PRIORITY 12 | 207 | #define STM32_SERIAL_UART4_PRIORITY 12 |
| 208 | #define STM32_SERIAL_UART5_PRIORITY 12 | 208 | #define STM32_SERIAL_UART5_PRIORITY 12 |
| 209 | 209 | ||
| 210 | /* | 210 | /* |
| 211 | * SPI driver system settings. | 211 | * SPI driver system settings. |
| 212 | */ | 212 | */ |
| 213 | #define STM32_SPI_USE_SPI1 FALSE | 213 | #define STM32_SPI_USE_SPI1 FALSE |
| 214 | #define STM32_SPI_USE_SPI2 FALSE | 214 | #define STM32_SPI_USE_SPI2 FALSE |
| 215 | #define STM32_SPI_USE_SPI3 FALSE | 215 | #define STM32_SPI_USE_SPI3 FALSE |
| 216 | #define STM32_SPI_SPI1_DMA_PRIORITY 1 | 216 | #define STM32_SPI_SPI1_DMA_PRIORITY 1 |
| 217 | #define STM32_SPI_SPI2_DMA_PRIORITY 1 | 217 | #define STM32_SPI_SPI2_DMA_PRIORITY 1 |
| 218 | #define STM32_SPI_SPI3_DMA_PRIORITY 1 | 218 | #define STM32_SPI_SPI3_DMA_PRIORITY 1 |
| 219 | #define STM32_SPI_SPI1_IRQ_PRIORITY 10 | 219 | #define STM32_SPI_SPI1_IRQ_PRIORITY 10 |
| 220 | #define STM32_SPI_SPI2_IRQ_PRIORITY 10 | 220 | #define STM32_SPI_SPI2_IRQ_PRIORITY 10 |
| 221 | #define STM32_SPI_SPI3_IRQ_PRIORITY 10 | 221 | #define STM32_SPI_SPI3_IRQ_PRIORITY 10 |
| 222 | #define STM32_SPI_DMA_ERROR_HOOK(spip) osalSysHalt("DMA failure") | 222 | #define STM32_SPI_DMA_ERROR_HOOK(spip) osalSysHalt("DMA failure") |
| 223 | 223 | ||
| 224 | /* | 224 | /* |
| 225 | * ST driver system settings. | 225 | * ST driver system settings. |
| 226 | */ | 226 | */ |
| 227 | #define STM32_ST_IRQ_PRIORITY 8 | 227 | #define STM32_ST_IRQ_PRIORITY 8 |
| 228 | #define STM32_ST_USE_TIMER 2 | 228 | #define STM32_ST_USE_TIMER 2 |
| 229 | 229 | ||
| 230 | /* | 230 | /* |
| 231 | * UART driver system settings. | 231 | * UART driver system settings. |
| 232 | */ | 232 | */ |
| 233 | #define STM32_UART_USE_USART1 FALSE | 233 | #define STM32_UART_USE_USART1 FALSE |
| 234 | #define STM32_UART_USE_USART2 FALSE | 234 | #define STM32_UART_USE_USART2 FALSE |
| 235 | #define STM32_UART_USE_USART3 FALSE | 235 | #define STM32_UART_USE_USART3 FALSE |
| 236 | #define STM32_UART_USART1_IRQ_PRIORITY 12 | 236 | #define STM32_UART_USART1_IRQ_PRIORITY 12 |
| 237 | #define STM32_UART_USART2_IRQ_PRIORITY 12 | 237 | #define STM32_UART_USART2_IRQ_PRIORITY 12 |
| 238 | #define STM32_UART_USART3_IRQ_PRIORITY 12 | 238 | #define STM32_UART_USART3_IRQ_PRIORITY 12 |
| 239 | #define STM32_UART_USART1_DMA_PRIORITY 0 | 239 | #define STM32_UART_USART1_DMA_PRIORITY 0 |
| 240 | #define STM32_UART_USART2_DMA_PRIORITY 0 | 240 | #define STM32_UART_USART2_DMA_PRIORITY 0 |
| 241 | #define STM32_UART_USART3_DMA_PRIORITY 0 | 241 | #define STM32_UART_USART3_DMA_PRIORITY 0 |
| 242 | #define STM32_UART_DMA_ERROR_HOOK(uartp) osalSysHalt("DMA failure") | 242 | #define STM32_UART_DMA_ERROR_HOOK(uartp) osalSysHalt("DMA failure") |
| 243 | 243 | ||
| 244 | /* | 244 | /* |
| 245 | * USB driver system settings. | 245 | * USB driver system settings. |
| 246 | */ | 246 | */ |
| 247 | #define STM32_USB_USE_USB1 TRUE | 247 | #define STM32_USB_USE_USB1 TRUE |
| 248 | #define STM32_USB_LOW_POWER_ON_SUSPEND FALSE | 248 | #define STM32_USB_LOW_POWER_ON_SUSPEND FALSE |
| 249 | #define STM32_USB_USB1_HP_IRQ_PRIORITY 13 | 249 | #define STM32_USB_USB1_HP_IRQ_PRIORITY 13 |
| 250 | #define STM32_USB_USB1_LP_IRQ_PRIORITY 14 | 250 | #define STM32_USB_USB1_LP_IRQ_PRIORITY 14 |
| 251 | 251 | ||
| 252 | /* | 252 | /* |
| 253 | * WDG driver system settings. | 253 | * WDG driver system settings. |
| 254 | */ | 254 | */ |
| 255 | #define STM32_WDG_USE_IWDG FALSE | 255 | #define STM32_WDG_USE_IWDG FALSE |
| 256 | 256 | ||
| 257 | #endif /* MCUCONF_H */ | 257 | #endif /* MCUCONF_H */ |
