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author | Joel Challis <git@zvecr.com> | 2021-07-22 23:01:19 +0100 |
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committer | GitHub <noreply@github.com> | 2021-07-22 23:01:19 +0100 |
commit | 5d7f2823c947264d3ff3bb4f057f8e050d6b4af1 (patch) | |
tree | a1cfdefd57fd2fcc7afcc1fa025da25538cc692d /tmk_core/common | |
parent | 95a7c2282466252641a1d0bb1b15d50752193f4b (diff) | |
download | qmk_firmware-5d7f2823c947264d3ff3bb4f057f8e050d6b4af1.tar.gz qmk_firmware-5d7f2823c947264d3ff3bb4f057f8e050d6b4af1.zip |
Implement GPIO abstraction for atsam (#13567)
* Implement GPIO abstraction for atsam
* Convert Drop boards to normal matrix config
* Work round pin conflicts and matrix delay
Diffstat (limited to 'tmk_core/common')
-rw-r--r-- | tmk_core/common/arm_atsam/atomic_util.h | 37 | ||||
-rw-r--r-- | tmk_core/common/arm_atsam/gpio.h | 71 | ||||
-rw-r--r-- | tmk_core/common/arm_atsam/pin_defs.h | 84 |
3 files changed, 192 insertions, 0 deletions
diff --git a/tmk_core/common/arm_atsam/atomic_util.h b/tmk_core/common/arm_atsam/atomic_util.h new file mode 100644 index 000000000..848542d23 --- /dev/null +++ b/tmk_core/common/arm_atsam/atomic_util.h | |||
@@ -0,0 +1,37 @@ | |||
1 | /* Copyright 2021 QMK | ||
2 | * | ||
3 | * This program is free software: you can redistribute it and/or modify | ||
4 | * it under the terms of the GNU General Public License as published by | ||
5 | * the Free Software Foundation, either version 3 of the License, or | ||
6 | * (at your option) any later version. | ||
7 | * | ||
8 | * This program is distributed in the hope that it will be useful, | ||
9 | * but WITHOUT ANY WARRANTY; without even the implied warranty of | ||
10 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | ||
11 | * GNU General Public License for more details. | ||
12 | * | ||
13 | * You should have received a copy of the GNU General Public License | ||
14 | * along with this program. If not, see <http://www.gnu.org/licenses/>. | ||
15 | */ | ||
16 | #pragma once | ||
17 | |||
18 | #include "samd51j18a.h" | ||
19 | |||
20 | static __inline__ uint8_t __interrupt_disable__(void) { | ||
21 | __disable_irq(); | ||
22 | |||
23 | return 1; | ||
24 | } | ||
25 | |||
26 | static __inline__ void __interrupt_enable__(const uint8_t *__s) { | ||
27 | __enable_irq(); | ||
28 | |||
29 | __asm__ volatile("" ::: "memory"); | ||
30 | (void)__s; | ||
31 | } | ||
32 | |||
33 | #define ATOMIC_BLOCK(type) for (type, __ToDo = __interrupt_disable__(); __ToDo; __ToDo = 0) | ||
34 | #define ATOMIC_FORCEON uint8_t sreg_save __attribute__((__cleanup__(__interrupt_enable__))) = 0 | ||
35 | |||
36 | #define ATOMIC_BLOCK_RESTORESTATE _Static_assert(0, "ATOMIC_BLOCK_RESTORESTATE not implemented") | ||
37 | #define ATOMIC_BLOCK_FORCEON ATOMIC_BLOCK(ATOMIC_FORCEON) | ||
diff --git a/tmk_core/common/arm_atsam/gpio.h b/tmk_core/common/arm_atsam/gpio.h new file mode 100644 index 000000000..c2d5a3088 --- /dev/null +++ b/tmk_core/common/arm_atsam/gpio.h | |||
@@ -0,0 +1,71 @@ | |||
1 | /* Copyright 2021 QMK | ||
2 | * | ||
3 | * This program is free software: you can redistribute it and/or modify | ||
4 | * it under the terms of the GNU General Public License as published by | ||
5 | * the Free Software Foundation, either version 3 of the License, or | ||
6 | * (at your option) any later version. | ||
7 | * | ||
8 | * This program is distributed in the hope that it will be useful, | ||
9 | * but WITHOUT ANY WARRANTY; without even the implied warranty of | ||
10 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | ||
11 | * GNU General Public License for more details. | ||
12 | * | ||
13 | * You should have received a copy of the GNU General Public License | ||
14 | * along with this program. If not, see <http://www.gnu.org/licenses/>. | ||
15 | */ | ||
16 | #pragma once | ||
17 | |||
18 | #include "stdint.h" | ||
19 | #include "samd51j18a.h" | ||
20 | |||
21 | #include "pin_defs.h" | ||
22 | |||
23 | typedef uint8_t pin_t; | ||
24 | |||
25 | #define SAMD_PORT(pin) ((pin & 0x20) >> 5) | ||
26 | #define SAMD_PIN(pin) (pin & 0x1f) | ||
27 | #define SAMD_PIN_MASK(pin) (1 << (pin & 0x1f)) | ||
28 | |||
29 | #define setPinInput(pin) \ | ||
30 | do { \ | ||
31 | PORT->Group[SAMD_PORT(pin)].PINCFG[SAMD_PIN(pin)].bit.INEN = 1; \ | ||
32 | PORT->Group[SAMD_PORT(pin)].DIRCLR.reg = SAMD_PIN_MASK(pin); \ | ||
33 | } while (0) | ||
34 | |||
35 | #define setPinInputHigh(pin) \ | ||
36 | do { \ | ||
37 | PORT->Group[SAMD_PORT(pin)].DIRCLR.reg = SAMD_PIN_MASK(pin); \ | ||
38 | PORT->Group[SAMD_PORT(pin)].OUTSET.reg = SAMD_PIN_MASK(pin); \ | ||
39 | PORT->Group[SAMD_PORT(pin)].PINCFG[SAMD_PIN(pin)].bit.INEN = 1; \ | ||
40 | PORT->Group[SAMD_PORT(pin)].PINCFG[SAMD_PIN(pin)].bit.PULLEN = 1; \ | ||
41 | } while (0) | ||
42 | |||
43 | #define setPinInputLow(pin) \ | ||
44 | do { \ | ||
45 | PORT->Group[SAMD_PORT(pin)].DIRCLR.reg = SAMD_PIN_MASK(pin); \ | ||
46 | PORT->Group[SAMD_PORT(pin)].OUTCLR.reg = SAMD_PIN_MASK(pin); \ | ||
47 | PORT->Group[SAMD_PORT(pin)].PINCFG[SAMD_PIN(pin)].bit.INEN = 1; \ | ||
48 | PORT->Group[SAMD_PORT(pin)].PINCFG[SAMD_PIN(pin)].bit.PULLEN = 1; \ | ||
49 | } while (0) | ||
50 | |||
51 | #define setPinOutput(pin) \ | ||
52 | do { \ | ||
53 | PORT->Group[SAMD_PORT(pin)].DIRSET.reg = SAMD_PIN_MASK(pin); \ | ||
54 | PORT->Group[SAMD_PORT(pin)].OUTCLR.reg = SAMD_PIN_MASK(pin); \ | ||
55 | } while (0) | ||
56 | |||
57 | #define writePinHigh(pin) \ | ||
58 | do { \ | ||
59 | PORT->Group[SAMD_PORT(pin)].OUTSET.reg = SAMD_PIN_MASK(pin); \ | ||
60 | } while (0) | ||
61 | |||
62 | #define writePinLow(pin) \ | ||
63 | do { \ | ||
64 | PORT->Group[SAMD_PORT(pin)].OUTCLR.reg = SAMD_PIN_MASK(pin); \ | ||
65 | } while (0) | ||
66 | |||
67 | #define writePin(pin, level) ((level) ? (writePinHigh(pin)) : (writePinLow(pin))) | ||
68 | |||
69 | #define readPin(pin) ((PORT->Group[SAMD_PORT(pin)].IN.reg & SAMD_PIN_MASK(pin)) != 0) | ||
70 | |||
71 | #define togglePin(pin) (PORT->Group[SAMD_PORT(pin)].OUTTGL.reg = SAMD_PIN_MASK(pin)) | ||
diff --git a/tmk_core/common/arm_atsam/pin_defs.h b/tmk_core/common/arm_atsam/pin_defs.h new file mode 100644 index 000000000..5b50b2391 --- /dev/null +++ b/tmk_core/common/arm_atsam/pin_defs.h | |||
@@ -0,0 +1,84 @@ | |||
1 | /* Copyright 2021 QMK | ||
2 | * | ||
3 | * This program is free software: you can redistribute it and/or modify | ||
4 | * it under the terms of the GNU General Public License as published by | ||
5 | * the Free Software Foundation, either version 3 of the License, or | ||
6 | * (at your option) any later version. | ||
7 | * | ||
8 | * This program is distributed in the hope that it will be useful, | ||
9 | * but WITHOUT ANY WARRANTY; without even the implied warranty of | ||
10 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | ||
11 | * GNU General Public License for more details. | ||
12 | * | ||
13 | * You should have received a copy of the GNU General Public License | ||
14 | * along with this program. If not, see <http://www.gnu.org/licenses/>. | ||
15 | */ | ||
16 | #pragma once | ||
17 | |||
18 | #include "samd51j18a.h" | ||
19 | |||
20 | #define A00 PIN_PA00 | ||
21 | #define A01 PIN_PA01 | ||
22 | #define A02 PIN_PA02 | ||
23 | #define A03 PIN_PA03 | ||
24 | #define A04 PIN_PA04 | ||
25 | #define A05 PIN_PA05 | ||
26 | #define A06 PIN_PA06 | ||
27 | #define A07 PIN_PA07 | ||
28 | #define A08 PIN_PA08 | ||
29 | #define A09 PIN_PA09 | ||
30 | #define A10 PIN_PA10 | ||
31 | #define A11 PIN_PA11 | ||
32 | #define A12 PIN_PA12 | ||
33 | #define A13 PIN_PA13 | ||
34 | #define A14 PIN_PA14 | ||
35 | #define A15 PIN_PA15 | ||
36 | #define A16 PIN_PA16 | ||
37 | #define A17 PIN_PA17 | ||
38 | #define A18 PIN_PA18 | ||
39 | #define A19 PIN_PA19 | ||
40 | #define A20 PIN_PA20 | ||
41 | #define A21 PIN_PA21 | ||
42 | #define A22 PIN_PA22 | ||
43 | #define A23 PIN_PA23 | ||
44 | #define A24 PIN_PA24 | ||
45 | #define A25 PIN_PA25 | ||
46 | #define A26 PIN_PA26 | ||
47 | #define A27 PIN_PA27 | ||
48 | #define A28 PIN_PA28 | ||
49 | #define A29 PIN_PA29 | ||
50 | #define A30 PIN_PA30 | ||
51 | #define A31 PIN_PA31 | ||
52 | |||
53 | #define B00 PIN_PB00 | ||
54 | #define B01 PIN_PB01 | ||
55 | #define B02 PIN_PB02 | ||
56 | #define B03 PIN_PB03 | ||
57 | #define B04 PIN_PB04 | ||
58 | #define B05 PIN_PB05 | ||
59 | #define B06 PIN_PB06 | ||
60 | #define B07 PIN_PB07 | ||
61 | #define B08 PIN_PB08 | ||
62 | #define B09 PIN_PB09 | ||
63 | #define B10 PIN_PB10 | ||
64 | #define B11 PIN_PB11 | ||
65 | #define B12 PIN_PB12 | ||
66 | #define B13 PIN_PB13 | ||
67 | #define B14 PIN_PB14 | ||
68 | #define B15 PIN_PB15 | ||
69 | #define B16 PIN_PB16 | ||
70 | #define B17 PIN_PB17 | ||
71 | #define B18 PIN_PB18 | ||
72 | #define B19 PIN_PB19 | ||
73 | #define B20 PIN_PB20 | ||
74 | #define B21 PIN_PB21 | ||
75 | #define B22 PIN_PB22 | ||
76 | #define B23 PIN_PB23 | ||
77 | #define B24 PIN_PB24 | ||
78 | #define B25 PIN_PB25 | ||
79 | #define B26 PIN_PB26 | ||
80 | #define B27 PIN_PB27 | ||
81 | #define B28 PIN_PB28 | ||
82 | #define B29 PIN_PB29 | ||
83 | #define B30 PIN_PB30 | ||
84 | #define B31 PIN_PB31 | ||