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| author | fauxpark <fauxpark@gmail.com> | 2019-09-08 01:12:46 +1000 |
|---|---|---|
| committer | Drashna Jaelre <drashna@live.com> | 2019-09-07 08:12:46 -0700 |
| commit | 91bd2117df4cc4d2be6c840103614f2245e54bd1 (patch) | |
| tree | 80748d24063c766353c5f162e16063e6c464427b /tmk_core | |
| parent | c21281c593d2eb9ef87053ef1d04d0b7d41be726 (diff) | |
| download | qmk_firmware-91bd2117df4cc4d2be6c840103614f2245e54bd1.tar.gz qmk_firmware-91bd2117df4cc4d2be6c840103614f2245e54bd1.zip | |
Banish some more magic numbers (#6662)
Diffstat (limited to 'tmk_core')
| -rw-r--r-- | tmk_core/common/avr/bootloader.c | 11 | ||||
| -rw-r--r-- | tmk_core/common/avr/timer.c | 21 |
2 files changed, 13 insertions, 19 deletions
diff --git a/tmk_core/common/avr/bootloader.c b/tmk_core/common/avr/bootloader.c index 5f9ecc510..ca9746f32 100644 --- a/tmk_core/common/avr/bootloader.c +++ b/tmk_core/common/avr/bootloader.c | |||
| @@ -59,11 +59,6 @@ | |||
| 59 | uint16_t bootloader_start; | 59 | uint16_t bootloader_start; |
| 60 | #endif | 60 | #endif |
| 61 | 61 | ||
| 62 | #define BOOT_SIZE_256 0b110 | ||
| 63 | #define BOOT_SIZE_512 0b100 | ||
| 64 | #define BOOT_SIZE_1024 0b010 | ||
| 65 | #define BOOT_SIZE_2048 0b000 | ||
| 66 | |||
| 67 | // compatibility between ATMega8 and ATMega88 | 62 | // compatibility between ATMega8 and ATMega88 |
| 68 | #if !defined(MCUCSR) | 63 | #if !defined(MCUCSR) |
| 69 | # if defined(MCUSR) | 64 | # if defined(MCUSR) |
| @@ -86,11 +81,11 @@ void bootloader_jump(void) { | |||
| 86 | #if !defined(BOOTLOADER_SIZE) | 81 | #if !defined(BOOTLOADER_SIZE) |
| 87 | uint8_t high_fuse = boot_lock_fuse_bits_get(GET_HIGH_FUSE_BITS); | 82 | uint8_t high_fuse = boot_lock_fuse_bits_get(GET_HIGH_FUSE_BITS); |
| 88 | 83 | ||
| 89 | if (high_fuse & BOOT_SIZE_256) { | 84 | if (high_fuse & ~(FUSE_BOOTSZ0 & FUSE_BOOTSZ1)) { |
| 90 | bootloader_start = (FLASH_SIZE - 512) >> 1; | 85 | bootloader_start = (FLASH_SIZE - 512) >> 1; |
| 91 | } else if (high_fuse & BOOT_SIZE_512) { | 86 | } else if (high_fuse & ~(FUSE_BOOTSZ1)) { |
| 92 | bootloader_start = (FLASH_SIZE - 1024) >> 1; | 87 | bootloader_start = (FLASH_SIZE - 1024) >> 1; |
| 93 | } else if (high_fuse & BOOT_SIZE_1024) { | 88 | } else if (high_fuse & ~(FUSE_BOOTSZ0)) { |
| 94 | bootloader_start = (FLASH_SIZE - 2048) >> 1; | 89 | bootloader_start = (FLASH_SIZE - 2048) >> 1; |
| 95 | } else { | 90 | } else { |
| 96 | bootloader_start = (FLASH_SIZE - 4096) >> 1; | 91 | bootloader_start = (FLASH_SIZE - 4096) >> 1; |
diff --git a/tmk_core/common/avr/timer.c b/tmk_core/common/avr/timer.c index 63ec549df..88fa1dfa6 100644 --- a/tmk_core/common/avr/timer.c +++ b/tmk_core/common/avr/timer.c | |||
| @@ -32,33 +32,32 @@ volatile uint32_t timer_count; | |||
| 32 | */ | 32 | */ |
| 33 | void timer_init(void) { | 33 | void timer_init(void) { |
| 34 | #if TIMER_PRESCALER == 1 | 34 | #if TIMER_PRESCALER == 1 |
| 35 | uint8_t prescaler = 0x01; | 35 | uint8_t prescaler = _BV(CS00); |
| 36 | #elif TIMER_PRESCALER == 8 | 36 | #elif TIMER_PRESCALER == 8 |
| 37 | uint8_t prescaler = 0x02; | 37 | uint8_t prescaler = _BV(CS01); |
| 38 | #elif TIMER_PRESCALER == 64 | 38 | #elif TIMER_PRESCALER == 64 |
| 39 | uint8_t prescaler = 0x03; | 39 | uint8_t prescaler = _BV(CS00) | _BV(CS01); |
| 40 | #elif TIMER_PRESCALER == 256 | 40 | #elif TIMER_PRESCALER == 256 |
| 41 | uint8_t prescaler = 0x04; | 41 | uint8_t prescaler = _BV(CS02); |
| 42 | #elif TIMER_PRESCALER == 1024 | 42 | #elif TIMER_PRESCALER == 1024 |
| 43 | uint8_t prescaler = 0x05; | 43 | uint8_t prescaler = _BV(CS00) | _BV(CS02); |
| 44 | #else | 44 | #else |
| 45 | # error "Timer prescaler value is NOT vaild." | 45 | # error "Timer prescaler value is not valid" |
| 46 | #endif | 46 | #endif |
| 47 | 47 | ||
| 48 | #ifndef __AVR_ATmega32A__ | 48 | #ifndef __AVR_ATmega32A__ |
| 49 | // Timer0 CTC mode | 49 | // Timer0 CTC mode |
| 50 | TCCR0A = 0x02; | 50 | TCCR0A = _BV(WGM01); |
| 51 | |||
| 52 | TCCR0B = prescaler; | 51 | TCCR0B = prescaler; |
| 53 | 52 | ||
| 54 | OCR0A = TIMER_RAW_TOP; | 53 | OCR0A = TIMER_RAW_TOP; |
| 55 | TIMSK0 = (1 << OCIE0A); | 54 | TIMSK0 = _BV(OCIE0A); |
| 56 | #else | 55 | #else |
| 57 | // Timer0 CTC mode | 56 | // Timer0 CTC mode |
| 58 | TCCR0 = (1 << WGM01) | prescaler; | 57 | TCCR0 = _BV(WGM01) | prescaler; |
| 59 | 58 | ||
| 60 | OCR0 = TIMER_RAW_TOP; | 59 | OCR0 = TIMER_RAW_TOP; |
| 61 | TIMSK = (1 << OCIE0); | 60 | TIMSK = _BV(OCIE0); |
| 62 | #endif | 61 | #endif |
| 63 | } | 62 | } |
| 64 | 63 | ||
