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-rw-r--r--common_features.mk2
-rw-r--r--data/schemas/keyboard.jsonschema2
-rw-r--r--docs/compatible_microcontrollers.md1
-rw-r--r--docs/ja/compatible_microcontrollers.md1
-rw-r--r--keyboards/handwired/onekey/stm32f405_feather/config.h25
-rw-r--r--keyboards/handwired/onekey/stm32f405_feather/readme.md7
-rw-r--r--keyboards/handwired/onekey/stm32f405_feather/rules.mk8
-rw-r--r--platforms/chibios/boards/GENERIC_STM32_F405XG/board/board.mk9
-rw-r--r--platforms/chibios/boards/GENERIC_STM32_F405XG/configs/board.h28
-rw-r--r--platforms/chibios/boards/GENERIC_STM32_F405XG/configs/config.h23
-rw-r--r--platforms/chibios/boards/GENERIC_STM32_F405XG/configs/mcuconf.h355
-rw-r--r--platforms/chibios/boards/common/ld/STM32F405xG.ld86
-rw-r--r--quantum/mcu_selection.mk32
-rw-r--r--tmk_core/common/chibios/eeprom_stm32_defs.h6
14 files changed, 581 insertions, 4 deletions
diff --git a/common_features.mk b/common_features.mk
index 8b5ee071d..619359717 100644
--- a/common_features.mk
+++ b/common_features.mk
@@ -183,7 +183,7 @@ else
183 SRC += $(PLATFORM_COMMON_DIR)/eeprom_stm32.c 183 SRC += $(PLATFORM_COMMON_DIR)/eeprom_stm32.c
184 SRC += $(PLATFORM_COMMON_DIR)/flash_stm32.c 184 SRC += $(PLATFORM_COMMON_DIR)/flash_stm32.c
185 OPT_DEFS += -DEEPROM_EMU_STM32F072xB 185 OPT_DEFS += -DEEPROM_EMU_STM32F072xB
186 else ifneq ($(filter $(MCU_SERIES)_$(MCU_LDSCRIPT),STM32F4xx_STM32F401xC STM32F4xx_STM32F411xE),) 186 else ifneq ($(filter $(MCU_SERIES)_$(MCU_LDSCRIPT),STM32F4xx_STM32F401xC STM32F4xx_STM32F411xE STM32F4xx_STM32F405xG),)
187 OPT_DEFS += -DEEPROM_DRIVER 187 OPT_DEFS += -DEEPROM_DRIVER
188 COMMON_VPATH += $(DRIVER_PATH)/eeprom 188 COMMON_VPATH += $(DRIVER_PATH)/eeprom
189 SRC += eeprom_driver.c 189 SRC += eeprom_driver.c
diff --git a/data/schemas/keyboard.jsonschema b/data/schemas/keyboard.jsonschema
index 15f407fce..27507c78a 100644
--- a/data/schemas/keyboard.jsonschema
+++ b/data/schemas/keyboard.jsonschema
@@ -13,7 +13,7 @@
13 }, 13 },
14 "processor": { 14 "processor": {
15 "type": "string", 15 "type": "string",
16 "enum": ["cortex-m0", "cortex-m0plus", "cortex-m3", "cortex-m4", "MKL26Z64", "MK20DX128", "MK20DX256", "MK66F18", "STM32F042", "STM32F072", "STM32F103", "STM32F303", "STM32F401", "STM32F407", "STM32F411", "STM32F446", "STM32G431", "STM32G474", "STM32L412", "STM32L422", "STM32L433", "STM32L443", "atmega16u2", "atmega32u2", "atmega16u4", "atmega32u4", "at90usb162", "at90usb646", "at90usb647", "at90usb1286", "at90usb1287", "atmega32a", "atmega328p", "atmega328", "attiny85", "unknown"] 16 "enum": ["cortex-m0", "cortex-m0plus", "cortex-m3", "cortex-m4", "MKL26Z64", "MK20DX128", "MK20DX256", "MK66F18", "STM32F042", "STM32F072", "STM32F103", "STM32F303", "STM32F401", "STM32F405", "STM32F407", "STM32F411", "STM32F446", "STM32G431", "STM32G474", "STM32L412", "STM32L422", "STM32L433", "STM32L443", "atmega16u2", "atmega32u2", "atmega16u4", "atmega32u4", "at90usb162", "at90usb646", "at90usb647", "at90usb1286", "at90usb1287", "atmega32a", "atmega328p", "atmega328", "attiny85", "unknown"]
17 }, 17 },
18 "audio": { 18 "audio": {
19 "type": "object", 19 "type": "object",
diff --git a/docs/compatible_microcontrollers.md b/docs/compatible_microcontrollers.md
index 2bf3b0ebb..0ad5d4821 100644
--- a/docs/compatible_microcontrollers.md
+++ b/docs/compatible_microcontrollers.md
@@ -27,6 +27,7 @@ You can also use any ARM chip with USB that [ChibiOS](https://www.chibios.org) s
27 * [STM32F103](https://www.st.com/en/microcontrollers-microprocessors/stm32f103.html) 27 * [STM32F103](https://www.st.com/en/microcontrollers-microprocessors/stm32f103.html)
28 * [STM32F303](https://www.st.com/en/microcontrollers-microprocessors/stm32f303.html) 28 * [STM32F303](https://www.st.com/en/microcontrollers-microprocessors/stm32f303.html)
29 * [STM32F401](https://www.st.com/en/microcontrollers-microprocessors/stm32f401.html) 29 * [STM32F401](https://www.st.com/en/microcontrollers-microprocessors/stm32f401.html)
30 * [STM32F405](https://www.st.com/en/microcontrollers-microprocessors/stm32f405-415.html)
30 * [STM32F407](https://www.st.com/en/microcontrollers-microprocessors/stm32f407-417.html) 31 * [STM32F407](https://www.st.com/en/microcontrollers-microprocessors/stm32f407-417.html)
31 * [STM32F411](https://www.st.com/en/microcontrollers-microprocessors/stm32f411.html) 32 * [STM32F411](https://www.st.com/en/microcontrollers-microprocessors/stm32f411.html)
32 * [STM32F446](https://www.st.com/en/microcontrollers-microprocessors/stm32f446.html) 33 * [STM32F446](https://www.st.com/en/microcontrollers-microprocessors/stm32f446.html)
diff --git a/docs/ja/compatible_microcontrollers.md b/docs/ja/compatible_microcontrollers.md
index 7a3484fa8..23f32bbb6 100644
--- a/docs/ja/compatible_microcontrollers.md
+++ b/docs/ja/compatible_microcontrollers.md
@@ -32,6 +32,7 @@ QMK は十分な容量のフラッシュメモリを備えた USB 対応 AVR ま
32* [STM32F103](https://www.st.com/en/microcontrollers-microprocessors/stm32f103.html) 32* [STM32F103](https://www.st.com/en/microcontrollers-microprocessors/stm32f103.html)
33* [STM32F303](https://www.st.com/en/microcontrollers-microprocessors/stm32f303.html) 33* [STM32F303](https://www.st.com/en/microcontrollers-microprocessors/stm32f303.html)
34* [STM32F401](https://www.st.com/en/microcontrollers-microprocessors/stm32f401.html) 34* [STM32F401](https://www.st.com/en/microcontrollers-microprocessors/stm32f401.html)
35* [STM32F405](https://www.st.com/en/microcontrollers-microprocessors/stm32f405-415.html)
35* [STM32F407](https://www.st.com/en/microcontrollers-microprocessors/stm32f407-417.html) 36* [STM32F407](https://www.st.com/en/microcontrollers-microprocessors/stm32f407-417.html)
36* [STM32F411](https://www.st.com/en/microcontrollers-microprocessors/stm32f411.html) 37* [STM32F411](https://www.st.com/en/microcontrollers-microprocessors/stm32f411.html)
37* [STM32F446](https://www.st.com/en/microcontrollers-microprocessors/stm32f446.html) 38* [STM32F446](https://www.st.com/en/microcontrollers-microprocessors/stm32f446.html)
diff --git a/keyboards/handwired/onekey/stm32f405_feather/config.h b/keyboards/handwired/onekey/stm32f405_feather/config.h
new file mode 100644
index 000000000..32d780797
--- /dev/null
+++ b/keyboards/handwired/onekey/stm32f405_feather/config.h
@@ -0,0 +1,25 @@
1/* Copyright 2019
2 *
3 * This program is free software: you can redistribute it and/or modify
4 * it under the terms of the GNU General Public License as published by
5 * the Free Software Foundation, either version 2 of the License, or
6 * (at your option) any later version.
7 *
8 * This program is distributed in the hope that it will be useful,
9 * but WITHOUT ANY WARRANTY; without even the implied warranty of
10 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
11 * GNU General Public License for more details.
12 *
13 * You should have received a copy of the GNU General Public License
14 * along with this program. If not, see <http://www.gnu.org/licenses/>.
15 */
16
17#pragma once
18
19#include "config_common.h"
20
21#define PRODUCT Onekey Adafruit Feather STM32F405
22
23#define MATRIX_COL_PINS { C2 }
24#define MATRIX_ROW_PINS { C3 }
25#define UNUSED_PINS
diff --git a/keyboards/handwired/onekey/stm32f405_feather/readme.md b/keyboards/handwired/onekey/stm32f405_feather/readme.md
new file mode 100644
index 000000000..49a05725d
--- /dev/null
+++ b/keyboards/handwired/onekey/stm32f405_feather/readme.md
@@ -0,0 +1,7 @@
1# Adafruit Feather STM32F405 Express onekey
2
3* Supported Hardware: [Adafruit Feather STM32F405 Express](https://www.adafruit.com/product/4382)
4
5To trigger keypress, short together pins *GPIO 12 / PC2* and *GPIO 11 / PC3*.
6
7https://learn.adafruit.com/adafruit-stm32f405-feather-express/dfu-bootloader-details#enabling-dfu-bootloader-mode-3045622-2 \ No newline at end of file
diff --git a/keyboards/handwired/onekey/stm32f405_feather/rules.mk b/keyboards/handwired/onekey/stm32f405_feather/rules.mk
new file mode 100644
index 000000000..bff7a7e29
--- /dev/null
+++ b/keyboards/handwired/onekey/stm32f405_feather/rules.mk
@@ -0,0 +1,8 @@
1# MCU name
2MCU = STM32F405
3
4# Bootloader selection
5BOOTLOADER = stm32-dfu
6
7# Enter lower-power sleep mode when on the ChibiOS idle thread
8OPT_DEFS += -DCORTEX_ENABLE_WFI_IDLE=TRUE
diff --git a/platforms/chibios/boards/GENERIC_STM32_F405XG/board/board.mk b/platforms/chibios/boards/GENERIC_STM32_F405XG/board/board.mk
new file mode 100644
index 000000000..6c837bb8e
--- /dev/null
+++ b/platforms/chibios/boards/GENERIC_STM32_F405XG/board/board.mk
@@ -0,0 +1,9 @@
1# List of all the board related files.
2BOARDSRC = $(CHIBIOS)/os/hal/boards/ST_STM32F4_DISCOVERY/board.c
3
4# Required include directories
5BOARDINC = $(CHIBIOS)/os/hal/boards/ST_STM32F4_DISCOVERY
6
7# Shared variables
8ALLCSRC += $(BOARDSRC)
9ALLINC += $(BOARDINC) \ No newline at end of file
diff --git a/platforms/chibios/boards/GENERIC_STM32_F405XG/configs/board.h b/platforms/chibios/boards/GENERIC_STM32_F405XG/configs/board.h
new file mode 100644
index 000000000..8cb771bc1
--- /dev/null
+++ b/platforms/chibios/boards/GENERIC_STM32_F405XG/configs/board.h
@@ -0,0 +1,28 @@
1/* Copyright 2020 Nick Brassel (tzarc)
2 *
3 * This program is free software: you can redistribute it and/or modify
4 * it under the terms of the GNU General Public License as published by
5 * the Free Software Foundation, either version 3 of the License, or
6 * (at your option) any later version.
7 *
8 * This program is distributed in the hope that it will be useful,
9 * but WITHOUT ANY WARRANTY; without even the implied warranty of
10 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
11 * GNU General Public License for more details.
12 *
13 * You should have received a copy of the GNU General Public License
14 * along with this program. If not, see <https://www.gnu.org/licenses/>.
15 */
16#pragma once
17
18#define STM32_HSECLK 12000000
19// The following is required to disable the pull-down on PA9, when PA9 is used for the keyboard matrix:
20#define BOARD_OTG_NOVBUSSENS
21
22#include_next "board.h"
23
24#undef STM32_HSE_BYPASS
25
26#undef STM32F407xx
27#define STM32F405xG
28#define STM32F405xx
diff --git a/platforms/chibios/boards/GENERIC_STM32_F405XG/configs/config.h b/platforms/chibios/boards/GENERIC_STM32_F405XG/configs/config.h
new file mode 100644
index 000000000..cc52a953e
--- /dev/null
+++ b/platforms/chibios/boards/GENERIC_STM32_F405XG/configs/config.h
@@ -0,0 +1,23 @@
1/* Copyright 2021 Andrei Purdea
2 *
3 * This program is free software: you can redistribute it and/or modify
4 * it under the terms of the GNU General Public License as published by
5 * the Free Software Foundation, either version 2 of the License, or
6 * (at your option) any later version.
7 *
8 * This program is distributed in the hope that it will be useful,
9 * but WITHOUT ANY WARRANTY; without even the implied warranty of
10 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
11 * GNU General Public License for more details.
12 *
13 * You should have received a copy of the GNU General Public License
14 * along with this program. If not, see <http://www.gnu.org/licenses/>.
15 */
16
17/* Address for jumping to bootloader on STM32 chips. */
18/* It is chip dependent, the correct number can be looked up by checking against ST's application note AN2606.
19 */
20#define STM32_BOOTLOADER_ADDRESS 0x1FFF0000
21#ifndef EARLY_INIT_PERFORM_BOOTLOADER_JUMP
22# define EARLY_INIT_PERFORM_BOOTLOADER_JUMP TRUE
23#endif
diff --git a/platforms/chibios/boards/GENERIC_STM32_F405XG/configs/mcuconf.h b/platforms/chibios/boards/GENERIC_STM32_F405XG/configs/mcuconf.h
new file mode 100644
index 000000000..d2ec632d9
--- /dev/null
+++ b/platforms/chibios/boards/GENERIC_STM32_F405XG/configs/mcuconf.h
@@ -0,0 +1,355 @@
1/*
2 ChibiOS - Copyright (C) 2006..2018 Giovanni Di Sirio
3
4 Licensed under the Apache License, Version 2.0 (the "License");
5 you may not use this file except in compliance with the License.
6 You may obtain a copy of the License at
7
8 http://www.apache.org/licenses/LICENSE-2.0
9
10 Unless required by applicable law or agreed to in writing, software
11 distributed under the License is distributed on an "AS IS" BASIS,
12 WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
13 See the License for the specific language governing permissions and
14 limitations under the License.
15*/
16
17#ifndef MCUCONF_H
18#define MCUCONF_H
19
20/*
21 * STM32F4xx drivers configuration.
22 * The following settings override the default settings present in
23 * the various device driver implementation headers.
24 * Note that the settings for each driver only have effect if the whole
25 * driver is enabled in halconf.h.
26 *
27 * IRQ priorities:
28 * 15...0 Lowest...Highest.
29 *
30 * DMA priorities:
31 * 0...3 Lowest...Highest.
32 */
33
34#define STM32F4xx_MCUCONF
35#define STM32F405_MCUCONF
36#define STM32F415_MCUCONF
37#define STM32F407_MCUCONF
38#define STM32F417_MCUCONF
39
40/*
41 * HAL driver system settings.
42 */
43#define STM32_NO_INIT FALSE
44#define STM32_PVD_ENABLE FALSE
45#define STM32_PLS STM32_PLS_LEV0
46#define STM32_BKPRAM_ENABLE FALSE
47#define STM32_HSI_ENABLED TRUE
48#define STM32_LSI_ENABLED TRUE
49#define STM32_HSE_ENABLED TRUE
50#define STM32_LSE_ENABLED FALSE
51#define STM32_CLOCK48_REQUIRED TRUE
52#define STM32_SW STM32_SW_PLL
53#define STM32_PLLSRC STM32_PLLSRC_HSE
54#define STM32_PLLM_VALUE 12
55#define STM32_PLLN_VALUE 336
56#define STM32_PLLP_VALUE 2
57#define STM32_PLLQ_VALUE 7
58#define STM32_HPRE STM32_HPRE_DIV1
59#define STM32_PPRE1 STM32_PPRE1_DIV4
60#define STM32_PPRE2 STM32_PPRE2_DIV2
61#define STM32_RTCSEL STM32_RTCSEL_LSI
62#define STM32_RTCPRE_VALUE 8
63#define STM32_MCO1SEL STM32_MCO1SEL_HSI
64#define STM32_MCO1PRE STM32_MCO1PRE_DIV1
65#define STM32_MCO2SEL STM32_MCO2SEL_SYSCLK
66#define STM32_MCO2PRE STM32_MCO2PRE_DIV5
67#define STM32_I2SSRC STM32_I2SSRC_CKIN
68#define STM32_PLLI2SN_VALUE 192
69#define STM32_PLLI2SR_VALUE 5
70
71/*
72 * IRQ system settings.
73 */
74#define STM32_IRQ_EXTI0_PRIORITY 6
75#define STM32_IRQ_EXTI1_PRIORITY 6
76#define STM32_IRQ_EXTI2_PRIORITY 6
77#define STM32_IRQ_EXTI3_PRIORITY 6
78#define STM32_IRQ_EXTI4_PRIORITY 6
79#define STM32_IRQ_EXTI5_9_PRIORITY 6
80#define STM32_IRQ_EXTI10_15_PRIORITY 6
81#define STM32_IRQ_EXTI16_PRIORITY 6
82#define STM32_IRQ_EXTI17_PRIORITY 15
83#define STM32_IRQ_EXTI18_PRIORITY 6
84#define STM32_IRQ_EXTI19_PRIORITY 6
85#define STM32_IRQ_EXTI20_PRIORITY 6
86#define STM32_IRQ_EXTI21_PRIORITY 15
87#define STM32_IRQ_EXTI22_PRIORITY 15
88
89/*
90 * ADC driver system settings.
91 */
92#define STM32_ADC_ADCPRE ADC_CCR_ADCPRE_DIV4
93#define STM32_ADC_USE_ADC1 FALSE
94#define STM32_ADC_USE_ADC2 FALSE
95#define STM32_ADC_USE_ADC3 FALSE
96#define STM32_ADC_ADC1_DMA_STREAM STM32_DMA_STREAM_ID(2, 4)
97#define STM32_ADC_ADC2_DMA_STREAM STM32_DMA_STREAM_ID(2, 2)
98#define STM32_ADC_ADC3_DMA_STREAM STM32_DMA_STREAM_ID(2, 1)
99#define STM32_ADC_ADC1_DMA_PRIORITY 2
100#define STM32_ADC_ADC2_DMA_PRIORITY 2
101#define STM32_ADC_ADC3_DMA_PRIORITY 2
102#define STM32_ADC_IRQ_PRIORITY 6
103#define STM32_ADC_ADC1_DMA_IRQ_PRIORITY 6
104#define STM32_ADC_ADC2_DMA_IRQ_PRIORITY 6
105#define STM32_ADC_ADC3_DMA_IRQ_PRIORITY 6
106
107/*
108 * CAN driver system settings.
109 */
110#define STM32_CAN_USE_CAN1 FALSE
111#define STM32_CAN_USE_CAN2 FALSE
112#define STM32_CAN_CAN1_IRQ_PRIORITY 11
113#define STM32_CAN_CAN2_IRQ_PRIORITY 11
114
115/*
116 * DAC driver system settings.
117 */
118#define STM32_DAC_DUAL_MODE FALSE
119#define STM32_DAC_USE_DAC1_CH1 FALSE
120#define STM32_DAC_USE_DAC1_CH2 FALSE
121#define STM32_DAC_DAC1_CH1_IRQ_PRIORITY 10
122#define STM32_DAC_DAC1_CH2_IRQ_PRIORITY 10
123#define STM32_DAC_DAC1_CH1_DMA_PRIORITY 2
124#define STM32_DAC_DAC1_CH2_DMA_PRIORITY 2
125#define STM32_DAC_DAC1_CH1_DMA_STREAM STM32_DMA_STREAM_ID(1, 5)
126#define STM32_DAC_DAC1_CH2_DMA_STREAM STM32_DMA_STREAM_ID(1, 6)
127
128/*
129 * GPT driver system settings.
130 */
131#define STM32_GPT_USE_TIM1 FALSE
132#define STM32_GPT_USE_TIM2 FALSE
133#define STM32_GPT_USE_TIM3 FALSE
134#define STM32_GPT_USE_TIM4 FALSE
135#define STM32_GPT_USE_TIM5 FALSE
136#define STM32_GPT_USE_TIM6 FALSE
137#define STM32_GPT_USE_TIM7 FALSE
138#define STM32_GPT_USE_TIM8 FALSE
139#define STM32_GPT_USE_TIM9 FALSE
140#define STM32_GPT_USE_TIM11 FALSE
141#define STM32_GPT_USE_TIM12 FALSE
142#define STM32_GPT_USE_TIM14 FALSE
143#define STM32_GPT_TIM1_IRQ_PRIORITY 7
144#define STM32_GPT_TIM2_IRQ_PRIORITY 7
145#define STM32_GPT_TIM3_IRQ_PRIORITY 7
146#define STM32_GPT_TIM4_IRQ_PRIORITY 7
147#define STM32_GPT_TIM5_IRQ_PRIORITY 7
148#define STM32_GPT_TIM6_IRQ_PRIORITY 7
149#define STM32_GPT_TIM7_IRQ_PRIORITY 7
150#define STM32_GPT_TIM8_IRQ_PRIORITY 7
151#define STM32_GPT_TIM9_IRQ_PRIORITY 7
152#define STM32_GPT_TIM11_IRQ_PRIORITY 7
153#define STM32_GPT_TIM12_IRQ_PRIORITY 7
154#define STM32_GPT_TIM14_IRQ_PRIORITY 7
155
156/*
157 * I2C driver system settings.
158 */
159#define STM32_I2C_USE_I2C1 FALSE
160#define STM32_I2C_USE_I2C2 FALSE
161#define STM32_I2C_USE_I2C3 FALSE
162#define STM32_I2C_BUSY_TIMEOUT 50
163#define STM32_I2C_I2C1_RX_DMA_STREAM STM32_DMA_STREAM_ID(1, 0)
164#define STM32_I2C_I2C1_TX_DMA_STREAM STM32_DMA_STREAM_ID(1, 6)
165#define STM32_I2C_I2C2_RX_DMA_STREAM STM32_DMA_STREAM_ID(1, 2)
166#define STM32_I2C_I2C2_TX_DMA_STREAM STM32_DMA_STREAM_ID(1, 7)
167#define STM32_I2C_I2C3_RX_DMA_STREAM STM32_DMA_STREAM_ID(1, 2)
168#define STM32_I2C_I2C3_TX_DMA_STREAM STM32_DMA_STREAM_ID(1, 4)
169#define STM32_I2C_I2C1_IRQ_PRIORITY 5
170#define STM32_I2C_I2C2_IRQ_PRIORITY 5
171#define STM32_I2C_I2C3_IRQ_PRIORITY 5
172#define STM32_I2C_I2C1_DMA_PRIORITY 3
173#define STM32_I2C_I2C2_DMA_PRIORITY 3
174#define STM32_I2C_I2C3_DMA_PRIORITY 3
175#define STM32_I2C_DMA_ERROR_HOOK(i2cp) osalSysHalt("DMA failure")
176
177/*
178 * I2S driver system settings.
179 */
180#define STM32_I2S_USE_SPI2 FALSE
181#define STM32_I2S_USE_SPI3 FALSE
182#define STM32_I2S_SPI2_IRQ_PRIORITY 10
183#define STM32_I2S_SPI3_IRQ_PRIORITY 10
184#define STM32_I2S_SPI2_DMA_PRIORITY 1
185#define STM32_I2S_SPI3_DMA_PRIORITY 1
186#define STM32_I2S_SPI2_RX_DMA_STREAM STM32_DMA_STREAM_ID(1, 3)
187#define STM32_I2S_SPI2_TX_DMA_STREAM STM32_DMA_STREAM_ID(1, 4)
188#define STM32_I2S_SPI3_RX_DMA_STREAM STM32_DMA_STREAM_ID(1, 0)
189#define STM32_I2S_SPI3_TX_DMA_STREAM STM32_DMA_STREAM_ID(1, 7)
190#define STM32_I2S_DMA_ERROR_HOOK(i2sp) osalSysHalt("DMA failure")
191
192/*
193 * ICU driver system settings.
194 */
195#define STM32_ICU_USE_TIM1 FALSE
196#define STM32_ICU_USE_TIM2 FALSE
197#define STM32_ICU_USE_TIM3 FALSE
198#define STM32_ICU_USE_TIM4 FALSE
199#define STM32_ICU_USE_TIM5 FALSE
200#define STM32_ICU_USE_TIM8 FALSE
201#define STM32_ICU_USE_TIM9 FALSE
202#define STM32_ICU_TIM1_IRQ_PRIORITY 7
203#define STM32_ICU_TIM2_IRQ_PRIORITY 7
204#define STM32_ICU_TIM3_IRQ_PRIORITY 7
205#define STM32_ICU_TIM4_IRQ_PRIORITY 7
206#define STM32_ICU_TIM5_IRQ_PRIORITY 7
207#define STM32_ICU_TIM8_IRQ_PRIORITY 7
208#define STM32_ICU_TIM9_IRQ_PRIORITY 7
209
210/*
211 * MAC driver system settings.
212 */
213#define STM32_MAC_TRANSMIT_BUFFERS 2
214#define STM32_MAC_RECEIVE_BUFFERS 4
215#define STM32_MAC_BUFFERS_SIZE 1522
216#define STM32_MAC_PHY_TIMEOUT 100
217#define STM32_MAC_ETH1_CHANGE_PHY_STATE TRUE
218#define STM32_MAC_ETH1_IRQ_PRIORITY 13
219#define STM32_MAC_IP_CHECKSUM_OFFLOAD 0
220
221/*
222 * PWM driver system settings.
223 */
224#define STM32_PWM_USE_ADVANCED FALSE
225#define STM32_PWM_USE_TIM1 FALSE
226#define STM32_PWM_USE_TIM2 FALSE
227#define STM32_PWM_USE_TIM3 FALSE
228#define STM32_PWM_USE_TIM4 FALSE
229#define STM32_PWM_USE_TIM5 FALSE
230#define STM32_PWM_USE_TIM8 FALSE
231#define STM32_PWM_USE_TIM9 FALSE
232#define STM32_PWM_TIM1_IRQ_PRIORITY 7
233#define STM32_PWM_TIM2_IRQ_PRIORITY 7
234#define STM32_PWM_TIM3_IRQ_PRIORITY 7
235#define STM32_PWM_TIM4_IRQ_PRIORITY 7
236#define STM32_PWM_TIM5_IRQ_PRIORITY 7
237#define STM32_PWM_TIM8_IRQ_PRIORITY 7
238#define STM32_PWM_TIM9_IRQ_PRIORITY 7
239
240/*
241 * RTC driver system settings.
242 */
243#define STM32_RTC_PRESA_VALUE 32
244#define STM32_RTC_PRESS_VALUE 1024
245#define STM32_RTC_CR_INIT 0
246#define STM32_RTC_TAMPCR_INIT 0
247
248/*
249 * SDC driver system settings.
250 */
251#define STM32_SDC_SDIO_DMA_PRIORITY 3
252#define STM32_SDC_SDIO_IRQ_PRIORITY 9
253#define STM32_SDC_WRITE_TIMEOUT_MS 1000
254#define STM32_SDC_READ_TIMEOUT_MS 1000
255#define STM32_SDC_CLOCK_ACTIVATION_DELAY 10
256#define STM32_SDC_SDIO_UNALIGNED_SUPPORT TRUE
257#define STM32_SDC_SDIO_DMA_STREAM STM32_DMA_STREAM_ID(2, 3)
258
259/*
260 * SERIAL driver system settings.
261 */
262#define STM32_SERIAL_USE_USART1 FALSE
263#define STM32_SERIAL_USE_USART2 FALSE
264#define STM32_SERIAL_USE_USART3 FALSE
265#define STM32_SERIAL_USE_UART4 FALSE
266#define STM32_SERIAL_USE_UART5 FALSE
267#define STM32_SERIAL_USE_USART6 FALSE
268#define STM32_SERIAL_USART1_PRIORITY 12
269#define STM32_SERIAL_USART2_PRIORITY 12
270#define STM32_SERIAL_USART3_PRIORITY 12
271#define STM32_SERIAL_UART4_PRIORITY 12
272#define STM32_SERIAL_UART5_PRIORITY 12
273#define STM32_SERIAL_USART6_PRIORITY 12
274
275/*
276 * SPI driver system settings.
277 */
278#define STM32_SPI_USE_SPI1 FALSE
279#define STM32_SPI_USE_SPI2 FALSE
280#define STM32_SPI_USE_SPI3 FALSE
281#define STM32_SPI_SPI1_RX_DMA_STREAM STM32_DMA_STREAM_ID(2, 0)
282#define STM32_SPI_SPI1_TX_DMA_STREAM STM32_DMA_STREAM_ID(2, 3)
283#define STM32_SPI_SPI2_RX_DMA_STREAM STM32_DMA_STREAM_ID(1, 3)
284#define STM32_SPI_SPI2_TX_DMA_STREAM STM32_DMA_STREAM_ID(1, 4)
285#define STM32_SPI_SPI3_RX_DMA_STREAM STM32_DMA_STREAM_ID(1, 0)
286#define STM32_SPI_SPI3_TX_DMA_STREAM STM32_DMA_STREAM_ID(1, 7)
287#define STM32_SPI_SPI1_DMA_PRIORITY 1
288#define STM32_SPI_SPI2_DMA_PRIORITY 1
289#define STM32_SPI_SPI3_DMA_PRIORITY 1
290#define STM32_SPI_SPI1_IRQ_PRIORITY 10
291#define STM32_SPI_SPI2_IRQ_PRIORITY 10
292#define STM32_SPI_SPI3_IRQ_PRIORITY 10
293#define STM32_SPI_DMA_ERROR_HOOK(spip) osalSysHalt("DMA failure")
294
295/*
296 * ST driver system settings.
297 */
298#define STM32_ST_IRQ_PRIORITY 8
299#define STM32_ST_USE_TIMER 2
300
301/*
302 * UART driver system settings.
303 */
304#define STM32_UART_USE_USART1 FALSE
305#define STM32_UART_USE_USART2 FALSE
306#define STM32_UART_USE_USART3 FALSE
307#define STM32_UART_USE_UART4 FALSE
308#define STM32_UART_USE_UART5 FALSE
309#define STM32_UART_USE_USART6 FALSE
310#define STM32_UART_USART1_RX_DMA_STREAM STM32_DMA_STREAM_ID(2, 5)
311#define STM32_UART_USART1_TX_DMA_STREAM STM32_DMA_STREAM_ID(2, 7)
312#define STM32_UART_USART2_RX_DMA_STREAM STM32_DMA_STREAM_ID(1, 5)
313#define STM32_UART_USART2_TX_DMA_STREAM STM32_DMA_STREAM_ID(1, 6)
314#define STM32_UART_USART3_RX_DMA_STREAM STM32_DMA_STREAM_ID(1, 1)
315#define STM32_UART_USART3_TX_DMA_STREAM STM32_DMA_STREAM_ID(1, 3)
316#define STM32_UART_UART4_RX_DMA_STREAM STM32_DMA_STREAM_ID(1, 2)
317#define STM32_UART_UART4_TX_DMA_STREAM STM32_DMA_STREAM_ID(1, 4)
318#define STM32_UART_UART5_RX_DMA_STREAM STM32_DMA_STREAM_ID(1, 0)
319#define STM32_UART_UART5_TX_DMA_STREAM STM32_DMA_STREAM_ID(1, 7)
320#define STM32_UART_USART6_RX_DMA_STREAM STM32_DMA_STREAM_ID(2, 2)
321#define STM32_UART_USART6_TX_DMA_STREAM STM32_DMA_STREAM_ID(2, 7)
322#define STM32_UART_USART1_IRQ_PRIORITY 12
323#define STM32_UART_USART2_IRQ_PRIORITY 12
324#define STM32_UART_USART3_IRQ_PRIORITY 12
325#define STM32_UART_UART4_IRQ_PRIORITY 12
326#define STM32_UART_UART5_IRQ_PRIORITY 12
327#define STM32_UART_USART6_IRQ_PRIORITY 12
328#define STM32_UART_USART1_DMA_PRIORITY 0
329#define STM32_UART_USART2_DMA_PRIORITY 0
330#define STM32_UART_USART3_DMA_PRIORITY 0
331#define STM32_UART_UART4_DMA_PRIORITY 0
332#define STM32_UART_UART5_DMA_PRIORITY 0
333#define STM32_UART_USART6_DMA_PRIORITY 0
334#define STM32_UART_DMA_ERROR_HOOK(uartp) osalSysHalt("DMA failure")
335
336/*
337 * USB driver system settings.
338 */
339#define STM32_USB_USE_OTG1 TRUE
340#define STM32_USB_USE_OTG2 FALSE
341#define STM32_USB_OTG1_IRQ_PRIORITY 14
342#define STM32_USB_OTG2_IRQ_PRIORITY 14
343#define STM32_USB_OTG1_RX_FIFO_SIZE 512
344#define STM32_USB_OTG2_RX_FIFO_SIZE 1024
345#define STM32_USB_HOST_WAKEUP_DURATION 2
346
347#define STM32_USB_OTG_THREAD_PRIO NORMALPRIO+1
348#define STM32_USB_OTG_THREAD_STACK_SIZE 128
349
350/*
351 * WDG driver system settings.
352 */
353#define STM32_WDG_USE_IWDG FALSE
354
355#endif /* MCUCONF_H */
diff --git a/platforms/chibios/boards/common/ld/STM32F405xG.ld b/platforms/chibios/boards/common/ld/STM32F405xG.ld
new file mode 100644
index 000000000..b7d0baa21
--- /dev/null
+++ b/platforms/chibios/boards/common/ld/STM32F405xG.ld
@@ -0,0 +1,86 @@
1/*
2 ChibiOS - Copyright (C) 2006..2018 Giovanni Di Sirio
3
4 Licensed under the Apache License, Version 2.0 (the "License");
5 you may not use this file except in compliance with the License.
6 You may obtain a copy of the License at
7
8 http://www.apache.org/licenses/LICENSE-2.0
9
10 Unless required by applicable law or agreed to in writing, software
11 distributed under the License is distributed on an "AS IS" BASIS,
12 WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
13 See the License for the specific language governing permissions and
14 limitations under the License.
15*/
16
17/*
18 * STM32F405xG memory setup.
19 * Note: Use of ram1 and ram2 is mutually exclusive with use of ram0.
20 */
21MEMORY
22{
23 flash0 (rx) : org = 0x08000000, len = 16k /* Sector 0 - Init code as ROM bootloader assumes application starts here */
24 flash1 (rx) : org = 0x08004000, len = 16k /* Sector 1 - Emulated eeprom */
25 flash2 (rx) : org = 0x08008000, len = 1M - 32k /* Sector 2..6 - Rest of firmware */
26 flash3 (rx) : org = 0x00000000, len = 0
27 flash4 (rx) : org = 0x00000000, len = 0
28 flash5 (rx) : org = 0x00000000, len = 0
29 flash6 (rx) : org = 0x00000000, len = 0
30 flash7 (rx) : org = 0x00000000, len = 0
31 ram0 (wx) : org = 0x20000000, len = 128k /* SRAM1 + SRAM2 */
32 ram1 (wx) : org = 0x20000000, len = 112k /* SRAM1 */
33 ram2 (wx) : org = 0x2001C000, len = 16k /* SRAM2 */
34 ram3 (wx) : org = 0x00000000, len = 0
35 ram4 (wx) : org = 0x10000000, len = 64k /* CCM SRAM */
36 ram5 (wx) : org = 0x40024000, len = 4k /* BCKP SRAM */
37 ram6 (wx) : org = 0x00000000, len = 0
38 ram7 (wx) : org = 0x00000000, len = 0
39}
40
41/* For each data/text section two region are defined, a virtual region
42 and a load region (_LMA suffix).*/
43
44/* Flash region to be used for exception vectors.*/
45REGION_ALIAS("VECTORS_FLASH", flash0);
46REGION_ALIAS("VECTORS_FLASH_LMA", flash0);
47
48/* Flash region to be used for constructors and destructors.*/
49REGION_ALIAS("XTORS_FLASH", flash2);
50REGION_ALIAS("XTORS_FLASH_LMA", flash2);
51
52/* Flash region to be used for code text.*/
53REGION_ALIAS("TEXT_FLASH", flash2);
54REGION_ALIAS("TEXT_FLASH_LMA", flash2);
55
56/* Flash region to be used for read only data.*/
57REGION_ALIAS("RODATA_FLASH", flash2);
58REGION_ALIAS("RODATA_FLASH_LMA", flash2);
59
60/* Flash region to be used for various.*/
61REGION_ALIAS("VARIOUS_FLASH", flash2);
62REGION_ALIAS("VARIOUS_FLASH_LMA", flash2);
63
64/* Flash region to be used for RAM(n) initialization data.*/
65REGION_ALIAS("RAM_INIT_FLASH_LMA", flash2);
66
67/* RAM region to be used for Main stack. This stack accommodates the processing
68 of all exceptions and interrupts.*/
69REGION_ALIAS("MAIN_STACK_RAM", ram0);
70
71/* RAM region to be used for the process stack. This is the stack used by
72 the main() function.*/
73REGION_ALIAS("PROCESS_STACK_RAM", ram0);
74
75/* RAM region to be used for data segment.*/
76REGION_ALIAS("DATA_RAM", ram0);
77REGION_ALIAS("DATA_RAM_LMA", flash2);
78
79/* RAM region to be used for BSS segment.*/
80REGION_ALIAS("BSS_RAM", ram0);
81
82/* RAM region to be used for the default heap.*/
83REGION_ALIAS("HEAP_RAM", ram0);
84
85/* Generic rules inclusion.*/
86INCLUDE rules.ld
diff --git a/quantum/mcu_selection.mk b/quantum/mcu_selection.mk
index f7eaeec8a..48c53e4da 100644
--- a/quantum/mcu_selection.mk
+++ b/quantum/mcu_selection.mk
@@ -273,6 +273,38 @@ ifneq ($(findstring STM32F401, $(MCU)),)
273 UF2_FAMILY ?= STM32F4 273 UF2_FAMILY ?= STM32F4
274endif 274endif
275 275
276ifneq ($(findstring STM32F405, $(MCU)),)
277 # Cortex version
278 MCU = cortex-m4
279
280 # ARM version, CORTEX-M0/M1 are 6, CORTEX-M3/M4/M7 are 7
281 ARMV = 7
282
283 ## chip/board settings
284 # - the next two should match the directories in
285 # <chibios>/os/hal/ports/$(MCU_FAMILY)/$(MCU_SERIES)
286 MCU_FAMILY = STM32
287 MCU_SERIES = STM32F4xx
288
289 # Linker script to use
290 # - it should exist either in <chibios>/os/common/ports/ARMCMx/compilers/GCC/ld/
291 # or <keyboard_dir>/ld/
292 MCU_LDSCRIPT ?= STM32F405xG
293
294 # Startup code to use
295 # - it should exist in <chibios>/os/common/startup/ARMCMx/compilers/GCC/mk/
296 MCU_STARTUP ?= stm32f4xx
297
298 # Board: it should exist either in <chibios>/os/hal/boards/,
299 # <keyboard_dir>/boards/, or drivers/boards/
300 BOARD ?= GENERIC_STM32_F405XG
301
302 USE_FPU ?= yes
303
304 # UF2 settings
305 UF2_FAMILY ?= STM32F4
306endif
307
276ifneq ($(findstring STM32F407, $(MCU)),) 308ifneq ($(findstring STM32F407, $(MCU)),)
277 # Cortex version 309 # Cortex version
278 MCU = cortex-m4 310 MCU = cortex-m4
diff --git a/tmk_core/common/chibios/eeprom_stm32_defs.h b/tmk_core/common/chibios/eeprom_stm32_defs.h
index 57de42c6b..cc64cda74 100644
--- a/tmk_core/common/chibios/eeprom_stm32_defs.h
+++ b/tmk_core/common/chibios/eeprom_stm32_defs.h
@@ -32,7 +32,7 @@
32# ifndef FEE_PAGE_COUNT 32# ifndef FEE_PAGE_COUNT
33# define FEE_PAGE_COUNT 4 // How many pages are used 33# define FEE_PAGE_COUNT 4 // How many pages are used
34# endif 34# endif
35# elif defined(STM32F401xC) || defined(STM32F411xE) 35# elif defined(STM32F401xC) || defined(STM32F405xG) || defined(STM32F411xE)
36# ifndef FEE_PAGE_SIZE 36# ifndef FEE_PAGE_SIZE
37# define FEE_PAGE_SIZE 0x4000 // Page size = 16KByte 37# define FEE_PAGE_SIZE 0x4000 // Page size = 16KByte
38# endif 38# endif
@@ -51,12 +51,14 @@
51# define FEE_MCU_FLASH_SIZE 256 // Size in Kb 51# define FEE_MCU_FLASH_SIZE 256 // Size in Kb
52# elif defined(STM32F103xE) || defined(STM32F411xE) 52# elif defined(STM32F103xE) || defined(STM32F411xE)
53# define FEE_MCU_FLASH_SIZE 512 // Size in Kb 53# define FEE_MCU_FLASH_SIZE 512 // Size in Kb
54# elif defined(STM32F405xG)
55# define FEE_MCU_FLASH_SIZE 1024 // Size in Kb
54# endif 56# endif
55#endif 57#endif
56 58
57/* Start of the emulated eeprom */ 59/* Start of the emulated eeprom */
58#if !defined(FEE_PAGE_BASE_ADDRESS) 60#if !defined(FEE_PAGE_BASE_ADDRESS)
59# if defined(STM32F401xC) || defined(STM32F411xE) 61# if defined(STM32F401xC) || defined(STM32F405xG) || defined(STM32F411xE)
60# ifndef FEE_PAGE_BASE_ADDRESS 62# ifndef FEE_PAGE_BASE_ADDRESS
61# define FEE_PAGE_BASE_ADDRESS 0x08004000 // bodge to force 2nd 16k page 63# define FEE_PAGE_BASE_ADDRESS 0x08004000 // bodge to force 2nd 16k page
62# endif 64# endif
generated by cgit v1.2.3 (git 2.25.1) at 2025-07-01 18:17:36 +0000