diff options
22 files changed, 8841 insertions, 0 deletions
diff --git a/drivers/boards/BLACKPILL_STM32_F401/board.c b/drivers/boards/BLACKPILL_STM32_F401/board.c new file mode 100644 index 000000000..a06b52d14 --- /dev/null +++ b/drivers/boards/BLACKPILL_STM32_F401/board.c | |||
| @@ -0,0 +1,269 @@ | |||
| 1 | /* | ||
| 2 | ChibiOS - Copyright (C) 2006..2018 Giovanni Di Sirio | ||
| 3 | |||
| 4 | Licensed under the Apache License, Version 2.0 (the "License"); | ||
| 5 | you may not use this file except in compliance with the License. | ||
| 6 | You may obtain a copy of the License at | ||
| 7 | |||
| 8 | http://www.apache.org/licenses/LICENSE-2.0 | ||
| 9 | |||
| 10 | Unless required by applicable law or agreed to in writing, software | ||
| 11 | distributed under the License is distributed on an "AS IS" BASIS, | ||
| 12 | WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. | ||
| 13 | See the License for the specific language governing permissions and | ||
| 14 | limitations under the License. | ||
| 15 | */ | ||
| 16 | |||
| 17 | /* | ||
| 18 | * This file has been automatically generated using ChibiStudio board | ||
| 19 | * generator plugin. Do not edit manually. | ||
| 20 | */ | ||
| 21 | |||
| 22 | #include "hal.h" | ||
| 23 | #include "stm32_gpio.h" | ||
| 24 | |||
| 25 | /*===========================================================================*/ | ||
| 26 | /* Driver local definitions. */ | ||
| 27 | /*===========================================================================*/ | ||
| 28 | |||
| 29 | /*===========================================================================*/ | ||
| 30 | /* Driver exported variables. */ | ||
| 31 | /*===========================================================================*/ | ||
| 32 | |||
| 33 | /*===========================================================================*/ | ||
| 34 | /* Driver local variables and types. */ | ||
| 35 | /*===========================================================================*/ | ||
| 36 | |||
| 37 | /** | ||
| 38 | * @brief Type of STM32 GPIO port setup. | ||
| 39 | */ | ||
| 40 | typedef struct { | ||
| 41 | uint32_t moder; | ||
| 42 | uint32_t otyper; | ||
| 43 | uint32_t ospeedr; | ||
| 44 | uint32_t pupdr; | ||
| 45 | uint32_t odr; | ||
| 46 | uint32_t afrl; | ||
| 47 | uint32_t afrh; | ||
| 48 | } gpio_setup_t; | ||
| 49 | |||
| 50 | /** | ||
| 51 | * @brief Type of STM32 GPIO initialization data. | ||
| 52 | */ | ||
| 53 | typedef struct { | ||
| 54 | #if STM32_HAS_GPIOA || defined(__DOXYGEN__) | ||
| 55 | gpio_setup_t PAData; | ||
| 56 | #endif | ||
| 57 | #if STM32_HAS_GPIOB || defined(__DOXYGEN__) | ||
| 58 | gpio_setup_t PBData; | ||
| 59 | #endif | ||
| 60 | #if STM32_HAS_GPIOC || defined(__DOXYGEN__) | ||
| 61 | gpio_setup_t PCData; | ||
| 62 | #endif | ||
| 63 | #if STM32_HAS_GPIOD || defined(__DOXYGEN__) | ||
| 64 | gpio_setup_t PDData; | ||
| 65 | #endif | ||
| 66 | #if STM32_HAS_GPIOE || defined(__DOXYGEN__) | ||
| 67 | gpio_setup_t PEData; | ||
| 68 | #endif | ||
| 69 | #if STM32_HAS_GPIOF || defined(__DOXYGEN__) | ||
| 70 | gpio_setup_t PFData; | ||
| 71 | #endif | ||
| 72 | #if STM32_HAS_GPIOG || defined(__DOXYGEN__) | ||
| 73 | gpio_setup_t PGData; | ||
| 74 | #endif | ||
| 75 | #if STM32_HAS_GPIOH || defined(__DOXYGEN__) | ||
| 76 | gpio_setup_t PHData; | ||
| 77 | #endif | ||
| 78 | #if STM32_HAS_GPIOI || defined(__DOXYGEN__) | ||
| 79 | gpio_setup_t PIData; | ||
| 80 | #endif | ||
| 81 | #if STM32_HAS_GPIOJ || defined(__DOXYGEN__) | ||
| 82 | gpio_setup_t PJData; | ||
| 83 | #endif | ||
| 84 | #if STM32_HAS_GPIOK || defined(__DOXYGEN__) | ||
| 85 | gpio_setup_t PKData; | ||
| 86 | #endif | ||
| 87 | } gpio_config_t; | ||
| 88 | |||
| 89 | /** | ||
| 90 | * @brief STM32 GPIO static initialization data. | ||
| 91 | */ | ||
| 92 | static const gpio_config_t gpio_default_config = { | ||
| 93 | #if STM32_HAS_GPIOA | ||
| 94 | {VAL_GPIOA_MODER, VAL_GPIOA_OTYPER, VAL_GPIOA_OSPEEDR, VAL_GPIOA_PUPDR, | ||
| 95 | VAL_GPIOA_ODR, VAL_GPIOA_AFRL, VAL_GPIOA_AFRH}, | ||
| 96 | #endif | ||
| 97 | #if STM32_HAS_GPIOB | ||
| 98 | {VAL_GPIOB_MODER, VAL_GPIOB_OTYPER, VAL_GPIOB_OSPEEDR, VAL_GPIOB_PUPDR, | ||
| 99 | VAL_GPIOB_ODR, VAL_GPIOB_AFRL, VAL_GPIOB_AFRH}, | ||
| 100 | #endif | ||
| 101 | #if STM32_HAS_GPIOC | ||
| 102 | {VAL_GPIOC_MODER, VAL_GPIOC_OTYPER, VAL_GPIOC_OSPEEDR, VAL_GPIOC_PUPDR, | ||
| 103 | VAL_GPIOC_ODR, VAL_GPIOC_AFRL, VAL_GPIOC_AFRH}, | ||
| 104 | #endif | ||
| 105 | #if STM32_HAS_GPIOD | ||
| 106 | {VAL_GPIOD_MODER, VAL_GPIOD_OTYPER, VAL_GPIOD_OSPEEDR, VAL_GPIOD_PUPDR, | ||
| 107 | VAL_GPIOD_ODR, VAL_GPIOD_AFRL, VAL_GPIOD_AFRH}, | ||
| 108 | #endif | ||
| 109 | #if STM32_HAS_GPIOE | ||
| 110 | {VAL_GPIOE_MODER, VAL_GPIOE_OTYPER, VAL_GPIOE_OSPEEDR, VAL_GPIOE_PUPDR, | ||
| 111 | VAL_GPIOE_ODR, VAL_GPIOE_AFRL, VAL_GPIOE_AFRH}, | ||
| 112 | #endif | ||
| 113 | #if STM32_HAS_GPIOF | ||
| 114 | {VAL_GPIOF_MODER, VAL_GPIOF_OTYPER, VAL_GPIOF_OSPEEDR, VAL_GPIOF_PUPDR, | ||
| 115 | VAL_GPIOF_ODR, VAL_GPIOF_AFRL, VAL_GPIOF_AFRH}, | ||
| 116 | #endif | ||
| 117 | #if STM32_HAS_GPIOG | ||
| 118 | {VAL_GPIOG_MODER, VAL_GPIOG_OTYPER, VAL_GPIOG_OSPEEDR, VAL_GPIOG_PUPDR, | ||
| 119 | VAL_GPIOG_ODR, VAL_GPIOG_AFRL, VAL_GPIOG_AFRH}, | ||
| 120 | #endif | ||
| 121 | #if STM32_HAS_GPIOH | ||
| 122 | {VAL_GPIOH_MODER, VAL_GPIOH_OTYPER, VAL_GPIOH_OSPEEDR, VAL_GPIOH_PUPDR, | ||
| 123 | VAL_GPIOH_ODR, VAL_GPIOH_AFRL, VAL_GPIOH_AFRH}, | ||
| 124 | #endif | ||
| 125 | #if STM32_HAS_GPIOI | ||
| 126 | {VAL_GPIOI_MODER, VAL_GPIOI_OTYPER, VAL_GPIOI_OSPEEDR, VAL_GPIOI_PUPDR, | ||
| 127 | VAL_GPIOI_ODR, VAL_GPIOI_AFRL, VAL_GPIOI_AFRH}, | ||
| 128 | #endif | ||
| 129 | #if STM32_HAS_GPIOJ | ||
| 130 | {VAL_GPIOJ_MODER, VAL_GPIOJ_OTYPER, VAL_GPIOJ_OSPEEDR, VAL_GPIOJ_PUPDR, | ||
| 131 | VAL_GPIOJ_ODR, VAL_GPIOJ_AFRL, VAL_GPIOJ_AFRH}, | ||
| 132 | #endif | ||
| 133 | #if STM32_HAS_GPIOK | ||
| 134 | {VAL_GPIOK_MODER, VAL_GPIOK_OTYPER, VAL_GPIOK_OSPEEDR, VAL_GPIOK_PUPDR, | ||
| 135 | VAL_GPIOK_ODR, VAL_GPIOK_AFRL, VAL_GPIOK_AFRH} | ||
| 136 | #endif | ||
| 137 | }; | ||
| 138 | |||
| 139 | /*===========================================================================*/ | ||
| 140 | /* Driver local functions. */ | ||
| 141 | /*===========================================================================*/ | ||
| 142 | |||
| 143 | static void gpio_init(stm32_gpio_t *gpiop, const gpio_setup_t *config) { | ||
| 144 | |||
| 145 | gpiop->OTYPER = config->otyper; | ||
| 146 | gpiop->OSPEEDR = config->ospeedr; | ||
| 147 | gpiop->PUPDR = config->pupdr; | ||
| 148 | gpiop->ODR = config->odr; | ||
| 149 | gpiop->AFRL = config->afrl; | ||
| 150 | gpiop->AFRH = config->afrh; | ||
| 151 | gpiop->MODER = config->moder; | ||
| 152 | } | ||
| 153 | |||
| 154 | static void stm32_gpio_init(void) { | ||
| 155 | |||
| 156 | /* Enabling GPIO-related clocks, the mask comes from the | ||
| 157 | registry header file.*/ | ||
| 158 | rccResetAHB1(STM32_GPIO_EN_MASK); | ||
| 159 | rccEnableAHB1(STM32_GPIO_EN_MASK, true); | ||
| 160 | |||
| 161 | /* Initializing all the defined GPIO ports.*/ | ||
| 162 | #if STM32_HAS_GPIOA | ||
| 163 | gpio_init(GPIOA, &gpio_default_config.PAData); | ||
| 164 | #endif | ||
| 165 | #if STM32_HAS_GPIOB | ||
| 166 | gpio_init(GPIOB, &gpio_default_config.PBData); | ||
| 167 | #endif | ||
| 168 | #if STM32_HAS_GPIOC | ||
| 169 | gpio_init(GPIOC, &gpio_default_config.PCData); | ||
| 170 | #endif | ||
| 171 | #if STM32_HAS_GPIOD | ||
| 172 | gpio_init(GPIOD, &gpio_default_config.PDData); | ||
| 173 | #endif | ||
| 174 | #if STM32_HAS_GPIOE | ||
| 175 | gpio_init(GPIOE, &gpio_default_config.PEData); | ||
| 176 | #endif | ||
| 177 | #if STM32_HAS_GPIOF | ||
| 178 | gpio_init(GPIOF, &gpio_default_config.PFData); | ||
| 179 | #endif | ||
| 180 | #if STM32_HAS_GPIOG | ||
| 181 | gpio_init(GPIOG, &gpio_default_config.PGData); | ||
| 182 | #endif | ||
| 183 | #if STM32_HAS_GPIOH | ||
| 184 | gpio_init(GPIOH, &gpio_default_config.PHData); | ||
| 185 | #endif | ||
| 186 | #if STM32_HAS_GPIOI | ||
| 187 | gpio_init(GPIOI, &gpio_default_config.PIData); | ||
| 188 | #endif | ||
| 189 | #if STM32_HAS_GPIOJ | ||
| 190 | gpio_init(GPIOJ, &gpio_default_config.PJData); | ||
| 191 | #endif | ||
| 192 | #if STM32_HAS_GPIOK | ||
| 193 | gpio_init(GPIOK, &gpio_default_config.PKData); | ||
| 194 | #endif | ||
| 195 | } | ||
| 196 | |||
| 197 | /*===========================================================================*/ | ||
| 198 | /* Driver interrupt handlers. */ | ||
| 199 | /*===========================================================================*/ | ||
| 200 | |||
| 201 | /*===========================================================================*/ | ||
| 202 | /* Driver exported functions. */ | ||
| 203 | /*===========================================================================*/ | ||
| 204 | |||
| 205 | __attribute__((weak)) void enter_bootloader_mode_if_requested(void) {} | ||
| 206 | |||
| 207 | /** | ||
| 208 | * @brief Early initialization code. | ||
| 209 | * @details GPIO ports and system clocks are initialized before everything | ||
| 210 | * else. | ||
| 211 | */ | ||
| 212 | void __early_init(void) { | ||
| 213 | enter_bootloader_mode_if_requested(); | ||
| 214 | |||
| 215 | stm32_gpio_init(); | ||
| 216 | stm32_clock_init(); | ||
| 217 | } | ||
| 218 | |||
| 219 | #if HAL_USE_SDC || defined(__DOXYGEN__) | ||
| 220 | /** | ||
| 221 | * @brief SDC card detection. | ||
| 222 | */ | ||
| 223 | bool sdc_lld_is_card_inserted(SDCDriver *sdcp) { | ||
| 224 | |||
| 225 | (void)sdcp; | ||
| 226 | /* TODO: Fill the implementation.*/ | ||
| 227 | return true; | ||
| 228 | } | ||
| 229 | |||
| 230 | /** | ||
| 231 | * @brief SDC card write protection detection. | ||
| 232 | */ | ||
| 233 | bool sdc_lld_is_write_protected(SDCDriver *sdcp) { | ||
| 234 | |||
| 235 | (void)sdcp; | ||
| 236 | /* TODO: Fill the implementation.*/ | ||
| 237 | return false; | ||
| 238 | } | ||
| 239 | #endif /* HAL_USE_SDC */ | ||
| 240 | |||
| 241 | #if HAL_USE_MMC_SPI || defined(__DOXYGEN__) | ||
| 242 | /** | ||
| 243 | * @brief MMC_SPI card detection. | ||
| 244 | */ | ||
| 245 | bool mmc_lld_is_card_inserted(MMCDriver *mmcp) { | ||
| 246 | |||
| 247 | (void)mmcp; | ||
| 248 | /* TODO: Fill the implementation.*/ | ||
| 249 | return true; | ||
| 250 | } | ||
| 251 | |||
| 252 | /** | ||
| 253 | * @brief MMC_SPI card write protection detection. | ||
| 254 | */ | ||
| 255 | bool mmc_lld_is_write_protected(MMCDriver *mmcp) { | ||
| 256 | |||
| 257 | (void)mmcp; | ||
| 258 | /* TODO: Fill the implementation.*/ | ||
| 259 | return false; | ||
| 260 | } | ||
| 261 | #endif | ||
| 262 | |||
| 263 | /** | ||
| 264 | * @brief Board-specific initialization code. | ||
| 265 | * @todo Add your board-specific code, if any. | ||
| 266 | */ | ||
| 267 | void boardInit(void) { | ||
| 268 | |||
| 269 | } | ||
diff --git a/drivers/boards/BLACKPILL_STM32_F401/board.h b/drivers/boards/BLACKPILL_STM32_F401/board.h new file mode 100644 index 000000000..38e05f998 --- /dev/null +++ b/drivers/boards/BLACKPILL_STM32_F401/board.h | |||
| @@ -0,0 +1,1369 @@ | |||
| 1 | /* | ||
| 2 | ChibiOS - Copyright (C) 2006..2018 Giovanni Di Sirio | ||
| 3 | |||
| 4 | Licensed under the Apache License, Version 2.0 (the "License"); | ||
| 5 | you may not use this file except in compliance with the License. | ||
| 6 | You may obtain a copy of the License at | ||
| 7 | |||
| 8 | http://www.apache.org/licenses/LICENSE-2.0 | ||
| 9 | |||
| 10 | Unless required by applicable law or agreed to in writing, software | ||
| 11 | distributed under the License is distributed on an "AS IS" BASIS, | ||
| 12 | WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. | ||
| 13 | See the License for the specific language governing permissions and | ||
| 14 | limitations under the License. | ||
| 15 | */ | ||
| 16 | |||
| 17 | /* | ||
| 18 | * This file has been automatically generated using ChibiStudio board | ||
| 19 | * generator plugin. Do not edit manually. | ||
| 20 | */ | ||
| 21 | |||
| 22 | #ifndef BOARD_H | ||
| 23 | #define BOARD_H | ||
| 24 | |||
| 25 | /*===========================================================================*/ | ||
| 26 | /* Driver constants. */ | ||
| 27 | /*===========================================================================*/ | ||
| 28 | |||
| 29 | /* | ||
| 30 | * Setup for STM32F401CCU6 black pill board. | ||
| 31 | */ | ||
| 32 | |||
| 33 | /* | ||
| 34 | * Board identifier. | ||
| 35 | */ | ||
| 36 | #define BOARD_BLACKPILL_STM32_F401 | ||
| 37 | #define BOARD_NAME "STM32F401CCU6 blackpill" | ||
| 38 | |||
| 39 | /* | ||
| 40 | * Allow Board to boot USB without extra A9 hardware/software config | ||
| 41 | */ | ||
| 42 | #define BOARD_OTG_NOVBUSSENS 1 | ||
| 43 | |||
| 44 | /* | ||
| 45 | * Board oscillators-related settings. | ||
| 46 | */ | ||
| 47 | #if !defined(STM32_LSECLK) | ||
| 48 | #define STM32_LSECLK 32768U | ||
| 49 | #endif | ||
| 50 | |||
| 51 | #if !defined(STM32_HSECLK) | ||
| 52 | #define STM32_HSECLK 25000000U | ||
| 53 | #endif | ||
| 54 | |||
| 55 | /* | ||
| 56 | * Board voltages. | ||
| 57 | * Required for performance limits calculation. | ||
| 58 | */ | ||
| 59 | #define STM32_VDD 300U | ||
| 60 | |||
| 61 | /* | ||
| 62 | * MCU type as defined in the ST header. | ||
| 63 | */ | ||
| 64 | #define STM32F401xC | ||
| 65 | |||
| 66 | /* | ||
| 67 | * IO pins assignments. | ||
| 68 | */ | ||
| 69 | #define GPIOA_BUTTON 0U | ||
| 70 | #define GPIOA_PIN1 1U | ||
| 71 | #define GPIOA_PIN2 2U | ||
| 72 | #define GPIOA_PIN3 3U | ||
| 73 | #define GPIOA_CS43L22_LRCK 4U | ||
| 74 | #define GPIOA_L3GD20_SCL 5U | ||
| 75 | #define GPIOA_L3GD20_SD0 6U | ||
| 76 | #define GPIOA_L3GD20_SDI 7U | ||
| 77 | #define GPIOA_PIN8 8U | ||
| 78 | #define GPIOA_VBUS_FS 9U | ||
| 79 | #define GPIOA_OTG_FS_ID 10U | ||
| 80 | #define GPIOA_OTG_FS_DM 11U | ||
| 81 | #define GPIOA_OTG_FS_DP 12U | ||
| 82 | #define GPIOA_SWDIO 13U | ||
| 83 | #define GPIOA_SWCLK 14U | ||
| 84 | #define GPIOA_PIN15 15U | ||
| 85 | |||
| 86 | #define GPIOB_PIN0 0U | ||
| 87 | #define GPIOB_PIN1 1U | ||
| 88 | #define GPIOB_PIN2 2U | ||
| 89 | #define GPIOB_SWO 3U | ||
| 90 | #define GPIOB_PIN4 4U | ||
| 91 | #define GPIOB_PIN5 5U | ||
| 92 | #define GPIOB_LSM303DLHC_SCL 6U | ||
| 93 | #define GPIOB_PIN7 7U | ||
| 94 | #define GPIOB_PIN8 8U | ||
| 95 | #define GPIOB_LSM303DLHC_SDA 9U | ||
| 96 | #define GPIOB_MP45DT02_CLK_IN 10U | ||
| 97 | #define GPIOB_PIN11 11U | ||
| 98 | #define GPIOB_PIN12 12U | ||
| 99 | #define GPIOB_PIN13 13U | ||
| 100 | #define GPIOB_PIN14 14U | ||
| 101 | #define GPIOB_PIN15 15U | ||
| 102 | |||
| 103 | #define GPIOC_OTG_FS_POWER_ON 0U | ||
| 104 | #define GPIOC_PIN1 1U | ||
| 105 | #define GPIOC_PIN2 2U | ||
| 106 | #define GPIOC_CS43L22_AIN4x 3U | ||
| 107 | #define GPIOC_MP45DT02_PDM_OUT 3U | ||
| 108 | #define GPIOC_PIN4 4U | ||
| 109 | #define GPIOC_PIN5 5U | ||
| 110 | #define GPIOC_PIN6 6U | ||
| 111 | #define GPIOC_CS43L22_MCLK 7U | ||
| 112 | #define GPIOC_PIN8 8U | ||
| 113 | #define GPIOC_PIN9 9U | ||
| 114 | #define GPIOC_CS43L22_SCLK 10U | ||
| 115 | #define GPIOC_PIN11 11U | ||
| 116 | #define GPIOC_CS43L22_SDIN 12U | ||
| 117 | #define GPIOC_PIN13 13U | ||
| 118 | #define GPIOC_OSC32_IN 14U | ||
| 119 | #define GPIOC_OSC32_OUT 15U | ||
| 120 | |||
| 121 | #define GPIOD_PIN0 0U | ||
| 122 | #define GPIOD_PIN1 1U | ||
| 123 | #define GPIOD_PIN2 2U | ||
| 124 | #define GPIOD_PIN3 3U | ||
| 125 | #define GPIOD_CS43L22_RESET 4U | ||
| 126 | #define GPIOD_OverCurrent 5U | ||
| 127 | #define GPIOD_PIN6 6U | ||
| 128 | #define GPIOD_PIN7 7U | ||
| 129 | #define GPIOD_PIN8 8U | ||
| 130 | #define GPIOD_PIN9 9U | ||
| 131 | #define GPIOD_PIN10 10U | ||
| 132 | #define GPIOD_PIN11 11U | ||
| 133 | #define GPIOD_LED4 12U | ||
| 134 | #define GPIOD_LED3 13U | ||
| 135 | #define GPIOD_LED5 14U | ||
| 136 | #define GPIOD_LED6 15U | ||
| 137 | |||
| 138 | #define GPIOE_L3GD20_INT1 0U | ||
| 139 | #define GPIOE_L3GD20_INT2 1U | ||
| 140 | #define GPIOE_LSM303DLHC_DRDY 2U | ||
| 141 | #define GPIOE_L3GD20_CS 3U | ||
| 142 | #define GPIOE_LSM303DLHC_INT1 4U | ||
| 143 | #define GPIOE_LSM303DLHC_INT2 5U | ||
| 144 | #define GPIOE_PIN6 6U | ||
| 145 | #define GPIOE_PIN7 7U | ||
| 146 | #define GPIOE_PIN8 8U | ||
| 147 | #define GPIOE_PIN9 9U | ||
| 148 | #define GPIOE_PIN10 10U | ||
| 149 | #define GPIOE_PIN11 11U | ||
| 150 | #define GPIOE_PIN12 12U | ||
| 151 | #define GPIOE_PIN13 13U | ||
| 152 | #define GPIOE_PIN14 14U | ||
| 153 | #define GPIOE_PIN15 15U | ||
| 154 | |||
| 155 | #define GPIOF_PIN0 0U | ||
| 156 | #define GPIOF_PIN1 1U | ||
| 157 | #define GPIOF_PIN2 2U | ||
| 158 | #define GPIOF_PIN3 3U | ||
| 159 | #define GPIOF_PIN4 4U | ||
| 160 | #define GPIOF_PIN5 5U | ||
| 161 | #define GPIOF_PIN6 6U | ||
| 162 | #define GPIOF_PIN7 7U | ||
| 163 | #define GPIOF_PIN8 8U | ||
| 164 | #define GPIOF_PIN9 9U | ||
| 165 | #define GPIOF_PIN10 10U | ||
| 166 | #define GPIOF_PIN11 11U | ||
| 167 | #define GPIOF_PIN12 12U | ||
| 168 | #define GPIOF_PIN13 13U | ||
| 169 | #define GPIOF_PIN14 14U | ||
| 170 | #define GPIOF_PIN15 15U | ||
| 171 | |||
| 172 | #define GPIOG_PIN0 0U | ||
| 173 | #define GPIOG_PIN1 1U | ||
| 174 | #define GPIOG_PIN2 2U | ||
| 175 | #define GPIOG_PIN3 3U | ||
| 176 | #define GPIOG_PIN4 4U | ||
| 177 | #define GPIOG_PIN5 5U | ||
| 178 | #define GPIOG_PIN6 6U | ||
| 179 | #define GPIOG_PIN7 7U | ||
| 180 | #define GPIOG_PIN8 8U | ||
| 181 | #define GPIOG_PIN9 9U | ||
| 182 | #define GPIOG_PIN10 10U | ||
| 183 | #define GPIOG_PIN11 11U | ||
| 184 | #define GPIOG_PIN12 12U | ||
| 185 | #define GPIOG_PIN13 13U | ||
| 186 | #define GPIOG_PIN14 14U | ||
| 187 | #define GPIOG_PIN15 15U | ||
| 188 | |||
| 189 | #define GPIOH_OSC_IN 0U | ||
| 190 | #define GPIOH_OSC_OUT 1U | ||
| 191 | #define GPIOH_PIN2 2U | ||
| 192 | #define GPIOH_PIN3 3U | ||
| 193 | #define GPIOH_PIN4 4U | ||
| 194 | #define GPIOH_PIN5 5U | ||
| 195 | #define GPIOH_PIN6 6U | ||
| 196 | #define GPIOH_PIN7 7U | ||
| 197 | #define GPIOH_PIN8 8U | ||
| 198 | #define GPIOH_PIN9 9U | ||
| 199 | #define GPIOH_PIN10 10U | ||
| 200 | #define GPIOH_PIN11 11U | ||
| 201 | #define GPIOH_PIN12 12U | ||
| 202 | #define GPIOH_PIN13 13U | ||
| 203 | #define GPIOH_PIN14 14U | ||
| 204 | #define GPIOH_PIN15 15U | ||
| 205 | |||
| 206 | #define GPIOI_PIN0 0U | ||
| 207 | #define GPIOI_PIN1 1U | ||
| 208 | #define GPIOI_PIN2 2U | ||
| 209 | #define GPIOI_PIN3 3U | ||
| 210 | #define GPIOI_PIN4 4U | ||
| 211 | #define GPIOI_PIN5 5U | ||
| 212 | #define GPIOI_PIN6 6U | ||
| 213 | #define GPIOI_PIN7 7U | ||
| 214 | #define GPIOI_PIN8 8U | ||
| 215 | #define GPIOI_PIN9 9U | ||
| 216 | #define GPIOI_PIN10 10U | ||
| 217 | #define GPIOI_PIN11 11U | ||
| 218 | #define GPIOI_PIN12 12U | ||
| 219 | #define GPIOI_PIN13 13U | ||
| 220 | #define GPIOI_PIN14 14U | ||
| 221 | #define GPIOI_PIN15 15U | ||
| 222 | |||
| 223 | /* | ||
| 224 | * IO lines assignments. | ||
| 225 | */ | ||
| 226 | #define LINE_BUTTON PAL_LINE(GPIOA, 0U) | ||
| 227 | #define LINE_CS43L22_LRCK PAL_LINE(GPIOA, 4U) | ||
| 228 | #define LINE_L3GD20_SCL PAL_LINE(GPIOA, 5U) | ||
| 229 | #define LINE_L3GD20_SD0 PAL_LINE(GPIOA, 6U) | ||
| 230 | #define LINE_L3GD20_SDI PAL_LINE(GPIOA, 7U) | ||
| 231 | #define LINE_VBUS_FS PAL_LINE(GPIOA, 9U) | ||
| 232 | #define LINE_OTG_FS_ID PAL_LINE(GPIOA, 10U) | ||
| 233 | #define LINE_OTG_FS_DM PAL_LINE(GPIOA, 11U) | ||
| 234 | #define LINE_OTG_FS_DP PAL_LINE(GPIOA, 12U) | ||
| 235 | #define LINE_SWDIO PAL_LINE(GPIOA, 13U) | ||
| 236 | #define LINE_SWCLK PAL_LINE(GPIOA, 14U) | ||
| 237 | #define LINE_SWO PAL_LINE(GPIOB, 3U) | ||
| 238 | #define LINE_LSM303DLHC_SCL PAL_LINE(GPIOB, 6U) | ||
| 239 | #define LINE_LSM303DLHC_SDA PAL_LINE(GPIOB, 9U) | ||
| 240 | #define LINE_MP45DT02_CLK_IN PAL_LINE(GPIOB, 10U) | ||
| 241 | #define LINE_OTG_FS_POWER_ON PAL_LINE(GPIOC, 0U) | ||
| 242 | #define LINE_CS43L22_AIN4x PAL_LINE(GPIOC, 3U) | ||
| 243 | #define LINE_MP45DT02_PDM_OUT PAL_LINE(GPIOC, 3U) | ||
| 244 | #define LINE_CS43L22_MCLK PAL_LINE(GPIOC, 7U) | ||
| 245 | #define LINE_CS43L22_SCLK PAL_LINE(GPIOC, 10U) | ||
| 246 | #define LINE_CS43L22_SDIN PAL_LINE(GPIOC, 12U) | ||
| 247 | #define LINE_OSC32_IN PAL_LINE(GPIOC, 14U) | ||
| 248 | #define LINE_OSC32_OUT PAL_LINE(GPIOC, 15U) | ||
| 249 | #define LINE_CS43L22_RESET PAL_LINE(GPIOD, 4U) | ||
| 250 | #define LINE_OverCurrent PAL_LINE(GPIOD, 5U) | ||
| 251 | #define LINE_LED4 PAL_LINE(GPIOD, 12U) | ||
| 252 | #define LINE_LED3 PAL_LINE(GPIOD, 13U) | ||
| 253 | #define LINE_LED5 PAL_LINE(GPIOD, 14U) | ||
| 254 | #define LINE_LED6 PAL_LINE(GPIOD, 15U) | ||
| 255 | #define LINE_L3GD20_INT1 PAL_LINE(GPIOE, 0U) | ||
| 256 | #define LINE_L3GD20_INT2 PAL_LINE(GPIOE, 1U) | ||
| 257 | #define LINE_LSM303DLHC_DRDY PAL_LINE(GPIOE, 2U) | ||
| 258 | #define LINE_L3GD20_CS PAL_LINE(GPIOE, 3U) | ||
| 259 | #define LINE_LSM303DLHC_INT1 PAL_LINE(GPIOE, 4U) | ||
| 260 | #define LINE_LSM303DLHC_INT2 PAL_LINE(GPIOE, 5U) | ||
| 261 | #define LINE_OSC_IN PAL_LINE(GPIOH, 0U) | ||
| 262 | #define LINE_OSC_OUT PAL_LINE(GPIOH, 1U) | ||
| 263 | |||
| 264 | /*===========================================================================*/ | ||
| 265 | /* Driver pre-compile time settings. */ | ||
| 266 | /*===========================================================================*/ | ||
| 267 | |||
| 268 | /*===========================================================================*/ | ||
| 269 | /* Derived constants and error checks. */ | ||
| 270 | /*===========================================================================*/ | ||
| 271 | |||
| 272 | /*===========================================================================*/ | ||
| 273 | /* Driver data structures and types. */ | ||
| 274 | /*===========================================================================*/ | ||
| 275 | |||
| 276 | /*===========================================================================*/ | ||
| 277 | /* Driver macros. */ | ||
| 278 | /*===========================================================================*/ | ||
| 279 | |||
| 280 | /* | ||
| 281 | * I/O ports initial setup, this configuration is established soon after reset | ||
| 282 | * in the initialization code. | ||
| 283 | * Please refer to the STM32 Reference Manual for details. | ||
| 284 | */ | ||
| 285 | #define PIN_MODE_INPUT(n) (0U << ((n) * 2U)) | ||
| 286 | #define PIN_MODE_OUTPUT(n) (1U << ((n) * 2U)) | ||
| 287 | #define PIN_MODE_ALTERNATE(n) (2U << ((n) * 2U)) | ||
| 288 | #define PIN_MODE_ANALOG(n) (3U << ((n) * 2U)) | ||
| 289 | #define PIN_ODR_LOW(n) (0U << (n)) | ||
| 290 | #define PIN_ODR_HIGH(n) (1U << (n)) | ||
| 291 | #define PIN_OTYPE_PUSHPULL(n) (0U << (n)) | ||
| 292 | #define PIN_OTYPE_OPENDRAIN(n) (1U << (n)) | ||
| 293 | #define PIN_OSPEED_VERYLOW(n) (0U << ((n) * 2U)) | ||
| 294 | #define PIN_OSPEED_LOW(n) (1U << ((n) * 2U)) | ||
| 295 | #define PIN_OSPEED_MEDIUM(n) (2U << ((n) * 2U)) | ||
| 296 | #define PIN_OSPEED_HIGH(n) (3U << ((n) * 2U)) | ||
| 297 | #define PIN_PUPDR_FLOATING(n) (0U << ((n) * 2U)) | ||
| 298 | #define PIN_PUPDR_PULLUP(n) (1U << ((n) * 2U)) | ||
| 299 | #define PIN_PUPDR_PULLDOWN(n) (2U << ((n) * 2U)) | ||
| 300 | #define PIN_AFIO_AF(n, v) ((v) << (((n) % 8U) * 4U)) | ||
| 301 | |||
| 302 | /* | ||
| 303 | * GPIOA setup: | ||
| 304 | * | ||
| 305 | * PA0 - BUTTON (input floating). | ||
| 306 | * PA1 - PIN1 (input pullup). | ||
| 307 | * PA2 - PIN2 (input pullup). | ||
| 308 | * PA3 - PIN3 (input pullup). | ||
| 309 | * PA4 - CS43L22_LRCK (alternate 6). | ||
| 310 | * PA5 - L3GD20_SCL (alternate 5). | ||
| 311 | * PA6 - L3GD20_SD0 (alternate 5). | ||
| 312 | * PA7 - L3GD20_SDI (alternate 5). | ||
| 313 | * PA8 - PIN8 (input pullup). | ||
| 314 | * PA9 - VBUS_FS (input floating). | ||
| 315 | * PA10 - OTG_FS_ID (alternate 10). | ||
| 316 | * PA11 - OTG_FS_DM (alternate 10). | ||
| 317 | * PA12 - OTG_FS_DP (alternate 10). | ||
| 318 | * PA13 - SWDIO (alternate 0). | ||
| 319 | * PA14 - SWCLK (alternate 0). | ||
| 320 | * PA15 - PIN15 (input pullup). | ||
| 321 | */ | ||
| 322 | #define VAL_GPIOA_MODER (PIN_MODE_INPUT(GPIOA_BUTTON) | \ | ||
| 323 | PIN_MODE_INPUT(GPIOA_PIN1) | \ | ||
| 324 | PIN_MODE_INPUT(GPIOA_PIN2) | \ | ||
| 325 | PIN_MODE_INPUT(GPIOA_PIN3) | \ | ||
| 326 | PIN_MODE_ALTERNATE(GPIOA_CS43L22_LRCK) |\ | ||
| 327 | PIN_MODE_ALTERNATE(GPIOA_L3GD20_SCL) | \ | ||
| 328 | PIN_MODE_ALTERNATE(GPIOA_L3GD20_SD0) | \ | ||
| 329 | PIN_MODE_ALTERNATE(GPIOA_L3GD20_SDI) | \ | ||
| 330 | PIN_MODE_INPUT(GPIOA_PIN8) | \ | ||
| 331 | PIN_MODE_INPUT(GPIOA_VBUS_FS) | \ | ||
| 332 | PIN_MODE_ALTERNATE(GPIOA_OTG_FS_ID) | \ | ||
| 333 | PIN_MODE_ALTERNATE(GPIOA_OTG_FS_DM) | \ | ||
| 334 | PIN_MODE_ALTERNATE(GPIOA_OTG_FS_DP) | \ | ||
| 335 | PIN_MODE_ALTERNATE(GPIOA_SWDIO) | \ | ||
| 336 | PIN_MODE_ALTERNATE(GPIOA_SWCLK) | \ | ||
| 337 | PIN_MODE_INPUT(GPIOA_PIN15)) | ||
| 338 | #define VAL_GPIOA_OTYPER (PIN_OTYPE_PUSHPULL(GPIOA_BUTTON) | \ | ||
| 339 | PIN_OTYPE_PUSHPULL(GPIOA_PIN1) | \ | ||
| 340 | PIN_OTYPE_PUSHPULL(GPIOA_PIN2) | \ | ||
| 341 | PIN_OTYPE_PUSHPULL(GPIOA_PIN3) | \ | ||
| 342 | PIN_OTYPE_PUSHPULL(GPIOA_CS43L22_LRCK) |\ | ||
| 343 | PIN_OTYPE_PUSHPULL(GPIOA_L3GD20_SCL) | \ | ||
| 344 | PIN_OTYPE_PUSHPULL(GPIOA_L3GD20_SD0) | \ | ||
| 345 | PIN_OTYPE_PUSHPULL(GPIOA_L3GD20_SDI) | \ | ||
| 346 | PIN_OTYPE_PUSHPULL(GPIOA_PIN8) | \ | ||
| 347 | PIN_OTYPE_PUSHPULL(GPIOA_VBUS_FS) | \ | ||
| 348 | PIN_OTYPE_PUSHPULL(GPIOA_OTG_FS_ID) | \ | ||
| 349 | PIN_OTYPE_PUSHPULL(GPIOA_OTG_FS_DM) | \ | ||
| 350 | PIN_OTYPE_PUSHPULL(GPIOA_OTG_FS_DP) | \ | ||
| 351 | PIN_OTYPE_PUSHPULL(GPIOA_SWDIO) | \ | ||
| 352 | PIN_OTYPE_PUSHPULL(GPIOA_SWCLK) | \ | ||
| 353 | PIN_OTYPE_PUSHPULL(GPIOA_PIN15)) | ||
| 354 | #define VAL_GPIOA_OSPEEDR (PIN_OSPEED_HIGH(GPIOA_BUTTON) | \ | ||
| 355 | PIN_OSPEED_HIGH(GPIOA_PIN1) | \ | ||
| 356 | PIN_OSPEED_HIGH(GPIOA_PIN2) | \ | ||
| 357 | PIN_OSPEED_HIGH(GPIOA_PIN3) | \ | ||
| 358 | PIN_OSPEED_HIGH(GPIOA_CS43L22_LRCK) | \ | ||
| 359 | PIN_OSPEED_HIGH(GPIOA_L3GD20_SCL) | \ | ||
| 360 | PIN_OSPEED_HIGH(GPIOA_L3GD20_SD0) | \ | ||
| 361 | PIN_OSPEED_HIGH(GPIOA_L3GD20_SDI) | \ | ||
| 362 | PIN_OSPEED_HIGH(GPIOA_PIN8) | \ | ||
| 363 | PIN_OSPEED_HIGH(GPIOA_VBUS_FS) | \ | ||
| 364 | PIN_OSPEED_HIGH(GPIOA_OTG_FS_ID) | \ | ||
| 365 | PIN_OSPEED_HIGH(GPIOA_OTG_FS_DM) | \ | ||
| 366 | PIN_OSPEED_HIGH(GPIOA_OTG_FS_DP) | \ | ||
| 367 | PIN_OSPEED_HIGH(GPIOA_SWDIO) | \ | ||
| 368 | PIN_OSPEED_HIGH(GPIOA_SWCLK) | \ | ||
| 369 | PIN_OSPEED_HIGH(GPIOA_PIN15)) | ||
| 370 | #define VAL_GPIOA_PUPDR (PIN_PUPDR_FLOATING(GPIOA_BUTTON) | \ | ||
| 371 | PIN_PUPDR_PULLUP(GPIOA_PIN1) | \ | ||
| 372 | PIN_PUPDR_PULLUP(GPIOA_PIN2) | \ | ||
| 373 | PIN_PUPDR_PULLUP(GPIOA_PIN3) | \ | ||
| 374 | PIN_PUPDR_FLOATING(GPIOA_CS43L22_LRCK) |\ | ||
| 375 | PIN_PUPDR_FLOATING(GPIOA_L3GD20_SCL) | \ | ||
| 376 | PIN_PUPDR_PULLUP(GPIOA_L3GD20_SD0) | \ | ||
| 377 | PIN_PUPDR_PULLUP(GPIOA_L3GD20_SDI) | \ | ||
| 378 | PIN_PUPDR_PULLUP(GPIOA_PIN8) | \ | ||
| 379 | PIN_PUPDR_FLOATING(GPIOA_VBUS_FS) | \ | ||
| 380 | PIN_PUPDR_FLOATING(GPIOA_OTG_FS_ID) | \ | ||
| 381 | PIN_PUPDR_FLOATING(GPIOA_OTG_FS_DM) | \ | ||
| 382 | PIN_PUPDR_FLOATING(GPIOA_OTG_FS_DP) | \ | ||
| 383 | PIN_PUPDR_FLOATING(GPIOA_SWDIO) | \ | ||
| 384 | PIN_PUPDR_FLOATING(GPIOA_SWCLK) | \ | ||
| 385 | PIN_PUPDR_PULLUP(GPIOA_PIN15)) | ||
| 386 | #define VAL_GPIOA_ODR (PIN_ODR_HIGH(GPIOA_BUTTON) | \ | ||
| 387 | PIN_ODR_HIGH(GPIOA_PIN1) | \ | ||
| 388 | PIN_ODR_HIGH(GPIOA_PIN2) | \ | ||
| 389 | PIN_ODR_HIGH(GPIOA_PIN3) | \ | ||
| 390 | PIN_ODR_HIGH(GPIOA_CS43L22_LRCK) | \ | ||
| 391 | PIN_ODR_HIGH(GPIOA_L3GD20_SCL) | \ | ||
| 392 | PIN_ODR_HIGH(GPIOA_L3GD20_SD0) | \ | ||
| 393 | PIN_ODR_HIGH(GPIOA_L3GD20_SDI) | \ | ||
| 394 | PIN_ODR_HIGH(GPIOA_PIN8) | \ | ||
| 395 | PIN_ODR_HIGH(GPIOA_VBUS_FS) | \ | ||
| 396 | PIN_ODR_HIGH(GPIOA_OTG_FS_ID) | \ | ||
| 397 | PIN_ODR_HIGH(GPIOA_OTG_FS_DM) | \ | ||
| 398 | PIN_ODR_HIGH(GPIOA_OTG_FS_DP) | \ | ||
| 399 | PIN_ODR_HIGH(GPIOA_SWDIO) | \ | ||
| 400 | PIN_ODR_HIGH(GPIOA_SWCLK) | \ | ||
| 401 | PIN_ODR_HIGH(GPIOA_PIN15)) | ||
| 402 | #define VAL_GPIOA_AFRL (PIN_AFIO_AF(GPIOA_BUTTON, 0U) | \ | ||
| 403 | PIN_AFIO_AF(GPIOA_PIN1, 0U) | \ | ||
| 404 | PIN_AFIO_AF(GPIOA_PIN2, 0U) | \ | ||
| 405 | PIN_AFIO_AF(GPIOA_PIN3, 0U) | \ | ||
| 406 | PIN_AFIO_AF(GPIOA_CS43L22_LRCK, 6U) | \ | ||
| 407 | PIN_AFIO_AF(GPIOA_L3GD20_SCL, 5U) | \ | ||
| 408 | PIN_AFIO_AF(GPIOA_L3GD20_SD0, 5U) | \ | ||
| 409 | PIN_AFIO_AF(GPIOA_L3GD20_SDI, 5U)) | ||
| 410 | #define VAL_GPIOA_AFRH (PIN_AFIO_AF(GPIOA_PIN8, 0U) | \ | ||
| 411 | PIN_AFIO_AF(GPIOA_VBUS_FS, 0U) | \ | ||
| 412 | PIN_AFIO_AF(GPIOA_OTG_FS_ID, 10U) | \ | ||
| 413 | PIN_AFIO_AF(GPIOA_OTG_FS_DM, 10U) | \ | ||
| 414 | PIN_AFIO_AF(GPIOA_OTG_FS_DP, 10U) | \ | ||
| 415 | PIN_AFIO_AF(GPIOA_SWDIO, 0U) | \ | ||
| 416 | PIN_AFIO_AF(GPIOA_SWCLK, 0U) | \ | ||
| 417 | PIN_AFIO_AF(GPIOA_PIN15, 0U)) | ||
| 418 | |||
| 419 | /* | ||
| 420 | * GPIOB setup: | ||
| 421 | * | ||
| 422 | * PB0 - PIN0 (input pullup). | ||
| 423 | * PB1 - PIN1 (input pullup). | ||
| 424 | * PB2 - PIN2 (input pullup). | ||
| 425 | * PB3 - SWO (alternate 0). | ||
| 426 | * PB4 - PIN4 (input pullup). | ||
| 427 | * PB5 - PIN5 (input pullup). | ||
| 428 | * PB6 - LSM303DLHC_SCL (alternate 4). | ||
| 429 | * PB7 - PIN7 (input pullup). | ||
| 430 | * PB8 - PIN8 (input pullup). | ||
| 431 | * PB9 - LSM303DLHC_SDA (alternate 4). | ||
| 432 | * PB10 - MP45DT02_CLK_IN (alternate 5). | ||
| 433 | * PB11 - PIN11 (input pullup). | ||
| 434 | * PB12 - PIN12 (input pullup). | ||
| 435 | * PB13 - PIN13 (input pullup). | ||
| 436 | * PB14 - PIN14 (input pullup). | ||
| 437 | * PB15 - PIN15 (input pullup). | ||
| 438 | */ | ||
| 439 | #define VAL_GPIOB_MODER (PIN_MODE_INPUT(GPIOB_PIN0) | \ | ||
| 440 | PIN_MODE_INPUT(GPIOB_PIN1) | \ | ||
| 441 | PIN_MODE_INPUT(GPIOB_PIN2) | \ | ||
| 442 | PIN_MODE_ALTERNATE(GPIOB_SWO) | \ | ||
| 443 | PIN_MODE_INPUT(GPIOB_PIN4) | \ | ||
| 444 | PIN_MODE_INPUT(GPIOB_PIN5) | \ | ||
| 445 | PIN_MODE_ALTERNATE(GPIOB_LSM303DLHC_SCL) |\ | ||
| 446 | PIN_MODE_INPUT(GPIOB_PIN7) | \ | ||
| 447 | PIN_MODE_INPUT(GPIOB_PIN8) | \ | ||
| 448 | PIN_MODE_ALTERNATE(GPIOB_LSM303DLHC_SDA) |\ | ||
| 449 | PIN_MODE_ALTERNATE(GPIOB_MP45DT02_CLK_IN) |\ | ||
| 450 | PIN_MODE_INPUT(GPIOB_PIN11) | \ | ||
| 451 | PIN_MODE_INPUT(GPIOB_PIN12) | \ | ||
| 452 | PIN_MODE_INPUT(GPIOB_PIN13) | \ | ||
| 453 | PIN_MODE_INPUT(GPIOB_PIN14) | \ | ||
| 454 | PIN_MODE_INPUT(GPIOB_PIN15)) | ||
| 455 | #define VAL_GPIOB_OTYPER (PIN_OTYPE_PUSHPULL(GPIOB_PIN0) | \ | ||
| 456 | PIN_OTYPE_PUSHPULL(GPIOB_PIN1) | \ | ||
| 457 | PIN_OTYPE_PUSHPULL(GPIOB_PIN2) | \ | ||
| 458 | PIN_OTYPE_PUSHPULL(GPIOB_SWO) | \ | ||
| 459 | PIN_OTYPE_PUSHPULL(GPIOB_PIN4) | \ | ||
| 460 | PIN_OTYPE_PUSHPULL(GPIOB_PIN5) | \ | ||
| 461 | PIN_OTYPE_PUSHPULL(GPIOB_LSM303DLHC_SCL) |\ | ||
| 462 | PIN_OTYPE_PUSHPULL(GPIOB_PIN7) | \ | ||
| 463 | PIN_OTYPE_PUSHPULL(GPIOB_PIN8) | \ | ||
| 464 | PIN_OTYPE_PUSHPULL(GPIOB_LSM303DLHC_SDA) |\ | ||
| 465 | PIN_OTYPE_PUSHPULL(GPIOB_MP45DT02_CLK_IN) |\ | ||
| 466 | PIN_OTYPE_PUSHPULL(GPIOB_PIN11) | \ | ||
| 467 | PIN_OTYPE_PUSHPULL(GPIOB_PIN12) | \ | ||
| 468 | PIN_OTYPE_PUSHPULL(GPIOB_PIN13) | \ | ||
| 469 | PIN_OTYPE_PUSHPULL(GPIOB_PIN14) | \ | ||
| 470 | PIN_OTYPE_PUSHPULL(GPIOB_PIN15)) | ||
| 471 | #define VAL_GPIOB_OSPEEDR (PIN_OSPEED_HIGH(GPIOB_PIN0) | \ | ||
| 472 | PIN_OSPEED_HIGH(GPIOB_PIN1) | \ | ||
| 473 | PIN_OSPEED_HIGH(GPIOB_PIN2) | \ | ||
| 474 | PIN_OSPEED_HIGH(GPIOB_SWO) | \ | ||
| 475 | PIN_OSPEED_HIGH(GPIOB_PIN4) | \ | ||
| 476 | PIN_OSPEED_HIGH(GPIOB_PIN5) | \ | ||
| 477 | PIN_OSPEED_HIGH(GPIOB_LSM303DLHC_SCL) |\ | ||
| 478 | PIN_OSPEED_HIGH(GPIOB_PIN7) | \ | ||
| 479 | PIN_OSPEED_HIGH(GPIOB_PIN8) | \ | ||
| 480 | PIN_OSPEED_HIGH(GPIOB_LSM303DLHC_SDA) |\ | ||
| 481 | PIN_OSPEED_HIGH(GPIOB_MP45DT02_CLK_IN) |\ | ||
| 482 | PIN_OSPEED_HIGH(GPIOB_PIN11) | \ | ||
| 483 | PIN_OSPEED_HIGH(GPIOB_PIN12) | \ | ||
| 484 | PIN_OSPEED_HIGH(GPIOB_PIN13) | \ | ||
| 485 | PIN_OSPEED_HIGH(GPIOB_PIN14) | \ | ||
| 486 | PIN_OSPEED_HIGH(GPIOB_PIN15)) | ||
| 487 | #define VAL_GPIOB_PUPDR (PIN_PUPDR_PULLUP(GPIOB_PIN0) | \ | ||
| 488 | PIN_PUPDR_PULLUP(GPIOB_PIN1) | \ | ||
| 489 | PIN_PUPDR_PULLUP(GPIOB_PIN2) | \ | ||
| 490 | PIN_PUPDR_PULLUP(GPIOB_SWO) | \ | ||
| 491 | PIN_PUPDR_PULLUP(GPIOB_PIN4) | \ | ||
| 492 | PIN_PUPDR_PULLUP(GPIOB_PIN5) | \ | ||
| 493 | PIN_PUPDR_FLOATING(GPIOB_LSM303DLHC_SCL) |\ | ||
| 494 | PIN_PUPDR_PULLUP(GPIOB_PIN7) | \ | ||
| 495 | PIN_PUPDR_PULLUP(GPIOB_PIN8) | \ | ||
| 496 | PIN_PUPDR_FLOATING(GPIOB_LSM303DLHC_SDA) |\ | ||
| 497 | PIN_PUPDR_FLOATING(GPIOB_MP45DT02_CLK_IN) |\ | ||
| 498 | PIN_PUPDR_PULLUP(GPIOB_PIN11) | \ | ||
| 499 | PIN_PUPDR_PULLUP(GPIOB_PIN12) | \ | ||
| 500 | PIN_PUPDR_PULLUP(GPIOB_PIN13) | \ | ||
| 501 | PIN_PUPDR_PULLUP(GPIOB_PIN14) | \ | ||
| 502 | PIN_PUPDR_PULLUP(GPIOB_PIN15)) | ||
| 503 | #define VAL_GPIOB_ODR (PIN_ODR_HIGH(GPIOB_PIN0) | \ | ||
| 504 | PIN_ODR_HIGH(GPIOB_PIN1) | \ | ||
| 505 | PIN_ODR_HIGH(GPIOB_PIN2) | \ | ||
| 506 | PIN_ODR_HIGH(GPIOB_SWO) | \ | ||
| 507 | PIN_ODR_HIGH(GPIOB_PIN4) | \ | ||
| 508 | PIN_ODR_HIGH(GPIOB_PIN5) | \ | ||
| 509 | PIN_ODR_HIGH(GPIOB_LSM303DLHC_SCL) | \ | ||
| 510 | PIN_ODR_HIGH(GPIOB_PIN7) | \ | ||
| 511 | PIN_ODR_HIGH(GPIOB_PIN8) | \ | ||
| 512 | PIN_ODR_HIGH(GPIOB_LSM303DLHC_SDA) | \ | ||
| 513 | PIN_ODR_HIGH(GPIOB_MP45DT02_CLK_IN) | \ | ||
| 514 | PIN_ODR_HIGH(GPIOB_PIN11) | \ | ||
| 515 | PIN_ODR_HIGH(GPIOB_PIN12) | \ | ||
| 516 | PIN_ODR_HIGH(GPIOB_PIN13) | \ | ||
| 517 | PIN_ODR_HIGH(GPIOB_PIN14) | \ | ||
| 518 | PIN_ODR_HIGH(GPIOB_PIN15)) | ||
| 519 | #define VAL_GPIOB_AFRL (PIN_AFIO_AF(GPIOB_PIN0, 0U) | \ | ||
| 520 | PIN_AFIO_AF(GPIOB_PIN1, 0U) | \ | ||
| 521 | PIN_AFIO_AF(GPIOB_PIN2, 0U) | \ | ||
| 522 | PIN_AFIO_AF(GPIOB_SWO, 0U) | \ | ||
| 523 | PIN_AFIO_AF(GPIOB_PIN4, 0U) | \ | ||
| 524 | PIN_AFIO_AF(GPIOB_PIN5, 0U) | \ | ||
| 525 | PIN_AFIO_AF(GPIOB_LSM303DLHC_SCL, 4U) |\ | ||
| 526 | PIN_AFIO_AF(GPIOB_PIN7, 0U)) | ||
| 527 | #define VAL_GPIOB_AFRH (PIN_AFIO_AF(GPIOB_PIN8, 0U) | \ | ||
| 528 | PIN_AFIO_AF(GPIOB_LSM303DLHC_SDA, 4U) |\ | ||
| 529 | PIN_AFIO_AF(GPIOB_MP45DT02_CLK_IN, 5U) |\ | ||
| 530 | PIN_AFIO_AF(GPIOB_PIN11, 0U) | \ | ||
| 531 | PIN_AFIO_AF(GPIOB_PIN12, 0U) | \ | ||
| 532 | PIN_AFIO_AF(GPIOB_PIN13, 0U) | \ | ||
| 533 | PIN_AFIO_AF(GPIOB_PIN14, 0U) | \ | ||
| 534 | PIN_AFIO_AF(GPIOB_PIN15, 0U)) | ||
| 535 | |||
| 536 | /* | ||
| 537 | * GPIOC setup: | ||
| 538 | * | ||
| 539 | * PC0 - OTG_FS_POWER_ON (output pushpull maximum). | ||
| 540 | * PC1 - PIN1 (input pullup). | ||
| 541 | * PC2 - PIN2 (input pullup). | ||
| 542 | * PC3 - CS43L22_AIN4x MP45DT02_PDM_OUT(alternate 5). | ||
| 543 | * PC4 - PIN4 (input pullup). | ||
| 544 | * PC5 - PIN5 (input pullup). | ||
| 545 | * PC6 - PIN6 (input pullup). | ||
| 546 | * PC7 - CS43L22_MCLK (alternate 6). | ||
| 547 | * PC8 - PIN8 (input pullup). | ||
| 548 | * PC9 - PIN9 (input pullup). | ||
| 549 | * PC10 - CS43L22_SCLK (alternate 6). | ||
| 550 | * PC11 - PIN11 (input pullup). | ||
| 551 | * PC12 - CS43L22_SDIN (alternate 6). | ||
| 552 | * PC13 - PIN13 (input pullup). | ||
| 553 | * PC14 - OSC32_IN (input floating). | ||
| 554 | * PC15 - OSC32_OUT (input floating). | ||
| 555 | */ | ||
| 556 | #define VAL_GPIOC_MODER (PIN_MODE_OUTPUT(GPIOC_OTG_FS_POWER_ON) |\ | ||
| 557 | PIN_MODE_INPUT(GPIOC_PIN1) | \ | ||
| 558 | PIN_MODE_INPUT(GPIOC_PIN2) | \ | ||
| 559 | PIN_MODE_ALTERNATE(GPIOC_CS43L22_AIN4x) |\ | ||
| 560 | PIN_MODE_INPUT(GPIOC_PIN4) | \ | ||
| 561 | PIN_MODE_INPUT(GPIOC_PIN5) | \ | ||
| 562 | PIN_MODE_INPUT(GPIOC_PIN6) | \ | ||
| 563 | PIN_MODE_ALTERNATE(GPIOC_CS43L22_MCLK) |\ | ||
| 564 | PIN_MODE_INPUT(GPIOC_PIN8) | \ | ||
| 565 | PIN_MODE_INPUT(GPIOC_PIN9) | \ | ||
| 566 | PIN_MODE_ALTERNATE(GPIOC_CS43L22_SCLK) |\ | ||
| 567 | PIN_MODE_INPUT(GPIOC_PIN11) | \ | ||
| 568 | PIN_MODE_ALTERNATE(GPIOC_CS43L22_SDIN) |\ | ||
| 569 | PIN_MODE_INPUT(GPIOC_PIN13) | \ | ||
| 570 | PIN_MODE_INPUT(GPIOC_OSC32_IN) | \ | ||
| 571 | PIN_MODE_INPUT(GPIOC_OSC32_OUT)) | ||
| 572 | #define VAL_GPIOC_OTYPER (PIN_OTYPE_PUSHPULL(GPIOC_OTG_FS_POWER_ON) |\ | ||
| 573 | PIN_OTYPE_PUSHPULL(GPIOC_PIN1) | \ | ||
| 574 | PIN_OTYPE_PUSHPULL(GPIOC_PIN2) | \ | ||
| 575 | PIN_OTYPE_PUSHPULL(GPIOC_CS43L22_AIN4x) |\ | ||
| 576 | PIN_OTYPE_PUSHPULL(GPIOC_PIN4) | \ | ||
| 577 | PIN_OTYPE_PUSHPULL(GPIOC_PIN5) | \ | ||
| 578 | PIN_OTYPE_PUSHPULL(GPIOC_PIN6) | \ | ||
| 579 | PIN_OTYPE_PUSHPULL(GPIOC_CS43L22_MCLK) |\ | ||
| 580 | PIN_OTYPE_PUSHPULL(GPIOC_PIN8) | \ | ||
| 581 | PIN_OTYPE_PUSHPULL(GPIOC_PIN9) | \ | ||
| 582 | PIN_OTYPE_PUSHPULL(GPIOC_CS43L22_SCLK) |\ | ||
| 583 | PIN_OTYPE_PUSHPULL(GPIOC_PIN11) | \ | ||
| 584 | PIN_OTYPE_PUSHPULL(GPIOC_CS43L22_SDIN) |\ | ||
| 585 | PIN_OTYPE_PUSHPULL(GPIOC_PIN13) | \ | ||
| 586 | PIN_OTYPE_PUSHPULL(GPIOC_OSC32_IN) | \ | ||
| 587 | PIN_OTYPE_PUSHPULL(GPIOC_OSC32_OUT)) | ||
| 588 | #define VAL_GPIOC_OSPEEDR (PIN_OSPEED_HIGH(GPIOC_OTG_FS_POWER_ON) |\ | ||
| 589 | PIN_OSPEED_HIGH(GPIOC_PIN1) | \ | ||
| 590 | PIN_OSPEED_HIGH(GPIOC_PIN2) | \ | ||
| 591 | PIN_OSPEED_HIGH(GPIOC_CS43L22_AIN4x) | \ | ||
| 592 | PIN_OSPEED_HIGH(GPIOC_PIN4) | \ | ||
| 593 | PIN_OSPEED_HIGH(GPIOC_PIN5) | \ | ||
| 594 | PIN_OSPEED_HIGH(GPIOC_PIN6) | \ | ||
| 595 | PIN_OSPEED_HIGH(GPIOC_CS43L22_MCLK) | \ | ||
| 596 | PIN_OSPEED_HIGH(GPIOC_PIN8) | \ | ||
| 597 | PIN_OSPEED_HIGH(GPIOC_PIN9) | \ | ||
| 598 | PIN_OSPEED_HIGH(GPIOC_CS43L22_SCLK) | \ | ||
| 599 | PIN_OSPEED_HIGH(GPIOC_PIN11) | \ | ||
| 600 | PIN_OSPEED_HIGH(GPIOC_CS43L22_SDIN) | \ | ||
| 601 | PIN_OSPEED_HIGH(GPIOC_PIN13) | \ | ||
| 602 | PIN_OSPEED_HIGH(GPIOC_OSC32_IN) | \ | ||
| 603 | PIN_OSPEED_HIGH(GPIOC_OSC32_OUT)) | ||
| 604 | #define VAL_GPIOC_PUPDR (PIN_PUPDR_PULLUP(GPIOC_OTG_FS_POWER_ON) |\ | ||
| 605 | PIN_PUPDR_PULLUP(GPIOC_PIN1) | \ | ||
| 606 | PIN_PUPDR_PULLUP(GPIOC_PIN2) | \ | ||
| 607 | PIN_PUPDR_FLOATING(GPIOC_CS43L22_AIN4x) |\ | ||
| 608 | PIN_PUPDR_PULLUP(GPIOC_PIN4) | \ | ||
| 609 | PIN_PUPDR_PULLUP(GPIOC_PIN5) | \ | ||
| 610 | PIN_PUPDR_PULLUP(GPIOC_PIN6) | \ | ||
| 611 | PIN_PUPDR_PULLUP(GPIOC_CS43L22_MCLK) | \ | ||
| 612 | PIN_PUPDR_PULLUP(GPIOC_PIN8) | \ | ||
| 613 | PIN_PUPDR_PULLUP(GPIOC_PIN9) | \ | ||
| 614 | PIN_PUPDR_PULLUP(GPIOC_CS43L22_SCLK) | \ | ||
| 615 | PIN_PUPDR_PULLUP(GPIOC_PIN11) | \ | ||
| 616 | PIN_PUPDR_PULLUP(GPIOC_CS43L22_SDIN) | \ | ||
| 617 | PIN_PUPDR_PULLUP(GPIOC_PIN13) | \ | ||
| 618 | PIN_PUPDR_FLOATING(GPIOC_OSC32_IN) | \ | ||
| 619 | PIN_PUPDR_FLOATING(GPIOC_OSC32_OUT)) | ||
| 620 | #define VAL_GPIOC_ODR (PIN_ODR_HIGH(GPIOC_OTG_FS_POWER_ON) | \ | ||
| 621 | PIN_ODR_HIGH(GPIOC_PIN1) | \ | ||
| 622 | PIN_ODR_HIGH(GPIOC_PIN2) | \ | ||
| 623 | PIN_ODR_HIGH(GPIOC_CS43L22_AIN4x) | \ | ||
| 624 | PIN_ODR_HIGH(GPIOC_PIN4) | \ | ||
| 625 | PIN_ODR_HIGH(GPIOC_PIN5) | \ | ||
| 626 | PIN_ODR_HIGH(GPIOC_PIN6) | \ | ||
| 627 | PIN_ODR_HIGH(GPIOC_CS43L22_MCLK) | \ | ||
| 628 | PIN_ODR_HIGH(GPIOC_PIN8) | \ | ||
| 629 | PIN_ODR_HIGH(GPIOC_PIN9) | \ | ||
| 630 | PIN_ODR_HIGH(GPIOC_CS43L22_SCLK) | \ | ||
| 631 | PIN_ODR_HIGH(GPIOC_PIN11) | \ | ||
| 632 | PIN_ODR_HIGH(GPIOC_CS43L22_SDIN) | \ | ||
| 633 | PIN_ODR_HIGH(GPIOC_PIN13) | \ | ||
| 634 | PIN_ODR_HIGH(GPIOC_OSC32_IN) | \ | ||
| 635 | PIN_ODR_HIGH(GPIOC_OSC32_OUT)) | ||
| 636 | #define VAL_GPIOC_AFRL (PIN_AFIO_AF(GPIOC_OTG_FS_POWER_ON, 0U) |\ | ||
| 637 | PIN_AFIO_AF(GPIOC_PIN1, 0U) | \ | ||
| 638 | PIN_AFIO_AF(GPIOC_PIN2, 0U) | \ | ||
| 639 | PIN_AFIO_AF(GPIOC_CS43L22_AIN4x, 5U) | \ | ||
| 640 | PIN_AFIO_AF(GPIOC_PIN4, 0U) | \ | ||
| 641 | PIN_AFIO_AF(GPIOC_PIN5, 0U) | \ | ||
| 642 | PIN_AFIO_AF(GPIOC_PIN6, 0U) | \ | ||
| 643 | PIN_AFIO_AF(GPIOC_CS43L22_MCLK, 6U)) | ||
| 644 | #define VAL_GPIOC_AFRH (PIN_AFIO_AF(GPIOC_PIN8, 0U) | \ | ||
| 645 | PIN_AFIO_AF(GPIOC_PIN9, 0U) | \ | ||
| 646 | PIN_AFIO_AF(GPIOC_CS43L22_SCLK, 6U) | \ | ||
| 647 | PIN_AFIO_AF(GPIOC_PIN11, 0U) | \ | ||
| 648 | PIN_AFIO_AF(GPIOC_CS43L22_SDIN, 6U) | \ | ||
| 649 | PIN_AFIO_AF(GPIOC_PIN13, 0U) | \ | ||
| 650 | PIN_AFIO_AF(GPIOC_OSC32_IN, 0U) | \ | ||
| 651 | PIN_AFIO_AF(GPIOC_OSC32_OUT, 0U)) | ||
| 652 | |||
| 653 | /* | ||
| 654 | * GPIOD setup: | ||
| 655 | * | ||
| 656 | * PD0 - PIN0 (input pullup). | ||
| 657 | * PD1 - PIN1 (input pullup). | ||
| 658 | * PD2 - PIN2 (input pullup). | ||
| 659 | * PD3 - PIN3 (input pullup). | ||
| 660 | * PD4 - CS43L22_RESET (output pushpull maximum). | ||
| 661 | * PD5 - OverCurrent (input floating). | ||
| 662 | * PD6 - PIN6 (input pullup). | ||
| 663 | * PD7 - PIN7 (input pullup). | ||
| 664 | * PD8 - PIN8 (input pullup). | ||
| 665 | * PD9 - PIN9 (input pullup). | ||
| 666 | * PD10 - PIN10 (input pullup). | ||
| 667 | * PD11 - PIN11 (input pullup). | ||
| 668 | * PD12 - LED4 (output pushpull maximum). | ||
| 669 | * PD13 - LED3 (output pushpull maximum). | ||
| 670 | * PD14 - LED5 (output pushpull maximum). | ||
| 671 | * PD15 - LED6 (output pushpull maximum). | ||
| 672 | */ | ||
| 673 | #define VAL_GPIOD_MODER (PIN_MODE_INPUT(GPIOD_PIN0) | \ | ||
| 674 | PIN_MODE_INPUT(GPIOD_PIN1) | \ | ||
| 675 | PIN_MODE_INPUT(GPIOD_PIN2) | \ | ||
| 676 | PIN_MODE_INPUT(GPIOD_PIN3) | \ | ||
| 677 | PIN_MODE_OUTPUT(GPIOD_CS43L22_RESET) | \ | ||
| 678 | PIN_MODE_INPUT(GPIOD_OverCurrent) | \ | ||
| 679 | PIN_MODE_INPUT(GPIOD_PIN6) | \ | ||
| 680 | PIN_MODE_INPUT(GPIOD_PIN7) | \ | ||
| 681 | PIN_MODE_INPUT(GPIOD_PIN8) | \ | ||
| 682 | PIN_MODE_INPUT(GPIOD_PIN9) | \ | ||
| 683 | PIN_MODE_INPUT(GPIOD_PIN10) | \ | ||
| 684 | PIN_MODE_INPUT(GPIOD_PIN11) | \ | ||
| 685 | PIN_MODE_OUTPUT(GPIOD_LED4) | \ | ||
| 686 | PIN_MODE_OUTPUT(GPIOD_LED3) | \ | ||
| 687 | PIN_MODE_OUTPUT(GPIOD_LED5) | \ | ||
| 688 | PIN_MODE_OUTPUT(GPIOD_LED6)) | ||
| 689 | #define VAL_GPIOD_OTYPER (PIN_OTYPE_PUSHPULL(GPIOD_PIN0) | \ | ||
| 690 | PIN_OTYPE_PUSHPULL(GPIOD_PIN1) | \ | ||
| 691 | PIN_OTYPE_PUSHPULL(GPIOD_PIN2) | \ | ||
| 692 | PIN_OTYPE_PUSHPULL(GPIOD_PIN3) | \ | ||
| 693 | PIN_OTYPE_PUSHPULL(GPIOD_CS43L22_RESET) |\ | ||
| 694 | PIN_OTYPE_PUSHPULL(GPIOD_OverCurrent) |\ | ||
| 695 | PIN_OTYPE_PUSHPULL(GPIOD_PIN6) | \ | ||
| 696 | PIN_OTYPE_PUSHPULL(GPIOD_PIN7) | \ | ||
| 697 | PIN_OTYPE_PUSHPULL(GPIOD_PIN8) | \ | ||
| 698 | PIN_OTYPE_PUSHPULL(GPIOD_PIN9) | \ | ||
| 699 | PIN_OTYPE_PUSHPULL(GPIOD_PIN10) | \ | ||
| 700 | PIN_OTYPE_PUSHPULL(GPIOD_PIN11) | \ | ||
| 701 | PIN_OTYPE_PUSHPULL(GPIOD_LED4) | \ | ||
| 702 | PIN_OTYPE_PUSHPULL(GPIOD_LED3) | \ | ||
| 703 | PIN_OTYPE_PUSHPULL(GPIOD_LED5) | \ | ||
| 704 | PIN_OTYPE_PUSHPULL(GPIOD_LED6)) | ||
| 705 | #define VAL_GPIOD_OSPEEDR (PIN_OSPEED_HIGH(GPIOD_PIN0) | \ | ||
| 706 | PIN_OSPEED_HIGH(GPIOD_PIN1) | \ | ||
| 707 | PIN_OSPEED_HIGH(GPIOD_PIN2) | \ | ||
| 708 | PIN_OSPEED_HIGH(GPIOD_PIN3) | \ | ||
| 709 | PIN_OSPEED_HIGH(GPIOD_CS43L22_RESET) | \ | ||
| 710 | PIN_OSPEED_HIGH(GPIOD_OverCurrent) | \ | ||
| 711 | PIN_OSPEED_HIGH(GPIOD_PIN6) | \ | ||
| 712 | PIN_OSPEED_HIGH(GPIOD_PIN7) | \ | ||
| 713 | PIN_OSPEED_HIGH(GPIOD_PIN8) | \ | ||
| 714 | PIN_OSPEED_HIGH(GPIOD_PIN9) | \ | ||
| 715 | PIN_OSPEED_HIGH(GPIOD_PIN10) | \ | ||
| 716 | PIN_OSPEED_HIGH(GPIOD_PIN11) | \ | ||
| 717 | PIN_OSPEED_HIGH(GPIOD_LED4) | \ | ||
| 718 | PIN_OSPEED_HIGH(GPIOD_LED3) | \ | ||
| 719 | PIN_OSPEED_HIGH(GPIOD_LED5) | \ | ||
| 720 | PIN_OSPEED_HIGH(GPIOD_LED6)) | ||
| 721 | #define VAL_GPIOD_PUPDR (PIN_PUPDR_PULLUP(GPIOD_PIN0) | \ | ||
| 722 | PIN_PUPDR_PULLUP(GPIOD_PIN1) | \ | ||
| 723 | PIN_PUPDR_PULLUP(GPIOD_PIN2) | \ | ||
| 724 | PIN_PUPDR_PULLUP(GPIOD_PIN3) | \ | ||
| 725 | PIN_PUPDR_PULLUP(GPIOD_CS43L22_RESET) |\ | ||
| 726 | PIN_PUPDR_FLOATING(GPIOD_OverCurrent) |\ | ||
| 727 | PIN_PUPDR_PULLUP(GPIOD_PIN6) | \ | ||
| 728 | PIN_PUPDR_PULLUP(GPIOD_PIN7) | \ | ||
| 729 | PIN_PUPDR_PULLUP(GPIOD_PIN8) | \ | ||
| 730 | PIN_PUPDR_PULLUP(GPIOD_PIN9) | \ | ||
| 731 | PIN_PUPDR_PULLUP(GPIOD_PIN10) | \ | ||
| 732 | PIN_PUPDR_PULLUP(GPIOD_PIN11) | \ | ||
| 733 | PIN_PUPDR_FLOATING(GPIOD_LED4) | \ | ||
| 734 | PIN_PUPDR_FLOATING(GPIOD_LED3) | \ | ||
| 735 | PIN_PUPDR_FLOATING(GPIOD_LED5) | \ | ||
| 736 | PIN_PUPDR_FLOATING(GPIOD_LED6)) | ||
| 737 | #define VAL_GPIOD_ODR (PIN_ODR_HIGH(GPIOD_PIN0) | \ | ||
| 738 | PIN_ODR_HIGH(GPIOD_PIN1) | \ | ||
| 739 | PIN_ODR_HIGH(GPIOD_PIN2) | \ | ||
| 740 | PIN_ODR_HIGH(GPIOD_PIN3) | \ | ||
| 741 | PIN_ODR_HIGH(GPIOD_CS43L22_RESET) | \ | ||
| 742 | PIN_ODR_HIGH(GPIOD_OverCurrent) | \ | ||
| 743 | PIN_ODR_HIGH(GPIOD_PIN6) | \ | ||
| 744 | PIN_ODR_HIGH(GPIOD_PIN7) | \ | ||
| 745 | PIN_ODR_HIGH(GPIOD_PIN8) | \ | ||
| 746 | PIN_ODR_HIGH(GPIOD_PIN9) | \ | ||
| 747 | PIN_ODR_HIGH(GPIOD_PIN10) | \ | ||
| 748 | PIN_ODR_HIGH(GPIOD_PIN11) | \ | ||
| 749 | PIN_ODR_LOW(GPIOD_LED4) | \ | ||
| 750 | PIN_ODR_LOW(GPIOD_LED3) | \ | ||
| 751 | PIN_ODR_LOW(GPIOD_LED5) | \ | ||
| 752 | PIN_ODR_LOW(GPIOD_LED6)) | ||
| 753 | #define VAL_GPIOD_AFRL (PIN_AFIO_AF(GPIOD_PIN0, 0U) | \ | ||
| 754 | PIN_AFIO_AF(GPIOD_PIN1, 0U) | \ | ||
| 755 | PIN_AFIO_AF(GPIOD_PIN2, 0U) | \ | ||
| 756 | PIN_AFIO_AF(GPIOD_PIN3, 0U) | \ | ||
| 757 | PIN_AFIO_AF(GPIOD_CS43L22_RESET, 0U) | \ | ||
| 758 | PIN_AFIO_AF(GPIOD_OverCurrent, 0U) | \ | ||
| 759 | PIN_AFIO_AF(GPIOD_PIN6, 0U) | \ | ||
| 760 | PIN_AFIO_AF(GPIOD_PIN7, 0U)) | ||
| 761 | #define VAL_GPIOD_AFRH (PIN_AFIO_AF(GPIOD_PIN8, 0U) | \ | ||
| 762 | PIN_AFIO_AF(GPIOD_PIN9, 0U) | \ | ||
| 763 | PIN_AFIO_AF(GPIOD_PIN10, 0U) | \ | ||
| 764 | PIN_AFIO_AF(GPIOD_PIN11, 0U) | \ | ||
| 765 | PIN_AFIO_AF(GPIOD_LED4, 0U) | \ | ||
| 766 | PIN_AFIO_AF(GPIOD_LED3, 0U) | \ | ||
| 767 | PIN_AFIO_AF(GPIOD_LED5, 0U) | \ | ||
| 768 | PIN_AFIO_AF(GPIOD_LED6, 0U)) | ||
| 769 | |||
| 770 | /* | ||
| 771 | * GPIOE setup: | ||
| 772 | * | ||
| 773 | * PE0 - L3GD20_INT1 (input pullup). | ||
| 774 | * PE1 - L3GD20_INT2 (input pullup). | ||
| 775 | * PE2 - LSM303DLHC_DRDY (input floating). | ||
| 776 | * PE3 - L3GD20_CS (output pushpull maximum). | ||
| 777 | * PE4 - LSM303DLHC_INT1 (output pushpull maximum). | ||
| 778 | * PE5 - LSM303DLHC_INT2 (output pushpull maximum). | ||
| 779 | * PE6 - PIN6 (input pullup). | ||
| 780 | * PE7 - PIN7 (input pullup). | ||
| 781 | * PE8 - PIN8 (input pullup). | ||
| 782 | * PE9 - PIN9 (input pullup). | ||
| 783 | * PE10 - PIN10 (input pullup). | ||
| 784 | * PE11 - PIN11 (input pullup). | ||
| 785 | * PE12 - PIN12 (input pullup). | ||
| 786 | * PE13 - PIN13 (input pullup). | ||
| 787 | * PE14 - PIN14 (input pullup). | ||
| 788 | * PE15 - PIN15 (input pullup). | ||
| 789 | */ | ||
| 790 | #define VAL_GPIOE_MODER (PIN_MODE_INPUT(GPIOE_L3GD20_INT1) | \ | ||
| 791 | PIN_MODE_INPUT(GPIOE_L3GD20_INT2) | \ | ||
| 792 | PIN_MODE_INPUT(GPIOE_LSM303DLHC_DRDY) |\ | ||
| 793 | PIN_MODE_OUTPUT(GPIOE_L3GD20_CS) | \ | ||
| 794 | PIN_MODE_OUTPUT(GPIOE_LSM303DLHC_INT1) |\ | ||
| 795 | PIN_MODE_OUTPUT(GPIOE_LSM303DLHC_INT2) |\ | ||
| 796 | PIN_MODE_INPUT(GPIOE_PIN6) | \ | ||
| 797 | PIN_MODE_INPUT(GPIOE_PIN7) | \ | ||
| 798 | PIN_MODE_INPUT(GPIOE_PIN8) | \ | ||
| 799 | PIN_MODE_INPUT(GPIOE_PIN9) | \ | ||
| 800 | PIN_MODE_INPUT(GPIOE_PIN10) | \ | ||
| 801 | PIN_MODE_INPUT(GPIOE_PIN11) | \ | ||
| 802 | PIN_MODE_INPUT(GPIOE_PIN12) | \ | ||
| 803 | PIN_MODE_INPUT(GPIOE_PIN13) | \ | ||
| 804 | PIN_MODE_INPUT(GPIOE_PIN14) | \ | ||
| 805 | PIN_MODE_INPUT(GPIOE_PIN15)) | ||
| 806 | #define VAL_GPIOE_OTYPER (PIN_OTYPE_PUSHPULL(GPIOE_L3GD20_INT1) |\ | ||
| 807 | PIN_OTYPE_PUSHPULL(GPIOE_L3GD20_INT2) |\ | ||
| 808 | PIN_OTYPE_PUSHPULL(GPIOE_LSM303DLHC_DRDY) |\ | ||
| 809 | PIN_OTYPE_PUSHPULL(GPIOE_L3GD20_CS) | \ | ||
| 810 | PIN_OTYPE_PUSHPULL(GPIOE_LSM303DLHC_INT1) |\ | ||
| 811 | PIN_OTYPE_PUSHPULL(GPIOE_LSM303DLHC_INT2) |\ | ||
| 812 | PIN_OTYPE_PUSHPULL(GPIOE_PIN6) | \ | ||
| 813 | PIN_OTYPE_PUSHPULL(GPIOE_PIN7) | \ | ||
| 814 | PIN_OTYPE_PUSHPULL(GPIOE_PIN8) | \ | ||
| 815 | PIN_OTYPE_PUSHPULL(GPIOE_PIN9) | \ | ||
| 816 | PIN_OTYPE_PUSHPULL(GPIOE_PIN10) | \ | ||
| 817 | PIN_OTYPE_PUSHPULL(GPIOE_PIN11) | \ | ||
| 818 | PIN_OTYPE_PUSHPULL(GPIOE_PIN12) | \ | ||
| 819 | PIN_OTYPE_PUSHPULL(GPIOE_PIN13) | \ | ||
| 820 | PIN_OTYPE_PUSHPULL(GPIOE_PIN14) | \ | ||
| 821 | PIN_OTYPE_PUSHPULL(GPIOE_PIN15)) | ||
| 822 | #define VAL_GPIOE_OSPEEDR (PIN_OSPEED_HIGH(GPIOE_L3GD20_INT1) | \ | ||
| 823 | PIN_OSPEED_HIGH(GPIOE_L3GD20_INT2) | \ | ||
| 824 | PIN_OSPEED_HIGH(GPIOE_LSM303DLHC_DRDY) |\ | ||
| 825 | PIN_OSPEED_HIGH(GPIOE_L3GD20_CS) | \ | ||
| 826 | PIN_OSPEED_HIGH(GPIOE_LSM303DLHC_INT1) |\ | ||
| 827 | PIN_OSPEED_HIGH(GPIOE_LSM303DLHC_INT2) |\ | ||
| 828 | PIN_OSPEED_HIGH(GPIOE_PIN6) | \ | ||
| 829 | PIN_OSPEED_HIGH(GPIOE_PIN7) | \ | ||
| 830 | PIN_OSPEED_HIGH(GPIOE_PIN8) | \ | ||
| 831 | PIN_OSPEED_HIGH(GPIOE_PIN9) | \ | ||
| 832 | PIN_OSPEED_HIGH(GPIOE_PIN10) | \ | ||
| 833 | PIN_OSPEED_HIGH(GPIOE_PIN11) | \ | ||
| 834 | PIN_OSPEED_HIGH(GPIOE_PIN12) | \ | ||
| 835 | PIN_OSPEED_HIGH(GPIOE_PIN13) | \ | ||
| 836 | PIN_OSPEED_HIGH(GPIOE_PIN14) | \ | ||
| 837 | PIN_OSPEED_HIGH(GPIOE_PIN15)) | ||
| 838 | #define VAL_GPIOE_PUPDR (PIN_PUPDR_PULLUP(GPIOE_L3GD20_INT1) | \ | ||
| 839 | PIN_PUPDR_PULLUP(GPIOE_L3GD20_INT2) | \ | ||
| 840 | PIN_PUPDR_FLOATING(GPIOE_LSM303DLHC_DRDY) |\ | ||
| 841 | PIN_PUPDR_PULLUP(GPIOE_L3GD20_CS) | \ | ||
| 842 | PIN_PUPDR_PULLUP(GPIOE_LSM303DLHC_INT1) |\ | ||
| 843 | PIN_PUPDR_PULLUP(GPIOE_LSM303DLHC_INT2) |\ | ||
| 844 | PIN_PUPDR_PULLUP(GPIOE_PIN6) | \ | ||
| 845 | PIN_PUPDR_PULLUP(GPIOE_PIN7) | \ | ||
| 846 | PIN_PUPDR_PULLUP(GPIOE_PIN8) | \ | ||
| 847 | PIN_PUPDR_PULLUP(GPIOE_PIN9) | \ | ||
| 848 | PIN_PUPDR_PULLUP(GPIOE_PIN10) | \ | ||
| 849 | PIN_PUPDR_PULLUP(GPIOE_PIN11) | \ | ||
| 850 | PIN_PUPDR_PULLUP(GPIOE_PIN12) | \ | ||
| 851 | PIN_PUPDR_PULLUP(GPIOE_PIN13) | \ | ||
| 852 | PIN_PUPDR_PULLUP(GPIOE_PIN14) | \ | ||
| 853 | PIN_PUPDR_PULLUP(GPIOE_PIN15)) | ||
| 854 | #define VAL_GPIOE_ODR (PIN_ODR_HIGH(GPIOE_L3GD20_INT1) | \ | ||
| 855 | PIN_ODR_HIGH(GPIOE_L3GD20_INT2) | \ | ||
| 856 | PIN_ODR_HIGH(GPIOE_LSM303DLHC_DRDY) | \ | ||
| 857 | PIN_ODR_HIGH(GPIOE_L3GD20_CS) | \ | ||
| 858 | PIN_ODR_HIGH(GPIOE_LSM303DLHC_INT1) | \ | ||
| 859 | PIN_ODR_HIGH(GPIOE_LSM303DLHC_INT2) | \ | ||
| 860 | PIN_ODR_HIGH(GPIOE_PIN6) | \ | ||
| 861 | PIN_ODR_HIGH(GPIOE_PIN7) | \ | ||
| 862 | PIN_ODR_HIGH(GPIOE_PIN8) | \ | ||
| 863 | PIN_ODR_HIGH(GPIOE_PIN9) | \ | ||
| 864 | PIN_ODR_HIGH(GPIOE_PIN10) | \ | ||
| 865 | PIN_ODR_HIGH(GPIOE_PIN11) | \ | ||
| 866 | PIN_ODR_HIGH(GPIOE_PIN12) | \ | ||
| 867 | PIN_ODR_HIGH(GPIOE_PIN13) | \ | ||
| 868 | PIN_ODR_HIGH(GPIOE_PIN14) | \ | ||
| 869 | PIN_ODR_HIGH(GPIOE_PIN15)) | ||
| 870 | #define VAL_GPIOE_AFRL (PIN_AFIO_AF(GPIOE_L3GD20_INT1, 0U) | \ | ||
| 871 | PIN_AFIO_AF(GPIOE_L3GD20_INT2, 0U) | \ | ||
| 872 | PIN_AFIO_AF(GPIOE_LSM303DLHC_DRDY, 0U) |\ | ||
| 873 | PIN_AFIO_AF(GPIOE_L3GD20_CS, 0U) | \ | ||
| 874 | PIN_AFIO_AF(GPIOE_LSM303DLHC_INT1, 0U) |\ | ||
| 875 | PIN_AFIO_AF(GPIOE_LSM303DLHC_INT2, 0U) |\ | ||
| 876 | PIN_AFIO_AF(GPIOE_PIN6, 0U) | \ | ||
| 877 | PIN_AFIO_AF(GPIOE_PIN7, 0U)) | ||
| 878 | #define VAL_GPIOE_AFRH (PIN_AFIO_AF(GPIOE_PIN8, 0U) | \ | ||
| 879 | PIN_AFIO_AF(GPIOE_PIN9, 0U) | \ | ||
| 880 | PIN_AFIO_AF(GPIOE_PIN10, 0U) | \ | ||
| 881 | PIN_AFIO_AF(GPIOE_PIN11, 0U) | \ | ||
| 882 | PIN_AFIO_AF(GPIOE_PIN12, 0U) | \ | ||
| 883 | PIN_AFIO_AF(GPIOE_PIN13, 0U) | \ | ||
| 884 | PIN_AFIO_AF(GPIOE_PIN14, 0U) | \ | ||
| 885 | PIN_AFIO_AF(GPIOE_PIN15, 0U)) | ||
| 886 | |||
| 887 | /* | ||
| 888 | * GPIOF setup: | ||
| 889 | * | ||
| 890 | * PF0 - PIN0 (input pullup). | ||
| 891 | * PF1 - PIN1 (input pullup). | ||
| 892 | * PF2 - PIN2 (input pullup). | ||
| 893 | * PF3 - PIN3 (input pullup). | ||
| 894 | * PF4 - PIN4 (input pullup). | ||
| 895 | * PF5 - PIN5 (input pullup). | ||
| 896 | * PF6 - PIN6 (input pullup). | ||
| 897 | * PF7 - PIN7 (input pullup). | ||
| 898 | * PF8 - PIN8 (input pullup). | ||
| 899 | * PF9 - PIN9 (input pullup). | ||
| 900 | * PF10 - PIN10 (input pullup). | ||
| 901 | * PF11 - PIN11 (input pullup). | ||
| 902 | * PF12 - PIN12 (input pullup). | ||
| 903 | * PF13 - PIN13 (input pullup). | ||
| 904 | * PF14 - PIN14 (input pullup). | ||
| 905 | * PF15 - PIN15 (input pullup). | ||
| 906 | */ | ||
| 907 | #define VAL_GPIOF_MODER (PIN_MODE_INPUT(GPIOF_PIN0) | \ | ||
| 908 | PIN_MODE_INPUT(GPIOF_PIN1) | \ | ||
| 909 | PIN_MODE_INPUT(GPIOF_PIN2) | \ | ||
| 910 | PIN_MODE_INPUT(GPIOF_PIN3) | \ | ||
| 911 | PIN_MODE_INPUT(GPIOF_PIN4) | \ | ||
| 912 | PIN_MODE_INPUT(GPIOF_PIN5) | \ | ||
| 913 | PIN_MODE_INPUT(GPIOF_PIN6) | \ | ||
| 914 | PIN_MODE_INPUT(GPIOF_PIN7) | \ | ||
| 915 | PIN_MODE_INPUT(GPIOF_PIN8) | \ | ||
| 916 | PIN_MODE_INPUT(GPIOF_PIN9) | \ | ||
| 917 | PIN_MODE_INPUT(GPIOF_PIN10) | \ | ||
| 918 | PIN_MODE_INPUT(GPIOF_PIN11) | \ | ||
| 919 | PIN_MODE_INPUT(GPIOF_PIN12) | \ | ||
| 920 | PIN_MODE_INPUT(GPIOF_PIN13) | \ | ||
| 921 | PIN_MODE_INPUT(GPIOF_PIN14) | \ | ||
| 922 | PIN_MODE_INPUT(GPIOF_PIN15)) | ||
| 923 | #define VAL_GPIOF_OTYPER (PIN_OTYPE_PUSHPULL(GPIOF_PIN0) | \ | ||
| 924 | PIN_OTYPE_PUSHPULL(GPIOF_PIN1) | \ | ||
| 925 | PIN_OTYPE_PUSHPULL(GPIOF_PIN2) | \ | ||
| 926 | PIN_OTYPE_PUSHPULL(GPIOF_PIN3) | \ | ||
| 927 | PIN_OTYPE_PUSHPULL(GPIOF_PIN4) | \ | ||
| 928 | PIN_OTYPE_PUSHPULL(GPIOF_PIN5) | \ | ||
| 929 | PIN_OTYPE_PUSHPULL(GPIOF_PIN6) | \ | ||
| 930 | PIN_OTYPE_PUSHPULL(GPIOF_PIN7) | \ | ||
| 931 | PIN_OTYPE_PUSHPULL(GPIOF_PIN8) | \ | ||
| 932 | PIN_OTYPE_PUSHPULL(GPIOF_PIN9) | \ | ||
| 933 | PIN_OTYPE_PUSHPULL(GPIOF_PIN10) | \ | ||
| 934 | PIN_OTYPE_PUSHPULL(GPIOF_PIN11) | \ | ||
| 935 | PIN_OTYPE_PUSHPULL(GPIOF_PIN12) | \ | ||
| 936 | PIN_OTYPE_PUSHPULL(GPIOF_PIN13) | \ | ||
| 937 | PIN_OTYPE_PUSHPULL(GPIOF_PIN14) | \ | ||
| 938 | PIN_OTYPE_PUSHPULL(GPIOF_PIN15)) | ||
| 939 | #define VAL_GPIOF_OSPEEDR (PIN_OSPEED_HIGH(GPIOF_PIN0) | \ | ||
| 940 | PIN_OSPEED_HIGH(GPIOF_PIN1) | \ | ||
| 941 | PIN_OSPEED_HIGH(GPIOF_PIN2) | \ | ||
| 942 | PIN_OSPEED_HIGH(GPIOF_PIN3) | \ | ||
| 943 | PIN_OSPEED_HIGH(GPIOF_PIN4) | \ | ||
| 944 | PIN_OSPEED_HIGH(GPIOF_PIN5) | \ | ||
| 945 | PIN_OSPEED_HIGH(GPIOF_PIN6) | \ | ||
| 946 | PIN_OSPEED_HIGH(GPIOF_PIN7) | \ | ||
| 947 | PIN_OSPEED_HIGH(GPIOF_PIN8) | \ | ||
| 948 | PIN_OSPEED_HIGH(GPIOF_PIN9) | \ | ||
| 949 | PIN_OSPEED_HIGH(GPIOF_PIN10) | \ | ||
| 950 | PIN_OSPEED_HIGH(GPIOF_PIN11) | \ | ||
| 951 | PIN_OSPEED_HIGH(GPIOF_PIN12) | \ | ||
| 952 | PIN_OSPEED_HIGH(GPIOF_PIN13) | \ | ||
| 953 | PIN_OSPEED_HIGH(GPIOF_PIN14) | \ | ||
| 954 | PIN_OSPEED_HIGH(GPIOF_PIN15)) | ||
| 955 | #define VAL_GPIOF_PUPDR (PIN_PUPDR_PULLUP(GPIOF_PIN0) | \ | ||
| 956 | PIN_PUPDR_PULLUP(GPIOF_PIN1) | \ | ||
| 957 | PIN_PUPDR_PULLUP(GPIOF_PIN2) | \ | ||
| 958 | PIN_PUPDR_PULLUP(GPIOF_PIN3) | \ | ||
| 959 | PIN_PUPDR_PULLUP(GPIOF_PIN4) | \ | ||
| 960 | PIN_PUPDR_PULLUP(GPIOF_PIN5) | \ | ||
| 961 | PIN_PUPDR_PULLUP(GPIOF_PIN6) | \ | ||
| 962 | PIN_PUPDR_PULLUP(GPIOF_PIN7) | \ | ||
| 963 | PIN_PUPDR_PULLUP(GPIOF_PIN8) | \ | ||
| 964 | PIN_PUPDR_PULLUP(GPIOF_PIN9) | \ | ||
| 965 | PIN_PUPDR_PULLUP(GPIOF_PIN10) | \ | ||
| 966 | PIN_PUPDR_PULLUP(GPIOF_PIN11) | \ | ||
| 967 | PIN_PUPDR_PULLUP(GPIOF_PIN12) | \ | ||
| 968 | PIN_PUPDR_PULLUP(GPIOF_PIN13) | \ | ||
| 969 | PIN_PUPDR_PULLUP(GPIOF_PIN14) | \ | ||
| 970 | PIN_PUPDR_PULLUP(GPIOF_PIN15)) | ||
| 971 | #define VAL_GPIOF_ODR (PIN_ODR_HIGH(GPIOF_PIN0) | \ | ||
| 972 | PIN_ODR_HIGH(GPIOF_PIN1) | \ | ||
| 973 | PIN_ODR_HIGH(GPIOF_PIN2) | \ | ||
| 974 | PIN_ODR_HIGH(GPIOF_PIN3) | \ | ||
| 975 | PIN_ODR_HIGH(GPIOF_PIN4) | \ | ||
| 976 | PIN_ODR_HIGH(GPIOF_PIN5) | \ | ||
| 977 | PIN_ODR_HIGH(GPIOF_PIN6) | \ | ||
| 978 | PIN_ODR_HIGH(GPIOF_PIN7) | \ | ||
| 979 | PIN_ODR_HIGH(GPIOF_PIN8) | \ | ||
| 980 | PIN_ODR_HIGH(GPIOF_PIN9) | \ | ||
| 981 | PIN_ODR_HIGH(GPIOF_PIN10) | \ | ||
| 982 | PIN_ODR_HIGH(GPIOF_PIN11) | \ | ||
| 983 | PIN_ODR_HIGH(GPIOF_PIN12) | \ | ||
| 984 | PIN_ODR_HIGH(GPIOF_PIN13) | \ | ||
| 985 | PIN_ODR_HIGH(GPIOF_PIN14) | \ | ||
| 986 | PIN_ODR_HIGH(GPIOF_PIN15)) | ||
| 987 | #define VAL_GPIOF_AFRL (PIN_AFIO_AF(GPIOF_PIN0, 0U) | \ | ||
| 988 | PIN_AFIO_AF(GPIOF_PIN1, 0U) | \ | ||
| 989 | PIN_AFIO_AF(GPIOF_PIN2, 0U) | \ | ||
| 990 | PIN_AFIO_AF(GPIOF_PIN3, 0U) | \ | ||
| 991 | PIN_AFIO_AF(GPIOF_PIN4, 0U) | \ | ||
| 992 | PIN_AFIO_AF(GPIOF_PIN5, 0U) | \ | ||
| 993 | PIN_AFIO_AF(GPIOF_PIN6, 0U) | \ | ||
| 994 | PIN_AFIO_AF(GPIOF_PIN7, 0U)) | ||
| 995 | #define VAL_GPIOF_AFRH (PIN_AFIO_AF(GPIOF_PIN8, 0U) | \ | ||
| 996 | PIN_AFIO_AF(GPIOF_PIN9, 0U) | \ | ||
| 997 | PIN_AFIO_AF(GPIOF_PIN10, 0U) | \ | ||
| 998 | PIN_AFIO_AF(GPIOF_PIN11, 0U) | \ | ||
| 999 | PIN_AFIO_AF(GPIOF_PIN12, 0U) | \ | ||
| 1000 | PIN_AFIO_AF(GPIOF_PIN13, 0U) | \ | ||
| 1001 | PIN_AFIO_AF(GPIOF_PIN14, 0U) | \ | ||
| 1002 | PIN_AFIO_AF(GPIOF_PIN15, 0U)) | ||
| 1003 | |||
| 1004 | /* | ||
| 1005 | * GPIOG setup: | ||
| 1006 | * | ||
| 1007 | * PG0 - PIN0 (input pullup). | ||
| 1008 | * PG1 - PIN1 (input pullup). | ||
| 1009 | * PG2 - PIN2 (input pullup). | ||
| 1010 | * PG3 - PIN3 (input pullup). | ||
| 1011 | * PG4 - PIN4 (input pullup). | ||
| 1012 | * PG5 - PIN5 (input pullup). | ||
| 1013 | * PG6 - PIN6 (input pullup). | ||
| 1014 | * PG7 - PIN7 (input pullup). | ||
| 1015 | * PG8 - PIN8 (input pullup). | ||
| 1016 | * PG9 - PIN9 (input pullup). | ||
| 1017 | * PG10 - PIN10 (input pullup). | ||
| 1018 | * PG11 - PIN11 (input pullup). | ||
| 1019 | * PG12 - PIN12 (input pullup). | ||
| 1020 | * PG13 - PIN13 (input pullup). | ||
| 1021 | * PG14 - PIN14 (input pullup). | ||
| 1022 | * PG15 - PIN15 (input pullup). | ||
| 1023 | */ | ||
| 1024 | #define VAL_GPIOG_MODER (PIN_MODE_INPUT(GPIOG_PIN0) | \ | ||
| 1025 | PIN_MODE_INPUT(GPIOG_PIN1) | \ | ||
| 1026 | PIN_MODE_INPUT(GPIOG_PIN2) | \ | ||
| 1027 | PIN_MODE_INPUT(GPIOG_PIN3) | \ | ||
| 1028 | PIN_MODE_INPUT(GPIOG_PIN4) | \ | ||
| 1029 | PIN_MODE_INPUT(GPIOG_PIN5) | \ | ||
| 1030 | PIN_MODE_INPUT(GPIOG_PIN6) | \ | ||
| 1031 | PIN_MODE_INPUT(GPIOG_PIN7) | \ | ||
| 1032 | PIN_MODE_INPUT(GPIOG_PIN8) | \ | ||
| 1033 | PIN_MODE_INPUT(GPIOG_PIN9) | \ | ||
| 1034 | PIN_MODE_INPUT(GPIOG_PIN10) | \ | ||
| 1035 | PIN_MODE_INPUT(GPIOG_PIN11) | \ | ||
| 1036 | PIN_MODE_INPUT(GPIOG_PIN12) | \ | ||
| 1037 | PIN_MODE_INPUT(GPIOG_PIN13) | \ | ||
| 1038 | PIN_MODE_INPUT(GPIOG_PIN14) | \ | ||
| 1039 | PIN_MODE_INPUT(GPIOG_PIN15)) | ||
| 1040 | #define VAL_GPIOG_OTYPER (PIN_OTYPE_PUSHPULL(GPIOG_PIN0) | \ | ||
| 1041 | PIN_OTYPE_PUSHPULL(GPIOG_PIN1) | \ | ||
| 1042 | PIN_OTYPE_PUSHPULL(GPIOG_PIN2) | \ | ||
| 1043 | PIN_OTYPE_PUSHPULL(GPIOG_PIN3) | \ | ||
| 1044 | PIN_OTYPE_PUSHPULL(GPIOG_PIN4) | \ | ||
| 1045 | PIN_OTYPE_PUSHPULL(GPIOG_PIN5) | \ | ||
| 1046 | PIN_OTYPE_PUSHPULL(GPIOG_PIN6) | \ | ||
| 1047 | PIN_OTYPE_PUSHPULL(GPIOG_PIN7) | \ | ||
| 1048 | PIN_OTYPE_PUSHPULL(GPIOG_PIN8) | \ | ||
| 1049 | PIN_OTYPE_PUSHPULL(GPIOG_PIN9) | \ | ||
| 1050 | PIN_OTYPE_PUSHPULL(GPIOG_PIN10) | \ | ||
| 1051 | PIN_OTYPE_PUSHPULL(GPIOG_PIN11) | \ | ||
| 1052 | PIN_OTYPE_PUSHPULL(GPIOG_PIN12) | \ | ||
| 1053 | PIN_OTYPE_PUSHPULL(GPIOG_PIN13) | \ | ||
| 1054 | PIN_OTYPE_PUSHPULL(GPIOG_PIN14) | \ | ||
| 1055 | PIN_OTYPE_PUSHPULL(GPIOG_PIN15)) | ||
| 1056 | #define VAL_GPIOG_OSPEEDR (PIN_OSPEED_HIGH(GPIOG_PIN0) | \ | ||
| 1057 | PIN_OSPEED_HIGH(GPIOG_PIN1) | \ | ||
| 1058 | PIN_OSPEED_HIGH(GPIOG_PIN2) | \ | ||
| 1059 | PIN_OSPEED_HIGH(GPIOG_PIN3) | \ | ||
| 1060 | PIN_OSPEED_HIGH(GPIOG_PIN4) | \ | ||
| 1061 | PIN_OSPEED_HIGH(GPIOG_PIN5) | \ | ||
| 1062 | PIN_OSPEED_HIGH(GPIOG_PIN6) | \ | ||
| 1063 | PIN_OSPEED_HIGH(GPIOG_PIN7) | \ | ||
| 1064 | PIN_OSPEED_HIGH(GPIOG_PIN8) | \ | ||
| 1065 | PIN_OSPEED_HIGH(GPIOG_PIN9) | \ | ||
| 1066 | PIN_OSPEED_HIGH(GPIOG_PIN10) | \ | ||
| 1067 | PIN_OSPEED_HIGH(GPIOG_PIN11) | \ | ||
| 1068 | PIN_OSPEED_HIGH(GPIOG_PIN12) | \ | ||
| 1069 | PIN_OSPEED_HIGH(GPIOG_PIN13) | \ | ||
| 1070 | PIN_OSPEED_HIGH(GPIOG_PIN14) | \ | ||
| 1071 | PIN_OSPEED_HIGH(GPIOG_PIN15)) | ||
| 1072 | #define VAL_GPIOG_PUPDR (PIN_PUPDR_PULLUP(GPIOG_PIN0) | \ | ||
| 1073 | PIN_PUPDR_PULLUP(GPIOG_PIN1) | \ | ||
| 1074 | PIN_PUPDR_PULLUP(GPIOG_PIN2) | \ | ||
| 1075 | PIN_PUPDR_PULLUP(GPIOG_PIN3) | \ | ||
| 1076 | PIN_PUPDR_PULLUP(GPIOG_PIN4) | \ | ||
| 1077 | PIN_PUPDR_PULLUP(GPIOG_PIN5) | \ | ||
| 1078 | PIN_PUPDR_PULLUP(GPIOG_PIN6) | \ | ||
| 1079 | PIN_PUPDR_PULLUP(GPIOG_PIN7) | \ | ||
| 1080 | PIN_PUPDR_PULLUP(GPIOG_PIN8) | \ | ||
| 1081 | PIN_PUPDR_PULLUP(GPIOG_PIN9) | \ | ||
| 1082 | PIN_PUPDR_PULLUP(GPIOG_PIN10) | \ | ||
| 1083 | PIN_PUPDR_PULLUP(GPIOG_PIN11) | \ | ||
| 1084 | PIN_PUPDR_PULLUP(GPIOG_PIN12) | \ | ||
| 1085 | PIN_PUPDR_PULLUP(GPIOG_PIN13) | \ | ||
| 1086 | PIN_PUPDR_PULLUP(GPIOG_PIN14) | \ | ||
| 1087 | PIN_PUPDR_PULLUP(GPIOG_PIN15)) | ||
| 1088 | #define VAL_GPIOG_ODR (PIN_ODR_HIGH(GPIOG_PIN0) | \ | ||
| 1089 | PIN_ODR_HIGH(GPIOG_PIN1) | \ | ||
| 1090 | PIN_ODR_HIGH(GPIOG_PIN2) | \ | ||
| 1091 | PIN_ODR_HIGH(GPIOG_PIN3) | \ | ||
| 1092 | PIN_ODR_HIGH(GPIOG_PIN4) | \ | ||
| 1093 | PIN_ODR_HIGH(GPIOG_PIN5) | \ | ||
| 1094 | PIN_ODR_HIGH(GPIOG_PIN6) | \ | ||
| 1095 | PIN_ODR_HIGH(GPIOG_PIN7) | \ | ||
| 1096 | PIN_ODR_HIGH(GPIOG_PIN8) | \ | ||
| 1097 | PIN_ODR_HIGH(GPIOG_PIN9) | \ | ||
| 1098 | PIN_ODR_HIGH(GPIOG_PIN10) | \ | ||
| 1099 | PIN_ODR_HIGH(GPIOG_PIN11) | \ | ||
| 1100 | PIN_ODR_HIGH(GPIOG_PIN12) | \ | ||
| 1101 | PIN_ODR_HIGH(GPIOG_PIN13) | \ | ||
| 1102 | PIN_ODR_HIGH(GPIOG_PIN14) | \ | ||
| 1103 | PIN_ODR_HIGH(GPIOG_PIN15)) | ||
| 1104 | #define VAL_GPIOG_AFRL (PIN_AFIO_AF(GPIOG_PIN0, 0U) | \ | ||
| 1105 | PIN_AFIO_AF(GPIOG_PIN1, 0U) | \ | ||
| 1106 | PIN_AFIO_AF(GPIOG_PIN2, 0U) | \ | ||
| 1107 | PIN_AFIO_AF(GPIOG_PIN3, 0U) | \ | ||
| 1108 | PIN_AFIO_AF(GPIOG_PIN4, 0U) | \ | ||
| 1109 | PIN_AFIO_AF(GPIOG_PIN5, 0U) | \ | ||
| 1110 | PIN_AFIO_AF(GPIOG_PIN6, 0U) | \ | ||
| 1111 | PIN_AFIO_AF(GPIOG_PIN7, 0U)) | ||
| 1112 | #define VAL_GPIOG_AFRH (PIN_AFIO_AF(GPIOG_PIN8, 0U) | \ | ||
| 1113 | PIN_AFIO_AF(GPIOG_PIN9, 0U) | \ | ||
| 1114 | PIN_AFIO_AF(GPIOG_PIN10, 0U) | \ | ||
| 1115 | PIN_AFIO_AF(GPIOG_PIN11, 0U) | \ | ||
| 1116 | PIN_AFIO_AF(GPIOG_PIN12, 0U) | \ | ||
| 1117 | PIN_AFIO_AF(GPIOG_PIN13, 0U) | \ | ||
| 1118 | PIN_AFIO_AF(GPIOG_PIN14, 0U) | \ | ||
| 1119 | PIN_AFIO_AF(GPIOG_PIN15, 0U)) | ||
| 1120 | |||
| 1121 | /* | ||
| 1122 | * GPIOH setup: | ||
| 1123 | * | ||
| 1124 | * PH0 - OSC_IN (input floating). | ||
| 1125 | * PH1 - OSC_OUT (input floating). | ||
| 1126 | * PH2 - PIN2 (input pullup). | ||
| 1127 | * PH3 - PIN3 (input pullup). | ||
| 1128 | * PH4 - PIN4 (input pullup). | ||
| 1129 | * PH5 - PIN5 (input pullup). | ||
| 1130 | * PH6 - PIN6 (input pullup). | ||
| 1131 | * PH7 - PIN7 (input pullup). | ||
| 1132 | * PH8 - PIN8 (input pullup). | ||
| 1133 | * PH9 - PIN9 (input pullup). | ||
| 1134 | * PH10 - PIN10 (input pullup). | ||
| 1135 | * PH11 - PIN11 (input pullup). | ||
| 1136 | * PH12 - PIN12 (input pullup). | ||
| 1137 | * PH13 - PIN13 (input pullup). | ||
| 1138 | * PH14 - PIN14 (input pullup). | ||
| 1139 | * PH15 - PIN15 (input pullup). | ||
| 1140 | */ | ||
| 1141 | #define VAL_GPIOH_MODER (PIN_MODE_INPUT(GPIOH_OSC_IN) | \ | ||
| 1142 | PIN_MODE_INPUT(GPIOH_OSC_OUT) | \ | ||
| 1143 | PIN_MODE_INPUT(GPIOH_PIN2) | \ | ||
| 1144 | PIN_MODE_INPUT(GPIOH_PIN3) | \ | ||
| 1145 | PIN_MODE_INPUT(GPIOH_PIN4) | \ | ||
| 1146 | PIN_MODE_INPUT(GPIOH_PIN5) | \ | ||
| 1147 | PIN_MODE_INPUT(GPIOH_PIN6) | \ | ||
| 1148 | PIN_MODE_INPUT(GPIOH_PIN7) | \ | ||
| 1149 | PIN_MODE_INPUT(GPIOH_PIN8) | \ | ||
| 1150 | PIN_MODE_INPUT(GPIOH_PIN9) | \ | ||
| 1151 | PIN_MODE_INPUT(GPIOH_PIN10) | \ | ||
| 1152 | PIN_MODE_INPUT(GPIOH_PIN11) | \ | ||
| 1153 | PIN_MODE_INPUT(GPIOH_PIN12) | \ | ||
| 1154 | PIN_MODE_INPUT(GPIOH_PIN13) | \ | ||
| 1155 | PIN_MODE_INPUT(GPIOH_PIN14) | \ | ||
| 1156 | PIN_MODE_INPUT(GPIOH_PIN15)) | ||
| 1157 | #define VAL_GPIOH_OTYPER (PIN_OTYPE_PUSHPULL(GPIOH_OSC_IN) | \ | ||
| 1158 | PIN_OTYPE_PUSHPULL(GPIOH_OSC_OUT) | \ | ||
| 1159 | PIN_OTYPE_PUSHPULL(GPIOH_PIN2) | \ | ||
| 1160 | PIN_OTYPE_PUSHPULL(GPIOH_PIN3) | \ | ||
| 1161 | PIN_OTYPE_PUSHPULL(GPIOH_PIN4) | \ | ||
| 1162 | PIN_OTYPE_PUSHPULL(GPIOH_PIN5) | \ | ||
| 1163 | PIN_OTYPE_PUSHPULL(GPIOH_PIN6) | \ | ||
| 1164 | PIN_OTYPE_PUSHPULL(GPIOH_PIN7) | \ | ||
| 1165 | PIN_OTYPE_PUSHPULL(GPIOH_PIN8) | \ | ||
| 1166 | PIN_OTYPE_PUSHPULL(GPIOH_PIN9) | \ | ||
| 1167 | PIN_OTYPE_PUSHPULL(GPIOH_PIN10) | \ | ||
| 1168 | PIN_OTYPE_PUSHPULL(GPIOH_PIN11) | \ | ||
| 1169 | PIN_OTYPE_PUSHPULL(GPIOH_PIN12) | \ | ||
| 1170 | PIN_OTYPE_PUSHPULL(GPIOH_PIN13) | \ | ||
| 1171 | PIN_OTYPE_PUSHPULL(GPIOH_PIN14) | \ | ||
| 1172 | PIN_OTYPE_PUSHPULL(GPIOH_PIN15)) | ||
| 1173 | #define VAL_GPIOH_OSPEEDR (PIN_OSPEED_HIGH(GPIOH_OSC_IN) | \ | ||
| 1174 | PIN_OSPEED_HIGH(GPIOH_OSC_OUT) | \ | ||
| 1175 | PIN_OSPEED_HIGH(GPIOH_PIN2) | \ | ||
| 1176 | PIN_OSPEED_HIGH(GPIOH_PIN3) | \ | ||
| 1177 | PIN_OSPEED_HIGH(GPIOH_PIN4) | \ | ||
| 1178 | PIN_OSPEED_HIGH(GPIOH_PIN5) | \ | ||
| 1179 | PIN_OSPEED_HIGH(GPIOH_PIN6) | \ | ||
| 1180 | PIN_OSPEED_HIGH(GPIOH_PIN7) | \ | ||
| 1181 | PIN_OSPEED_HIGH(GPIOH_PIN8) | \ | ||
| 1182 | PIN_OSPEED_HIGH(GPIOH_PIN9) | \ | ||
| 1183 | PIN_OSPEED_HIGH(GPIOH_PIN10) | \ | ||
| 1184 | PIN_OSPEED_HIGH(GPIOH_PIN11) | \ | ||
| 1185 | PIN_OSPEED_HIGH(GPIOH_PIN12) | \ | ||
| 1186 | PIN_OSPEED_HIGH(GPIOH_PIN13) | \ | ||
| 1187 | PIN_OSPEED_HIGH(GPIOH_PIN14) | \ | ||
| 1188 | PIN_OSPEED_HIGH(GPIOH_PIN15)) | ||
| 1189 | #define VAL_GPIOH_PUPDR (PIN_PUPDR_FLOATING(GPIOH_OSC_IN) | \ | ||
| 1190 | PIN_PUPDR_FLOATING(GPIOH_OSC_OUT) | \ | ||
| 1191 | PIN_PUPDR_PULLUP(GPIOH_PIN2) | \ | ||
| 1192 | PIN_PUPDR_PULLUP(GPIOH_PIN3) | \ | ||
| 1193 | PIN_PUPDR_PULLUP(GPIOH_PIN4) | \ | ||
| 1194 | PIN_PUPDR_PULLUP(GPIOH_PIN5) | \ | ||
| 1195 | PIN_PUPDR_PULLUP(GPIOH_PIN6) | \ | ||
| 1196 | PIN_PUPDR_PULLUP(GPIOH_PIN7) | \ | ||
| 1197 | PIN_PUPDR_PULLUP(GPIOH_PIN8) | \ | ||
| 1198 | PIN_PUPDR_PULLUP(GPIOH_PIN9) | \ | ||
| 1199 | PIN_PUPDR_PULLUP(GPIOH_PIN10) | \ | ||
| 1200 | PIN_PUPDR_PULLUP(GPIOH_PIN11) | \ | ||
| 1201 | PIN_PUPDR_PULLUP(GPIOH_PIN12) | \ | ||
| 1202 | PIN_PUPDR_PULLUP(GPIOH_PIN13) | \ | ||
| 1203 | PIN_PUPDR_PULLUP(GPIOH_PIN14) | \ | ||
| 1204 | PIN_PUPDR_PULLUP(GPIOH_PIN15)) | ||
| 1205 | #define VAL_GPIOH_ODR (PIN_ODR_HIGH(GPIOH_OSC_IN) | \ | ||
| 1206 | PIN_ODR_HIGH(GPIOH_OSC_OUT) | \ | ||
| 1207 | PIN_ODR_HIGH(GPIOH_PIN2) | \ | ||
| 1208 | PIN_ODR_HIGH(GPIOH_PIN3) | \ | ||
| 1209 | PIN_ODR_HIGH(GPIOH_PIN4) | \ | ||
| 1210 | PIN_ODR_HIGH(GPIOH_PIN5) | \ | ||
| 1211 | PIN_ODR_HIGH(GPIOH_PIN6) | \ | ||
| 1212 | PIN_ODR_HIGH(GPIOH_PIN7) | \ | ||
| 1213 | PIN_ODR_HIGH(GPIOH_PIN8) | \ | ||
| 1214 | PIN_ODR_HIGH(GPIOH_PIN9) | \ | ||
| 1215 | PIN_ODR_HIGH(GPIOH_PIN10) | \ | ||
| 1216 | PIN_ODR_HIGH(GPIOH_PIN11) | \ | ||
| 1217 | PIN_ODR_HIGH(GPIOH_PIN12) | \ | ||
| 1218 | PIN_ODR_HIGH(GPIOH_PIN13) | \ | ||
| 1219 | PIN_ODR_HIGH(GPIOH_PIN14) | \ | ||
| 1220 | PIN_ODR_HIGH(GPIOH_PIN15)) | ||
| 1221 | #define VAL_GPIOH_AFRL (PIN_AFIO_AF(GPIOH_OSC_IN, 0U) | \ | ||
| 1222 | PIN_AFIO_AF(GPIOH_OSC_OUT, 0U) | \ | ||
| 1223 | PIN_AFIO_AF(GPIOH_PIN2, 0U) | \ | ||
| 1224 | PIN_AFIO_AF(GPIOH_PIN3, 0U) | \ | ||
| 1225 | PIN_AFIO_AF(GPIOH_PIN4, 0U) | \ | ||
| 1226 | PIN_AFIO_AF(GPIOH_PIN5, 0U) | \ | ||
| 1227 | PIN_AFIO_AF(GPIOH_PIN6, 0U) | \ | ||
| 1228 | PIN_AFIO_AF(GPIOH_PIN7, 0U)) | ||
| 1229 | #define VAL_GPIOH_AFRH (PIN_AFIO_AF(GPIOH_PIN8, 0U) | \ | ||
| 1230 | PIN_AFIO_AF(GPIOH_PIN9, 0U) | \ | ||
| 1231 | PIN_AFIO_AF(GPIOH_PIN10, 0U) | \ | ||
| 1232 | PIN_AFIO_AF(GPIOH_PIN11, 0U) | \ | ||
| 1233 | PIN_AFIO_AF(GPIOH_PIN12, 0U) | \ | ||
| 1234 | PIN_AFIO_AF(GPIOH_PIN13, 0U) | \ | ||
| 1235 | PIN_AFIO_AF(GPIOH_PIN14, 0U) | \ | ||
| 1236 | PIN_AFIO_AF(GPIOH_PIN15, 0U)) | ||
| 1237 | |||
| 1238 | /* | ||
| 1239 | * GPIOI setup: | ||
| 1240 | * | ||
| 1241 | * PI0 - PIN0 (input pullup). | ||
| 1242 | * PI1 - PIN1 (input pullup). | ||
| 1243 | * PI2 - PIN2 (input pullup). | ||
| 1244 | * PI3 - PIN3 (input pullup). | ||
| 1245 | * PI4 - PIN4 (input pullup). | ||
| 1246 | * PI5 - PIN5 (input pullup). | ||
| 1247 | * PI6 - PIN6 (input pullup). | ||
| 1248 | * PI7 - PIN7 (input pullup). | ||
| 1249 | * PI8 - PIN8 (input pullup). | ||
| 1250 | * PI9 - PIN9 (input pullup). | ||
| 1251 | * PI10 - PIN10 (input pullup). | ||
| 1252 | * PI11 - PIN11 (input pullup). | ||
| 1253 | * PI12 - PIN12 (input pullup). | ||
| 1254 | * PI13 - PIN13 (input pullup). | ||
| 1255 | * PI14 - PIN14 (input pullup). | ||
| 1256 | * PI15 - PIN15 (input pullup). | ||
| 1257 | */ | ||
| 1258 | #define VAL_GPIOI_MODER (PIN_MODE_INPUT(GPIOI_PIN0) | \ | ||
| 1259 | PIN_MODE_INPUT(GPIOI_PIN1) | \ | ||
| 1260 | PIN_MODE_INPUT(GPIOI_PIN2) | \ | ||
| 1261 | PIN_MODE_INPUT(GPIOI_PIN3) | \ | ||
| 1262 | PIN_MODE_INPUT(GPIOI_PIN4) | \ | ||
| 1263 | PIN_MODE_INPUT(GPIOI_PIN5) | \ | ||
| 1264 | PIN_MODE_INPUT(GPIOI_PIN6) | \ | ||
| 1265 | PIN_MODE_INPUT(GPIOI_PIN7) | \ | ||
| 1266 | PIN_MODE_INPUT(GPIOI_PIN8) | \ | ||
| 1267 | PIN_MODE_INPUT(GPIOI_PIN9) | \ | ||
| 1268 | PIN_MODE_INPUT(GPIOI_PIN10) | \ | ||
| 1269 | PIN_MODE_INPUT(GPIOI_PIN11) | \ | ||
| 1270 | PIN_MODE_INPUT(GPIOI_PIN12) | \ | ||
| 1271 | PIN_MODE_INPUT(GPIOI_PIN13) | \ | ||
| 1272 | PIN_MODE_INPUT(GPIOI_PIN14) | \ | ||
| 1273 | PIN_MODE_INPUT(GPIOI_PIN15)) | ||
| 1274 | #define VAL_GPIOI_OTYPER (PIN_OTYPE_PUSHPULL(GPIOI_PIN0) | \ | ||
| 1275 | PIN_OTYPE_PUSHPULL(GPIOI_PIN1) | \ | ||
| 1276 | PIN_OTYPE_PUSHPULL(GPIOI_PIN2) | \ | ||
| 1277 | PIN_OTYPE_PUSHPULL(GPIOI_PIN3) | \ | ||
| 1278 | PIN_OTYPE_PUSHPULL(GPIOI_PIN4) | \ | ||
| 1279 | PIN_OTYPE_PUSHPULL(GPIOI_PIN5) | \ | ||
| 1280 | PIN_OTYPE_PUSHPULL(GPIOI_PIN6) | \ | ||
| 1281 | PIN_OTYPE_PUSHPULL(GPIOI_PIN7) | \ | ||
| 1282 | PIN_OTYPE_PUSHPULL(GPIOI_PIN8) | \ | ||
| 1283 | PIN_OTYPE_PUSHPULL(GPIOI_PIN9) | \ | ||
| 1284 | PIN_OTYPE_PUSHPULL(GPIOI_PIN10) | \ | ||
| 1285 | PIN_OTYPE_PUSHPULL(GPIOI_PIN11) | \ | ||
| 1286 | PIN_OTYPE_PUSHPULL(GPIOI_PIN12) | \ | ||
| 1287 | PIN_OTYPE_PUSHPULL(GPIOI_PIN13) | \ | ||
| 1288 | PIN_OTYPE_PUSHPULL(GPIOI_PIN14) | \ | ||
| 1289 | PIN_OTYPE_PUSHPULL(GPIOI_PIN15)) | ||
| 1290 | #define VAL_GPIOI_OSPEEDR (PIN_OSPEED_HIGH(GPIOI_PIN0) | \ | ||
| 1291 | PIN_OSPEED_HIGH(GPIOI_PIN1) | \ | ||
| 1292 | PIN_OSPEED_HIGH(GPIOI_PIN2) | \ | ||
| 1293 | PIN_OSPEED_HIGH(GPIOI_PIN3) | \ | ||
| 1294 | PIN_OSPEED_HIGH(GPIOI_PIN4) | \ | ||
| 1295 | PIN_OSPEED_HIGH(GPIOI_PIN5) | \ | ||
| 1296 | PIN_OSPEED_HIGH(GPIOI_PIN6) | \ | ||
| 1297 | PIN_OSPEED_HIGH(GPIOI_PIN7) | \ | ||
| 1298 | PIN_OSPEED_HIGH(GPIOI_PIN8) | \ | ||
| 1299 | PIN_OSPEED_HIGH(GPIOI_PIN9) | \ | ||
| 1300 | PIN_OSPEED_HIGH(GPIOI_PIN10) | \ | ||
| 1301 | PIN_OSPEED_HIGH(GPIOI_PIN11) | \ | ||
| 1302 | PIN_OSPEED_HIGH(GPIOI_PIN12) | \ | ||
| 1303 | PIN_OSPEED_HIGH(GPIOI_PIN13) | \ | ||
| 1304 | PIN_OSPEED_HIGH(GPIOI_PIN14) | \ | ||
| 1305 | PIN_OSPEED_HIGH(GPIOI_PIN15)) | ||
| 1306 | #define VAL_GPIOI_PUPDR (PIN_PUPDR_PULLUP(GPIOI_PIN0) | \ | ||
| 1307 | PIN_PUPDR_PULLUP(GPIOI_PIN1) | \ | ||
| 1308 | PIN_PUPDR_PULLUP(GPIOI_PIN2) | \ | ||
| 1309 | PIN_PUPDR_PULLUP(GPIOI_PIN3) | \ | ||
| 1310 | PIN_PUPDR_PULLUP(GPIOI_PIN4) | \ | ||
| 1311 | PIN_PUPDR_PULLUP(GPIOI_PIN5) | \ | ||
| 1312 | PIN_PUPDR_PULLUP(GPIOI_PIN6) | \ | ||
| 1313 | PIN_PUPDR_PULLUP(GPIOI_PIN7) | \ | ||
| 1314 | PIN_PUPDR_PULLUP(GPIOI_PIN8) | \ | ||
| 1315 | PIN_PUPDR_PULLUP(GPIOI_PIN9) | \ | ||
| 1316 | PIN_PUPDR_PULLUP(GPIOI_PIN10) | \ | ||
| 1317 | PIN_PUPDR_PULLUP(GPIOI_PIN11) | \ | ||
| 1318 | PIN_PUPDR_PULLUP(GPIOI_PIN12) | \ | ||
| 1319 | PIN_PUPDR_PULLUP(GPIOI_PIN13) | \ | ||
| 1320 | PIN_PUPDR_PULLUP(GPIOI_PIN14) | \ | ||
| 1321 | PIN_PUPDR_PULLUP(GPIOI_PIN15)) | ||
| 1322 | #define VAL_GPIOI_ODR (PIN_ODR_HIGH(GPIOI_PIN0) | \ | ||
| 1323 | PIN_ODR_HIGH(GPIOI_PIN1) | \ | ||
| 1324 | PIN_ODR_HIGH(GPIOI_PIN2) | \ | ||
| 1325 | PIN_ODR_HIGH(GPIOI_PIN3) | \ | ||
| 1326 | PIN_ODR_HIGH(GPIOI_PIN4) | \ | ||
| 1327 | PIN_ODR_HIGH(GPIOI_PIN5) | \ | ||
| 1328 | PIN_ODR_HIGH(GPIOI_PIN6) | \ | ||
| 1329 | PIN_ODR_HIGH(GPIOI_PIN7) | \ | ||
| 1330 | PIN_ODR_HIGH(GPIOI_PIN8) | \ | ||
| 1331 | PIN_ODR_HIGH(GPIOI_PIN9) | \ | ||
| 1332 | PIN_ODR_HIGH(GPIOI_PIN10) | \ | ||
| 1333 | PIN_ODR_HIGH(GPIOI_PIN11) | \ | ||
| 1334 | PIN_ODR_HIGH(GPIOI_PIN12) | \ | ||
| 1335 | PIN_ODR_HIGH(GPIOI_PIN13) | \ | ||
| 1336 | PIN_ODR_HIGH(GPIOI_PIN14) | \ | ||
| 1337 | PIN_ODR_HIGH(GPIOI_PIN15)) | ||
| 1338 | #define VAL_GPIOI_AFRL (PIN_AFIO_AF(GPIOI_PIN0, 0U) | \ | ||
| 1339 | PIN_AFIO_AF(GPIOI_PIN1, 0U) | \ | ||
| 1340 | PIN_AFIO_AF(GPIOI_PIN2, 0U) | \ | ||
| 1341 | PIN_AFIO_AF(GPIOI_PIN3, 0U) | \ | ||
| 1342 | PIN_AFIO_AF(GPIOI_PIN4, 0U) | \ | ||
| 1343 | PIN_AFIO_AF(GPIOI_PIN5, 0U) | \ | ||
| 1344 | PIN_AFIO_AF(GPIOI_PIN6, 0U) | \ | ||
| 1345 | PIN_AFIO_AF(GPIOI_PIN7, 0U)) | ||
| 1346 | #define VAL_GPIOI_AFRH (PIN_AFIO_AF(GPIOI_PIN8, 0U) | \ | ||
| 1347 | PIN_AFIO_AF(GPIOI_PIN9, 0U) | \ | ||
| 1348 | PIN_AFIO_AF(GPIOI_PIN10, 0U) | \ | ||
| 1349 | PIN_AFIO_AF(GPIOI_PIN11, 0U) | \ | ||
| 1350 | PIN_AFIO_AF(GPIOI_PIN12, 0U) | \ | ||
| 1351 | PIN_AFIO_AF(GPIOI_PIN13, 0U) | \ | ||
| 1352 | PIN_AFIO_AF(GPIOI_PIN14, 0U) | \ | ||
| 1353 | PIN_AFIO_AF(GPIOI_PIN15, 0U)) | ||
| 1354 | |||
| 1355 | /*===========================================================================*/ | ||
| 1356 | /* External declarations. */ | ||
| 1357 | /*===========================================================================*/ | ||
| 1358 | |||
| 1359 | #if !defined(_FROM_ASM_) | ||
| 1360 | #ifdef __cplusplus | ||
| 1361 | extern "C" { | ||
| 1362 | #endif | ||
| 1363 | void boardInit(void); | ||
| 1364 | #ifdef __cplusplus | ||
| 1365 | } | ||
| 1366 | #endif | ||
| 1367 | #endif /* _FROM_ASM_ */ | ||
| 1368 | |||
| 1369 | #endif /* BOARD_H */ | ||
diff --git a/drivers/boards/BLACKPILL_STM32_F401/board.mk b/drivers/boards/BLACKPILL_STM32_F401/board.mk new file mode 100644 index 000000000..33473ed6b --- /dev/null +++ b/drivers/boards/BLACKPILL_STM32_F401/board.mk | |||
| @@ -0,0 +1,9 @@ | |||
| 1 | # List of all the board related files. | ||
| 2 | BOARDSRC = $(BOARD_PATH)/boards/BLACKPILL_STM32_F401/board.c | ||
| 3 | |||
| 4 | # Required include directories | ||
| 5 | BOARDINC = $(BOARD_PATH)/boards/BLACKPILL_STM32_F401 | ||
| 6 | |||
| 7 | # Shared variables | ||
| 8 | ALLCSRC += $(BOARDSRC) | ||
| 9 | ALLINC += $(BOARDINC) | ||
diff --git a/drivers/boards/BLACKPILL_STM32_F401/cfg/board.chcfg b/drivers/boards/BLACKPILL_STM32_F401/cfg/board.chcfg new file mode 100644 index 000000000..7559ceb93 --- /dev/null +++ b/drivers/boards/BLACKPILL_STM32_F401/cfg/board.chcfg | |||
| @@ -0,0 +1,1193 @@ | |||
| 1 | <?xml version="1.0" encoding="UTF-8"?> | ||
| 2 | <!-- STM32F4xx board Template --> | ||
| 3 | <board | ||
| 4 | xmlns:xsi="http://www.w3.org/2001/XMLSchema-instance" | ||
| 5 | xsi:noNamespaceSchemaLocation="http://www.chibios.org/xml/schema/boards/stm32f4xx_board.xsd"> | ||
| 6 | <configuration_settings> | ||
| 7 | <templates_path>resources/gencfg/processors/boards/stm32f4xx/templates</templates_path> | ||
| 8 | <output_path>..</output_path> | ||
| 9 | <hal_version>5.0.x</hal_version> | ||
| 10 | </configuration_settings> | ||
| 11 | <board_name>STMicroelectronics STM32F401C-Discovery</board_name> | ||
| 12 | <board_id>ST_STM32F401C_DISCOVERY</board_id> | ||
| 13 | <board_functions></board_functions> | ||
| 14 | <subtype>STM32F401xC</subtype> | ||
| 15 | <clocks | ||
| 16 | HSEFrequency="8000000" | ||
| 17 | HSEBypass="false" | ||
| 18 | LSEFrequency="0" | ||
| 19 | LSEBypass="false" | ||
| 20 | VDD="300" /> | ||
| 21 | <ports> | ||
| 22 | <GPIOA> | ||
| 23 | <pin0 | ||
| 24 | ID="BUTTON" | ||
| 25 | Type="PushPull" | ||
| 26 | Level="High" | ||
| 27 | Speed="Maximum" | ||
| 28 | Resistor="Floating" | ||
| 29 | Mode="Input" | ||
| 30 | Alternate="0" /> | ||
| 31 | <pin1 | ||
| 32 | ID="" | ||
| 33 | Type="PushPull" | ||
| 34 | Level="High" | ||
| 35 | Speed="Maximum" | ||
| 36 | Resistor="PullUp" | ||
| 37 | Mode="Input" | ||
| 38 | Alternate="0" /> | ||
| 39 | <pin2 | ||
| 40 | ID="" | ||
| 41 | Type="PushPull" | ||
| 42 | Level="High" | ||
| 43 | Speed="Maximum" | ||
| 44 | Resistor="PullUp" | ||
| 45 | Mode="Input" | ||
| 46 | Alternate="0" /> | ||
| 47 | <pin3 | ||
| 48 | ID="" | ||
| 49 | Type="PushPull" | ||
| 50 | Level="High" | ||
| 51 | Speed="Maximum" | ||
| 52 | Resistor="PullUp" | ||
| 53 | Mode="Input" | ||
| 54 | Alternate="0" /> | ||
| 55 | <pin4 | ||
| 56 | ID="CS43L22_LRCK" | ||
| 57 | Type="PushPull" | ||
| 58 | Level="High" | ||
| 59 | Speed="Maximum" | ||
| 60 | Resistor="Floating" | ||
| 61 | Mode="Alternate" | ||
| 62 | Alternate="6" /> | ||
| 63 | <pin5 | ||
| 64 | ID="L3GD20_SCL" | ||
| 65 | Type="PushPull" | ||
| 66 | Level="High" | ||
| 67 | Speed="Maximum" | ||
| 68 | Resistor="Floating" | ||
| 69 | Mode="Alternate" | ||
| 70 | Alternate="5" /> | ||
| 71 | <pin6 | ||
| 72 | ID="L3GD20_SD0" | ||
| 73 | Type="PushPull" | ||
| 74 | Level="High" | ||
| 75 | Speed="Maximum" | ||
| 76 | Resistor="PullUp" | ||
| 77 | Mode="Alternate" | ||
| 78 | Alternate="5" /> | ||
| 79 | <pin7 | ||
| 80 | ID="L3GD20_SDI" | ||
| 81 | Type="PushPull" | ||
| 82 | Level="High" | ||
| 83 | Speed="Maximum" | ||
| 84 | Resistor="PullUp" | ||
| 85 | Mode="Alternate" | ||
| 86 | Alternate="5" /> | ||
| 87 | <pin8 | ||
| 88 | ID="" | ||
| 89 | Type="PushPull" | ||
| 90 | Level="High" | ||
| 91 | Speed="Maximum" | ||
| 92 | Resistor="PullUp" | ||
| 93 | Mode="Input" | ||
| 94 | Alternate="0" /> | ||
| 95 | <pin9 | ||
| 96 | ID="VBUS_FS" | ||
| 97 | Type="PushPull" | ||
| 98 | Level="High" | ||
| 99 | Speed="Maximum" | ||
| 100 | Resistor="Floating" | ||
| 101 | Mode="Input" | ||
| 102 | Alternate="0" /> | ||
| 103 | <pin10 | ||
| 104 | ID="OTG_FS_ID" | ||
| 105 | Type="PushPull" | ||
| 106 | Level="High" | ||
| 107 | Speed="Maximum" | ||
| 108 | Resistor="Floating" | ||
| 109 | Mode="Alternate" | ||
| 110 | Alternate="10" /> | ||
| 111 | <pin11 | ||
| 112 | ID="OTG_FS_DM" | ||
| 113 | Type="PushPull" | ||
| 114 | Level="High" | ||
| 115 | Speed="Maximum" | ||
| 116 | Resistor="Floating" | ||
| 117 | Mode="Alternate" | ||
| 118 | Alternate="10" /> | ||
| 119 | <pin12 | ||
| 120 | ID="OTG_FS_DP" | ||
| 121 | Type="PushPull" | ||
| 122 | Level="High" | ||
| 123 | Speed="Maximum" | ||
| 124 | Resistor="Floating" | ||
| 125 | Mode="Alternate" | ||
| 126 | Alternate="10" /> | ||
| 127 | <pin13 | ||
| 128 | ID="SWDIO" | ||
| 129 | Type="PushPull" | ||
| 130 | Level="High" | ||
| 131 | Speed="Maximum" | ||
| 132 | Resistor="Floating" | ||
| 133 | Mode="Alternate" | ||
| 134 | Alternate="0" /> | ||
| 135 | <pin14 | ||
| 136 | ID="SWCLK" | ||
| 137 | Type="PushPull" | ||
| 138 | Level="High" | ||
| 139 | Speed="Maximum" | ||
| 140 | Resistor="Floating" | ||
| 141 | Mode="Alternate" | ||
| 142 | Alternate="0" /> | ||
| 143 | <pin15 | ||
| 144 | ID="" | ||
| 145 | Type="PushPull" | ||
| 146 | Level="High" | ||
| 147 | Speed="Maximum" | ||
| 148 | Resistor="PullUp" | ||
| 149 | Mode="Input" | ||
| 150 | Alternate="0" /> | ||
| 151 | </GPIOA> | ||
| 152 | <GPIOB> | ||
| 153 | <pin0 | ||
| 154 | ID="" | ||
| 155 | Type="PushPull" | ||
| 156 | Level="High" | ||
| 157 | Speed="Maximum" | ||
| 158 | Resistor="PullUp" | ||
| 159 | Mode="Input" | ||
| 160 | Alternate="0" /> | ||
| 161 | <pin1 | ||
| 162 | ID="" | ||
| 163 | Type="PushPull" | ||
| 164 | Level="High" | ||
| 165 | Speed="Maximum" | ||
| 166 | Resistor="PullUp" | ||
| 167 | Mode="Input" | ||
| 168 | Alternate="0" /> | ||
| 169 | <pin2 | ||
| 170 | ID="" | ||
| 171 | Type="PushPull" | ||
| 172 | Level="High" | ||
| 173 | Speed="Maximum" | ||
| 174 | Resistor="PullUp" | ||
| 175 | Mode="Input" | ||
| 176 | Alternate="0" /> | ||
| 177 | <pin3 | ||
| 178 | ID="SWO" | ||
| 179 | Type="PushPull" | ||
| 180 | Level="High" | ||
| 181 | Speed="Maximum" | ||
| 182 | Resistor="PullUp" | ||
| 183 | Mode="Alternate" | ||
| 184 | Alternate="0" /> | ||
| 185 | <pin4 | ||
| 186 | ID="" | ||
| 187 | Type="PushPull" | ||
| 188 | Level="High" | ||
| 189 | Speed="Maximum" | ||
| 190 | Resistor="PullUp" | ||
| 191 | Mode="Input" | ||
| 192 | Alternate="0" /> | ||
| 193 | <pin5 | ||
| 194 | ID="" | ||
| 195 | Type="PushPull" | ||
| 196 | Level="High" | ||
| 197 | Speed="Maximum" | ||
| 198 | Resistor="PullUp" | ||
| 199 | Mode="Input" | ||
| 200 | Alternate="0" /> | ||
| 201 | <pin6 | ||
| 202 | ID="LSM303DLHC_SCL" | ||
| 203 | Type="PushPull" | ||
| 204 | Level="High" | ||
| 205 | Speed="Maximum" | ||
| 206 | Resistor="Floating" | ||
| 207 | Mode="Alternate" | ||
| 208 | Alternate="4" /> | ||
| 209 | <pin7 | ||
| 210 | ID="" | ||
| 211 | Type="PushPull" | ||
| 212 | Level="High" | ||
| 213 | Speed="Maximum" | ||
| 214 | Resistor="PullUp" | ||
| 215 | Mode="Input" | ||
| 216 | Alternate="0" /> | ||
| 217 | <pin8 | ||
| 218 | ID="" | ||
| 219 | Type="PushPull" | ||
| 220 | Level="High" | ||
| 221 | Speed="Maximum" | ||
| 222 | Resistor="PullUp" | ||
| 223 | Mode="Input" | ||
| 224 | Alternate="0" /> | ||
| 225 | <pin9 | ||
| 226 | ID="LSM303DLHC_SDA" | ||
| 227 | Type="PushPull" | ||
| 228 | Level="High" | ||
| 229 | Speed="Maximum" | ||
| 230 | Resistor="Floating" | ||
| 231 | Mode="Alternate" | ||
| 232 | Alternate="4" /> | ||
| 233 | <pin10 | ||
| 234 | ID="MP45DT02_CLK_IN" | ||
| 235 | Type="PushPull" | ||
| 236 | Level="High" | ||
| 237 | Speed="Maximum" | ||
| 238 | Resistor="Floating" | ||
| 239 | Mode="Alternate" | ||
| 240 | Alternate="5" /> | ||
| 241 | <pin11 | ||
| 242 | ID="" | ||
| 243 | Type="PushPull" | ||
| 244 | Level="High" | ||
| 245 | Speed="Maximum" | ||
| 246 | Resistor="PullUp" | ||
| 247 | Mode="Input" | ||
| 248 | Alternate="0" /> | ||
| 249 | <pin12 | ||
| 250 | ID="" | ||
| 251 | Type="PushPull" | ||
| 252 | Level="High" | ||
| 253 | Speed="Maximum" | ||
| 254 | Resistor="PullUp" | ||
| 255 | Mode="Input" | ||
| 256 | Alternate="0" /> | ||
| 257 | <pin13 | ||
| 258 | ID="" | ||
| 259 | Type="PushPull" | ||
| 260 | Level="High" | ||
| 261 | Speed="Maximum" | ||
| 262 | Resistor="PullUp" | ||
| 263 | Mode="Input" | ||
| 264 | Alternate="0" /> | ||
| 265 | <pin14 | ||
| 266 | ID="" | ||
| 267 | Type="PushPull" | ||
| 268 | Level="High" | ||
| 269 | Speed="Maximum" | ||
| 270 | Resistor="PullUp" | ||
| 271 | Mode="Input" | ||
| 272 | Alternate="0" /> | ||
| 273 | <pin15 | ||
| 274 | ID="" | ||
| 275 | Type="PushPull" | ||
| 276 | Level="High" | ||
| 277 | Speed="Maximum" | ||
| 278 | Resistor="PullUp" | ||
| 279 | Mode="Input" | ||
| 280 | Alternate="0" /> | ||
| 281 | </GPIOB> | ||
| 282 | <GPIOC> | ||
| 283 | <pin0 | ||
| 284 | ID="OTG_FS_POWER_ON" | ||
| 285 | Type="PushPull" | ||
| 286 | Level="High" | ||
| 287 | Speed="Maximum" | ||
| 288 | Resistor="PullUp" | ||
| 289 | Mode="Output" | ||
| 290 | Alternate="0" /> | ||
| 291 | <pin1 | ||
| 292 | ID="" | ||
| 293 | Type="PushPull" | ||
| 294 | Level="High" | ||
| 295 | Speed="Maximum" | ||
| 296 | Resistor="PullUp" | ||
| 297 | Mode="Input" | ||
| 298 | Alternate="0" /> | ||
| 299 | <pin2 | ||
| 300 | ID="" | ||
| 301 | Type="PushPull" | ||
| 302 | Level="High" | ||
| 303 | Speed="Maximum" | ||
| 304 | Resistor="PullUp" | ||
| 305 | Mode="Input" | ||
| 306 | Alternate="0" /> | ||
| 307 | <pin3 | ||
| 308 | ID="CS43L22_AIN4x MP45DT02_PDM_OUT" | ||
| 309 | Type="PushPull" | ||
| 310 | Level="High" | ||
| 311 | Speed="Maximum" | ||
| 312 | Resistor="Floating" | ||
| 313 | Mode="Alternate" | ||
| 314 | Alternate="5" /> | ||
| 315 | <pin4 | ||
| 316 | ID="" | ||
| 317 | Type="PushPull" | ||
| 318 | Level="High" | ||
| 319 | Speed="Maximum" | ||
| 320 | Resistor="PullUp" | ||
| 321 | Mode="Input" | ||
| 322 | Alternate="0" /> | ||
| 323 | <pin5 | ||
| 324 | ID="" | ||
| 325 | Type="PushPull" | ||
| 326 | Level="High" | ||
| 327 | Speed="Maximum" | ||
| 328 | Resistor="PullUp" | ||
| 329 | Mode="Input" | ||
| 330 | Alternate="0" /> | ||
| 331 | <pin6 | ||
| 332 | ID="" | ||
| 333 | Type="PushPull" | ||
| 334 | Level="High" | ||
| 335 | Speed="Maximum" | ||
| 336 | Resistor="PullUp" | ||
| 337 | Mode="Input" | ||
| 338 | Alternate="0" /> | ||
| 339 | <pin7 | ||
| 340 | ID="CS43L22_MCLK" | ||
| 341 | Type="PushPull" | ||
| 342 | Level="High" | ||
| 343 | Speed="Maximum" | ||
| 344 | Resistor="PullUp" | ||
| 345 | Mode="Alternate" | ||
| 346 | Alternate="6" /> | ||
| 347 | <pin8 | ||
| 348 | ID="" | ||
| 349 | Type="PushPull" | ||
| 350 | Level="High" | ||
| 351 | Speed="Maximum" | ||
| 352 | Resistor="PullUp" | ||
| 353 | Mode="Input" | ||
| 354 | Alternate="0" /> | ||
| 355 | <pin9 | ||
| 356 | ID="" | ||
| 357 | Type="PushPull" | ||
| 358 | Level="High" | ||
| 359 | Speed="Maximum" | ||
| 360 | Resistor="PullUp" | ||
| 361 | Mode="Input" | ||
| 362 | Alternate="0" /> | ||
| 363 | <pin10 | ||
| 364 | ID="CS43L22_SCLK" | ||
| 365 | Type="PushPull" | ||
| 366 | Level="High" | ||
| 367 | Speed="Maximum" | ||
| 368 | Resistor="PullUp" | ||
| 369 | Mode="Alternate" | ||
| 370 | Alternate="6" /> | ||
| 371 | <pin11 | ||
| 372 | ID="" | ||
| 373 | Type="PushPull" | ||
| 374 | Level="High" | ||
| 375 | Speed="Maximum" | ||
| 376 | Resistor="PullUp" | ||
| 377 | Mode="Input" | ||
| 378 | Alternate="0" /> | ||
| 379 | <pin12 | ||
| 380 | ID="CS43L22_SDIN" | ||
| 381 | Type="PushPull" | ||
| 382 | Level="High" | ||
| 383 | Speed="Maximum" | ||
| 384 | Resistor="PullUp" | ||
| 385 | Mode="Alternate" | ||
| 386 | Alternate="6" /> | ||
| 387 | <pin13 | ||
| 388 | ID="" | ||
| 389 | Type="PushPull" | ||
| 390 | Level="High" | ||
| 391 | Speed="Maximum" | ||
| 392 | Resistor="PullUp" | ||
| 393 | Mode="Input" | ||
| 394 | Alternate="0" /> | ||
| 395 | <pin14 | ||
| 396 | ID="OSC32_IN" | ||
| 397 | Type="PushPull" | ||
| 398 | Level="High" | ||
| 399 | Speed="Maximum" | ||
| 400 | Resistor="Floating" | ||
| 401 | Mode="Input" | ||
| 402 | Alternate="0" /> | ||
| 403 | <pin15 | ||
| 404 | ID="OSC32_OUT" | ||
| 405 | Type="PushPull" | ||
| 406 | Level="High" | ||
| 407 | Speed="Maximum" | ||
| 408 | Resistor="Floating" | ||
| 409 | Mode="Input" | ||
| 410 | Alternate="0" /> | ||
| 411 | </GPIOC> | ||
| 412 | <GPIOD> | ||
| 413 | <pin0 | ||
| 414 | ID="" | ||
| 415 | Type="PushPull" | ||
| 416 | Level="High" | ||
| 417 | Speed="Maximum" | ||
| 418 | Resistor="PullUp" | ||
| 419 | Mode="Input" | ||
| 420 | Alternate="0" /> | ||
| 421 | <pin1 | ||
| 422 | ID="" | ||
| 423 | Type="PushPull" | ||
| 424 | Level="High" | ||
| 425 | Speed="Maximum" | ||
| 426 | Resistor="PullUp" | ||
| 427 | Mode="Input" | ||
| 428 | Alternate="0" /> | ||
| 429 | <pin2 | ||
| 430 | ID="" | ||
| 431 | Type="PushPull" | ||
| 432 | Level="High" | ||
| 433 | Speed="Maximum" | ||
| 434 | Resistor="PullUp" | ||
| 435 | Mode="Input" | ||
| 436 | Alternate="0" /> | ||
| 437 | <pin3 | ||
| 438 | ID="" | ||
| 439 | Type="PushPull" | ||
| 440 | Level="High" | ||
| 441 | Speed="Maximum" | ||
| 442 | Resistor="PullUp" | ||
| 443 | Mode="Input" | ||
| 444 | Alternate="0" /> | ||
| 445 | <pin4 | ||
| 446 | ID="CS43L22_RESET" | ||
| 447 | Type="PushPull" | ||
| 448 | Level="High" | ||
| 449 | Speed="Maximum" | ||
| 450 | Resistor="PullUp" | ||
| 451 | Mode="Output" | ||
| 452 | Alternate="0" /> | ||
| 453 | <pin5 | ||
| 454 | ID="OverCurrent" | ||
| 455 | Type="PushPull" | ||
| 456 | Level="High" | ||
| 457 | Speed="Maximum" | ||
| 458 | Resistor="Floating" | ||
| 459 | Mode="Input" | ||
| 460 | Alternate="0" /> | ||
| 461 | <pin6 | ||
| 462 | ID="" | ||
| 463 | Type="PushPull" | ||
| 464 | Level="High" | ||
| 465 | Speed="Maximum" | ||
| 466 | Resistor="PullUp" | ||
| 467 | Mode="Input" | ||
| 468 | Alternate="0" /> | ||
| 469 | <pin7 | ||
| 470 | ID="" | ||
| 471 | Type="PushPull" | ||
| 472 | Level="High" | ||
| 473 | Speed="Maximum" | ||
| 474 | Resistor="PullUp" | ||
| 475 | Mode="Input" | ||
| 476 | Alternate="0" /> | ||
| 477 | <pin8 | ||
| 478 | ID="" | ||
| 479 | Type="PushPull" | ||
| 480 | Level="High" | ||
| 481 | Speed="Maximum" | ||
| 482 | Resistor="PullUp" | ||
| 483 | Mode="Input" | ||
| 484 | Alternate="0" /> | ||
| 485 | <pin9 | ||
| 486 | ID="" | ||
| 487 | Type="PushPull" | ||
| 488 | Level="High" | ||
| 489 | Speed="Maximum" | ||
| 490 | Resistor="PullUp" | ||
| 491 | Mode="Input" | ||
| 492 | Alternate="0" /> | ||
| 493 | <pin10 | ||
| 494 | ID="" | ||
| 495 | Type="PushPull" | ||
| 496 | Level="High" | ||
| 497 | Speed="Maximum" | ||
| 498 | Resistor="PullUp" | ||
| 499 | Mode="Input" | ||
| 500 | Alternate="0" /> | ||
| 501 | <pin11 | ||
| 502 | ID="" | ||
| 503 | Type="PushPull" | ||
| 504 | Level="High" | ||
| 505 | Speed="Maximum" | ||
| 506 | Resistor="PullUp" | ||
| 507 | Mode="Input" | ||
| 508 | Alternate="0" /> | ||
| 509 | <pin12 | ||
| 510 | ID="LED4" | ||
| 511 | Type="PushPull" | ||
| 512 | Level="Low" | ||
| 513 | Speed="Maximum" | ||
| 514 | Resistor="Floating" | ||
| 515 | Mode="Output" | ||
| 516 | Alternate="0" /> | ||
| 517 | <pin13 | ||
| 518 | ID="LED3" | ||
| 519 | Type="PushPull" | ||
| 520 | Level="Low" | ||
| 521 | Speed="Maximum" | ||
| 522 | Resistor="Floating" | ||
| 523 | Mode="Output" | ||
| 524 | Alternate="0" /> | ||
| 525 | <pin14 | ||
| 526 | ID="LED5" | ||
| 527 | Type="PushPull" | ||
| 528 | Level="Low" | ||
| 529 | Speed="Maximum" | ||
| 530 | Resistor="Floating" | ||
| 531 | Mode="Output" | ||
| 532 | Alternate="0" /> | ||
| 533 | <pin15 | ||
| 534 | ID="LED6" | ||
| 535 | Type="PushPull" | ||
| 536 | Level="Low" | ||
| 537 | Speed="Maximum" | ||
| 538 | Resistor="Floating" | ||
| 539 | Mode="Output" | ||
| 540 | Alternate="0" /> | ||
| 541 | </GPIOD> | ||
| 542 | <GPIOE> | ||
| 543 | <pin0 | ||
| 544 | ID="L3GD20_INT1" | ||
| 545 | Type="PushPull" | ||
| 546 | Level="High" | ||
| 547 | Speed="Maximum" | ||
| 548 | Resistor="PullUp" | ||
| 549 | Mode="Input" | ||
| 550 | Alternate="0" /> | ||
| 551 | <pin1 | ||
| 552 | ID="L3GD20_INT2" | ||
| 553 | Type="PushPull" | ||
| 554 | Level="High" | ||
| 555 | Speed="Maximum" | ||
| 556 | Resistor="PullUp" | ||
| 557 | Mode="Input" | ||
| 558 | Alternate="0" /> | ||
| 559 | <pin2 | ||
| 560 | ID="LSM303DLHC_DRDY" | ||
| 561 | Type="PushPull" | ||
| 562 | Level="High" | ||
| 563 | Speed="Maximum" | ||
| 564 | Resistor="Floating" | ||
| 565 | Mode="Input" | ||
| 566 | Alternate="0" /> | ||
| 567 | <pin3 | ||
| 568 | ID="L3GD20_CS" | ||
| 569 | Type="PushPull" | ||
| 570 | Level="High" | ||
| 571 | Speed="Maximum" | ||
| 572 | Resistor="PullUp" | ||
| 573 | Mode="Output" | ||
| 574 | Alternate="0" /> | ||
| 575 | <pin4 | ||
| 576 | ID="LSM303DLHC_INT1" | ||
| 577 | Type="PushPull" | ||
| 578 | Level="High" | ||
| 579 | Speed="Maximum" | ||
| 580 | Resistor="PullUp" | ||
| 581 | Mode="Output" | ||
| 582 | Alternate="0" /> | ||
| 583 | <pin5 | ||
| 584 | ID="LSM303DLHC_INT2" | ||
| 585 | Type="PushPull" | ||
| 586 | Level="High" | ||
| 587 | Speed="Maximum" | ||
| 588 | Resistor="PullUp" | ||
| 589 | Mode="Output" | ||
| 590 | Alternate="0" /> | ||
| 591 | <pin6 | ||
| 592 | ID="" | ||
| 593 | Type="PushPull" | ||
| 594 | Level="High" | ||
| 595 | Speed="Maximum" | ||
| 596 | Resistor="PullUp" | ||
| 597 | Mode="Input" | ||
| 598 | Alternate="0" /> | ||
| 599 | <pin7 | ||
| 600 | ID="" | ||
| 601 | Type="PushPull" | ||
| 602 | Level="High" | ||
| 603 | Speed="Maximum" | ||
| 604 | Resistor="PullUp" | ||
| 605 | Mode="Input" | ||
| 606 | Alternate="0" /> | ||
| 607 | <pin8 | ||
| 608 | ID="" | ||
| 609 | Type="PushPull" | ||
| 610 | Level="High" | ||
| 611 | Speed="Maximum" | ||
| 612 | Resistor="PullUp" | ||
| 613 | Mode="Input" | ||
| 614 | Alternate="0" /> | ||
| 615 | <pin9 | ||
| 616 | ID="" | ||
| 617 | Type="PushPull" | ||
| 618 | Level="High" | ||
| 619 | Speed="Maximum" | ||
| 620 | Resistor="PullUp" | ||
| 621 | Mode="Input" | ||
| 622 | Alternate="0" /> | ||
| 623 | <pin10 | ||
| 624 | ID="" | ||
| 625 | Type="PushPull" | ||
| 626 | Level="High" | ||
| 627 | Speed="Maximum" | ||
| 628 | Resistor="PullUp" | ||
| 629 | Mode="Input" | ||
| 630 | Alternate="0" /> | ||
| 631 | <pin11 | ||
| 632 | ID="" | ||
| 633 | Type="PushPull" | ||
| 634 | Level="High" | ||
| 635 | Speed="Maximum" | ||
| 636 | Resistor="PullUp" | ||
| 637 | Mode="Input" | ||
| 638 | Alternate="0" /> | ||
| 639 | <pin12 | ||
| 640 | ID="" | ||
| 641 | Type="PushPull" | ||
| 642 | Level="High" | ||
| 643 | Speed="Maximum" | ||
| 644 | Resistor="PullUp" | ||
| 645 | Mode="Input" | ||
| 646 | Alternate="0" /> | ||
| 647 | <pin13 | ||
| 648 | ID="" | ||
| 649 | Type="PushPull" | ||
| 650 | Level="High" | ||
| 651 | Speed="Maximum" | ||
| 652 | Resistor="PullUp" | ||
| 653 | Mode="Input" | ||
| 654 | Alternate="0" /> | ||
| 655 | <pin14 | ||
| 656 | ID="" | ||
| 657 | Type="PushPull" | ||
| 658 | Level="High" | ||
| 659 | Speed="Maximum" | ||
| 660 | Resistor="PullUp" | ||
| 661 | Mode="Input" | ||
| 662 | Alternate="0" /> | ||
| 663 | <pin15 | ||
| 664 | ID="" | ||
| 665 | Type="PushPull" | ||
| 666 | Level="High" | ||
| 667 | Speed="Maximum" | ||
| 668 | Resistor="PullUp" | ||
| 669 | Mode="Input" | ||
| 670 | Alternate="0" /> | ||
| 671 | </GPIOE> | ||
| 672 | <GPIOF> | ||
| 673 | <pin0 | ||
| 674 | ID="" | ||
| 675 | Type="PushPull" | ||
| 676 | Level="High" | ||
| 677 | Speed="Maximum" | ||
| 678 | Resistor="PullUp" | ||
| 679 | Mode="Input" | ||
| 680 | Alternate="0" /> | ||
| 681 | <pin1 | ||
| 682 | ID="" | ||
| 683 | Type="PushPull" | ||
| 684 | Level="High" | ||
| 685 | Speed="Maximum" | ||
| 686 | Resistor="PullUp" | ||
| 687 | Mode="Input" | ||
| 688 | Alternate="0" /> | ||
| 689 | <pin2 | ||
| 690 | ID="" | ||
| 691 | Type="PushPull" | ||
| 692 | Level="High" | ||
| 693 | Speed="Maximum" | ||
| 694 | Resistor="PullUp" | ||
| 695 | Mode="Input" | ||
| 696 | Alternate="0" /> | ||
| 697 | <pin3 | ||
| 698 | ID="" | ||
| 699 | Type="PushPull" | ||
| 700 | Level="High" | ||
| 701 | Speed="Maximum" | ||
| 702 | Resistor="PullUp" | ||
| 703 | Mode="Input" | ||
| 704 | Alternate="0" /> | ||
| 705 | <pin4 | ||
| 706 | ID="" | ||
| 707 | Type="PushPull" | ||
| 708 | Level="High" | ||
| 709 | Speed="Maximum" | ||
| 710 | Resistor="PullUp" | ||
| 711 | Mode="Input" | ||
| 712 | Alternate="0" /> | ||
| 713 | <pin5 | ||
| 714 | ID="" | ||
| 715 | Type="PushPull" | ||
| 716 | Level="High" | ||
| 717 | Speed="Maximum" | ||
| 718 | Resistor="PullUp" | ||
| 719 | Mode="Input" | ||
| 720 | Alternate="0" /> | ||
| 721 | <pin6 | ||
| 722 | ID="" | ||
| 723 | Type="PushPull" | ||
| 724 | Level="High" | ||
| 725 | Speed="Maximum" | ||
| 726 | Resistor="PullUp" | ||
| 727 | Mode="Input" | ||
| 728 | Alternate="0" /> | ||
| 729 | <pin7 | ||
| 730 | ID="" | ||
| 731 | Type="PushPull" | ||
| 732 | Level="High" | ||
| 733 | Speed="Maximum" | ||
| 734 | Resistor="PullUp" | ||
| 735 | Mode="Input" | ||
| 736 | Alternate="0" /> | ||
| 737 | <pin8 | ||
| 738 | ID="" | ||
| 739 | Type="PushPull" | ||
| 740 | Level="High" | ||
| 741 | Speed="Maximum" | ||
| 742 | Resistor="PullUp" | ||
| 743 | Mode="Input" | ||
| 744 | Alternate="0" /> | ||
| 745 | <pin9 | ||
| 746 | ID="" | ||
| 747 | Type="PushPull" | ||
| 748 | Level="High" | ||
| 749 | Speed="Maximum" | ||
| 750 | Resistor="PullUp" | ||
| 751 | Mode="Input" | ||
| 752 | Alternate="0" /> | ||
| 753 | <pin10 | ||
| 754 | ID="" | ||
| 755 | Type="PushPull" | ||
| 756 | Level="High" | ||
| 757 | Speed="Maximum" | ||
| 758 | Resistor="PullUp" | ||
| 759 | Mode="Input" | ||
| 760 | Alternate="0" /> | ||
| 761 | <pin11 | ||
| 762 | ID="" | ||
| 763 | Type="PushPull" | ||
| 764 | Level="High" | ||
| 765 | Speed="Maximum" | ||
| 766 | Resistor="PullUp" | ||
| 767 | Mode="Input" | ||
| 768 | Alternate="0" /> | ||
| 769 | <pin12 | ||
| 770 | ID="" | ||
| 771 | Type="PushPull" | ||
| 772 | Level="High" | ||
| 773 | Speed="Maximum" | ||
| 774 | Resistor="PullUp" | ||
| 775 | Mode="Input" | ||
| 776 | Alternate="0" /> | ||
| 777 | <pin13 | ||
| 778 | ID="" | ||
| 779 | Type="PushPull" | ||
| 780 | Level="High" | ||
| 781 | Speed="Maximum" | ||
| 782 | Resistor="PullUp" | ||
| 783 | Mode="Input" | ||
| 784 | Alternate="0" /> | ||
| 785 | <pin14 | ||
| 786 | ID="" | ||
| 787 | Type="PushPull" | ||
| 788 | Level="High" | ||
| 789 | Speed="Maximum" | ||
| 790 | Resistor="PullUp" | ||
| 791 | Mode="Input" | ||
| 792 | Alternate="0" /> | ||
| 793 | <pin15 | ||
| 794 | ID="" | ||
| 795 | Type="PushPull" | ||
| 796 | Level="High" | ||
| 797 | Speed="Maximum" | ||
| 798 | Resistor="PullUp" | ||
| 799 | Mode="Input" | ||
| 800 | Alternate="0" /> | ||
| 801 | </GPIOF> | ||
| 802 | <GPIOG> | ||
| 803 | <pin0 | ||
| 804 | ID="" | ||
| 805 | Type="PushPull" | ||
| 806 | Level="High" | ||
| 807 | Speed="Maximum" | ||
| 808 | Resistor="PullUp" | ||
| 809 | Mode="Input" | ||
| 810 | Alternate="0" /> | ||
| 811 | <pin1 | ||
| 812 | ID="" | ||
| 813 | Type="PushPull" | ||
| 814 | Level="High" | ||
| 815 | Speed="Maximum" | ||
| 816 | Resistor="PullUp" | ||
| 817 | Mode="Input" | ||
| 818 | Alternate="0" /> | ||
| 819 | <pin2 | ||
| 820 | ID="" | ||
| 821 | Type="PushPull" | ||
| 822 | Level="High" | ||
| 823 | Speed="Maximum" | ||
| 824 | Resistor="PullUp" | ||
| 825 | Mode="Input" | ||
| 826 | Alternate="0" /> | ||
| 827 | <pin3 | ||
| 828 | ID="" | ||
| 829 | Type="PushPull" | ||
| 830 | Level="High" | ||
| 831 | Speed="Maximum" | ||
| 832 | Resistor="PullUp" | ||
| 833 | Mode="Input" | ||
| 834 | Alternate="0" /> | ||
| 835 | <pin4 | ||
| 836 | ID="" | ||
| 837 | Type="PushPull" | ||
| 838 | Level="High" | ||
| 839 | Speed="Maximum" | ||
| 840 | Resistor="PullUp" | ||
| 841 | Mode="Input" | ||
| 842 | Alternate="0" /> | ||
| 843 | <pin5 | ||
| 844 | ID="" | ||
| 845 | Type="PushPull" | ||
| 846 | Level="High" | ||
| 847 | Speed="Maximum" | ||
| 848 | Resistor="PullUp" | ||
| 849 | Mode="Input" | ||
| 850 | Alternate="0" /> | ||
| 851 | <pin6 | ||
| 852 | ID="" | ||
| 853 | Type="PushPull" | ||
| 854 | Level="High" | ||
| 855 | Speed="Maximum" | ||
| 856 | Resistor="PullUp" | ||
| 857 | Mode="Input" | ||
| 858 | Alternate="0" /> | ||
| 859 | <pin7 | ||
| 860 | ID="" | ||
| 861 | Type="PushPull" | ||
| 862 | Level="High" | ||
| 863 | Speed="Maximum" | ||
| 864 | Resistor="PullUp" | ||
| 865 | Mode="Input" | ||
| 866 | Alternate="0" /> | ||
| 867 | <pin8 | ||
| 868 | ID="" | ||
| 869 | Type="PushPull" | ||
| 870 | Level="High" | ||
| 871 | Speed="Maximum" | ||
| 872 | Resistor="PullUp" | ||
| 873 | Mode="Input" | ||
| 874 | Alternate="0" /> | ||
| 875 | <pin9 | ||
| 876 | ID="" | ||
| 877 | Type="PushPull" | ||
| 878 | Level="High" | ||
| 879 | Speed="Maximum" | ||
| 880 | Resistor="PullUp" | ||
| 881 | Mode="Input" | ||
| 882 | Alternate="0" /> | ||
| 883 | <pin10 | ||
| 884 | ID="" | ||
| 885 | Type="PushPull" | ||
| 886 | Level="High" | ||
| 887 | Speed="Maximum" | ||
| 888 | Resistor="PullUp" | ||
| 889 | Mode="Input" | ||
| 890 | Alternate="0" /> | ||
| 891 | <pin11 | ||
| 892 | ID="" | ||
| 893 | Type="PushPull" | ||
| 894 | Level="High" | ||
| 895 | Speed="Maximum" | ||
| 896 | Resistor="PullUp" | ||
| 897 | Mode="Input" | ||
| 898 | Alternate="0" /> | ||
| 899 | <pin12 | ||
| 900 | ID="" | ||
| 901 | Type="PushPull" | ||
| 902 | Level="High" | ||
| 903 | Speed="Maximum" | ||
| 904 | Resistor="PullUp" | ||
| 905 | Mode="Input" | ||
| 906 | Alternate="0" /> | ||
| 907 | <pin13 | ||
| 908 | ID="" | ||
| 909 | Type="PushPull" | ||
| 910 | Level="High" | ||
| 911 | Speed="Maximum" | ||
| 912 | Resistor="PullUp" | ||
| 913 | Mode="Input" | ||
| 914 | Alternate="0" /> | ||
| 915 | <pin14 | ||
| 916 | ID="" | ||
| 917 | Type="PushPull" | ||
| 918 | Level="High" | ||
| 919 | Speed="Maximum" | ||
| 920 | Resistor="PullUp" | ||
| 921 | Mode="Input" | ||
| 922 | Alternate="0" /> | ||
| 923 | <pin15 | ||
| 924 | ID="" | ||
| 925 | Type="PushPull" | ||
| 926 | Level="High" | ||
| 927 | Speed="Maximum" | ||
| 928 | Resistor="PullUp" | ||
| 929 | Mode="Input" | ||
| 930 | Alternate="0" /> | ||
| 931 | </GPIOG> | ||
| 932 | <GPIOH> | ||
| 933 | <pin0 | ||
| 934 | ID="OSC_IN" | ||
| 935 | Type="PushPull" | ||
| 936 | Level="High" | ||
| 937 | Speed="Maximum" | ||
| 938 | Resistor="Floating" | ||
| 939 | Mode="Input" | ||
| 940 | Alternate="0" /> | ||
| 941 | <pin1 | ||
| 942 | ID="OSC_OUT" | ||
| 943 | Type="PushPull" | ||
| 944 | Level="High" | ||
| 945 | Speed="Maximum" | ||
| 946 | Resistor="Floating" | ||
| 947 | Mode="Input" | ||
| 948 | Alternate="0" /> | ||
| 949 | <pin2 | ||
| 950 | ID="" | ||
| 951 | Type="PushPull" | ||
| 952 | Level="High" | ||
| 953 | Speed="Maximum" | ||
| 954 | Resistor="PullUp" | ||
| 955 | Mode="Input" | ||
| 956 | Alternate="0" /> | ||
| 957 | <pin3 | ||
| 958 | ID="" | ||
| 959 | Type="PushPull" | ||
| 960 | Level="High" | ||
| 961 | Speed="Maximum" | ||
| 962 | Resistor="PullUp" | ||
| 963 | Mode="Input" | ||
| 964 | Alternate="0" /> | ||
| 965 | <pin4 | ||
| 966 | ID="" | ||
| 967 | Type="PushPull" | ||
| 968 | Level="High" | ||
| 969 | Speed="Maximum" | ||
| 970 | Resistor="PullUp" | ||
| 971 | Mode="Input" | ||
| 972 | Alternate="0" /> | ||
| 973 | <pin5 | ||
| 974 | ID="" | ||
| 975 | Type="PushPull" | ||
| 976 | Level="High" | ||
| 977 | Speed="Maximum" | ||
| 978 | Resistor="PullUp" | ||
| 979 | Mode="Input" | ||
| 980 | Alternate="0" /> | ||
| 981 | <pin6 | ||
| 982 | ID="" | ||
| 983 | Type="PushPull" | ||
| 984 | Level="High" | ||
| 985 | Speed="Maximum" | ||
| 986 | Resistor="PullUp" | ||
| 987 | Mode="Input" | ||
| 988 | Alternate="0" /> | ||
| 989 | <pin7 | ||
| 990 | ID="" | ||
| 991 | Type="PushPull" | ||
| 992 | Level="High" | ||
| 993 | Speed="Maximum" | ||
| 994 | Resistor="PullUp" | ||
| 995 | Mode="Input" | ||
| 996 | Alternate="0" /> | ||
| 997 | <pin8 | ||
| 998 | ID="" | ||
| 999 | Type="PushPull" | ||
| 1000 | Level="High" | ||
| 1001 | Speed="Maximum" | ||
| 1002 | Resistor="PullUp" | ||
| 1003 | Mode="Input" | ||
| 1004 | Alternate="0" /> | ||
| 1005 | <pin9 | ||
| 1006 | ID="" | ||
| 1007 | Type="PushPull" | ||
| 1008 | Level="High" | ||
| 1009 | Speed="Maximum" | ||
| 1010 | Resistor="PullUp" | ||
| 1011 | Mode="Input" | ||
| 1012 | Alternate="0" /> | ||
| 1013 | <pin10 | ||
| 1014 | ID="" | ||
| 1015 | Type="PushPull" | ||
| 1016 | Level="High" | ||
| 1017 | Speed="Maximum" | ||
| 1018 | Resistor="PullUp" | ||
| 1019 | Mode="Input" | ||
| 1020 | Alternate="0" /> | ||
| 1021 | <pin11 | ||
| 1022 | ID="" | ||
| 1023 | Type="PushPull" | ||
| 1024 | Level="High" | ||
| 1025 | Speed="Maximum" | ||
| 1026 | Resistor="PullUp" | ||
| 1027 | Mode="Input" | ||
| 1028 | Alternate="0" /> | ||
| 1029 | <pin12 | ||
| 1030 | ID="" | ||
| 1031 | Type="PushPull" | ||
| 1032 | Level="High" | ||
| 1033 | Speed="Maximum" | ||
| 1034 | Resistor="PullUp" | ||
| 1035 | Mode="Input" | ||
| 1036 | Alternate="0" /> | ||
| 1037 | <pin13 | ||
| 1038 | ID="" | ||
| 1039 | Type="PushPull" | ||
| 1040 | Level="High" | ||
| 1041 | Speed="Maximum" | ||
| 1042 | Resistor="PullUp" | ||
| 1043 | Mode="Input" | ||
| 1044 | Alternate="0" /> | ||
| 1045 | <pin14 | ||
| 1046 | ID="" | ||
| 1047 | Type="PushPull" | ||
| 1048 | Level="High" | ||
| 1049 | Speed="Maximum" | ||
| 1050 | Resistor="PullUp" | ||
| 1051 | Mode="Input" | ||
| 1052 | Alternate="0" /> | ||
| 1053 | <pin15 | ||
| 1054 | ID="" | ||
| 1055 | Type="PushPull" | ||
| 1056 | Level="High" | ||
| 1057 | Speed="Maximum" | ||
| 1058 | Resistor="PullUp" | ||
| 1059 | Mode="Input" | ||
| 1060 | Alternate="0" /> | ||
| 1061 | </GPIOH> | ||
| 1062 | <GPIOI> | ||
| 1063 | <pin0 | ||
| 1064 | ID="" | ||
| 1065 | Type="PushPull" | ||
| 1066 | Level="High" | ||
| 1067 | Speed="Maximum" | ||
| 1068 | Resistor="PullUp" | ||
| 1069 | Mode="Input" | ||
| 1070 | Alternate="0" /> | ||
| 1071 | <pin1 | ||
| 1072 | ID="" | ||
| 1073 | Type="PushPull" | ||
| 1074 | Level="High" | ||
| 1075 | Speed="Maximum" | ||
| 1076 | Resistor="PullUp" | ||
| 1077 | Mode="Input" | ||
| 1078 | Alternate="0" /> | ||
| 1079 | <pin2 | ||
| 1080 | ID="" | ||
| 1081 | Type="PushPull" | ||
| 1082 | Level="High" | ||
| 1083 | Speed="Maximum" | ||
| 1084 | Resistor="PullUp" | ||
| 1085 | Mode="Input" | ||
| 1086 | Alternate="0" /> | ||
| 1087 | <pin3 | ||
| 1088 | ID="" | ||
| 1089 | Type="PushPull" | ||
| 1090 | Level="High" | ||
| 1091 | Speed="Maximum" | ||
| 1092 | Resistor="PullUp" | ||
| 1093 | Mode="Input" | ||
| 1094 | Alternate="0" /> | ||
| 1095 | <pin4 | ||
| 1096 | ID="" | ||
| 1097 | Type="PushPull" | ||
| 1098 | Level="High" | ||
| 1099 | Speed="Maximum" | ||
| 1100 | Resistor="PullUp" | ||
| 1101 | Mode="Input" | ||
| 1102 | Alternate="0" /> | ||
| 1103 | <pin5 | ||
| 1104 | ID="" | ||
| 1105 | Type="PushPull" | ||
| 1106 | Level="High" | ||
| 1107 | Speed="Maximum" | ||
| 1108 | Resistor="PullUp" | ||
| 1109 | Mode="Input" | ||
| 1110 | Alternate="0" /> | ||
| 1111 | <pin6 | ||
| 1112 | ID="" | ||
| 1113 | Type="PushPull" | ||
| 1114 | Level="High" | ||
| 1115 | Speed="Maximum" | ||
| 1116 | Resistor="PullUp" | ||
| 1117 | Mode="Input" | ||
| 1118 | Alternate="0" /> | ||
| 1119 | <pin7 | ||
| 1120 | ID="" | ||
| 1121 | Type="PushPull" | ||
| 1122 | Level="High" | ||
| 1123 | Speed="Maximum" | ||
| 1124 | Resistor="PullUp" | ||
| 1125 | Mode="Input" | ||
| 1126 | Alternate="0" /> | ||
| 1127 | <pin8 | ||
| 1128 | ID="" | ||
| 1129 | Type="PushPull" | ||
| 1130 | Level="High" | ||
| 1131 | Speed="Maximum" | ||
| 1132 | Resistor="PullUp" | ||
| 1133 | Mode="Input" | ||
| 1134 | Alternate="0" /> | ||
| 1135 | <pin9 | ||
| 1136 | ID="" | ||
| 1137 | Type="PushPull" | ||
| 1138 | Level="High" | ||
| 1139 | Speed="Maximum" | ||
| 1140 | Resistor="PullUp" | ||
| 1141 | Mode="Input" | ||
| 1142 | Alternate="0" /> | ||
| 1143 | <pin10 | ||
| 1144 | ID="" | ||
| 1145 | Type="PushPull" | ||
| 1146 | Level="High" | ||
| 1147 | Speed="Maximum" | ||
| 1148 | Resistor="PullUp" | ||
| 1149 | Mode="Input" | ||
| 1150 | Alternate="0" /> | ||
| 1151 | <pin11 | ||
| 1152 | ID="" | ||
| 1153 | Type="PushPull" | ||
| 1154 | Level="High" | ||
| 1155 | Speed="Maximum" | ||
| 1156 | Resistor="PullUp" | ||
| 1157 | Mode="Input" | ||
| 1158 | Alternate="0" /> | ||
| 1159 | <pin12 | ||
| 1160 | ID="" | ||
| 1161 | Type="PushPull" | ||
| 1162 | Level="High" | ||
| 1163 | Speed="Maximum" | ||
| 1164 | Resistor="PullUp" | ||
| 1165 | Mode="Input" | ||
| 1166 | Alternate="0" /> | ||
| 1167 | <pin13 | ||
| 1168 | ID="" | ||
| 1169 | Type="PushPull" | ||
| 1170 | Level="High" | ||
| 1171 | Speed="Maximum" | ||
| 1172 | Resistor="PullUp" | ||
| 1173 | Mode="Input" | ||
| 1174 | Alternate="0" /> | ||
| 1175 | <pin14 | ||
| 1176 | ID="" | ||
| 1177 | Type="PushPull" | ||
| 1178 | Level="High" | ||
| 1179 | Speed="Maximum" | ||
| 1180 | Resistor="PullUp" | ||
| 1181 | Mode="Input" | ||
| 1182 | Alternate="0" /> | ||
| 1183 | <pin15 | ||
| 1184 | ID="" | ||
| 1185 | Type="PushPull" | ||
| 1186 | Level="High" | ||
| 1187 | Speed="Maximum" | ||
| 1188 | Resistor="PullUp" | ||
| 1189 | Mode="Input" | ||
| 1190 | Alternate="0" /> | ||
| 1191 | </GPIOI> | ||
| 1192 | </ports> | ||
| 1193 | </board> | ||
diff --git a/drivers/boards/BLACKPILL_STM32_F401/cfg/board.fmpp b/drivers/boards/BLACKPILL_STM32_F401/cfg/board.fmpp new file mode 100644 index 000000000..41754c141 --- /dev/null +++ b/drivers/boards/BLACKPILL_STM32_F401/cfg/board.fmpp | |||
| @@ -0,0 +1,15 @@ | |||
| 1 | sourceRoot: ../../../../../tools/ftl/processors/boards/stm32f4xx/templates | ||
| 2 | outputRoot: .. | ||
| 3 | dataRoot: . | ||
| 4 | |||
| 5 | freemarkerLinks: { | ||
| 6 | lib: ../../../../../tools/ftl/libs | ||
| 7 | } | ||
| 8 | |||
| 9 | data : { | ||
| 10 | doc1:xml ( | ||
| 11 | board.chcfg | ||
| 12 | { | ||
| 13 | } | ||
| 14 | ) | ||
| 15 | } | ||
diff --git a/drivers/boards/BLACKPILL_STM32_F411/board.c b/drivers/boards/BLACKPILL_STM32_F411/board.c new file mode 100644 index 000000000..a06b52d14 --- /dev/null +++ b/drivers/boards/BLACKPILL_STM32_F411/board.c | |||
| @@ -0,0 +1,269 @@ | |||
| 1 | /* | ||
| 2 | ChibiOS - Copyright (C) 2006..2018 Giovanni Di Sirio | ||
| 3 | |||
| 4 | Licensed under the Apache License, Version 2.0 (the "License"); | ||
| 5 | you may not use this file except in compliance with the License. | ||
| 6 | You may obtain a copy of the License at | ||
| 7 | |||
| 8 | http://www.apache.org/licenses/LICENSE-2.0 | ||
| 9 | |||
| 10 | Unless required by applicable law or agreed to in writing, software | ||
| 11 | distributed under the License is distributed on an "AS IS" BASIS, | ||
| 12 | WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. | ||
| 13 | See the License for the specific language governing permissions and | ||
| 14 | limitations under the License. | ||
| 15 | */ | ||
| 16 | |||
| 17 | /* | ||
| 18 | * This file has been automatically generated using ChibiStudio board | ||
| 19 | * generator plugin. Do not edit manually. | ||
| 20 | */ | ||
| 21 | |||
| 22 | #include "hal.h" | ||
| 23 | #include "stm32_gpio.h" | ||
| 24 | |||
| 25 | /*===========================================================================*/ | ||
| 26 | /* Driver local definitions. */ | ||
| 27 | /*===========================================================================*/ | ||
| 28 | |||
| 29 | /*===========================================================================*/ | ||
| 30 | /* Driver exported variables. */ | ||
| 31 | /*===========================================================================*/ | ||
| 32 | |||
| 33 | /*===========================================================================*/ | ||
| 34 | /* Driver local variables and types. */ | ||
| 35 | /*===========================================================================*/ | ||
| 36 | |||
| 37 | /** | ||
| 38 | * @brief Type of STM32 GPIO port setup. | ||
| 39 | */ | ||
| 40 | typedef struct { | ||
| 41 | uint32_t moder; | ||
| 42 | uint32_t otyper; | ||
| 43 | uint32_t ospeedr; | ||
| 44 | uint32_t pupdr; | ||
| 45 | uint32_t odr; | ||
| 46 | uint32_t afrl; | ||
| 47 | uint32_t afrh; | ||
| 48 | } gpio_setup_t; | ||
| 49 | |||
| 50 | /** | ||
| 51 | * @brief Type of STM32 GPIO initialization data. | ||
| 52 | */ | ||
| 53 | typedef struct { | ||
| 54 | #if STM32_HAS_GPIOA || defined(__DOXYGEN__) | ||
| 55 | gpio_setup_t PAData; | ||
| 56 | #endif | ||
| 57 | #if STM32_HAS_GPIOB || defined(__DOXYGEN__) | ||
| 58 | gpio_setup_t PBData; | ||
| 59 | #endif | ||
| 60 | #if STM32_HAS_GPIOC || defined(__DOXYGEN__) | ||
| 61 | gpio_setup_t PCData; | ||
| 62 | #endif | ||
| 63 | #if STM32_HAS_GPIOD || defined(__DOXYGEN__) | ||
| 64 | gpio_setup_t PDData; | ||
| 65 | #endif | ||
| 66 | #if STM32_HAS_GPIOE || defined(__DOXYGEN__) | ||
| 67 | gpio_setup_t PEData; | ||
| 68 | #endif | ||
| 69 | #if STM32_HAS_GPIOF || defined(__DOXYGEN__) | ||
| 70 | gpio_setup_t PFData; | ||
| 71 | #endif | ||
| 72 | #if STM32_HAS_GPIOG || defined(__DOXYGEN__) | ||
| 73 | gpio_setup_t PGData; | ||
| 74 | #endif | ||
| 75 | #if STM32_HAS_GPIOH || defined(__DOXYGEN__) | ||
| 76 | gpio_setup_t PHData; | ||
| 77 | #endif | ||
| 78 | #if STM32_HAS_GPIOI || defined(__DOXYGEN__) | ||
| 79 | gpio_setup_t PIData; | ||
| 80 | #endif | ||
| 81 | #if STM32_HAS_GPIOJ || defined(__DOXYGEN__) | ||
| 82 | gpio_setup_t PJData; | ||
| 83 | #endif | ||
| 84 | #if STM32_HAS_GPIOK || defined(__DOXYGEN__) | ||
| 85 | gpio_setup_t PKData; | ||
| 86 | #endif | ||
| 87 | } gpio_config_t; | ||
| 88 | |||
| 89 | /** | ||
| 90 | * @brief STM32 GPIO static initialization data. | ||
| 91 | */ | ||
| 92 | static const gpio_config_t gpio_default_config = { | ||
| 93 | #if STM32_HAS_GPIOA | ||
| 94 | {VAL_GPIOA_MODER, VAL_GPIOA_OTYPER, VAL_GPIOA_OSPEEDR, VAL_GPIOA_PUPDR, | ||
| 95 | VAL_GPIOA_ODR, VAL_GPIOA_AFRL, VAL_GPIOA_AFRH}, | ||
| 96 | #endif | ||
| 97 | #if STM32_HAS_GPIOB | ||
| 98 | {VAL_GPIOB_MODER, VAL_GPIOB_OTYPER, VAL_GPIOB_OSPEEDR, VAL_GPIOB_PUPDR, | ||
| 99 | VAL_GPIOB_ODR, VAL_GPIOB_AFRL, VAL_GPIOB_AFRH}, | ||
| 100 | #endif | ||
| 101 | #if STM32_HAS_GPIOC | ||
| 102 | {VAL_GPIOC_MODER, VAL_GPIOC_OTYPER, VAL_GPIOC_OSPEEDR, VAL_GPIOC_PUPDR, | ||
| 103 | VAL_GPIOC_ODR, VAL_GPIOC_AFRL, VAL_GPIOC_AFRH}, | ||
| 104 | #endif | ||
| 105 | #if STM32_HAS_GPIOD | ||
| 106 | {VAL_GPIOD_MODER, VAL_GPIOD_OTYPER, VAL_GPIOD_OSPEEDR, VAL_GPIOD_PUPDR, | ||
| 107 | VAL_GPIOD_ODR, VAL_GPIOD_AFRL, VAL_GPIOD_AFRH}, | ||
| 108 | #endif | ||
| 109 | #if STM32_HAS_GPIOE | ||
| 110 | {VAL_GPIOE_MODER, VAL_GPIOE_OTYPER, VAL_GPIOE_OSPEEDR, VAL_GPIOE_PUPDR, | ||
| 111 | VAL_GPIOE_ODR, VAL_GPIOE_AFRL, VAL_GPIOE_AFRH}, | ||
| 112 | #endif | ||
| 113 | #if STM32_HAS_GPIOF | ||
| 114 | {VAL_GPIOF_MODER, VAL_GPIOF_OTYPER, VAL_GPIOF_OSPEEDR, VAL_GPIOF_PUPDR, | ||
| 115 | VAL_GPIOF_ODR, VAL_GPIOF_AFRL, VAL_GPIOF_AFRH}, | ||
| 116 | #endif | ||
| 117 | #if STM32_HAS_GPIOG | ||
| 118 | {VAL_GPIOG_MODER, VAL_GPIOG_OTYPER, VAL_GPIOG_OSPEEDR, VAL_GPIOG_PUPDR, | ||
| 119 | VAL_GPIOG_ODR, VAL_GPIOG_AFRL, VAL_GPIOG_AFRH}, | ||
| 120 | #endif | ||
| 121 | #if STM32_HAS_GPIOH | ||
| 122 | {VAL_GPIOH_MODER, VAL_GPIOH_OTYPER, VAL_GPIOH_OSPEEDR, VAL_GPIOH_PUPDR, | ||
| 123 | VAL_GPIOH_ODR, VAL_GPIOH_AFRL, VAL_GPIOH_AFRH}, | ||
| 124 | #endif | ||
| 125 | #if STM32_HAS_GPIOI | ||
| 126 | {VAL_GPIOI_MODER, VAL_GPIOI_OTYPER, VAL_GPIOI_OSPEEDR, VAL_GPIOI_PUPDR, | ||
| 127 | VAL_GPIOI_ODR, VAL_GPIOI_AFRL, VAL_GPIOI_AFRH}, | ||
| 128 | #endif | ||
| 129 | #if STM32_HAS_GPIOJ | ||
| 130 | {VAL_GPIOJ_MODER, VAL_GPIOJ_OTYPER, VAL_GPIOJ_OSPEEDR, VAL_GPIOJ_PUPDR, | ||
| 131 | VAL_GPIOJ_ODR, VAL_GPIOJ_AFRL, VAL_GPIOJ_AFRH}, | ||
| 132 | #endif | ||
| 133 | #if STM32_HAS_GPIOK | ||
| 134 | {VAL_GPIOK_MODER, VAL_GPIOK_OTYPER, VAL_GPIOK_OSPEEDR, VAL_GPIOK_PUPDR, | ||
| 135 | VAL_GPIOK_ODR, VAL_GPIOK_AFRL, VAL_GPIOK_AFRH} | ||
| 136 | #endif | ||
| 137 | }; | ||
| 138 | |||
| 139 | /*===========================================================================*/ | ||
| 140 | /* Driver local functions. */ | ||
| 141 | /*===========================================================================*/ | ||
| 142 | |||
| 143 | static void gpio_init(stm32_gpio_t *gpiop, const gpio_setup_t *config) { | ||
| 144 | |||
| 145 | gpiop->OTYPER = config->otyper; | ||
| 146 | gpiop->OSPEEDR = config->ospeedr; | ||
| 147 | gpiop->PUPDR = config->pupdr; | ||
| 148 | gpiop->ODR = config->odr; | ||
| 149 | gpiop->AFRL = config->afrl; | ||
| 150 | gpiop->AFRH = config->afrh; | ||
| 151 | gpiop->MODER = config->moder; | ||
| 152 | } | ||
| 153 | |||
| 154 | static void stm32_gpio_init(void) { | ||
| 155 | |||
| 156 | /* Enabling GPIO-related clocks, the mask comes from the | ||
| 157 | registry header file.*/ | ||
| 158 | rccResetAHB1(STM32_GPIO_EN_MASK); | ||
| 159 | rccEnableAHB1(STM32_GPIO_EN_MASK, true); | ||
| 160 | |||
| 161 | /* Initializing all the defined GPIO ports.*/ | ||
| 162 | #if STM32_HAS_GPIOA | ||
| 163 | gpio_init(GPIOA, &gpio_default_config.PAData); | ||
| 164 | #endif | ||
| 165 | #if STM32_HAS_GPIOB | ||
| 166 | gpio_init(GPIOB, &gpio_default_config.PBData); | ||
| 167 | #endif | ||
| 168 | #if STM32_HAS_GPIOC | ||
| 169 | gpio_init(GPIOC, &gpio_default_config.PCData); | ||
| 170 | #endif | ||
| 171 | #if STM32_HAS_GPIOD | ||
| 172 | gpio_init(GPIOD, &gpio_default_config.PDData); | ||
| 173 | #endif | ||
| 174 | #if STM32_HAS_GPIOE | ||
| 175 | gpio_init(GPIOE, &gpio_default_config.PEData); | ||
| 176 | #endif | ||
| 177 | #if STM32_HAS_GPIOF | ||
| 178 | gpio_init(GPIOF, &gpio_default_config.PFData); | ||
| 179 | #endif | ||
| 180 | #if STM32_HAS_GPIOG | ||
| 181 | gpio_init(GPIOG, &gpio_default_config.PGData); | ||
| 182 | #endif | ||
| 183 | #if STM32_HAS_GPIOH | ||
| 184 | gpio_init(GPIOH, &gpio_default_config.PHData); | ||
| 185 | #endif | ||
| 186 | #if STM32_HAS_GPIOI | ||
| 187 | gpio_init(GPIOI, &gpio_default_config.PIData); | ||
| 188 | #endif | ||
| 189 | #if STM32_HAS_GPIOJ | ||
| 190 | gpio_init(GPIOJ, &gpio_default_config.PJData); | ||
| 191 | #endif | ||
| 192 | #if STM32_HAS_GPIOK | ||
| 193 | gpio_init(GPIOK, &gpio_default_config.PKData); | ||
| 194 | #endif | ||
| 195 | } | ||
| 196 | |||
| 197 | /*===========================================================================*/ | ||
| 198 | /* Driver interrupt handlers. */ | ||
| 199 | /*===========================================================================*/ | ||
| 200 | |||
| 201 | /*===========================================================================*/ | ||
| 202 | /* Driver exported functions. */ | ||
| 203 | /*===========================================================================*/ | ||
| 204 | |||
| 205 | __attribute__((weak)) void enter_bootloader_mode_if_requested(void) {} | ||
| 206 | |||
| 207 | /** | ||
| 208 | * @brief Early initialization code. | ||
| 209 | * @details GPIO ports and system clocks are initialized before everything | ||
| 210 | * else. | ||
| 211 | */ | ||
| 212 | void __early_init(void) { | ||
| 213 | enter_bootloader_mode_if_requested(); | ||
| 214 | |||
| 215 | stm32_gpio_init(); | ||
| 216 | stm32_clock_init(); | ||
| 217 | } | ||
| 218 | |||
| 219 | #if HAL_USE_SDC || defined(__DOXYGEN__) | ||
| 220 | /** | ||
| 221 | * @brief SDC card detection. | ||
| 222 | */ | ||
| 223 | bool sdc_lld_is_card_inserted(SDCDriver *sdcp) { | ||
| 224 | |||
| 225 | (void)sdcp; | ||
| 226 | /* TODO: Fill the implementation.*/ | ||
| 227 | return true; | ||
| 228 | } | ||
| 229 | |||
| 230 | /** | ||
| 231 | * @brief SDC card write protection detection. | ||
| 232 | */ | ||
| 233 | bool sdc_lld_is_write_protected(SDCDriver *sdcp) { | ||
| 234 | |||
| 235 | (void)sdcp; | ||
| 236 | /* TODO: Fill the implementation.*/ | ||
| 237 | return false; | ||
| 238 | } | ||
| 239 | #endif /* HAL_USE_SDC */ | ||
| 240 | |||
| 241 | #if HAL_USE_MMC_SPI || defined(__DOXYGEN__) | ||
| 242 | /** | ||
| 243 | * @brief MMC_SPI card detection. | ||
| 244 | */ | ||
| 245 | bool mmc_lld_is_card_inserted(MMCDriver *mmcp) { | ||
| 246 | |||
| 247 | (void)mmcp; | ||
| 248 | /* TODO: Fill the implementation.*/ | ||
| 249 | return true; | ||
| 250 | } | ||
| 251 | |||
| 252 | /** | ||
| 253 | * @brief MMC_SPI card write protection detection. | ||
| 254 | */ | ||
| 255 | bool mmc_lld_is_write_protected(MMCDriver *mmcp) { | ||
| 256 | |||
| 257 | (void)mmcp; | ||
| 258 | /* TODO: Fill the implementation.*/ | ||
| 259 | return false; | ||
| 260 | } | ||
| 261 | #endif | ||
| 262 | |||
| 263 | /** | ||
| 264 | * @brief Board-specific initialization code. | ||
| 265 | * @todo Add your board-specific code, if any. | ||
| 266 | */ | ||
| 267 | void boardInit(void) { | ||
| 268 | |||
| 269 | } | ||
diff --git a/drivers/boards/BLACKPILL_STM32_F411/board.h b/drivers/boards/BLACKPILL_STM32_F411/board.h new file mode 100644 index 000000000..f6a527a37 --- /dev/null +++ b/drivers/boards/BLACKPILL_STM32_F411/board.h | |||
| @@ -0,0 +1,1384 @@ | |||
| 1 | /* | ||
| 2 | ChibiOS - Copyright (C) 2006..2018 Giovanni Di Sirio | ||
| 3 | |||
| 4 | Licensed under the Apache License, Version 2.0 (the "License"); | ||
| 5 | you may not use this file except in compliance with the License. | ||
| 6 | You may obtain a copy of the License at | ||
| 7 | |||
| 8 | http://www.apache.org/licenses/LICENSE-2.0 | ||
| 9 | |||
| 10 | Unless required by applicable law or agreed to in writing, software | ||
| 11 | distributed under the License is distributed on an "AS IS" BASIS, | ||
| 12 | WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. | ||
| 13 | See the License for the specific language governing permissions and | ||
| 14 | limitations under the License. | ||
| 15 | */ | ||
| 16 | |||
| 17 | /* | ||
| 18 | * This file has been automatically generated using ChibiStudio board | ||
| 19 | * generator plugin. Do not edit manually. | ||
| 20 | */ | ||
| 21 | |||
| 22 | #ifndef BOARD_H | ||
| 23 | #define BOARD_H | ||
| 24 | |||
| 25 | /*===========================================================================*/ | ||
| 26 | /* Driver constants. */ | ||
| 27 | /*===========================================================================*/ | ||
| 28 | |||
| 29 | /* | ||
| 30 | * Setup for STM32F411CEU6 black pill board. | ||
| 31 | */ | ||
| 32 | |||
| 33 | /* | ||
| 34 | * Board identifier. | ||
| 35 | */ | ||
| 36 | #define BOARD_BLACKPILL_STM32_F411 | ||
| 37 | #define BOARD_NAME "STM32F411CEU6 blackpill" | ||
| 38 | |||
| 39 | /* | ||
| 40 | * Allow Board to boot USB without extra A9 hardware/software config | ||
| 41 | */ | ||
| 42 | #define BOARD_OTG_NOVBUSSENS 1 | ||
| 43 | |||
| 44 | /* | ||
| 45 | * Board oscillators-related settings. | ||
| 46 | */ | ||
| 47 | #if !defined(STM32_LSECLK) | ||
| 48 | #define STM32_LSECLK 32768U | ||
| 49 | #endif | ||
| 50 | |||
| 51 | #if !defined(STM32_HSECLK) | ||
| 52 | #define STM32_HSECLK 25000000U | ||
| 53 | #endif | ||
| 54 | |||
| 55 | //#define STM32_HSE_BYPASS | ||
| 56 | |||
| 57 | /* | ||
| 58 | * Board voltages. | ||
| 59 | * Required for performance limits calculation. | ||
| 60 | */ | ||
| 61 | #define STM32_VDD 300U | ||
| 62 | |||
| 63 | /* | ||
| 64 | * MCU type as defined in the ST header. | ||
| 65 | */ | ||
| 66 | #define STM32F411xE | ||
| 67 | |||
| 68 | /* | ||
| 69 | * IO pins assignments. | ||
| 70 | */ | ||
| 71 | #define GPIOA_ARD_A0 0U | ||
| 72 | #define GPIOA_ADC1_IN0 0U | ||
| 73 | #define GPIOA_ARD_A1 1U | ||
| 74 | #define GPIOA_ADC1_IN1 1U | ||
| 75 | #define GPIOA_ARD_D1 2U | ||
| 76 | #define GPIOA_USART2_TX 2U | ||
| 77 | #define GPIOA_ARD_D0 3U | ||
| 78 | #define GPIOA_USART2_RX 3U | ||
| 79 | #define GPIOA_ARD_A2 4U | ||
| 80 | #define GPIOA_ADC1_IN4 4U | ||
| 81 | #define GPIOA_LED_GREEN 5U | ||
| 82 | #define GPIOA_ARD_D13 5U | ||
| 83 | #define GPIOA_ARD_D12 6U | ||
| 84 | #define GPIOA_ARD_D11 7U | ||
| 85 | #define GPIOA_ARD_D7 8U | ||
| 86 | #define GPIOA_ARD_D8 9U | ||
| 87 | #define GPIOA_ARD_D2 10U | ||
| 88 | #define GPIOA_OTG_FS_DM 11U | ||
| 89 | #define GPIOA_OTG_FS_DP 12U | ||
| 90 | #define GPIOA_SWDIO 13U | ||
| 91 | #define GPIOA_SWCLK 14U | ||
| 92 | #define GPIOA_PIN15 15U | ||
| 93 | |||
| 94 | #define GPIOB_ARD_A3 0U | ||
| 95 | #define GPIOB_ADC1_IN8 0U | ||
| 96 | #define GPIOB_PIN1 1U | ||
| 97 | #define GPIOB_PIN2 2U | ||
| 98 | #define GPIOB_SWO 3U | ||
| 99 | #define GPIOB_ARD_D3 3U | ||
| 100 | #define GPIOB_ARD_D5 4U | ||
| 101 | #define GPIOB_ARD_D4 5U | ||
| 102 | #define GPIOB_ARD_D10 6U | ||
| 103 | #define GPIOB_PIN7 7U | ||
| 104 | #define GPIOB_ARD_D15 8U | ||
| 105 | #define GPIOB_ARD_D14 9U | ||
| 106 | #define GPIOB_ARD_D6 10U | ||
| 107 | #define GPIOB_PIN11 11U | ||
| 108 | #define GPIOB_PIN12 12U | ||
| 109 | #define GPIOB_PIN13 13U | ||
| 110 | #define GPIOB_PIN14 14U | ||
| 111 | #define GPIOB_PIN15 15U | ||
| 112 | |||
| 113 | #define GPIOC_ARD_A5 0U | ||
| 114 | #define GPIOC_ADC1_IN10 0U | ||
| 115 | #define GPIOC_ARD_A4 1U | ||
| 116 | #define GPIOC_ADC1_IN11 1U | ||
| 117 | #define GPIOC_PIN2 2U | ||
| 118 | #define GPIOC_PIN3 3U | ||
| 119 | #define GPIOC_PIN4 4U | ||
| 120 | #define GPIOC_PIN5 5U | ||
| 121 | #define GPIOC_PIN6 6U | ||
| 122 | #define GPIOC_ARD_D9 7U | ||
| 123 | #define GPIOC_PIN8 8U | ||
| 124 | #define GPIOC_PIN9 9U | ||
| 125 | #define GPIOC_PIN10 10U | ||
| 126 | #define GPIOC_PIN11 11U | ||
| 127 | #define GPIOC_PIN12 12U | ||
| 128 | #define GPIOC_BUTTON 13U | ||
| 129 | #define GPIOC_OSC32_IN 14U | ||
| 130 | #define GPIOC_OSC32_OUT 15U | ||
| 131 | |||
| 132 | #define GPIOD_PIN0 0U | ||
| 133 | #define GPIOD_PIN1 1U | ||
| 134 | #define GPIOD_PIN2 2U | ||
| 135 | #define GPIOD_PIN3 3U | ||
| 136 | #define GPIOD_PIN4 4U | ||
| 137 | #define GPIOD_PIN5 5U | ||
| 138 | #define GPIOD_PIN6 6U | ||
| 139 | #define GPIOD_PIN7 7U | ||
| 140 | #define GPIOD_PIN8 8U | ||
| 141 | #define GPIOD_PIN9 9U | ||
| 142 | #define GPIOD_PIN10 10U | ||
| 143 | #define GPIOD_PIN11 11U | ||
| 144 | #define GPIOD_PIN12 12U | ||
| 145 | #define GPIOD_PIN13 13U | ||
| 146 | #define GPIOD_PIN14 14U | ||
| 147 | #define GPIOD_PIN15 15U | ||
| 148 | |||
| 149 | #define GPIOE_PIN0 0U | ||
| 150 | #define GPIOE_PIN1 1U | ||
| 151 | #define GPIOE_PIN2 2U | ||
| 152 | #define GPIOE_PIN3 3U | ||
| 153 | #define GPIOE_PIN4 4U | ||
| 154 | #define GPIOE_PIN5 5U | ||
| 155 | #define GPIOE_PIN6 6U | ||
| 156 | #define GPIOE_PIN7 7U | ||
| 157 | #define GPIOE_PIN8 8U | ||
| 158 | #define GPIOE_PIN9 9U | ||
| 159 | #define GPIOE_PIN10 10U | ||
| 160 | #define GPIOE_PIN11 11U | ||
| 161 | #define GPIOE_PIN12 12U | ||
| 162 | #define GPIOE_PIN13 13U | ||
| 163 | #define GPIOE_PIN14 14U | ||
| 164 | #define GPIOE_PIN15 15U | ||
| 165 | |||
| 166 | #define GPIOF_PIN0 0U | ||
| 167 | #define GPIOF_PIN1 1U | ||
| 168 | #define GPIOF_PIN2 2U | ||
| 169 | #define GPIOF_PIN3 3U | ||
| 170 | #define GPIOF_PIN4 4U | ||
| 171 | #define GPIOF_PIN5 5U | ||
| 172 | #define GPIOF_PIN6 6U | ||
| 173 | #define GPIOF_PIN7 7U | ||
| 174 | #define GPIOF_PIN8 8U | ||
| 175 | #define GPIOF_PIN9 9U | ||
| 176 | #define GPIOF_PIN10 10U | ||
| 177 | #define GPIOF_PIN11 11U | ||
| 178 | #define GPIOF_PIN12 12U | ||
| 179 | #define GPIOF_PIN13 13U | ||
| 180 | #define GPIOF_PIN14 14U | ||
| 181 | #define GPIOF_PIN15 15U | ||
| 182 | |||
| 183 | #define GPIOG_PIN0 0U | ||
| 184 | #define GPIOG_PIN1 1U | ||
| 185 | #define GPIOG_PIN2 2U | ||
| 186 | #define GPIOG_PIN3 3U | ||
| 187 | #define GPIOG_PIN4 4U | ||
| 188 | #define GPIOG_PIN5 5U | ||
| 189 | #define GPIOG_PIN6 6U | ||
| 190 | #define GPIOG_PIN7 7U | ||
| 191 | #define GPIOG_PIN8 8U | ||
| 192 | #define GPIOG_PIN9 9U | ||
| 193 | #define GPIOG_PIN10 10U | ||
| 194 | #define GPIOG_PIN11 11U | ||
| 195 | #define GPIOG_PIN12 12U | ||
| 196 | #define GPIOG_PIN13 13U | ||
| 197 | #define GPIOG_PIN14 14U | ||
| 198 | #define GPIOG_PIN15 15U | ||
| 199 | |||
| 200 | #define GPIOH_OSC_IN 0U | ||
| 201 | #define GPIOH_OSC_OUT 1U | ||
| 202 | #define GPIOH_PIN2 2U | ||
| 203 | #define GPIOH_PIN3 3U | ||
| 204 | #define GPIOH_PIN4 4U | ||
| 205 | #define GPIOH_PIN5 5U | ||
| 206 | #define GPIOH_PIN6 6U | ||
| 207 | #define GPIOH_PIN7 7U | ||
| 208 | #define GPIOH_PIN8 8U | ||
| 209 | #define GPIOH_PIN9 9U | ||
| 210 | #define GPIOH_PIN10 10U | ||
| 211 | #define GPIOH_PIN11 11U | ||
| 212 | #define GPIOH_PIN12 12U | ||
| 213 | #define GPIOH_PIN13 13U | ||
| 214 | #define GPIOH_PIN14 14U | ||
| 215 | #define GPIOH_PIN15 15U | ||
| 216 | |||
| 217 | #define GPIOI_PIN0 0U | ||
| 218 | #define GPIOI_PIN1 1U | ||
| 219 | #define GPIOI_PIN2 2U | ||
| 220 | #define GPIOI_PIN3 3U | ||
| 221 | #define GPIOI_PIN4 4U | ||
| 222 | #define GPIOI_PIN5 5U | ||
| 223 | #define GPIOI_PIN6 6U | ||
| 224 | #define GPIOI_PIN7 7U | ||
| 225 | #define GPIOI_PIN8 8U | ||
| 226 | #define GPIOI_PIN9 9U | ||
| 227 | #define GPIOI_PIN10 10U | ||
| 228 | #define GPIOI_PIN11 11U | ||
| 229 | #define GPIOI_PIN12 12U | ||
| 230 | #define GPIOI_PIN13 13U | ||
| 231 | #define GPIOI_PIN14 14U | ||
| 232 | #define GPIOI_PIN15 15U | ||
| 233 | |||
| 234 | /* | ||
| 235 | * IO lines assignments. | ||
| 236 | */ | ||
| 237 | #define LINE_ARD_A0 PAL_LINE(GPIOA, 0U) | ||
| 238 | #define LINE_ADC1_IN0 PAL_LINE(GPIOA, 0U) | ||
| 239 | #define LINE_ARD_A1 PAL_LINE(GPIOA, 1U) | ||
| 240 | #define LINE_ADC1_IN1 PAL_LINE(GPIOA, 1U) | ||
| 241 | #define LINE_ARD_D1 PAL_LINE(GPIOA, 2U) | ||
| 242 | #define LINE_USART2_TX PAL_LINE(GPIOA, 2U) | ||
| 243 | #define LINE_ARD_D0 PAL_LINE(GPIOA, 3U) | ||
| 244 | #define LINE_USART2_RX PAL_LINE(GPIOA, 3U) | ||
| 245 | #define LINE_ARD_A2 PAL_LINE(GPIOA, 4U) | ||
| 246 | #define LINE_ADC1_IN4 PAL_LINE(GPIOA, 4U) | ||
| 247 | #define LINE_LED_GREEN PAL_LINE(GPIOA, 5U) | ||
| 248 | #define LINE_ARD_D13 PAL_LINE(GPIOA, 5U) | ||
| 249 | #define LINE_ARD_D12 PAL_LINE(GPIOA, 6U) | ||
| 250 | #define LINE_ARD_D11 PAL_LINE(GPIOA, 7U) | ||
| 251 | #define LINE_ARD_D7 PAL_LINE(GPIOA, 8U) | ||
| 252 | #define LINE_ARD_D8 PAL_LINE(GPIOA, 9U) | ||
| 253 | #define LINE_ARD_D2 PAL_LINE(GPIOA, 10U) | ||
| 254 | #define LINE_OTG_FS_DM PAL_LINE(GPIOA, 11U) | ||
| 255 | #define LINE_OTG_FS_DP PAL_LINE(GPIOA, 12U) | ||
| 256 | #define LINE_SWDIO PAL_LINE(GPIOA, 13U) | ||
| 257 | #define LINE_SWCLK PAL_LINE(GPIOA, 14U) | ||
| 258 | #define LINE_ARD_A3 PAL_LINE(GPIOB, 0U) | ||
| 259 | #define LINE_ADC1_IN8 PAL_LINE(GPIOB, 0U) | ||
| 260 | #define LINE_SWO PAL_LINE(GPIOB, 3U) | ||
| 261 | #define LINE_ARD_D3 PAL_LINE(GPIOB, 3U) | ||
| 262 | #define LINE_ARD_D5 PAL_LINE(GPIOB, 4U) | ||
| 263 | #define LINE_ARD_D4 PAL_LINE(GPIOB, 5U) | ||
| 264 | #define LINE_ARD_D10 PAL_LINE(GPIOB, 6U) | ||
| 265 | #define LINE_ARD_D15 PAL_LINE(GPIOB, 8U) | ||
| 266 | #define LINE_ARD_D14 PAL_LINE(GPIOB, 9U) | ||
| 267 | #define LINE_ARD_D6 PAL_LINE(GPIOB, 10U) | ||
| 268 | #define LINE_ARD_A5 PAL_LINE(GPIOC, 0U) | ||
| 269 | #define LINE_ADC1_IN10 PAL_LINE(GPIOC, 0U) | ||
| 270 | #define LINE_ARD_A4 PAL_LINE(GPIOC, 1U) | ||
| 271 | #define LINE_ADC1_IN11 PAL_LINE(GPIOC, 1U) | ||
| 272 | #define LINE_ARD_D9 PAL_LINE(GPIOC, 7U) | ||
| 273 | #define LINE_BUTTON PAL_LINE(GPIOC, 13U) | ||
| 274 | #define LINE_OSC32_IN PAL_LINE(GPIOC, 14U) | ||
| 275 | #define LINE_OSC32_OUT PAL_LINE(GPIOC, 15U) | ||
| 276 | #define LINE_OSC_IN PAL_LINE(GPIOH, 0U) | ||
| 277 | #define LINE_OSC_OUT PAL_LINE(GPIOH, 1U) | ||
| 278 | |||
| 279 | /*===========================================================================*/ | ||
| 280 | /* Driver pre-compile time settings. */ | ||
| 281 | /*===========================================================================*/ | ||
| 282 | |||
| 283 | /*===========================================================================*/ | ||
| 284 | /* Derived constants and error checks. */ | ||
| 285 | /*===========================================================================*/ | ||
| 286 | |||
| 287 | /*===========================================================================*/ | ||
| 288 | /* Driver data structures and types. */ | ||
| 289 | /*===========================================================================*/ | ||
| 290 | |||
| 291 | /*===========================================================================*/ | ||
| 292 | /* Driver macros. */ | ||
| 293 | /*===========================================================================*/ | ||
| 294 | |||
| 295 | /* | ||
| 296 | * I/O ports initial setup, this configuration is established soon after reset | ||
| 297 | * in the initialization code. | ||
| 298 | * Please refer to the STM32 Reference Manual for details. | ||
| 299 | */ | ||
| 300 | #define PIN_MODE_INPUT(n) (0U << ((n) * 2U)) | ||
| 301 | #define PIN_MODE_OUTPUT(n) (1U << ((n) * 2U)) | ||
| 302 | #define PIN_MODE_ALTERNATE(n) (2U << ((n) * 2U)) | ||
| 303 | #define PIN_MODE_ANALOG(n) (3U << ((n) * 2U)) | ||
| 304 | #define PIN_ODR_LOW(n) (0U << (n)) | ||
| 305 | #define PIN_ODR_HIGH(n) (1U << (n)) | ||
| 306 | #define PIN_OTYPE_PUSHPULL(n) (0U << (n)) | ||
| 307 | #define PIN_OTYPE_OPENDRAIN(n) (1U << (n)) | ||
| 308 | #define PIN_OSPEED_VERYLOW(n) (0U << ((n) * 2U)) | ||
| 309 | #define PIN_OSPEED_LOW(n) (1U << ((n) * 2U)) | ||
| 310 | #define PIN_OSPEED_MEDIUM(n) (2U << ((n) * 2U)) | ||
| 311 | #define PIN_OSPEED_HIGH(n) (3U << ((n) * 2U)) | ||
| 312 | #define PIN_PUPDR_FLOATING(n) (0U << ((n) * 2U)) | ||
| 313 | #define PIN_PUPDR_PULLUP(n) (1U << ((n) * 2U)) | ||
| 314 | #define PIN_PUPDR_PULLDOWN(n) (2U << ((n) * 2U)) | ||
| 315 | #define PIN_AFIO_AF(n, v) ((v) << (((n) % 8U) * 4U)) | ||
| 316 | |||
| 317 | /* | ||
| 318 | * GPIOA setup: | ||
| 319 | * | ||
| 320 | * PA0 - ARD_A0 ADC1_IN0 (input pullup). | ||
| 321 | * PA1 - ARD_A1 ADC1_IN1 (input pullup). | ||
| 322 | * PA2 - ARD_D1 USART2_TX (alternate 7). | ||
| 323 | * PA3 - ARD_D0 USART2_RX (alternate 7). | ||
| 324 | * PA4 - ARD_A2 ADC1_IN4 (input pullup). | ||
| 325 | * PA5 - LED_GREEN ARD_D13 (output pushpull high). | ||
| 326 | * PA6 - ARD_D12 (input pullup). | ||
| 327 | * PA7 - ARD_D11 (input pullup). | ||
| 328 | * PA8 - ARD_D7 (input pullup). | ||
| 329 | * PA9 - ARD_D8 (input pullup). | ||
| 330 | * PA10 - ARD_D2 (input pullup). | ||
| 331 | * PA11 - OTG_FS_DM (alternate 10). | ||
| 332 | * PA12 - OTG_FS_DP (alternate 10). | ||
| 333 | * PA13 - SWDIO (alternate 0). | ||
| 334 | * PA14 - SWCLK (alternate 0). | ||
| 335 | * PA15 - PIN15 (input pullup). | ||
| 336 | */ | ||
| 337 | #define VAL_GPIOA_MODER (PIN_MODE_INPUT(GPIOA_ARD_A0) | \ | ||
| 338 | PIN_MODE_INPUT(GPIOA_ARD_A1) | \ | ||
| 339 | PIN_MODE_ALTERNATE(GPIOA_ARD_D1) | \ | ||
| 340 | PIN_MODE_ALTERNATE(GPIOA_ARD_D0) | \ | ||
| 341 | PIN_MODE_INPUT(GPIOA_ARD_A2) | \ | ||
| 342 | PIN_MODE_OUTPUT(GPIOA_LED_GREEN) | \ | ||
| 343 | PIN_MODE_INPUT(GPIOA_ARD_D12) | \ | ||
| 344 | PIN_MODE_INPUT(GPIOA_ARD_D11) | \ | ||
| 345 | PIN_MODE_INPUT(GPIOA_ARD_D7) | \ | ||
| 346 | PIN_MODE_INPUT(GPIOA_ARD_D8) | \ | ||
| 347 | PIN_MODE_INPUT(GPIOA_ARD_D2) | \ | ||
| 348 | PIN_MODE_ALTERNATE(GPIOA_OTG_FS_DM) | \ | ||
| 349 | PIN_MODE_ALTERNATE(GPIOA_OTG_FS_DP) | \ | ||
| 350 | PIN_MODE_ALTERNATE(GPIOA_SWDIO) | \ | ||
| 351 | PIN_MODE_ALTERNATE(GPIOA_SWCLK) | \ | ||
| 352 | PIN_MODE_INPUT(GPIOA_PIN15)) | ||
| 353 | #define VAL_GPIOA_OTYPER (PIN_OTYPE_PUSHPULL(GPIOA_ARD_A0) | \ | ||
| 354 | PIN_OTYPE_PUSHPULL(GPIOA_ARD_A1) | \ | ||
| 355 | PIN_OTYPE_PUSHPULL(GPIOA_ARD_D1) | \ | ||
| 356 | PIN_OTYPE_PUSHPULL(GPIOA_ARD_D0) | \ | ||
| 357 | PIN_OTYPE_PUSHPULL(GPIOA_ARD_A2) | \ | ||
| 358 | PIN_OTYPE_PUSHPULL(GPIOA_LED_GREEN) | \ | ||
| 359 | PIN_OTYPE_PUSHPULL(GPIOA_ARD_D12) | \ | ||
| 360 | PIN_OTYPE_PUSHPULL(GPIOA_ARD_D11) | \ | ||
| 361 | PIN_OTYPE_PUSHPULL(GPIOA_ARD_D7) | \ | ||
| 362 | PIN_OTYPE_PUSHPULL(GPIOA_ARD_D8) | \ | ||
| 363 | PIN_OTYPE_PUSHPULL(GPIOA_ARD_D2) | \ | ||
| 364 | PIN_OTYPE_PUSHPULL(GPIOA_OTG_FS_DM) | \ | ||
| 365 | PIN_OTYPE_PUSHPULL(GPIOA_OTG_FS_DP) | \ | ||
| 366 | PIN_OTYPE_PUSHPULL(GPIOA_SWDIO) | \ | ||
| 367 | PIN_OTYPE_PUSHPULL(GPIOA_SWCLK) | \ | ||
| 368 | PIN_OTYPE_PUSHPULL(GPIOA_PIN15)) | ||
| 369 | #define VAL_GPIOA_OSPEEDR (PIN_OSPEED_HIGH(GPIOA_ARD_A0) | \ | ||
| 370 | PIN_OSPEED_HIGH(GPIOA_ARD_A1) | \ | ||
| 371 | PIN_OSPEED_MEDIUM(GPIOA_ARD_D1) | \ | ||
| 372 | PIN_OSPEED_MEDIUM(GPIOA_ARD_D0) | \ | ||
| 373 | PIN_OSPEED_HIGH(GPIOA_ARD_A2) | \ | ||
| 374 | PIN_OSPEED_MEDIUM(GPIOA_LED_GREEN) | \ | ||
| 375 | PIN_OSPEED_HIGH(GPIOA_ARD_D12) | \ | ||
| 376 | PIN_OSPEED_HIGH(GPIOA_ARD_D11) | \ | ||
| 377 | PIN_OSPEED_HIGH(GPIOA_ARD_D7) | \ | ||
| 378 | PIN_OSPEED_HIGH(GPIOA_ARD_D8) | \ | ||
| 379 | PIN_OSPEED_HIGH(GPIOA_ARD_D2) | \ | ||
| 380 | PIN_OSPEED_HIGH(GPIOA_OTG_FS_DM) | \ | ||
| 381 | PIN_OSPEED_HIGH(GPIOA_OTG_FS_DP) | \ | ||
| 382 | PIN_OSPEED_HIGH(GPIOA_SWDIO) | \ | ||
| 383 | PIN_OSPEED_HIGH(GPIOA_SWCLK) | \ | ||
| 384 | PIN_OSPEED_HIGH(GPIOA_PIN15)) | ||
| 385 | #define VAL_GPIOA_PUPDR (PIN_PUPDR_PULLUP(GPIOA_ARD_A0) | \ | ||
| 386 | PIN_PUPDR_PULLUP(GPIOA_ARD_A1) | \ | ||
| 387 | PIN_PUPDR_FLOATING(GPIOA_ARD_D1) | \ | ||
| 388 | PIN_PUPDR_FLOATING(GPIOA_ARD_D0) | \ | ||
| 389 | PIN_PUPDR_PULLUP(GPIOA_ARD_A2) | \ | ||
| 390 | PIN_PUPDR_FLOATING(GPIOA_LED_GREEN) | \ | ||
| 391 | PIN_PUPDR_PULLUP(GPIOA_ARD_D12) | \ | ||
| 392 | PIN_PUPDR_PULLUP(GPIOA_ARD_D11) | \ | ||
| 393 | PIN_PUPDR_PULLUP(GPIOA_ARD_D7) | \ | ||
| 394 | PIN_PUPDR_PULLUP(GPIOA_ARD_D8) | \ | ||
| 395 | PIN_PUPDR_PULLUP(GPIOA_ARD_D2) | \ | ||
| 396 | PIN_PUPDR_FLOATING(GPIOA_OTG_FS_DM) | \ | ||
| 397 | PIN_PUPDR_FLOATING(GPIOA_OTG_FS_DP) | \ | ||
| 398 | PIN_PUPDR_PULLUP(GPIOA_SWDIO) | \ | ||
| 399 | PIN_PUPDR_PULLDOWN(GPIOA_SWCLK) | \ | ||
| 400 | PIN_PUPDR_PULLUP(GPIOA_PIN15)) | ||
| 401 | #define VAL_GPIOA_ODR (PIN_ODR_HIGH(GPIOA_ARD_A0) | \ | ||
| 402 | PIN_ODR_HIGH(GPIOA_ARD_A1) | \ | ||
| 403 | PIN_ODR_HIGH(GPIOA_ARD_D1) | \ | ||
| 404 | PIN_ODR_HIGH(GPIOA_ARD_D0) | \ | ||
| 405 | PIN_ODR_HIGH(GPIOA_ARD_A2) | \ | ||
| 406 | PIN_ODR_LOW(GPIOA_LED_GREEN) | \ | ||
| 407 | PIN_ODR_HIGH(GPIOA_ARD_D12) | \ | ||
| 408 | PIN_ODR_HIGH(GPIOA_ARD_D11) | \ | ||
| 409 | PIN_ODR_HIGH(GPIOA_ARD_D7) | \ | ||
| 410 | PIN_ODR_HIGH(GPIOA_ARD_D8) | \ | ||
| 411 | PIN_ODR_HIGH(GPIOA_ARD_D2) | \ | ||
| 412 | PIN_ODR_HIGH(GPIOA_OTG_FS_DM) | \ | ||
| 413 | PIN_ODR_HIGH(GPIOA_OTG_FS_DP) | \ | ||
| 414 | PIN_ODR_HIGH(GPIOA_SWDIO) | \ | ||
| 415 | PIN_ODR_HIGH(GPIOA_SWCLK) | \ | ||
| 416 | PIN_ODR_HIGH(GPIOA_PIN15)) | ||
| 417 | #define VAL_GPIOA_AFRL (PIN_AFIO_AF(GPIOA_ARD_A0, 0U) | \ | ||
| 418 | PIN_AFIO_AF(GPIOA_ARD_A1, 0U) | \ | ||
| 419 | PIN_AFIO_AF(GPIOA_ARD_D1, 7U) | \ | ||
| 420 | PIN_AFIO_AF(GPIOA_ARD_D0, 7U) | \ | ||
| 421 | PIN_AFIO_AF(GPIOA_ARD_A2, 0U) | \ | ||
| 422 | PIN_AFIO_AF(GPIOA_LED_GREEN, 0U) | \ | ||
| 423 | PIN_AFIO_AF(GPIOA_ARD_D12, 0U) | \ | ||
| 424 | PIN_AFIO_AF(GPIOA_ARD_D11, 0U)) | ||
| 425 | #define VAL_GPIOA_AFRH (PIN_AFIO_AF(GPIOA_ARD_D7, 0U) | \ | ||
| 426 | PIN_AFIO_AF(GPIOA_ARD_D8, 0U) | \ | ||
| 427 | PIN_AFIO_AF(GPIOA_ARD_D2, 0U) | \ | ||
| 428 | PIN_AFIO_AF(GPIOA_OTG_FS_DM, 10U) | \ | ||
| 429 | PIN_AFIO_AF(GPIOA_OTG_FS_DP, 10U) | \ | ||
| 430 | PIN_AFIO_AF(GPIOA_SWDIO, 0U) | \ | ||
| 431 | PIN_AFIO_AF(GPIOA_SWCLK, 0U) | \ | ||
| 432 | PIN_AFIO_AF(GPIOA_PIN15, 0U)) | ||
| 433 | |||
| 434 | /* | ||
| 435 | * GPIOB setup: | ||
| 436 | * | ||
| 437 | * PB0 - ARD_A3 ADC1_IN8 (input pullup). | ||
| 438 | * PB1 - PIN1 (input pullup). | ||
| 439 | * PB2 - PIN2 (input pullup). | ||
| 440 | * PB3 - SWO ARD_D3 (alternate 0). | ||
| 441 | * PB4 - ARD_D5 (input pullup). | ||
| 442 | * PB5 - ARD_D4 (input pullup). | ||
| 443 | * PB6 - ARD_D10 (input pullup). | ||
| 444 | * PB7 - PIN7 (input pullup). | ||
| 445 | * PB8 - ARD_D15 (input pullup). | ||
| 446 | * PB9 - ARD_D14 (input pullup). | ||
| 447 | * PB10 - ARD_D6 (input pullup). | ||
| 448 | * PB11 - PIN11 (input pullup). | ||
| 449 | * PB12 - PIN12 (input pullup). | ||
| 450 | * PB13 - PIN13 (input pullup). | ||
| 451 | * PB14 - PIN14 (input pullup). | ||
| 452 | * PB15 - PIN15 (input pullup). | ||
| 453 | */ | ||
| 454 | #define VAL_GPIOB_MODER (PIN_MODE_INPUT(GPIOB_ARD_A3) | \ | ||
| 455 | PIN_MODE_INPUT(GPIOB_PIN1) | \ | ||
| 456 | PIN_MODE_INPUT(GPIOB_PIN2) | \ | ||
| 457 | PIN_MODE_ALTERNATE(GPIOB_SWO) | \ | ||
| 458 | PIN_MODE_INPUT(GPIOB_ARD_D5) | \ | ||
| 459 | PIN_MODE_INPUT(GPIOB_ARD_D4) | \ | ||
| 460 | PIN_MODE_INPUT(GPIOB_ARD_D10) | \ | ||
| 461 | PIN_MODE_INPUT(GPIOB_PIN7) | \ | ||
| 462 | PIN_MODE_INPUT(GPIOB_ARD_D15) | \ | ||
| 463 | PIN_MODE_INPUT(GPIOB_ARD_D14) | \ | ||
| 464 | PIN_MODE_INPUT(GPIOB_ARD_D6) | \ | ||
| 465 | PIN_MODE_INPUT(GPIOB_PIN11) | \ | ||
| 466 | PIN_MODE_INPUT(GPIOB_PIN12) | \ | ||
| 467 | PIN_MODE_INPUT(GPIOB_PIN13) | \ | ||
| 468 | PIN_MODE_INPUT(GPIOB_PIN14) | \ | ||
| 469 | PIN_MODE_INPUT(GPIOB_PIN15)) | ||
| 470 | #define VAL_GPIOB_OTYPER (PIN_OTYPE_PUSHPULL(GPIOB_ARD_A3) | \ | ||
| 471 | PIN_OTYPE_PUSHPULL(GPIOB_PIN1) | \ | ||
| 472 | PIN_OTYPE_PUSHPULL(GPIOB_PIN2) | \ | ||
| 473 | PIN_OTYPE_PUSHPULL(GPIOB_SWO) | \ | ||
| 474 | PIN_OTYPE_PUSHPULL(GPIOB_ARD_D5) | \ | ||
| 475 | PIN_OTYPE_PUSHPULL(GPIOB_ARD_D4) | \ | ||
| 476 | PIN_OTYPE_PUSHPULL(GPIOB_ARD_D10) | \ | ||
| 477 | PIN_OTYPE_PUSHPULL(GPIOB_PIN7) | \ | ||
| 478 | PIN_OTYPE_PUSHPULL(GPIOB_ARD_D15) | \ | ||
| 479 | PIN_OTYPE_PUSHPULL(GPIOB_ARD_D14) | \ | ||
| 480 | PIN_OTYPE_PUSHPULL(GPIOB_ARD_D6) | \ | ||
| 481 | PIN_OTYPE_PUSHPULL(GPIOB_PIN11) | \ | ||
| 482 | PIN_OTYPE_PUSHPULL(GPIOB_PIN12) | \ | ||
| 483 | PIN_OTYPE_PUSHPULL(GPIOB_PIN13) | \ | ||
| 484 | PIN_OTYPE_PUSHPULL(GPIOB_PIN14) | \ | ||
| 485 | PIN_OTYPE_PUSHPULL(GPIOB_PIN15)) | ||
| 486 | #define VAL_GPIOB_OSPEEDR (PIN_OSPEED_HIGH(GPIOB_ARD_A3) | \ | ||
| 487 | PIN_OSPEED_HIGH(GPIOB_PIN1) | \ | ||
| 488 | PIN_OSPEED_HIGH(GPIOB_PIN2) | \ | ||
| 489 | PIN_OSPEED_HIGH(GPIOB_SWO) | \ | ||
| 490 | PIN_OSPEED_HIGH(GPIOB_ARD_D5) | \ | ||
| 491 | PIN_OSPEED_HIGH(GPIOB_ARD_D4) | \ | ||
| 492 | PIN_OSPEED_HIGH(GPIOB_ARD_D10) | \ | ||
| 493 | PIN_OSPEED_HIGH(GPIOB_PIN7) | \ | ||
| 494 | PIN_OSPEED_HIGH(GPIOB_ARD_D15) | \ | ||
| 495 | PIN_OSPEED_HIGH(GPIOB_ARD_D14) | \ | ||
| 496 | PIN_OSPEED_HIGH(GPIOB_ARD_D6) | \ | ||
| 497 | PIN_OSPEED_HIGH(GPIOB_PIN11) | \ | ||
| 498 | PIN_OSPEED_HIGH(GPIOB_PIN12) | \ | ||
| 499 | PIN_OSPEED_HIGH(GPIOB_PIN13) | \ | ||
| 500 | PIN_OSPEED_HIGH(GPIOB_PIN14) | \ | ||
| 501 | PIN_OSPEED_HIGH(GPIOB_PIN15)) | ||
| 502 | #define VAL_GPIOB_PUPDR (PIN_PUPDR_PULLUP(GPIOB_ARD_A3) | \ | ||
| 503 | PIN_PUPDR_PULLUP(GPIOB_PIN1) | \ | ||
| 504 | PIN_PUPDR_PULLUP(GPIOB_PIN2) | \ | ||
| 505 | PIN_PUPDR_PULLUP(GPIOB_SWO) | \ | ||
| 506 | PIN_PUPDR_PULLUP(GPIOB_ARD_D5) | \ | ||
| 507 | PIN_PUPDR_PULLUP(GPIOB_ARD_D4) | \ | ||
| 508 | PIN_PUPDR_PULLUP(GPIOB_ARD_D10) | \ | ||
| 509 | PIN_PUPDR_PULLUP(GPIOB_PIN7) | \ | ||
| 510 | PIN_PUPDR_PULLUP(GPIOB_ARD_D15) | \ | ||
| 511 | PIN_PUPDR_PULLUP(GPIOB_ARD_D14) | \ | ||
| 512 | PIN_PUPDR_PULLUP(GPIOB_ARD_D6) | \ | ||
| 513 | PIN_PUPDR_PULLUP(GPIOB_PIN11) | \ | ||
| 514 | PIN_PUPDR_PULLUP(GPIOB_PIN12) | \ | ||
| 515 | PIN_PUPDR_PULLUP(GPIOB_PIN13) | \ | ||
| 516 | PIN_PUPDR_PULLUP(GPIOB_PIN14) | \ | ||
| 517 | PIN_PUPDR_PULLUP(GPIOB_PIN15)) | ||
| 518 | #define VAL_GPIOB_ODR (PIN_ODR_HIGH(GPIOB_ARD_A3) | \ | ||
| 519 | PIN_ODR_HIGH(GPIOB_PIN1) | \ | ||
| 520 | PIN_ODR_HIGH(GPIOB_PIN2) | \ | ||
| 521 | PIN_ODR_HIGH(GPIOB_SWO) | \ | ||
| 522 | PIN_ODR_HIGH(GPIOB_ARD_D5) | \ | ||
| 523 | PIN_ODR_HIGH(GPIOB_ARD_D4) | \ | ||
| 524 | PIN_ODR_HIGH(GPIOB_ARD_D10) | \ | ||
| 525 | PIN_ODR_HIGH(GPIOB_PIN7) | \ | ||
| 526 | PIN_ODR_HIGH(GPIOB_ARD_D15) | \ | ||
| 527 | PIN_ODR_HIGH(GPIOB_ARD_D14) | \ | ||
| 528 | PIN_ODR_HIGH(GPIOB_ARD_D6) | \ | ||
| 529 | PIN_ODR_HIGH(GPIOB_PIN11) | \ | ||
| 530 | PIN_ODR_HIGH(GPIOB_PIN12) | \ | ||
| 531 | PIN_ODR_HIGH(GPIOB_PIN13) | \ | ||
| 532 | PIN_ODR_HIGH(GPIOB_PIN14) | \ | ||
| 533 | PIN_ODR_HIGH(GPIOB_PIN15)) | ||
| 534 | #define VAL_GPIOB_AFRL (PIN_AFIO_AF(GPIOB_ARD_A3, 0U) | \ | ||
| 535 | PIN_AFIO_AF(GPIOB_PIN1, 0U) | \ | ||
| 536 | PIN_AFIO_AF(GPIOB_PIN2, 0U) | \ | ||
| 537 | PIN_AFIO_AF(GPIOB_SWO, 0U) | \ | ||
| 538 | PIN_AFIO_AF(GPIOB_ARD_D5, 0U) | \ | ||
| 539 | PIN_AFIO_AF(GPIOB_ARD_D4, 0U) | \ | ||
| 540 | PIN_AFIO_AF(GPIOB_ARD_D10, 0U) | \ | ||
| 541 | PIN_AFIO_AF(GPIOB_PIN7, 0U)) | ||
| 542 | #define VAL_GPIOB_AFRH (PIN_AFIO_AF(GPIOB_ARD_D15, 0U) | \ | ||
| 543 | PIN_AFIO_AF(GPIOB_ARD_D14, 0U) | \ | ||
| 544 | PIN_AFIO_AF(GPIOB_ARD_D6, 0U) | \ | ||
| 545 | PIN_AFIO_AF(GPIOB_PIN11, 0U) | \ | ||
| 546 | PIN_AFIO_AF(GPIOB_PIN12, 0U) | \ | ||
| 547 | PIN_AFIO_AF(GPIOB_PIN13, 0U) | \ | ||
| 548 | PIN_AFIO_AF(GPIOB_PIN14, 0U) | \ | ||
| 549 | PIN_AFIO_AF(GPIOB_PIN15, 0U)) | ||
| 550 | |||
| 551 | /* | ||
| 552 | * GPIOC setup: | ||
| 553 | * | ||
| 554 | * PC0 - ARD_A5 ADC1_IN10 (input pullup). | ||
| 555 | * PC1 - ARD_A4 ADC1_IN11 (input pullup). | ||
| 556 | * PC2 - PIN2 (input pullup). | ||
| 557 | * PC3 - PIN3 (input pullup). | ||
| 558 | * PC4 - PIN4 (input pullup). | ||
| 559 | * PC5 - PIN5 (input pullup). | ||
| 560 | * PC6 - PIN6 (input pullup). | ||
| 561 | * PC7 - ARD_D9 (input pullup). | ||
| 562 | * PC8 - PIN8 (input pullup). | ||
| 563 | * PC9 - PIN9 (input pullup). | ||
| 564 | * PC10 - PIN10 (input pullup). | ||
| 565 | * PC11 - PIN11 (input pullup). | ||
| 566 | * PC12 - PIN12 (input pullup). | ||
| 567 | * PC13 - BUTTON (input floating). | ||
| 568 | * PC14 - OSC32_IN (input floating). | ||
| 569 | * PC15 - OSC32_OUT (input floating). | ||
| 570 | */ | ||
| 571 | #define VAL_GPIOC_MODER (PIN_MODE_INPUT(GPIOC_ARD_A5) | \ | ||
| 572 | PIN_MODE_INPUT(GPIOC_ARD_A4) | \ | ||
| 573 | PIN_MODE_INPUT(GPIOC_PIN2) | \ | ||
| 574 | PIN_MODE_INPUT(GPIOC_PIN3) | \ | ||
| 575 | PIN_MODE_INPUT(GPIOC_PIN4) | \ | ||
| 576 | PIN_MODE_INPUT(GPIOC_PIN5) | \ | ||
| 577 | PIN_MODE_INPUT(GPIOC_PIN6) | \ | ||
| 578 | PIN_MODE_INPUT(GPIOC_ARD_D9) | \ | ||
| 579 | PIN_MODE_INPUT(GPIOC_PIN8) | \ | ||
| 580 | PIN_MODE_INPUT(GPIOC_PIN9) | \ | ||
| 581 | PIN_MODE_INPUT(GPIOC_PIN10) | \ | ||
| 582 | PIN_MODE_INPUT(GPIOC_PIN11) | \ | ||
| 583 | PIN_MODE_INPUT(GPIOC_PIN12) | \ | ||
| 584 | PIN_MODE_INPUT(GPIOC_BUTTON) | \ | ||
| 585 | PIN_MODE_INPUT(GPIOC_OSC32_IN) | \ | ||
| 586 | PIN_MODE_INPUT(GPIOC_OSC32_OUT)) | ||
| 587 | #define VAL_GPIOC_OTYPER (PIN_OTYPE_PUSHPULL(GPIOC_ARD_A5) | \ | ||
| 588 | PIN_OTYPE_PUSHPULL(GPIOC_ARD_A4) | \ | ||
| 589 | PIN_OTYPE_PUSHPULL(GPIOC_PIN2) | \ | ||
| 590 | PIN_OTYPE_PUSHPULL(GPIOC_PIN3) | \ | ||
| 591 | PIN_OTYPE_PUSHPULL(GPIOC_PIN4) | \ | ||
| 592 | PIN_OTYPE_PUSHPULL(GPIOC_PIN5) | \ | ||
| 593 | PIN_OTYPE_PUSHPULL(GPIOC_PIN6) | \ | ||
| 594 | PIN_OTYPE_PUSHPULL(GPIOC_ARD_D9) | \ | ||
| 595 | PIN_OTYPE_PUSHPULL(GPIOC_PIN8) | \ | ||
| 596 | PIN_OTYPE_PUSHPULL(GPIOC_PIN9) | \ | ||
| 597 | PIN_OTYPE_PUSHPULL(GPIOC_PIN10) | \ | ||
| 598 | PIN_OTYPE_PUSHPULL(GPIOC_PIN11) | \ | ||
| 599 | PIN_OTYPE_PUSHPULL(GPIOC_PIN12) | \ | ||
| 600 | PIN_OTYPE_PUSHPULL(GPIOC_BUTTON) | \ | ||
| 601 | PIN_OTYPE_PUSHPULL(GPIOC_OSC32_IN) | \ | ||
| 602 | PIN_OTYPE_PUSHPULL(GPIOC_OSC32_OUT)) | ||
| 603 | #define VAL_GPIOC_OSPEEDR (PIN_OSPEED_HIGH(GPIOC_ARD_A5) | \ | ||
| 604 | PIN_OSPEED_HIGH(GPIOC_ARD_A4) | \ | ||
| 605 | PIN_OSPEED_HIGH(GPIOC_PIN2) | \ | ||
| 606 | PIN_OSPEED_HIGH(GPIOC_PIN3) | \ | ||
| 607 | PIN_OSPEED_HIGH(GPIOC_PIN4) | \ | ||
| 608 | PIN_OSPEED_HIGH(GPIOC_PIN5) | \ | ||
| 609 | PIN_OSPEED_HIGH(GPIOC_PIN6) | \ | ||
| 610 | PIN_OSPEED_HIGH(GPIOC_ARD_D9) | \ | ||
| 611 | PIN_OSPEED_HIGH(GPIOC_PIN8) | \ | ||
| 612 | PIN_OSPEED_HIGH(GPIOC_PIN9) | \ | ||
| 613 | PIN_OSPEED_HIGH(GPIOC_PIN10) | \ | ||
| 614 | PIN_OSPEED_HIGH(GPIOC_PIN11) | \ | ||
| 615 | PIN_OSPEED_HIGH(GPIOC_PIN12) | \ | ||
| 616 | PIN_OSPEED_HIGH(GPIOC_BUTTON) | \ | ||
| 617 | PIN_OSPEED_HIGH(GPIOC_OSC32_IN) | \ | ||
| 618 | PIN_OSPEED_HIGH(GPIOC_OSC32_OUT)) | ||
| 619 | #define VAL_GPIOC_PUPDR (PIN_PUPDR_PULLUP(GPIOC_ARD_A5) | \ | ||
| 620 | PIN_PUPDR_PULLUP(GPIOC_ARD_A4) | \ | ||
| 621 | PIN_PUPDR_PULLUP(GPIOC_PIN2) | \ | ||
| 622 | PIN_PUPDR_PULLUP(GPIOC_PIN3) | \ | ||
| 623 | PIN_PUPDR_PULLUP(GPIOC_PIN4) | \ | ||
| 624 | PIN_PUPDR_PULLUP(GPIOC_PIN5) | \ | ||
| 625 | PIN_PUPDR_PULLUP(GPIOC_PIN6) | \ | ||
| 626 | PIN_PUPDR_PULLUP(GPIOC_ARD_D9) | \ | ||
| 627 | PIN_PUPDR_PULLUP(GPIOC_PIN8) | \ | ||
| 628 | PIN_PUPDR_PULLUP(GPIOC_PIN9) | \ | ||
| 629 | PIN_PUPDR_PULLUP(GPIOC_PIN10) | \ | ||
| 630 | PIN_PUPDR_PULLUP(GPIOC_PIN11) | \ | ||
| 631 | PIN_PUPDR_PULLUP(GPIOC_PIN12) | \ | ||
| 632 | PIN_PUPDR_FLOATING(GPIOC_BUTTON) | \ | ||
| 633 | PIN_PUPDR_FLOATING(GPIOC_OSC32_IN) | \ | ||
| 634 | PIN_PUPDR_FLOATING(GPIOC_OSC32_OUT)) | ||
| 635 | #define VAL_GPIOC_ODR (PIN_ODR_HIGH(GPIOC_ARD_A5) | \ | ||
| 636 | PIN_ODR_HIGH(GPIOC_ARD_A4) | \ | ||
| 637 | PIN_ODR_HIGH(GPIOC_PIN2) | \ | ||
| 638 | PIN_ODR_HIGH(GPIOC_PIN3) | \ | ||
| 639 | PIN_ODR_HIGH(GPIOC_PIN4) | \ | ||
| 640 | PIN_ODR_HIGH(GPIOC_PIN5) | \ | ||
| 641 | PIN_ODR_HIGH(GPIOC_PIN6) | \ | ||
| 642 | PIN_ODR_HIGH(GPIOC_ARD_D9) | \ | ||
| 643 | PIN_ODR_HIGH(GPIOC_PIN8) | \ | ||
| 644 | PIN_ODR_HIGH(GPIOC_PIN9) | \ | ||
| 645 | PIN_ODR_HIGH(GPIOC_PIN10) | \ | ||
| 646 | PIN_ODR_HIGH(GPIOC_PIN11) | \ | ||
| 647 | PIN_ODR_HIGH(GPIOC_PIN12) | \ | ||
| 648 | PIN_ODR_HIGH(GPIOC_BUTTON) | \ | ||
| 649 | PIN_ODR_HIGH(GPIOC_OSC32_IN) | \ | ||
| 650 | PIN_ODR_HIGH(GPIOC_OSC32_OUT)) | ||
| 651 | #define VAL_GPIOC_AFRL (PIN_AFIO_AF(GPIOC_ARD_A5, 0U) | \ | ||
| 652 | PIN_AFIO_AF(GPIOC_ARD_A4, 0U) | \ | ||
| 653 | PIN_AFIO_AF(GPIOC_PIN2, 0U) | \ | ||
| 654 | PIN_AFIO_AF(GPIOC_PIN3, 0U) | \ | ||
| 655 | PIN_AFIO_AF(GPIOC_PIN4, 0U) | \ | ||
| 656 | PIN_AFIO_AF(GPIOC_PIN5, 0U) | \ | ||
| 657 | PIN_AFIO_AF(GPIOC_PIN6, 0U) | \ | ||
| 658 | PIN_AFIO_AF(GPIOC_ARD_D9, 0U)) | ||
| 659 | #define VAL_GPIOC_AFRH (PIN_AFIO_AF(GPIOC_PIN8, 0U) | \ | ||
| 660 | PIN_AFIO_AF(GPIOC_PIN9, 0U) | \ | ||
| 661 | PIN_AFIO_AF(GPIOC_PIN10, 0U) | \ | ||
| 662 | PIN_AFIO_AF(GPIOC_PIN11, 0U) | \ | ||
| 663 | PIN_AFIO_AF(GPIOC_PIN12, 0U) | \ | ||
| 664 | PIN_AFIO_AF(GPIOC_BUTTON, 0U) | \ | ||
| 665 | PIN_AFIO_AF(GPIOC_OSC32_IN, 0U) | \ | ||
| 666 | PIN_AFIO_AF(GPIOC_OSC32_OUT, 0U)) | ||
| 667 | |||
| 668 | /* | ||
| 669 | * GPIOD setup: | ||
| 670 | * | ||
| 671 | * PD0 - PIN0 (input pullup). | ||
| 672 | * PD1 - PIN1 (input pullup). | ||
| 673 | * PD2 - PIN2 (input pullup). | ||
| 674 | * PD3 - PIN3 (input pullup). | ||
| 675 | * PD4 - PIN4 (input pullup). | ||
| 676 | * PD5 - PIN5 (input pullup). | ||
| 677 | * PD6 - PIN6 (input pullup). | ||
| 678 | * PD7 - PIN7 (input pullup). | ||
| 679 | * PD8 - PIN8 (input pullup). | ||
| 680 | * PD9 - PIN9 (input pullup). | ||
| 681 | * PD10 - PIN10 (input pullup). | ||
| 682 | * PD11 - PIN11 (input pullup). | ||
| 683 | * PD12 - PIN12 (input pullup). | ||
| 684 | * PD13 - PIN13 (input pullup). | ||
| 685 | * PD14 - PIN14 (input pullup). | ||
| 686 | * PD15 - PIN15 (input pullup). | ||
| 687 | */ | ||
| 688 | #define VAL_GPIOD_MODER (PIN_MODE_INPUT(GPIOD_PIN0) | \ | ||
| 689 | PIN_MODE_INPUT(GPIOD_PIN1) | \ | ||
| 690 | PIN_MODE_INPUT(GPIOD_PIN2) | \ | ||
| 691 | PIN_MODE_INPUT(GPIOD_PIN3) | \ | ||
| 692 | PIN_MODE_INPUT(GPIOD_PIN4) | \ | ||
| 693 | PIN_MODE_INPUT(GPIOD_PIN5) | \ | ||
| 694 | PIN_MODE_INPUT(GPIOD_PIN6) | \ | ||
| 695 | PIN_MODE_INPUT(GPIOD_PIN7) | \ | ||
| 696 | PIN_MODE_INPUT(GPIOD_PIN8) | \ | ||
| 697 | PIN_MODE_INPUT(GPIOD_PIN9) | \ | ||
| 698 | PIN_MODE_INPUT(GPIOD_PIN10) | \ | ||
| 699 | PIN_MODE_INPUT(GPIOD_PIN11) | \ | ||
| 700 | PIN_MODE_INPUT(GPIOD_PIN12) | \ | ||
| 701 | PIN_MODE_INPUT(GPIOD_PIN13) | \ | ||
| 702 | PIN_MODE_INPUT(GPIOD_PIN14) | \ | ||
| 703 | PIN_MODE_INPUT(GPIOD_PIN15)) | ||
| 704 | #define VAL_GPIOD_OTYPER (PIN_OTYPE_PUSHPULL(GPIOD_PIN0) | \ | ||
| 705 | PIN_OTYPE_PUSHPULL(GPIOD_PIN1) | \ | ||
| 706 | PIN_OTYPE_PUSHPULL(GPIOD_PIN2) | \ | ||
| 707 | PIN_OTYPE_PUSHPULL(GPIOD_PIN3) | \ | ||
| 708 | PIN_OTYPE_PUSHPULL(GPIOD_PIN4) | \ | ||
| 709 | PIN_OTYPE_PUSHPULL(GPIOD_PIN5) | \ | ||
| 710 | PIN_OTYPE_PUSHPULL(GPIOD_PIN6) | \ | ||
| 711 | PIN_OTYPE_PUSHPULL(GPIOD_PIN7) | \ | ||
| 712 | PIN_OTYPE_PUSHPULL(GPIOD_PIN8) | \ | ||
| 713 | PIN_OTYPE_PUSHPULL(GPIOD_PIN9) | \ | ||
| 714 | PIN_OTYPE_PUSHPULL(GPIOD_PIN10) | \ | ||
| 715 | PIN_OTYPE_PUSHPULL(GPIOD_PIN11) | \ | ||
| 716 | PIN_OTYPE_PUSHPULL(GPIOD_PIN12) | \ | ||
| 717 | PIN_OTYPE_PUSHPULL(GPIOD_PIN13) | \ | ||
| 718 | PIN_OTYPE_PUSHPULL(GPIOD_PIN14) | \ | ||
| 719 | PIN_OTYPE_PUSHPULL(GPIOD_PIN15)) | ||
| 720 | #define VAL_GPIOD_OSPEEDR (PIN_OSPEED_HIGH(GPIOD_PIN0) | \ | ||
| 721 | PIN_OSPEED_HIGH(GPIOD_PIN1) | \ | ||
| 722 | PIN_OSPEED_HIGH(GPIOD_PIN2) | \ | ||
| 723 | PIN_OSPEED_HIGH(GPIOD_PIN3) | \ | ||
| 724 | PIN_OSPEED_HIGH(GPIOD_PIN4) | \ | ||
| 725 | PIN_OSPEED_HIGH(GPIOD_PIN5) | \ | ||
| 726 | PIN_OSPEED_HIGH(GPIOD_PIN6) | \ | ||
| 727 | PIN_OSPEED_HIGH(GPIOD_PIN7) | \ | ||
| 728 | PIN_OSPEED_HIGH(GPIOD_PIN8) | \ | ||
| 729 | PIN_OSPEED_HIGH(GPIOD_PIN9) | \ | ||
| 730 | PIN_OSPEED_HIGH(GPIOD_PIN10) | \ | ||
| 731 | PIN_OSPEED_HIGH(GPIOD_PIN11) | \ | ||
| 732 | PIN_OSPEED_HIGH(GPIOD_PIN12) | \ | ||
| 733 | PIN_OSPEED_HIGH(GPIOD_PIN13) | \ | ||
| 734 | PIN_OSPEED_HIGH(GPIOD_PIN14) | \ | ||
| 735 | PIN_OSPEED_HIGH(GPIOD_PIN15)) | ||
| 736 | #define VAL_GPIOD_PUPDR (PIN_PUPDR_PULLUP(GPIOD_PIN0) | \ | ||
| 737 | PIN_PUPDR_PULLUP(GPIOD_PIN1) | \ | ||
| 738 | PIN_PUPDR_PULLUP(GPIOD_PIN2) | \ | ||
| 739 | PIN_PUPDR_PULLUP(GPIOD_PIN3) | \ | ||
| 740 | PIN_PUPDR_PULLUP(GPIOD_PIN4) | \ | ||
| 741 | PIN_PUPDR_PULLUP(GPIOD_PIN5) | \ | ||
| 742 | PIN_PUPDR_PULLUP(GPIOD_PIN6) | \ | ||
| 743 | PIN_PUPDR_PULLUP(GPIOD_PIN7) | \ | ||
| 744 | PIN_PUPDR_PULLUP(GPIOD_PIN8) | \ | ||
| 745 | PIN_PUPDR_PULLUP(GPIOD_PIN9) | \ | ||
| 746 | PIN_PUPDR_PULLUP(GPIOD_PIN10) | \ | ||
| 747 | PIN_PUPDR_PULLUP(GPIOD_PIN11) | \ | ||
| 748 | PIN_PUPDR_PULLUP(GPIOD_PIN12) | \ | ||
| 749 | PIN_PUPDR_PULLUP(GPIOD_PIN13) | \ | ||
| 750 | PIN_PUPDR_PULLUP(GPIOD_PIN14) | \ | ||
| 751 | PIN_PUPDR_PULLUP(GPIOD_PIN15)) | ||
| 752 | #define VAL_GPIOD_ODR (PIN_ODR_HIGH(GPIOD_PIN0) | \ | ||
| 753 | PIN_ODR_HIGH(GPIOD_PIN1) | \ | ||
| 754 | PIN_ODR_HIGH(GPIOD_PIN2) | \ | ||
| 755 | PIN_ODR_HIGH(GPIOD_PIN3) | \ | ||
| 756 | PIN_ODR_HIGH(GPIOD_PIN4) | \ | ||
| 757 | PIN_ODR_HIGH(GPIOD_PIN5) | \ | ||
| 758 | PIN_ODR_HIGH(GPIOD_PIN6) | \ | ||
| 759 | PIN_ODR_HIGH(GPIOD_PIN7) | \ | ||
| 760 | PIN_ODR_HIGH(GPIOD_PIN8) | \ | ||
| 761 | PIN_ODR_HIGH(GPIOD_PIN9) | \ | ||
| 762 | PIN_ODR_HIGH(GPIOD_PIN10) | \ | ||
| 763 | PIN_ODR_HIGH(GPIOD_PIN11) | \ | ||
| 764 | PIN_ODR_HIGH(GPIOD_PIN12) | \ | ||
| 765 | PIN_ODR_HIGH(GPIOD_PIN13) | \ | ||
| 766 | PIN_ODR_HIGH(GPIOD_PIN14) | \ | ||
| 767 | PIN_ODR_HIGH(GPIOD_PIN15)) | ||
| 768 | #define VAL_GPIOD_AFRL (PIN_AFIO_AF(GPIOD_PIN0, 0U) | \ | ||
| 769 | PIN_AFIO_AF(GPIOD_PIN1, 0U) | \ | ||
| 770 | PIN_AFIO_AF(GPIOD_PIN2, 0U) | \ | ||
| 771 | PIN_AFIO_AF(GPIOD_PIN3, 0U) | \ | ||
| 772 | PIN_AFIO_AF(GPIOD_PIN4, 0U) | \ | ||
| 773 | PIN_AFIO_AF(GPIOD_PIN5, 0U) | \ | ||
| 774 | PIN_AFIO_AF(GPIOD_PIN6, 0U) | \ | ||
| 775 | PIN_AFIO_AF(GPIOD_PIN7, 0U)) | ||
| 776 | #define VAL_GPIOD_AFRH (PIN_AFIO_AF(GPIOD_PIN8, 0U) | \ | ||
| 777 | PIN_AFIO_AF(GPIOD_PIN9, 0U) | \ | ||
| 778 | PIN_AFIO_AF(GPIOD_PIN10, 0U) | \ | ||
| 779 | PIN_AFIO_AF(GPIOD_PIN11, 0U) | \ | ||
| 780 | PIN_AFIO_AF(GPIOD_PIN12, 0U) | \ | ||
| 781 | PIN_AFIO_AF(GPIOD_PIN13, 0U) | \ | ||
| 782 | PIN_AFIO_AF(GPIOD_PIN14, 0U) | \ | ||
| 783 | PIN_AFIO_AF(GPIOD_PIN15, 0U)) | ||
| 784 | |||
| 785 | /* | ||
| 786 | * GPIOE setup: | ||
| 787 | * | ||
| 788 | * PE0 - PIN0 (input pullup). | ||
| 789 | * PE1 - PIN1 (input pullup). | ||
| 790 | * PE2 - PIN2 (input pullup). | ||
| 791 | * PE3 - PIN3 (input pullup). | ||
| 792 | * PE4 - PIN4 (input pullup). | ||
| 793 | * PE5 - PIN5 (input pullup). | ||
| 794 | * PE6 - PIN6 (input pullup). | ||
| 795 | * PE7 - PIN7 (input pullup). | ||
| 796 | * PE8 - PIN8 (input pullup). | ||
| 797 | * PE9 - PIN9 (input pullup). | ||
| 798 | * PE10 - PIN10 (input pullup). | ||
| 799 | * PE11 - PIN11 (input pullup). | ||
| 800 | * PE12 - PIN12 (input pullup). | ||
| 801 | * PE13 - PIN13 (input pullup). | ||
| 802 | * PE14 - PIN14 (input pullup). | ||
| 803 | * PE15 - PIN15 (input pullup). | ||
| 804 | */ | ||
| 805 | #define VAL_GPIOE_MODER (PIN_MODE_INPUT(GPIOE_PIN0) | \ | ||
| 806 | PIN_MODE_INPUT(GPIOE_PIN1) | \ | ||
| 807 | PIN_MODE_INPUT(GPIOE_PIN2) | \ | ||
| 808 | PIN_MODE_INPUT(GPIOE_PIN3) | \ | ||
| 809 | PIN_MODE_INPUT(GPIOE_PIN4) | \ | ||
| 810 | PIN_MODE_INPUT(GPIOE_PIN5) | \ | ||
| 811 | PIN_MODE_INPUT(GPIOE_PIN6) | \ | ||
| 812 | PIN_MODE_INPUT(GPIOE_PIN7) | \ | ||
| 813 | PIN_MODE_INPUT(GPIOE_PIN8) | \ | ||
| 814 | PIN_MODE_INPUT(GPIOE_PIN9) | \ | ||
| 815 | PIN_MODE_INPUT(GPIOE_PIN10) | \ | ||
| 816 | PIN_MODE_INPUT(GPIOE_PIN11) | \ | ||
| 817 | PIN_MODE_INPUT(GPIOE_PIN12) | \ | ||
| 818 | PIN_MODE_INPUT(GPIOE_PIN13) | \ | ||
| 819 | PIN_MODE_INPUT(GPIOE_PIN14) | \ | ||
| 820 | PIN_MODE_INPUT(GPIOE_PIN15)) | ||
| 821 | #define VAL_GPIOE_OTYPER (PIN_OTYPE_PUSHPULL(GPIOE_PIN0) | \ | ||
| 822 | PIN_OTYPE_PUSHPULL(GPIOE_PIN1) | \ | ||
| 823 | PIN_OTYPE_PUSHPULL(GPIOE_PIN2) | \ | ||
| 824 | PIN_OTYPE_PUSHPULL(GPIOE_PIN3) | \ | ||
| 825 | PIN_OTYPE_PUSHPULL(GPIOE_PIN4) | \ | ||
| 826 | PIN_OTYPE_PUSHPULL(GPIOE_PIN5) | \ | ||
| 827 | PIN_OTYPE_PUSHPULL(GPIOE_PIN6) | \ | ||
| 828 | PIN_OTYPE_PUSHPULL(GPIOE_PIN7) | \ | ||
| 829 | PIN_OTYPE_PUSHPULL(GPIOE_PIN8) | \ | ||
| 830 | PIN_OTYPE_PUSHPULL(GPIOE_PIN9) | \ | ||
| 831 | PIN_OTYPE_PUSHPULL(GPIOE_PIN10) | \ | ||
| 832 | PIN_OTYPE_PUSHPULL(GPIOE_PIN11) | \ | ||
| 833 | PIN_OTYPE_PUSHPULL(GPIOE_PIN12) | \ | ||
| 834 | PIN_OTYPE_PUSHPULL(GPIOE_PIN13) | \ | ||
| 835 | PIN_OTYPE_PUSHPULL(GPIOE_PIN14) | \ | ||
| 836 | PIN_OTYPE_PUSHPULL(GPIOE_PIN15)) | ||
| 837 | #define VAL_GPIOE_OSPEEDR (PIN_OSPEED_HIGH(GPIOE_PIN0) | \ | ||
| 838 | PIN_OSPEED_HIGH(GPIOE_PIN1) | \ | ||
| 839 | PIN_OSPEED_HIGH(GPIOE_PIN2) | \ | ||
| 840 | PIN_OSPEED_HIGH(GPIOE_PIN3) | \ | ||
| 841 | PIN_OSPEED_HIGH(GPIOE_PIN4) | \ | ||
| 842 | PIN_OSPEED_HIGH(GPIOE_PIN5) | \ | ||
| 843 | PIN_OSPEED_HIGH(GPIOE_PIN6) | \ | ||
| 844 | PIN_OSPEED_HIGH(GPIOE_PIN7) | \ | ||
| 845 | PIN_OSPEED_HIGH(GPIOE_PIN8) | \ | ||
| 846 | PIN_OSPEED_HIGH(GPIOE_PIN9) | \ | ||
| 847 | PIN_OSPEED_HIGH(GPIOE_PIN10) | \ | ||
| 848 | PIN_OSPEED_HIGH(GPIOE_PIN11) | \ | ||
| 849 | PIN_OSPEED_HIGH(GPIOE_PIN12) | \ | ||
| 850 | PIN_OSPEED_HIGH(GPIOE_PIN13) | \ | ||
| 851 | PIN_OSPEED_HIGH(GPIOE_PIN14) | \ | ||
| 852 | PIN_OSPEED_HIGH(GPIOE_PIN15)) | ||
| 853 | #define VAL_GPIOE_PUPDR (PIN_PUPDR_PULLUP(GPIOE_PIN0) | \ | ||
| 854 | PIN_PUPDR_PULLUP(GPIOE_PIN1) | \ | ||
| 855 | PIN_PUPDR_PULLUP(GPIOE_PIN2) | \ | ||
| 856 | PIN_PUPDR_PULLUP(GPIOE_PIN3) | \ | ||
| 857 | PIN_PUPDR_PULLUP(GPIOE_PIN4) | \ | ||
| 858 | PIN_PUPDR_PULLUP(GPIOE_PIN5) | \ | ||
| 859 | PIN_PUPDR_PULLUP(GPIOE_PIN6) | \ | ||
| 860 | PIN_PUPDR_PULLUP(GPIOE_PIN7) | \ | ||
| 861 | PIN_PUPDR_PULLUP(GPIOE_PIN8) | \ | ||
| 862 | PIN_PUPDR_PULLUP(GPIOE_PIN9) | \ | ||
| 863 | PIN_PUPDR_PULLUP(GPIOE_PIN10) | \ | ||
| 864 | PIN_PUPDR_PULLUP(GPIOE_PIN11) | \ | ||
| 865 | PIN_PUPDR_PULLUP(GPIOE_PIN12) | \ | ||
| 866 | PIN_PUPDR_PULLUP(GPIOE_PIN13) | \ | ||
| 867 | PIN_PUPDR_PULLUP(GPIOE_PIN14) | \ | ||
| 868 | PIN_PUPDR_PULLUP(GPIOE_PIN15)) | ||
| 869 | #define VAL_GPIOE_ODR (PIN_ODR_HIGH(GPIOE_PIN0) | \ | ||
| 870 | PIN_ODR_HIGH(GPIOE_PIN1) | \ | ||
| 871 | PIN_ODR_HIGH(GPIOE_PIN2) | \ | ||
| 872 | PIN_ODR_HIGH(GPIOE_PIN3) | \ | ||
| 873 | PIN_ODR_HIGH(GPIOE_PIN4) | \ | ||
| 874 | PIN_ODR_HIGH(GPIOE_PIN5) | \ | ||
| 875 | PIN_ODR_HIGH(GPIOE_PIN6) | \ | ||
| 876 | PIN_ODR_HIGH(GPIOE_PIN7) | \ | ||
| 877 | PIN_ODR_HIGH(GPIOE_PIN8) | \ | ||
| 878 | PIN_ODR_HIGH(GPIOE_PIN9) | \ | ||
| 879 | PIN_ODR_HIGH(GPIOE_PIN10) | \ | ||
| 880 | PIN_ODR_HIGH(GPIOE_PIN11) | \ | ||
| 881 | PIN_ODR_HIGH(GPIOE_PIN12) | \ | ||
| 882 | PIN_ODR_HIGH(GPIOE_PIN13) | \ | ||
| 883 | PIN_ODR_HIGH(GPIOE_PIN14) | \ | ||
| 884 | PIN_ODR_HIGH(GPIOE_PIN15)) | ||
| 885 | #define VAL_GPIOE_AFRL (PIN_AFIO_AF(GPIOE_PIN0, 0U) | \ | ||
| 886 | PIN_AFIO_AF(GPIOE_PIN1, 0U) | \ | ||
| 887 | PIN_AFIO_AF(GPIOE_PIN2, 0U) | \ | ||
| 888 | PIN_AFIO_AF(GPIOE_PIN3, 0U) | \ | ||
| 889 | PIN_AFIO_AF(GPIOE_PIN4, 0U) | \ | ||
| 890 | PIN_AFIO_AF(GPIOE_PIN5, 0U) | \ | ||
| 891 | PIN_AFIO_AF(GPIOE_PIN6, 0U) | \ | ||
| 892 | PIN_AFIO_AF(GPIOE_PIN7, 0U)) | ||
| 893 | #define VAL_GPIOE_AFRH (PIN_AFIO_AF(GPIOE_PIN8, 0U) | \ | ||
| 894 | PIN_AFIO_AF(GPIOE_PIN9, 0U) | \ | ||
| 895 | PIN_AFIO_AF(GPIOE_PIN10, 0U) | \ | ||
| 896 | PIN_AFIO_AF(GPIOE_PIN11, 0U) | \ | ||
| 897 | PIN_AFIO_AF(GPIOE_PIN12, 0U) | \ | ||
| 898 | PIN_AFIO_AF(GPIOE_PIN13, 0U) | \ | ||
| 899 | PIN_AFIO_AF(GPIOE_PIN14, 0U) | \ | ||
| 900 | PIN_AFIO_AF(GPIOE_PIN15, 0U)) | ||
| 901 | |||
| 902 | /* | ||
| 903 | * GPIOF setup: | ||
| 904 | * | ||
| 905 | * PF0 - PIN0 (input pullup). | ||
| 906 | * PF1 - PIN1 (input pullup). | ||
| 907 | * PF2 - PIN2 (input pullup). | ||
| 908 | * PF3 - PIN3 (input pullup). | ||
| 909 | * PF4 - PIN4 (input pullup). | ||
| 910 | * PF5 - PIN5 (input pullup). | ||
| 911 | * PF6 - PIN6 (input pullup). | ||
| 912 | * PF7 - PIN7 (input pullup). | ||
| 913 | * PF8 - PIN8 (input pullup). | ||
| 914 | * PF9 - PIN9 (input pullup). | ||
| 915 | * PF10 - PIN10 (input pullup). | ||
| 916 | * PF11 - PIN11 (input pullup). | ||
| 917 | * PF12 - PIN12 (input pullup). | ||
| 918 | * PF13 - PIN13 (input pullup). | ||
| 919 | * PF14 - PIN14 (input pullup). | ||
| 920 | * PF15 - PIN15 (input pullup). | ||
| 921 | */ | ||
| 922 | #define VAL_GPIOF_MODER (PIN_MODE_INPUT(GPIOF_PIN0) | \ | ||
| 923 | PIN_MODE_INPUT(GPIOF_PIN1) | \ | ||
| 924 | PIN_MODE_INPUT(GPIOF_PIN2) | \ | ||
| 925 | PIN_MODE_INPUT(GPIOF_PIN3) | \ | ||
| 926 | PIN_MODE_INPUT(GPIOF_PIN4) | \ | ||
| 927 | PIN_MODE_INPUT(GPIOF_PIN5) | \ | ||
| 928 | PIN_MODE_INPUT(GPIOF_PIN6) | \ | ||
| 929 | PIN_MODE_INPUT(GPIOF_PIN7) | \ | ||
| 930 | PIN_MODE_INPUT(GPIOF_PIN8) | \ | ||
| 931 | PIN_MODE_INPUT(GPIOF_PIN9) | \ | ||
| 932 | PIN_MODE_INPUT(GPIOF_PIN10) | \ | ||
| 933 | PIN_MODE_INPUT(GPIOF_PIN11) | \ | ||
| 934 | PIN_MODE_INPUT(GPIOF_PIN12) | \ | ||
| 935 | PIN_MODE_INPUT(GPIOF_PIN13) | \ | ||
| 936 | PIN_MODE_INPUT(GPIOF_PIN14) | \ | ||
| 937 | PIN_MODE_INPUT(GPIOF_PIN15)) | ||
| 938 | #define VAL_GPIOF_OTYPER (PIN_OTYPE_PUSHPULL(GPIOF_PIN0) | \ | ||
| 939 | PIN_OTYPE_PUSHPULL(GPIOF_PIN1) | \ | ||
| 940 | PIN_OTYPE_PUSHPULL(GPIOF_PIN2) | \ | ||
| 941 | PIN_OTYPE_PUSHPULL(GPIOF_PIN3) | \ | ||
| 942 | PIN_OTYPE_PUSHPULL(GPIOF_PIN4) | \ | ||
| 943 | PIN_OTYPE_PUSHPULL(GPIOF_PIN5) | \ | ||
| 944 | PIN_OTYPE_PUSHPULL(GPIOF_PIN6) | \ | ||
| 945 | PIN_OTYPE_PUSHPULL(GPIOF_PIN7) | \ | ||
| 946 | PIN_OTYPE_PUSHPULL(GPIOF_PIN8) | \ | ||
| 947 | PIN_OTYPE_PUSHPULL(GPIOF_PIN9) | \ | ||
| 948 | PIN_OTYPE_PUSHPULL(GPIOF_PIN10) | \ | ||
| 949 | PIN_OTYPE_PUSHPULL(GPIOF_PIN11) | \ | ||
| 950 | PIN_OTYPE_PUSHPULL(GPIOF_PIN12) | \ | ||
| 951 | PIN_OTYPE_PUSHPULL(GPIOF_PIN13) | \ | ||
| 952 | PIN_OTYPE_PUSHPULL(GPIOF_PIN14) | \ | ||
| 953 | PIN_OTYPE_PUSHPULL(GPIOF_PIN15)) | ||
| 954 | #define VAL_GPIOF_OSPEEDR (PIN_OSPEED_HIGH(GPIOF_PIN0) | \ | ||
| 955 | PIN_OSPEED_HIGH(GPIOF_PIN1) | \ | ||
| 956 | PIN_OSPEED_HIGH(GPIOF_PIN2) | \ | ||
| 957 | PIN_OSPEED_HIGH(GPIOF_PIN3) | \ | ||
| 958 | PIN_OSPEED_HIGH(GPIOF_PIN4) | \ | ||
| 959 | PIN_OSPEED_HIGH(GPIOF_PIN5) | \ | ||
| 960 | PIN_OSPEED_HIGH(GPIOF_PIN6) | \ | ||
| 961 | PIN_OSPEED_HIGH(GPIOF_PIN7) | \ | ||
| 962 | PIN_OSPEED_HIGH(GPIOF_PIN8) | \ | ||
| 963 | PIN_OSPEED_HIGH(GPIOF_PIN9) | \ | ||
| 964 | PIN_OSPEED_HIGH(GPIOF_PIN10) | \ | ||
| 965 | PIN_OSPEED_HIGH(GPIOF_PIN11) | \ | ||
| 966 | PIN_OSPEED_HIGH(GPIOF_PIN12) | \ | ||
| 967 | PIN_OSPEED_HIGH(GPIOF_PIN13) | \ | ||
| 968 | PIN_OSPEED_HIGH(GPIOF_PIN14) | \ | ||
| 969 | PIN_OSPEED_HIGH(GPIOF_PIN15)) | ||
| 970 | #define VAL_GPIOF_PUPDR (PIN_PUPDR_PULLUP(GPIOF_PIN0) | \ | ||
| 971 | PIN_PUPDR_PULLUP(GPIOF_PIN1) | \ | ||
| 972 | PIN_PUPDR_PULLUP(GPIOF_PIN2) | \ | ||
| 973 | PIN_PUPDR_PULLUP(GPIOF_PIN3) | \ | ||
| 974 | PIN_PUPDR_PULLUP(GPIOF_PIN4) | \ | ||
| 975 | PIN_PUPDR_PULLUP(GPIOF_PIN5) | \ | ||
| 976 | PIN_PUPDR_PULLUP(GPIOF_PIN6) | \ | ||
| 977 | PIN_PUPDR_PULLUP(GPIOF_PIN7) | \ | ||
| 978 | PIN_PUPDR_PULLUP(GPIOF_PIN8) | \ | ||
| 979 | PIN_PUPDR_PULLUP(GPIOF_PIN9) | \ | ||
| 980 | PIN_PUPDR_PULLUP(GPIOF_PIN10) | \ | ||
| 981 | PIN_PUPDR_PULLUP(GPIOF_PIN11) | \ | ||
| 982 | PIN_PUPDR_PULLUP(GPIOF_PIN12) | \ | ||
| 983 | PIN_PUPDR_PULLUP(GPIOF_PIN13) | \ | ||
| 984 | PIN_PUPDR_PULLUP(GPIOF_PIN14) | \ | ||
| 985 | PIN_PUPDR_PULLUP(GPIOF_PIN15)) | ||
| 986 | #define VAL_GPIOF_ODR (PIN_ODR_HIGH(GPIOF_PIN0) | \ | ||
| 987 | PIN_ODR_HIGH(GPIOF_PIN1) | \ | ||
| 988 | PIN_ODR_HIGH(GPIOF_PIN2) | \ | ||
| 989 | PIN_ODR_HIGH(GPIOF_PIN3) | \ | ||
| 990 | PIN_ODR_HIGH(GPIOF_PIN4) | \ | ||
| 991 | PIN_ODR_HIGH(GPIOF_PIN5) | \ | ||
| 992 | PIN_ODR_HIGH(GPIOF_PIN6) | \ | ||
| 993 | PIN_ODR_HIGH(GPIOF_PIN7) | \ | ||
| 994 | PIN_ODR_HIGH(GPIOF_PIN8) | \ | ||
| 995 | PIN_ODR_HIGH(GPIOF_PIN9) | \ | ||
| 996 | PIN_ODR_HIGH(GPIOF_PIN10) | \ | ||
| 997 | PIN_ODR_HIGH(GPIOF_PIN11) | \ | ||
| 998 | PIN_ODR_HIGH(GPIOF_PIN12) | \ | ||
| 999 | PIN_ODR_HIGH(GPIOF_PIN13) | \ | ||
| 1000 | PIN_ODR_HIGH(GPIOF_PIN14) | \ | ||
| 1001 | PIN_ODR_HIGH(GPIOF_PIN15)) | ||
| 1002 | #define VAL_GPIOF_AFRL (PIN_AFIO_AF(GPIOF_PIN0, 0U) | \ | ||
| 1003 | PIN_AFIO_AF(GPIOF_PIN1, 0U) | \ | ||
| 1004 | PIN_AFIO_AF(GPIOF_PIN2, 0U) | \ | ||
| 1005 | PIN_AFIO_AF(GPIOF_PIN3, 0U) | \ | ||
| 1006 | PIN_AFIO_AF(GPIOF_PIN4, 0U) | \ | ||
| 1007 | PIN_AFIO_AF(GPIOF_PIN5, 0U) | \ | ||
| 1008 | PIN_AFIO_AF(GPIOF_PIN6, 0U) | \ | ||
| 1009 | PIN_AFIO_AF(GPIOF_PIN7, 0U)) | ||
| 1010 | #define VAL_GPIOF_AFRH (PIN_AFIO_AF(GPIOF_PIN8, 0U) | \ | ||
| 1011 | PIN_AFIO_AF(GPIOF_PIN9, 0U) | \ | ||
| 1012 | PIN_AFIO_AF(GPIOF_PIN10, 0U) | \ | ||
| 1013 | PIN_AFIO_AF(GPIOF_PIN11, 0U) | \ | ||
| 1014 | PIN_AFIO_AF(GPIOF_PIN12, 0U) | \ | ||
| 1015 | PIN_AFIO_AF(GPIOF_PIN13, 0U) | \ | ||
| 1016 | PIN_AFIO_AF(GPIOF_PIN14, 0U) | \ | ||
| 1017 | PIN_AFIO_AF(GPIOF_PIN15, 0U)) | ||
| 1018 | |||
| 1019 | /* | ||
| 1020 | * GPIOG setup: | ||
| 1021 | * | ||
| 1022 | * PG0 - PIN0 (input pullup). | ||
| 1023 | * PG1 - PIN1 (input pullup). | ||
| 1024 | * PG2 - PIN2 (input pullup). | ||
| 1025 | * PG3 - PIN3 (input pullup). | ||
| 1026 | * PG4 - PIN4 (input pullup). | ||
| 1027 | * PG5 - PIN5 (input pullup). | ||
| 1028 | * PG6 - PIN6 (input pullup). | ||
| 1029 | * PG7 - PIN7 (input pullup). | ||
| 1030 | * PG8 - PIN8 (input pullup). | ||
| 1031 | * PG9 - PIN9 (input pullup). | ||
| 1032 | * PG10 - PIN10 (input pullup). | ||
| 1033 | * PG11 - PIN11 (input pullup). | ||
| 1034 | * PG12 - PIN12 (input pullup). | ||
| 1035 | * PG13 - PIN13 (input pullup). | ||
| 1036 | * PG14 - PIN14 (input pullup). | ||
| 1037 | * PG15 - PIN15 (input pullup). | ||
| 1038 | */ | ||
| 1039 | #define VAL_GPIOG_MODER (PIN_MODE_INPUT(GPIOG_PIN0) | \ | ||
| 1040 | PIN_MODE_INPUT(GPIOG_PIN1) | \ | ||
| 1041 | PIN_MODE_INPUT(GPIOG_PIN2) | \ | ||
| 1042 | PIN_MODE_INPUT(GPIOG_PIN3) | \ | ||
| 1043 | PIN_MODE_INPUT(GPIOG_PIN4) | \ | ||
| 1044 | PIN_MODE_INPUT(GPIOG_PIN5) | \ | ||
| 1045 | PIN_MODE_INPUT(GPIOG_PIN6) | \ | ||
| 1046 | PIN_MODE_INPUT(GPIOG_PIN7) | \ | ||
| 1047 | PIN_MODE_INPUT(GPIOG_PIN8) | \ | ||
| 1048 | PIN_MODE_INPUT(GPIOG_PIN9) | \ | ||
| 1049 | PIN_MODE_INPUT(GPIOG_PIN10) | \ | ||
| 1050 | PIN_MODE_INPUT(GPIOG_PIN11) | \ | ||
| 1051 | PIN_MODE_INPUT(GPIOG_PIN12) | \ | ||
| 1052 | PIN_MODE_INPUT(GPIOG_PIN13) | \ | ||
| 1053 | PIN_MODE_INPUT(GPIOG_PIN14) | \ | ||
| 1054 | PIN_MODE_INPUT(GPIOG_PIN15)) | ||
| 1055 | #define VAL_GPIOG_OTYPER (PIN_OTYPE_PUSHPULL(GPIOG_PIN0) | \ | ||
| 1056 | PIN_OTYPE_PUSHPULL(GPIOG_PIN1) | \ | ||
| 1057 | PIN_OTYPE_PUSHPULL(GPIOG_PIN2) | \ | ||
| 1058 | PIN_OTYPE_PUSHPULL(GPIOG_PIN3) | \ | ||
| 1059 | PIN_OTYPE_PUSHPULL(GPIOG_PIN4) | \ | ||
| 1060 | PIN_OTYPE_PUSHPULL(GPIOG_PIN5) | \ | ||
| 1061 | PIN_OTYPE_PUSHPULL(GPIOG_PIN6) | \ | ||
| 1062 | PIN_OTYPE_PUSHPULL(GPIOG_PIN7) | \ | ||
| 1063 | PIN_OTYPE_PUSHPULL(GPIOG_PIN8) | \ | ||
| 1064 | PIN_OTYPE_PUSHPULL(GPIOG_PIN9) | \ | ||
| 1065 | PIN_OTYPE_PUSHPULL(GPIOG_PIN10) | \ | ||
| 1066 | PIN_OTYPE_PUSHPULL(GPIOG_PIN11) | \ | ||
| 1067 | PIN_OTYPE_PUSHPULL(GPIOG_PIN12) | \ | ||
| 1068 | PIN_OTYPE_PUSHPULL(GPIOG_PIN13) | \ | ||
| 1069 | PIN_OTYPE_PUSHPULL(GPIOG_PIN14) | \ | ||
| 1070 | PIN_OTYPE_PUSHPULL(GPIOG_PIN15)) | ||
| 1071 | #define VAL_GPIOG_OSPEEDR (PIN_OSPEED_HIGH(GPIOG_PIN0) | \ | ||
| 1072 | PIN_OSPEED_HIGH(GPIOG_PIN1) | \ | ||
| 1073 | PIN_OSPEED_HIGH(GPIOG_PIN2) | \ | ||
| 1074 | PIN_OSPEED_HIGH(GPIOG_PIN3) | \ | ||
| 1075 | PIN_OSPEED_HIGH(GPIOG_PIN4) | \ | ||
| 1076 | PIN_OSPEED_HIGH(GPIOG_PIN5) | \ | ||
| 1077 | PIN_OSPEED_HIGH(GPIOG_PIN6) | \ | ||
| 1078 | PIN_OSPEED_HIGH(GPIOG_PIN7) | \ | ||
| 1079 | PIN_OSPEED_HIGH(GPIOG_PIN8) | \ | ||
| 1080 | PIN_OSPEED_HIGH(GPIOG_PIN9) | \ | ||
| 1081 | PIN_OSPEED_HIGH(GPIOG_PIN10) | \ | ||
| 1082 | PIN_OSPEED_HIGH(GPIOG_PIN11) | \ | ||
| 1083 | PIN_OSPEED_HIGH(GPIOG_PIN12) | \ | ||
| 1084 | PIN_OSPEED_HIGH(GPIOG_PIN13) | \ | ||
| 1085 | PIN_OSPEED_HIGH(GPIOG_PIN14) | \ | ||
| 1086 | PIN_OSPEED_HIGH(GPIOG_PIN15)) | ||
| 1087 | #define VAL_GPIOG_PUPDR (PIN_PUPDR_PULLUP(GPIOG_PIN0) | \ | ||
| 1088 | PIN_PUPDR_PULLUP(GPIOG_PIN1) | \ | ||
| 1089 | PIN_PUPDR_PULLUP(GPIOG_PIN2) | \ | ||
| 1090 | PIN_PUPDR_PULLUP(GPIOG_PIN3) | \ | ||
| 1091 | PIN_PUPDR_PULLUP(GPIOG_PIN4) | \ | ||
| 1092 | PIN_PUPDR_PULLUP(GPIOG_PIN5) | \ | ||
| 1093 | PIN_PUPDR_PULLUP(GPIOG_PIN6) | \ | ||
| 1094 | PIN_PUPDR_PULLUP(GPIOG_PIN7) | \ | ||
| 1095 | PIN_PUPDR_PULLUP(GPIOG_PIN8) | \ | ||
| 1096 | PIN_PUPDR_PULLUP(GPIOG_PIN9) | \ | ||
| 1097 | PIN_PUPDR_PULLUP(GPIOG_PIN10) | \ | ||
| 1098 | PIN_PUPDR_PULLUP(GPIOG_PIN11) | \ | ||
| 1099 | PIN_PUPDR_PULLUP(GPIOG_PIN12) | \ | ||
| 1100 | PIN_PUPDR_PULLUP(GPIOG_PIN13) | \ | ||
| 1101 | PIN_PUPDR_PULLUP(GPIOG_PIN14) | \ | ||
| 1102 | PIN_PUPDR_PULLUP(GPIOG_PIN15)) | ||
| 1103 | #define VAL_GPIOG_ODR (PIN_ODR_HIGH(GPIOG_PIN0) | \ | ||
| 1104 | PIN_ODR_HIGH(GPIOG_PIN1) | \ | ||
| 1105 | PIN_ODR_HIGH(GPIOG_PIN2) | \ | ||
| 1106 | PIN_ODR_HIGH(GPIOG_PIN3) | \ | ||
| 1107 | PIN_ODR_HIGH(GPIOG_PIN4) | \ | ||
| 1108 | PIN_ODR_HIGH(GPIOG_PIN5) | \ | ||
| 1109 | PIN_ODR_HIGH(GPIOG_PIN6) | \ | ||
| 1110 | PIN_ODR_HIGH(GPIOG_PIN7) | \ | ||
| 1111 | PIN_ODR_HIGH(GPIOG_PIN8) | \ | ||
| 1112 | PIN_ODR_HIGH(GPIOG_PIN9) | \ | ||
| 1113 | PIN_ODR_HIGH(GPIOG_PIN10) | \ | ||
| 1114 | PIN_ODR_HIGH(GPIOG_PIN11) | \ | ||
| 1115 | PIN_ODR_HIGH(GPIOG_PIN12) | \ | ||
| 1116 | PIN_ODR_HIGH(GPIOG_PIN13) | \ | ||
| 1117 | PIN_ODR_HIGH(GPIOG_PIN14) | \ | ||
| 1118 | PIN_ODR_HIGH(GPIOG_PIN15)) | ||
| 1119 | #define VAL_GPIOG_AFRL (PIN_AFIO_AF(GPIOG_PIN0, 0U) | \ | ||
| 1120 | PIN_AFIO_AF(GPIOG_PIN1, 0U) | \ | ||
| 1121 | PIN_AFIO_AF(GPIOG_PIN2, 0U) | \ | ||
| 1122 | PIN_AFIO_AF(GPIOG_PIN3, 0U) | \ | ||
| 1123 | PIN_AFIO_AF(GPIOG_PIN4, 0U) | \ | ||
| 1124 | PIN_AFIO_AF(GPIOG_PIN5, 0U) | \ | ||
| 1125 | PIN_AFIO_AF(GPIOG_PIN6, 0U) | \ | ||
| 1126 | PIN_AFIO_AF(GPIOG_PIN7, 0U)) | ||
| 1127 | #define VAL_GPIOG_AFRH (PIN_AFIO_AF(GPIOG_PIN8, 0U) | \ | ||
| 1128 | PIN_AFIO_AF(GPIOG_PIN9, 0U) | \ | ||
| 1129 | PIN_AFIO_AF(GPIOG_PIN10, 0U) | \ | ||
| 1130 | PIN_AFIO_AF(GPIOG_PIN11, 0U) | \ | ||
| 1131 | PIN_AFIO_AF(GPIOG_PIN12, 0U) | \ | ||
| 1132 | PIN_AFIO_AF(GPIOG_PIN13, 0U) | \ | ||
| 1133 | PIN_AFIO_AF(GPIOG_PIN14, 0U) | \ | ||
| 1134 | PIN_AFIO_AF(GPIOG_PIN15, 0U)) | ||
| 1135 | |||
| 1136 | /* | ||
| 1137 | * GPIOH setup: | ||
| 1138 | * | ||
| 1139 | * PH0 - OSC_IN (input floating). | ||
| 1140 | * PH1 - OSC_OUT (input floating). | ||
| 1141 | * PH2 - PIN2 (input pullup). | ||
| 1142 | * PH3 - PIN3 (input pullup). | ||
| 1143 | * PH4 - PIN4 (input pullup). | ||
| 1144 | * PH5 - PIN5 (input pullup). | ||
| 1145 | * PH6 - PIN6 (input pullup). | ||
| 1146 | * PH7 - PIN7 (input pullup). | ||
| 1147 | * PH8 - PIN8 (input pullup). | ||
| 1148 | * PH9 - PIN9 (input pullup). | ||
| 1149 | * PH10 - PIN10 (input pullup). | ||
| 1150 | * PH11 - PIN11 (input pullup). | ||
| 1151 | * PH12 - PIN12 (input pullup). | ||
| 1152 | * PH13 - PIN13 (input pullup). | ||
| 1153 | * PH14 - PIN14 (input pullup). | ||
| 1154 | * PH15 - PIN15 (input pullup). | ||
| 1155 | */ | ||
| 1156 | #define VAL_GPIOH_MODER (PIN_MODE_INPUT(GPIOH_OSC_IN) | \ | ||
| 1157 | PIN_MODE_INPUT(GPIOH_OSC_OUT) | \ | ||
| 1158 | PIN_MODE_INPUT(GPIOH_PIN2) | \ | ||
| 1159 | PIN_MODE_INPUT(GPIOH_PIN3) | \ | ||
| 1160 | PIN_MODE_INPUT(GPIOH_PIN4) | \ | ||
| 1161 | PIN_MODE_INPUT(GPIOH_PIN5) | \ | ||
| 1162 | PIN_MODE_INPUT(GPIOH_PIN6) | \ | ||
| 1163 | PIN_MODE_INPUT(GPIOH_PIN7) | \ | ||
| 1164 | PIN_MODE_INPUT(GPIOH_PIN8) | \ | ||
| 1165 | PIN_MODE_INPUT(GPIOH_PIN9) | \ | ||
| 1166 | PIN_MODE_INPUT(GPIOH_PIN10) | \ | ||
| 1167 | PIN_MODE_INPUT(GPIOH_PIN11) | \ | ||
| 1168 | PIN_MODE_INPUT(GPIOH_PIN12) | \ | ||
| 1169 | PIN_MODE_INPUT(GPIOH_PIN13) | \ | ||
| 1170 | PIN_MODE_INPUT(GPIOH_PIN14) | \ | ||
| 1171 | PIN_MODE_INPUT(GPIOH_PIN15)) | ||
| 1172 | #define VAL_GPIOH_OTYPER (PIN_OTYPE_PUSHPULL(GPIOH_OSC_IN) | \ | ||
| 1173 | PIN_OTYPE_PUSHPULL(GPIOH_OSC_OUT) | \ | ||
| 1174 | PIN_OTYPE_PUSHPULL(GPIOH_PIN2) | \ | ||
| 1175 | PIN_OTYPE_PUSHPULL(GPIOH_PIN3) | \ | ||
| 1176 | PIN_OTYPE_PUSHPULL(GPIOH_PIN4) | \ | ||
| 1177 | PIN_OTYPE_PUSHPULL(GPIOH_PIN5) | \ | ||
| 1178 | PIN_OTYPE_PUSHPULL(GPIOH_PIN6) | \ | ||
| 1179 | PIN_OTYPE_PUSHPULL(GPIOH_PIN7) | \ | ||
| 1180 | PIN_OTYPE_PUSHPULL(GPIOH_PIN8) | \ | ||
| 1181 | PIN_OTYPE_PUSHPULL(GPIOH_PIN9) | \ | ||
| 1182 | PIN_OTYPE_PUSHPULL(GPIOH_PIN10) | \ | ||
| 1183 | PIN_OTYPE_PUSHPULL(GPIOH_PIN11) | \ | ||
| 1184 | PIN_OTYPE_PUSHPULL(GPIOH_PIN12) | \ | ||
| 1185 | PIN_OTYPE_PUSHPULL(GPIOH_PIN13) | \ | ||
| 1186 | PIN_OTYPE_PUSHPULL(GPIOH_PIN14) | \ | ||
| 1187 | PIN_OTYPE_PUSHPULL(GPIOH_PIN15)) | ||
| 1188 | #define VAL_GPIOH_OSPEEDR (PIN_OSPEED_HIGH(GPIOH_OSC_IN) | \ | ||
| 1189 | PIN_OSPEED_HIGH(GPIOH_OSC_OUT) | \ | ||
| 1190 | PIN_OSPEED_HIGH(GPIOH_PIN2) | \ | ||
| 1191 | PIN_OSPEED_HIGH(GPIOH_PIN3) | \ | ||
| 1192 | PIN_OSPEED_HIGH(GPIOH_PIN4) | \ | ||
| 1193 | PIN_OSPEED_HIGH(GPIOH_PIN5) | \ | ||
| 1194 | PIN_OSPEED_HIGH(GPIOH_PIN6) | \ | ||
| 1195 | PIN_OSPEED_HIGH(GPIOH_PIN7) | \ | ||
| 1196 | PIN_OSPEED_HIGH(GPIOH_PIN8) | \ | ||
| 1197 | PIN_OSPEED_HIGH(GPIOH_PIN9) | \ | ||
| 1198 | PIN_OSPEED_HIGH(GPIOH_PIN10) | \ | ||
| 1199 | PIN_OSPEED_HIGH(GPIOH_PIN11) | \ | ||
| 1200 | PIN_OSPEED_HIGH(GPIOH_PIN12) | \ | ||
| 1201 | PIN_OSPEED_HIGH(GPIOH_PIN13) | \ | ||
| 1202 | PIN_OSPEED_HIGH(GPIOH_PIN14) | \ | ||
| 1203 | PIN_OSPEED_HIGH(GPIOH_PIN15)) | ||
| 1204 | #define VAL_GPIOH_PUPDR (PIN_PUPDR_FLOATING(GPIOH_OSC_IN) | \ | ||
| 1205 | PIN_PUPDR_FLOATING(GPIOH_OSC_OUT) | \ | ||
| 1206 | PIN_PUPDR_PULLUP(GPIOH_PIN2) | \ | ||
| 1207 | PIN_PUPDR_PULLUP(GPIOH_PIN3) | \ | ||
| 1208 | PIN_PUPDR_PULLUP(GPIOH_PIN4) | \ | ||
| 1209 | PIN_PUPDR_PULLUP(GPIOH_PIN5) | \ | ||
| 1210 | PIN_PUPDR_PULLUP(GPIOH_PIN6) | \ | ||
| 1211 | PIN_PUPDR_PULLUP(GPIOH_PIN7) | \ | ||
| 1212 | PIN_PUPDR_PULLUP(GPIOH_PIN8) | \ | ||
| 1213 | PIN_PUPDR_PULLUP(GPIOH_PIN9) | \ | ||
| 1214 | PIN_PUPDR_PULLUP(GPIOH_PIN10) | \ | ||
| 1215 | PIN_PUPDR_PULLUP(GPIOH_PIN11) | \ | ||
| 1216 | PIN_PUPDR_PULLUP(GPIOH_PIN12) | \ | ||
| 1217 | PIN_PUPDR_PULLUP(GPIOH_PIN13) | \ | ||
| 1218 | PIN_PUPDR_PULLUP(GPIOH_PIN14) | \ | ||
| 1219 | PIN_PUPDR_PULLUP(GPIOH_PIN15)) | ||
| 1220 | #define VAL_GPIOH_ODR (PIN_ODR_HIGH(GPIOH_OSC_IN) | \ | ||
| 1221 | PIN_ODR_HIGH(GPIOH_OSC_OUT) | \ | ||
| 1222 | PIN_ODR_HIGH(GPIOH_PIN2) | \ | ||
| 1223 | PIN_ODR_HIGH(GPIOH_PIN3) | \ | ||
| 1224 | PIN_ODR_HIGH(GPIOH_PIN4) | \ | ||
| 1225 | PIN_ODR_HIGH(GPIOH_PIN5) | \ | ||
| 1226 | PIN_ODR_HIGH(GPIOH_PIN6) | \ | ||
| 1227 | PIN_ODR_HIGH(GPIOH_PIN7) | \ | ||
| 1228 | PIN_ODR_HIGH(GPIOH_PIN8) | \ | ||
| 1229 | PIN_ODR_HIGH(GPIOH_PIN9) | \ | ||
| 1230 | PIN_ODR_HIGH(GPIOH_PIN10) | \ | ||
| 1231 | PIN_ODR_HIGH(GPIOH_PIN11) | \ | ||
| 1232 | PIN_ODR_HIGH(GPIOH_PIN12) | \ | ||
| 1233 | PIN_ODR_HIGH(GPIOH_PIN13) | \ | ||
| 1234 | PIN_ODR_HIGH(GPIOH_PIN14) | \ | ||
| 1235 | PIN_ODR_HIGH(GPIOH_PIN15)) | ||
| 1236 | #define VAL_GPIOH_AFRL (PIN_AFIO_AF(GPIOH_OSC_IN, 0U) | \ | ||
| 1237 | PIN_AFIO_AF(GPIOH_OSC_OUT, 0U) | \ | ||
| 1238 | PIN_AFIO_AF(GPIOH_PIN2, 0U) | \ | ||
| 1239 | PIN_AFIO_AF(GPIOH_PIN3, 0U) | \ | ||
| 1240 | PIN_AFIO_AF(GPIOH_PIN4, 0U) | \ | ||
| 1241 | PIN_AFIO_AF(GPIOH_PIN5, 0U) | \ | ||
| 1242 | PIN_AFIO_AF(GPIOH_PIN6, 0U) | \ | ||
| 1243 | PIN_AFIO_AF(GPIOH_PIN7, 0U)) | ||
| 1244 | #define VAL_GPIOH_AFRH (PIN_AFIO_AF(GPIOH_PIN8, 0U) | \ | ||
| 1245 | PIN_AFIO_AF(GPIOH_PIN9, 0U) | \ | ||
| 1246 | PIN_AFIO_AF(GPIOH_PIN10, 0U) | \ | ||
| 1247 | PIN_AFIO_AF(GPIOH_PIN11, 0U) | \ | ||
| 1248 | PIN_AFIO_AF(GPIOH_PIN12, 0U) | \ | ||
| 1249 | PIN_AFIO_AF(GPIOH_PIN13, 0U) | \ | ||
| 1250 | PIN_AFIO_AF(GPIOH_PIN14, 0U) | \ | ||
| 1251 | PIN_AFIO_AF(GPIOH_PIN15, 0U)) | ||
| 1252 | |||
| 1253 | /* | ||
| 1254 | * GPIOI setup: | ||
| 1255 | * | ||
| 1256 | * PI0 - PIN0 (input pullup). | ||
| 1257 | * PI1 - PIN1 (input pullup). | ||
| 1258 | * PI2 - PIN2 (input pullup). | ||
| 1259 | * PI3 - PIN3 (input pullup). | ||
| 1260 | * PI4 - PIN4 (input pullup). | ||
| 1261 | * PI5 - PIN5 (input pullup). | ||
| 1262 | * PI6 - PIN6 (input pullup). | ||
| 1263 | * PI7 - PIN7 (input pullup). | ||
| 1264 | * PI8 - PIN8 (input pullup). | ||
| 1265 | * PI9 - PIN9 (input pullup). | ||
| 1266 | * PI10 - PIN10 (input pullup). | ||
| 1267 | * PI11 - PIN11 (input pullup). | ||
| 1268 | * PI12 - PIN12 (input pullup). | ||
| 1269 | * PI13 - PIN13 (input pullup). | ||
| 1270 | * PI14 - PIN14 (input pullup). | ||
| 1271 | * PI15 - PIN15 (input pullup). | ||
| 1272 | */ | ||
| 1273 | #define VAL_GPIOI_MODER (PIN_MODE_INPUT(GPIOI_PIN0) | \ | ||
| 1274 | PIN_MODE_INPUT(GPIOI_PIN1) | \ | ||
| 1275 | PIN_MODE_INPUT(GPIOI_PIN2) | \ | ||
| 1276 | PIN_MODE_INPUT(GPIOI_PIN3) | \ | ||
| 1277 | PIN_MODE_INPUT(GPIOI_PIN4) | \ | ||
| 1278 | PIN_MODE_INPUT(GPIOI_PIN5) | \ | ||
| 1279 | PIN_MODE_INPUT(GPIOI_PIN6) | \ | ||
| 1280 | PIN_MODE_INPUT(GPIOI_PIN7) | \ | ||
| 1281 | PIN_MODE_INPUT(GPIOI_PIN8) | \ | ||
| 1282 | PIN_MODE_INPUT(GPIOI_PIN9) | \ | ||
| 1283 | PIN_MODE_INPUT(GPIOI_PIN10) | \ | ||
| 1284 | PIN_MODE_INPUT(GPIOI_PIN11) | \ | ||
| 1285 | PIN_MODE_INPUT(GPIOI_PIN12) | \ | ||
| 1286 | PIN_MODE_INPUT(GPIOI_PIN13) | \ | ||
| 1287 | PIN_MODE_INPUT(GPIOI_PIN14) | \ | ||
| 1288 | PIN_MODE_INPUT(GPIOI_PIN15)) | ||
| 1289 | #define VAL_GPIOI_OTYPER (PIN_OTYPE_PUSHPULL(GPIOI_PIN0) | \ | ||
| 1290 | PIN_OTYPE_PUSHPULL(GPIOI_PIN1) | \ | ||
| 1291 | PIN_OTYPE_PUSHPULL(GPIOI_PIN2) | \ | ||
| 1292 | PIN_OTYPE_PUSHPULL(GPIOI_PIN3) | \ | ||
| 1293 | PIN_OTYPE_PUSHPULL(GPIOI_PIN4) | \ | ||
| 1294 | PIN_OTYPE_PUSHPULL(GPIOI_PIN5) | \ | ||
| 1295 | PIN_OTYPE_PUSHPULL(GPIOI_PIN6) | \ | ||
| 1296 | PIN_OTYPE_PUSHPULL(GPIOI_PIN7) | \ | ||
| 1297 | PIN_OTYPE_PUSHPULL(GPIOI_PIN8) | \ | ||
| 1298 | PIN_OTYPE_PUSHPULL(GPIOI_PIN9) | \ | ||
| 1299 | PIN_OTYPE_PUSHPULL(GPIOI_PIN10) | \ | ||
| 1300 | PIN_OTYPE_PUSHPULL(GPIOI_PIN11) | \ | ||
| 1301 | PIN_OTYPE_PUSHPULL(GPIOI_PIN12) | \ | ||
| 1302 | PIN_OTYPE_PUSHPULL(GPIOI_PIN13) | \ | ||
| 1303 | PIN_OTYPE_PUSHPULL(GPIOI_PIN14) | \ | ||
| 1304 | PIN_OTYPE_PUSHPULL(GPIOI_PIN15)) | ||
| 1305 | #define VAL_GPIOI_OSPEEDR (PIN_OSPEED_HIGH(GPIOI_PIN0) | \ | ||
| 1306 | PIN_OSPEED_HIGH(GPIOI_PIN1) | \ | ||
| 1307 | PIN_OSPEED_HIGH(GPIOI_PIN2) | \ | ||
| 1308 | PIN_OSPEED_HIGH(GPIOI_PIN3) | \ | ||
| 1309 | PIN_OSPEED_HIGH(GPIOI_PIN4) | \ | ||
| 1310 | PIN_OSPEED_HIGH(GPIOI_PIN5) | \ | ||
| 1311 | PIN_OSPEED_HIGH(GPIOI_PIN6) | \ | ||
| 1312 | PIN_OSPEED_HIGH(GPIOI_PIN7) | \ | ||
| 1313 | PIN_OSPEED_HIGH(GPIOI_PIN8) | \ | ||
| 1314 | PIN_OSPEED_HIGH(GPIOI_PIN9) | \ | ||
| 1315 | PIN_OSPEED_HIGH(GPIOI_PIN10) | \ | ||
| 1316 | PIN_OSPEED_HIGH(GPIOI_PIN11) | \ | ||
| 1317 | PIN_OSPEED_HIGH(GPIOI_PIN12) | \ | ||
| 1318 | PIN_OSPEED_HIGH(GPIOI_PIN13) | \ | ||
| 1319 | PIN_OSPEED_HIGH(GPIOI_PIN14) | \ | ||
| 1320 | PIN_OSPEED_HIGH(GPIOI_PIN15)) | ||
| 1321 | #define VAL_GPIOI_PUPDR (PIN_PUPDR_PULLUP(GPIOI_PIN0) | \ | ||
| 1322 | PIN_PUPDR_PULLUP(GPIOI_PIN1) | \ | ||
| 1323 | PIN_PUPDR_PULLUP(GPIOI_PIN2) | \ | ||
| 1324 | PIN_PUPDR_PULLUP(GPIOI_PIN3) | \ | ||
| 1325 | PIN_PUPDR_PULLUP(GPIOI_PIN4) | \ | ||
| 1326 | PIN_PUPDR_PULLUP(GPIOI_PIN5) | \ | ||
| 1327 | PIN_PUPDR_PULLUP(GPIOI_PIN6) | \ | ||
| 1328 | PIN_PUPDR_PULLUP(GPIOI_PIN7) | \ | ||
| 1329 | PIN_PUPDR_PULLUP(GPIOI_PIN8) | \ | ||
| 1330 | PIN_PUPDR_PULLUP(GPIOI_PIN9) | \ | ||
| 1331 | PIN_PUPDR_PULLUP(GPIOI_PIN10) | \ | ||
| 1332 | PIN_PUPDR_PULLUP(GPIOI_PIN11) | \ | ||
| 1333 | PIN_PUPDR_PULLUP(GPIOI_PIN12) | \ | ||
| 1334 | PIN_PUPDR_PULLUP(GPIOI_PIN13) | \ | ||
| 1335 | PIN_PUPDR_PULLUP(GPIOI_PIN14) | \ | ||
| 1336 | PIN_PUPDR_PULLUP(GPIOI_PIN15)) | ||
| 1337 | #define VAL_GPIOI_ODR (PIN_ODR_HIGH(GPIOI_PIN0) | \ | ||
| 1338 | PIN_ODR_HIGH(GPIOI_PIN1) | \ | ||
| 1339 | PIN_ODR_HIGH(GPIOI_PIN2) | \ | ||
| 1340 | PIN_ODR_HIGH(GPIOI_PIN3) | \ | ||
| 1341 | PIN_ODR_HIGH(GPIOI_PIN4) | \ | ||
| 1342 | PIN_ODR_HIGH(GPIOI_PIN5) | \ | ||
| 1343 | PIN_ODR_HIGH(GPIOI_PIN6) | \ | ||
| 1344 | PIN_ODR_HIGH(GPIOI_PIN7) | \ | ||
| 1345 | PIN_ODR_HIGH(GPIOI_PIN8) | \ | ||
| 1346 | PIN_ODR_HIGH(GPIOI_PIN9) | \ | ||
| 1347 | PIN_ODR_HIGH(GPIOI_PIN10) | \ | ||
| 1348 | PIN_ODR_HIGH(GPIOI_PIN11) | \ | ||
| 1349 | PIN_ODR_HIGH(GPIOI_PIN12) | \ | ||
| 1350 | PIN_ODR_HIGH(GPIOI_PIN13) | \ | ||
| 1351 | PIN_ODR_HIGH(GPIOI_PIN14) | \ | ||
| 1352 | PIN_ODR_HIGH(GPIOI_PIN15)) | ||
| 1353 | #define VAL_GPIOI_AFRL (PIN_AFIO_AF(GPIOI_PIN0, 0U) | \ | ||
| 1354 | PIN_AFIO_AF(GPIOI_PIN1, 0U) | \ | ||
| 1355 | PIN_AFIO_AF(GPIOI_PIN2, 0U) | \ | ||
| 1356 | PIN_AFIO_AF(GPIOI_PIN3, 0U) | \ | ||
| 1357 | PIN_AFIO_AF(GPIOI_PIN4, 0U) | \ | ||
| 1358 | PIN_AFIO_AF(GPIOI_PIN5, 0U) | \ | ||
| 1359 | PIN_AFIO_AF(GPIOI_PIN6, 0U) | \ | ||
| 1360 | PIN_AFIO_AF(GPIOI_PIN7, 0U)) | ||
| 1361 | #define VAL_GPIOI_AFRH (PIN_AFIO_AF(GPIOI_PIN8, 0U) | \ | ||
| 1362 | PIN_AFIO_AF(GPIOI_PIN9, 0U) | \ | ||
| 1363 | PIN_AFIO_AF(GPIOI_PIN10, 0U) | \ | ||
| 1364 | PIN_AFIO_AF(GPIOI_PIN11, 0U) | \ | ||
| 1365 | PIN_AFIO_AF(GPIOI_PIN12, 0U) | \ | ||
| 1366 | PIN_AFIO_AF(GPIOI_PIN13, 0U) | \ | ||
| 1367 | PIN_AFIO_AF(GPIOI_PIN14, 0U) | \ | ||
| 1368 | PIN_AFIO_AF(GPIOI_PIN15, 0U)) | ||
| 1369 | |||
| 1370 | /*===========================================================================*/ | ||
| 1371 | /* External declarations. */ | ||
| 1372 | /*===========================================================================*/ | ||
| 1373 | |||
| 1374 | #if !defined(_FROM_ASM_) | ||
| 1375 | #ifdef __cplusplus | ||
| 1376 | extern "C" { | ||
| 1377 | #endif | ||
| 1378 | void boardInit(void); | ||
| 1379 | #ifdef __cplusplus | ||
| 1380 | } | ||
| 1381 | #endif | ||
| 1382 | #endif /* _FROM_ASM_ */ | ||
| 1383 | |||
| 1384 | #endif /* BOARD_H */ | ||
diff --git a/drivers/boards/BLACKPILL_STM32_F411/board.mk b/drivers/boards/BLACKPILL_STM32_F411/board.mk new file mode 100644 index 000000000..93c1e62f5 --- /dev/null +++ b/drivers/boards/BLACKPILL_STM32_F411/board.mk | |||
| @@ -0,0 +1,9 @@ | |||
| 1 | # List of all the board related files. | ||
| 2 | BOARDSRC = $(BOARD_PATH)/boards/BLACKPILL_STM32_F411/board.c | ||
| 3 | |||
| 4 | # Required include directories | ||
| 5 | BOARDINC = $(BOARD_PATH)/boards/BLACKPILL_STM32_F411 | ||
| 6 | |||
| 7 | # Shared variables | ||
| 8 | ALLCSRC += $(BOARDSRC) | ||
| 9 | ALLINC += $(BOARDINC) | ||
diff --git a/drivers/boards/BLACKPILL_STM32_F411/cfg/board.chcfg b/drivers/boards/BLACKPILL_STM32_F411/cfg/board.chcfg new file mode 100644 index 000000000..3095409cc --- /dev/null +++ b/drivers/boards/BLACKPILL_STM32_F411/cfg/board.chcfg | |||
| @@ -0,0 +1,1193 @@ | |||
| 1 | <?xml version="1.0" encoding="UTF-8"?> | ||
| 2 | <!-- STM32F4xx board Template --> | ||
| 3 | <board | ||
| 4 | xmlns:xsi="http://www.w3.org/2001/XMLSchema-instance" | ||
| 5 | xsi:noNamespaceSchemaLocation="http://www.chibios.org/xml/schema/boards/stm32f4xx_board.xsd"> | ||
| 6 | <configuration_settings> | ||
| 7 | <templates_path>resources/gencfg/processors/boards/stm32f4xx/templates</templates_path> | ||
| 8 | <output_path>..</output_path> | ||
| 9 | <hal_version>5.0.x</hal_version> | ||
| 10 | </configuration_settings> | ||
| 11 | <board_name>STMicroelectronics STM32 Nucleo64-F411RE</board_name> | ||
| 12 | <board_id>ST_NUCLEO64_F411RE</board_id> | ||
| 13 | <board_functions></board_functions> | ||
| 14 | <subtype>STM32F411xE</subtype> | ||
| 15 | <clocks | ||
| 16 | HSEFrequency="8000000" | ||
| 17 | HSEBypass="true" | ||
| 18 | LSEFrequency="0" | ||
| 19 | LSEBypass="false" | ||
| 20 | VDD="300" /> | ||
| 21 | <ports> | ||
| 22 | <GPIOA> | ||
| 23 | <pin0 | ||
| 24 | ID="ARD_A0 ADC1_IN0" | ||
| 25 | Type="PushPull" | ||
| 26 | Level="High" | ||
| 27 | Speed="Maximum" | ||
| 28 | Resistor="PullUp" | ||
| 29 | Mode="Input" | ||
| 30 | Alternate="0" /> | ||
| 31 | <pin1 | ||
| 32 | ID="ARD_A1 ADC1_IN1" | ||
| 33 | Type="PushPull" | ||
| 34 | Level="High" | ||
| 35 | Speed="Maximum" | ||
| 36 | Resistor="PullUp" | ||
| 37 | Mode="Input" | ||
| 38 | Alternate="0" /> | ||
| 39 | <pin2 | ||
| 40 | ID="ARD_D1 USART2_TX" | ||
| 41 | Type="PushPull" | ||
| 42 | Level="High" | ||
| 43 | Speed="High" | ||
| 44 | Resistor="Floating" | ||
| 45 | Mode="Alternate" | ||
| 46 | Alternate="7" /> | ||
| 47 | <pin3 | ||
| 48 | ID="ARD_D0 USART2_RX" | ||
| 49 | Type="PushPull" | ||
| 50 | Level="High" | ||
| 51 | Speed="High" | ||
| 52 | Resistor="Floating" | ||
| 53 | Mode="Alternate" | ||
| 54 | Alternate="7" /> | ||
| 55 | <pin4 | ||
| 56 | ID="ARD_A2 ADC1_IN4" | ||
| 57 | Type="PushPull" | ||
| 58 | Level="High" | ||
| 59 | Speed="Maximum" | ||
| 60 | Resistor="PullUp" | ||
| 61 | Mode="Input" | ||
| 62 | Alternate="0" /> | ||
| 63 | <pin5 | ||
| 64 | ID="LED_GREEN ARD_D13" | ||
| 65 | Type="PushPull" | ||
| 66 | Level="Low" | ||
| 67 | Speed="High" | ||
| 68 | Resistor="Floating" | ||
| 69 | Mode="Output" | ||
| 70 | Alternate="0" /> | ||
| 71 | <pin6 | ||
| 72 | ID="ARD_D12" | ||
| 73 | Type="PushPull" | ||
| 74 | Level="High" | ||
| 75 | Speed="Maximum" | ||
| 76 | Resistor="PullUp" | ||
| 77 | Mode="Input" | ||
| 78 | Alternate="0" /> | ||
| 79 | <pin7 | ||
| 80 | ID="ARD_D11" | ||
| 81 | Type="PushPull" | ||
| 82 | Level="High" | ||
| 83 | Speed="Maximum" | ||
| 84 | Resistor="PullUp" | ||
| 85 | Mode="Input" | ||
| 86 | Alternate="0" /> | ||
| 87 | <pin8 | ||
| 88 | ID="ARD_D7" | ||
| 89 | Type="PushPull" | ||
| 90 | Level="High" | ||
| 91 | Speed="Maximum" | ||
| 92 | Resistor="PullUp" | ||
| 93 | Mode="Input" | ||
| 94 | Alternate="0" /> | ||
| 95 | <pin9 | ||
| 96 | ID="ARD_D8" | ||
| 97 | Type="PushPull" | ||
| 98 | Level="High" | ||
| 99 | Speed="Maximum" | ||
| 100 | Resistor="PullUp" | ||
| 101 | Mode="Input" | ||
| 102 | Alternate="0" /> | ||
| 103 | <pin10 | ||
| 104 | ID="ARD_D2" | ||
| 105 | Type="PushPull" | ||
| 106 | Level="High" | ||
| 107 | Speed="Maximum" | ||
| 108 | Resistor="PullUp" | ||
| 109 | Mode="Input" | ||
| 110 | Alternate="0" /> | ||
| 111 | <pin11 | ||
| 112 | ID="OTG_FS_DM" | ||
| 113 | Type="PushPull" | ||
| 114 | Level="High" | ||
| 115 | Speed="Maximum" | ||
| 116 | Resistor="Floating" | ||
| 117 | Mode="Alternate" | ||
| 118 | Alternate="10" /> | ||
| 119 | <pin12 | ||
| 120 | ID="OTG_FS_DP" | ||
| 121 | Type="PushPull" | ||
| 122 | Level="High" | ||
| 123 | Speed="Maximum" | ||
| 124 | Resistor="Floating" | ||
| 125 | Mode="Alternate" | ||
| 126 | Alternate="10" /> | ||
| 127 | <pin13 | ||
| 128 | ID="SWDIO" | ||
| 129 | Type="PushPull" | ||
| 130 | Level="High" | ||
| 131 | Speed="Maximum" | ||
| 132 | Resistor="PullUp" | ||
| 133 | Mode="Alternate" | ||
| 134 | Alternate="0" /> | ||
| 135 | <pin14 | ||
| 136 | ID="SWCLK" | ||
| 137 | Type="PushPull" | ||
| 138 | Level="High" | ||
| 139 | Speed="Maximum" | ||
| 140 | Resistor="PullDown" | ||
| 141 | Mode="Alternate" | ||
| 142 | Alternate="0" /> | ||
| 143 | <pin15 | ||
| 144 | ID="" | ||
| 145 | Type="PushPull" | ||
| 146 | Level="High" | ||
| 147 | Speed="Maximum" | ||
| 148 | Resistor="PullUp" | ||
| 149 | Mode="Input" | ||
| 150 | Alternate="0" /> | ||
| 151 | </GPIOA> | ||
| 152 | <GPIOB> | ||
| 153 | <pin0 | ||
| 154 | ID="ARD_A3 ADC1_IN8" | ||
| 155 | Type="PushPull" | ||
| 156 | Level="High" | ||
| 157 | Speed="Maximum" | ||
| 158 | Resistor="PullUp" | ||
| 159 | Mode="Input" | ||
| 160 | Alternate="0" /> | ||
| 161 | <pin1 | ||
| 162 | ID="" | ||
| 163 | Type="PushPull" | ||
| 164 | Level="High" | ||
| 165 | Speed="Maximum" | ||
| 166 | Resistor="PullUp" | ||
| 167 | Mode="Input" | ||
| 168 | Alternate="0" /> | ||
| 169 | <pin2 | ||
| 170 | ID="" | ||
| 171 | Type="PushPull" | ||
| 172 | Level="High" | ||
| 173 | Speed="Maximum" | ||
| 174 | Resistor="PullUp" | ||
| 175 | Mode="Input" | ||
| 176 | Alternate="0" /> | ||
| 177 | <pin3 | ||
| 178 | ID="SWO ARD_D3" | ||
| 179 | Type="PushPull" | ||
| 180 | Level="High" | ||
| 181 | Speed="Maximum" | ||
| 182 | Resistor="PullUp" | ||
| 183 | Mode="Alternate" | ||
| 184 | Alternate="0" /> | ||
| 185 | <pin4 | ||
| 186 | ID="ARD_D5" | ||
| 187 | Type="PushPull" | ||
| 188 | Level="High" | ||
| 189 | Speed="Maximum" | ||
| 190 | Resistor="PullUp" | ||
| 191 | Mode="Input" | ||
| 192 | Alternate="0" /> | ||
| 193 | <pin5 | ||
| 194 | ID="ARD_D4" | ||
| 195 | Type="PushPull" | ||
| 196 | Level="High" | ||
| 197 | Speed="Maximum" | ||
| 198 | Resistor="PullUp" | ||
| 199 | Mode="Input" | ||
| 200 | Alternate="0" /> | ||
| 201 | <pin6 | ||
| 202 | ID="ARD_D10" | ||
| 203 | Type="PushPull" | ||
| 204 | Level="High" | ||
| 205 | Speed="Maximum" | ||
| 206 | Resistor="PullUp" | ||
| 207 | Mode="Input" | ||
| 208 | Alternate="0" /> | ||
| 209 | <pin7 | ||
| 210 | ID="" | ||
| 211 | Type="PushPull" | ||
| 212 | Level="High" | ||
| 213 | Speed="Maximum" | ||
| 214 | Resistor="PullUp" | ||
| 215 | Mode="Input" | ||
| 216 | Alternate="0" /> | ||
| 217 | <pin8 | ||
| 218 | ID="ARD_D15" | ||
| 219 | Type="PushPull" | ||
| 220 | Level="High" | ||
| 221 | Speed="Maximum" | ||
| 222 | Resistor="PullUp" | ||
| 223 | Mode="Input" | ||
| 224 | Alternate="0" /> | ||
| 225 | <pin9 | ||
| 226 | ID="ARD_D14" | ||
| 227 | Type="PushPull" | ||
| 228 | Level="High" | ||
| 229 | Speed="Maximum" | ||
| 230 | Resistor="PullUp" | ||
| 231 | Mode="Input" | ||
| 232 | Alternate="0" /> | ||
| 233 | <pin10 | ||
| 234 | ID="ARD_D6" | ||
| 235 | Type="PushPull" | ||
| 236 | Level="High" | ||
| 237 | Speed="Maximum" | ||
| 238 | Resistor="PullUp" | ||
| 239 | Mode="Input" | ||
| 240 | Alternate="0" /> | ||
| 241 | <pin11 | ||
| 242 | ID="" | ||
| 243 | Type="PushPull" | ||
| 244 | Level="High" | ||
| 245 | Speed="Maximum" | ||
| 246 | Resistor="PullUp" | ||
| 247 | Mode="Input" | ||
| 248 | Alternate="0" /> | ||
| 249 | <pin12 | ||
| 250 | ID="" | ||
| 251 | Type="PushPull" | ||
| 252 | Level="High" | ||
| 253 | Speed="Maximum" | ||
| 254 | Resistor="PullUp" | ||
| 255 | Mode="Input" | ||
| 256 | Alternate="0" /> | ||
| 257 | <pin13 | ||
| 258 | ID="" | ||
| 259 | Type="PushPull" | ||
| 260 | Level="High" | ||
| 261 | Speed="Maximum" | ||
| 262 | Resistor="PullUp" | ||
| 263 | Mode="Input" | ||
| 264 | Alternate="0" /> | ||
| 265 | <pin14 | ||
| 266 | ID="" | ||
| 267 | Type="PushPull" | ||
| 268 | Level="High" | ||
| 269 | Speed="Maximum" | ||
| 270 | Resistor="PullUp" | ||
| 271 | Mode="Input" | ||
| 272 | Alternate="0" /> | ||
| 273 | <pin15 | ||
| 274 | ID="" | ||
| 275 | Type="PushPull" | ||
| 276 | Level="High" | ||
| 277 | Speed="Maximum" | ||
| 278 | Resistor="PullUp" | ||
| 279 | Mode="Input" | ||
| 280 | Alternate="0" /> | ||
| 281 | </GPIOB> | ||
| 282 | <GPIOC> | ||
| 283 | <pin0 | ||
| 284 | ID="ARD_A5 ADC1_IN10" | ||
| 285 | Type="PushPull" | ||
| 286 | Level="High" | ||
| 287 | Speed="Maximum" | ||
| 288 | Resistor="PullUp" | ||
| 289 | Mode="Input" | ||
| 290 | Alternate="0" /> | ||
| 291 | <pin1 | ||
| 292 | ID="ARD_A4 ADC1_IN11" | ||
| 293 | Type="PushPull" | ||
| 294 | Level="High" | ||
| 295 | Speed="Maximum" | ||
| 296 | Resistor="PullUp" | ||
| 297 | Mode="Input" | ||
| 298 | Alternate="0" /> | ||
| 299 | <pin2 | ||
| 300 | ID="" | ||
| 301 | Type="PushPull" | ||
| 302 | Level="High" | ||
| 303 | Speed="Maximum" | ||
| 304 | Resistor="PullUp" | ||
| 305 | Mode="Input" | ||
| 306 | Alternate="0" /> | ||
| 307 | <pin3 | ||
| 308 | ID="" | ||
| 309 | Type="PushPull" | ||
| 310 | Level="High" | ||
| 311 | Speed="Maximum" | ||
| 312 | Resistor="PullUp" | ||
| 313 | Mode="Input" | ||
| 314 | Alternate="0" /> | ||
| 315 | <pin4 | ||
| 316 | ID="" | ||
| 317 | Type="PushPull" | ||
| 318 | Level="High" | ||
| 319 | Speed="Maximum" | ||
| 320 | Resistor="PullUp" | ||
| 321 | Mode="Input" | ||
| 322 | Alternate="0" /> | ||
| 323 | <pin5 | ||
| 324 | ID="" | ||
| 325 | Type="PushPull" | ||
| 326 | Level="High" | ||
| 327 | Speed="Maximum" | ||
| 328 | Resistor="PullUp" | ||
| 329 | Mode="Input" | ||
| 330 | Alternate="0" /> | ||
| 331 | <pin6 | ||
| 332 | ID="" | ||
| 333 | Type="PushPull" | ||
| 334 | Level="High" | ||
| 335 | Speed="Maximum" | ||
| 336 | Resistor="PullUp" | ||
| 337 | Mode="Input" | ||
| 338 | Alternate="0" /> | ||
| 339 | <pin7 | ||
| 340 | ID="ARD_D9" | ||
| 341 | Type="PushPull" | ||
| 342 | Level="High" | ||
| 343 | Speed="Maximum" | ||
| 344 | Resistor="PullUp" | ||
| 345 | Mode="Input" | ||
| 346 | Alternate="0" /> | ||
| 347 | <pin8 | ||
| 348 | ID="" | ||
| 349 | Type="PushPull" | ||
| 350 | Level="High" | ||
| 351 | Speed="Maximum" | ||
| 352 | Resistor="PullUp" | ||
| 353 | Mode="Input" | ||
| 354 | Alternate="0" /> | ||
| 355 | <pin9 | ||
| 356 | ID="" | ||
| 357 | Type="PushPull" | ||
| 358 | Level="High" | ||
| 359 | Speed="Maximum" | ||
| 360 | Resistor="PullUp" | ||
| 361 | Mode="Input" | ||
| 362 | Alternate="0" /> | ||
| 363 | <pin10 | ||
| 364 | ID="" | ||
| 365 | Type="PushPull" | ||
| 366 | Level="High" | ||
| 367 | Speed="Maximum" | ||
| 368 | Resistor="PullUp" | ||
| 369 | Mode="Input" | ||
| 370 | Alternate="0" /> | ||
| 371 | <pin11 | ||
| 372 | ID="" | ||
| 373 | Type="PushPull" | ||
| 374 | Level="High" | ||
| 375 | Speed="Maximum" | ||
| 376 | Resistor="PullUp" | ||
| 377 | Mode="Input" | ||
| 378 | Alternate="0" /> | ||
| 379 | <pin12 | ||
| 380 | ID="" | ||
| 381 | Type="PushPull" | ||
| 382 | Level="High" | ||
| 383 | Speed="Maximum" | ||
| 384 | Resistor="PullUp" | ||
| 385 | Mode="Input" | ||
| 386 | Alternate="0" /> | ||
| 387 | <pin13 | ||
| 388 | ID="BUTTON" | ||
| 389 | Type="PushPull" | ||
| 390 | Level="High" | ||
| 391 | Speed="Maximum" | ||
| 392 | Resistor="Floating" | ||
| 393 | Mode="Input" | ||
| 394 | Alternate="0" /> | ||
| 395 | <pin14 | ||
| 396 | ID="OSC32_IN" | ||
| 397 | Type="PushPull" | ||
| 398 | Level="High" | ||
| 399 | Speed="Maximum" | ||
| 400 | Resistor="Floating" | ||
| 401 | Mode="Input" | ||
| 402 | Alternate="0" /> | ||
| 403 | <pin15 | ||
| 404 | ID="OSC32_OUT" | ||
| 405 | Type="PushPull" | ||
| 406 | Level="High" | ||
| 407 | Speed="Maximum" | ||
| 408 | Resistor="Floating" | ||
| 409 | Mode="Input" | ||
| 410 | Alternate="0" /> | ||
| 411 | </GPIOC> | ||
| 412 | <GPIOD> | ||
| 413 | <pin0 | ||
| 414 | ID="" | ||
| 415 | Type="PushPull" | ||
| 416 | Level="High" | ||
| 417 | Speed="Maximum" | ||
| 418 | Resistor="PullUp" | ||
| 419 | Mode="Input" | ||
| 420 | Alternate="0" /> | ||
| 421 | <pin1 | ||
| 422 | ID="" | ||
| 423 | Type="PushPull" | ||
| 424 | Level="High" | ||
| 425 | Speed="Maximum" | ||
| 426 | Resistor="PullUp" | ||
| 427 | Mode="Input" | ||
| 428 | Alternate="0" /> | ||
| 429 | <pin2 | ||
| 430 | ID="" | ||
| 431 | Type="PushPull" | ||
| 432 | Level="High" | ||
| 433 | Speed="Maximum" | ||
| 434 | Resistor="PullUp" | ||
| 435 | Mode="Input" | ||
| 436 | Alternate="0" /> | ||
| 437 | <pin3 | ||
| 438 | ID="" | ||
| 439 | Type="PushPull" | ||
| 440 | Level="High" | ||
| 441 | Speed="Maximum" | ||
| 442 | Resistor="PullUp" | ||
| 443 | Mode="Input" | ||
| 444 | Alternate="0" /> | ||
| 445 | <pin4 | ||
| 446 | ID="" | ||
| 447 | Type="PushPull" | ||
| 448 | Level="High" | ||
| 449 | Speed="Maximum" | ||
| 450 | Resistor="PullUp" | ||
| 451 | Mode="Input" | ||
| 452 | Alternate="0" /> | ||
| 453 | <pin5 | ||
| 454 | ID="" | ||
| 455 | Type="PushPull" | ||
| 456 | Level="High" | ||
| 457 | Speed="Maximum" | ||
| 458 | Resistor="PullUp" | ||
| 459 | Mode="Input" | ||
| 460 | Alternate="0" /> | ||
| 461 | <pin6 | ||
| 462 | ID="" | ||
| 463 | Type="PushPull" | ||
| 464 | Level="High" | ||
| 465 | Speed="Maximum" | ||
| 466 | Resistor="PullUp" | ||
| 467 | Mode="Input" | ||
| 468 | Alternate="0" /> | ||
| 469 | <pin7 | ||
| 470 | ID="" | ||
| 471 | Type="PushPull" | ||
| 472 | Level="High" | ||
| 473 | Speed="Maximum" | ||
| 474 | Resistor="PullUp" | ||
| 475 | Mode="Input" | ||
| 476 | Alternate="0" /> | ||
| 477 | <pin8 | ||
| 478 | ID="" | ||
| 479 | Type="PushPull" | ||
| 480 | Level="High" | ||
| 481 | Speed="Maximum" | ||
| 482 | Resistor="PullUp" | ||
| 483 | Mode="Input" | ||
| 484 | Alternate="0" /> | ||
| 485 | <pin9 | ||
| 486 | ID="" | ||
| 487 | Type="PushPull" | ||
| 488 | Level="High" | ||
| 489 | Speed="Maximum" | ||
| 490 | Resistor="PullUp" | ||
| 491 | Mode="Input" | ||
| 492 | Alternate="0" /> | ||
| 493 | <pin10 | ||
| 494 | ID="" | ||
| 495 | Type="PushPull" | ||
| 496 | Level="High" | ||
| 497 | Speed="Maximum" | ||
| 498 | Resistor="PullUp" | ||
| 499 | Mode="Input" | ||
| 500 | Alternate="0" /> | ||
| 501 | <pin11 | ||
| 502 | ID="" | ||
| 503 | Type="PushPull" | ||
| 504 | Level="High" | ||
| 505 | Speed="Maximum" | ||
| 506 | Resistor="PullUp" | ||
| 507 | Mode="Input" | ||
| 508 | Alternate="0" /> | ||
| 509 | <pin12 | ||
| 510 | ID="" | ||
| 511 | Type="PushPull" | ||
| 512 | Level="High" | ||
| 513 | Speed="Maximum" | ||
| 514 | Resistor="PullUp" | ||
| 515 | Mode="Input" | ||
| 516 | Alternate="0" /> | ||
| 517 | <pin13 | ||
| 518 | ID="" | ||
| 519 | Type="PushPull" | ||
| 520 | Level="High" | ||
| 521 | Speed="Maximum" | ||
| 522 | Resistor="PullUp" | ||
| 523 | Mode="Input" | ||
| 524 | Alternate="0" /> | ||
| 525 | <pin14 | ||
| 526 | ID="" | ||
| 527 | Type="PushPull" | ||
| 528 | Level="High" | ||
| 529 | Speed="Maximum" | ||
| 530 | Resistor="PullUp" | ||
| 531 | Mode="Input" | ||
| 532 | Alternate="0" /> | ||
| 533 | <pin15 | ||
| 534 | ID="" | ||
| 535 | Type="PushPull" | ||
| 536 | Level="High" | ||
| 537 | Speed="Maximum" | ||
| 538 | Resistor="PullUp" | ||
| 539 | Mode="Input" | ||
| 540 | Alternate="0" /> | ||
| 541 | </GPIOD> | ||
| 542 | <GPIOE> | ||
| 543 | <pin0 | ||
| 544 | ID="" | ||
| 545 | Type="PushPull" | ||
| 546 | Level="High" | ||
| 547 | Speed="Maximum" | ||
| 548 | Resistor="PullUp" | ||
| 549 | Mode="Input" | ||
| 550 | Alternate="0" /> | ||
| 551 | <pin1 | ||
| 552 | ID="" | ||
| 553 | Type="PushPull" | ||
| 554 | Level="High" | ||
| 555 | Speed="Maximum" | ||
| 556 | Resistor="PullUp" | ||
| 557 | Mode="Input" | ||
| 558 | Alternate="0" /> | ||
| 559 | <pin2 | ||
| 560 | ID="" | ||
| 561 | Type="PushPull" | ||
| 562 | Level="High" | ||
| 563 | Speed="Maximum" | ||
| 564 | Resistor="PullUp" | ||
| 565 | Mode="Input" | ||
| 566 | Alternate="0" /> | ||
| 567 | <pin3 | ||
| 568 | ID="" | ||
| 569 | Type="PushPull" | ||
| 570 | Level="High" | ||
| 571 | Speed="Maximum" | ||
| 572 | Resistor="PullUp" | ||
| 573 | Mode="Input" | ||
| 574 | Alternate="0" /> | ||
| 575 | <pin4 | ||
| 576 | ID="" | ||
| 577 | Type="PushPull" | ||
| 578 | Level="High" | ||
| 579 | Speed="Maximum" | ||
| 580 | Resistor="PullUp" | ||
| 581 | Mode="Input" | ||
| 582 | Alternate="0" /> | ||
| 583 | <pin5 | ||
| 584 | ID="" | ||
| 585 | Type="PushPull" | ||
| 586 | Level="High" | ||
| 587 | Speed="Maximum" | ||
| 588 | Resistor="PullUp" | ||
| 589 | Mode="Input" | ||
| 590 | Alternate="0" /> | ||
| 591 | <pin6 | ||
| 592 | ID="" | ||
| 593 | Type="PushPull" | ||
| 594 | Level="High" | ||
| 595 | Speed="Maximum" | ||
| 596 | Resistor="PullUp" | ||
| 597 | Mode="Input" | ||
| 598 | Alternate="0" /> | ||
| 599 | <pin7 | ||
| 600 | ID="" | ||
| 601 | Type="PushPull" | ||
| 602 | Level="High" | ||
| 603 | Speed="Maximum" | ||
| 604 | Resistor="PullUp" | ||
| 605 | Mode="Input" | ||
| 606 | Alternate="0" /> | ||
| 607 | <pin8 | ||
| 608 | ID="" | ||
| 609 | Type="PushPull" | ||
| 610 | Level="High" | ||
| 611 | Speed="Maximum" | ||
| 612 | Resistor="PullUp" | ||
| 613 | Mode="Input" | ||
| 614 | Alternate="0" /> | ||
| 615 | <pin9 | ||
| 616 | ID="" | ||
| 617 | Type="PushPull" | ||
| 618 | Level="High" | ||
| 619 | Speed="Maximum" | ||
| 620 | Resistor="PullUp" | ||
| 621 | Mode="Input" | ||
| 622 | Alternate="0" /> | ||
| 623 | <pin10 | ||
| 624 | ID="" | ||
| 625 | Type="PushPull" | ||
| 626 | Level="High" | ||
| 627 | Speed="Maximum" | ||
| 628 | Resistor="PullUp" | ||
| 629 | Mode="Input" | ||
| 630 | Alternate="0" /> | ||
| 631 | <pin11 | ||
| 632 | ID="" | ||
| 633 | Type="PushPull" | ||
| 634 | Level="High" | ||
| 635 | Speed="Maximum" | ||
| 636 | Resistor="PullUp" | ||
| 637 | Mode="Input" | ||
| 638 | Alternate="0" /> | ||
| 639 | <pin12 | ||
| 640 | ID="" | ||
| 641 | Type="PushPull" | ||
| 642 | Level="High" | ||
| 643 | Speed="Maximum" | ||
| 644 | Resistor="PullUp" | ||
| 645 | Mode="Input" | ||
| 646 | Alternate="0" /> | ||
| 647 | <pin13 | ||
| 648 | ID="" | ||
| 649 | Type="PushPull" | ||
| 650 | Level="High" | ||
| 651 | Speed="Maximum" | ||
| 652 | Resistor="PullUp" | ||
| 653 | Mode="Input" | ||
| 654 | Alternate="0" /> | ||
| 655 | <pin14 | ||
| 656 | ID="" | ||
| 657 | Type="PushPull" | ||
| 658 | Level="High" | ||
| 659 | Speed="Maximum" | ||
| 660 | Resistor="PullUp" | ||
| 661 | Mode="Input" | ||
| 662 | Alternate="0" /> | ||
| 663 | <pin15 | ||
| 664 | ID="" | ||
| 665 | Type="PushPull" | ||
| 666 | Level="High" | ||
| 667 | Speed="Maximum" | ||
| 668 | Resistor="PullUp" | ||
| 669 | Mode="Input" | ||
| 670 | Alternate="0" /> | ||
| 671 | </GPIOE> | ||
| 672 | <GPIOF> | ||
| 673 | <pin0 | ||
| 674 | ID="" | ||
| 675 | Type="PushPull" | ||
| 676 | Level="High" | ||
| 677 | Speed="Maximum" | ||
| 678 | Resistor="PullUp" | ||
| 679 | Mode="Input" | ||
| 680 | Alternate="0" /> | ||
| 681 | <pin1 | ||
| 682 | ID="" | ||
| 683 | Type="PushPull" | ||
| 684 | Level="High" | ||
| 685 | Speed="Maximum" | ||
| 686 | Resistor="PullUp" | ||
| 687 | Mode="Input" | ||
| 688 | Alternate="0" /> | ||
| 689 | <pin2 | ||
| 690 | ID="" | ||
| 691 | Type="PushPull" | ||
| 692 | Level="High" | ||
| 693 | Speed="Maximum" | ||
| 694 | Resistor="PullUp" | ||
| 695 | Mode="Input" | ||
| 696 | Alternate="0" /> | ||
| 697 | <pin3 | ||
| 698 | ID="" | ||
| 699 | Type="PushPull" | ||
| 700 | Level="High" | ||
| 701 | Speed="Maximum" | ||
| 702 | Resistor="PullUp" | ||
| 703 | Mode="Input" | ||
| 704 | Alternate="0" /> | ||
| 705 | <pin4 | ||
| 706 | ID="" | ||
| 707 | Type="PushPull" | ||
| 708 | Level="High" | ||
| 709 | Speed="Maximum" | ||
| 710 | Resistor="PullUp" | ||
| 711 | Mode="Input" | ||
| 712 | Alternate="0" /> | ||
| 713 | <pin5 | ||
| 714 | ID="" | ||
| 715 | Type="PushPull" | ||
| 716 | Level="High" | ||
| 717 | Speed="Maximum" | ||
| 718 | Resistor="PullUp" | ||
| 719 | Mode="Input" | ||
| 720 | Alternate="0" /> | ||
| 721 | <pin6 | ||
| 722 | ID="" | ||
| 723 | Type="PushPull" | ||
| 724 | Level="High" | ||
| 725 | Speed="Maximum" | ||
| 726 | Resistor="PullUp" | ||
| 727 | Mode="Input" | ||
| 728 | Alternate="0" /> | ||
| 729 | <pin7 | ||
| 730 | ID="" | ||
| 731 | Type="PushPull" | ||
| 732 | Level="High" | ||
| 733 | Speed="Maximum" | ||
| 734 | Resistor="PullUp" | ||
| 735 | Mode="Input" | ||
| 736 | Alternate="0" /> | ||
| 737 | <pin8 | ||
| 738 | ID="" | ||
| 739 | Type="PushPull" | ||
| 740 | Level="High" | ||
| 741 | Speed="Maximum" | ||
| 742 | Resistor="PullUp" | ||
| 743 | Mode="Input" | ||
| 744 | Alternate="0" /> | ||
| 745 | <pin9 | ||
| 746 | ID="" | ||
| 747 | Type="PushPull" | ||
| 748 | Level="High" | ||
| 749 | Speed="Maximum" | ||
| 750 | Resistor="PullUp" | ||
| 751 | Mode="Input" | ||
| 752 | Alternate="0" /> | ||
| 753 | <pin10 | ||
| 754 | ID="" | ||
| 755 | Type="PushPull" | ||
| 756 | Level="High" | ||
| 757 | Speed="Maximum" | ||
| 758 | Resistor="PullUp" | ||
| 759 | Mode="Input" | ||
| 760 | Alternate="0" /> | ||
| 761 | <pin11 | ||
| 762 | ID="" | ||
| 763 | Type="PushPull" | ||
| 764 | Level="High" | ||
| 765 | Speed="Maximum" | ||
| 766 | Resistor="PullUp" | ||
| 767 | Mode="Input" | ||
| 768 | Alternate="0" /> | ||
| 769 | <pin12 | ||
| 770 | ID="" | ||
| 771 | Type="PushPull" | ||
| 772 | Level="High" | ||
| 773 | Speed="Maximum" | ||
| 774 | Resistor="PullUp" | ||
| 775 | Mode="Input" | ||
| 776 | Alternate="0" /> | ||
| 777 | <pin13 | ||
| 778 | ID="" | ||
| 779 | Type="PushPull" | ||
| 780 | Level="High" | ||
| 781 | Speed="Maximum" | ||
| 782 | Resistor="PullUp" | ||
| 783 | Mode="Input" | ||
| 784 | Alternate="0" /> | ||
| 785 | <pin14 | ||
| 786 | ID="" | ||
| 787 | Type="PushPull" | ||
| 788 | Level="High" | ||
| 789 | Speed="Maximum" | ||
| 790 | Resistor="PullUp" | ||
| 791 | Mode="Input" | ||
| 792 | Alternate="0" /> | ||
| 793 | <pin15 | ||
| 794 | ID="" | ||
| 795 | Type="PushPull" | ||
| 796 | Level="High" | ||
| 797 | Speed="Maximum" | ||
| 798 | Resistor="PullUp" | ||
| 799 | Mode="Input" | ||
| 800 | Alternate="0" /> | ||
| 801 | </GPIOF> | ||
| 802 | <GPIOG> | ||
| 803 | <pin0 | ||
| 804 | ID="" | ||
| 805 | Type="PushPull" | ||
| 806 | Level="High" | ||
| 807 | Speed="Maximum" | ||
| 808 | Resistor="PullUp" | ||
| 809 | Mode="Input" | ||
| 810 | Alternate="0" /> | ||
| 811 | <pin1 | ||
| 812 | ID="" | ||
| 813 | Type="PushPull" | ||
| 814 | Level="High" | ||
| 815 | Speed="Maximum" | ||
| 816 | Resistor="PullUp" | ||
| 817 | Mode="Input" | ||
| 818 | Alternate="0" /> | ||
| 819 | <pin2 | ||
| 820 | ID="" | ||
| 821 | Type="PushPull" | ||
| 822 | Level="High" | ||
| 823 | Speed="Maximum" | ||
| 824 | Resistor="PullUp" | ||
| 825 | Mode="Input" | ||
| 826 | Alternate="0" /> | ||
| 827 | <pin3 | ||
| 828 | ID="" | ||
| 829 | Type="PushPull" | ||
| 830 | Level="High" | ||
| 831 | Speed="Maximum" | ||
| 832 | Resistor="PullUp" | ||
| 833 | Mode="Input" | ||
| 834 | Alternate="0" /> | ||
| 835 | <pin4 | ||
| 836 | ID="" | ||
| 837 | Type="PushPull" | ||
| 838 | Level="High" | ||
| 839 | Speed="Maximum" | ||
| 840 | Resistor="PullUp" | ||
| 841 | Mode="Input" | ||
| 842 | Alternate="0" /> | ||
| 843 | <pin5 | ||
| 844 | ID="" | ||
| 845 | Type="PushPull" | ||
| 846 | Level="High" | ||
| 847 | Speed="Maximum" | ||
| 848 | Resistor="PullUp" | ||
| 849 | Mode="Input" | ||
| 850 | Alternate="0" /> | ||
| 851 | <pin6 | ||
| 852 | ID="" | ||
| 853 | Type="PushPull" | ||
| 854 | Level="High" | ||
| 855 | Speed="Maximum" | ||
| 856 | Resistor="PullUp" | ||
| 857 | Mode="Input" | ||
| 858 | Alternate="0" /> | ||
| 859 | <pin7 | ||
| 860 | ID="" | ||
| 861 | Type="PushPull" | ||
| 862 | Level="High" | ||
| 863 | Speed="Maximum" | ||
| 864 | Resistor="PullUp" | ||
| 865 | Mode="Input" | ||
| 866 | Alternate="0" /> | ||
| 867 | <pin8 | ||
| 868 | ID="" | ||
| 869 | Type="PushPull" | ||
| 870 | Level="High" | ||
| 871 | Speed="Maximum" | ||
| 872 | Resistor="PullUp" | ||
| 873 | Mode="Input" | ||
| 874 | Alternate="0" /> | ||
| 875 | <pin9 | ||
| 876 | ID="" | ||
| 877 | Type="PushPull" | ||
| 878 | Level="High" | ||
| 879 | Speed="Maximum" | ||
| 880 | Resistor="PullUp" | ||
| 881 | Mode="Input" | ||
| 882 | Alternate="0" /> | ||
| 883 | <pin10 | ||
| 884 | ID="" | ||
| 885 | Type="PushPull" | ||
| 886 | Level="High" | ||
| 887 | Speed="Maximum" | ||
| 888 | Resistor="PullUp" | ||
| 889 | Mode="Input" | ||
| 890 | Alternate="0" /> | ||
| 891 | <pin11 | ||
| 892 | ID="" | ||
| 893 | Type="PushPull" | ||
| 894 | Level="High" | ||
| 895 | Speed="Maximum" | ||
| 896 | Resistor="PullUp" | ||
| 897 | Mode="Input" | ||
| 898 | Alternate="0" /> | ||
| 899 | <pin12 | ||
| 900 | ID="" | ||
| 901 | Type="PushPull" | ||
| 902 | Level="High" | ||
| 903 | Speed="Maximum" | ||
| 904 | Resistor="PullUp" | ||
| 905 | Mode="Input" | ||
| 906 | Alternate="0" /> | ||
| 907 | <pin13 | ||
| 908 | ID="" | ||
| 909 | Type="PushPull" | ||
| 910 | Level="High" | ||
| 911 | Speed="Maximum" | ||
| 912 | Resistor="PullUp" | ||
| 913 | Mode="Input" | ||
| 914 | Alternate="0" /> | ||
| 915 | <pin14 | ||
| 916 | ID="" | ||
| 917 | Type="PushPull" | ||
| 918 | Level="High" | ||
| 919 | Speed="Maximum" | ||
| 920 | Resistor="PullUp" | ||
| 921 | Mode="Input" | ||
| 922 | Alternate="0" /> | ||
| 923 | <pin15 | ||
| 924 | ID="" | ||
| 925 | Type="PushPull" | ||
| 926 | Level="High" | ||
| 927 | Speed="Maximum" | ||
| 928 | Resistor="PullUp" | ||
| 929 | Mode="Input" | ||
| 930 | Alternate="0" /> | ||
| 931 | </GPIOG> | ||
| 932 | <GPIOH> | ||
| 933 | <pin0 | ||
| 934 | ID="OSC_IN" | ||
| 935 | Type="PushPull" | ||
| 936 | Level="High" | ||
| 937 | Speed="Maximum" | ||
| 938 | Resistor="Floating" | ||
| 939 | Mode="Input" | ||
| 940 | Alternate="0" /> | ||
| 941 | <pin1 | ||
| 942 | ID="OSC_OUT" | ||
| 943 | Type="PushPull" | ||
| 944 | Level="High" | ||
| 945 | Speed="Maximum" | ||
| 946 | Resistor="Floating" | ||
| 947 | Mode="Input" | ||
| 948 | Alternate="0" /> | ||
| 949 | <pin2 | ||
| 950 | ID="" | ||
| 951 | Type="PushPull" | ||
| 952 | Level="High" | ||
| 953 | Speed="Maximum" | ||
| 954 | Resistor="PullUp" | ||
| 955 | Mode="Input" | ||
| 956 | Alternate="0" /> | ||
| 957 | <pin3 | ||
| 958 | ID="" | ||
| 959 | Type="PushPull" | ||
| 960 | Level="High" | ||
| 961 | Speed="Maximum" | ||
| 962 | Resistor="PullUp" | ||
| 963 | Mode="Input" | ||
| 964 | Alternate="0" /> | ||
| 965 | <pin4 | ||
| 966 | ID="" | ||
| 967 | Type="PushPull" | ||
| 968 | Level="High" | ||
| 969 | Speed="Maximum" | ||
| 970 | Resistor="PullUp" | ||
| 971 | Mode="Input" | ||
| 972 | Alternate="0" /> | ||
| 973 | <pin5 | ||
| 974 | ID="" | ||
| 975 | Type="PushPull" | ||
| 976 | Level="High" | ||
| 977 | Speed="Maximum" | ||
| 978 | Resistor="PullUp" | ||
| 979 | Mode="Input" | ||
| 980 | Alternate="0" /> | ||
| 981 | <pin6 | ||
| 982 | ID="" | ||
| 983 | Type="PushPull" | ||
| 984 | Level="High" | ||
| 985 | Speed="Maximum" | ||
| 986 | Resistor="PullUp" | ||
| 987 | Mode="Input" | ||
| 988 | Alternate="0" /> | ||
| 989 | <pin7 | ||
| 990 | ID="" | ||
| 991 | Type="PushPull" | ||
| 992 | Level="High" | ||
| 993 | Speed="Maximum" | ||
| 994 | Resistor="PullUp" | ||
| 995 | Mode="Input" | ||
| 996 | Alternate="0" /> | ||
| 997 | <pin8 | ||
| 998 | ID="" | ||
| 999 | Type="PushPull" | ||
| 1000 | Level="High" | ||
| 1001 | Speed="Maximum" | ||
| 1002 | Resistor="PullUp" | ||
| 1003 | Mode="Input" | ||
| 1004 | Alternate="0" /> | ||
| 1005 | <pin9 | ||
| 1006 | ID="" | ||
| 1007 | Type="PushPull" | ||
| 1008 | Level="High" | ||
| 1009 | Speed="Maximum" | ||
| 1010 | Resistor="PullUp" | ||
| 1011 | Mode="Input" | ||
| 1012 | Alternate="0" /> | ||
| 1013 | <pin10 | ||
| 1014 | ID="" | ||
| 1015 | Type="PushPull" | ||
| 1016 | Level="High" | ||
| 1017 | Speed="Maximum" | ||
| 1018 | Resistor="PullUp" | ||
| 1019 | Mode="Input" | ||
| 1020 | Alternate="0" /> | ||
| 1021 | <pin11 | ||
| 1022 | ID="" | ||
| 1023 | Type="PushPull" | ||
| 1024 | Level="High" | ||
| 1025 | Speed="Maximum" | ||
| 1026 | Resistor="PullUp" | ||
| 1027 | Mode="Input" | ||
| 1028 | Alternate="0" /> | ||
| 1029 | <pin12 | ||
| 1030 | ID="" | ||
| 1031 | Type="PushPull" | ||
| 1032 | Level="High" | ||
| 1033 | Speed="Maximum" | ||
| 1034 | Resistor="PullUp" | ||
| 1035 | Mode="Input" | ||
| 1036 | Alternate="0" /> | ||
| 1037 | <pin13 | ||
| 1038 | ID="" | ||
| 1039 | Type="PushPull" | ||
| 1040 | Level="High" | ||
| 1041 | Speed="Maximum" | ||
| 1042 | Resistor="PullUp" | ||
| 1043 | Mode="Input" | ||
| 1044 | Alternate="0" /> | ||
| 1045 | <pin14 | ||
| 1046 | ID="" | ||
| 1047 | Type="PushPull" | ||
| 1048 | Level="High" | ||
| 1049 | Speed="Maximum" | ||
| 1050 | Resistor="PullUp" | ||
| 1051 | Mode="Input" | ||
| 1052 | Alternate="0" /> | ||
| 1053 | <pin15 | ||
| 1054 | ID="" | ||
| 1055 | Type="PushPull" | ||
| 1056 | Level="High" | ||
| 1057 | Speed="Maximum" | ||
| 1058 | Resistor="PullUp" | ||
| 1059 | Mode="Input" | ||
| 1060 | Alternate="0" /> | ||
| 1061 | </GPIOH> | ||
| 1062 | <GPIOI> | ||
| 1063 | <pin0 | ||
| 1064 | ID="" | ||
| 1065 | Type="PushPull" | ||
| 1066 | Level="High" | ||
| 1067 | Speed="Maximum" | ||
| 1068 | Resistor="PullUp" | ||
| 1069 | Mode="Input" | ||
| 1070 | Alternate="0" /> | ||
| 1071 | <pin1 | ||
| 1072 | ID="" | ||
| 1073 | Type="PushPull" | ||
| 1074 | Level="High" | ||
| 1075 | Speed="Maximum" | ||
| 1076 | Resistor="PullUp" | ||
| 1077 | Mode="Input" | ||
| 1078 | Alternate="0" /> | ||
| 1079 | <pin2 | ||
| 1080 | ID="" | ||
| 1081 | Type="PushPull" | ||
| 1082 | Level="High" | ||
| 1083 | Speed="Maximum" | ||
| 1084 | Resistor="PullUp" | ||
| 1085 | Mode="Input" | ||
| 1086 | Alternate="0" /> | ||
| 1087 | <pin3 | ||
| 1088 | ID="" | ||
| 1089 | Type="PushPull" | ||
| 1090 | Level="High" | ||
| 1091 | Speed="Maximum" | ||
| 1092 | Resistor="PullUp" | ||
| 1093 | Mode="Input" | ||
| 1094 | Alternate="0" /> | ||
| 1095 | <pin4 | ||
| 1096 | ID="" | ||
| 1097 | Type="PushPull" | ||
| 1098 | Level="High" | ||
| 1099 | Speed="Maximum" | ||
| 1100 | Resistor="PullUp" | ||
| 1101 | Mode="Input" | ||
| 1102 | Alternate="0" /> | ||
| 1103 | <pin5 | ||
| 1104 | ID="" | ||
| 1105 | Type="PushPull" | ||
| 1106 | Level="High" | ||
| 1107 | Speed="Maximum" | ||
| 1108 | Resistor="PullUp" | ||
| 1109 | Mode="Input" | ||
| 1110 | Alternate="0" /> | ||
| 1111 | <pin6 | ||
| 1112 | ID="" | ||
| 1113 | Type="PushPull" | ||
| 1114 | Level="High" | ||
| 1115 | Speed="Maximum" | ||
| 1116 | Resistor="PullUp" | ||
| 1117 | Mode="Input" | ||
| 1118 | Alternate="0" /> | ||
| 1119 | <pin7 | ||
| 1120 | ID="" | ||
| 1121 | Type="PushPull" | ||
| 1122 | Level="High" | ||
| 1123 | Speed="Maximum" | ||
| 1124 | Resistor="PullUp" | ||
| 1125 | Mode="Input" | ||
| 1126 | Alternate="0" /> | ||
| 1127 | <pin8 | ||
| 1128 | ID="" | ||
| 1129 | Type="PushPull" | ||
| 1130 | Level="High" | ||
| 1131 | Speed="Maximum" | ||
| 1132 | Resistor="PullUp" | ||
| 1133 | Mode="Input" | ||
| 1134 | Alternate="0" /> | ||
| 1135 | <pin9 | ||
| 1136 | ID="" | ||
| 1137 | Type="PushPull" | ||
| 1138 | Level="High" | ||
| 1139 | Speed="Maximum" | ||
| 1140 | Resistor="PullUp" | ||
| 1141 | Mode="Input" | ||
| 1142 | Alternate="0" /> | ||
| 1143 | <pin10 | ||
| 1144 | ID="" | ||
| 1145 | Type="PushPull" | ||
| 1146 | Level="High" | ||
| 1147 | Speed="Maximum" | ||
| 1148 | Resistor="PullUp" | ||
| 1149 | Mode="Input" | ||
| 1150 | Alternate="0" /> | ||
| 1151 | <pin11 | ||
| 1152 | ID="" | ||
| 1153 | Type="PushPull" | ||
| 1154 | Level="High" | ||
| 1155 | Speed="Maximum" | ||
| 1156 | Resistor="PullUp" | ||
| 1157 | Mode="Input" | ||
| 1158 | Alternate="0" /> | ||
| 1159 | <pin12 | ||
| 1160 | ID="" | ||
| 1161 | Type="PushPull" | ||
| 1162 | Level="High" | ||
| 1163 | Speed="Maximum" | ||
| 1164 | Resistor="PullUp" | ||
| 1165 | Mode="Input" | ||
| 1166 | Alternate="0" /> | ||
| 1167 | <pin13 | ||
| 1168 | ID="" | ||
| 1169 | Type="PushPull" | ||
| 1170 | Level="High" | ||
| 1171 | Speed="Maximum" | ||
| 1172 | Resistor="PullUp" | ||
| 1173 | Mode="Input" | ||
| 1174 | Alternate="0" /> | ||
| 1175 | <pin14 | ||
| 1176 | ID="" | ||
| 1177 | Type="PushPull" | ||
| 1178 | Level="High" | ||
| 1179 | Speed="Maximum" | ||
| 1180 | Resistor="PullUp" | ||
| 1181 | Mode="Input" | ||
| 1182 | Alternate="0" /> | ||
| 1183 | <pin15 | ||
| 1184 | ID="" | ||
| 1185 | Type="PushPull" | ||
| 1186 | Level="High" | ||
| 1187 | Speed="Maximum" | ||
| 1188 | Resistor="PullUp" | ||
| 1189 | Mode="Input" | ||
| 1190 | Alternate="0" /> | ||
| 1191 | </GPIOI> | ||
| 1192 | </ports> | ||
| 1193 | </board> | ||
diff --git a/drivers/boards/BLACKPILL_STM32_F411/cfg/board.fmpp b/drivers/boards/BLACKPILL_STM32_F411/cfg/board.fmpp new file mode 100644 index 000000000..41754c141 --- /dev/null +++ b/drivers/boards/BLACKPILL_STM32_F411/cfg/board.fmpp | |||
| @@ -0,0 +1,15 @@ | |||
| 1 | sourceRoot: ../../../../../tools/ftl/processors/boards/stm32f4xx/templates | ||
| 2 | outputRoot: .. | ||
| 3 | dataRoot: . | ||
| 4 | |||
| 5 | freemarkerLinks: { | ||
| 6 | lib: ../../../../../tools/ftl/libs | ||
| 7 | } | ||
| 8 | |||
| 9 | data : { | ||
| 10 | doc1:xml ( | ||
| 11 | board.chcfg | ||
| 12 | { | ||
| 13 | } | ||
| 14 | ) | ||
| 15 | } | ||
diff --git a/keyboards/handwired/onekey/blackpill_f401/chconf.h b/keyboards/handwired/onekey/blackpill_f401/chconf.h new file mode 100644 index 000000000..7dc4f84a8 --- /dev/null +++ b/keyboards/handwired/onekey/blackpill_f401/chconf.h | |||
| @@ -0,0 +1,714 @@ | |||
| 1 | /* | ||
| 2 | ChibiOS - Copyright (C) 2006..2018 Giovanni Di Sirio | ||
| 3 | |||
| 4 | Licensed under the Apache License, Version 2.0 (the "License"); | ||
| 5 | you may not use this file except in compliance with the License. | ||
| 6 | You may obtain a copy of the License at | ||
| 7 | |||
| 8 | http://www.apache.org/licenses/LICENSE-2.0 | ||
| 9 | |||
| 10 | Unless required by applicable law or agreed to in writing, software | ||
| 11 | distributed under the License is distributed on an "AS IS" BASIS, | ||
| 12 | WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. | ||
| 13 | See the License for the specific language governing permissions and | ||
| 14 | limitations under the License. | ||
| 15 | */ | ||
| 16 | |||
| 17 | /** | ||
| 18 | * @file rt/templates/chconf.h | ||
| 19 | * @brief Configuration file template. | ||
| 20 | * @details A copy of this file must be placed in each project directory, it | ||
| 21 | * contains the application specific kernel settings. | ||
| 22 | * | ||
| 23 | * @addtogroup config | ||
| 24 | * @details Kernel related settings and hooks. | ||
| 25 | * @{ | ||
| 26 | */ | ||
| 27 | |||
| 28 | #ifndef CHCONF_H | ||
| 29 | #define CHCONF_H | ||
| 30 | |||
| 31 | #define _CHIBIOS_RT_CONF_ | ||
| 32 | #define _CHIBIOS_RT_CONF_VER_6_0_ | ||
| 33 | |||
| 34 | /*===========================================================================*/ | ||
| 35 | /** | ||
| 36 | * @name System timers settings | ||
| 37 | * @{ | ||
| 38 | */ | ||
| 39 | /*===========================================================================*/ | ||
| 40 | |||
| 41 | /** | ||
| 42 | * @brief System time counter resolution. | ||
| 43 | * @note Allowed values are 16 or 32 bits. | ||
| 44 | */ | ||
| 45 | #if !defined(CH_CFG_ST_RESOLUTION) | ||
| 46 | #define CH_CFG_ST_RESOLUTION 32 | ||
| 47 | #endif | ||
| 48 | |||
| 49 | /** | ||
| 50 | * @brief System tick frequency. | ||
| 51 | * @details Frequency of the system timer that drives the system ticks. This | ||
| 52 | * setting also defines the system tick time unit. | ||
| 53 | */ | ||
| 54 | #if !defined(CH_CFG_ST_FREQUENCY) | ||
| 55 | #define CH_CFG_ST_FREQUENCY 10000 | ||
| 56 | #endif | ||
| 57 | |||
| 58 | /** | ||
| 59 | * @brief Time intervals data size. | ||
| 60 | * @note Allowed values are 16, 32 or 64 bits. | ||
| 61 | */ | ||
| 62 | #if !defined(CH_CFG_INTERVALS_SIZE) | ||
| 63 | #define CH_CFG_INTERVALS_SIZE 32 | ||
| 64 | #endif | ||
| 65 | |||
| 66 | /** | ||
| 67 | * @brief Time types data size. | ||
| 68 | * @note Allowed values are 16 or 32 bits. | ||
| 69 | */ | ||
| 70 | #if !defined(CH_CFG_TIME_TYPES_SIZE) | ||
| 71 | #define CH_CFG_TIME_TYPES_SIZE 32 | ||
| 72 | #endif | ||
| 73 | |||
| 74 | /** | ||
| 75 | * @brief Time delta constant for the tick-less mode. | ||
| 76 | * @note If this value is zero then the system uses the classic | ||
| 77 | * periodic tick. This value represents the minimum number | ||
| 78 | * of ticks that is safe to specify in a timeout directive. | ||
| 79 | * The value one is not valid, timeouts are rounded up to | ||
| 80 | * this value. | ||
| 81 | */ | ||
| 82 | #if !defined(CH_CFG_ST_TIMEDELTA) | ||
| 83 | #define CH_CFG_ST_TIMEDELTA 2 | ||
| 84 | #endif | ||
| 85 | |||
| 86 | /** @} */ | ||
| 87 | |||
| 88 | /*===========================================================================*/ | ||
| 89 | /** | ||
| 90 | * @name Kernel parameters and options | ||
| 91 | * @{ | ||
| 92 | */ | ||
| 93 | /*===========================================================================*/ | ||
| 94 | |||
| 95 | /** | ||
| 96 | * @brief Round robin interval. | ||
| 97 | * @details This constant is the number of system ticks allowed for the | ||
| 98 | * threads before preemption occurs. Setting this value to zero | ||
| 99 | * disables the preemption for threads with equal priority and the | ||
| 100 | * round robin becomes cooperative. Note that higher priority | ||
| 101 | * threads can still preempt, the kernel is always preemptive. | ||
| 102 | * @note Disabling the round robin preemption makes the kernel more compact | ||
| 103 | * and generally faster. | ||
| 104 | * @note The round robin preemption is not supported in tickless mode and | ||
| 105 | * must be set to zero in that case. | ||
| 106 | */ | ||
| 107 | #if !defined(CH_CFG_TIME_QUANTUM) | ||
| 108 | #define CH_CFG_TIME_QUANTUM 0 | ||
| 109 | #endif | ||
| 110 | |||
| 111 | /** | ||
| 112 | * @brief Managed RAM size. | ||
| 113 | * @details Size of the RAM area to be managed by the OS. If set to zero | ||
| 114 | * then the whole available RAM is used. The core memory is made | ||
| 115 | * available to the heap allocator and/or can be used directly through | ||
| 116 | * the simplified core memory allocator. | ||
| 117 | * | ||
| 118 | * @note In order to let the OS manage the whole RAM the linker script must | ||
| 119 | * provide the @p __heap_base__ and @p __heap_end__ symbols. | ||
| 120 | * @note Requires @p CH_CFG_USE_MEMCORE. | ||
| 121 | */ | ||
| 122 | #if !defined(CH_CFG_MEMCORE_SIZE) | ||
| 123 | #define CH_CFG_MEMCORE_SIZE 0 | ||
| 124 | #endif | ||
| 125 | |||
| 126 | /** | ||
| 127 | * @brief Idle thread automatic spawn suppression. | ||
| 128 | * @details When this option is activated the function @p chSysInit() | ||
| 129 | * does not spawn the idle thread. The application @p main() | ||
| 130 | * function becomes the idle thread and must implement an | ||
| 131 | * infinite loop. | ||
| 132 | */ | ||
| 133 | #if !defined(CH_CFG_NO_IDLE_THREAD) | ||
| 134 | #define CH_CFG_NO_IDLE_THREAD FALSE | ||
| 135 | #endif | ||
| 136 | |||
| 137 | /** @} */ | ||
| 138 | |||
| 139 | /*===========================================================================*/ | ||
| 140 | /** | ||
| 141 | * @name Performance options | ||
| 142 | * @{ | ||
| 143 | */ | ||
| 144 | /*===========================================================================*/ | ||
| 145 | |||
| 146 | /** | ||
| 147 | * @brief OS optimization. | ||
| 148 | * @details If enabled then time efficient rather than space efficient code | ||
| 149 | * is used when two possible implementations exist. | ||
| 150 | * | ||
| 151 | * @note This is not related to the compiler optimization options. | ||
| 152 | * @note The default is @p TRUE. | ||
| 153 | */ | ||
| 154 | #if !defined(CH_CFG_OPTIMIZE_SPEED) | ||
| 155 | #define CH_CFG_OPTIMIZE_SPEED TRUE | ||
| 156 | #endif | ||
| 157 | |||
| 158 | /** @} */ | ||
| 159 | |||
| 160 | /*===========================================================================*/ | ||
| 161 | /** | ||
| 162 | * @name Subsystem options | ||
| 163 | * @{ | ||
| 164 | */ | ||
| 165 | /*===========================================================================*/ | ||
| 166 | |||
| 167 | /** | ||
| 168 | * @brief Time Measurement APIs. | ||
| 169 | * @details If enabled then the time measurement APIs are included in | ||
| 170 | * the kernel. | ||
| 171 | * | ||
| 172 | * @note The default is @p TRUE. | ||
| 173 | */ | ||
| 174 | #if !defined(CH_CFG_USE_TM) | ||
| 175 | #define CH_CFG_USE_TM TRUE | ||
| 176 | #endif | ||
| 177 | |||
| 178 | /** | ||
| 179 | * @brief Threads registry APIs. | ||
| 180 | * @details If enabled then the registry APIs are included in the kernel. | ||
| 181 | * | ||
| 182 | * @note The default is @p TRUE. | ||
| 183 | */ | ||
| 184 | #if !defined(CH_CFG_USE_REGISTRY) | ||
| 185 | #define CH_CFG_USE_REGISTRY TRUE | ||
| 186 | #endif | ||
| 187 | |||
| 188 | /** | ||
| 189 | * @brief Threads synchronization APIs. | ||
| 190 | * @details If enabled then the @p chThdWait() function is included in | ||
| 191 | * the kernel. | ||
| 192 | * | ||
| 193 | * @note The default is @p TRUE. | ||
| 194 | */ | ||
| 195 | #if !defined(CH_CFG_USE_WAITEXIT) | ||
| 196 | #define CH_CFG_USE_WAITEXIT TRUE | ||
| 197 | #endif | ||
| 198 | |||
| 199 | /** | ||
| 200 | * @brief Semaphores APIs. | ||
| 201 | * @details If enabled then the Semaphores APIs are included in the kernel. | ||
| 202 | * | ||
| 203 | * @note The default is @p TRUE. | ||
| 204 | */ | ||
| 205 | #if !defined(CH_CFG_USE_SEMAPHORES) | ||
| 206 | #define CH_CFG_USE_SEMAPHORES TRUE | ||
| 207 | #endif | ||
| 208 | |||
| 209 | /** | ||
| 210 | * @brief Semaphores queuing mode. | ||
| 211 | * @details If enabled then the threads are enqueued on semaphores by | ||
| 212 | * priority rather than in FIFO order. | ||
| 213 | * | ||
| 214 | * @note The default is @p FALSE. Enable this if you have special | ||
| 215 | * requirements. | ||
| 216 | * @note Requires @p CH_CFG_USE_SEMAPHORES. | ||
| 217 | */ | ||
| 218 | #if !defined(CH_CFG_USE_SEMAPHORES_PRIORITY) | ||
| 219 | #define CH_CFG_USE_SEMAPHORES_PRIORITY FALSE | ||
| 220 | #endif | ||
| 221 | |||
| 222 | /** | ||
| 223 | * @brief Mutexes APIs. | ||
| 224 | * @details If enabled then the mutexes APIs are included in the kernel. | ||
| 225 | * | ||
| 226 | * @note The default is @p TRUE. | ||
| 227 | */ | ||
| 228 | #if !defined(CH_CFG_USE_MUTEXES) | ||
| 229 | #define CH_CFG_USE_MUTEXES TRUE | ||
| 230 | #endif | ||
| 231 | |||
| 232 | /** | ||
| 233 | * @brief Enables recursive behavior on mutexes. | ||
| 234 | * @note Recursive mutexes are heavier and have an increased | ||
| 235 | * memory footprint. | ||
| 236 | * | ||
| 237 | * @note The default is @p FALSE. | ||
| 238 | * @note Requires @p CH_CFG_USE_MUTEXES. | ||
| 239 | */ | ||
| 240 | #if !defined(CH_CFG_USE_MUTEXES_RECURSIVE) | ||
| 241 | #define CH_CFG_USE_MUTEXES_RECURSIVE FALSE | ||
| 242 | #endif | ||
| 243 | |||
| 244 | /** | ||
| 245 | * @brief Conditional Variables APIs. | ||
| 246 | * @details If enabled then the conditional variables APIs are included | ||
| 247 | * in the kernel. | ||
| 248 | * | ||
| 249 | * @note The default is @p TRUE. | ||
| 250 | * @note Requires @p CH_CFG_USE_MUTEXES. | ||
| 251 | */ | ||
| 252 | #if !defined(CH_CFG_USE_CONDVARS) | ||
| 253 | #define CH_CFG_USE_CONDVARS TRUE | ||
| 254 | #endif | ||
| 255 | |||
| 256 | /** | ||
| 257 | * @brief Conditional Variables APIs with timeout. | ||
| 258 | * @details If enabled then the conditional variables APIs with timeout | ||
| 259 | * specification are included in the kernel. | ||
| 260 | * | ||
| 261 | * @note The default is @p TRUE. | ||
| 262 | * @note Requires @p CH_CFG_USE_CONDVARS. | ||
| 263 | */ | ||
| 264 | #if !defined(CH_CFG_USE_CONDVARS_TIMEOUT) | ||
| 265 | #define CH_CFG_USE_CONDVARS_TIMEOUT TRUE | ||
| 266 | #endif | ||
| 267 | |||
| 268 | /** | ||
| 269 | * @brief Events Flags APIs. | ||
| 270 | * @details If enabled then the event flags APIs are included in the kernel. | ||
| 271 | * | ||
| 272 | * @note The default is @p TRUE. | ||
| 273 | */ | ||
| 274 | #if !defined(CH_CFG_USE_EVENTS) | ||
| 275 | #define CH_CFG_USE_EVENTS TRUE | ||
| 276 | #endif | ||
| 277 | |||
| 278 | /** | ||
| 279 | * @brief Events Flags APIs with timeout. | ||
| 280 | * @details If enabled then the events APIs with timeout specification | ||
| 281 | * are included in the kernel. | ||
| 282 | * | ||
| 283 | * @note The default is @p TRUE. | ||
| 284 | * @note Requires @p CH_CFG_USE_EVENTS. | ||
| 285 | */ | ||
| 286 | #if !defined(CH_CFG_USE_EVENTS_TIMEOUT) | ||
| 287 | #define CH_CFG_USE_EVENTS_TIMEOUT TRUE | ||
| 288 | #endif | ||
| 289 | |||
| 290 | /** | ||
| 291 | * @brief Synchronous Messages APIs. | ||
| 292 | * @details If enabled then the synchronous messages APIs are included | ||
| 293 | * in the kernel. | ||
| 294 | * | ||
| 295 | * @note The default is @p TRUE. | ||
| 296 | */ | ||
| 297 | #if !defined(CH_CFG_USE_MESSAGES) | ||
| 298 | #define CH_CFG_USE_MESSAGES TRUE | ||
| 299 | #endif | ||
| 300 | |||
| 301 | /** | ||
| 302 | * @brief Synchronous Messages queuing mode. | ||
| 303 | * @details If enabled then messages are served by priority rather than in | ||
| 304 | * FIFO order. | ||
| 305 | * | ||
| 306 | * @note The default is @p FALSE. Enable this if you have special | ||
| 307 | * requirements. | ||
| 308 | * @note Requires @p CH_CFG_USE_MESSAGES. | ||
| 309 | */ | ||
| 310 | #if !defined(CH_CFG_USE_MESSAGES_PRIORITY) | ||
| 311 | #define CH_CFG_USE_MESSAGES_PRIORITY FALSE | ||
| 312 | #endif | ||
| 313 | |||
| 314 | /** | ||
| 315 | * @brief Mailboxes APIs. | ||
| 316 | * @details If enabled then the asynchronous messages (mailboxes) APIs are | ||
| 317 | * included in the kernel. | ||
| 318 | * | ||
| 319 | * @note The default is @p TRUE. | ||
| 320 | * @note Requires @p CH_CFG_USE_SEMAPHORES. | ||
| 321 | */ | ||
| 322 | #if !defined(CH_CFG_USE_MAILBOXES) | ||
| 323 | #define CH_CFG_USE_MAILBOXES TRUE | ||
| 324 | #endif | ||
| 325 | |||
| 326 | /** | ||
| 327 | * @brief Core Memory Manager APIs. | ||
| 328 | * @details If enabled then the core memory manager APIs are included | ||
| 329 | * in the kernel. | ||
| 330 | * | ||
| 331 | * @note The default is @p TRUE. | ||
| 332 | */ | ||
| 333 | #if !defined(CH_CFG_USE_MEMCORE) | ||
| 334 | #define CH_CFG_USE_MEMCORE TRUE | ||
| 335 | #endif | ||
| 336 | |||
| 337 | /** | ||
| 338 | * @brief Heap Allocator APIs. | ||
| 339 | * @details If enabled then the memory heap allocator APIs are included | ||
| 340 | * in the kernel. | ||
| 341 | * | ||
| 342 | * @note The default is @p TRUE. | ||
| 343 | * @note Requires @p CH_CFG_USE_MEMCORE and either @p CH_CFG_USE_MUTEXES or | ||
| 344 | * @p CH_CFG_USE_SEMAPHORES. | ||
| 345 | * @note Mutexes are recommended. | ||
| 346 | */ | ||
| 347 | #if !defined(CH_CFG_USE_HEAP) | ||
| 348 | #define CH_CFG_USE_HEAP TRUE | ||
| 349 | #endif | ||
| 350 | |||
| 351 | /** | ||
| 352 | * @brief Memory Pools Allocator APIs. | ||
| 353 | * @details If enabled then the memory pools allocator APIs are included | ||
| 354 | * in the kernel. | ||
| 355 | * | ||
| 356 | * @note The default is @p TRUE. | ||
| 357 | */ | ||
| 358 | #if !defined(CH_CFG_USE_MEMPOOLS) | ||
| 359 | #define CH_CFG_USE_MEMPOOLS TRUE | ||
| 360 | #endif | ||
| 361 | |||
| 362 | /** | ||
| 363 | * @brief Objects FIFOs APIs. | ||
| 364 | * @details If enabled then the objects FIFOs APIs are included | ||
| 365 | * in the kernel. | ||
| 366 | * | ||
| 367 | * @note The default is @p TRUE. | ||
| 368 | */ | ||
| 369 | #if !defined(CH_CFG_USE_OBJ_FIFOS) | ||
| 370 | #define CH_CFG_USE_OBJ_FIFOS TRUE | ||
| 371 | #endif | ||
| 372 | |||
| 373 | /** | ||
| 374 | * @brief Pipes APIs. | ||
| 375 | * @details If enabled then the pipes APIs are included | ||
| 376 | * in the kernel. | ||
| 377 | * | ||
| 378 | * @note The default is @p TRUE. | ||
| 379 | */ | ||
| 380 | #if !defined(CH_CFG_USE_PIPES) | ||
| 381 | #define CH_CFG_USE_PIPES TRUE | ||
| 382 | #endif | ||
| 383 | |||
| 384 | /** | ||
| 385 | * @brief Dynamic Threads APIs. | ||
| 386 | * @details If enabled then the dynamic threads creation APIs are included | ||
| 387 | * in the kernel. | ||
| 388 | * | ||
| 389 | * @note The default is @p TRUE. | ||
| 390 | * @note Requires @p CH_CFG_USE_WAITEXIT. | ||
| 391 | * @note Requires @p CH_CFG_USE_HEAP and/or @p CH_CFG_USE_MEMPOOLS. | ||
| 392 | */ | ||
| 393 | #if !defined(CH_CFG_USE_DYNAMIC) | ||
| 394 | #define CH_CFG_USE_DYNAMIC TRUE | ||
| 395 | #endif | ||
| 396 | |||
| 397 | /** @} */ | ||
| 398 | |||
| 399 | /*===========================================================================*/ | ||
| 400 | /** | ||
| 401 | * @name Objects factory options | ||
| 402 | * @{ | ||
| 403 | */ | ||
| 404 | /*===========================================================================*/ | ||
| 405 | |||
| 406 | /** | ||
| 407 | * @brief Objects Factory APIs. | ||
| 408 | * @details If enabled then the objects factory APIs are included in the | ||
| 409 | * kernel. | ||
| 410 | * | ||
| 411 | * @note The default is @p FALSE. | ||
| 412 | */ | ||
| 413 | #if !defined(CH_CFG_USE_FACTORY) | ||
| 414 | #define CH_CFG_USE_FACTORY TRUE | ||
| 415 | #endif | ||
| 416 | |||
| 417 | /** | ||
| 418 | * @brief Maximum length for object names. | ||
| 419 | * @details If the specified length is zero then the name is stored by | ||
| 420 | * pointer but this could have unintended side effects. | ||
| 421 | */ | ||
| 422 | #if !defined(CH_CFG_FACTORY_MAX_NAMES_LENGTH) | ||
| 423 | #define CH_CFG_FACTORY_MAX_NAMES_LENGTH 8 | ||
| 424 | #endif | ||
| 425 | |||
| 426 | /** | ||
| 427 | * @brief Enables the registry of generic objects. | ||
| 428 | */ | ||
| 429 | #if !defined(CH_CFG_FACTORY_OBJECTS_REGISTRY) | ||
| 430 | #define CH_CFG_FACTORY_OBJECTS_REGISTRY TRUE | ||
| 431 | #endif | ||
| 432 | |||
| 433 | /** | ||
| 434 | * @brief Enables factory for generic buffers. | ||
| 435 | */ | ||
| 436 | #if !defined(CH_CFG_FACTORY_GENERIC_BUFFERS) | ||
| 437 | #define CH_CFG_FACTORY_GENERIC_BUFFERS TRUE | ||
| 438 | #endif | ||
| 439 | |||
| 440 | /** | ||
| 441 | * @brief Enables factory for semaphores. | ||
| 442 | */ | ||
| 443 | #if !defined(CH_CFG_FACTORY_SEMAPHORES) | ||
| 444 | #define CH_CFG_FACTORY_SEMAPHORES TRUE | ||
| 445 | #endif | ||
| 446 | |||
| 447 | /** | ||
| 448 | * @brief Enables factory for mailboxes. | ||
| 449 | */ | ||
| 450 | #if !defined(CH_CFG_FACTORY_MAILBOXES) | ||
| 451 | #define CH_CFG_FACTORY_MAILBOXES TRUE | ||
| 452 | #endif | ||
| 453 | |||
| 454 | /** | ||
| 455 | * @brief Enables factory for objects FIFOs. | ||
| 456 | */ | ||
| 457 | #if !defined(CH_CFG_FACTORY_OBJ_FIFOS) | ||
| 458 | #define CH_CFG_FACTORY_OBJ_FIFOS TRUE | ||
| 459 | #endif | ||
| 460 | |||
| 461 | /** | ||
| 462 | * @brief Enables factory for Pipes. | ||
| 463 | */ | ||
| 464 | #if !defined(CH_CFG_FACTORY_PIPES) || defined(__DOXYGEN__) | ||
| 465 | #define CH_CFG_FACTORY_PIPES TRUE | ||
| 466 | #endif | ||
| 467 | |||
| 468 | /** @} */ | ||
| 469 | |||
| 470 | /*===========================================================================*/ | ||
| 471 | /** | ||
| 472 | * @name Debug options | ||
| 473 | * @{ | ||
| 474 | */ | ||
| 475 | /*===========================================================================*/ | ||
| 476 | |||
| 477 | /** | ||
| 478 | * @brief Debug option, kernel statistics. | ||
| 479 | * | ||
| 480 | * @note The default is @p FALSE. | ||
| 481 | */ | ||
| 482 | #if !defined(CH_DBG_STATISTICS) | ||
| 483 | #define CH_DBG_STATISTICS FALSE | ||
| 484 | #endif | ||
| 485 | |||
| 486 | /** | ||
| 487 | * @brief Debug option, system state check. | ||
| 488 | * @details If enabled the correct call protocol for system APIs is checked | ||
| 489 | * at runtime. | ||
| 490 | * | ||
| 491 | * @note The default is @p FALSE. | ||
| 492 | */ | ||
| 493 | #if !defined(CH_DBG_SYSTEM_STATE_CHECK) | ||
| 494 | #define CH_DBG_SYSTEM_STATE_CHECK FALSE | ||
| 495 | #endif | ||
| 496 | |||
| 497 | /** | ||
| 498 | * @brief Debug option, parameters checks. | ||
| 499 | * @details If enabled then the checks on the API functions input | ||
| 500 | * parameters are activated. | ||
| 501 | * | ||
| 502 | * @note The default is @p FALSE. | ||
| 503 | */ | ||
| 504 | #if !defined(CH_DBG_ENABLE_CHECKS) | ||
| 505 | #define CH_DBG_ENABLE_CHECKS FALSE | ||
| 506 | #endif | ||
| 507 | |||
| 508 | /** | ||
| 509 | * @brief Debug option, consistency checks. | ||
| 510 | * @details If enabled then all the assertions in the kernel code are | ||
| 511 | * activated. This includes consistency checks inside the kernel, | ||
| 512 | * runtime anomalies and port-defined checks. | ||
| 513 | * | ||
| 514 | * @note The default is @p FALSE. | ||
| 515 | */ | ||
| 516 | #if !defined(CH_DBG_ENABLE_ASSERTS) | ||
| 517 | #define CH_DBG_ENABLE_ASSERTS FALSE | ||
| 518 | #endif | ||
| 519 | |||
| 520 | /** | ||
| 521 | * @brief Debug option, trace buffer. | ||
| 522 | * @details If enabled then the trace buffer is activated. | ||
| 523 | * | ||
| 524 | * @note The default is @p CH_DBG_TRACE_MASK_DISABLED. | ||
| 525 | */ | ||
| 526 | #if !defined(CH_DBG_TRACE_MASK) | ||
| 527 | #define CH_DBG_TRACE_MASK CH_DBG_TRACE_MASK_DISABLED | ||
| 528 | #endif | ||
| 529 | |||
| 530 | /** | ||
| 531 | * @brief Trace buffer entries. | ||
| 532 | * @note The trace buffer is only allocated if @p CH_DBG_TRACE_MASK is | ||
| 533 | * different from @p CH_DBG_TRACE_MASK_DISABLED. | ||
| 534 | */ | ||
| 535 | #if !defined(CH_DBG_TRACE_BUFFER_SIZE) | ||
| 536 | #define CH_DBG_TRACE_BUFFER_SIZE 128 | ||
| 537 | #endif | ||
| 538 | |||
| 539 | /** | ||
| 540 | * @brief Debug option, stack checks. | ||
| 541 | * @details If enabled then a runtime stack check is performed. | ||
| 542 | * | ||
| 543 | * @note The default is @p FALSE. | ||
| 544 | * @note The stack check is performed in a architecture/port dependent way. | ||
| 545 | * It may not be implemented or some ports. | ||
| 546 | * @note The default failure mode is to halt the system with the global | ||
| 547 | * @p panic_msg variable set to @p NULL. | ||
| 548 | */ | ||
| 549 | #if !defined(CH_DBG_ENABLE_STACK_CHECK) | ||
| 550 | #define CH_DBG_ENABLE_STACK_CHECK FALSE | ||
| 551 | #endif | ||
| 552 | |||
| 553 | /** | ||
| 554 | * @brief Debug option, stacks initialization. | ||
| 555 | * @details If enabled then the threads working area is filled with a byte | ||
| 556 | * value when a thread is created. This can be useful for the | ||
| 557 | * runtime measurement of the used stack. | ||
| 558 | * | ||
| 559 | * @note The default is @p FALSE. | ||
| 560 | */ | ||
| 561 | #if !defined(CH_DBG_FILL_THREADS) | ||
| 562 | #define CH_DBG_FILL_THREADS FALSE | ||
| 563 | #endif | ||
| 564 | |||
| 565 | /** | ||
| 566 | * @brief Debug option, threads profiling. | ||
| 567 | * @details If enabled then a field is added to the @p thread_t structure that | ||
| 568 | * counts the system ticks occurred while executing the thread. | ||
| 569 | * | ||
| 570 | * @note The default is @p FALSE. | ||
| 571 | * @note This debug option is not currently compatible with the | ||
| 572 | * tickless mode. | ||
| 573 | */ | ||
| 574 | #if !defined(CH_DBG_THREADS_PROFILING) | ||
| 575 | #define CH_DBG_THREADS_PROFILING FALSE | ||
| 576 | #endif | ||
| 577 | |||
| 578 | /** @} */ | ||
| 579 | |||
| 580 | /*===========================================================================*/ | ||
| 581 | /** | ||
| 582 | * @name Kernel hooks | ||
| 583 | * @{ | ||
| 584 | */ | ||
| 585 | /*===========================================================================*/ | ||
| 586 | |||
| 587 | /** | ||
| 588 | * @brief System structure extension. | ||
| 589 | * @details User fields added to the end of the @p ch_system_t structure. | ||
| 590 | */ | ||
| 591 | #define CH_CFG_SYSTEM_EXTRA_FIELDS \ | ||
| 592 | /* Add threads custom fields here.*/ | ||
| 593 | |||
| 594 | /** | ||
| 595 | * @brief System initialization hook. | ||
| 596 | * @details User initialization code added to the @p chSysInit() function | ||
| 597 | * just before interrupts are enabled globally. | ||
| 598 | */ | ||
| 599 | #define CH_CFG_SYSTEM_INIT_HOOK() { \ | ||
| 600 | /* Add threads initialization code here.*/ \ | ||
| 601 | } | ||
| 602 | |||
| 603 | /** | ||
| 604 | * @brief Threads descriptor structure extension. | ||
| 605 | * @details User fields added to the end of the @p thread_t structure. | ||
| 606 | */ | ||
| 607 | #define CH_CFG_THREAD_EXTRA_FIELDS \ | ||
| 608 | /* Add threads custom fields here.*/ | ||
| 609 | |||
| 610 | /** | ||
| 611 | * @brief Threads initialization hook. | ||
| 612 | * @details User initialization code added to the @p _thread_init() function. | ||
| 613 | * | ||
| 614 | * @note It is invoked from within @p _thread_init() and implicitly from all | ||
| 615 | * the threads creation APIs. | ||
| 616 | */ | ||
| 617 | #define CH_CFG_THREAD_INIT_HOOK(tp) { \ | ||
| 618 | /* Add threads initialization code here.*/ \ | ||
| 619 | } | ||
| 620 | |||
| 621 | /** | ||
| 622 | * @brief Threads finalization hook. | ||
| 623 | * @details User finalization code added to the @p chThdExit() API. | ||
| 624 | */ | ||
| 625 | #define CH_CFG_THREAD_EXIT_HOOK(tp) { \ | ||
| 626 | /* Add threads finalization code here.*/ \ | ||
| 627 | } | ||
| 628 | |||
| 629 | /** | ||
| 630 | * @brief Context switch hook. | ||
| 631 | * @details This hook is invoked just before switching between threads. | ||
| 632 | */ | ||
| 633 | #define CH_CFG_CONTEXT_SWITCH_HOOK(ntp, otp) { \ | ||
| 634 | /* Context switch code here.*/ \ | ||
| 635 | } | ||
| 636 | |||
| 637 | /** | ||
| 638 | * @brief ISR enter hook. | ||
| 639 | */ | ||
| 640 | #define CH_CFG_IRQ_PROLOGUE_HOOK() { \ | ||
| 641 | /* IRQ prologue code here.*/ \ | ||
| 642 | } | ||
| 643 | |||
| 644 | /** | ||
| 645 | * @brief ISR exit hook. | ||
| 646 | */ | ||
| 647 | #define CH_CFG_IRQ_EPILOGUE_HOOK() { \ | ||
| 648 | /* IRQ epilogue code here.*/ \ | ||
| 649 | } | ||
| 650 | |||
| 651 | /** | ||
| 652 | * @brief Idle thread enter hook. | ||
| 653 | * @note This hook is invoked within a critical zone, no OS functions | ||
| 654 | * should be invoked from here. | ||
| 655 | * @note This macro can be used to activate a power saving mode. | ||
| 656 | */ | ||
| 657 | #define CH_CFG_IDLE_ENTER_HOOK() { \ | ||
| 658 | /* Idle-enter code here.*/ \ | ||
| 659 | } | ||
| 660 | |||
| 661 | /** | ||
| 662 | * @brief Idle thread leave hook. | ||
| 663 | * @note This hook is invoked within a critical zone, no OS functions | ||
| 664 | * should be invoked from here. | ||
| 665 | * @note This macro can be used to deactivate a power saving mode. | ||
| 666 | */ | ||
| 667 | #define CH_CFG_IDLE_LEAVE_HOOK() { \ | ||
| 668 | /* Idle-leave code here.*/ \ | ||
| 669 | } | ||
| 670 | |||
| 671 | /** | ||
| 672 | * @brief Idle Loop hook. | ||
| 673 | * @details This hook is continuously invoked by the idle thread loop. | ||
| 674 | */ | ||
| 675 | #define CH_CFG_IDLE_LOOP_HOOK() { \ | ||
| 676 | /* Idle loop code here.*/ \ | ||
| 677 | } | ||
| 678 | |||
| 679 | /** | ||
| 680 | * @brief System tick event hook. | ||
| 681 | * @details This hook is invoked in the system tick handler immediately | ||
| 682 | * after processing the virtual timers queue. | ||
| 683 | */ | ||
| 684 | #define CH_CFG_SYSTEM_TICK_HOOK() { \ | ||
| 685 | /* System tick event code here.*/ \ | ||
| 686 | } | ||
| 687 | |||
| 688 | /** | ||
| 689 | * @brief System halt hook. | ||
| 690 | * @details This hook is invoked in case to a system halting error before | ||
| 691 | * the system is halted. | ||
| 692 | */ | ||
| 693 | #define CH_CFG_SYSTEM_HALT_HOOK(reason) { \ | ||
| 694 | /* System halt code here.*/ \ | ||
| 695 | } | ||
| 696 | |||
| 697 | /** | ||
| 698 | * @brief Trace hook. | ||
| 699 | * @details This hook is invoked each time a new record is written in the | ||
| 700 | * trace buffer. | ||
| 701 | */ | ||
| 702 | #define CH_CFG_TRACE_HOOK(tep) { \ | ||
| 703 | /* Trace code here.*/ \ | ||
| 704 | } | ||
| 705 | |||
| 706 | /** @} */ | ||
| 707 | |||
| 708 | /*===========================================================================*/ | ||
| 709 | /* Port-specific settings (override port settings defaulted in chcore.h). */ | ||
| 710 | /*===========================================================================*/ | ||
| 711 | |||
| 712 | #endif /* CHCONF_H */ | ||
| 713 | |||
| 714 | /** @} */ | ||
diff --git a/keyboards/handwired/onekey/blackpill_f401/config.h b/keyboards/handwired/onekey/blackpill_f401/config.h new file mode 100644 index 000000000..01555e431 --- /dev/null +++ b/keyboards/handwired/onekey/blackpill_f401/config.h | |||
| @@ -0,0 +1,29 @@ | |||
| 1 | /* Copyright 2019 | ||
| 2 | * | ||
| 3 | * This program is free software: you can redistribute it and/or modify | ||
| 4 | * it under the terms of the GNU General Public License as published by | ||
| 5 | * the Free Software Foundation, either version 2 of the License, or | ||
| 6 | * (at your option) any later version. | ||
| 7 | * | ||
| 8 | * This program is distributed in the hope that it will be useful, | ||
| 9 | * but WITHOUT ANY WARRANTY; without even the implied warranty of | ||
| 10 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | ||
| 11 | * GNU General Public License for more details. | ||
| 12 | * | ||
| 13 | * You should have received a copy of the GNU General Public License | ||
| 14 | * along with this program. If not, see <http://www.gnu.org/licenses/>. | ||
| 15 | */ | ||
| 16 | |||
| 17 | #pragma once | ||
| 18 | |||
| 19 | #include "config_common.h" | ||
| 20 | |||
| 21 | #define MATRIX_COL_PINS { B0 } | ||
| 22 | #define MATRIX_ROW_PINS { A7 } | ||
| 23 | #define UNUSED_PINS | ||
| 24 | |||
| 25 | #define BACKLIGHT_PIN A0 | ||
| 26 | #define BACKLIGHT_PWM_DRIVER PWMD2 | ||
| 27 | #define BACKLIGHT_PWM_CHANNEL 1 | ||
| 28 | |||
| 29 | #define RGB_DI_PIN A1 | ||
diff --git a/keyboards/handwired/onekey/blackpill_f401/halconf.h b/keyboards/handwired/onekey/blackpill_f401/halconf.h new file mode 100644 index 000000000..a8db392aa --- /dev/null +++ b/keyboards/handwired/onekey/blackpill_f401/halconf.h | |||
| @@ -0,0 +1,525 @@ | |||
| 1 | /* | ||
| 2 | ChibiOS - Copyright (C) 2006..2018 Giovanni Di Sirio | ||
| 3 | |||
| 4 | Licensed under the Apache License, Version 2.0 (the "License"); | ||
| 5 | you may not use this file except in compliance with the License. | ||
| 6 | You may obtain a copy of the License at | ||
| 7 | |||
| 8 | http://www.apache.org/licenses/LICENSE-2.0 | ||
| 9 | |||
| 10 | Unless required by applicable law or agreed to in writing, software | ||
| 11 | distributed under the License is distributed on an "AS IS" BASIS, | ||
| 12 | WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. | ||
| 13 | See the License for the specific language governing permissions and | ||
| 14 | limitations under the License. | ||
| 15 | */ | ||
| 16 | |||
| 17 | /** | ||
| 18 | * @file templates/halconf.h | ||
| 19 | * @brief HAL configuration header. | ||
| 20 | * @details HAL configuration file, this file allows to enable or disable the | ||
| 21 | * various device drivers from your application. You may also use | ||
| 22 | * this file in order to override the device drivers default settings. | ||
| 23 | * | ||
| 24 | * @addtogroup HAL_CONF | ||
| 25 | * @{ | ||
| 26 | */ | ||
| 27 | |||
| 28 | #ifndef HALCONF_H | ||
| 29 | #define HALCONF_H | ||
| 30 | |||
| 31 | #define _CHIBIOS_HAL_CONF_ | ||
| 32 | #define _CHIBIOS_HAL_CONF_VER_7_0_ | ||
| 33 | |||
| 34 | #include "mcuconf.h" | ||
| 35 | |||
| 36 | /** | ||
| 37 | * @brief Enables the PAL subsystem. | ||
| 38 | */ | ||
| 39 | #if !defined(HAL_USE_PAL) || defined(__DOXYGEN__) | ||
| 40 | #define HAL_USE_PAL TRUE | ||
| 41 | #endif | ||
| 42 | |||
| 43 | /** | ||
| 44 | * @brief Enables the ADC subsystem. | ||
| 45 | */ | ||
| 46 | #if !defined(HAL_USE_ADC) || defined(__DOXYGEN__) | ||
| 47 | #define HAL_USE_ADC FALSE | ||
| 48 | #endif | ||
| 49 | |||
| 50 | /** | ||
| 51 | * @brief Enables the CAN subsystem. | ||
| 52 | */ | ||
| 53 | #if !defined(HAL_USE_CAN) || defined(__DOXYGEN__) | ||
| 54 | #define HAL_USE_CAN FALSE | ||
| 55 | #endif | ||
| 56 | |||
| 57 | /** | ||
| 58 | * @brief Enables the cryptographic subsystem. | ||
| 59 | */ | ||
| 60 | #if !defined(HAL_USE_CRY) || defined(__DOXYGEN__) | ||
| 61 | #define HAL_USE_CRY FALSE | ||
| 62 | #endif | ||
| 63 | |||
| 64 | /** | ||
| 65 | * @brief Enables the DAC subsystem. | ||
| 66 | */ | ||
| 67 | #if !defined(HAL_USE_DAC) || defined(__DOXYGEN__) | ||
| 68 | #define HAL_USE_DAC FALSE | ||
| 69 | #endif | ||
| 70 | |||
| 71 | /** | ||
| 72 | * @brief Enables the GPT subsystem. | ||
| 73 | */ | ||
| 74 | #if !defined(HAL_USE_GPT) || defined(__DOXYGEN__) | ||
| 75 | #define HAL_USE_GPT FALSE | ||
| 76 | #endif | ||
| 77 | |||
| 78 | /** | ||
| 79 | * @brief Enables the I2C subsystem. | ||
| 80 | */ | ||
| 81 | #if !defined(HAL_USE_I2C) || defined(__DOXYGEN__) | ||
| 82 | #define HAL_USE_I2C FALSE | ||
| 83 | #endif | ||
| 84 | |||
| 85 | /** | ||
| 86 | * @brief Enables the I2S subsystem. | ||
| 87 | */ | ||
| 88 | #if !defined(HAL_USE_I2S) || defined(__DOXYGEN__) | ||
| 89 | #define HAL_USE_I2S FALSE | ||
| 90 | #endif | ||
| 91 | |||
| 92 | /** | ||
| 93 | * @brief Enables the ICU subsystem. | ||
| 94 | */ | ||
| 95 | #if !defined(HAL_USE_ICU) || defined(__DOXYGEN__) | ||
| 96 | #define HAL_USE_ICU FALSE | ||
| 97 | #endif | ||
| 98 | |||
| 99 | /** | ||
| 100 | * @brief Enables the MAC subsystem. | ||
| 101 | */ | ||
| 102 | #if !defined(HAL_USE_MAC) || defined(__DOXYGEN__) | ||
| 103 | #define HAL_USE_MAC FALSE | ||
| 104 | #endif | ||
| 105 | |||
| 106 | /** | ||
| 107 | * @brief Enables the MMC_SPI subsystem. | ||
| 108 | */ | ||
| 109 | #if !defined(HAL_USE_MMC_SPI) || defined(__DOXYGEN__) | ||
| 110 | #define HAL_USE_MMC_SPI FALSE | ||
| 111 | #endif | ||
| 112 | |||
| 113 | /** | ||
| 114 | * @brief Enables the PWM subsystem. | ||
| 115 | */ | ||
| 116 | #if !defined(HAL_USE_PWM) || defined(__DOXYGEN__) | ||
| 117 | #define HAL_USE_PWM FALSE | ||
| 118 | #endif | ||
| 119 | |||
| 120 | /** | ||
| 121 | * @brief Enables the RTC subsystem. | ||
| 122 | */ | ||
| 123 | #if !defined(HAL_USE_RTC) || defined(__DOXYGEN__) | ||
| 124 | #define HAL_USE_RTC FALSE | ||
| 125 | #endif | ||
| 126 | |||
| 127 | /** | ||
| 128 | * @brief Enables the SDC subsystem. | ||
| 129 | */ | ||
| 130 | #if !defined(HAL_USE_SDC) || defined(__DOXYGEN__) | ||
| 131 | #define HAL_USE_SDC FALSE | ||
| 132 | #endif | ||
| 133 | |||
| 134 | /** | ||
| 135 | * @brief Enables the SERIAL subsystem. | ||
| 136 | */ | ||
| 137 | #if !defined(HAL_USE_SERIAL) || defined(__DOXYGEN__) | ||
| 138 | #define HAL_USE_SERIAL FALSE | ||
| 139 | #endif | ||
| 140 | |||
| 141 | /** | ||
| 142 | * @brief Enables the SERIAL over USB subsystem. | ||
| 143 | */ | ||
| 144 | #if !defined(HAL_USE_SERIAL_USB) || defined(__DOXYGEN__) | ||
| 145 | #define HAL_USE_SERIAL_USB FALSE | ||
| 146 | #endif | ||
| 147 | |||
| 148 | /** | ||
| 149 | * @brief Enables the SIO subsystem. | ||
| 150 | */ | ||
| 151 | #if !defined(HAL_USE_SIO) || defined(__DOXYGEN__) | ||
| 152 | #define HAL_USE_SIO FALSE | ||
| 153 | #endif | ||
| 154 | |||
| 155 | /** | ||
| 156 | * @brief Enables the SPI subsystem. | ||
| 157 | */ | ||
| 158 | #if !defined(HAL_USE_SPI) || defined(__DOXYGEN__) | ||
| 159 | #define HAL_USE_SPI FALSE | ||
| 160 | #endif | ||
| 161 | |||
| 162 | /** | ||
| 163 | * @brief Enables the TRNG subsystem. | ||
| 164 | */ | ||
| 165 | #if !defined(HAL_USE_TRNG) || defined(__DOXYGEN__) | ||
| 166 | #define HAL_USE_TRNG FALSE | ||
| 167 | #endif | ||
| 168 | |||
| 169 | /** | ||
| 170 | * @brief Enables the UART subsystem. | ||
| 171 | */ | ||
| 172 | #if !defined(HAL_USE_UART) || defined(__DOXYGEN__) | ||
| 173 | #define HAL_USE_UART FALSE | ||
| 174 | #endif | ||
| 175 | |||
| 176 | /** | ||
| 177 | * @brief Enables the USB subsystem. | ||
| 178 | */ | ||
| 179 | #if !defined(HAL_USE_USB) || defined(__DOXYGEN__) | ||
| 180 | #define HAL_USE_USB TRUE | ||
| 181 | #endif | ||
| 182 | |||
| 183 | /** | ||
| 184 | * @brief Enables the WDG subsystem. | ||
| 185 | */ | ||
| 186 | #if !defined(HAL_USE_WDG) || defined(__DOXYGEN__) | ||
| 187 | #define HAL_USE_WDG FALSE | ||
| 188 | #endif | ||
| 189 | |||
| 190 | /** | ||
| 191 | * @brief Enables the WSPI subsystem. | ||
| 192 | */ | ||
| 193 | #if !defined(HAL_USE_WSPI) || defined(__DOXYGEN__) | ||
| 194 | #define HAL_USE_WSPI FALSE | ||
| 195 | #endif | ||
| 196 | |||
| 197 | /*===========================================================================*/ | ||
| 198 | /* PAL driver related settings. */ | ||
| 199 | /*===========================================================================*/ | ||
| 200 | |||
| 201 | /** | ||
| 202 | * @brief Enables synchronous APIs. | ||
| 203 | * @note Disabling this option saves both code and data space. | ||
| 204 | */ | ||
| 205 | #if !defined(PAL_USE_CALLBACKS) || defined(__DOXYGEN__) | ||
| 206 | #define PAL_USE_CALLBACKS FALSE | ||
| 207 | #endif | ||
| 208 | |||
| 209 | /** | ||
| 210 | * @brief Enables synchronous APIs. | ||
| 211 | * @note Disabling this option saves both code and data space. | ||
| 212 | */ | ||
| 213 | #if !defined(PAL_USE_WAIT) || defined(__DOXYGEN__) | ||
| 214 | #define PAL_USE_WAIT FALSE | ||
| 215 | #endif | ||
| 216 | |||
| 217 | /*===========================================================================*/ | ||
| 218 | /* ADC driver related settings. */ | ||
| 219 | /*===========================================================================*/ | ||
| 220 | |||
| 221 | /** | ||
| 222 | * @brief Enables synchronous APIs. | ||
| 223 | * @note Disabling this option saves both code and data space. | ||
| 224 | */ | ||
| 225 | #if !defined(ADC_USE_WAIT) || defined(__DOXYGEN__) | ||
| 226 | #define ADC_USE_WAIT TRUE | ||
| 227 | #endif | ||
| 228 | |||
| 229 | /** | ||
| 230 | * @brief Enables the @p adcAcquireBus() and @p adcReleaseBus() APIs. | ||
| 231 | * @note Disabling this option saves both code and data space. | ||
| 232 | */ | ||
| 233 | #if !defined(ADC_USE_MUTUAL_EXCLUSION) || defined(__DOXYGEN__) | ||
| 234 | #define ADC_USE_MUTUAL_EXCLUSION TRUE | ||
| 235 | #endif | ||
| 236 | |||
| 237 | /*===========================================================================*/ | ||
| 238 | /* CAN driver related settings. */ | ||
| 239 | /*===========================================================================*/ | ||
| 240 | |||
| 241 | /** | ||
| 242 | * @brief Sleep mode related APIs inclusion switch. | ||
| 243 | */ | ||
| 244 | #if !defined(CAN_USE_SLEEP_MODE) || defined(__DOXYGEN__) | ||
| 245 | #define CAN_USE_SLEEP_MODE TRUE | ||
| 246 | #endif | ||
| 247 | |||
| 248 | /** | ||
| 249 | * @brief Enforces the driver to use direct callbacks rather than OSAL events. | ||
| 250 | */ | ||
| 251 | #if !defined(CAN_ENFORCE_USE_CALLBACKS) || defined(__DOXYGEN__) | ||
| 252 | #define CAN_ENFORCE_USE_CALLBACKS FALSE | ||
| 253 | #endif | ||
| 254 | |||
| 255 | /*===========================================================================*/ | ||
| 256 | /* CRY driver related settings. */ | ||
| 257 | /*===========================================================================*/ | ||
| 258 | |||
| 259 | /** | ||
| 260 | * @brief Enables the SW fall-back of the cryptographic driver. | ||
| 261 | * @details When enabled, this option, activates a fall-back software | ||
| 262 | * implementation for algorithms not supported by the underlying | ||
| 263 | * hardware. | ||
| 264 | * @note Fall-back implementations may not be present for all algorithms. | ||
| 265 | */ | ||
| 266 | #if !defined(HAL_CRY_USE_FALLBACK) || defined(__DOXYGEN__) | ||
| 267 | #define HAL_CRY_USE_FALLBACK FALSE | ||
| 268 | #endif | ||
| 269 | |||
| 270 | /** | ||
| 271 | * @brief Makes the driver forcibly use the fall-back implementations. | ||
| 272 | */ | ||
| 273 | #if !defined(HAL_CRY_ENFORCE_FALLBACK) || defined(__DOXYGEN__) | ||
| 274 | #define HAL_CRY_ENFORCE_FALLBACK FALSE | ||
| 275 | #endif | ||
| 276 | |||
| 277 | /*===========================================================================*/ | ||
| 278 | /* DAC driver related settings. */ | ||
| 279 | /*===========================================================================*/ | ||
| 280 | |||
| 281 | /** | ||
| 282 | * @brief Enables synchronous APIs. | ||
| 283 | * @note Disabling this option saves both code and data space. | ||
| 284 | */ | ||
| 285 | #if !defined(DAC_USE_WAIT) || defined(__DOXYGEN__) | ||
| 286 | #define DAC_USE_WAIT TRUE | ||
| 287 | #endif | ||
| 288 | |||
| 289 | /** | ||
| 290 | * @brief Enables the @p dacAcquireBus() and @p dacReleaseBus() APIs. | ||
| 291 | * @note Disabling this option saves both code and data space. | ||
| 292 | */ | ||
| 293 | #if !defined(DAC_USE_MUTUAL_EXCLUSION) || defined(__DOXYGEN__) | ||
| 294 | #define DAC_USE_MUTUAL_EXCLUSION TRUE | ||
| 295 | #endif | ||
| 296 | |||
| 297 | /*===========================================================================*/ | ||
| 298 | /* I2C driver related settings. */ | ||
| 299 | /*===========================================================================*/ | ||
| 300 | |||
| 301 | /** | ||
| 302 | * @brief Enables the mutual exclusion APIs on the I2C bus. | ||
| 303 | */ | ||
| 304 | #if !defined(I2C_USE_MUTUAL_EXCLUSION) || defined(__DOXYGEN__) | ||
| 305 | #define I2C_USE_MUTUAL_EXCLUSION TRUE | ||
| 306 | #endif | ||
| 307 | |||
| 308 | /*===========================================================================*/ | ||
| 309 | /* MAC driver related settings. */ | ||
| 310 | /*===========================================================================*/ | ||
| 311 | |||
| 312 | /** | ||
| 313 | * @brief Enables the zero-copy API. | ||
| 314 | */ | ||
| 315 | #if !defined(MAC_USE_ZERO_COPY) || defined(__DOXYGEN__) | ||
| 316 | #define MAC_USE_ZERO_COPY FALSE | ||
| 317 | #endif | ||
| 318 | |||
| 319 | /** | ||
| 320 | * @brief Enables an event sources for incoming packets. | ||
| 321 | */ | ||
| 322 | #if !defined(MAC_USE_EVENTS) || defined(__DOXYGEN__) | ||
| 323 | #define MAC_USE_EVENTS TRUE | ||
| 324 | #endif | ||
| 325 | |||
| 326 | /*===========================================================================*/ | ||
| 327 | /* MMC_SPI driver related settings. */ | ||
| 328 | /*===========================================================================*/ | ||
| 329 | |||
| 330 | /** | ||
| 331 | * @brief Delays insertions. | ||
| 332 | * @details If enabled this options inserts delays into the MMC waiting | ||
| 333 | * routines releasing some extra CPU time for the threads with | ||
| 334 | * lower priority, this may slow down the driver a bit however. | ||
| 335 | * This option is recommended also if the SPI driver does not | ||
| 336 | * use a DMA channel and heavily loads the CPU. | ||
| 337 | */ | ||
| 338 | #if !defined(MMC_NICE_WAITING) || defined(__DOXYGEN__) | ||
| 339 | #define MMC_NICE_WAITING TRUE | ||
| 340 | #endif | ||
| 341 | |||
| 342 | /*===========================================================================*/ | ||
| 343 | /* SDC driver related settings. */ | ||
| 344 | /*===========================================================================*/ | ||
| 345 | |||
| 346 | /** | ||
| 347 | * @brief Number of initialization attempts before rejecting the card. | ||
| 348 | * @note Attempts are performed at 10mS intervals. | ||
| 349 | */ | ||
| 350 | #if !defined(SDC_INIT_RETRY) || defined(__DOXYGEN__) | ||
| 351 | #define SDC_INIT_RETRY 100 | ||
| 352 | #endif | ||
| 353 | |||
| 354 | /** | ||
| 355 | * @brief Include support for MMC cards. | ||
| 356 | * @note MMC support is not yet implemented so this option must be kept | ||
| 357 | * at @p FALSE. | ||
| 358 | */ | ||
| 359 | #if !defined(SDC_MMC_SUPPORT) || defined(__DOXYGEN__) | ||
| 360 | #define SDC_MMC_SUPPORT FALSE | ||
| 361 | #endif | ||
| 362 | |||
| 363 | /** | ||
| 364 | * @brief Delays insertions. | ||
| 365 | * @details If enabled this options inserts delays into the MMC waiting | ||
| 366 | * routines releasing some extra CPU time for the threads with | ||
| 367 | * lower priority, this may slow down the driver a bit however. | ||
| 368 | */ | ||
| 369 | #if !defined(SDC_NICE_WAITING) || defined(__DOXYGEN__) | ||
| 370 | #define SDC_NICE_WAITING TRUE | ||
| 371 | #endif | ||
| 372 | |||
| 373 | /** | ||
| 374 | * @brief OCR initialization constant for V20 cards. | ||
| 375 | */ | ||
| 376 | #if !defined(SDC_INIT_OCR_V20) || defined(__DOXYGEN__) | ||
| 377 | #define SDC_INIT_OCR_V20 0x50FF8000U | ||
| 378 | #endif | ||
| 379 | |||
| 380 | /** | ||
| 381 | * @brief OCR initialization constant for non-V20 cards. | ||
| 382 | */ | ||
| 383 | #if !defined(SDC_INIT_OCR) || defined(__DOXYGEN__) | ||
| 384 | #define SDC_INIT_OCR 0x80100000U | ||
| 385 | #endif | ||
| 386 | |||
| 387 | /*===========================================================================*/ | ||
| 388 | /* SERIAL driver related settings. */ | ||
| 389 | /*===========================================================================*/ | ||
| 390 | |||
| 391 | /** | ||
| 392 | * @brief Default bit rate. | ||
| 393 | * @details Configuration parameter, this is the baud rate selected for the | ||
| 394 | * default configuration. | ||
| 395 | */ | ||
| 396 | #if !defined(SERIAL_DEFAULT_BITRATE) || defined(__DOXYGEN__) | ||
| 397 | #define SERIAL_DEFAULT_BITRATE 38400 | ||
| 398 | #endif | ||
| 399 | |||
| 400 | /** | ||
| 401 | * @brief Serial buffers size. | ||
| 402 | * @details Configuration parameter, you can change the depth of the queue | ||
| 403 | * buffers depending on the requirements of your application. | ||
| 404 | * @note The default is 16 bytes for both the transmission and receive | ||
| 405 | * buffers. | ||
| 406 | */ | ||
| 407 | #if !defined(SERIAL_BUFFERS_SIZE) || defined(__DOXYGEN__) | ||
| 408 | #define SERIAL_BUFFERS_SIZE 16 | ||
| 409 | #endif | ||
| 410 | |||
| 411 | /*===========================================================================*/ | ||
| 412 | /* SERIAL_USB driver related setting. */ | ||
| 413 | /*===========================================================================*/ | ||
| 414 | |||
| 415 | /** | ||
| 416 | * @brief Serial over USB buffers size. | ||
| 417 | * @details Configuration parameter, the buffer size must be a multiple of | ||
| 418 | * the USB data endpoint maximum packet size. | ||
| 419 | * @note The default is 256 bytes for both the transmission and receive | ||
| 420 | * buffers. | ||
| 421 | */ | ||
| 422 | #if !defined(SERIAL_USB_BUFFERS_SIZE) || defined(__DOXYGEN__) | ||
| 423 | #define SERIAL_USB_BUFFERS_SIZE 256 | ||
| 424 | #endif | ||
| 425 | |||
| 426 | /** | ||
| 427 | * @brief Serial over USB number of buffers. | ||
| 428 | * @note The default is 2 buffers. | ||
| 429 | */ | ||
| 430 | #if !defined(SERIAL_USB_BUFFERS_NUMBER) || defined(__DOXYGEN__) | ||
| 431 | #define SERIAL_USB_BUFFERS_NUMBER 2 | ||
| 432 | #endif | ||
| 433 | |||
| 434 | /*===========================================================================*/ | ||
| 435 | /* SPI driver related settings. */ | ||
| 436 | /*===========================================================================*/ | ||
| 437 | |||
| 438 | /** | ||
| 439 | * @brief Enables synchronous APIs. | ||
| 440 | * @note Disabling this option saves both code and data space. | ||
| 441 | */ | ||
| 442 | #if !defined(SPI_USE_WAIT) || defined(__DOXYGEN__) | ||
| 443 | #define SPI_USE_WAIT TRUE | ||
| 444 | #endif | ||
| 445 | |||
| 446 | /** | ||
| 447 | * @brief Enables circular transfers APIs. | ||
| 448 | * @note Disabling this option saves both code and data space. | ||
| 449 | */ | ||
| 450 | #if !defined(SPI_USE_CIRCULAR) || defined(__DOXYGEN__) | ||
| 451 | #define SPI_USE_CIRCULAR FALSE | ||
| 452 | #endif | ||
| 453 | |||
| 454 | |||
| 455 | /** | ||
| 456 | * @brief Enables the @p spiAcquireBus() and @p spiReleaseBus() APIs. | ||
| 457 | * @note Disabling this option saves both code and data space. | ||
| 458 | */ | ||
| 459 | #if !defined(SPI_USE_MUTUAL_EXCLUSION) || defined(__DOXYGEN__) | ||
| 460 | #define SPI_USE_MUTUAL_EXCLUSION TRUE | ||
| 461 | #endif | ||
| 462 | |||
| 463 | /** | ||
| 464 | * @brief Handling method for SPI CS line. | ||
| 465 | * @note Disabling this option saves both code and data space. | ||
| 466 | */ | ||
| 467 | #if !defined(SPI_SELECT_MODE) || defined(__DOXYGEN__) | ||
| 468 | #define SPI_SELECT_MODE SPI_SELECT_MODE_PAD | ||
| 469 | #endif | ||
| 470 | |||
| 471 | /*===========================================================================*/ | ||
| 472 | /* UART driver related settings. */ | ||
| 473 | /*===========================================================================*/ | ||
| 474 | |||
| 475 | /** | ||
| 476 | * @brief Enables synchronous APIs. | ||
| 477 | * @note Disabling this option saves both code and data space. | ||
| 478 | */ | ||
| 479 | #if !defined(UART_USE_WAIT) || defined(__DOXYGEN__) | ||
| 480 | #define UART_USE_WAIT FALSE | ||
| 481 | #endif | ||
| 482 | |||
| 483 | /** | ||
| 484 | * @brief Enables the @p uartAcquireBus() and @p uartReleaseBus() APIs. | ||
| 485 | * @note Disabling this option saves both code and data space. | ||
| 486 | */ | ||
| 487 | #if !defined(UART_USE_MUTUAL_EXCLUSION) || defined(__DOXYGEN__) | ||
| 488 | #define UART_USE_MUTUAL_EXCLUSION FALSE | ||
| 489 | #endif | ||
| 490 | |||
| 491 | /*===========================================================================*/ | ||
| 492 | /* USB driver related settings. */ | ||
| 493 | /*===========================================================================*/ | ||
| 494 | |||
| 495 | /** | ||
| 496 | * @brief Enables synchronous APIs. | ||
| 497 | * @note Disabling this option saves both code and data space. | ||
| 498 | */ | ||
| 499 | #if !defined(USB_USE_WAIT) || defined(__DOXYGEN__) | ||
| 500 | #define USB_USE_WAIT TRUE | ||
| 501 | #endif | ||
| 502 | |||
| 503 | /*===========================================================================*/ | ||
| 504 | /* WSPI driver related settings. */ | ||
| 505 | /*===========================================================================*/ | ||
| 506 | |||
| 507 | /** | ||
| 508 | * @brief Enables synchronous APIs. | ||
| 509 | * @note Disabling this option saves both code and data space. | ||
| 510 | */ | ||
| 511 | #if !defined(WSPI_USE_WAIT) || defined(__DOXYGEN__) | ||
| 512 | #define WSPI_USE_WAIT TRUE | ||
| 513 | #endif | ||
| 514 | |||
| 515 | /** | ||
| 516 | * @brief Enables the @p wspiAcquireBus() and @p wspiReleaseBus() APIs. | ||
| 517 | * @note Disabling this option saves both code and data space. | ||
| 518 | */ | ||
| 519 | #if !defined(WSPI_USE_MUTUAL_EXCLUSION) || defined(__DOXYGEN__) | ||
| 520 | #define WSPI_USE_MUTUAL_EXCLUSION TRUE | ||
| 521 | #endif | ||
| 522 | |||
| 523 | #endif /* HALCONF_H */ | ||
| 524 | |||
| 525 | /** @} */ | ||
diff --git a/keyboards/handwired/onekey/blackpill_f401/mcuconf.h b/keyboards/handwired/onekey/blackpill_f401/mcuconf.h new file mode 100644 index 000000000..ba6e934fe --- /dev/null +++ b/keyboards/handwired/onekey/blackpill_f401/mcuconf.h | |||
| @@ -0,0 +1,253 @@ | |||
| 1 | /* | ||
| 2 | ChibiOS - Copyright (C) 2006..2018 Giovanni Di Sirio | ||
| 3 | |||
| 4 | Licensed under the Apache License, Version 2.0 (the "License"); | ||
| 5 | you may not use this file except in compliance with the License. | ||
| 6 | You may obtain a copy of the License at | ||
| 7 | |||
| 8 | http://www.apache.org/licenses/LICENSE-2.0 | ||
| 9 | |||
| 10 | Unless required by applicable law or agreed to in writing, software | ||
| 11 | distributed under the License is distributed on an "AS IS" BASIS, | ||
| 12 | WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. | ||
| 13 | See the License for the specific language governing permissions and | ||
| 14 | limitations under the License. | ||
| 15 | */ | ||
| 16 | |||
| 17 | #ifndef MCUCONF_H | ||
| 18 | #define MCUCONF_H | ||
| 19 | |||
| 20 | /* | ||
| 21 | * STM32F4xx drivers configuration. | ||
| 22 | * The following settings override the default settings present in | ||
| 23 | * the various device driver implementation headers. | ||
| 24 | * Note that the settings for each driver only have effect if the whole | ||
| 25 | * driver is enabled in halconf.h. | ||
| 26 | * | ||
| 27 | * IRQ priorities: | ||
| 28 | * 15...0 Lowest...Highest. | ||
| 29 | * | ||
| 30 | * DMA priorities: | ||
| 31 | * 0...3 Lowest...Highest. | ||
| 32 | */ | ||
| 33 | |||
| 34 | #define STM32F4xx_MCUCONF | ||
| 35 | |||
| 36 | /* | ||
| 37 | * HAL driver system settings. | ||
| 38 | */ | ||
| 39 | #define STM32_NO_INIT FALSE | ||
| 40 | #define STM32_HSI_ENABLED TRUE | ||
| 41 | #define STM32_LSI_ENABLED TRUE | ||
| 42 | #define STM32_HSE_ENABLED TRUE | ||
| 43 | #define STM32_LSE_ENABLED FALSE | ||
| 44 | #define STM32_CLOCK48_REQUIRED TRUE | ||
| 45 | #define STM32_SW STM32_SW_PLL | ||
| 46 | #define STM32_PLLSRC STM32_PLLSRC_HSE | ||
| 47 | #define STM32_PLLM_VALUE 25 | ||
| 48 | #define STM32_PLLN_VALUE 336 | ||
| 49 | #define STM32_PLLP_VALUE 4 | ||
| 50 | #define STM32_PLLQ_VALUE 7 | ||
| 51 | #define STM32_HPRE STM32_HPRE_DIV1 | ||
| 52 | #define STM32_PPRE1 STM32_PPRE1_DIV4 | ||
| 53 | #define STM32_PPRE2 STM32_PPRE2_DIV2 | ||
| 54 | #define STM32_RTCSEL STM32_RTCSEL_LSI | ||
| 55 | #define STM32_RTCPRE_VALUE 8 | ||
| 56 | #define STM32_MCO1SEL STM32_MCO1SEL_HSI | ||
| 57 | #define STM32_MCO1PRE STM32_MCO1PRE_DIV1 | ||
| 58 | #define STM32_MCO2SEL STM32_MCO2SEL_SYSCLK | ||
| 59 | #define STM32_MCO2PRE STM32_MCO2PRE_DIV5 | ||
| 60 | #define STM32_I2SSRC STM32_I2SSRC_CKIN | ||
| 61 | #define STM32_PLLI2SN_VALUE 192 | ||
| 62 | #define STM32_PLLI2SR_VALUE 5 | ||
| 63 | #define STM32_PVD_ENABLE FALSE | ||
| 64 | #define STM32_PLS STM32_PLS_LEV0 | ||
| 65 | #define STM32_BKPRAM_ENABLE FALSE | ||
| 66 | |||
| 67 | /* | ||
| 68 | * IRQ system settings. | ||
| 69 | */ | ||
| 70 | #define STM32_IRQ_EXTI0_PRIORITY 6 | ||
| 71 | #define STM32_IRQ_EXTI1_PRIORITY 6 | ||
| 72 | #define STM32_IRQ_EXTI2_PRIORITY 6 | ||
| 73 | #define STM32_IRQ_EXTI3_PRIORITY 6 | ||
| 74 | #define STM32_IRQ_EXTI4_PRIORITY 6 | ||
| 75 | #define STM32_IRQ_EXTI5_9_PRIORITY 6 | ||
| 76 | #define STM32_IRQ_EXTI10_15_PRIORITY 6 | ||
| 77 | #define STM32_IRQ_EXTI16_PRIORITY 6 | ||
| 78 | #define STM32_IRQ_EXTI17_PRIORITY 15 | ||
| 79 | #define STM32_IRQ_EXTI18_PRIORITY 6 | ||
| 80 | #define STM32_IRQ_EXTI19_PRIORITY 6 | ||
| 81 | #define STM32_IRQ_EXTI20_PRIORITY 6 | ||
| 82 | #define STM32_IRQ_EXTI21_PRIORITY 15 | ||
| 83 | #define STM32_IRQ_EXTI22_PRIORITY 15 | ||
| 84 | |||
| 85 | /* | ||
| 86 | * ADC driver system settings. | ||
| 87 | */ | ||
| 88 | #define STM32_ADC_ADCPRE ADC_CCR_ADCPRE_DIV4 | ||
| 89 | #define STM32_ADC_USE_ADC1 FALSE | ||
| 90 | #define STM32_ADC_ADC1_DMA_STREAM STM32_DMA_STREAM_ID(2, 4) | ||
| 91 | #define STM32_ADC_ADC1_DMA_PRIORITY 2 | ||
| 92 | #define STM32_ADC_IRQ_PRIORITY 6 | ||
| 93 | #define STM32_ADC_ADC1_DMA_IRQ_PRIORITY 6 | ||
| 94 | |||
| 95 | /* | ||
| 96 | * GPT driver system settings. | ||
| 97 | */ | ||
| 98 | #define STM32_GPT_USE_TIM1 FALSE | ||
| 99 | #define STM32_GPT_USE_TIM2 FALSE | ||
| 100 | #define STM32_GPT_USE_TIM3 FALSE | ||
| 101 | #define STM32_GPT_USE_TIM4 FALSE | ||
| 102 | #define STM32_GPT_USE_TIM5 FALSE | ||
| 103 | #define STM32_GPT_USE_TIM9 FALSE | ||
| 104 | #define STM32_GPT_USE_TIM11 FALSE | ||
| 105 | #define STM32_GPT_TIM1_IRQ_PRIORITY 7 | ||
| 106 | #define STM32_GPT_TIM2_IRQ_PRIORITY 7 | ||
| 107 | #define STM32_GPT_TIM3_IRQ_PRIORITY 7 | ||
| 108 | #define STM32_GPT_TIM4_IRQ_PRIORITY 7 | ||
| 109 | #define STM32_GPT_TIM5_IRQ_PRIORITY 7 | ||
| 110 | #define STM32_GPT_TIM9_IRQ_PRIORITY 7 | ||
| 111 | #define STM32_GPT_TIM11_IRQ_PRIORITY 7 | ||
| 112 | |||
| 113 | /* | ||
| 114 | * I2C driver system settings. | ||
| 115 | */ | ||
| 116 | #define STM32_I2C_USE_I2C1 FALSE | ||
| 117 | #define STM32_I2C_USE_I2C2 FALSE | ||
| 118 | #define STM32_I2C_USE_I2C3 FALSE | ||
| 119 | #define STM32_I2C_BUSY_TIMEOUT 50 | ||
| 120 | #define STM32_I2C_I2C1_RX_DMA_STREAM STM32_DMA_STREAM_ID(1, 0) | ||
| 121 | #define STM32_I2C_I2C1_TX_DMA_STREAM STM32_DMA_STREAM_ID(1, 6) | ||
| 122 | #define STM32_I2C_I2C2_RX_DMA_STREAM STM32_DMA_STREAM_ID(1, 2) | ||
| 123 | #define STM32_I2C_I2C2_TX_DMA_STREAM STM32_DMA_STREAM_ID(1, 7) | ||
| 124 | #define STM32_I2C_I2C3_RX_DMA_STREAM STM32_DMA_STREAM_ID(1, 2) | ||
| 125 | #define STM32_I2C_I2C3_TX_DMA_STREAM STM32_DMA_STREAM_ID(1, 4) | ||
| 126 | #define STM32_I2C_I2C1_IRQ_PRIORITY 5 | ||
| 127 | #define STM32_I2C_I2C2_IRQ_PRIORITY 5 | ||
| 128 | #define STM32_I2C_I2C3_IRQ_PRIORITY 5 | ||
| 129 | #define STM32_I2C_I2C1_DMA_PRIORITY 3 | ||
| 130 | #define STM32_I2C_I2C2_DMA_PRIORITY 3 | ||
| 131 | #define STM32_I2C_I2C3_DMA_PRIORITY 3 | ||
| 132 | #define STM32_I2C_DMA_ERROR_HOOK(i2cp) osalSysHalt("DMA failure") | ||
| 133 | |||
| 134 | /* | ||
| 135 | * I2S driver system settings. | ||
| 136 | */ | ||
| 137 | #define STM32_I2S_USE_SPI2 FALSE | ||
| 138 | #define STM32_I2S_USE_SPI3 FALSE | ||
| 139 | #define STM32_I2S_SPI2_IRQ_PRIORITY 10 | ||
| 140 | #define STM32_I2S_SPI3_IRQ_PRIORITY 10 | ||
| 141 | #define STM32_I2S_SPI2_DMA_PRIORITY 1 | ||
| 142 | #define STM32_I2S_SPI3_DMA_PRIORITY 1 | ||
| 143 | #define STM32_I2S_SPI2_RX_DMA_STREAM STM32_DMA_STREAM_ID(1, 3) | ||
| 144 | #define STM32_I2S_SPI2_TX_DMA_STREAM STM32_DMA_STREAM_ID(1, 4) | ||
| 145 | #define STM32_I2S_SPI3_RX_DMA_STREAM STM32_DMA_STREAM_ID(1, 0) | ||
| 146 | #define STM32_I2S_SPI3_TX_DMA_STREAM STM32_DMA_STREAM_ID(1, 7) | ||
| 147 | #define STM32_I2S_DMA_ERROR_HOOK(i2sp) osalSysHalt("DMA failure") | ||
| 148 | |||
| 149 | /* | ||
| 150 | * ICU driver system settings. | ||
| 151 | */ | ||
| 152 | #define STM32_ICU_USE_TIM1 FALSE | ||
| 153 | #define STM32_ICU_USE_TIM2 FALSE | ||
| 154 | #define STM32_ICU_USE_TIM3 FALSE | ||
| 155 | #define STM32_ICU_USE_TIM4 FALSE | ||
| 156 | #define STM32_ICU_USE_TIM5 FALSE | ||
| 157 | #define STM32_ICU_USE_TIM9 FALSE | ||
| 158 | #define STM32_ICU_TIM1_IRQ_PRIORITY 7 | ||
| 159 | #define STM32_ICU_TIM2_IRQ_PRIORITY 7 | ||
| 160 | #define STM32_ICU_TIM3_IRQ_PRIORITY 7 | ||
| 161 | #define STM32_ICU_TIM4_IRQ_PRIORITY 7 | ||
| 162 | #define STM32_ICU_TIM5_IRQ_PRIORITY 7 | ||
| 163 | #define STM32_ICU_TIM9_IRQ_PRIORITY 7 | ||
| 164 | |||
| 165 | /* | ||
| 166 | * PWM driver system settings. | ||
| 167 | */ | ||
| 168 | #define STM32_PWM_USE_ADVANCED FALSE | ||
| 169 | #define STM32_PWM_USE_TIM1 FALSE | ||
| 170 | #define STM32_PWM_USE_TIM2 FALSE | ||
| 171 | #define STM32_PWM_USE_TIM3 FALSE | ||
| 172 | #define STM32_PWM_USE_TIM4 FALSE | ||
| 173 | #define STM32_PWM_USE_TIM5 FALSE | ||
| 174 | #define STM32_PWM_USE_TIM9 FALSE | ||
| 175 | #define STM32_PWM_TIM1_IRQ_PRIORITY 7 | ||
| 176 | #define STM32_PWM_TIM2_IRQ_PRIORITY 7 | ||
| 177 | #define STM32_PWM_TIM3_IRQ_PRIORITY 7 | ||
| 178 | #define STM32_PWM_TIM4_IRQ_PRIORITY 7 | ||
| 179 | #define STM32_PWM_TIM5_IRQ_PRIORITY 7 | ||
| 180 | #define STM32_PWM_TIM9_IRQ_PRIORITY 7 | ||
| 181 | |||
| 182 | /* | ||
| 183 | * SERIAL driver system settings. | ||
| 184 | */ | ||
| 185 | #define STM32_SERIAL_USE_USART1 FALSE | ||
| 186 | #define STM32_SERIAL_USE_USART2 FALSE | ||
| 187 | #define STM32_SERIAL_USE_USART6 FALSE | ||
| 188 | #define STM32_SERIAL_USART1_PRIORITY 12 | ||
| 189 | #define STM32_SERIAL_USART2_PRIORITY 12 | ||
| 190 | #define STM32_SERIAL_USART6_PRIORITY 12 | ||
| 191 | |||
| 192 | /* | ||
| 193 | * SPI driver system settings. | ||
| 194 | */ | ||
| 195 | #define STM32_SPI_USE_SPI1 FALSE | ||
| 196 | #define STM32_SPI_USE_SPI2 FALSE | ||
| 197 | #define STM32_SPI_USE_SPI3 FALSE | ||
| 198 | #define STM32_SPI_SPI1_RX_DMA_STREAM STM32_DMA_STREAM_ID(2, 0) | ||
| 199 | #define STM32_SPI_SPI1_TX_DMA_STREAM STM32_DMA_STREAM_ID(2, 3) | ||
| 200 | #define STM32_SPI_SPI2_RX_DMA_STREAM STM32_DMA_STREAM_ID(1, 3) | ||
| 201 | #define STM32_SPI_SPI2_TX_DMA_STREAM STM32_DMA_STREAM_ID(1, 4) | ||
| 202 | #define STM32_SPI_SPI3_RX_DMA_STREAM STM32_DMA_STREAM_ID(1, 0) | ||
| 203 | #define STM32_SPI_SPI3_TX_DMA_STREAM STM32_DMA_STREAM_ID(1, 7) | ||
| 204 | #define STM32_SPI_SPI1_DMA_PRIORITY 1 | ||
| 205 | #define STM32_SPI_SPI2_DMA_PRIORITY 1 | ||
| 206 | #define STM32_SPI_SPI3_DMA_PRIORITY 1 | ||
| 207 | #define STM32_SPI_SPI1_IRQ_PRIORITY 10 | ||
| 208 | #define STM32_SPI_SPI2_IRQ_PRIORITY 10 | ||
| 209 | #define STM32_SPI_SPI3_IRQ_PRIORITY 10 | ||
| 210 | #define STM32_SPI_DMA_ERROR_HOOK(spip) osalSysHalt("DMA failure") | ||
| 211 | |||
| 212 | /* | ||
| 213 | * ST driver system settings. | ||
| 214 | */ | ||
| 215 | #define STM32_ST_IRQ_PRIORITY 8 | ||
| 216 | #define STM32_ST_USE_TIMER 2 | ||
| 217 | |||
| 218 | /* | ||
| 219 | * UART driver system settings. | ||
| 220 | */ | ||
| 221 | #define STM32_UART_USE_USART1 FALSE | ||
| 222 | #define STM32_UART_USE_USART2 FALSE | ||
| 223 | #define STM32_UART_USE_USART6 FALSE | ||
| 224 | #define STM32_UART_USART1_RX_DMA_STREAM STM32_DMA_STREAM_ID(2, 5) | ||
| 225 | #define STM32_UART_USART1_TX_DMA_STREAM STM32_DMA_STREAM_ID(2, 7) | ||
| 226 | #define STM32_UART_USART2_RX_DMA_STREAM STM32_DMA_STREAM_ID(1, 5) | ||
| 227 | #define STM32_UART_USART2_TX_DMA_STREAM STM32_DMA_STREAM_ID(1, 6) | ||
| 228 | #define STM32_UART_USART6_RX_DMA_STREAM STM32_DMA_STREAM_ID(2, 2) | ||
| 229 | #define STM32_UART_USART6_TX_DMA_STREAM STM32_DMA_STREAM_ID(2, 7) | ||
| 230 | #define STM32_UART_USART1_IRQ_PRIORITY 12 | ||
| 231 | #define STM32_UART_USART2_IRQ_PRIORITY 12 | ||
| 232 | #define STM32_UART_USART6_IRQ_PRIORITY 12 | ||
| 233 | #define STM32_UART_USART1_DMA_PRIORITY 0 | ||
| 234 | #define STM32_UART_USART2_DMA_PRIORITY 0 | ||
| 235 | #define STM32_UART_USART6_DMA_PRIORITY 0 | ||
| 236 | #define STM32_UART_DMA_ERROR_HOOK(uartp) osalSysHalt("DMA failure") | ||
| 237 | |||
| 238 | /* | ||
| 239 | * USB driver system settings. | ||
| 240 | */ | ||
| 241 | #define STM32_USB_USE_OTG1 TRUE | ||
| 242 | #define STM32_USB_OTG1_IRQ_PRIORITY 14 | ||
| 243 | #define STM32_USB_OTG1_RX_FIFO_SIZE 512 | ||
| 244 | #define STM32_USB_OTG_THREAD_PRIO NORMALPRIO+1 | ||
| 245 | #define STM32_USB_OTG_THREAD_STACK_SIZE 128 | ||
| 246 | #define STM32_USB_OTGFIFO_FILL_BASEPRI 0 | ||
| 247 | |||
| 248 | /* | ||
| 249 | * WDG driver system settings. | ||
| 250 | */ | ||
| 251 | #define STM32_WDG_USE_IWDG FALSE | ||
| 252 | |||
| 253 | #endif /* MCUCONF_H */ | ||
diff --git a/keyboards/handwired/onekey/blackpill_f401/readme.md b/keyboards/handwired/onekey/blackpill_f401/readme.md new file mode 100644 index 000000000..18ed6a43e --- /dev/null +++ b/keyboards/handwired/onekey/blackpill_f401/readme.md | |||
| @@ -0,0 +1,5 @@ | |||
| 1 | # f401 blackpill onekey | ||
| 2 | |||
| 3 | Supported Hardware: *STM32F401CCU6 WeAct v1.3*. | ||
| 4 | |||
| 5 | To trigger keypress, short together pins *B0* and *A7*. | ||
diff --git a/keyboards/handwired/onekey/blackpill_f401/rules.mk b/keyboards/handwired/onekey/blackpill_f401/rules.mk new file mode 100644 index 000000000..36093820c --- /dev/null +++ b/keyboards/handwired/onekey/blackpill_f401/rules.mk | |||
| @@ -0,0 +1,32 @@ | |||
| 1 | ## chip/board settings | ||
| 2 | # the next two should match the directories in | ||
| 3 | # <chibios>/os/hal/ports/$(MCU_FAMILY)/$(MCU_SERIES) | ||
| 4 | MCU_FAMILY = STM32 | ||
| 5 | MCU_SERIES = STM32F4xx | ||
| 6 | # linker script to use | ||
| 7 | # it should exist either in <chibios>/os/common/ports/ARMCMx/compilers/GCC/ld/ | ||
| 8 | # or <this_dir>/ld/ | ||
| 9 | MCU_LDSCRIPT = STM32F401xC | ||
| 10 | # startup code to use | ||
| 11 | # is should exist in <chibios>/os/common/ports/ARMCMx/compilers/GCC/mk/ | ||
| 12 | MCU_STARTUP = stm32f4xx | ||
| 13 | # it should exist either in <chibios>/os/hal/boards/ | ||
| 14 | # or <this_dir>/boards | ||
| 15 | BOARD = BLACKPILL_STM32_F401 | ||
| 16 | # Cortex version | ||
| 17 | # Teensy LC is cortex-m0; Teensy 3.x are cortex-m4 | ||
| 18 | MCU = cortex-m4 | ||
| 19 | # ARM version, CORTEX-M0/M1 are 6, CORTEX-M3/M4/M7 are 7 | ||
| 20 | ARMV = 7 | ||
| 21 | USE_FPU = yes | ||
| 22 | # Address of the booloader in system memory | ||
| 23 | STM32_BOOTLOADER_ADDRESS ?= 0x1FFF0000 | ||
| 24 | |||
| 25 | # Options to pass to dfu-util when flashing | ||
| 26 | DFU_ARGS = -d 0483:df11 -a 0 -s 0x08000000:leave | ||
| 27 | DFU_SUFFIX_ARGS = -v 0483 -p df11 | ||
| 28 | |||
| 29 | # Build Options | ||
| 30 | # change yes to no to disable | ||
| 31 | # | ||
| 32 | KEYBOARD_SHARED_EP = yes | ||
diff --git a/keyboards/handwired/onekey/blackpill_f411/chconf.h b/keyboards/handwired/onekey/blackpill_f411/chconf.h new file mode 100644 index 000000000..7dc4f84a8 --- /dev/null +++ b/keyboards/handwired/onekey/blackpill_f411/chconf.h | |||
| @@ -0,0 +1,714 @@ | |||
| 1 | /* | ||
| 2 | ChibiOS - Copyright (C) 2006..2018 Giovanni Di Sirio | ||
| 3 | |||
| 4 | Licensed under the Apache License, Version 2.0 (the "License"); | ||
| 5 | you may not use this file except in compliance with the License. | ||
| 6 | You may obtain a copy of the License at | ||
| 7 | |||
| 8 | http://www.apache.org/licenses/LICENSE-2.0 | ||
| 9 | |||
| 10 | Unless required by applicable law or agreed to in writing, software | ||
| 11 | distributed under the License is distributed on an "AS IS" BASIS, | ||
| 12 | WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. | ||
| 13 | See the License for the specific language governing permissions and | ||
| 14 | limitations under the License. | ||
| 15 | */ | ||
| 16 | |||
| 17 | /** | ||
| 18 | * @file rt/templates/chconf.h | ||
| 19 | * @brief Configuration file template. | ||
| 20 | * @details A copy of this file must be placed in each project directory, it | ||
| 21 | * contains the application specific kernel settings. | ||
| 22 | * | ||
| 23 | * @addtogroup config | ||
| 24 | * @details Kernel related settings and hooks. | ||
| 25 | * @{ | ||
| 26 | */ | ||
| 27 | |||
| 28 | #ifndef CHCONF_H | ||
| 29 | #define CHCONF_H | ||
| 30 | |||
| 31 | #define _CHIBIOS_RT_CONF_ | ||
| 32 | #define _CHIBIOS_RT_CONF_VER_6_0_ | ||
| 33 | |||
| 34 | /*===========================================================================*/ | ||
| 35 | /** | ||
| 36 | * @name System timers settings | ||
| 37 | * @{ | ||
| 38 | */ | ||
| 39 | /*===========================================================================*/ | ||
| 40 | |||
| 41 | /** | ||
| 42 | * @brief System time counter resolution. | ||
| 43 | * @note Allowed values are 16 or 32 bits. | ||
| 44 | */ | ||
| 45 | #if !defined(CH_CFG_ST_RESOLUTION) | ||
| 46 | #define CH_CFG_ST_RESOLUTION 32 | ||
| 47 | #endif | ||
| 48 | |||
| 49 | /** | ||
| 50 | * @brief System tick frequency. | ||
| 51 | * @details Frequency of the system timer that drives the system ticks. This | ||
| 52 | * setting also defines the system tick time unit. | ||
| 53 | */ | ||
| 54 | #if !defined(CH_CFG_ST_FREQUENCY) | ||
| 55 | #define CH_CFG_ST_FREQUENCY 10000 | ||
| 56 | #endif | ||
| 57 | |||
| 58 | /** | ||
| 59 | * @brief Time intervals data size. | ||
| 60 | * @note Allowed values are 16, 32 or 64 bits. | ||
| 61 | */ | ||
| 62 | #if !defined(CH_CFG_INTERVALS_SIZE) | ||
| 63 | #define CH_CFG_INTERVALS_SIZE 32 | ||
| 64 | #endif | ||
| 65 | |||
| 66 | /** | ||
| 67 | * @brief Time types data size. | ||
| 68 | * @note Allowed values are 16 or 32 bits. | ||
| 69 | */ | ||
| 70 | #if !defined(CH_CFG_TIME_TYPES_SIZE) | ||
| 71 | #define CH_CFG_TIME_TYPES_SIZE 32 | ||
| 72 | #endif | ||
| 73 | |||
| 74 | /** | ||
| 75 | * @brief Time delta constant for the tick-less mode. | ||
| 76 | * @note If this value is zero then the system uses the classic | ||
| 77 | * periodic tick. This value represents the minimum number | ||
| 78 | * of ticks that is safe to specify in a timeout directive. | ||
| 79 | * The value one is not valid, timeouts are rounded up to | ||
| 80 | * this value. | ||
| 81 | */ | ||
| 82 | #if !defined(CH_CFG_ST_TIMEDELTA) | ||
| 83 | #define CH_CFG_ST_TIMEDELTA 2 | ||
| 84 | #endif | ||
| 85 | |||
| 86 | /** @} */ | ||
| 87 | |||
| 88 | /*===========================================================================*/ | ||
| 89 | /** | ||
| 90 | * @name Kernel parameters and options | ||
| 91 | * @{ | ||
| 92 | */ | ||
| 93 | /*===========================================================================*/ | ||
| 94 | |||
| 95 | /** | ||
| 96 | * @brief Round robin interval. | ||
| 97 | * @details This constant is the number of system ticks allowed for the | ||
| 98 | * threads before preemption occurs. Setting this value to zero | ||
| 99 | * disables the preemption for threads with equal priority and the | ||
| 100 | * round robin becomes cooperative. Note that higher priority | ||
| 101 | * threads can still preempt, the kernel is always preemptive. | ||
| 102 | * @note Disabling the round robin preemption makes the kernel more compact | ||
| 103 | * and generally faster. | ||
| 104 | * @note The round robin preemption is not supported in tickless mode and | ||
| 105 | * must be set to zero in that case. | ||
| 106 | */ | ||
| 107 | #if !defined(CH_CFG_TIME_QUANTUM) | ||
| 108 | #define CH_CFG_TIME_QUANTUM 0 | ||
| 109 | #endif | ||
| 110 | |||
| 111 | /** | ||
| 112 | * @brief Managed RAM size. | ||
| 113 | * @details Size of the RAM area to be managed by the OS. If set to zero | ||
| 114 | * then the whole available RAM is used. The core memory is made | ||
| 115 | * available to the heap allocator and/or can be used directly through | ||
| 116 | * the simplified core memory allocator. | ||
| 117 | * | ||
| 118 | * @note In order to let the OS manage the whole RAM the linker script must | ||
| 119 | * provide the @p __heap_base__ and @p __heap_end__ symbols. | ||
| 120 | * @note Requires @p CH_CFG_USE_MEMCORE. | ||
| 121 | */ | ||
| 122 | #if !defined(CH_CFG_MEMCORE_SIZE) | ||
| 123 | #define CH_CFG_MEMCORE_SIZE 0 | ||
| 124 | #endif | ||
| 125 | |||
| 126 | /** | ||
| 127 | * @brief Idle thread automatic spawn suppression. | ||
| 128 | * @details When this option is activated the function @p chSysInit() | ||
| 129 | * does not spawn the idle thread. The application @p main() | ||
| 130 | * function becomes the idle thread and must implement an | ||
| 131 | * infinite loop. | ||
| 132 | */ | ||
| 133 | #if !defined(CH_CFG_NO_IDLE_THREAD) | ||
| 134 | #define CH_CFG_NO_IDLE_THREAD FALSE | ||
| 135 | #endif | ||
| 136 | |||
| 137 | /** @} */ | ||
| 138 | |||
| 139 | /*===========================================================================*/ | ||
| 140 | /** | ||
| 141 | * @name Performance options | ||
| 142 | * @{ | ||
| 143 | */ | ||
| 144 | /*===========================================================================*/ | ||
| 145 | |||
| 146 | /** | ||
| 147 | * @brief OS optimization. | ||
| 148 | * @details If enabled then time efficient rather than space efficient code | ||
| 149 | * is used when two possible implementations exist. | ||
| 150 | * | ||
| 151 | * @note This is not related to the compiler optimization options. | ||
| 152 | * @note The default is @p TRUE. | ||
| 153 | */ | ||
| 154 | #if !defined(CH_CFG_OPTIMIZE_SPEED) | ||
| 155 | #define CH_CFG_OPTIMIZE_SPEED TRUE | ||
| 156 | #endif | ||
| 157 | |||
| 158 | /** @} */ | ||
| 159 | |||
| 160 | /*===========================================================================*/ | ||
| 161 | /** | ||
| 162 | * @name Subsystem options | ||
| 163 | * @{ | ||
| 164 | */ | ||
| 165 | /*===========================================================================*/ | ||
| 166 | |||
| 167 | /** | ||
| 168 | * @brief Time Measurement APIs. | ||
| 169 | * @details If enabled then the time measurement APIs are included in | ||
| 170 | * the kernel. | ||
| 171 | * | ||
| 172 | * @note The default is @p TRUE. | ||
| 173 | */ | ||
| 174 | #if !defined(CH_CFG_USE_TM) | ||
| 175 | #define CH_CFG_USE_TM TRUE | ||
| 176 | #endif | ||
| 177 | |||
| 178 | /** | ||
| 179 | * @brief Threads registry APIs. | ||
| 180 | * @details If enabled then the registry APIs are included in the kernel. | ||
| 181 | * | ||
| 182 | * @note The default is @p TRUE. | ||
| 183 | */ | ||
| 184 | #if !defined(CH_CFG_USE_REGISTRY) | ||
| 185 | #define CH_CFG_USE_REGISTRY TRUE | ||
| 186 | #endif | ||
| 187 | |||
| 188 | /** | ||
| 189 | * @brief Threads synchronization APIs. | ||
| 190 | * @details If enabled then the @p chThdWait() function is included in | ||
| 191 | * the kernel. | ||
| 192 | * | ||
| 193 | * @note The default is @p TRUE. | ||
| 194 | */ | ||
| 195 | #if !defined(CH_CFG_USE_WAITEXIT) | ||
| 196 | #define CH_CFG_USE_WAITEXIT TRUE | ||
| 197 | #endif | ||
| 198 | |||
| 199 | /** | ||
| 200 | * @brief Semaphores APIs. | ||
| 201 | * @details If enabled then the Semaphores APIs are included in the kernel. | ||
| 202 | * | ||
| 203 | * @note The default is @p TRUE. | ||
| 204 | */ | ||
| 205 | #if !defined(CH_CFG_USE_SEMAPHORES) | ||
| 206 | #define CH_CFG_USE_SEMAPHORES TRUE | ||
| 207 | #endif | ||
| 208 | |||
| 209 | /** | ||
| 210 | * @brief Semaphores queuing mode. | ||
| 211 | * @details If enabled then the threads are enqueued on semaphores by | ||
| 212 | * priority rather than in FIFO order. | ||
| 213 | * | ||
| 214 | * @note The default is @p FALSE. Enable this if you have special | ||
| 215 | * requirements. | ||
| 216 | * @note Requires @p CH_CFG_USE_SEMAPHORES. | ||
| 217 | */ | ||
| 218 | #if !defined(CH_CFG_USE_SEMAPHORES_PRIORITY) | ||
| 219 | #define CH_CFG_USE_SEMAPHORES_PRIORITY FALSE | ||
| 220 | #endif | ||
| 221 | |||
| 222 | /** | ||
| 223 | * @brief Mutexes APIs. | ||
| 224 | * @details If enabled then the mutexes APIs are included in the kernel. | ||
| 225 | * | ||
| 226 | * @note The default is @p TRUE. | ||
| 227 | */ | ||
| 228 | #if !defined(CH_CFG_USE_MUTEXES) | ||
| 229 | #define CH_CFG_USE_MUTEXES TRUE | ||
| 230 | #endif | ||
| 231 | |||
| 232 | /** | ||
| 233 | * @brief Enables recursive behavior on mutexes. | ||
| 234 | * @note Recursive mutexes are heavier and have an increased | ||
| 235 | * memory footprint. | ||
| 236 | * | ||
| 237 | * @note The default is @p FALSE. | ||
| 238 | * @note Requires @p CH_CFG_USE_MUTEXES. | ||
| 239 | */ | ||
| 240 | #if !defined(CH_CFG_USE_MUTEXES_RECURSIVE) | ||
| 241 | #define CH_CFG_USE_MUTEXES_RECURSIVE FALSE | ||
| 242 | #endif | ||
| 243 | |||
| 244 | /** | ||
| 245 | * @brief Conditional Variables APIs. | ||
| 246 | * @details If enabled then the conditional variables APIs are included | ||
| 247 | * in the kernel. | ||
| 248 | * | ||
| 249 | * @note The default is @p TRUE. | ||
| 250 | * @note Requires @p CH_CFG_USE_MUTEXES. | ||
| 251 | */ | ||
| 252 | #if !defined(CH_CFG_USE_CONDVARS) | ||
| 253 | #define CH_CFG_USE_CONDVARS TRUE | ||
| 254 | #endif | ||
| 255 | |||
| 256 | /** | ||
| 257 | * @brief Conditional Variables APIs with timeout. | ||
| 258 | * @details If enabled then the conditional variables APIs with timeout | ||
| 259 | * specification are included in the kernel. | ||
| 260 | * | ||
| 261 | * @note The default is @p TRUE. | ||
| 262 | * @note Requires @p CH_CFG_USE_CONDVARS. | ||
| 263 | */ | ||
| 264 | #if !defined(CH_CFG_USE_CONDVARS_TIMEOUT) | ||
| 265 | #define CH_CFG_USE_CONDVARS_TIMEOUT TRUE | ||
| 266 | #endif | ||
| 267 | |||
| 268 | /** | ||
| 269 | * @brief Events Flags APIs. | ||
| 270 | * @details If enabled then the event flags APIs are included in the kernel. | ||
| 271 | * | ||
| 272 | * @note The default is @p TRUE. | ||
| 273 | */ | ||
| 274 | #if !defined(CH_CFG_USE_EVENTS) | ||
| 275 | #define CH_CFG_USE_EVENTS TRUE | ||
| 276 | #endif | ||
| 277 | |||
| 278 | /** | ||
| 279 | * @brief Events Flags APIs with timeout. | ||
| 280 | * @details If enabled then the events APIs with timeout specification | ||
| 281 | * are included in the kernel. | ||
| 282 | * | ||
| 283 | * @note The default is @p TRUE. | ||
| 284 | * @note Requires @p CH_CFG_USE_EVENTS. | ||
| 285 | */ | ||
| 286 | #if !defined(CH_CFG_USE_EVENTS_TIMEOUT) | ||
| 287 | #define CH_CFG_USE_EVENTS_TIMEOUT TRUE | ||
| 288 | #endif | ||
| 289 | |||
| 290 | /** | ||
| 291 | * @brief Synchronous Messages APIs. | ||
| 292 | * @details If enabled then the synchronous messages APIs are included | ||
| 293 | * in the kernel. | ||
| 294 | * | ||
| 295 | * @note The default is @p TRUE. | ||
| 296 | */ | ||
| 297 | #if !defined(CH_CFG_USE_MESSAGES) | ||
| 298 | #define CH_CFG_USE_MESSAGES TRUE | ||
| 299 | #endif | ||
| 300 | |||
| 301 | /** | ||
| 302 | * @brief Synchronous Messages queuing mode. | ||
| 303 | * @details If enabled then messages are served by priority rather than in | ||
| 304 | * FIFO order. | ||
| 305 | * | ||
| 306 | * @note The default is @p FALSE. Enable this if you have special | ||
| 307 | * requirements. | ||
| 308 | * @note Requires @p CH_CFG_USE_MESSAGES. | ||
| 309 | */ | ||
| 310 | #if !defined(CH_CFG_USE_MESSAGES_PRIORITY) | ||
| 311 | #define CH_CFG_USE_MESSAGES_PRIORITY FALSE | ||
| 312 | #endif | ||
| 313 | |||
| 314 | /** | ||
| 315 | * @brief Mailboxes APIs. | ||
| 316 | * @details If enabled then the asynchronous messages (mailboxes) APIs are | ||
| 317 | * included in the kernel. | ||
| 318 | * | ||
| 319 | * @note The default is @p TRUE. | ||
| 320 | * @note Requires @p CH_CFG_USE_SEMAPHORES. | ||
| 321 | */ | ||
| 322 | #if !defined(CH_CFG_USE_MAILBOXES) | ||
| 323 | #define CH_CFG_USE_MAILBOXES TRUE | ||
| 324 | #endif | ||
| 325 | |||
| 326 | /** | ||
| 327 | * @brief Core Memory Manager APIs. | ||
| 328 | * @details If enabled then the core memory manager APIs are included | ||
| 329 | * in the kernel. | ||
| 330 | * | ||
| 331 | * @note The default is @p TRUE. | ||
| 332 | */ | ||
| 333 | #if !defined(CH_CFG_USE_MEMCORE) | ||
| 334 | #define CH_CFG_USE_MEMCORE TRUE | ||
| 335 | #endif | ||
| 336 | |||
| 337 | /** | ||
| 338 | * @brief Heap Allocator APIs. | ||
| 339 | * @details If enabled then the memory heap allocator APIs are included | ||
| 340 | * in the kernel. | ||
| 341 | * | ||
| 342 | * @note The default is @p TRUE. | ||
| 343 | * @note Requires @p CH_CFG_USE_MEMCORE and either @p CH_CFG_USE_MUTEXES or | ||
| 344 | * @p CH_CFG_USE_SEMAPHORES. | ||
| 345 | * @note Mutexes are recommended. | ||
| 346 | */ | ||
| 347 | #if !defined(CH_CFG_USE_HEAP) | ||
| 348 | #define CH_CFG_USE_HEAP TRUE | ||
| 349 | #endif | ||
| 350 | |||
| 351 | /** | ||
| 352 | * @brief Memory Pools Allocator APIs. | ||
| 353 | * @details If enabled then the memory pools allocator APIs are included | ||
| 354 | * in the kernel. | ||
| 355 | * | ||
| 356 | * @note The default is @p TRUE. | ||
| 357 | */ | ||
| 358 | #if !defined(CH_CFG_USE_MEMPOOLS) | ||
| 359 | #define CH_CFG_USE_MEMPOOLS TRUE | ||
| 360 | #endif | ||
| 361 | |||
| 362 | /** | ||
| 363 | * @brief Objects FIFOs APIs. | ||
| 364 | * @details If enabled then the objects FIFOs APIs are included | ||
| 365 | * in the kernel. | ||
| 366 | * | ||
| 367 | * @note The default is @p TRUE. | ||
| 368 | */ | ||
| 369 | #if !defined(CH_CFG_USE_OBJ_FIFOS) | ||
| 370 | #define CH_CFG_USE_OBJ_FIFOS TRUE | ||
| 371 | #endif | ||
| 372 | |||
| 373 | /** | ||
| 374 | * @brief Pipes APIs. | ||
| 375 | * @details If enabled then the pipes APIs are included | ||
| 376 | * in the kernel. | ||
| 377 | * | ||
| 378 | * @note The default is @p TRUE. | ||
| 379 | */ | ||
| 380 | #if !defined(CH_CFG_USE_PIPES) | ||
| 381 | #define CH_CFG_USE_PIPES TRUE | ||
| 382 | #endif | ||
| 383 | |||
| 384 | /** | ||
| 385 | * @brief Dynamic Threads APIs. | ||
| 386 | * @details If enabled then the dynamic threads creation APIs are included | ||
| 387 | * in the kernel. | ||
| 388 | * | ||
| 389 | * @note The default is @p TRUE. | ||
| 390 | * @note Requires @p CH_CFG_USE_WAITEXIT. | ||
| 391 | * @note Requires @p CH_CFG_USE_HEAP and/or @p CH_CFG_USE_MEMPOOLS. | ||
| 392 | */ | ||
| 393 | #if !defined(CH_CFG_USE_DYNAMIC) | ||
| 394 | #define CH_CFG_USE_DYNAMIC TRUE | ||
| 395 | #endif | ||
| 396 | |||
| 397 | /** @} */ | ||
| 398 | |||
| 399 | /*===========================================================================*/ | ||
| 400 | /** | ||
| 401 | * @name Objects factory options | ||
| 402 | * @{ | ||
| 403 | */ | ||
| 404 | /*===========================================================================*/ | ||
| 405 | |||
| 406 | /** | ||
| 407 | * @brief Objects Factory APIs. | ||
| 408 | * @details If enabled then the objects factory APIs are included in the | ||
| 409 | * kernel. | ||
| 410 | * | ||
| 411 | * @note The default is @p FALSE. | ||
| 412 | */ | ||
| 413 | #if !defined(CH_CFG_USE_FACTORY) | ||
| 414 | #define CH_CFG_USE_FACTORY TRUE | ||
| 415 | #endif | ||
| 416 | |||
| 417 | /** | ||
| 418 | * @brief Maximum length for object names. | ||
| 419 | * @details If the specified length is zero then the name is stored by | ||
| 420 | * pointer but this could have unintended side effects. | ||
| 421 | */ | ||
| 422 | #if !defined(CH_CFG_FACTORY_MAX_NAMES_LENGTH) | ||
| 423 | #define CH_CFG_FACTORY_MAX_NAMES_LENGTH 8 | ||
| 424 | #endif | ||
| 425 | |||
| 426 | /** | ||
| 427 | * @brief Enables the registry of generic objects. | ||
| 428 | */ | ||
| 429 | #if !defined(CH_CFG_FACTORY_OBJECTS_REGISTRY) | ||
| 430 | #define CH_CFG_FACTORY_OBJECTS_REGISTRY TRUE | ||
| 431 | #endif | ||
| 432 | |||
| 433 | /** | ||
| 434 | * @brief Enables factory for generic buffers. | ||
| 435 | */ | ||
| 436 | #if !defined(CH_CFG_FACTORY_GENERIC_BUFFERS) | ||
| 437 | #define CH_CFG_FACTORY_GENERIC_BUFFERS TRUE | ||
| 438 | #endif | ||
| 439 | |||
| 440 | /** | ||
| 441 | * @brief Enables factory for semaphores. | ||
| 442 | */ | ||
| 443 | #if !defined(CH_CFG_FACTORY_SEMAPHORES) | ||
| 444 | #define CH_CFG_FACTORY_SEMAPHORES TRUE | ||
| 445 | #endif | ||
| 446 | |||
| 447 | /** | ||
| 448 | * @brief Enables factory for mailboxes. | ||
| 449 | */ | ||
| 450 | #if !defined(CH_CFG_FACTORY_MAILBOXES) | ||
| 451 | #define CH_CFG_FACTORY_MAILBOXES TRUE | ||
| 452 | #endif | ||
| 453 | |||
| 454 | /** | ||
| 455 | * @brief Enables factory for objects FIFOs. | ||
| 456 | */ | ||
| 457 | #if !defined(CH_CFG_FACTORY_OBJ_FIFOS) | ||
| 458 | #define CH_CFG_FACTORY_OBJ_FIFOS TRUE | ||
| 459 | #endif | ||
| 460 | |||
| 461 | /** | ||
| 462 | * @brief Enables factory for Pipes. | ||
| 463 | */ | ||
| 464 | #if !defined(CH_CFG_FACTORY_PIPES) || defined(__DOXYGEN__) | ||
| 465 | #define CH_CFG_FACTORY_PIPES TRUE | ||
| 466 | #endif | ||
| 467 | |||
| 468 | /** @} */ | ||
| 469 | |||
| 470 | /*===========================================================================*/ | ||
| 471 | /** | ||
| 472 | * @name Debug options | ||
| 473 | * @{ | ||
| 474 | */ | ||
| 475 | /*===========================================================================*/ | ||
| 476 | |||
| 477 | /** | ||
| 478 | * @brief Debug option, kernel statistics. | ||
| 479 | * | ||
| 480 | * @note The default is @p FALSE. | ||
| 481 | */ | ||
| 482 | #if !defined(CH_DBG_STATISTICS) | ||
| 483 | #define CH_DBG_STATISTICS FALSE | ||
| 484 | #endif | ||
| 485 | |||
| 486 | /** | ||
| 487 | * @brief Debug option, system state check. | ||
| 488 | * @details If enabled the correct call protocol for system APIs is checked | ||
| 489 | * at runtime. | ||
| 490 | * | ||
| 491 | * @note The default is @p FALSE. | ||
| 492 | */ | ||
| 493 | #if !defined(CH_DBG_SYSTEM_STATE_CHECK) | ||
| 494 | #define CH_DBG_SYSTEM_STATE_CHECK FALSE | ||
| 495 | #endif | ||
| 496 | |||
| 497 | /** | ||
| 498 | * @brief Debug option, parameters checks. | ||
| 499 | * @details If enabled then the checks on the API functions input | ||
| 500 | * parameters are activated. | ||
| 501 | * | ||
| 502 | * @note The default is @p FALSE. | ||
| 503 | */ | ||
| 504 | #if !defined(CH_DBG_ENABLE_CHECKS) | ||
| 505 | #define CH_DBG_ENABLE_CHECKS FALSE | ||
| 506 | #endif | ||
| 507 | |||
| 508 | /** | ||
| 509 | * @brief Debug option, consistency checks. | ||
| 510 | * @details If enabled then all the assertions in the kernel code are | ||
| 511 | * activated. This includes consistency checks inside the kernel, | ||
| 512 | * runtime anomalies and port-defined checks. | ||
| 513 | * | ||
| 514 | * @note The default is @p FALSE. | ||
| 515 | */ | ||
| 516 | #if !defined(CH_DBG_ENABLE_ASSERTS) | ||
| 517 | #define CH_DBG_ENABLE_ASSERTS FALSE | ||
| 518 | #endif | ||
| 519 | |||
| 520 | /** | ||
| 521 | * @brief Debug option, trace buffer. | ||
| 522 | * @details If enabled then the trace buffer is activated. | ||
| 523 | * | ||
| 524 | * @note The default is @p CH_DBG_TRACE_MASK_DISABLED. | ||
| 525 | */ | ||
| 526 | #if !defined(CH_DBG_TRACE_MASK) | ||
| 527 | #define CH_DBG_TRACE_MASK CH_DBG_TRACE_MASK_DISABLED | ||
| 528 | #endif | ||
| 529 | |||
| 530 | /** | ||
| 531 | * @brief Trace buffer entries. | ||
| 532 | * @note The trace buffer is only allocated if @p CH_DBG_TRACE_MASK is | ||
| 533 | * different from @p CH_DBG_TRACE_MASK_DISABLED. | ||
| 534 | */ | ||
| 535 | #if !defined(CH_DBG_TRACE_BUFFER_SIZE) | ||
| 536 | #define CH_DBG_TRACE_BUFFER_SIZE 128 | ||
| 537 | #endif | ||
| 538 | |||
| 539 | /** | ||
| 540 | * @brief Debug option, stack checks. | ||
| 541 | * @details If enabled then a runtime stack check is performed. | ||
| 542 | * | ||
| 543 | * @note The default is @p FALSE. | ||
| 544 | * @note The stack check is performed in a architecture/port dependent way. | ||
| 545 | * It may not be implemented or some ports. | ||
| 546 | * @note The default failure mode is to halt the system with the global | ||
| 547 | * @p panic_msg variable set to @p NULL. | ||
| 548 | */ | ||
| 549 | #if !defined(CH_DBG_ENABLE_STACK_CHECK) | ||
| 550 | #define CH_DBG_ENABLE_STACK_CHECK FALSE | ||
| 551 | #endif | ||
| 552 | |||
| 553 | /** | ||
| 554 | * @brief Debug option, stacks initialization. | ||
| 555 | * @details If enabled then the threads working area is filled with a byte | ||
| 556 | * value when a thread is created. This can be useful for the | ||
| 557 | * runtime measurement of the used stack. | ||
| 558 | * | ||
| 559 | * @note The default is @p FALSE. | ||
| 560 | */ | ||
| 561 | #if !defined(CH_DBG_FILL_THREADS) | ||
| 562 | #define CH_DBG_FILL_THREADS FALSE | ||
| 563 | #endif | ||
| 564 | |||
| 565 | /** | ||
| 566 | * @brief Debug option, threads profiling. | ||
| 567 | * @details If enabled then a field is added to the @p thread_t structure that | ||
| 568 | * counts the system ticks occurred while executing the thread. | ||
| 569 | * | ||
| 570 | * @note The default is @p FALSE. | ||
| 571 | * @note This debug option is not currently compatible with the | ||
| 572 | * tickless mode. | ||
| 573 | */ | ||
| 574 | #if !defined(CH_DBG_THREADS_PROFILING) | ||
| 575 | #define CH_DBG_THREADS_PROFILING FALSE | ||
| 576 | #endif | ||
| 577 | |||
| 578 | /** @} */ | ||
| 579 | |||
| 580 | /*===========================================================================*/ | ||
| 581 | /** | ||
| 582 | * @name Kernel hooks | ||
| 583 | * @{ | ||
| 584 | */ | ||
| 585 | /*===========================================================================*/ | ||
| 586 | |||
| 587 | /** | ||
| 588 | * @brief System structure extension. | ||
| 589 | * @details User fields added to the end of the @p ch_system_t structure. | ||
| 590 | */ | ||
| 591 | #define CH_CFG_SYSTEM_EXTRA_FIELDS \ | ||
| 592 | /* Add threads custom fields here.*/ | ||
| 593 | |||
| 594 | /** | ||
| 595 | * @brief System initialization hook. | ||
| 596 | * @details User initialization code added to the @p chSysInit() function | ||
| 597 | * just before interrupts are enabled globally. | ||
| 598 | */ | ||
| 599 | #define CH_CFG_SYSTEM_INIT_HOOK() { \ | ||
| 600 | /* Add threads initialization code here.*/ \ | ||
| 601 | } | ||
| 602 | |||
| 603 | /** | ||
| 604 | * @brief Threads descriptor structure extension. | ||
| 605 | * @details User fields added to the end of the @p thread_t structure. | ||
| 606 | */ | ||
| 607 | #define CH_CFG_THREAD_EXTRA_FIELDS \ | ||
| 608 | /* Add threads custom fields here.*/ | ||
| 609 | |||
| 610 | /** | ||
| 611 | * @brief Threads initialization hook. | ||
| 612 | * @details User initialization code added to the @p _thread_init() function. | ||
| 613 | * | ||
| 614 | * @note It is invoked from within @p _thread_init() and implicitly from all | ||
| 615 | * the threads creation APIs. | ||
| 616 | */ | ||
| 617 | #define CH_CFG_THREAD_INIT_HOOK(tp) { \ | ||
| 618 | /* Add threads initialization code here.*/ \ | ||
| 619 | } | ||
| 620 | |||
| 621 | /** | ||
| 622 | * @brief Threads finalization hook. | ||
| 623 | * @details User finalization code added to the @p chThdExit() API. | ||
| 624 | */ | ||
| 625 | #define CH_CFG_THREAD_EXIT_HOOK(tp) { \ | ||
| 626 | /* Add threads finalization code here.*/ \ | ||
| 627 | } | ||
| 628 | |||
| 629 | /** | ||
| 630 | * @brief Context switch hook. | ||
| 631 | * @details This hook is invoked just before switching between threads. | ||
| 632 | */ | ||
| 633 | #define CH_CFG_CONTEXT_SWITCH_HOOK(ntp, otp) { \ | ||
| 634 | /* Context switch code here.*/ \ | ||
| 635 | } | ||
| 636 | |||
| 637 | /** | ||
| 638 | * @brief ISR enter hook. | ||
| 639 | */ | ||
| 640 | #define CH_CFG_IRQ_PROLOGUE_HOOK() { \ | ||
| 641 | /* IRQ prologue code here.*/ \ | ||
| 642 | } | ||
| 643 | |||
| 644 | /** | ||
| 645 | * @brief ISR exit hook. | ||
| 646 | */ | ||
| 647 | #define CH_CFG_IRQ_EPILOGUE_HOOK() { \ | ||
| 648 | /* IRQ epilogue code here.*/ \ | ||
| 649 | } | ||
| 650 | |||
| 651 | /** | ||
| 652 | * @brief Idle thread enter hook. | ||
| 653 | * @note This hook is invoked within a critical zone, no OS functions | ||
| 654 | * should be invoked from here. | ||
| 655 | * @note This macro can be used to activate a power saving mode. | ||
| 656 | */ | ||
| 657 | #define CH_CFG_IDLE_ENTER_HOOK() { \ | ||
| 658 | /* Idle-enter code here.*/ \ | ||
| 659 | } | ||
| 660 | |||
| 661 | /** | ||
| 662 | * @brief Idle thread leave hook. | ||
| 663 | * @note This hook is invoked within a critical zone, no OS functions | ||
| 664 | * should be invoked from here. | ||
| 665 | * @note This macro can be used to deactivate a power saving mode. | ||
| 666 | */ | ||
| 667 | #define CH_CFG_IDLE_LEAVE_HOOK() { \ | ||
| 668 | /* Idle-leave code here.*/ \ | ||
| 669 | } | ||
| 670 | |||
| 671 | /** | ||
| 672 | * @brief Idle Loop hook. | ||
| 673 | * @details This hook is continuously invoked by the idle thread loop. | ||
| 674 | */ | ||
| 675 | #define CH_CFG_IDLE_LOOP_HOOK() { \ | ||
| 676 | /* Idle loop code here.*/ \ | ||
| 677 | } | ||
| 678 | |||
| 679 | /** | ||
| 680 | * @brief System tick event hook. | ||
| 681 | * @details This hook is invoked in the system tick handler immediately | ||
| 682 | * after processing the virtual timers queue. | ||
| 683 | */ | ||
| 684 | #define CH_CFG_SYSTEM_TICK_HOOK() { \ | ||
| 685 | /* System tick event code here.*/ \ | ||
| 686 | } | ||
| 687 | |||
| 688 | /** | ||
| 689 | * @brief System halt hook. | ||
| 690 | * @details This hook is invoked in case to a system halting error before | ||
| 691 | * the system is halted. | ||
| 692 | */ | ||
| 693 | #define CH_CFG_SYSTEM_HALT_HOOK(reason) { \ | ||
| 694 | /* System halt code here.*/ \ | ||
| 695 | } | ||
| 696 | |||
| 697 | /** | ||
| 698 | * @brief Trace hook. | ||
| 699 | * @details This hook is invoked each time a new record is written in the | ||
| 700 | * trace buffer. | ||
| 701 | */ | ||
| 702 | #define CH_CFG_TRACE_HOOK(tep) { \ | ||
| 703 | /* Trace code here.*/ \ | ||
| 704 | } | ||
| 705 | |||
| 706 | /** @} */ | ||
| 707 | |||
| 708 | /*===========================================================================*/ | ||
| 709 | /* Port-specific settings (override port settings defaulted in chcore.h). */ | ||
| 710 | /*===========================================================================*/ | ||
| 711 | |||
| 712 | #endif /* CHCONF_H */ | ||
| 713 | |||
| 714 | /** @} */ | ||
diff --git a/keyboards/handwired/onekey/blackpill_f411/config.h b/keyboards/handwired/onekey/blackpill_f411/config.h new file mode 100644 index 000000000..01555e431 --- /dev/null +++ b/keyboards/handwired/onekey/blackpill_f411/config.h | |||
| @@ -0,0 +1,29 @@ | |||
| 1 | /* Copyright 2019 | ||
| 2 | * | ||
| 3 | * This program is free software: you can redistribute it and/or modify | ||
| 4 | * it under the terms of the GNU General Public License as published by | ||
| 5 | * the Free Software Foundation, either version 2 of the License, or | ||
| 6 | * (at your option) any later version. | ||
| 7 | * | ||
| 8 | * This program is distributed in the hope that it will be useful, | ||
| 9 | * but WITHOUT ANY WARRANTY; without even the implied warranty of | ||
| 10 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | ||
| 11 | * GNU General Public License for more details. | ||
| 12 | * | ||
| 13 | * You should have received a copy of the GNU General Public License | ||
| 14 | * along with this program. If not, see <http://www.gnu.org/licenses/>. | ||
| 15 | */ | ||
| 16 | |||
| 17 | #pragma once | ||
| 18 | |||
| 19 | #include "config_common.h" | ||
| 20 | |||
| 21 | #define MATRIX_COL_PINS { B0 } | ||
| 22 | #define MATRIX_ROW_PINS { A7 } | ||
| 23 | #define UNUSED_PINS | ||
| 24 | |||
| 25 | #define BACKLIGHT_PIN A0 | ||
| 26 | #define BACKLIGHT_PWM_DRIVER PWMD2 | ||
| 27 | #define BACKLIGHT_PWM_CHANNEL 1 | ||
| 28 | |||
| 29 | #define RGB_DI_PIN A1 | ||
diff --git a/keyboards/handwired/onekey/blackpill_f411/halconf.h b/keyboards/handwired/onekey/blackpill_f411/halconf.h new file mode 100644 index 000000000..a8db392aa --- /dev/null +++ b/keyboards/handwired/onekey/blackpill_f411/halconf.h | |||
| @@ -0,0 +1,525 @@ | |||
| 1 | /* | ||
| 2 | ChibiOS - Copyright (C) 2006..2018 Giovanni Di Sirio | ||
| 3 | |||
| 4 | Licensed under the Apache License, Version 2.0 (the "License"); | ||
| 5 | you may not use this file except in compliance with the License. | ||
| 6 | You may obtain a copy of the License at | ||
| 7 | |||
| 8 | http://www.apache.org/licenses/LICENSE-2.0 | ||
| 9 | |||
| 10 | Unless required by applicable law or agreed to in writing, software | ||
| 11 | distributed under the License is distributed on an "AS IS" BASIS, | ||
| 12 | WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. | ||
| 13 | See the License for the specific language governing permissions and | ||
| 14 | limitations under the License. | ||
| 15 | */ | ||
| 16 | |||
| 17 | /** | ||
| 18 | * @file templates/halconf.h | ||
| 19 | * @brief HAL configuration header. | ||
| 20 | * @details HAL configuration file, this file allows to enable or disable the | ||
| 21 | * various device drivers from your application. You may also use | ||
| 22 | * this file in order to override the device drivers default settings. | ||
| 23 | * | ||
| 24 | * @addtogroup HAL_CONF | ||
| 25 | * @{ | ||
| 26 | */ | ||
| 27 | |||
| 28 | #ifndef HALCONF_H | ||
| 29 | #define HALCONF_H | ||
| 30 | |||
| 31 | #define _CHIBIOS_HAL_CONF_ | ||
| 32 | #define _CHIBIOS_HAL_CONF_VER_7_0_ | ||
| 33 | |||
| 34 | #include "mcuconf.h" | ||
| 35 | |||
| 36 | /** | ||
| 37 | * @brief Enables the PAL subsystem. | ||
| 38 | */ | ||
| 39 | #if !defined(HAL_USE_PAL) || defined(__DOXYGEN__) | ||
| 40 | #define HAL_USE_PAL TRUE | ||
| 41 | #endif | ||
| 42 | |||
| 43 | /** | ||
| 44 | * @brief Enables the ADC subsystem. | ||
| 45 | */ | ||
| 46 | #if !defined(HAL_USE_ADC) || defined(__DOXYGEN__) | ||
| 47 | #define HAL_USE_ADC FALSE | ||
| 48 | #endif | ||
| 49 | |||
| 50 | /** | ||
| 51 | * @brief Enables the CAN subsystem. | ||
| 52 | */ | ||
| 53 | #if !defined(HAL_USE_CAN) || defined(__DOXYGEN__) | ||
| 54 | #define HAL_USE_CAN FALSE | ||
| 55 | #endif | ||
| 56 | |||
| 57 | /** | ||
| 58 | * @brief Enables the cryptographic subsystem. | ||
| 59 | */ | ||
| 60 | #if !defined(HAL_USE_CRY) || defined(__DOXYGEN__) | ||
| 61 | #define HAL_USE_CRY FALSE | ||
| 62 | #endif | ||
| 63 | |||
| 64 | /** | ||
| 65 | * @brief Enables the DAC subsystem. | ||
| 66 | */ | ||
| 67 | #if !defined(HAL_USE_DAC) || defined(__DOXYGEN__) | ||
| 68 | #define HAL_USE_DAC FALSE | ||
| 69 | #endif | ||
| 70 | |||
| 71 | /** | ||
| 72 | * @brief Enables the GPT subsystem. | ||
| 73 | */ | ||
| 74 | #if !defined(HAL_USE_GPT) || defined(__DOXYGEN__) | ||
| 75 | #define HAL_USE_GPT FALSE | ||
| 76 | #endif | ||
| 77 | |||
| 78 | /** | ||
| 79 | * @brief Enables the I2C subsystem. | ||
| 80 | */ | ||
| 81 | #if !defined(HAL_USE_I2C) || defined(__DOXYGEN__) | ||
| 82 | #define HAL_USE_I2C FALSE | ||
| 83 | #endif | ||
| 84 | |||
| 85 | /** | ||
| 86 | * @brief Enables the I2S subsystem. | ||
| 87 | */ | ||
| 88 | #if !defined(HAL_USE_I2S) || defined(__DOXYGEN__) | ||
| 89 | #define HAL_USE_I2S FALSE | ||
| 90 | #endif | ||
| 91 | |||
| 92 | /** | ||
| 93 | * @brief Enables the ICU subsystem. | ||
| 94 | */ | ||
| 95 | #if !defined(HAL_USE_ICU) || defined(__DOXYGEN__) | ||
| 96 | #define HAL_USE_ICU FALSE | ||
| 97 | #endif | ||
| 98 | |||
| 99 | /** | ||
| 100 | * @brief Enables the MAC subsystem. | ||
| 101 | */ | ||
| 102 | #if !defined(HAL_USE_MAC) || defined(__DOXYGEN__) | ||
| 103 | #define HAL_USE_MAC FALSE | ||
| 104 | #endif | ||
| 105 | |||
| 106 | /** | ||
| 107 | * @brief Enables the MMC_SPI subsystem. | ||
| 108 | */ | ||
| 109 | #if !defined(HAL_USE_MMC_SPI) || defined(__DOXYGEN__) | ||
| 110 | #define HAL_USE_MMC_SPI FALSE | ||
| 111 | #endif | ||
| 112 | |||
| 113 | /** | ||
| 114 | * @brief Enables the PWM subsystem. | ||
| 115 | */ | ||
| 116 | #if !defined(HAL_USE_PWM) || defined(__DOXYGEN__) | ||
| 117 | #define HAL_USE_PWM FALSE | ||
| 118 | #endif | ||
| 119 | |||
| 120 | /** | ||
| 121 | * @brief Enables the RTC subsystem. | ||
| 122 | */ | ||
| 123 | #if !defined(HAL_USE_RTC) || defined(__DOXYGEN__) | ||
| 124 | #define HAL_USE_RTC FALSE | ||
| 125 | #endif | ||
| 126 | |||
| 127 | /** | ||
| 128 | * @brief Enables the SDC subsystem. | ||
| 129 | */ | ||
| 130 | #if !defined(HAL_USE_SDC) || defined(__DOXYGEN__) | ||
| 131 | #define HAL_USE_SDC FALSE | ||
| 132 | #endif | ||
| 133 | |||
| 134 | /** | ||
| 135 | * @brief Enables the SERIAL subsystem. | ||
| 136 | */ | ||
| 137 | #if !defined(HAL_USE_SERIAL) || defined(__DOXYGEN__) | ||
| 138 | #define HAL_USE_SERIAL FALSE | ||
| 139 | #endif | ||
| 140 | |||
| 141 | /** | ||
| 142 | * @brief Enables the SERIAL over USB subsystem. | ||
| 143 | */ | ||
| 144 | #if !defined(HAL_USE_SERIAL_USB) || defined(__DOXYGEN__) | ||
| 145 | #define HAL_USE_SERIAL_USB FALSE | ||
| 146 | #endif | ||
| 147 | |||
| 148 | /** | ||
| 149 | * @brief Enables the SIO subsystem. | ||
| 150 | */ | ||
| 151 | #if !defined(HAL_USE_SIO) || defined(__DOXYGEN__) | ||
| 152 | #define HAL_USE_SIO FALSE | ||
| 153 | #endif | ||
| 154 | |||
| 155 | /** | ||
| 156 | * @brief Enables the SPI subsystem. | ||
| 157 | */ | ||
| 158 | #if !defined(HAL_USE_SPI) || defined(__DOXYGEN__) | ||
| 159 | #define HAL_USE_SPI FALSE | ||
| 160 | #endif | ||
| 161 | |||
| 162 | /** | ||
| 163 | * @brief Enables the TRNG subsystem. | ||
| 164 | */ | ||
| 165 | #if !defined(HAL_USE_TRNG) || defined(__DOXYGEN__) | ||
| 166 | #define HAL_USE_TRNG FALSE | ||
| 167 | #endif | ||
| 168 | |||
| 169 | /** | ||
| 170 | * @brief Enables the UART subsystem. | ||
| 171 | */ | ||
| 172 | #if !defined(HAL_USE_UART) || defined(__DOXYGEN__) | ||
| 173 | #define HAL_USE_UART FALSE | ||
| 174 | #endif | ||
| 175 | |||
| 176 | /** | ||
| 177 | * @brief Enables the USB subsystem. | ||
| 178 | */ | ||
| 179 | #if !defined(HAL_USE_USB) || defined(__DOXYGEN__) | ||
| 180 | #define HAL_USE_USB TRUE | ||
| 181 | #endif | ||
| 182 | |||
| 183 | /** | ||
| 184 | * @brief Enables the WDG subsystem. | ||
| 185 | */ | ||
| 186 | #if !defined(HAL_USE_WDG) || defined(__DOXYGEN__) | ||
| 187 | #define HAL_USE_WDG FALSE | ||
| 188 | #endif | ||
| 189 | |||
| 190 | /** | ||
| 191 | * @brief Enables the WSPI subsystem. | ||
| 192 | */ | ||
| 193 | #if !defined(HAL_USE_WSPI) || defined(__DOXYGEN__) | ||
| 194 | #define HAL_USE_WSPI FALSE | ||
| 195 | #endif | ||
| 196 | |||
| 197 | /*===========================================================================*/ | ||
| 198 | /* PAL driver related settings. */ | ||
| 199 | /*===========================================================================*/ | ||
| 200 | |||
| 201 | /** | ||
| 202 | * @brief Enables synchronous APIs. | ||
| 203 | * @note Disabling this option saves both code and data space. | ||
| 204 | */ | ||
| 205 | #if !defined(PAL_USE_CALLBACKS) || defined(__DOXYGEN__) | ||
| 206 | #define PAL_USE_CALLBACKS FALSE | ||
| 207 | #endif | ||
| 208 | |||
| 209 | /** | ||
| 210 | * @brief Enables synchronous APIs. | ||
| 211 | * @note Disabling this option saves both code and data space. | ||
| 212 | */ | ||
| 213 | #if !defined(PAL_USE_WAIT) || defined(__DOXYGEN__) | ||
| 214 | #define PAL_USE_WAIT FALSE | ||
| 215 | #endif | ||
| 216 | |||
| 217 | /*===========================================================================*/ | ||
| 218 | /* ADC driver related settings. */ | ||
| 219 | /*===========================================================================*/ | ||
| 220 | |||
| 221 | /** | ||
| 222 | * @brief Enables synchronous APIs. | ||
| 223 | * @note Disabling this option saves both code and data space. | ||
| 224 | */ | ||
| 225 | #if !defined(ADC_USE_WAIT) || defined(__DOXYGEN__) | ||
| 226 | #define ADC_USE_WAIT TRUE | ||
| 227 | #endif | ||
| 228 | |||
| 229 | /** | ||
| 230 | * @brief Enables the @p adcAcquireBus() and @p adcReleaseBus() APIs. | ||
| 231 | * @note Disabling this option saves both code and data space. | ||
| 232 | */ | ||
| 233 | #if !defined(ADC_USE_MUTUAL_EXCLUSION) || defined(__DOXYGEN__) | ||
| 234 | #define ADC_USE_MUTUAL_EXCLUSION TRUE | ||
| 235 | #endif | ||
| 236 | |||
| 237 | /*===========================================================================*/ | ||
| 238 | /* CAN driver related settings. */ | ||
| 239 | /*===========================================================================*/ | ||
| 240 | |||
| 241 | /** | ||
| 242 | * @brief Sleep mode related APIs inclusion switch. | ||
| 243 | */ | ||
| 244 | #if !defined(CAN_USE_SLEEP_MODE) || defined(__DOXYGEN__) | ||
| 245 | #define CAN_USE_SLEEP_MODE TRUE | ||
| 246 | #endif | ||
| 247 | |||
| 248 | /** | ||
| 249 | * @brief Enforces the driver to use direct callbacks rather than OSAL events. | ||
| 250 | */ | ||
| 251 | #if !defined(CAN_ENFORCE_USE_CALLBACKS) || defined(__DOXYGEN__) | ||
| 252 | #define CAN_ENFORCE_USE_CALLBACKS FALSE | ||
| 253 | #endif | ||
| 254 | |||
| 255 | /*===========================================================================*/ | ||
| 256 | /* CRY driver related settings. */ | ||
| 257 | /*===========================================================================*/ | ||
| 258 | |||
| 259 | /** | ||
| 260 | * @brief Enables the SW fall-back of the cryptographic driver. | ||
| 261 | * @details When enabled, this option, activates a fall-back software | ||
| 262 | * implementation for algorithms not supported by the underlying | ||
| 263 | * hardware. | ||
| 264 | * @note Fall-back implementations may not be present for all algorithms. | ||
| 265 | */ | ||
| 266 | #if !defined(HAL_CRY_USE_FALLBACK) || defined(__DOXYGEN__) | ||
| 267 | #define HAL_CRY_USE_FALLBACK FALSE | ||
| 268 | #endif | ||
| 269 | |||
| 270 | /** | ||
| 271 | * @brief Makes the driver forcibly use the fall-back implementations. | ||
| 272 | */ | ||
| 273 | #if !defined(HAL_CRY_ENFORCE_FALLBACK) || defined(__DOXYGEN__) | ||
| 274 | #define HAL_CRY_ENFORCE_FALLBACK FALSE | ||
| 275 | #endif | ||
| 276 | |||
| 277 | /*===========================================================================*/ | ||
| 278 | /* DAC driver related settings. */ | ||
| 279 | /*===========================================================================*/ | ||
| 280 | |||
| 281 | /** | ||
| 282 | * @brief Enables synchronous APIs. | ||
| 283 | * @note Disabling this option saves both code and data space. | ||
| 284 | */ | ||
| 285 | #if !defined(DAC_USE_WAIT) || defined(__DOXYGEN__) | ||
| 286 | #define DAC_USE_WAIT TRUE | ||
| 287 | #endif | ||
| 288 | |||
| 289 | /** | ||
| 290 | * @brief Enables the @p dacAcquireBus() and @p dacReleaseBus() APIs. | ||
| 291 | * @note Disabling this option saves both code and data space. | ||
| 292 | */ | ||
| 293 | #if !defined(DAC_USE_MUTUAL_EXCLUSION) || defined(__DOXYGEN__) | ||
| 294 | #define DAC_USE_MUTUAL_EXCLUSION TRUE | ||
| 295 | #endif | ||
| 296 | |||
| 297 | /*===========================================================================*/ | ||
| 298 | /* I2C driver related settings. */ | ||
| 299 | /*===========================================================================*/ | ||
| 300 | |||
| 301 | /** | ||
| 302 | * @brief Enables the mutual exclusion APIs on the I2C bus. | ||
| 303 | */ | ||
| 304 | #if !defined(I2C_USE_MUTUAL_EXCLUSION) || defined(__DOXYGEN__) | ||
| 305 | #define I2C_USE_MUTUAL_EXCLUSION TRUE | ||
| 306 | #endif | ||
| 307 | |||
| 308 | /*===========================================================================*/ | ||
| 309 | /* MAC driver related settings. */ | ||
| 310 | /*===========================================================================*/ | ||
| 311 | |||
| 312 | /** | ||
| 313 | * @brief Enables the zero-copy API. | ||
| 314 | */ | ||
| 315 | #if !defined(MAC_USE_ZERO_COPY) || defined(__DOXYGEN__) | ||
| 316 | #define MAC_USE_ZERO_COPY FALSE | ||
| 317 | #endif | ||
| 318 | |||
| 319 | /** | ||
| 320 | * @brief Enables an event sources for incoming packets. | ||
| 321 | */ | ||
| 322 | #if !defined(MAC_USE_EVENTS) || defined(__DOXYGEN__) | ||
| 323 | #define MAC_USE_EVENTS TRUE | ||
| 324 | #endif | ||
| 325 | |||
| 326 | /*===========================================================================*/ | ||
| 327 | /* MMC_SPI driver related settings. */ | ||
| 328 | /*===========================================================================*/ | ||
| 329 | |||
| 330 | /** | ||
| 331 | * @brief Delays insertions. | ||
| 332 | * @details If enabled this options inserts delays into the MMC waiting | ||
| 333 | * routines releasing some extra CPU time for the threads with | ||
| 334 | * lower priority, this may slow down the driver a bit however. | ||
| 335 | * This option is recommended also if the SPI driver does not | ||
| 336 | * use a DMA channel and heavily loads the CPU. | ||
| 337 | */ | ||
| 338 | #if !defined(MMC_NICE_WAITING) || defined(__DOXYGEN__) | ||
| 339 | #define MMC_NICE_WAITING TRUE | ||
| 340 | #endif | ||
| 341 | |||
| 342 | /*===========================================================================*/ | ||
| 343 | /* SDC driver related settings. */ | ||
| 344 | /*===========================================================================*/ | ||
| 345 | |||
| 346 | /** | ||
| 347 | * @brief Number of initialization attempts before rejecting the card. | ||
| 348 | * @note Attempts are performed at 10mS intervals. | ||
| 349 | */ | ||
| 350 | #if !defined(SDC_INIT_RETRY) || defined(__DOXYGEN__) | ||
| 351 | #define SDC_INIT_RETRY 100 | ||
| 352 | #endif | ||
| 353 | |||
| 354 | /** | ||
| 355 | * @brief Include support for MMC cards. | ||
| 356 | * @note MMC support is not yet implemented so this option must be kept | ||
| 357 | * at @p FALSE. | ||
| 358 | */ | ||
| 359 | #if !defined(SDC_MMC_SUPPORT) || defined(__DOXYGEN__) | ||
| 360 | #define SDC_MMC_SUPPORT FALSE | ||
| 361 | #endif | ||
| 362 | |||
| 363 | /** | ||
| 364 | * @brief Delays insertions. | ||
| 365 | * @details If enabled this options inserts delays into the MMC waiting | ||
| 366 | * routines releasing some extra CPU time for the threads with | ||
| 367 | * lower priority, this may slow down the driver a bit however. | ||
| 368 | */ | ||
| 369 | #if !defined(SDC_NICE_WAITING) || defined(__DOXYGEN__) | ||
| 370 | #define SDC_NICE_WAITING TRUE | ||
| 371 | #endif | ||
| 372 | |||
| 373 | /** | ||
| 374 | * @brief OCR initialization constant for V20 cards. | ||
| 375 | */ | ||
| 376 | #if !defined(SDC_INIT_OCR_V20) || defined(__DOXYGEN__) | ||
| 377 | #define SDC_INIT_OCR_V20 0x50FF8000U | ||
| 378 | #endif | ||
| 379 | |||
| 380 | /** | ||
| 381 | * @brief OCR initialization constant for non-V20 cards. | ||
| 382 | */ | ||
| 383 | #if !defined(SDC_INIT_OCR) || defined(__DOXYGEN__) | ||
| 384 | #define SDC_INIT_OCR 0x80100000U | ||
| 385 | #endif | ||
| 386 | |||
| 387 | /*===========================================================================*/ | ||
| 388 | /* SERIAL driver related settings. */ | ||
| 389 | /*===========================================================================*/ | ||
| 390 | |||
| 391 | /** | ||
| 392 | * @brief Default bit rate. | ||
| 393 | * @details Configuration parameter, this is the baud rate selected for the | ||
| 394 | * default configuration. | ||
| 395 | */ | ||
| 396 | #if !defined(SERIAL_DEFAULT_BITRATE) || defined(__DOXYGEN__) | ||
| 397 | #define SERIAL_DEFAULT_BITRATE 38400 | ||
| 398 | #endif | ||
| 399 | |||
| 400 | /** | ||
| 401 | * @brief Serial buffers size. | ||
| 402 | * @details Configuration parameter, you can change the depth of the queue | ||
| 403 | * buffers depending on the requirements of your application. | ||
| 404 | * @note The default is 16 bytes for both the transmission and receive | ||
| 405 | * buffers. | ||
| 406 | */ | ||
| 407 | #if !defined(SERIAL_BUFFERS_SIZE) || defined(__DOXYGEN__) | ||
| 408 | #define SERIAL_BUFFERS_SIZE 16 | ||
| 409 | #endif | ||
| 410 | |||
| 411 | /*===========================================================================*/ | ||
| 412 | /* SERIAL_USB driver related setting. */ | ||
| 413 | /*===========================================================================*/ | ||
| 414 | |||
| 415 | /** | ||
| 416 | * @brief Serial over USB buffers size. | ||
| 417 | * @details Configuration parameter, the buffer size must be a multiple of | ||
| 418 | * the USB data endpoint maximum packet size. | ||
| 419 | * @note The default is 256 bytes for both the transmission and receive | ||
| 420 | * buffers. | ||
| 421 | */ | ||
| 422 | #if !defined(SERIAL_USB_BUFFERS_SIZE) || defined(__DOXYGEN__) | ||
| 423 | #define SERIAL_USB_BUFFERS_SIZE 256 | ||
| 424 | #endif | ||
| 425 | |||
| 426 | /** | ||
| 427 | * @brief Serial over USB number of buffers. | ||
| 428 | * @note The default is 2 buffers. | ||
| 429 | */ | ||
| 430 | #if !defined(SERIAL_USB_BUFFERS_NUMBER) || defined(__DOXYGEN__) | ||
| 431 | #define SERIAL_USB_BUFFERS_NUMBER 2 | ||
| 432 | #endif | ||
| 433 | |||
| 434 | /*===========================================================================*/ | ||
| 435 | /* SPI driver related settings. */ | ||
| 436 | /*===========================================================================*/ | ||
| 437 | |||
| 438 | /** | ||
| 439 | * @brief Enables synchronous APIs. | ||
| 440 | * @note Disabling this option saves both code and data space. | ||
| 441 | */ | ||
| 442 | #if !defined(SPI_USE_WAIT) || defined(__DOXYGEN__) | ||
| 443 | #define SPI_USE_WAIT TRUE | ||
| 444 | #endif | ||
| 445 | |||
| 446 | /** | ||
| 447 | * @brief Enables circular transfers APIs. | ||
| 448 | * @note Disabling this option saves both code and data space. | ||
| 449 | */ | ||
| 450 | #if !defined(SPI_USE_CIRCULAR) || defined(__DOXYGEN__) | ||
| 451 | #define SPI_USE_CIRCULAR FALSE | ||
| 452 | #endif | ||
| 453 | |||
| 454 | |||
| 455 | /** | ||
| 456 | * @brief Enables the @p spiAcquireBus() and @p spiReleaseBus() APIs. | ||
| 457 | * @note Disabling this option saves both code and data space. | ||
| 458 | */ | ||
| 459 | #if !defined(SPI_USE_MUTUAL_EXCLUSION) || defined(__DOXYGEN__) | ||
| 460 | #define SPI_USE_MUTUAL_EXCLUSION TRUE | ||
| 461 | #endif | ||
| 462 | |||
| 463 | /** | ||
| 464 | * @brief Handling method for SPI CS line. | ||
| 465 | * @note Disabling this option saves both code and data space. | ||
| 466 | */ | ||
| 467 | #if !defined(SPI_SELECT_MODE) || defined(__DOXYGEN__) | ||
| 468 | #define SPI_SELECT_MODE SPI_SELECT_MODE_PAD | ||
| 469 | #endif | ||
| 470 | |||
| 471 | /*===========================================================================*/ | ||
| 472 | /* UART driver related settings. */ | ||
| 473 | /*===========================================================================*/ | ||
| 474 | |||
| 475 | /** | ||
| 476 | * @brief Enables synchronous APIs. | ||
| 477 | * @note Disabling this option saves both code and data space. | ||
| 478 | */ | ||
| 479 | #if !defined(UART_USE_WAIT) || defined(__DOXYGEN__) | ||
| 480 | #define UART_USE_WAIT FALSE | ||
| 481 | #endif | ||
| 482 | |||
| 483 | /** | ||
| 484 | * @brief Enables the @p uartAcquireBus() and @p uartReleaseBus() APIs. | ||
| 485 | * @note Disabling this option saves both code and data space. | ||
| 486 | */ | ||
| 487 | #if !defined(UART_USE_MUTUAL_EXCLUSION) || defined(__DOXYGEN__) | ||
| 488 | #define UART_USE_MUTUAL_EXCLUSION FALSE | ||
| 489 | #endif | ||
| 490 | |||
| 491 | /*===========================================================================*/ | ||
| 492 | /* USB driver related settings. */ | ||
| 493 | /*===========================================================================*/ | ||
| 494 | |||
| 495 | /** | ||
| 496 | * @brief Enables synchronous APIs. | ||
| 497 | * @note Disabling this option saves both code and data space. | ||
| 498 | */ | ||
| 499 | #if !defined(USB_USE_WAIT) || defined(__DOXYGEN__) | ||
| 500 | #define USB_USE_WAIT TRUE | ||
| 501 | #endif | ||
| 502 | |||
| 503 | /*===========================================================================*/ | ||
| 504 | /* WSPI driver related settings. */ | ||
| 505 | /*===========================================================================*/ | ||
| 506 | |||
| 507 | /** | ||
| 508 | * @brief Enables synchronous APIs. | ||
| 509 | * @note Disabling this option saves both code and data space. | ||
| 510 | */ | ||
| 511 | #if !defined(WSPI_USE_WAIT) || defined(__DOXYGEN__) | ||
| 512 | #define WSPI_USE_WAIT TRUE | ||
| 513 | #endif | ||
| 514 | |||
| 515 | /** | ||
| 516 | * @brief Enables the @p wspiAcquireBus() and @p wspiReleaseBus() APIs. | ||
| 517 | * @note Disabling this option saves both code and data space. | ||
| 518 | */ | ||
| 519 | #if !defined(WSPI_USE_MUTUAL_EXCLUSION) || defined(__DOXYGEN__) | ||
| 520 | #define WSPI_USE_MUTUAL_EXCLUSION TRUE | ||
| 521 | #endif | ||
| 522 | |||
| 523 | #endif /* HALCONF_H */ | ||
| 524 | |||
| 525 | /** @} */ | ||
diff --git a/keyboards/handwired/onekey/blackpill_f411/mcuconf.h b/keyboards/handwired/onekey/blackpill_f411/mcuconf.h new file mode 100644 index 000000000..0394ff56b --- /dev/null +++ b/keyboards/handwired/onekey/blackpill_f411/mcuconf.h | |||
| @@ -0,0 +1,253 @@ | |||
| 1 | /* | ||
| 2 | ChibiOS - Copyright (C) 2006..2018 Giovanni Di Sirio | ||
| 3 | |||
| 4 | Licensed under the Apache License, Version 2.0 (the "License"); | ||
| 5 | you may not use this file except in compliance with the License. | ||
| 6 | You may obtain a copy of the License at | ||
| 7 | |||
| 8 | http://www.apache.org/licenses/LICENSE-2.0 | ||
| 9 | |||
| 10 | Unless required by applicable law or agreed to in writing, software | ||
| 11 | distributed under the License is distributed on an "AS IS" BASIS, | ||
| 12 | WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. | ||
| 13 | See the License for the specific language governing permissions and | ||
| 14 | limitations under the License. | ||
| 15 | */ | ||
| 16 | |||
| 17 | #ifndef MCUCONF_H | ||
| 18 | #define MCUCONF_H | ||
| 19 | |||
| 20 | /* | ||
| 21 | * STM32F4xx drivers configuration. | ||
| 22 | * The following settings override the default settings present in | ||
| 23 | * the various device driver implementation headers. | ||
| 24 | * Note that the settings for each driver only have effect if the whole | ||
| 25 | * driver is enabled in halconf.h. | ||
| 26 | * | ||
| 27 | * IRQ priorities: | ||
| 28 | * 15...0 Lowest...Highest. | ||
| 29 | * | ||
| 30 | * DMA priorities: | ||
| 31 | * 0...3 Lowest...Highest. | ||
| 32 | */ | ||
| 33 | |||
| 34 | #define STM32F4xx_MCUCONF | ||
| 35 | |||
| 36 | /* | ||
| 37 | * HAL driver system settings. | ||
| 38 | */ | ||
| 39 | #define STM32_NO_INIT FALSE | ||
| 40 | #define STM32_HSI_ENABLED TRUE | ||
| 41 | #define STM32_LSI_ENABLED TRUE | ||
| 42 | #define STM32_HSE_ENABLED TRUE | ||
| 43 | #define STM32_LSE_ENABLED FALSE | ||
| 44 | #define STM32_CLOCK48_REQUIRED TRUE | ||
| 45 | #define STM32_SW STM32_SW_PLL | ||
| 46 | #define STM32_PLLSRC STM32_PLLSRC_HSE | ||
| 47 | #define STM32_PLLM_VALUE 25 | ||
| 48 | #define STM32_PLLN_VALUE 384 | ||
| 49 | #define STM32_PLLP_VALUE 4 | ||
| 50 | #define STM32_PLLQ_VALUE 8 | ||
| 51 | #define STM32_HPRE STM32_HPRE_DIV1 | ||
| 52 | #define STM32_PPRE1 STM32_PPRE1_DIV4 | ||
| 53 | #define STM32_PPRE2 STM32_PPRE2_DIV2 | ||
| 54 | #define STM32_RTCSEL STM32_RTCSEL_LSI | ||
| 55 | #define STM32_RTCPRE_VALUE 8 | ||
| 56 | #define STM32_MCO1SEL STM32_MCO1SEL_HSI | ||
| 57 | #define STM32_MCO1PRE STM32_MCO1PRE_DIV1 | ||
| 58 | #define STM32_MCO2SEL STM32_MCO2SEL_SYSCLK | ||
| 59 | #define STM32_MCO2PRE STM32_MCO2PRE_DIV5 | ||
| 60 | #define STM32_I2SSRC STM32_I2SSRC_CKIN | ||
| 61 | #define STM32_PLLI2SN_VALUE 192 | ||
| 62 | #define STM32_PLLI2SR_VALUE 5 | ||
| 63 | #define STM32_PVD_ENABLE FALSE | ||
| 64 | #define STM32_PLS STM32_PLS_LEV0 | ||
| 65 | #define STM32_BKPRAM_ENABLE FALSE | ||
| 66 | |||
| 67 | /* | ||
| 68 | * IRQ system settings. | ||
| 69 | */ | ||
| 70 | #define STM32_IRQ_EXTI0_PRIORITY 6 | ||
| 71 | #define STM32_IRQ_EXTI1_PRIORITY 6 | ||
| 72 | #define STM32_IRQ_EXTI2_PRIORITY 6 | ||
| 73 | #define STM32_IRQ_EXTI3_PRIORITY 6 | ||
| 74 | #define STM32_IRQ_EXTI4_PRIORITY 6 | ||
| 75 | #define STM32_IRQ_EXTI5_9_PRIORITY 6 | ||
| 76 | #define STM32_IRQ_EXTI10_15_PRIORITY 6 | ||
| 77 | #define STM32_IRQ_EXTI16_PRIORITY 6 | ||
| 78 | #define STM32_IRQ_EXTI17_PRIORITY 15 | ||
| 79 | #define STM32_IRQ_EXTI18_PRIORITY 6 | ||
| 80 | #define STM32_IRQ_EXTI19_PRIORITY 6 | ||
| 81 | #define STM32_IRQ_EXTI20_PRIORITY 6 | ||
| 82 | #define STM32_IRQ_EXTI21_PRIORITY 15 | ||
| 83 | #define STM32_IRQ_EXTI22_PRIORITY 15 | ||
| 84 | |||
| 85 | /* | ||
| 86 | * ADC driver system settings. | ||
| 87 | */ | ||
| 88 | #define STM32_ADC_ADCPRE ADC_CCR_ADCPRE_DIV4 | ||
| 89 | #define STM32_ADC_USE_ADC1 FALSE | ||
| 90 | #define STM32_ADC_ADC1_DMA_STREAM STM32_DMA_STREAM_ID(2, 4) | ||
| 91 | #define STM32_ADC_ADC1_DMA_PRIORITY 2 | ||
| 92 | #define STM32_ADC_IRQ_PRIORITY 6 | ||
| 93 | #define STM32_ADC_ADC1_DMA_IRQ_PRIORITY 6 | ||
| 94 | |||
| 95 | /* | ||
| 96 | * GPT driver system settings. | ||
| 97 | */ | ||
| 98 | #define STM32_GPT_USE_TIM1 FALSE | ||
| 99 | #define STM32_GPT_USE_TIM2 FALSE | ||
| 100 | #define STM32_GPT_USE_TIM3 FALSE | ||
| 101 | #define STM32_GPT_USE_TIM4 FALSE | ||
| 102 | #define STM32_GPT_USE_TIM5 FALSE | ||
| 103 | #define STM32_GPT_USE_TIM9 FALSE | ||
| 104 | #define STM32_GPT_USE_TIM11 FALSE | ||
| 105 | #define STM32_GPT_TIM1_IRQ_PRIORITY 7 | ||
| 106 | #define STM32_GPT_TIM2_IRQ_PRIORITY 7 | ||
| 107 | #define STM32_GPT_TIM3_IRQ_PRIORITY 7 | ||
| 108 | #define STM32_GPT_TIM4_IRQ_PRIORITY 7 | ||
| 109 | #define STM32_GPT_TIM5_IRQ_PRIORITY 7 | ||
| 110 | #define STM32_GPT_TIM9_IRQ_PRIORITY 7 | ||
| 111 | #define STM32_GPT_TIM11_IRQ_PRIORITY 7 | ||
| 112 | |||
| 113 | /* | ||
| 114 | * I2C driver system settings. | ||
| 115 | */ | ||
| 116 | #define STM32_I2C_USE_I2C1 FALSE | ||
| 117 | #define STM32_I2C_USE_I2C2 FALSE | ||
| 118 | #define STM32_I2C_USE_I2C3 FALSE | ||
| 119 | #define STM32_I2C_BUSY_TIMEOUT 50 | ||
| 120 | #define STM32_I2C_I2C1_RX_DMA_STREAM STM32_DMA_STREAM_ID(1, 0) | ||
| 121 | #define STM32_I2C_I2C1_TX_DMA_STREAM STM32_DMA_STREAM_ID(1, 6) | ||
| 122 | #define STM32_I2C_I2C2_RX_DMA_STREAM STM32_DMA_STREAM_ID(1, 2) | ||
| 123 | #define STM32_I2C_I2C2_TX_DMA_STREAM STM32_DMA_STREAM_ID(1, 7) | ||
| 124 | #define STM32_I2C_I2C3_RX_DMA_STREAM STM32_DMA_STREAM_ID(1, 2) | ||
| 125 | #define STM32_I2C_I2C3_TX_DMA_STREAM STM32_DMA_STREAM_ID(1, 4) | ||
| 126 | #define STM32_I2C_I2C1_IRQ_PRIORITY 5 | ||
| 127 | #define STM32_I2C_I2C2_IRQ_PRIORITY 5 | ||
| 128 | #define STM32_I2C_I2C3_IRQ_PRIORITY 5 | ||
| 129 | #define STM32_I2C_I2C1_DMA_PRIORITY 3 | ||
| 130 | #define STM32_I2C_I2C2_DMA_PRIORITY 3 | ||
| 131 | #define STM32_I2C_I2C3_DMA_PRIORITY 3 | ||
| 132 | #define STM32_I2C_DMA_ERROR_HOOK(i2cp) osalSysHalt("DMA failure") | ||
| 133 | |||
| 134 | /* | ||
| 135 | * I2S driver system settings. | ||
| 136 | */ | ||
| 137 | #define STM32_I2S_USE_SPI2 FALSE | ||
| 138 | #define STM32_I2S_USE_SPI3 FALSE | ||
| 139 | #define STM32_I2S_SPI2_IRQ_PRIORITY 10 | ||
| 140 | #define STM32_I2S_SPI3_IRQ_PRIORITY 10 | ||
| 141 | #define STM32_I2S_SPI2_DMA_PRIORITY 1 | ||
| 142 | #define STM32_I2S_SPI3_DMA_PRIORITY 1 | ||
| 143 | #define STM32_I2S_SPI2_RX_DMA_STREAM STM32_DMA_STREAM_ID(1, 3) | ||
| 144 | #define STM32_I2S_SPI2_TX_DMA_STREAM STM32_DMA_STREAM_ID(1, 4) | ||
| 145 | #define STM32_I2S_SPI3_RX_DMA_STREAM STM32_DMA_STREAM_ID(1, 0) | ||
| 146 | #define STM32_I2S_SPI3_TX_DMA_STREAM STM32_DMA_STREAM_ID(1, 7) | ||
| 147 | #define STM32_I2S_DMA_ERROR_HOOK(i2sp) osalSysHalt("DMA failure") | ||
| 148 | |||
| 149 | /* | ||
| 150 | * ICU driver system settings. | ||
| 151 | */ | ||
| 152 | #define STM32_ICU_USE_TIM1 FALSE | ||
| 153 | #define STM32_ICU_USE_TIM2 FALSE | ||
| 154 | #define STM32_ICU_USE_TIM3 FALSE | ||
| 155 | #define STM32_ICU_USE_TIM4 FALSE | ||
| 156 | #define STM32_ICU_USE_TIM5 FALSE | ||
| 157 | #define STM32_ICU_USE_TIM9 FALSE | ||
| 158 | #define STM32_ICU_TIM1_IRQ_PRIORITY 7 | ||
| 159 | #define STM32_ICU_TIM2_IRQ_PRIORITY 7 | ||
| 160 | #define STM32_ICU_TIM3_IRQ_PRIORITY 7 | ||
| 161 | #define STM32_ICU_TIM4_IRQ_PRIORITY 7 | ||
| 162 | #define STM32_ICU_TIM5_IRQ_PRIORITY 7 | ||
| 163 | #define STM32_ICU_TIM9_IRQ_PRIORITY 7 | ||
| 164 | |||
| 165 | /* | ||
| 166 | * PWM driver system settings. | ||
| 167 | */ | ||
| 168 | #define STM32_PWM_USE_ADVANCED FALSE | ||
| 169 | #define STM32_PWM_USE_TIM1 FALSE | ||
| 170 | #define STM32_PWM_USE_TIM2 FALSE | ||
| 171 | #define STM32_PWM_USE_TIM3 FALSE | ||
| 172 | #define STM32_PWM_USE_TIM4 FALSE | ||
| 173 | #define STM32_PWM_USE_TIM5 FALSE | ||
| 174 | #define STM32_PWM_USE_TIM9 FALSE | ||
| 175 | #define STM32_PWM_TIM1_IRQ_PRIORITY 7 | ||
| 176 | #define STM32_PWM_TIM2_IRQ_PRIORITY 7 | ||
| 177 | #define STM32_PWM_TIM3_IRQ_PRIORITY 7 | ||
| 178 | #define STM32_PWM_TIM4_IRQ_PRIORITY 7 | ||
| 179 | #define STM32_PWM_TIM5_IRQ_PRIORITY 7 | ||
| 180 | #define STM32_PWM_TIM9_IRQ_PRIORITY 7 | ||
| 181 | |||
| 182 | /* | ||
| 183 | * SERIAL driver system settings. | ||
| 184 | */ | ||
| 185 | #define STM32_SERIAL_USE_USART1 FALSE | ||
| 186 | #define STM32_SERIAL_USE_USART2 FALSE | ||
| 187 | #define STM32_SERIAL_USE_USART6 FALSE | ||
| 188 | #define STM32_SERIAL_USART1_PRIORITY 12 | ||
| 189 | #define STM32_SERIAL_USART2_PRIORITY 12 | ||
| 190 | #define STM32_SERIAL_USART6_PRIORITY 12 | ||
| 191 | |||
| 192 | /* | ||
| 193 | * SPI driver system settings. | ||
| 194 | */ | ||
| 195 | #define STM32_SPI_USE_SPI1 FALSE | ||
| 196 | #define STM32_SPI_USE_SPI2 FALSE | ||
| 197 | #define STM32_SPI_USE_SPI3 FALSE | ||
| 198 | #define STM32_SPI_SPI1_RX_DMA_STREAM STM32_DMA_STREAM_ID(2, 0) | ||
| 199 | #define STM32_SPI_SPI1_TX_DMA_STREAM STM32_DMA_STREAM_ID(2, 3) | ||
| 200 | #define STM32_SPI_SPI2_RX_DMA_STREAM STM32_DMA_STREAM_ID(1, 3) | ||
| 201 | #define STM32_SPI_SPI2_TX_DMA_STREAM STM32_DMA_STREAM_ID(1, 4) | ||
| 202 | #define STM32_SPI_SPI3_RX_DMA_STREAM STM32_DMA_STREAM_ID(1, 0) | ||
| 203 | #define STM32_SPI_SPI3_TX_DMA_STREAM STM32_DMA_STREAM_ID(1, 7) | ||
| 204 | #define STM32_SPI_SPI1_DMA_PRIORITY 1 | ||
| 205 | #define STM32_SPI_SPI2_DMA_PRIORITY 1 | ||
| 206 | #define STM32_SPI_SPI3_DMA_PRIORITY 1 | ||
| 207 | #define STM32_SPI_SPI1_IRQ_PRIORITY 10 | ||
| 208 | #define STM32_SPI_SPI2_IRQ_PRIORITY 10 | ||
| 209 | #define STM32_SPI_SPI3_IRQ_PRIORITY 10 | ||
| 210 | #define STM32_SPI_DMA_ERROR_HOOK(spip) osalSysHalt("DMA failure") | ||
| 211 | |||
| 212 | /* | ||
| 213 | * ST driver system settings. | ||
| 214 | */ | ||
| 215 | #define STM32_ST_IRQ_PRIORITY 8 | ||
| 216 | #define STM32_ST_USE_TIMER 2 | ||
| 217 | |||
| 218 | /* | ||
| 219 | * UART driver system settings. | ||
| 220 | */ | ||
| 221 | #define STM32_UART_USE_USART1 FALSE | ||
| 222 | #define STM32_UART_USE_USART2 FALSE | ||
| 223 | #define STM32_UART_USE_USART6 FALSE | ||
| 224 | #define STM32_UART_USART1_RX_DMA_STREAM STM32_DMA_STREAM_ID(2, 5) | ||
| 225 | #define STM32_UART_USART1_TX_DMA_STREAM STM32_DMA_STREAM_ID(2, 7) | ||
| 226 | #define STM32_UART_USART2_RX_DMA_STREAM STM32_DMA_STREAM_ID(1, 5) | ||
| 227 | #define STM32_UART_USART2_TX_DMA_STREAM STM32_DMA_STREAM_ID(1, 6) | ||
| 228 | #define STM32_UART_USART6_RX_DMA_STREAM STM32_DMA_STREAM_ID(2, 2) | ||
| 229 | #define STM32_UART_USART6_TX_DMA_STREAM STM32_DMA_STREAM_ID(2, 7) | ||
| 230 | #define STM32_UART_USART1_IRQ_PRIORITY 12 | ||
| 231 | #define STM32_UART_USART2_IRQ_PRIORITY 12 | ||
| 232 | #define STM32_UART_USART6_IRQ_PRIORITY 12 | ||
| 233 | #define STM32_UART_USART1_DMA_PRIORITY 0 | ||
| 234 | #define STM32_UART_USART2_DMA_PRIORITY 0 | ||
| 235 | #define STM32_UART_USART6_DMA_PRIORITY 0 | ||
| 236 | #define STM32_UART_DMA_ERROR_HOOK(uartp) osalSysHalt("DMA failure") | ||
| 237 | |||
| 238 | /* | ||
| 239 | * USB driver system settings. | ||
| 240 | */ | ||
| 241 | #define STM32_USB_USE_OTG1 TRUE | ||
| 242 | #define STM32_USB_OTG1_IRQ_PRIORITY 14 | ||
| 243 | #define STM32_USB_OTG1_RX_FIFO_SIZE 512 | ||
| 244 | #define STM32_USB_OTG_THREAD_PRIO NORMALPRIO+1 | ||
| 245 | #define STM32_USB_OTG_THREAD_STACK_SIZE 128 | ||
| 246 | #define STM32_USB_OTGFIFO_FILL_BASEPRI 0 | ||
| 247 | |||
| 248 | /* | ||
| 249 | * WDG driver system settings. | ||
| 250 | */ | ||
| 251 | #define STM32_WDG_USE_IWDG FALSE | ||
| 252 | |||
| 253 | #endif /* MCUCONF_H */ | ||
diff --git a/keyboards/handwired/onekey/blackpill_f411/readme.md b/keyboards/handwired/onekey/blackpill_f411/readme.md new file mode 100644 index 000000000..a1e1e3723 --- /dev/null +++ b/keyboards/handwired/onekey/blackpill_f411/readme.md | |||
| @@ -0,0 +1,5 @@ | |||
| 1 | # f411 blackpill onekey | ||
| 2 | |||
| 3 | Supported Hardware: *STM32F411CEU6 WeAct v1.3*. | ||
| 4 | |||
| 5 | To trigger keypress, short together pins *B0* and *A7*. | ||
diff --git a/keyboards/handwired/onekey/blackpill_f411/rules.mk b/keyboards/handwired/onekey/blackpill_f411/rules.mk new file mode 100644 index 000000000..18fb92dbe --- /dev/null +++ b/keyboards/handwired/onekey/blackpill_f411/rules.mk | |||
| @@ -0,0 +1,32 @@ | |||
| 1 | ## chip/board settings | ||
| 2 | # the next two should match the directories in | ||
| 3 | # <chibios>/os/hal/ports/$(MCU_FAMILY)/$(MCU_SERIES) | ||
| 4 | MCU_FAMILY = STM32 | ||
| 5 | MCU_SERIES = STM32F4xx | ||
| 6 | # linker script to use | ||
| 7 | # it should exist either in <chibios>/os/common/ports/ARMCMx/compilers/GCC/ld/ | ||
| 8 | # or <this_dir>/ld/ | ||
| 9 | MCU_LDSCRIPT = STM32F411xE | ||
| 10 | # startup code to use | ||
| 11 | # is should exist in <chibios>/os/common/ports/ARMCMx/compilers/GCC/mk/ | ||
| 12 | MCU_STARTUP = stm32f4xx | ||
| 13 | # it should exist either in <chibios>/os/hal/boards/ | ||
| 14 | # or <this_dir>/boards | ||
| 15 | BOARD = BLACKPILL_STM32_F411 | ||
| 16 | # Cortex version | ||
| 17 | # Teensy LC is cortex-m0; Teensy 3.x are cortex-m4 | ||
| 18 | MCU = cortex-m4 | ||
| 19 | # ARM version, CORTEX-M0/M1 are 6, CORTEX-M3/M4/M7 are 7 | ||
| 20 | ARMV = 7 | ||
| 21 | USE_FPU = yes | ||
| 22 | # Address of the booloader in system memory | ||
| 23 | STM32_BOOTLOADER_ADDRESS ?= 0x1FFF0000 | ||
| 24 | |||
| 25 | # Options to pass to dfu-util when flashing | ||
| 26 | DFU_ARGS = -d 0483:df11 -a 0 -s 0x08000000:leave | ||
| 27 | DFU_SUFFIX_ARGS = -v 0483 -p df11 | ||
| 28 | |||
| 29 | # Build Options | ||
| 30 | # change yes to no to disable | ||
| 31 | # | ||
| 32 | KEYBOARD_SHARED_EP = yes | ||