diff options
| -rw-r--r-- | docs/_summary.md | 1 | ||||
| -rw-r--r-- | docs/serial_driver.md | 59 | ||||
| -rw-r--r-- | drivers/chibios/serial.h | 62 | ||||
| -rw-r--r-- | drivers/chibios/serial_usart.c | 234 |
4 files changed, 356 insertions, 0 deletions
diff --git a/docs/_summary.md b/docs/_summary.md index b711ab7d9..0e82ab4f0 100644 --- a/docs/_summary.md +++ b/docs/_summary.md | |||
| @@ -128,6 +128,7 @@ | |||
| 128 | * [SPI Driver](spi_driver.md) | 128 | * [SPI Driver](spi_driver.md) |
| 129 | * [WS2812 Driver](ws2812_driver.md) | 129 | * [WS2812 Driver](ws2812_driver.md) |
| 130 | * [EEPROM Driver](eeprom_driver.md) | 130 | * [EEPROM Driver](eeprom_driver.md) |
| 131 | * ['serial' Driver](serial_driver.md) | ||
| 131 | * [GPIO Controls](internals_gpio_control.md) | 132 | * [GPIO Controls](internals_gpio_control.md) |
| 132 | * [Keyboard Guidelines](hardware_keyboard_guidelines.md) | 133 | * [Keyboard Guidelines](hardware_keyboard_guidelines.md) |
| 133 | 134 | ||
diff --git a/docs/serial_driver.md b/docs/serial_driver.md new file mode 100644 index 000000000..395b3ec3f --- /dev/null +++ b/docs/serial_driver.md | |||
| @@ -0,0 +1,59 @@ | |||
| 1 | # 'serial' Driver | ||
| 2 | This driver powers the [Split Keyboard](feature_split_keyboard.md) feature. | ||
| 3 | |||
| 4 | !> Serial in this context should be read as **sending information one bit at a time**, rather than implementing UART/USART/RS485/RS232 standards. | ||
| 5 | |||
| 6 | All drivers in this category have the following characteristics: | ||
| 7 | * Provides data and signaling over a single conductor | ||
| 8 | * Limited to single master, single slave | ||
| 9 | |||
| 10 | ## Supported Driver Types | ||
| 11 | |||
| 12 | | | AVR | ARM | | ||
| 13 | |-------------------|--------------------|--------------------| | ||
| 14 | | bit bang | :heavy_check_mark: | Soon™ | | ||
| 15 | | USART Half-duplex | | :heavy_check_mark: | | ||
| 16 | |||
| 17 | ## Driver configuration | ||
| 18 | |||
| 19 | ### Bitbang | ||
| 20 | Default driver, the absence of configuration assumes this driver. To configure it, add this to your rules.mk: | ||
| 21 | |||
| 22 | ```make | ||
| 23 | SERIAL_DRIVER = bitbang | ||
| 24 | ``` | ||
| 25 | |||
| 26 | Configure the driver via your config.h: | ||
| 27 | ```c | ||
| 28 | #define SOFT_SERIAL_PIN D0 // or D1, D2, D3, E6 | ||
| 29 | #define SELECT_SOFT_SERIAL_SPEED 1 // or 0, 2, 3, 4, 5 | ||
| 30 | // 0: about 189kbps (Experimental only) | ||
| 31 | // 1: about 137kbps (default) | ||
| 32 | // 2: about 75kbps | ||
| 33 | // 3: about 39kbps | ||
| 34 | // 4: about 26kbps | ||
| 35 | // 5: about 20kbps | ||
| 36 | ``` | ||
| 37 | |||
| 38 | ### USART Half-duplex | ||
| 39 | Targeting STM32 boards where communication is offloaded to a USART hardware device. The advantage is that this provides fast and accurate timings. `SOFT_SERIAL_PIN` for this driver is the configured USART TX pin. **The TX pin must have appropriate pull-up resistors**. To configure it, add this to your rules.mk: | ||
| 40 | |||
| 41 | ```make | ||
| 42 | SERIAL_DRIVER = usart | ||
| 43 | ``` | ||
| 44 | |||
| 45 | Configure the hardware via your config.h: | ||
| 46 | ```c | ||
| 47 | #define SOFT_SERIAL_PIN B6 // USART TX pin | ||
| 48 | #define SELECT_SOFT_SERIAL_SPEED 1 // or 0, 2, 3, 4, 5 | ||
| 49 | // 0: about 460800 baud | ||
| 50 | // 1: about 230400 baud (default) | ||
| 51 | // 2: about 115200 baud | ||
| 52 | // 3: about 57600 baud | ||
| 53 | // 4: about 38400 baud | ||
| 54 | // 5: about 19200 baud | ||
| 55 | #define SERIAL_USART_DRIVER SD1 // USART driver of TX pin. default: SD1 | ||
| 56 | #define SERIAL_USART_TX_PAL_MODE 7 // Pin "alternate function", see the respective datasheet for the appropriate values for your MCU. default: 7 | ||
| 57 | ``` | ||
| 58 | |||
| 59 | You must also turn on the SERIAL feature in your halconf.h and mcuconf.h | ||
diff --git a/drivers/chibios/serial.h b/drivers/chibios/serial.h new file mode 100644 index 000000000..0c1857d52 --- /dev/null +++ b/drivers/chibios/serial.h | |||
| @@ -0,0 +1,62 @@ | |||
| 1 | #pragma once | ||
| 2 | |||
| 3 | #include <stdbool.h> | ||
| 4 | |||
| 5 | // ///////////////////////////////////////////////////////////////// | ||
| 6 | // Need Soft Serial defines in config.h | ||
| 7 | // ///////////////////////////////////////////////////////////////// | ||
| 8 | // ex. | ||
| 9 | // #define SOFT_SERIAL_PIN ?? // ?? = D0,D1,D2,D3,E6 | ||
| 10 | // OPTIONAL: #define SELECT_SOFT_SERIAL_SPEED ? // ? = 1,2,3,4,5 | ||
| 11 | // // 1: about 137kbps (default) | ||
| 12 | // // 2: about 75kbps | ||
| 13 | // // 3: about 39kbps | ||
| 14 | // // 4: about 26kbps | ||
| 15 | // // 5: about 20kbps | ||
| 16 | // | ||
| 17 | // //// USE simple API (using signle-type transaction function) | ||
| 18 | // /* nothing */ | ||
| 19 | // //// USE flexible API (using multi-type transaction function) | ||
| 20 | // #define SERIAL_USE_MULTI_TRANSACTION | ||
| 21 | // | ||
| 22 | // ///////////////////////////////////////////////////////////////// | ||
| 23 | |||
| 24 | // Soft Serial Transaction Descriptor | ||
| 25 | typedef struct _SSTD_t { | ||
| 26 | uint8_t *status; | ||
| 27 | uint8_t initiator2target_buffer_size; | ||
| 28 | uint8_t *initiator2target_buffer; | ||
| 29 | uint8_t target2initiator_buffer_size; | ||
| 30 | uint8_t *target2initiator_buffer; | ||
| 31 | } SSTD_t; | ||
| 32 | #define TID_LIMIT(table) (sizeof(table) / sizeof(SSTD_t)) | ||
| 33 | |||
| 34 | // initiator is transaction start side | ||
| 35 | void soft_serial_initiator_init(SSTD_t *sstd_table, int sstd_table_size); | ||
| 36 | // target is interrupt accept side | ||
| 37 | void soft_serial_target_init(SSTD_t *sstd_table, int sstd_table_size); | ||
| 38 | |||
| 39 | // initiator result | ||
| 40 | #define TRANSACTION_END 0 | ||
| 41 | #define TRANSACTION_NO_RESPONSE 0x1 | ||
| 42 | #define TRANSACTION_DATA_ERROR 0x2 | ||
| 43 | #define TRANSACTION_TYPE_ERROR 0x4 | ||
| 44 | #ifndef SERIAL_USE_MULTI_TRANSACTION | ||
| 45 | int soft_serial_transaction(void); | ||
| 46 | #else | ||
| 47 | int soft_serial_transaction(int sstd_index); | ||
| 48 | #endif | ||
| 49 | |||
| 50 | // target status | ||
| 51 | // *SSTD_t.status has | ||
| 52 | // initiator: | ||
| 53 | // TRANSACTION_END | ||
| 54 | // or TRANSACTION_NO_RESPONSE | ||
| 55 | // or TRANSACTION_DATA_ERROR | ||
| 56 | // target: | ||
| 57 | // TRANSACTION_DATA_ERROR | ||
| 58 | // or TRANSACTION_ACCEPTED | ||
| 59 | #define TRANSACTION_ACCEPTED 0x8 | ||
| 60 | #ifdef SERIAL_USE_MULTI_TRANSACTION | ||
| 61 | int soft_serial_get_and_clean_status(int sstd_index); | ||
| 62 | #endif | ||
diff --git a/drivers/chibios/serial_usart.c b/drivers/chibios/serial_usart.c new file mode 100644 index 000000000..62b4913cb --- /dev/null +++ b/drivers/chibios/serial_usart.c | |||
| @@ -0,0 +1,234 @@ | |||
| 1 | #include "quantum.h" | ||
| 2 | #include "serial.h" | ||
| 3 | #include "printf.h" | ||
| 4 | |||
| 5 | #include "ch.h" | ||
| 6 | #include "hal.h" | ||
| 7 | |||
| 8 | #ifndef USART_CR1_M0 | ||
| 9 | # define USART_CR1_M0 USART_CR1_M // some platforms (f1xx) dont have this so | ||
| 10 | #endif | ||
| 11 | |||
| 12 | #ifndef USE_GPIOV1 | ||
| 13 | // The default PAL alternate modes are used to signal that the pins are used for USART | ||
| 14 | # ifndef SERIAL_USART_TX_PAL_MODE | ||
| 15 | # define SERIAL_USART_TX_PAL_MODE 7 | ||
| 16 | # endif | ||
| 17 | #endif | ||
| 18 | |||
| 19 | #ifndef SERIAL_USART_DRIVER | ||
| 20 | # define SERIAL_USART_DRIVER SD1 | ||
| 21 | #endif | ||
| 22 | |||
| 23 | #ifndef SERIAL_USART_CR1 | ||
| 24 | # define SERIAL_USART_CR1 (USART_CR1_PCE | USART_CR1_PS | USART_CR1_M0) // parity enable, odd parity, 9 bit length | ||
| 25 | #endif | ||
| 26 | |||
| 27 | #ifndef SERIAL_USART_CR2 | ||
| 28 | # define SERIAL_USART_CR2 (USART_CR2_STOP_1) // 2 stop bits | ||
| 29 | #endif | ||
| 30 | |||
| 31 | #ifndef SERIAL_USART_CR3 | ||
| 32 | # define SERIAL_USART_CR3 0 | ||
| 33 | #endif | ||
| 34 | |||
| 35 | #ifdef SOFT_SERIAL_PIN | ||
| 36 | # define SERIAL_USART_TX_PIN SOFT_SERIAL_PIN | ||
| 37 | #endif | ||
| 38 | |||
| 39 | #ifndef SELECT_SOFT_SERIAL_SPEED | ||
| 40 | # define SELECT_SOFT_SERIAL_SPEED 1 | ||
| 41 | #endif | ||
| 42 | |||
| 43 | #ifdef SERIAL_USART_SPEED | ||
| 44 | // Allow advanced users to directly set SERIAL_USART_SPEED | ||
| 45 | #elif SELECT_SOFT_SERIAL_SPEED == 0 | ||
| 46 | # define SERIAL_USART_SPEED 460800 | ||
| 47 | #elif SELECT_SOFT_SERIAL_SPEED == 1 | ||
| 48 | # define SERIAL_USART_SPEED 230400 | ||
| 49 | #elif SELECT_SOFT_SERIAL_SPEED == 2 | ||
| 50 | # define SERIAL_USART_SPEED 115200 | ||
| 51 | #elif SELECT_SOFT_SERIAL_SPEED == 3 | ||
| 52 | # define SERIAL_USART_SPEED 57600 | ||
| 53 | #elif SELECT_SOFT_SERIAL_SPEED == 4 | ||
| 54 | # define SERIAL_USART_SPEED 38400 | ||
| 55 | #elif SELECT_SOFT_SERIAL_SPEED == 5 | ||
| 56 | # define SERIAL_USART_SPEED 19200 | ||
| 57 | #else | ||
| 58 | # error invalid SELECT_SOFT_SERIAL_SPEED value | ||
| 59 | #endif | ||
| 60 | |||
| 61 | #define TIMEOUT 100 | ||
| 62 | #define HANDSHAKE_MAGIC 7 | ||
| 63 | |||
| 64 | static inline msg_t sdWriteHalfDuplex(SerialDriver* driver, uint8_t* data, uint8_t size) { | ||
| 65 | msg_t ret = sdWrite(driver, data, size); | ||
| 66 | |||
| 67 | // Half duplex requires us to read back the data we just wrote - just throw it away | ||
| 68 | uint8_t dump[size]; | ||
| 69 | sdRead(driver, dump, size); | ||
| 70 | |||
| 71 | return ret; | ||
| 72 | } | ||
| 73 | #undef sdWrite | ||
| 74 | #define sdWrite sdWriteHalfDuplex | ||
| 75 | |||
| 76 | static inline msg_t sdWriteTimeoutHalfDuplex(SerialDriver* driver, uint8_t* data, uint8_t size, uint32_t timeout) { | ||
| 77 | msg_t ret = sdWriteTimeout(driver, data, size, timeout); | ||
| 78 | |||
| 79 | // Half duplex requires us to read back the data we just wrote - just throw it away | ||
| 80 | uint8_t dump[size]; | ||
| 81 | sdReadTimeout(driver, dump, size, timeout); | ||
| 82 | |||
| 83 | return ret; | ||
| 84 | } | ||
| 85 | #undef sdWriteTimeout | ||
| 86 | #define sdWriteTimeout sdWriteTimeoutHalfDuplex | ||
| 87 | |||
| 88 | static inline void sdClear(SerialDriver* driver) { | ||
| 89 | while (sdGetTimeout(driver, TIME_IMMEDIATE) != MSG_TIMEOUT) { | ||
| 90 | // Do nothing with the data | ||
| 91 | } | ||
| 92 | } | ||
| 93 | |||
| 94 | static SerialConfig sdcfg = { | ||
| 95 | (SERIAL_USART_SPEED), // speed - mandatory | ||
| 96 | (SERIAL_USART_CR1), // CR1 | ||
| 97 | (SERIAL_USART_CR2), // CR2 | ||
| 98 | (SERIAL_USART_CR3) // CR3 | ||
| 99 | }; | ||
| 100 | |||
| 101 | void handle_soft_serial_slave(void); | ||
| 102 | |||
| 103 | /* | ||
| 104 | * This thread runs on the slave and responds to transactions initiated | ||
| 105 | * by the master | ||
| 106 | */ | ||
| 107 | static THD_WORKING_AREA(waSlaveThread, 2048); | ||
| 108 | static THD_FUNCTION(SlaveThread, arg) { | ||
| 109 | (void)arg; | ||
| 110 | chRegSetThreadName("slave_transport"); | ||
| 111 | |||
| 112 | while (true) { | ||
| 113 | handle_soft_serial_slave(); | ||
| 114 | } | ||
| 115 | } | ||
| 116 | |||
| 117 | __attribute__((weak)) void usart_init(void) { | ||
| 118 | #if defined(USE_GPIOV1) | ||
| 119 | palSetLineMode(SERIAL_USART_TX_PIN, PAL_MODE_STM32_ALTERNATE_OPENDRAIN); | ||
| 120 | #else | ||
| 121 | palSetLineMode(SERIAL_USART_TX_PIN, PAL_MODE_ALTERNATE(SERIAL_USART_TX_PAL_MODE) | PAL_STM32_OTYPE_OPENDRAIN); | ||
| 122 | #endif | ||
| 123 | } | ||
| 124 | |||
| 125 | void usart_master_init(void) { | ||
| 126 | usart_init(); | ||
| 127 | |||
| 128 | sdcfg.cr3 |= USART_CR3_HDSEL; | ||
| 129 | sdStart(&SERIAL_USART_DRIVER, &sdcfg); | ||
| 130 | } | ||
| 131 | |||
| 132 | void usart_slave_init(void) { | ||
| 133 | usart_init(); | ||
| 134 | |||
| 135 | sdcfg.cr3 |= USART_CR3_HDSEL; | ||
| 136 | sdStart(&SERIAL_USART_DRIVER, &sdcfg); | ||
| 137 | |||
| 138 | // Start transport thread | ||
| 139 | chThdCreateStatic(waSlaveThread, sizeof(waSlaveThread), HIGHPRIO, SlaveThread, NULL); | ||
| 140 | } | ||
| 141 | |||
| 142 | static SSTD_t* Transaction_table = NULL; | ||
| 143 | static uint8_t Transaction_table_size = 0; | ||
| 144 | |||
| 145 | void soft_serial_initiator_init(SSTD_t* sstd_table, int sstd_table_size) { | ||
| 146 | Transaction_table = sstd_table; | ||
| 147 | Transaction_table_size = (uint8_t)sstd_table_size; | ||
| 148 | |||
| 149 | usart_master_init(); | ||
| 150 | } | ||
| 151 | |||
| 152 | void soft_serial_target_init(SSTD_t* sstd_table, int sstd_table_size) { | ||
| 153 | Transaction_table = sstd_table; | ||
| 154 | Transaction_table_size = (uint8_t)sstd_table_size; | ||
| 155 | |||
| 156 | usart_slave_init(); | ||
| 157 | } | ||
| 158 | |||
| 159 | void handle_soft_serial_slave(void) { | ||
| 160 | uint8_t sstd_index = sdGet(&SERIAL_USART_DRIVER); // first chunk is always transaction id | ||
| 161 | SSTD_t* trans = &Transaction_table[sstd_index]; | ||
| 162 | |||
| 163 | // Always write back the sstd_index as part of a basic handshake | ||
| 164 | sstd_index ^= HANDSHAKE_MAGIC; | ||
| 165 | sdWrite(&SERIAL_USART_DRIVER, &sstd_index, sizeof(sstd_index)); | ||
| 166 | |||
| 167 | if (trans->initiator2target_buffer_size) { | ||
| 168 | sdRead(&SERIAL_USART_DRIVER, trans->initiator2target_buffer, trans->initiator2target_buffer_size); | ||
| 169 | } | ||
| 170 | |||
| 171 | if (trans->target2initiator_buffer_size) { | ||
| 172 | sdWrite(&SERIAL_USART_DRIVER, trans->target2initiator_buffer, trans->target2initiator_buffer_size); | ||
| 173 | } | ||
| 174 | |||
| 175 | if (trans->status) { | ||
| 176 | *trans->status = TRANSACTION_ACCEPTED; | ||
| 177 | } | ||
| 178 | } | ||
| 179 | |||
| 180 | ///////// | ||
| 181 | // start transaction by initiator | ||
| 182 | // | ||
| 183 | // int soft_serial_transaction(int sstd_index) | ||
| 184 | // | ||
| 185 | // Returns: | ||
| 186 | // TRANSACTION_END | ||
| 187 | // TRANSACTION_NO_RESPONSE | ||
| 188 | // TRANSACTION_DATA_ERROR | ||
| 189 | #ifndef SERIAL_USE_MULTI_TRANSACTION | ||
| 190 | int soft_serial_transaction(void) { | ||
| 191 | uint8_t sstd_index = 0; | ||
| 192 | #else | ||
| 193 | int soft_serial_transaction(int index) { | ||
| 194 | uint8_t sstd_index = index; | ||
| 195 | #endif | ||
| 196 | |||
| 197 | if (sstd_index > Transaction_table_size) return TRANSACTION_TYPE_ERROR; | ||
| 198 | SSTD_t* trans = &Transaction_table[sstd_index]; | ||
| 199 | msg_t res = 0; | ||
| 200 | |||
| 201 | sdClear(&SERIAL_USART_DRIVER); | ||
| 202 | |||
| 203 | // First chunk is always transaction id | ||
| 204 | sdWriteTimeout(&SERIAL_USART_DRIVER, &sstd_index, sizeof(sstd_index), TIME_MS2I(TIMEOUT)); | ||
| 205 | |||
| 206 | uint8_t sstd_index_shake = 0xFF; | ||
| 207 | |||
| 208 | // Which we always read back first so that we can error out correctly | ||
| 209 | // - due to the half duplex limitations on return codes, we always have to read *something* | ||
| 210 | // - without the read, write only transactions *always* succeed, even during the boot process where the slave is not ready | ||
| 211 | res = sdReadTimeout(&SERIAL_USART_DRIVER, &sstd_index_shake, sizeof(sstd_index_shake), TIME_MS2I(TIMEOUT)); | ||
| 212 | if (res < 0 || (sstd_index_shake != (sstd_index ^ HANDSHAKE_MAGIC))) { | ||
| 213 | dprintf("serial::usart_shake NO_RESPONSE\n"); | ||
| 214 | return TRANSACTION_NO_RESPONSE; | ||
| 215 | } | ||
| 216 | |||
| 217 | if (trans->initiator2target_buffer_size) { | ||
| 218 | res = sdWriteTimeout(&SERIAL_USART_DRIVER, trans->initiator2target_buffer, trans->initiator2target_buffer_size, TIME_MS2I(TIMEOUT)); | ||
| 219 | if (res < 0) { | ||
| 220 | dprintf("serial::usart_transmit NO_RESPONSE\n"); | ||
| 221 | return TRANSACTION_NO_RESPONSE; | ||
| 222 | } | ||
| 223 | } | ||
| 224 | |||
| 225 | if (trans->target2initiator_buffer_size) { | ||
| 226 | res = sdReadTimeout(&SERIAL_USART_DRIVER, trans->target2initiator_buffer, trans->target2initiator_buffer_size, TIME_MS2I(TIMEOUT)); | ||
| 227 | if (res < 0) { | ||
| 228 | dprintf("serial::usart_receive NO_RESPONSE\n"); | ||
| 229 | return TRANSACTION_NO_RESPONSE; | ||
| 230 | } | ||
| 231 | } | ||
| 232 | |||
| 233 | return TRANSACTION_END; | ||
| 234 | } | ||
