diff options
Diffstat (limited to 'adb.c')
| -rw-r--r-- | adb.c | 180 |
1 files changed, 180 insertions, 0 deletions
| @@ -0,0 +1,180 @@ | |||
| 1 | #include <stdbool.h> | ||
| 2 | #include <util/delay.h> | ||
| 3 | #include <avr/io.h> | ||
| 4 | #include "adb.h" | ||
| 5 | |||
| 6 | |||
| 7 | static inline void data_lo(void); | ||
| 8 | static inline void data_hi(void); | ||
| 9 | static inline bool data_in(void); | ||
| 10 | #ifdef ADB_PSW_BIT | ||
| 11 | static inline void psw_lo(void); | ||
| 12 | static inline void psw_hi(void); | ||
| 13 | static inline bool psw_in(void); | ||
| 14 | #endif | ||
| 15 | |||
| 16 | static inline void attention(void); | ||
| 17 | static inline void place_bit0(void); | ||
| 18 | static inline void place_bit1(void); | ||
| 19 | static inline void send_byte(uint8_t data); | ||
| 20 | static inline bool read_bit(void); | ||
| 21 | static inline uint8_t read_byte(void); | ||
| 22 | static inline uint8_t wait_data_lo(uint8_t us); | ||
| 23 | static inline uint8_t wait_data_hi(uint8_t us); | ||
| 24 | |||
| 25 | |||
| 26 | void adb_host_init(void) | ||
| 27 | { | ||
| 28 | data_hi(); | ||
| 29 | #ifdef ADB_PSW_BIT | ||
| 30 | psw_hi(); | ||
| 31 | #endif | ||
| 32 | } | ||
| 33 | |||
| 34 | #ifdef ADB_PSW_BIT | ||
| 35 | bool adb_host_psw(void) | ||
| 36 | { | ||
| 37 | return psw_in(); | ||
| 38 | } | ||
| 39 | #endif | ||
| 40 | |||
| 41 | uint16_t adb_host_kbd_recv(void) | ||
| 42 | { | ||
| 43 | uint16_t data = 0; | ||
| 44 | attention(); | ||
| 45 | send_byte(0x2C); // Addr:2, Cmd:talk(11), Reg:0(00) | ||
| 46 | place_bit0(); // Stopbit | ||
| 47 | if (!wait_data_lo(0xFF)) // Stop to Start(140-260us) | ||
| 48 | return 0; // No data to send | ||
| 49 | if (!read_bit()) // Startbit(1) | ||
| 50 | return -2; | ||
| 51 | data = read_byte(); | ||
| 52 | data = (data<<8) | read_byte(); | ||
| 53 | if (read_bit()) // Stopbit(0) | ||
| 54 | return -3; | ||
| 55 | return data; | ||
| 56 | } | ||
| 57 | |||
| 58 | |||
| 59 | static inline void data_lo() | ||
| 60 | { | ||
| 61 | ADB_DDR |= (1<<ADB_DATA_BIT); | ||
| 62 | ADB_PORT &= ~(1<<ADB_DATA_BIT); | ||
| 63 | } | ||
| 64 | static inline void data_hi() | ||
| 65 | { | ||
| 66 | ADB_PORT |= (1<<ADB_DATA_BIT); | ||
| 67 | ADB_DDR &= ~(1<<ADB_DATA_BIT); | ||
| 68 | } | ||
| 69 | static inline bool data_in() | ||
| 70 | { | ||
| 71 | ADB_PORT |= (1<<ADB_DATA_BIT); | ||
| 72 | ADB_DDR &= ~(1<<ADB_DATA_BIT); | ||
| 73 | return ADB_PIN&(1<<ADB_DATA_BIT); | ||
| 74 | } | ||
| 75 | |||
| 76 | #ifdef ADB_PSW_BIT | ||
| 77 | static inline void psw_lo() | ||
| 78 | { | ||
| 79 | ADB_DDR |= (1<<ADB_PSW_BIT); | ||
| 80 | ADB_PORT &= ~(1<<ADB_PSW_BIT); | ||
| 81 | } | ||
| 82 | static inline void psw_hi() | ||
| 83 | { | ||
| 84 | ADB_PORT |= (1<<ADB_PSW_BIT); | ||
| 85 | ADB_DDR &= ~(1<<ADB_PSW_BIT); | ||
| 86 | } | ||
| 87 | static inline bool psw_in() | ||
| 88 | { | ||
| 89 | ADB_PORT |= (1<<ADB_PSW_BIT); | ||
| 90 | ADB_DDR &= ~(1<<ADB_PSW_BIT); | ||
| 91 | return ADB_PIN&(1<<ADB_PSW_BIT); | ||
| 92 | } | ||
| 93 | #endif | ||
| 94 | |||
| 95 | static inline void attention(void) | ||
| 96 | { | ||
| 97 | data_lo(); | ||
| 98 | _delay_us(700); | ||
| 99 | place_bit1(); | ||
| 100 | } | ||
| 101 | |||
| 102 | static inline void place_bit0(void) | ||
| 103 | { | ||
| 104 | data_lo(); | ||
| 105 | _delay_us(65); | ||
| 106 | data_hi(); | ||
| 107 | _delay_us(35); | ||
| 108 | } | ||
| 109 | |||
| 110 | static inline void place_bit1(void) | ||
| 111 | { | ||
| 112 | data_lo(); | ||
| 113 | _delay_us(35); | ||
| 114 | data_hi(); | ||
| 115 | _delay_us(65); | ||
| 116 | } | ||
| 117 | |||
| 118 | static inline void send_byte(uint8_t data) | ||
| 119 | { | ||
| 120 | for (int i = 0; i < 8; i++) { | ||
| 121 | if (data&(0x80>>i)) | ||
| 122 | place_bit1(); | ||
| 123 | else | ||
| 124 | place_bit0(); | ||
| 125 | } | ||
| 126 | } | ||
| 127 | |||
| 128 | static inline bool read_bit(void) | ||
| 129 | { | ||
| 130 | // ADB Bit Cells | ||
| 131 | // | ||
| 132 | // bit0: ______~~~ | ||
| 133 | // 65 :35us | ||
| 134 | // | ||
| 135 | // bit1: ___~~~~~~ | ||
| 136 | // 35 :65us | ||
| 137 | // | ||
| 138 | // bit0 low time: 60-70% of bit cell(42-91us) | ||
| 139 | // bit1 low time: 30-40% of bit cell(21-52us) | ||
| 140 | // bit cell time: 70-130us | ||
| 141 | // [from Apple IIgs Hardware Reference Second Edition] | ||
| 142 | // | ||
| 143 | // After 55us if data line is low/high then bit is 0/1. | ||
| 144 | // Too simple to rely on? | ||
| 145 | bool bit; | ||
| 146 | wait_data_lo(75); // wait the beginning of bit cell | ||
| 147 | _delay_us(55); | ||
| 148 | bit = data_in(); | ||
| 149 | wait_data_hi(36); // wait high part of bit cell | ||
| 150 | return bit; | ||
| 151 | } | ||
| 152 | |||
| 153 | static inline uint8_t read_byte(void) | ||
| 154 | { | ||
| 155 | uint8_t data = 0; | ||
| 156 | for (int i = 0; i < 8; i++) { | ||
| 157 | data <<= 1; | ||
| 158 | if (read_bit()) | ||
| 159 | data = data | 1; | ||
| 160 | } | ||
| 161 | return data; | ||
| 162 | } | ||
| 163 | |||
| 164 | static inline uint8_t wait_data_lo(uint8_t us) | ||
| 165 | { | ||
| 166 | while (data_in() && us) { | ||
| 167 | _delay_us(1); | ||
| 168 | us--; | ||
| 169 | } | ||
| 170 | return us; | ||
| 171 | } | ||
| 172 | |||
| 173 | static inline uint8_t wait_data_hi(uint8_t us) | ||
| 174 | { | ||
| 175 | while (!data_in() && us) { | ||
| 176 | _delay_us(1); | ||
| 177 | us--; | ||
| 178 | } | ||
| 179 | return us; | ||
| 180 | } | ||
