diff options
Diffstat (limited to 'drivers/boards/GENERIC_STM32_F072XB/board.c')
| -rw-r--r-- | drivers/boards/GENERIC_STM32_F072XB/board.c | 207 |
1 files changed, 180 insertions, 27 deletions
diff --git a/drivers/boards/GENERIC_STM32_F072XB/board.c b/drivers/boards/GENERIC_STM32_F072XB/board.c index dcbb94310..c91136e8f 100644 --- a/drivers/boards/GENERIC_STM32_F072XB/board.c +++ b/drivers/boards/GENERIC_STM32_F072XB/board.c | |||
| @@ -1,5 +1,5 @@ | |||
| 1 | /* | 1 | /* |
| 2 | ChibiOS - Copyright (C) 2006..2016 Giovanni Di Sirio | 2 | ChibiOS - Copyright (C) 2006..2018 Giovanni Di Sirio |
| 3 | 3 | ||
| 4 | Licensed under the Apache License, Version 2.0 (the "License"); | 4 | Licensed under the Apache License, Version 2.0 (the "License"); |
| 5 | you may not use this file except in compliance with the License. | 5 | you may not use this file except in compliance with the License. |
| @@ -20,56 +20,209 @@ | |||
| 20 | */ | 20 | */ |
| 21 | 21 | ||
| 22 | #include "hal.h" | 22 | #include "hal.h" |
| 23 | #include "stm32_gpio.h" | ||
| 24 | |||
| 25 | /*===========================================================================*/ | ||
| 26 | /* Driver local definitions. */ | ||
| 27 | /*===========================================================================*/ | ||
| 28 | |||
| 29 | /*===========================================================================*/ | ||
| 30 | /* Driver exported variables. */ | ||
| 31 | /*===========================================================================*/ | ||
| 32 | |||
| 33 | /*===========================================================================*/ | ||
| 34 | /* Driver local variables and types. */ | ||
| 35 | /*===========================================================================*/ | ||
| 36 | |||
| 37 | /** | ||
| 38 | * @brief Type of STM32 GPIO port setup. | ||
| 39 | */ | ||
| 40 | typedef struct { | ||
| 41 | uint32_t moder; | ||
| 42 | uint32_t otyper; | ||
| 43 | uint32_t ospeedr; | ||
| 44 | uint32_t pupdr; | ||
| 45 | uint32_t odr; | ||
| 46 | uint32_t afrl; | ||
| 47 | uint32_t afrh; | ||
| 48 | } gpio_setup_t; | ||
| 23 | 49 | ||
| 24 | #if HAL_USE_PAL || defined(__DOXYGEN__) | ||
| 25 | /** | 50 | /** |
| 26 | * @brief PAL setup. | 51 | * @brief Type of STM32 GPIO initialization data. |
| 27 | * @details Digital I/O ports static configuration as defined in @p board.h. | ||
| 28 | * This variable is used by the HAL when initializing the PAL driver. | ||
| 29 | */ | 52 | */ |
| 30 | const PALConfig pal_default_config = { | 53 | typedef struct { |
| 31 | # if STM32_HAS_GPIOA | 54 | #if STM32_HAS_GPIOA || defined(__DOXYGEN__) |
| 55 | gpio_setup_t PAData; | ||
| 56 | #endif | ||
| 57 | #if STM32_HAS_GPIOB || defined(__DOXYGEN__) | ||
| 58 | gpio_setup_t PBData; | ||
| 59 | #endif | ||
| 60 | #if STM32_HAS_GPIOC || defined(__DOXYGEN__) | ||
| 61 | gpio_setup_t PCData; | ||
| 62 | #endif | ||
| 63 | #if STM32_HAS_GPIOD || defined(__DOXYGEN__) | ||
| 64 | gpio_setup_t PDData; | ||
| 65 | #endif | ||
| 66 | #if STM32_HAS_GPIOE || defined(__DOXYGEN__) | ||
| 67 | gpio_setup_t PEData; | ||
| 68 | #endif | ||
| 69 | #if STM32_HAS_GPIOF || defined(__DOXYGEN__) | ||
| 70 | gpio_setup_t PFData; | ||
| 71 | #endif | ||
| 72 | #if STM32_HAS_GPIOG || defined(__DOXYGEN__) | ||
| 73 | gpio_setup_t PGData; | ||
| 74 | #endif | ||
| 75 | #if STM32_HAS_GPIOH || defined(__DOXYGEN__) | ||
| 76 | gpio_setup_t PHData; | ||
| 77 | #endif | ||
| 78 | #if STM32_HAS_GPIOI || defined(__DOXYGEN__) | ||
| 79 | gpio_setup_t PIData; | ||
| 80 | #endif | ||
| 81 | #if STM32_HAS_GPIOJ || defined(__DOXYGEN__) | ||
| 82 | gpio_setup_t PJData; | ||
| 83 | #endif | ||
| 84 | #if STM32_HAS_GPIOK || defined(__DOXYGEN__) | ||
| 85 | gpio_setup_t PKData; | ||
| 86 | #endif | ||
| 87 | } gpio_config_t; | ||
| 88 | |||
| 89 | /** | ||
| 90 | * @brief STM32 GPIO static initialization data. | ||
| 91 | */ | ||
| 92 | static const gpio_config_t gpio_default_config = { | ||
| 93 | #if STM32_HAS_GPIOA | ||
| 32 | {VAL_GPIOA_MODER, VAL_GPIOA_OTYPER, VAL_GPIOA_OSPEEDR, VAL_GPIOA_PUPDR, VAL_GPIOA_ODR, VAL_GPIOA_AFRL, VAL_GPIOA_AFRH}, | 94 | {VAL_GPIOA_MODER, VAL_GPIOA_OTYPER, VAL_GPIOA_OSPEEDR, VAL_GPIOA_PUPDR, VAL_GPIOA_ODR, VAL_GPIOA_AFRL, VAL_GPIOA_AFRH}, |
| 33 | # endif | 95 | #endif |
| 34 | # if STM32_HAS_GPIOB | 96 | #if STM32_HAS_GPIOB |
| 35 | {VAL_GPIOB_MODER, VAL_GPIOB_OTYPER, VAL_GPIOB_OSPEEDR, VAL_GPIOB_PUPDR, VAL_GPIOB_ODR, VAL_GPIOB_AFRL, VAL_GPIOB_AFRH}, | 97 | {VAL_GPIOB_MODER, VAL_GPIOB_OTYPER, VAL_GPIOB_OSPEEDR, VAL_GPIOB_PUPDR, VAL_GPIOB_ODR, VAL_GPIOB_AFRL, VAL_GPIOB_AFRH}, |
| 36 | # endif | 98 | #endif |
| 37 | # if STM32_HAS_GPIOC | 99 | #if STM32_HAS_GPIOC |
| 38 | {VAL_GPIOC_MODER, VAL_GPIOC_OTYPER, VAL_GPIOC_OSPEEDR, VAL_GPIOC_PUPDR, VAL_GPIOC_ODR, VAL_GPIOC_AFRL, VAL_GPIOC_AFRH}, | 100 | {VAL_GPIOC_MODER, VAL_GPIOC_OTYPER, VAL_GPIOC_OSPEEDR, VAL_GPIOC_PUPDR, VAL_GPIOC_ODR, VAL_GPIOC_AFRL, VAL_GPIOC_AFRH}, |
| 39 | # endif | 101 | #endif |
| 40 | # if STM32_HAS_GPIOD | 102 | #if STM32_HAS_GPIOD |
| 41 | {VAL_GPIOD_MODER, VAL_GPIOD_OTYPER, VAL_GPIOD_OSPEEDR, VAL_GPIOD_PUPDR, VAL_GPIOD_ODR, VAL_GPIOD_AFRL, VAL_GPIOD_AFRH}, | 103 | {VAL_GPIOD_MODER, VAL_GPIOD_OTYPER, VAL_GPIOD_OSPEEDR, VAL_GPIOD_PUPDR, VAL_GPIOD_ODR, VAL_GPIOD_AFRL, VAL_GPIOD_AFRH}, |
| 42 | # endif | 104 | #endif |
| 43 | # if STM32_HAS_GPIOE | 105 | #if STM32_HAS_GPIOE |
| 44 | {VAL_GPIOE_MODER, VAL_GPIOE_OTYPER, VAL_GPIOE_OSPEEDR, VAL_GPIOE_PUPDR, VAL_GPIOE_ODR, VAL_GPIOE_AFRL, VAL_GPIOE_AFRH}, | 106 | {VAL_GPIOE_MODER, VAL_GPIOE_OTYPER, VAL_GPIOE_OSPEEDR, VAL_GPIOE_PUPDR, VAL_GPIOE_ODR, VAL_GPIOE_AFRL, VAL_GPIOE_AFRH}, |
| 45 | # endif | 107 | #endif |
| 46 | # if STM32_HAS_GPIOF | 108 | #if STM32_HAS_GPIOF |
| 47 | {VAL_GPIOF_MODER, VAL_GPIOF_OTYPER, VAL_GPIOF_OSPEEDR, VAL_GPIOF_PUPDR, VAL_GPIOF_ODR, VAL_GPIOF_AFRL, VAL_GPIOF_AFRH}, | 109 | {VAL_GPIOF_MODER, VAL_GPIOF_OTYPER, VAL_GPIOF_OSPEEDR, VAL_GPIOF_PUPDR, VAL_GPIOF_ODR, VAL_GPIOF_AFRL, VAL_GPIOF_AFRH}, |
| 48 | # endif | 110 | #endif |
| 49 | # if STM32_HAS_GPIOG | 111 | #if STM32_HAS_GPIOG |
| 50 | {VAL_GPIOG_MODER, VAL_GPIOG_OTYPER, VAL_GPIOG_OSPEEDR, VAL_GPIOG_PUPDR, VAL_GPIOG_ODR, VAL_GPIOG_AFRL, VAL_GPIOG_AFRH}, | 112 | {VAL_GPIOG_MODER, VAL_GPIOG_OTYPER, VAL_GPIOG_OSPEEDR, VAL_GPIOG_PUPDR, VAL_GPIOG_ODR, VAL_GPIOG_AFRL, VAL_GPIOG_AFRH}, |
| 51 | # endif | 113 | #endif |
| 52 | # if STM32_HAS_GPIOH | 114 | #if STM32_HAS_GPIOH |
| 53 | {VAL_GPIOH_MODER, VAL_GPIOH_OTYPER, VAL_GPIOH_OSPEEDR, VAL_GPIOH_PUPDR, VAL_GPIOH_ODR, VAL_GPIOH_AFRL, VAL_GPIOH_AFRH}, | 115 | {VAL_GPIOH_MODER, VAL_GPIOH_OTYPER, VAL_GPIOH_OSPEEDR, VAL_GPIOH_PUPDR, VAL_GPIOH_ODR, VAL_GPIOH_AFRL, VAL_GPIOH_AFRH}, |
| 54 | # endif | 116 | #endif |
| 55 | # if STM32_HAS_GPIOI | 117 | #if STM32_HAS_GPIOI |
| 56 | {VAL_GPIOI_MODER, VAL_GPIOI_OTYPER, VAL_GPIOI_OSPEEDR, VAL_GPIOI_PUPDR, VAL_GPIOI_ODR, VAL_GPIOI_AFRL, VAL_GPIOI_AFRH} | 118 | {VAL_GPIOI_MODER, VAL_GPIOI_OTYPER, VAL_GPIOI_OSPEEDR, VAL_GPIOI_PUPDR, VAL_GPIOI_ODR, VAL_GPIOI_AFRL, VAL_GPIOI_AFRH}, |
| 57 | # endif | 119 | #endif |
| 120 | #if STM32_HAS_GPIOJ | ||
| 121 | {VAL_GPIOJ_MODER, VAL_GPIOJ_OTYPER, VAL_GPIOJ_OSPEEDR, VAL_GPIOJ_PUPDR, VAL_GPIOJ_ODR, VAL_GPIOJ_AFRL, VAL_GPIOJ_AFRH}, | ||
| 122 | #endif | ||
| 123 | #if STM32_HAS_GPIOK | ||
| 124 | {VAL_GPIOK_MODER, VAL_GPIOK_OTYPER, VAL_GPIOK_OSPEEDR, VAL_GPIOK_PUPDR, VAL_GPIOK_ODR, VAL_GPIOK_AFRL, VAL_GPIOK_AFRH} | ||
| 125 | #endif | ||
| 58 | }; | 126 | }; |
| 127 | |||
| 128 | /*===========================================================================*/ | ||
| 129 | /* Driver local functions. */ | ||
| 130 | /*===========================================================================*/ | ||
| 131 | |||
| 132 | static void gpio_init(stm32_gpio_t *gpiop, const gpio_setup_t *config) { | ||
| 133 | gpiop->OTYPER = config->otyper; | ||
| 134 | gpiop->OSPEEDR = config->ospeedr; | ||
| 135 | gpiop->PUPDR = config->pupdr; | ||
| 136 | gpiop->ODR = config->odr; | ||
| 137 | gpiop->AFRL = config->afrl; | ||
| 138 | gpiop->AFRH = config->afrh; | ||
| 139 | gpiop->MODER = config->moder; | ||
| 140 | } | ||
| 141 | |||
| 142 | static void stm32_gpio_init(void) { | ||
| 143 | /* Enabling GPIO-related clocks, the mask comes from the | ||
| 144 | registry header file.*/ | ||
| 145 | rccResetAHB(STM32_GPIO_EN_MASK); | ||
| 146 | rccEnableAHB(STM32_GPIO_EN_MASK, true); | ||
| 147 | |||
| 148 | /* Initializing all the defined GPIO ports.*/ | ||
| 149 | #if STM32_HAS_GPIOA | ||
| 150 | gpio_init(GPIOA, &gpio_default_config.PAData); | ||
| 151 | #endif | ||
| 152 | #if STM32_HAS_GPIOB | ||
| 153 | gpio_init(GPIOB, &gpio_default_config.PBData); | ||
| 154 | #endif | ||
| 155 | #if STM32_HAS_GPIOC | ||
| 156 | gpio_init(GPIOC, &gpio_default_config.PCData); | ||
| 157 | #endif | ||
| 158 | #if STM32_HAS_GPIOD | ||
| 159 | gpio_init(GPIOD, &gpio_default_config.PDData); | ||
| 59 | #endif | 160 | #endif |
| 161 | #if STM32_HAS_GPIOE | ||
| 162 | gpio_init(GPIOE, &gpio_default_config.PEData); | ||
| 163 | #endif | ||
| 164 | #if STM32_HAS_GPIOF | ||
| 165 | gpio_init(GPIOF, &gpio_default_config.PFData); | ||
| 166 | #endif | ||
| 167 | #if STM32_HAS_GPIOG | ||
| 168 | gpio_init(GPIOG, &gpio_default_config.PGData); | ||
| 169 | #endif | ||
| 170 | #if STM32_HAS_GPIOH | ||
| 171 | gpio_init(GPIOH, &gpio_default_config.PHData); | ||
| 172 | #endif | ||
| 173 | #if STM32_HAS_GPIOI | ||
| 174 | gpio_init(GPIOI, &gpio_default_config.PIData); | ||
| 175 | #endif | ||
| 176 | #if STM32_HAS_GPIOJ | ||
| 177 | gpio_init(GPIOJ, &gpio_default_config.PJData); | ||
| 178 | #endif | ||
| 179 | #if STM32_HAS_GPIOK | ||
| 180 | gpio_init(GPIOK, &gpio_default_config.PKData); | ||
| 181 | #endif | ||
| 182 | } | ||
| 183 | |||
| 184 | /*===========================================================================*/ | ||
| 185 | /* Driver interrupt handlers. */ | ||
| 186 | /*===========================================================================*/ | ||
| 187 | |||
| 188 | /*===========================================================================*/ | ||
| 189 | /* Driver exported functions. */ | ||
| 190 | /*===========================================================================*/ | ||
| 60 | 191 | ||
| 61 | __attribute__((weak)) void enter_bootloader_mode_if_requested(void) {} | 192 | __attribute__((weak)) void enter_bootloader_mode_if_requested(void) {} |
| 62 | 193 | ||
| 63 | /** | 194 | /** |
| 64 | * @brief Early initialization code. | 195 | * @brief Early initialization code. |
| 65 | * @details This initialization must be performed just after stack setup | 196 | * @details GPIO ports and system clocks are initialized before everything |
| 66 | * and before any other initialization. | 197 | * else. |
| 67 | */ | 198 | */ |
| 68 | void __early_init(void) { | 199 | void __early_init(void) { |
| 69 | enter_bootloader_mode_if_requested(); | 200 | enter_bootloader_mode_if_requested(); |
| 201 | |||
| 202 | stm32_gpio_init(); | ||
| 70 | stm32_clock_init(); | 203 | stm32_clock_init(); |
| 71 | } | 204 | } |
| 72 | 205 | ||
| 206 | #if HAL_USE_SDC || defined(__DOXYGEN__) | ||
| 207 | /** | ||
| 208 | * @brief SDC card detection. | ||
| 209 | */ | ||
| 210 | bool sdc_lld_is_card_inserted(SDCDriver *sdcp) { | ||
| 211 | (void)sdcp; | ||
| 212 | /* TODO: Fill the implementation.*/ | ||
| 213 | return true; | ||
| 214 | } | ||
| 215 | |||
| 216 | /** | ||
| 217 | * @brief SDC card write protection detection. | ||
| 218 | */ | ||
| 219 | bool sdc_lld_is_write_protected(SDCDriver *sdcp) { | ||
| 220 | (void)sdcp; | ||
| 221 | /* TODO: Fill the implementation.*/ | ||
| 222 | return false; | ||
| 223 | } | ||
| 224 | #endif /* HAL_USE_SDC */ | ||
| 225 | |||
| 73 | #if HAL_USE_MMC_SPI || defined(__DOXYGEN__) | 226 | #if HAL_USE_MMC_SPI || defined(__DOXYGEN__) |
| 74 | /** | 227 | /** |
| 75 | * @brief MMC_SPI card detection. | 228 | * @brief MMC_SPI card detection. |
