diff options
Diffstat (limited to 'drivers/chibios')
| -rw-r--r-- | drivers/chibios/serial.c | 52 | ||||
| -rw-r--r-- | drivers/chibios/serial.h | 62 | ||||
| -rw-r--r-- | drivers/chibios/serial_usart.c | 47 | ||||
| -rw-r--r-- | drivers/chibios/spi_master.c | 70 | ||||
| -rw-r--r-- | drivers/chibios/spi_master.h | 19 |
5 files changed, 116 insertions, 134 deletions
diff --git a/drivers/chibios/serial.c b/drivers/chibios/serial.c index 54f7e1321..f54fbcee4 100644 --- a/drivers/chibios/serial.c +++ b/drivers/chibios/serial.c | |||
| @@ -74,21 +74,12 @@ static THD_FUNCTION(Thread1, arg) { | |||
| 74 | } | 74 | } |
| 75 | } | 75 | } |
| 76 | 76 | ||
| 77 | static SSTD_t *Transaction_table = NULL; | 77 | void soft_serial_initiator_init(void) { |
| 78 | static uint8_t Transaction_table_size = 0; | ||
| 79 | |||
| 80 | void soft_serial_initiator_init(SSTD_t *sstd_table, int sstd_table_size) { | ||
| 81 | Transaction_table = sstd_table; | ||
| 82 | Transaction_table_size = (uint8_t)sstd_table_size; | ||
| 83 | |||
| 84 | serial_output(); | 78 | serial_output(); |
| 85 | serial_high(); | 79 | serial_high(); |
| 86 | } | 80 | } |
| 87 | 81 | ||
| 88 | void soft_serial_target_init(SSTD_t *sstd_table, int sstd_table_size) { | 82 | void soft_serial_target_init(void) { |
| 89 | Transaction_table = sstd_table; | ||
| 90 | Transaction_table_size = (uint8_t)sstd_table_size; | ||
| 91 | |||
| 92 | serial_input(); | 83 | serial_input(); |
| 93 | 84 | ||
| 94 | palEnablePadEvent(PAL_PORT(SOFT_SERIAL_PIN), PAL_PAD(SOFT_SERIAL_PIN), PAL_EVENT_MODE_FALLING_EDGE); | 85 | palEnablePadEvent(PAL_PORT(SOFT_SERIAL_PIN), PAL_PAD(SOFT_SERIAL_PIN), PAL_EVENT_MODE_FALLING_EDGE); |
| @@ -154,16 +145,14 @@ void interrupt_handler(void *arg) { | |||
| 154 | uint8_t checksum_computed = 0; | 145 | uint8_t checksum_computed = 0; |
| 155 | int sstd_index = 0; | 146 | int sstd_index = 0; |
| 156 | 147 | ||
| 157 | #ifdef SERIAL_USE_MULTI_TRANSACTION | ||
| 158 | sstd_index = serial_read_byte(); | 148 | sstd_index = serial_read_byte(); |
| 159 | sync_send(); | 149 | sync_send(); |
| 160 | #endif | ||
| 161 | 150 | ||
| 162 | SSTD_t *trans = &Transaction_table[sstd_index]; | 151 | split_transaction_desc_t *trans = &split_transaction_table[sstd_index]; |
| 163 | for (int i = 0; i < trans->initiator2target_buffer_size; ++i) { | 152 | for (int i = 0; i < trans->initiator2target_buffer_size; ++i) { |
| 164 | trans->initiator2target_buffer[i] = serial_read_byte(); | 153 | split_trans_initiator2target_buffer(trans)[i] = serial_read_byte(); |
| 165 | sync_send(); | 154 | sync_send(); |
| 166 | checksum_computed += trans->initiator2target_buffer[i]; | 155 | checksum_computed += split_trans_initiator2target_buffer(trans)[i]; |
| 167 | } | 156 | } |
| 168 | checksum_computed ^= 7; | 157 | checksum_computed ^= 7; |
| 169 | uint8_t checksum_received = serial_read_byte(); | 158 | uint8_t checksum_received = serial_read_byte(); |
| @@ -172,12 +161,17 @@ void interrupt_handler(void *arg) { | |||
| 172 | // wait for the sync to finish sending | 161 | // wait for the sync to finish sending |
| 173 | serial_delay(); | 162 | serial_delay(); |
| 174 | 163 | ||
| 164 | // Allow any slave processing to occur | ||
| 165 | if (trans->slave_callback) { | ||
| 166 | trans->slave_callback(trans->initiator2target_buffer_size, split_trans_initiator2target_buffer(trans), trans->target2initiator_buffer_size, split_trans_target2initiator_buffer(trans)); | ||
| 167 | } | ||
| 168 | |||
| 175 | uint8_t checksum = 0; | 169 | uint8_t checksum = 0; |
| 176 | for (int i = 0; i < trans->target2initiator_buffer_size; ++i) { | 170 | for (int i = 0; i < trans->target2initiator_buffer_size; ++i) { |
| 177 | serial_write_byte(trans->target2initiator_buffer[i]); | 171 | serial_write_byte(split_trans_target2initiator_buffer(trans)[i]); |
| 178 | sync_send(); | 172 | sync_send(); |
| 179 | serial_delay_half(); | 173 | serial_delay_half(); |
| 180 | checksum += trans->target2initiator_buffer[i]; | 174 | checksum += split_trans_target2initiator_buffer(trans)[i]; |
| 181 | } | 175 | } |
| 182 | serial_write_byte(checksum ^ 7); | 176 | serial_write_byte(checksum ^ 7); |
| 183 | sync_send(); | 177 | sync_send(); |
| @@ -206,15 +200,10 @@ void interrupt_handler(void *arg) { | |||
| 206 | // TRANSACTION_NO_RESPONSE | 200 | // TRANSACTION_NO_RESPONSE |
| 207 | // TRANSACTION_DATA_ERROR | 201 | // TRANSACTION_DATA_ERROR |
| 208 | // this code is very time dependent, so we need to disable interrupts | 202 | // this code is very time dependent, so we need to disable interrupts |
| 209 | #ifndef SERIAL_USE_MULTI_TRANSACTION | ||
| 210 | int soft_serial_transaction(void) { | ||
| 211 | int sstd_index = 0; | ||
| 212 | #else | ||
| 213 | int soft_serial_transaction(int sstd_index) { | 203 | int soft_serial_transaction(int sstd_index) { |
| 214 | #endif | 204 | if (sstd_index > NUM_TOTAL_TRANSACTIONS) return TRANSACTION_TYPE_ERROR; |
| 215 | 205 | split_transaction_desc_t *trans = &split_transaction_table[sstd_index]; | |
| 216 | if (sstd_index > Transaction_table_size) return TRANSACTION_TYPE_ERROR; | 206 | if (!trans->status) return TRANSACTION_TYPE_ERROR; // not registered |
| 217 | SSTD_t *trans = &Transaction_table[sstd_index]; | ||
| 218 | 207 | ||
| 219 | // TODO: remove extra delay between transactions | 208 | // TODO: remove extra delay between transactions |
| 220 | serial_delay(); | 209 | serial_delay(); |
| @@ -244,14 +233,13 @@ int soft_serial_transaction(int sstd_index) { | |||
| 244 | 233 | ||
| 245 | uint8_t checksum = 0; | 234 | uint8_t checksum = 0; |
| 246 | // send data to the slave | 235 | // send data to the slave |
| 247 | #ifdef SERIAL_USE_MULTI_TRANSACTION | ||
| 248 | serial_write_byte(sstd_index); // first chunk is transaction id | 236 | serial_write_byte(sstd_index); // first chunk is transaction id |
| 249 | sync_recv(); | 237 | sync_recv(); |
| 250 | #endif | 238 | |
| 251 | for (int i = 0; i < trans->initiator2target_buffer_size; ++i) { | 239 | for (int i = 0; i < trans->initiator2target_buffer_size; ++i) { |
| 252 | serial_write_byte(trans->initiator2target_buffer[i]); | 240 | serial_write_byte(split_trans_initiator2target_buffer(trans)[i]); |
| 253 | sync_recv(); | 241 | sync_recv(); |
| 254 | checksum += trans->initiator2target_buffer[i]; | 242 | checksum += split_trans_initiator2target_buffer(trans)[i]; |
| 255 | } | 243 | } |
| 256 | serial_write_byte(checksum ^ 7); | 244 | serial_write_byte(checksum ^ 7); |
| 257 | sync_recv(); | 245 | sync_recv(); |
| @@ -262,9 +250,9 @@ int soft_serial_transaction(int sstd_index) { | |||
| 262 | // receive data from the slave | 250 | // receive data from the slave |
| 263 | uint8_t checksum_computed = 0; | 251 | uint8_t checksum_computed = 0; |
| 264 | for (int i = 0; i < trans->target2initiator_buffer_size; ++i) { | 252 | for (int i = 0; i < trans->target2initiator_buffer_size; ++i) { |
| 265 | trans->target2initiator_buffer[i] = serial_read_byte(); | 253 | split_trans_target2initiator_buffer(trans)[i] = serial_read_byte(); |
| 266 | sync_recv(); | 254 | sync_recv(); |
| 267 | checksum_computed += trans->target2initiator_buffer[i]; | 255 | checksum_computed += split_trans_target2initiator_buffer(trans)[i]; |
| 268 | } | 256 | } |
| 269 | checksum_computed ^= 7; | 257 | checksum_computed ^= 7; |
| 270 | uint8_t checksum_received = serial_read_byte(); | 258 | uint8_t checksum_received = serial_read_byte(); |
diff --git a/drivers/chibios/serial.h b/drivers/chibios/serial.h deleted file mode 100644 index 0c1857d52..000000000 --- a/drivers/chibios/serial.h +++ /dev/null | |||
| @@ -1,62 +0,0 @@ | |||
| 1 | #pragma once | ||
| 2 | |||
| 3 | #include <stdbool.h> | ||
| 4 | |||
| 5 | // ///////////////////////////////////////////////////////////////// | ||
| 6 | // Need Soft Serial defines in config.h | ||
| 7 | // ///////////////////////////////////////////////////////////////// | ||
| 8 | // ex. | ||
| 9 | // #define SOFT_SERIAL_PIN ?? // ?? = D0,D1,D2,D3,E6 | ||
| 10 | // OPTIONAL: #define SELECT_SOFT_SERIAL_SPEED ? // ? = 1,2,3,4,5 | ||
| 11 | // // 1: about 137kbps (default) | ||
| 12 | // // 2: about 75kbps | ||
| 13 | // // 3: about 39kbps | ||
| 14 | // // 4: about 26kbps | ||
| 15 | // // 5: about 20kbps | ||
| 16 | // | ||
| 17 | // //// USE simple API (using signle-type transaction function) | ||
| 18 | // /* nothing */ | ||
| 19 | // //// USE flexible API (using multi-type transaction function) | ||
| 20 | // #define SERIAL_USE_MULTI_TRANSACTION | ||
| 21 | // | ||
| 22 | // ///////////////////////////////////////////////////////////////// | ||
| 23 | |||
| 24 | // Soft Serial Transaction Descriptor | ||
| 25 | typedef struct _SSTD_t { | ||
| 26 | uint8_t *status; | ||
| 27 | uint8_t initiator2target_buffer_size; | ||
| 28 | uint8_t *initiator2target_buffer; | ||
| 29 | uint8_t target2initiator_buffer_size; | ||
| 30 | uint8_t *target2initiator_buffer; | ||
| 31 | } SSTD_t; | ||
| 32 | #define TID_LIMIT(table) (sizeof(table) / sizeof(SSTD_t)) | ||
| 33 | |||
| 34 | // initiator is transaction start side | ||
| 35 | void soft_serial_initiator_init(SSTD_t *sstd_table, int sstd_table_size); | ||
| 36 | // target is interrupt accept side | ||
| 37 | void soft_serial_target_init(SSTD_t *sstd_table, int sstd_table_size); | ||
| 38 | |||
| 39 | // initiator result | ||
| 40 | #define TRANSACTION_END 0 | ||
| 41 | #define TRANSACTION_NO_RESPONSE 0x1 | ||
| 42 | #define TRANSACTION_DATA_ERROR 0x2 | ||
| 43 | #define TRANSACTION_TYPE_ERROR 0x4 | ||
| 44 | #ifndef SERIAL_USE_MULTI_TRANSACTION | ||
| 45 | int soft_serial_transaction(void); | ||
| 46 | #else | ||
| 47 | int soft_serial_transaction(int sstd_index); | ||
| 48 | #endif | ||
| 49 | |||
| 50 | // target status | ||
| 51 | // *SSTD_t.status has | ||
| 52 | // initiator: | ||
| 53 | // TRANSACTION_END | ||
| 54 | // or TRANSACTION_NO_RESPONSE | ||
| 55 | // or TRANSACTION_DATA_ERROR | ||
| 56 | // target: | ||
| 57 | // TRANSACTION_DATA_ERROR | ||
| 58 | // or TRANSACTION_ACCEPTED | ||
| 59 | #define TRANSACTION_ACCEPTED 0x8 | ||
| 60 | #ifdef SERIAL_USE_MULTI_TRANSACTION | ||
| 61 | int soft_serial_get_and_clean_status(int sstd_index); | ||
| 62 | #endif | ||
diff --git a/drivers/chibios/serial_usart.c b/drivers/chibios/serial_usart.c index cae29388c..9f180d2d7 100644 --- a/drivers/chibios/serial_usart.c +++ b/drivers/chibios/serial_usart.c | |||
| @@ -113,37 +113,29 @@ void usart_slave_init(void) { | |||
| 113 | chThdCreateStatic(waSlaveThread, sizeof(waSlaveThread), HIGHPRIO, SlaveThread, NULL); | 113 | chThdCreateStatic(waSlaveThread, sizeof(waSlaveThread), HIGHPRIO, SlaveThread, NULL); |
| 114 | } | 114 | } |
| 115 | 115 | ||
| 116 | static SSTD_t* Transaction_table = NULL; | 116 | void soft_serial_initiator_init(void) { usart_master_init(); } |
| 117 | static uint8_t Transaction_table_size = 0; | ||
| 118 | 117 | ||
| 119 | void soft_serial_initiator_init(SSTD_t* sstd_table, int sstd_table_size) { | 118 | void soft_serial_target_init(void) { usart_slave_init(); } |
| 120 | Transaction_table = sstd_table; | ||
| 121 | Transaction_table_size = (uint8_t)sstd_table_size; | ||
| 122 | |||
| 123 | usart_master_init(); | ||
| 124 | } | ||
| 125 | |||
| 126 | void soft_serial_target_init(SSTD_t* sstd_table, int sstd_table_size) { | ||
| 127 | Transaction_table = sstd_table; | ||
| 128 | Transaction_table_size = (uint8_t)sstd_table_size; | ||
| 129 | |||
| 130 | usart_slave_init(); | ||
| 131 | } | ||
| 132 | 119 | ||
| 133 | void handle_soft_serial_slave(void) { | 120 | void handle_soft_serial_slave(void) { |
| 134 | uint8_t sstd_index = sdGet(&SERIAL_USART_DRIVER); // first chunk is always transaction id | 121 | uint8_t sstd_index = sdGet(&SERIAL_USART_DRIVER); // first chunk is always transaction id |
| 135 | SSTD_t* trans = &Transaction_table[sstd_index]; | 122 | split_transaction_desc_t* trans = &split_transaction_table[sstd_index]; |
| 136 | 123 | ||
| 137 | // Always write back the sstd_index as part of a basic handshake | 124 | // Always write back the sstd_index as part of a basic handshake |
| 138 | sstd_index ^= HANDSHAKE_MAGIC; | 125 | sstd_index ^= HANDSHAKE_MAGIC; |
| 139 | sdWrite(&SERIAL_USART_DRIVER, &sstd_index, sizeof(sstd_index)); | 126 | sdWrite(&SERIAL_USART_DRIVER, &sstd_index, sizeof(sstd_index)); |
| 140 | 127 | ||
| 141 | if (trans->initiator2target_buffer_size) { | 128 | if (trans->initiator2target_buffer_size) { |
| 142 | sdRead(&SERIAL_USART_DRIVER, trans->initiator2target_buffer, trans->initiator2target_buffer_size); | 129 | sdRead(&SERIAL_USART_DRIVER, split_trans_initiator2target_buffer(trans), trans->initiator2target_buffer_size); |
| 130 | } | ||
| 131 | |||
| 132 | // Allow any slave processing to occur | ||
| 133 | if (trans->slave_callback) { | ||
| 134 | trans->slave_callback(trans->initiator2target_buffer_size, split_trans_initiator2target_buffer(trans), trans->target2initiator_buffer_size, split_trans_target2initiator_buffer(trans)); | ||
| 143 | } | 135 | } |
| 144 | 136 | ||
| 145 | if (trans->target2initiator_buffer_size) { | 137 | if (trans->target2initiator_buffer_size) { |
| 146 | sdWrite(&SERIAL_USART_DRIVER, trans->target2initiator_buffer, trans->target2initiator_buffer_size); | 138 | sdWrite(&SERIAL_USART_DRIVER, split_trans_target2initiator_buffer(trans), trans->target2initiator_buffer_size); |
| 147 | } | 139 | } |
| 148 | 140 | ||
| 149 | if (trans->status) { | 141 | if (trans->status) { |
| @@ -160,17 +152,14 @@ void handle_soft_serial_slave(void) { | |||
| 160 | // TRANSACTION_END | 152 | // TRANSACTION_END |
| 161 | // TRANSACTION_NO_RESPONSE | 153 | // TRANSACTION_NO_RESPONSE |
| 162 | // TRANSACTION_DATA_ERROR | 154 | // TRANSACTION_DATA_ERROR |
| 163 | #ifndef SERIAL_USE_MULTI_TRANSACTION | ||
| 164 | int soft_serial_transaction(void) { | ||
| 165 | uint8_t sstd_index = 0; | ||
| 166 | #else | ||
| 167 | int soft_serial_transaction(int index) { | 155 | int soft_serial_transaction(int index) { |
| 168 | uint8_t sstd_index = index; | 156 | uint8_t sstd_index = index; |
| 169 | #endif | ||
| 170 | 157 | ||
| 171 | if (sstd_index > Transaction_table_size) return TRANSACTION_TYPE_ERROR; | 158 | if (sstd_index > NUM_TOTAL_TRANSACTIONS) return TRANSACTION_TYPE_ERROR; |
| 172 | SSTD_t* trans = &Transaction_table[sstd_index]; | 159 | split_transaction_desc_t* trans = &split_transaction_table[sstd_index]; |
| 173 | msg_t res = 0; | 160 | msg_t res = 0; |
| 161 | |||
| 162 | if (!trans->status) return TRANSACTION_TYPE_ERROR; // not registered | ||
| 174 | 163 | ||
| 175 | sdClear(&SERIAL_USART_DRIVER); | 164 | sdClear(&SERIAL_USART_DRIVER); |
| 176 | 165 | ||
| @@ -189,7 +178,7 @@ int soft_serial_transaction(int index) { | |||
| 189 | } | 178 | } |
| 190 | 179 | ||
| 191 | if (trans->initiator2target_buffer_size) { | 180 | if (trans->initiator2target_buffer_size) { |
| 192 | res = sdWriteTimeout(&SERIAL_USART_DRIVER, trans->initiator2target_buffer, trans->initiator2target_buffer_size, TIME_MS2I(SERIAL_USART_TIMEOUT)); | 181 | res = sdWriteTimeout(&SERIAL_USART_DRIVER, split_trans_initiator2target_buffer(trans), trans->initiator2target_buffer_size, TIME_MS2I(SERIAL_USART_TIMEOUT)); |
| 193 | if (res < 0) { | 182 | if (res < 0) { |
| 194 | dprintf("serial::usart_transmit NO_RESPONSE\n"); | 183 | dprintf("serial::usart_transmit NO_RESPONSE\n"); |
| 195 | return TRANSACTION_NO_RESPONSE; | 184 | return TRANSACTION_NO_RESPONSE; |
| @@ -197,7 +186,7 @@ int soft_serial_transaction(int index) { | |||
| 197 | } | 186 | } |
| 198 | 187 | ||
| 199 | if (trans->target2initiator_buffer_size) { | 188 | if (trans->target2initiator_buffer_size) { |
| 200 | res = sdReadTimeout(&SERIAL_USART_DRIVER, trans->target2initiator_buffer, trans->target2initiator_buffer_size, TIME_MS2I(SERIAL_USART_TIMEOUT)); | 189 | res = sdReadTimeout(&SERIAL_USART_DRIVER, split_trans_target2initiator_buffer(trans), trans->target2initiator_buffer_size, TIME_MS2I(SERIAL_USART_TIMEOUT)); |
| 201 | if (res < 0) { | 190 | if (res < 0) { |
| 202 | dprintf("serial::usart_receive NO_RESPONSE\n"); | 191 | dprintf("serial::usart_receive NO_RESPONSE\n"); |
| 203 | return TRANSACTION_NO_RESPONSE; | 192 | return TRANSACTION_NO_RESPONSE; |
diff --git a/drivers/chibios/spi_master.c b/drivers/chibios/spi_master.c index 4852a6eba..28ddcbb2b 100644 --- a/drivers/chibios/spi_master.c +++ b/drivers/chibios/spi_master.c | |||
| @@ -18,8 +18,13 @@ | |||
| 18 | 18 | ||
| 19 | #include "timer.h" | 19 | #include "timer.h" |
| 20 | 20 | ||
| 21 | static pin_t currentSlavePin = NO_PIN; | 21 | static pin_t currentSlavePin = NO_PIN; |
| 22 | static SPIConfig spiConfig = {false, NULL, 0, 0, 0, 0}; | 22 | |
| 23 | #if defined(K20x) || defined(KL2x) | ||
| 24 | static SPIConfig spiConfig = {NULL, 0, 0, 0}; | ||
| 25 | #else | ||
| 26 | static SPIConfig spiConfig = {false, NULL, 0, 0, 0, 0}; | ||
| 27 | #endif | ||
| 23 | 28 | ||
| 24 | __attribute__((weak)) void spi_init(void) { | 29 | __attribute__((weak)) void spi_init(void) { |
| 25 | static bool is_initialised = false; | 30 | static bool is_initialised = false; |
| @@ -27,15 +32,15 @@ __attribute__((weak)) void spi_init(void) { | |||
| 27 | is_initialised = true; | 32 | is_initialised = true; |
| 28 | 33 | ||
| 29 | // Try releasing special pins for a short time | 34 | // Try releasing special pins for a short time |
| 30 | palSetPadMode(PAL_PORT(SPI_SCK_PIN), PAL_PAD(SPI_SCK_PIN), PAL_MODE_INPUT); | 35 | setPinInput(SPI_SCK_PIN); |
| 31 | palSetPadMode(PAL_PORT(SPI_MOSI_PIN), PAL_PAD(SPI_MOSI_PIN), PAL_MODE_INPUT); | 36 | setPinInput(SPI_MOSI_PIN); |
| 32 | palSetPadMode(PAL_PORT(SPI_MISO_PIN), PAL_PAD(SPI_MISO_PIN), PAL_MODE_INPUT); | 37 | setPinInput(SPI_MISO_PIN); |
| 33 | 38 | ||
| 34 | chThdSleepMilliseconds(10); | 39 | chThdSleepMilliseconds(10); |
| 35 | #if defined(USE_GPIOV1) | 40 | #if defined(USE_GPIOV1) |
| 36 | palSetPadMode(PAL_PORT(SPI_SCK_PIN), PAL_PAD(SPI_SCK_PIN), PAL_MODE_STM32_ALTERNATE_PUSHPULL); | 41 | palSetPadMode(PAL_PORT(SPI_SCK_PIN), PAL_PAD(SPI_SCK_PIN), SPI_SCK_PAL_MODE); |
| 37 | palSetPadMode(PAL_PORT(SPI_MOSI_PIN), PAL_PAD(SPI_MOSI_PIN), PAL_MODE_STM32_ALTERNATE_PUSHPULL); | 42 | palSetPadMode(PAL_PORT(SPI_MOSI_PIN), PAL_PAD(SPI_MOSI_PIN), SPI_MOSI_PAL_MODE); |
| 38 | palSetPadMode(PAL_PORT(SPI_MISO_PIN), PAL_PAD(SPI_MISO_PIN), PAL_MODE_STM32_ALTERNATE_PUSHPULL); | 43 | palSetPadMode(PAL_PORT(SPI_MISO_PIN), PAL_PAD(SPI_MISO_PIN), SPI_MISO_PAL_MODE); |
| 39 | #else | 44 | #else |
| 40 | palSetPadMode(PAL_PORT(SPI_SCK_PIN), PAL_PAD(SPI_SCK_PIN), PAL_MODE_ALTERNATE(SPI_SCK_PAL_MODE) | PAL_STM32_OTYPE_PUSHPULL | PAL_STM32_OSPEED_HIGHEST); | 45 | palSetPadMode(PAL_PORT(SPI_SCK_PIN), PAL_PAD(SPI_SCK_PIN), PAL_MODE_ALTERNATE(SPI_SCK_PAL_MODE) | PAL_STM32_OTYPE_PUSHPULL | PAL_STM32_OSPEED_HIGHEST); |
| 41 | palSetPadMode(PAL_PORT(SPI_MOSI_PIN), PAL_PAD(SPI_MOSI_PIN), PAL_MODE_ALTERNATE(SPI_MOSI_PAL_MODE) | PAL_STM32_OTYPE_PUSHPULL | PAL_STM32_OSPEED_HIGHEST); | 46 | palSetPadMode(PAL_PORT(SPI_MOSI_PIN), PAL_PAD(SPI_MOSI_PIN), PAL_MODE_ALTERNATE(SPI_MOSI_PAL_MODE) | PAL_STM32_OTYPE_PUSHPULL | PAL_STM32_OSPEED_HIGHEST); |
| @@ -58,6 +63,54 @@ bool spi_start(pin_t slavePin, bool lsbFirst, uint8_t mode, uint16_t divisor) { | |||
| 58 | return false; | 63 | return false; |
| 59 | } | 64 | } |
| 60 | 65 | ||
| 66 | #if defined(K20x) || defined(KL2x) | ||
| 67 | spiConfig.tar0 = SPIx_CTARn_FMSZ(7) | SPIx_CTARn_ASC(1); | ||
| 68 | |||
| 69 | if (lsbFirst) { | ||
| 70 | spiConfig.tar0 |= SPIx_CTARn_LSBFE; | ||
| 71 | } | ||
| 72 | |||
| 73 | switch (mode) { | ||
| 74 | case 0: | ||
| 75 | break; | ||
| 76 | case 1: | ||
| 77 | spiConfig.tar0 |= SPIx_CTARn_CPHA; | ||
| 78 | break; | ||
| 79 | case 2: | ||
| 80 | spiConfig.tar0 |= SPIx_CTARn_CPOL; | ||
| 81 | break; | ||
| 82 | case 3: | ||
| 83 | spiConfig.tar0 |= SPIx_CTARn_CPHA | SPIx_CTARn_CPOL; | ||
| 84 | break; | ||
| 85 | } | ||
| 86 | |||
| 87 | switch (roundedDivisor) { | ||
| 88 | case 2: | ||
| 89 | spiConfig.tar0 |= SPIx_CTARn_BR(0); | ||
| 90 | break; | ||
| 91 | case 4: | ||
| 92 | spiConfig.tar0 |= SPIx_CTARn_BR(1); | ||
| 93 | break; | ||
| 94 | case 8: | ||
| 95 | spiConfig.tar0 |= SPIx_CTARn_BR(3); | ||
| 96 | break; | ||
| 97 | case 16: | ||
| 98 | spiConfig.tar0 |= SPIx_CTARn_BR(4); | ||
| 99 | break; | ||
| 100 | case 32: | ||
| 101 | spiConfig.tar0 |= SPIx_CTARn_BR(5); | ||
| 102 | break; | ||
| 103 | case 64: | ||
| 104 | spiConfig.tar0 |= SPIx_CTARn_BR(6); | ||
| 105 | break; | ||
| 106 | case 128: | ||
| 107 | spiConfig.tar0 |= SPIx_CTARn_BR(7); | ||
| 108 | break; | ||
| 109 | case 256: | ||
| 110 | spiConfig.tar0 |= SPIx_CTARn_BR(8); | ||
| 111 | break; | ||
| 112 | } | ||
| 113 | #else | ||
| 61 | spiConfig.cr1 = 0; | 114 | spiConfig.cr1 = 0; |
| 62 | 115 | ||
| 63 | if (lsbFirst) { | 116 | if (lsbFirst) { |
| @@ -103,6 +156,7 @@ bool spi_start(pin_t slavePin, bool lsbFirst, uint8_t mode, uint16_t divisor) { | |||
| 103 | spiConfig.cr1 |= SPI_CR1_BR_2 | SPI_CR1_BR_1 | SPI_CR1_BR_0; | 156 | spiConfig.cr1 |= SPI_CR1_BR_2 | SPI_CR1_BR_1 | SPI_CR1_BR_0; |
| 104 | break; | 157 | break; |
| 105 | } | 158 | } |
| 159 | #endif | ||
| 106 | 160 | ||
| 107 | currentSlavePin = slavePin; | 161 | currentSlavePin = slavePin; |
| 108 | spiConfig.ssport = PAL_PORT(slavePin); | 162 | spiConfig.ssport = PAL_PORT(slavePin); |
diff --git a/drivers/chibios/spi_master.h b/drivers/chibios/spi_master.h index e93580e31..b5a6ef143 100644 --- a/drivers/chibios/spi_master.h +++ b/drivers/chibios/spi_master.h | |||
| @@ -21,6 +21,7 @@ | |||
| 21 | #include <stdbool.h> | 21 | #include <stdbool.h> |
| 22 | 22 | ||
| 23 | #include "gpio.h" | 23 | #include "gpio.h" |
| 24 | #include "chibios_config.h" | ||
| 24 | 25 | ||
| 25 | #ifndef SPI_DRIVER | 26 | #ifndef SPI_DRIVER |
| 26 | # define SPI_DRIVER SPID2 | 27 | # define SPI_DRIVER SPID2 |
| @@ -31,7 +32,11 @@ | |||
| 31 | #endif | 32 | #endif |
| 32 | 33 | ||
| 33 | #ifndef SPI_SCK_PAL_MODE | 34 | #ifndef SPI_SCK_PAL_MODE |
| 34 | # define SPI_SCK_PAL_MODE 5 | 35 | # if defined(USE_GPIOV1) |
| 36 | # define SPI_SCK_PAL_MODE PAL_MODE_STM32_ALTERNATE_PUSHPULL | ||
| 37 | # else | ||
| 38 | # define SPI_SCK_PAL_MODE 5 | ||
| 39 | # endif | ||
| 35 | #endif | 40 | #endif |
| 36 | 41 | ||
| 37 | #ifndef SPI_MOSI_PIN | 42 | #ifndef SPI_MOSI_PIN |
| @@ -39,7 +44,11 @@ | |||
| 39 | #endif | 44 | #endif |
| 40 | 45 | ||
| 41 | #ifndef SPI_MOSI_PAL_MODE | 46 | #ifndef SPI_MOSI_PAL_MODE |
| 42 | # define SPI_MOSI_PAL_MODE 5 | 47 | # if defined(USE_GPIOV1) |
| 48 | # define SPI_MOSI_PAL_MODE PAL_MODE_STM32_ALTERNATE_PUSHPULL | ||
| 49 | # else | ||
| 50 | # define SPI_MOSI_PAL_MODE 5 | ||
| 51 | # endif | ||
| 43 | #endif | 52 | #endif |
| 44 | 53 | ||
| 45 | #ifndef SPI_MISO_PIN | 54 | #ifndef SPI_MISO_PIN |
| @@ -47,7 +56,11 @@ | |||
| 47 | #endif | 56 | #endif |
| 48 | 57 | ||
| 49 | #ifndef SPI_MISO_PAL_MODE | 58 | #ifndef SPI_MISO_PAL_MODE |
| 50 | # define SPI_MISO_PAL_MODE 5 | 59 | # if defined(USE_GPIOV1) |
| 60 | # define SPI_MISO_PAL_MODE PAL_MODE_STM32_ALTERNATE_PUSHPULL | ||
| 61 | # else | ||
| 62 | # define SPI_MISO_PAL_MODE 5 | ||
| 63 | # endif | ||
| 51 | #endif | 64 | #endif |
| 52 | 65 | ||
| 53 | typedef int16_t spi_status_t; | 66 | typedef int16_t spi_status_t; |
