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-rw-r--r--drivers/chibios/analog.c276
-rw-r--r--drivers/chibios/analog.h41
-rw-r--r--drivers/chibios/i2c_master.c114
-rw-r--r--drivers/chibios/i2c_master.h106
-rw-r--r--drivers/chibios/ws2812.c95
-rw-r--r--drivers/chibios/ws2812.h16
-rw-r--r--drivers/chibios/ws2812_pwm.c207
-rw-r--r--drivers/chibios/ws2812_spi.c90
8 files changed, 945 insertions, 0 deletions
diff --git a/drivers/chibios/analog.c b/drivers/chibios/analog.c
new file mode 100644
index 000000000..6f6db6401
--- /dev/null
+++ b/drivers/chibios/analog.c
@@ -0,0 +1,276 @@
1/* Copyright 2019 Drew Mills
2 *
3 * This program is free software: you can redistribute it and/or modify
4 * it under the terms of the GNU General Public License as published by
5 * the Free Software Foundation, either version 2 of the License, or
6 * (at your option) any later version.
7 *
8 * This program is distributed in the hope that it will be useful,
9 * but WITHOUT ANY WARRANTY; without even the implied warranty of
10 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
11 * GNU General Public License for more details.
12 *
13 * You should have received a copy of the GNU General Public License
14 * along with this program. If not, see <http://www.gnu.org/licenses/>.
15 */
16
17#include "quantum.h"
18#include "analog.h"
19#include "ch.h"
20#include <hal.h>
21
22#if !HAL_USE_ADC
23# error "You need to set HAL_USE_ADC to TRUE in your halconf.h to use the ADC."
24#endif
25
26#if !STM32_ADC_USE_ADC1 && !STM32_ADC_USE_ADC2 && !STM32_ADC_USE_ADC3 && !STM32_ADC_USE_ADC4
27# error "You need to set one of the 'STM32_ADC_USE_ADCx' settings to TRUE in your mcuconf.h to use the ADC."
28#endif
29
30#if STM32_ADC_DUAL_MODE
31# error "STM32 ADC Dual Mode is not supported at this time."
32#endif
33
34#if STM32_ADCV3_OVERSAMPLING
35# error "STM32 ADCV3 Oversampling is not supported at this time."
36#endif
37
38// Otherwise assume V3
39#if defined(STM32F0XX) || defined(STM32L0XX)
40# define USE_ADCV1
41#elif defined(STM32F1XX) || defined(STM32F2XX) || defined(STM32F4XX)
42# define USE_ADCV2
43#endif
44
45// BODGE to make v2 look like v1,3 and 4
46#ifdef USE_ADCV2
47# if !defined(ADC_SMPR_SMP_1P5) && defined(ADC_SAMPLE_3)
48# define ADC_SMPR_SMP_1P5 ADC_SAMPLE_3
49# define ADC_SMPR_SMP_7P5 ADC_SAMPLE_15
50# define ADC_SMPR_SMP_13P5 ADC_SAMPLE_28
51# define ADC_SMPR_SMP_28P5 ADC_SAMPLE_56
52# define ADC_SMPR_SMP_41P5 ADC_SAMPLE_84
53# define ADC_SMPR_SMP_55P5 ADC_SAMPLE_112
54# define ADC_SMPR_SMP_71P5 ADC_SAMPLE_144
55# define ADC_SMPR_SMP_239P5 ADC_SAMPLE_480
56# endif
57
58# if !defined(ADC_SMPR_SMP_1P5) && defined(ADC_SAMPLE_1P5)
59# define ADC_SMPR_SMP_1P5 ADC_SAMPLE_1P5
60# define ADC_SMPR_SMP_7P5 ADC_SAMPLE_7P5
61# define ADC_SMPR_SMP_13P5 ADC_SAMPLE_13P5
62# define ADC_SMPR_SMP_28P5 ADC_SAMPLE_28P5
63# define ADC_SMPR_SMP_41P5 ADC_SAMPLE_41P5
64# define ADC_SMPR_SMP_55P5 ADC_SAMPLE_55P5
65# define ADC_SMPR_SMP_71P5 ADC_SAMPLE_71P5
66# define ADC_SMPR_SMP_239P5 ADC_SAMPLE_239P5
67# endif
68
69// we still sample at 12bit, but scale down to the requested bit range
70# define ADC_CFGR1_RES_12BIT 12
71# define ADC_CFGR1_RES_10BIT 10
72# define ADC_CFGR1_RES_8BIT 8
73# define ADC_CFGR1_RES_6BIT 6
74#endif
75
76/* User configurable ADC options */
77#ifndef ADC_COUNT
78# if defined(STM32F0XX) || defined(STM32F1XX) || defined(STM32F4XX)
79# define ADC_COUNT 1
80# elif defined(STM32F3XX)
81# define ADC_COUNT 4
82# else
83# error "ADC_COUNT has not been set for this ARM microcontroller."
84# endif
85#endif
86
87#ifndef ADC_NUM_CHANNELS
88# define ADC_NUM_CHANNELS 1
89#elif ADC_NUM_CHANNELS != 1
90# error "The ARM ADC implementation currently only supports reading one channel at a time."
91#endif
92
93#ifndef ADC_BUFFER_DEPTH
94# define ADC_BUFFER_DEPTH 1
95#endif
96
97// For more sampling rate options, look at hal_adc_lld.h in ChibiOS
98#ifndef ADC_SAMPLING_RATE
99# define ADC_SAMPLING_RATE ADC_SMPR_SMP_1P5
100#endif
101
102// Options are 12, 10, 8, and 6 bit.
103#ifndef ADC_RESOLUTION
104# define ADC_RESOLUTION ADC_CFGR1_RES_10BIT
105#endif
106
107static ADCConfig adcCfg = {};
108static adcsample_t sampleBuffer[ADC_NUM_CHANNELS * ADC_BUFFER_DEPTH];
109
110// Initialize to max number of ADCs, set to empty object to initialize all to false.
111static bool adcInitialized[ADC_COUNT] = {};
112
113// TODO: add back TR handling???
114static ADCConversionGroup adcConversionGroup = {
115 .circular = FALSE,
116 .num_channels = (uint16_t)(ADC_NUM_CHANNELS),
117#if defined(USE_ADCV1)
118 .cfgr1 = ADC_CFGR1_CONT | ADC_RESOLUTION,
119 .smpr = ADC_SAMPLING_RATE,
120#elif defined(USE_ADCV2)
121# if !defined(STM32F1XX)
122 .cr2 = ADC_CR2_SWSTART, // F103 seem very unhappy with, F401 seems very unhappy without...
123# endif
124 .smpr2 = ADC_SMPR2_SMP_AN0(ADC_SAMPLING_RATE) | ADC_SMPR2_SMP_AN1(ADC_SAMPLING_RATE) | ADC_SMPR2_SMP_AN2(ADC_SAMPLING_RATE) | ADC_SMPR2_SMP_AN3(ADC_SAMPLING_RATE) | ADC_SMPR2_SMP_AN4(ADC_SAMPLING_RATE) | ADC_SMPR2_SMP_AN5(ADC_SAMPLING_RATE) | ADC_SMPR2_SMP_AN6(ADC_SAMPLING_RATE) | ADC_SMPR2_SMP_AN7(ADC_SAMPLING_RATE) | ADC_SMPR2_SMP_AN8(ADC_SAMPLING_RATE) | ADC_SMPR2_SMP_AN9(ADC_SAMPLING_RATE),
125 .smpr1 = ADC_SMPR1_SMP_AN10(ADC_SAMPLING_RATE) | ADC_SMPR1_SMP_AN11(ADC_SAMPLING_RATE) | ADC_SMPR1_SMP_AN12(ADC_SAMPLING_RATE) | ADC_SMPR1_SMP_AN13(ADC_SAMPLING_RATE) | ADC_SMPR1_SMP_AN14(ADC_SAMPLING_RATE) | ADC_SMPR1_SMP_AN15(ADC_SAMPLING_RATE),
126#else
127 .cfgr = ADC_CFGR_CONT | ADC_RESOLUTION,
128 .smpr = {ADC_SMPR1_SMP_AN0(ADC_SAMPLING_RATE) | ADC_SMPR1_SMP_AN1(ADC_SAMPLING_RATE) | ADC_SMPR1_SMP_AN2(ADC_SAMPLING_RATE) | ADC_SMPR1_SMP_AN3(ADC_SAMPLING_RATE) | ADC_SMPR1_SMP_AN4(ADC_SAMPLING_RATE) | ADC_SMPR1_SMP_AN5(ADC_SAMPLING_RATE) | ADC_SMPR1_SMP_AN6(ADC_SAMPLING_RATE) | ADC_SMPR1_SMP_AN7(ADC_SAMPLING_RATE) | ADC_SMPR1_SMP_AN8(ADC_SAMPLING_RATE) | ADC_SMPR1_SMP_AN9(ADC_SAMPLING_RATE), ADC_SMPR2_SMP_AN10(ADC_SAMPLING_RATE) | ADC_SMPR2_SMP_AN11(ADC_SAMPLING_RATE) | ADC_SMPR2_SMP_AN12(ADC_SAMPLING_RATE) | ADC_SMPR2_SMP_AN13(ADC_SAMPLING_RATE) | ADC_SMPR2_SMP_AN14(ADC_SAMPLING_RATE) | ADC_SMPR2_SMP_AN15(ADC_SAMPLING_RATE) | ADC_SMPR2_SMP_AN16(ADC_SAMPLING_RATE) | ADC_SMPR2_SMP_AN17(ADC_SAMPLING_RATE) | ADC_SMPR2_SMP_AN18(ADC_SAMPLING_RATE)},
129#endif
130};
131
132// clang-format off
133__attribute__((weak)) adc_mux pinToMux(pin_t pin) {
134 switch (pin) {
135#if defined(STM32F0XX)
136 case A0: return TO_MUX( ADC_CHSELR_CHSEL0, 0 );
137 case A1: return TO_MUX( ADC_CHSELR_CHSEL1, 0 );
138 case A2: return TO_MUX( ADC_CHSELR_CHSEL2, 0 );
139 case A3: return TO_MUX( ADC_CHSELR_CHSEL3, 0 );
140 case A4: return TO_MUX( ADC_CHSELR_CHSEL4, 0 );
141 case A5: return TO_MUX( ADC_CHSELR_CHSEL5, 0 );
142 case A6: return TO_MUX( ADC_CHSELR_CHSEL6, 0 );
143 case A7: return TO_MUX( ADC_CHSELR_CHSEL7, 0 );
144 case B0: return TO_MUX( ADC_CHSELR_CHSEL8, 0 );
145 case B1: return TO_MUX( ADC_CHSELR_CHSEL9, 0 );
146 case C0: return TO_MUX( ADC_CHSELR_CHSEL10, 0 );
147 case C1: return TO_MUX( ADC_CHSELR_CHSEL11, 0 );
148 case C2: return TO_MUX( ADC_CHSELR_CHSEL12, 0 );
149 case C3: return TO_MUX( ADC_CHSELR_CHSEL13, 0 );
150 case C4: return TO_MUX( ADC_CHSELR_CHSEL14, 0 );
151 case C5: return TO_MUX( ADC_CHSELR_CHSEL15, 0 );
152#elif defined(STM32F3XX)
153 case A0: return TO_MUX( ADC_CHANNEL_IN1, 0 );
154 case A1: return TO_MUX( ADC_CHANNEL_IN2, 0 );
155 case A2: return TO_MUX( ADC_CHANNEL_IN3, 0 );
156 case A3: return TO_MUX( ADC_CHANNEL_IN4, 0 );
157 case A4: return TO_MUX( ADC_CHANNEL_IN1, 1 );
158 case A5: return TO_MUX( ADC_CHANNEL_IN2, 1 );
159 case A6: return TO_MUX( ADC_CHANNEL_IN3, 1 );
160 case A7: return TO_MUX( ADC_CHANNEL_IN4, 1 );
161 case B0: return TO_MUX( ADC_CHANNEL_IN12, 2 );
162 case B1: return TO_MUX( ADC_CHANNEL_IN1, 2 );
163 case B2: return TO_MUX( ADC_CHANNEL_IN12, 1 );
164 case B12: return TO_MUX( ADC_CHANNEL_IN2, 3 );
165 case B13: return TO_MUX( ADC_CHANNEL_IN3, 3 );
166 case B14: return TO_MUX( ADC_CHANNEL_IN4, 3 );
167 case B15: return TO_MUX( ADC_CHANNEL_IN5, 3 );
168 case C0: return TO_MUX( ADC_CHANNEL_IN6, 0 ); // Can also be ADC2
169 case C1: return TO_MUX( ADC_CHANNEL_IN7, 0 ); // Can also be ADC2
170 case C2: return TO_MUX( ADC_CHANNEL_IN8, 0 ); // Can also be ADC2
171 case C3: return TO_MUX( ADC_CHANNEL_IN9, 0 ); // Can also be ADC2
172 case C4: return TO_MUX( ADC_CHANNEL_IN5, 1 );
173 case C5: return TO_MUX( ADC_CHANNEL_IN11, 1 );
174 case D8: return TO_MUX( ADC_CHANNEL_IN12, 3 );
175 case D9: return TO_MUX( ADC_CHANNEL_IN13, 3 );
176 case D10: return TO_MUX( ADC_CHANNEL_IN7, 2 ); // Can also be ADC4
177 case D11: return TO_MUX( ADC_CHANNEL_IN8, 2 ); // Can also be ADC4
178 case D12: return TO_MUX( ADC_CHANNEL_IN9, 2 ); // Can also be ADC4
179 case D13: return TO_MUX( ADC_CHANNEL_IN10, 2 ); // Can also be ADC4
180 case D14: return TO_MUX( ADC_CHANNEL_IN11, 2 ); // Can also be ADC4
181 case E7: return TO_MUX( ADC_CHANNEL_IN13, 2 );
182 case E8: return TO_MUX( ADC_CHANNEL_IN6, 2 ); // Can also be ADC4
183 case E9: return TO_MUX( ADC_CHANNEL_IN2, 2 );
184 case E10: return TO_MUX( ADC_CHANNEL_IN14, 2 );
185 case E11: return TO_MUX( ADC_CHANNEL_IN15, 2 );
186 case E12: return TO_MUX( ADC_CHANNEL_IN16, 2 );
187 case E13: return TO_MUX( ADC_CHANNEL_IN3, 2 );
188 case E14: return TO_MUX( ADC_CHANNEL_IN1, 3 );
189 case E15: return TO_MUX( ADC_CHANNEL_IN2, 3 );
190 case F2: return TO_MUX( ADC_CHANNEL_IN10, 0 ); // Can also be ADC2
191 case F4: return TO_MUX( ADC_CHANNEL_IN5, 0 );
192#elif defined(STM32F4XX) // TODO: add all pins
193 case A0: return TO_MUX( ADC_CHANNEL_IN0, 0 );
194 //case A1: return TO_MUX( ADC_CHANNEL_IN1, 0 );
195#elif defined(STM32F1XX) // TODO: add all pins
196 case A0: return TO_MUX( ADC_CHANNEL_IN0, 0 );
197#endif
198 }
199
200 // return an adc that would never be used so intToADCDriver will bail out
201 return TO_MUX(0, 0xFF);
202}
203// clang-format on
204
205static inline ADCDriver* intToADCDriver(uint8_t adcInt) {
206 switch (adcInt) {
207#if STM32_ADC_USE_ADC1
208 case 0:
209 return &ADCD1;
210#endif
211#if STM32_ADC_USE_ADC2
212 case 1:
213 return &ADCD2;
214#endif
215#if STM32_ADC_USE_ADC3
216 case 2:
217 return &ADCD3;
218#endif
219#if STM32_ADC_USE_ADC4
220 case 3:
221 return &ADCD4;
222#endif
223 }
224
225 return NULL;
226}
227
228static inline void manageAdcInitializationDriver(uint8_t adc, ADCDriver* adcDriver) {
229 if (!adcInitialized[adc]) {
230 adcStart(adcDriver, &adcCfg);
231 adcInitialized[adc] = true;
232 }
233}
234
235int16_t analogReadPin(pin_t pin) {
236 palSetLineMode(pin, PAL_MODE_INPUT_ANALOG);
237
238 return adc_read(pinToMux(pin));
239}
240
241int16_t analogReadPinAdc(pin_t pin, uint8_t adc) {
242 palSetLineMode(pin, PAL_MODE_INPUT_ANALOG);
243
244 adc_mux target = pinToMux(pin);
245 target.adc = adc;
246 return adc_read(target);
247}
248
249int16_t adc_read(adc_mux mux) {
250#if defined(USE_ADCV1)
251 // TODO: fix previous assumption of only 1 input...
252 adcConversionGroup.chselr = 1 << mux.input; /*no macro to convert N to ADC_CHSELR_CHSEL1*/
253#elif defined(USE_ADCV2)
254 adcConversionGroup.sqr3 = ADC_SQR3_SQ1_N(mux.input);
255#else
256 adcConversionGroup.sqr[0] = ADC_SQR1_SQ1_N(mux.input);
257#endif
258
259 ADCDriver* targetDriver = intToADCDriver(mux.adc);
260 if (!targetDriver) {
261 return 0;
262 }
263
264 manageAdcInitializationDriver(mux.adc, targetDriver);
265 if (adcConvert(targetDriver, &adcConversionGroup, &sampleBuffer[0], ADC_BUFFER_DEPTH) != MSG_OK) {
266 return 0;
267 }
268
269#ifdef USE_ADCV2
270 // fake 12-bit -> N-bit scale
271 return (*sampleBuffer) >> (12 - ADC_RESOLUTION);
272#else
273 // already handled as part of adcConvert
274 return *sampleBuffer;
275#endif
276}
diff --git a/drivers/chibios/analog.h b/drivers/chibios/analog.h
new file mode 100644
index 000000000..e61c39426
--- /dev/null
+++ b/drivers/chibios/analog.h
@@ -0,0 +1,41 @@
1/* Copyright 2019 Drew Mills
2 *
3 * This program is free software: you can redistribute it and/or modify
4 * it under the terms of the GNU General Public License as published by
5 * the Free Software Foundation, either version 2 of the License, or
6 * (at your option) any later version.
7 *
8 * This program is distributed in the hope that it will be useful,
9 * but WITHOUT ANY WARRANTY; without even the implied warranty of
10 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
11 * GNU General Public License for more details.
12 *
13 * You should have received a copy of the GNU General Public License
14 * along with this program. If not, see <http://www.gnu.org/licenses/>.
15 */
16
17#pragma once
18
19#include <stdint.h>
20#include "quantum.h"
21
22#ifdef __cplusplus
23extern "C" {
24#endif
25
26typedef struct {
27 uint16_t input;
28 uint8_t adc;
29} adc_mux;
30#define TO_MUX(i, a) \
31 (adc_mux) { i, a }
32
33int16_t analogReadPin(pin_t pin);
34int16_t analogReadPinAdc(pin_t pin, uint8_t adc);
35adc_mux pinToMux(pin_t pin);
36
37int16_t adc_read(adc_mux mux);
38
39#ifdef __cplusplus
40}
41#endif
diff --git a/drivers/chibios/i2c_master.c b/drivers/chibios/i2c_master.c
new file mode 100644
index 000000000..ede915fa4
--- /dev/null
+++ b/drivers/chibios/i2c_master.c
@@ -0,0 +1,114 @@
1/* Copyright 2018 Jack Humbert
2 * Copyright 2018 Yiancar
3 *
4 * This program is free software: you can redistribute it and/or modify
5 * it under the terms of the GNU General Public License as published by
6 * the Free Software Foundation, either version 2 of the License, or
7 * (at your option) any later version.
8 *
9 * This program is distributed in the hope that it will be useful,
10 * but WITHOUT ANY WARRANTY; without even the implied warranty of
11 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
12 * GNU General Public License for more details.
13 *
14 * You should have received a copy of the GNU General Public License
15 * along with this program. If not, see <http://www.gnu.org/licenses/>.
16 */
17
18/* This library is only valid for STM32 processors.
19 * This library follows the convention of the AVR i2c_master library.
20 * As a result addresses are expected to be already shifted (addr << 1).
21 * I2CD1 is the default driver which corresponds to pins B6 and B7. This
22 * can be changed.
23 * Please ensure that HAL_USE_I2C is TRUE in the halconf.h file and that
24 * STM32_I2C_USE_I2C1 is TRUE in the mcuconf.h file. Pins B6 and B7 are used
25 * but using any other I2C pins should be trivial.
26 */
27#include "quantum.h"
28#include "i2c_master.h"
29#include <string.h>
30#include <hal.h>
31
32static uint8_t i2c_address;
33
34static const I2CConfig i2cconfig = {
35#ifdef USE_I2CV1
36 I2C1_OPMODE,
37 I2C1_CLOCK_SPEED,
38 I2C1_DUTY_CYCLE,
39#else
40 // This configures the I2C clock to 400khz assuming a 72Mhz clock
41 // For more info : https://www.st.com/en/embedded-software/stsw-stm32126.html
42 STM32_TIMINGR_PRESC(I2C1_TIMINGR_PRESC) | STM32_TIMINGR_SCLDEL(I2C1_TIMINGR_SCLDEL) | STM32_TIMINGR_SDADEL(I2C1_TIMINGR_SDADEL) | STM32_TIMINGR_SCLH(I2C1_TIMINGR_SCLH) | STM32_TIMINGR_SCLL(I2C1_TIMINGR_SCLL), 0, 0
43#endif
44};
45
46static i2c_status_t chibios_to_qmk(const msg_t* status) {
47 switch (*status) {
48 case I2C_NO_ERROR:
49 return I2C_STATUS_SUCCESS;
50 case I2C_TIMEOUT:
51 return I2C_STATUS_TIMEOUT;
52 // I2C_BUS_ERROR, I2C_ARBITRATION_LOST, I2C_ACK_FAILURE, I2C_OVERRUN, I2C_PEC_ERROR, I2C_SMB_ALERT
53 default:
54 return I2C_STATUS_ERROR;
55 }
56}
57
58__attribute__((weak)) void i2c_init(void) {
59 // Try releasing special pins for a short time
60 palSetPadMode(I2C1_SCL_BANK, I2C1_SCL, PAL_MODE_INPUT);
61 palSetPadMode(I2C1_SDA_BANK, I2C1_SDA, PAL_MODE_INPUT);
62
63 chThdSleepMilliseconds(10);
64#if defined(USE_GPIOV1)
65 palSetPadMode(I2C1_SCL_BANK, I2C1_SCL, PAL_MODE_STM32_ALTERNATE_OPENDRAIN);
66 palSetPadMode(I2C1_SDA_BANK, I2C1_SDA, PAL_MODE_STM32_ALTERNATE_OPENDRAIN);
67#else
68 palSetPadMode(I2C1_SCL_BANK, I2C1_SCL, PAL_MODE_ALTERNATE(I2C1_SCL_PAL_MODE) | PAL_STM32_OTYPE_OPENDRAIN);
69 palSetPadMode(I2C1_SDA_BANK, I2C1_SDA, PAL_MODE_ALTERNATE(I2C1_SDA_PAL_MODE) | PAL_STM32_OTYPE_OPENDRAIN);
70#endif
71}
72
73i2c_status_t i2c_start(uint8_t address) {
74 i2c_address = address;
75 i2cStart(&I2C_DRIVER, &i2cconfig);
76 return I2C_STATUS_SUCCESS;
77}
78
79i2c_status_t i2c_transmit(uint8_t address, const uint8_t* data, uint16_t length, uint16_t timeout) {
80 i2c_address = address;
81 i2cStart(&I2C_DRIVER, &i2cconfig);
82 msg_t status = i2cMasterTransmitTimeout(&I2C_DRIVER, (i2c_address >> 1), data, length, 0, 0, TIME_MS2I(timeout));
83 return chibios_to_qmk(&status);
84}
85
86i2c_status_t i2c_receive(uint8_t address, uint8_t* data, uint16_t length, uint16_t timeout) {
87 i2c_address = address;
88 i2cStart(&I2C_DRIVER, &i2cconfig);
89 msg_t status = i2cMasterReceiveTimeout(&I2C_DRIVER, (i2c_address >> 1), data, length, TIME_MS2I(timeout));
90 return chibios_to_qmk(&status);
91}
92
93i2c_status_t i2c_writeReg(uint8_t devaddr, uint8_t regaddr, const uint8_t* data, uint16_t length, uint16_t timeout) {
94 i2c_address = devaddr;
95 i2cStart(&I2C_DRIVER, &i2cconfig);
96
97 uint8_t complete_packet[length + 1];
98 for (uint8_t i = 0; i < length; i++) {
99 complete_packet[i + 1] = data[i];
100 }
101 complete_packet[0] = regaddr;
102
103 msg_t status = i2cMasterTransmitTimeout(&I2C_DRIVER, (i2c_address >> 1), complete_packet, length + 1, 0, 0, TIME_MS2I(timeout));
104 return chibios_to_qmk(&status);
105}
106
107i2c_status_t i2c_readReg(uint8_t devaddr, uint8_t regaddr, uint8_t* data, uint16_t length, uint16_t timeout) {
108 i2c_address = devaddr;
109 i2cStart(&I2C_DRIVER, &i2cconfig);
110 msg_t status = i2cMasterTransmitTimeout(&I2C_DRIVER, (i2c_address >> 1), &regaddr, 1, data, length, TIME_MS2I(timeout));
111 return chibios_to_qmk(&status);
112}
113
114void i2c_stop(void) { i2cStop(&I2C_DRIVER); }
diff --git a/drivers/chibios/i2c_master.h b/drivers/chibios/i2c_master.h
new file mode 100644
index 000000000..3d3891289
--- /dev/null
+++ b/drivers/chibios/i2c_master.h
@@ -0,0 +1,106 @@
1/* Copyright 2018 Jack Humbert
2 * Copyright 2018 Yiancar
3 *
4 * This program is free software: you can redistribute it and/or modify
5 * it under the terms of the GNU General Public License as published by
6 * the Free Software Foundation, either version 2 of the License, or
7 * (at your option) any later version.
8 *
9 * This program is distributed in the hope that it will be useful,
10 * but WITHOUT ANY WARRANTY; without even the implied warranty of
11 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
12 * GNU General Public License for more details.
13 *
14 * You should have received a copy of the GNU General Public License
15 * along with this program. If not, see <http://www.gnu.org/licenses/>.
16 */
17
18/* This library follows the convention of the AVR i2c_master library.
19 * As a result addresses are expected to be already shifted (addr << 1).
20 * I2CD1 is the default driver which corresponds to pins B6 and B7. This
21 * can be changed.
22 * Please ensure that HAL_USE_I2C is TRUE in the halconf.h file and that
23 * STM32_I2C_USE_I2C1 is TRUE in the mcuconf.h file.
24 */
25#pragma once
26
27#include "ch.h"
28#include <hal.h>
29
30#ifdef I2C1_BANK
31# define I2C1_SCL_BANK I2C1_BANK
32# define I2C1_SDA_BANK I2C1_BANK
33#endif
34
35#ifndef I2C1_SCL_BANK
36# define I2C1_SCL_BANK GPIOB
37#endif
38
39#ifndef I2C1_SDA_BANK
40# define I2C1_SDA_BANK GPIOB
41#endif
42
43#ifndef I2C1_SCL
44# define I2C1_SCL 6
45#endif
46#ifndef I2C1_SDA
47# define I2C1_SDA 7
48#endif
49
50#ifdef USE_I2CV1
51# ifndef I2C1_OPMODE
52# define I2C1_OPMODE OPMODE_I2C
53# endif
54# ifndef I2C1_CLOCK_SPEED
55# define I2C1_CLOCK_SPEED 100000 /* 400000 */
56# endif
57# ifndef I2C1_DUTY_CYCLE
58# define I2C1_DUTY_CYCLE STD_DUTY_CYCLE /* FAST_DUTY_CYCLE_2 */
59# endif
60#else
61// The default timing values below configures the I2C clock to 400khz assuming a 72Mhz clock
62// For more info : https://www.st.com/en/embedded-software/stsw-stm32126.html
63# ifndef I2C1_TIMINGR_PRESC
64# define I2C1_TIMINGR_PRESC 0U
65# endif
66# ifndef I2C1_TIMINGR_SCLDEL
67# define I2C1_TIMINGR_SCLDEL 7U
68# endif
69# ifndef I2C1_TIMINGR_SDADEL
70# define I2C1_TIMINGR_SDADEL 0U
71# endif
72# ifndef I2C1_TIMINGR_SCLH
73# define I2C1_TIMINGR_SCLH 38U
74# endif
75# ifndef I2C1_TIMINGR_SCLL
76# define I2C1_TIMINGR_SCLL 129U
77# endif
78#endif
79
80#ifndef I2C_DRIVER
81# define I2C_DRIVER I2CD1
82#endif
83
84#ifndef USE_GPIOV1
85// The default PAL alternate modes are used to signal that the pins are used for I2C
86# ifndef I2C1_SCL_PAL_MODE
87# define I2C1_SCL_PAL_MODE 4
88# endif
89# ifndef I2C1_SDA_PAL_MODE
90# define I2C1_SDA_PAL_MODE 4
91# endif
92#endif
93
94typedef int16_t i2c_status_t;
95
96#define I2C_STATUS_SUCCESS (0)
97#define I2C_STATUS_ERROR (-1)
98#define I2C_STATUS_TIMEOUT (-2)
99
100void i2c_init(void);
101i2c_status_t i2c_start(uint8_t address);
102i2c_status_t i2c_transmit(uint8_t address, const uint8_t* data, uint16_t length, uint16_t timeout);
103i2c_status_t i2c_receive(uint8_t address, uint8_t* data, uint16_t length, uint16_t timeout);
104i2c_status_t i2c_writeReg(uint8_t devaddr, uint8_t regaddr, const uint8_t* data, uint16_t length, uint16_t timeout);
105i2c_status_t i2c_readReg(uint8_t devaddr, uint8_t regaddr, uint8_t* data, uint16_t length, uint16_t timeout);
106void i2c_stop(void);
diff --git a/drivers/chibios/ws2812.c b/drivers/chibios/ws2812.c
new file mode 100644
index 000000000..bdca565d8
--- /dev/null
+++ b/drivers/chibios/ws2812.c
@@ -0,0 +1,95 @@
1#include "quantum.h"
2#include "ws2812.h"
3#include "ch.h"
4#include "hal.h"
5
6/* Adapted from https://github.com/bigjosh/SimpleNeoPixelDemo/ */
7
8#ifndef NOP_FUDGE
9# if defined(STM32F0XX) || defined(STM32F1XX) || defined(STM32F3XX) || defined(STM32F4XX) || defined(STM32L0XX)
10# define NOP_FUDGE 0.4
11# else
12# error("NOP_FUDGE configuration required")
13# define NOP_FUDGE 1 // this just pleases the compile so the above error is easier to spot
14# endif
15#endif
16
17#define NUMBER_NOPS 6
18#define CYCLES_PER_SEC (STM32_SYSCLK / NUMBER_NOPS * NOP_FUDGE)
19#define NS_PER_SEC (1000000000L) // Note that this has to be SIGNED since we want to be able to check for negative values of derivatives
20#define NS_PER_CYCLE (NS_PER_SEC / CYCLES_PER_SEC)
21#define NS_TO_CYCLES(n) ((n) / NS_PER_CYCLE)
22
23#define wait_ns(x) \
24 do { \
25 for (int i = 0; i < NS_TO_CYCLES(x); i++) { \
26 __asm__ volatile("nop\n\t" \
27 "nop\n\t" \
28 "nop\n\t" \
29 "nop\n\t" \
30 "nop\n\t" \
31 "nop\n\t"); \
32 } \
33 } while (0)
34
35// These are the timing constraints taken mostly from the WS2812 datasheets
36// These are chosen to be conservative and avoid problems rather than for maximum throughput
37
38#define T1H 900 // Width of a 1 bit in ns
39#define T1L (1250 - T1H) // Width of a 1 bit in ns
40
41#define T0H 350 // Width of a 0 bit in ns
42#define T0L (1250 - T0H) // Width of a 0 bit in ns
43
44// The reset gap can be 6000 ns, but depending on the LED strip it may have to be increased
45// to values like 600000 ns. If it is too small, the pixels will show nothing most of the time.
46#define RES 10000 // Width of the low gap between bits to cause a frame to latch
47
48void sendByte(uint8_t byte) {
49 // WS2812 protocol wants most significant bits first
50 for (unsigned char bit = 0; bit < 8; bit++) {
51 bool is_one = byte & (1 << (7 - bit));
52 // using something like wait_ns(is_one ? T1L : T0L) here throws off timings
53 if (is_one) {
54 // 1
55 writePinHigh(RGB_DI_PIN);
56 wait_ns(T1H);
57 writePinLow(RGB_DI_PIN);
58 wait_ns(T1L);
59 } else {
60 // 0
61 writePinHigh(RGB_DI_PIN);
62 wait_ns(T0H);
63 writePinLow(RGB_DI_PIN);
64 wait_ns(T0L);
65 }
66 }
67}
68
69void ws2812_init(void) { setPinOutput(RGB_DI_PIN); }
70
71// Setleds for standard RGB
72void ws2812_setleds(LED_TYPE *ledarray, uint16_t leds) {
73 static bool s_init = false;
74 if (!s_init) {
75 ws2812_init();
76 s_init = true;
77 }
78
79 // this code is very time dependent, so we need to disable interrupts
80 chSysLock();
81
82 for (uint8_t i = 0; i < leds; i++) {
83 // WS2812 protocol dictates grb order
84 sendByte(ledarray[i].g);
85 sendByte(ledarray[i].r);
86 sendByte(ledarray[i].b);
87#ifdef RGBW
88 sendByte(ledarray[i].w);
89#endif
90 }
91
92 wait_ns(RES);
93
94 chSysUnlock();
95}
diff --git a/drivers/chibios/ws2812.h b/drivers/chibios/ws2812.h
new file mode 100644
index 000000000..41c22a00b
--- /dev/null
+++ b/drivers/chibios/ws2812.h
@@ -0,0 +1,16 @@
1#pragma once
2
3#include "quantum/color.h"
4
5/* User Interface
6 *
7 * Input:
8 * ledarray: An array of GRB data describing the LED colors
9 * number_of_leds: The number of LEDs to write
10 *
11 * The functions will perform the following actions:
12 * - Set the data-out pin as output
13 * - Send out the LED data
14 * - Wait 50us to reset the LEDs
15 */
16void ws2812_setleds(LED_TYPE *ledarray, uint16_t number_of_leds);
diff --git a/drivers/chibios/ws2812_pwm.c b/drivers/chibios/ws2812_pwm.c
new file mode 100644
index 000000000..1a1721029
--- /dev/null
+++ b/drivers/chibios/ws2812_pwm.c
@@ -0,0 +1,207 @@
1#include "ws2812.h"
2#include "quantum.h"
3#include "hal.h"
4
5/* Adapted from https://github.com/joewa/WS2812-LED-Driver_ChibiOS/ */
6
7#ifdef RGBW
8# error "RGBW not supported"
9#endif
10
11#ifndef WS2812_PWM_DRIVER
12# define WS2812_PWM_DRIVER PWMD2 // TIMx
13#endif
14#ifndef WS2812_PWM_CHANNEL
15# define WS2812_PWM_CHANNEL 2 // Channel
16#endif
17#ifndef WS2812_PWM_PAL_MODE
18# define WS2812_PWM_PAL_MODE 2 // DI Pin's alternate function value
19#endif
20#ifndef WS2812_DMA_STREAM
21# define WS2812_DMA_STREAM STM32_DMA1_STREAM2 // DMA Stream for TIMx_UP
22#endif
23#ifndef WS2812_DMA_CHANNEL
24# define WS2812_DMA_CHANNEL 2 // DMA Channel for TIMx_UP
25#endif
26
27#ifndef WS2812_PWM_TARGET_PERIOD
28//# define WS2812_PWM_TARGET_PERIOD 800000 // Original code is 800k...?
29# define WS2812_PWM_TARGET_PERIOD 80000 // TODO: work out why 10x less on f303/f4x1
30#endif
31
32/* --- PRIVATE CONSTANTS ---------------------------------------------------- */
33
34#define WS2812_PWM_FREQUENCY (STM32_SYSCLK / 2) /**< Clock frequency of PWM, must be valid with respect to system clock! */
35#define WS2812_PWM_PERIOD (WS2812_PWM_FREQUENCY / WS2812_PWM_TARGET_PERIOD) /**< Clock period in ticks. 1 / 800kHz = 1.25 uS (as per datasheet) */
36
37/**
38 * @brief Number of bit-periods to hold the data line low at the end of a frame
39 *
40 * The reset period for each frame must be at least 50 uS; so we add in 50 bit-times
41 * of zeroes at the end. (50 bits)*(1.25 uS/bit) = 62.5 uS, which gives us some
42 * slack in the timing requirements
43 */
44#define WS2812_RESET_BIT_N (50)
45#define WS2812_COLOR_BIT_N (RGBLED_NUM * 24) /**< Number of data bits */
46#define WS2812_BIT_N (WS2812_COLOR_BIT_N + WS2812_RESET_BIT_N) /**< Total number of bits in a frame */
47
48/**
49 * @brief High period for a zero, in ticks
50 *
51 * Per the datasheet:
52 * WS2812:
53 * - T0H: 200 nS to 500 nS, inclusive
54 * - T0L: 650 nS to 950 nS, inclusive
55 * WS2812B:
56 * - T0H: 200 nS to 500 nS, inclusive
57 * - T0L: 750 nS to 1050 nS, inclusive
58 *
59 * The duty cycle is calculated for a high period of 350 nS.
60 */
61#define WS2812_DUTYCYCLE_0 (WS2812_PWM_FREQUENCY / (1000000000 / 350))
62
63/**
64 * @brief High period for a one, in ticks
65 *
66 * Per the datasheet:
67 * WS2812:
68 * - T1H: 550 nS to 850 nS, inclusive
69 * - T1L: 450 nS to 750 nS, inclusive
70 * WS2812B:
71 * - T1H: 750 nS to 1050 nS, inclusive
72 * - T1L: 200 nS to 500 nS, inclusive
73 *
74 * The duty cycle is calculated for a high period of 800 nS.
75 * This is in the middle of the specifications of the WS2812 and WS2812B.
76 */
77#define WS2812_DUTYCYCLE_1 (WS2812_PWM_FREQUENCY / (1000000000 / 800))
78
79/* --- PRIVATE MACROS ------------------------------------------------------- */
80
81/**
82 * @brief Determine the index in @ref ws2812_frame_buffer "the frame buffer" of a given bit
83 *
84 * @param[in] led: The led index [0, @ref RGBLED_NUM)
85 * @param[in] byte: The byte number [0, 2]
86 * @param[in] bit: The bit number [0, 7]
87 *
88 * @return The bit index
89 */
90#define WS2812_BIT(led, byte, bit) (24 * (led) + 8 * (byte) + (7 - (bit)))
91
92/**
93 * @brief Determine the index in @ref ws2812_frame_buffer "the frame buffer" of a given red bit
94 *
95 * @note The red byte is the middle byte in the color packet
96 *
97 * @param[in] led: The led index [0, @ref RGBLED_NUM)
98 * @param[in] bit: The bit number [0, 7]
99 *
100 * @return The bit index
101 */
102#define WS2812_RED_BIT(led, bit) WS2812_BIT((led), 1, (bit))
103
104/**
105 * @brief Determine the index in @ref ws2812_frame_buffer "the frame buffer" of a given green bit
106 *
107 * @note The red byte is the first byte in the color packet
108 *
109 * @param[in] led: The led index [0, @ref RGBLED_NUM)
110 * @param[in] bit: The bit number [0, 7]
111 *
112 * @return The bit index
113 */
114#define WS2812_GREEN_BIT(led, bit) WS2812_BIT((led), 0, (bit))
115
116/**
117 * @brief Determine the index in @ref ws2812_frame_buffer "the frame buffer" of a given blue bit
118 *
119 * @note The red byte is the last byte in the color packet
120 *
121 * @param[in] led: The led index [0, @ref RGBLED_NUM)
122 * @param[in] bit: The bit index [0, 7]
123 *
124 * @return The bit index
125 */
126#define WS2812_BLUE_BIT(led, bit) WS2812_BIT((led), 2, (bit))
127
128/* --- PRIVATE VARIABLES ---------------------------------------------------- */
129
130static uint32_t ws2812_frame_buffer[WS2812_BIT_N + 1]; /**< Buffer for a frame */
131
132/* --- PUBLIC FUNCTIONS ----------------------------------------------------- */
133/*
134 * Gedanke: Double-buffer type transactions: double buffer transfers using two memory pointers for
135the memory (while the DMA is reading/writing from/to a buffer, the application can
136write/read to/from the other buffer).
137 */
138
139void ws2812_init(void) {
140 // Initialize led frame buffer
141 uint32_t i;
142 for (i = 0; i < WS2812_COLOR_BIT_N; i++) ws2812_frame_buffer[i] = WS2812_DUTYCYCLE_0; // All color bits are zero duty cycle
143 for (i = 0; i < WS2812_RESET_BIT_N; i++) ws2812_frame_buffer[i + WS2812_COLOR_BIT_N] = 0; // All reset bits are zero
144
145#if defined(USE_GPIOV1)
146 palSetLineMode(RGB_DI_PIN, PAL_MODE_STM32_ALTERNATE_PUSHPULL);
147#else
148 palSetLineMode(RGB_DI_PIN, PAL_MODE_ALTERNATE(WS2812_PWM_PAL_MODE) | PAL_STM32_OSPEED_HIGHEST | PAL_STM32_PUPDR_FLOATING);
149#endif
150
151 // PWM Configuration
152 //#pragma GCC diagnostic ignored "-Woverride-init" // Turn off override-init warning for this struct. We use the overriding ability to set a "default" channel config
153 static const PWMConfig ws2812_pwm_config = {
154 .frequency = WS2812_PWM_FREQUENCY,
155 .period = WS2812_PWM_PERIOD, // Mit dieser Periode wird UDE-Event erzeugt und ein neuer Wert (Länge WS2812_BIT_N) vom DMA ins CCR geschrieben
156 .callback = NULL,
157 .channels =
158 {
159 [0 ... 3] = {.mode = PWM_OUTPUT_DISABLED, .callback = NULL}, // Channels default to disabled
160 [WS2812_PWM_CHANNEL - 1] = {.mode = PWM_OUTPUT_ACTIVE_HIGH, .callback = NULL}, // Turn on the channel we care about
161 },
162 .cr2 = 0,
163 .dier = TIM_DIER_UDE, // DMA on update event for next period
164 };
165 //#pragma GCC diagnostic pop // Restore command-line warning options
166
167 // Configure DMA
168 // dmaInit(); // Joe added this
169 dmaStreamAlloc(WS2812_DMA_STREAM - STM32_DMA1_STREAM1, 10, NULL, NULL);
170 dmaStreamSetPeripheral(WS2812_DMA_STREAM, &(WS2812_PWM_DRIVER.tim->CCR[WS2812_PWM_CHANNEL - 1])); // Ziel ist der An-Zeit im Cap-Comp-Register
171 dmaStreamSetMemory0(WS2812_DMA_STREAM, ws2812_frame_buffer);
172 dmaStreamSetTransactionSize(WS2812_DMA_STREAM, WS2812_BIT_N);
173 dmaStreamSetMode(WS2812_DMA_STREAM, STM32_DMA_CR_CHSEL(WS2812_DMA_CHANNEL) | STM32_DMA_CR_DIR_M2P | STM32_DMA_CR_PSIZE_WORD | STM32_DMA_CR_MSIZE_WORD | STM32_DMA_CR_MINC | STM32_DMA_CR_CIRC | STM32_DMA_CR_PL(3));
174 // M2P: Memory 2 Periph; PL: Priority Level
175
176 // Start DMA
177 dmaStreamEnable(WS2812_DMA_STREAM);
178
179 // Configure PWM
180 // NOTE: It's required that preload be enabled on the timer channel CCR register. This is currently enabled in the
181 // ChibiOS driver code, so we don't have to do anything special to the timer. If we did, we'd have to start the timer,
182 // disable counting, enable the channel, and then make whatever configuration changes we need.
183 pwmStart(&WS2812_PWM_DRIVER, &ws2812_pwm_config);
184 pwmEnableChannel(&WS2812_PWM_DRIVER, WS2812_PWM_CHANNEL - 1, 0); // Initial period is 0; output will be low until first duty cycle is DMA'd in
185}
186
187void ws2812_write_led(uint16_t led_number, uint8_t r, uint8_t g, uint8_t b) {
188 // Write color to frame buffer
189 for (uint8_t bit = 0; bit < 8; bit++) {
190 ws2812_frame_buffer[WS2812_RED_BIT(led_number, bit)] = ((r >> bit) & 0x01) ? WS2812_DUTYCYCLE_1 : WS2812_DUTYCYCLE_0;
191 ws2812_frame_buffer[WS2812_GREEN_BIT(led_number, bit)] = ((g >> bit) & 0x01) ? WS2812_DUTYCYCLE_1 : WS2812_DUTYCYCLE_0;
192 ws2812_frame_buffer[WS2812_BLUE_BIT(led_number, bit)] = ((b >> bit) & 0x01) ? WS2812_DUTYCYCLE_1 : WS2812_DUTYCYCLE_0;
193 }
194}
195
196// Setleds for standard RGB
197void ws2812_setleds(LED_TYPE* ledarray, uint16_t leds) {
198 static bool s_init = false;
199 if (!s_init) {
200 ws2812_init();
201 s_init = true;
202 }
203
204 for (uint16_t i = 0; i < leds; i++) {
205 ws2812_write_led(i, ledarray[i].r, ledarray[i].g, ledarray[i].b);
206 }
207}
diff --git a/drivers/chibios/ws2812_spi.c b/drivers/chibios/ws2812_spi.c
new file mode 100644
index 000000000..36e08e39e
--- /dev/null
+++ b/drivers/chibios/ws2812_spi.c
@@ -0,0 +1,90 @@
1#include "quantum.h"
2#include "ws2812.h"
3
4/* Adapted from https://github.com/gamazeps/ws2812b-chibios-SPIDMA/ */
5
6#ifdef RGBW
7# error "RGBW not supported"
8#endif
9
10// Define the spi your LEDs are plugged to here
11#ifndef WS2812_SPI
12# define WS2812_SPI SPID1
13#endif
14
15#ifndef WS2812_SPI_MOSI_PAL_MODE
16# define WS2812_SPI_MOSI_PAL_MODE 5
17#endif
18
19#define BYTES_FOR_LED_BYTE 4
20#define NB_COLORS 3
21#define BYTES_FOR_LED (BYTES_FOR_LED_BYTE * NB_COLORS)
22#define DATA_SIZE (BYTES_FOR_LED * RGBLED_NUM)
23#define RESET_SIZE 200
24#define PREAMBLE_SIZE 4
25
26static uint8_t txbuf[PREAMBLE_SIZE + DATA_SIZE + RESET_SIZE] = {0};
27
28/*
29 * As the trick here is to use the SPI to send a huge pattern of 0 and 1 to
30 * the ws2812b protocol, we use this helper function to translate bytes into
31 * 0s and 1s for the LED (with the appropriate timing).
32 */
33static uint8_t get_protocol_eq(uint8_t data, int pos) {
34 uint8_t eq = 0;
35 if (data & (1 << (2 * (3 - pos))))
36 eq = 0b1110;
37 else
38 eq = 0b1000;
39 if (data & (2 << (2 * (3 - pos))))
40 eq += 0b11100000;
41 else
42 eq += 0b10000000;
43 return eq;
44}
45
46static void set_led_color_rgb(LED_TYPE color, int pos) {
47 uint8_t* tx_start = &txbuf[PREAMBLE_SIZE];
48
49 for (int j = 0; j < 4; j++) tx_start[BYTES_FOR_LED * pos + j] = get_protocol_eq(color.g, j);
50 for (int j = 0; j < 4; j++) tx_start[BYTES_FOR_LED * pos + BYTES_FOR_LED_BYTE + j] = get_protocol_eq(color.r, j);
51 for (int j = 0; j < 4; j++) tx_start[BYTES_FOR_LED * pos + BYTES_FOR_LED_BYTE * 2 + j] = get_protocol_eq(color.b, j);
52}
53
54void ws2812_init(void) {
55#if defined(USE_GPIOV1)
56 palSetLineMode(RGB_DI_PIN, PAL_MODE_STM32_ALTERNATE_PUSHPULL);
57#else
58 palSetLineMode(RGB_DI_PIN, PAL_MODE_ALTERNATE(WS2812_SPI_MOSI_PAL_MODE) | PAL_STM32_OTYPE_PUSHPULL);
59#endif
60
61 // TODO: more dynamic baudrate
62 static const SPIConfig spicfg = {
63 0, NULL, PAL_PORT(RGB_DI_PIN), PAL_PAD(RGB_DI_PIN),
64 SPI_CR1_BR_1 | SPI_CR1_BR_0 // baudrate : fpclk / 8 => 1tick is 0.32us (2.25 MHz)
65 };
66
67 spiAcquireBus(&WS2812_SPI); /* Acquire ownership of the bus. */
68 spiStart(&WS2812_SPI, &spicfg); /* Setup transfer parameters. */
69 spiSelect(&WS2812_SPI); /* Slave Select assertion. */
70}
71
72void ws2812_setleds(LED_TYPE* ledarray, uint16_t leds) {
73 static bool s_init = false;
74 if (!s_init) {
75 ws2812_init();
76 s_init = true;
77 }
78
79 for (uint8_t i = 0; i < leds; i++) {
80 set_led_color_rgb(ledarray[i], i);
81 }
82
83 // Send async - each led takes ~0.03ms, 50 leds ~1.5ms, animations flushing faster than send will cause issues.
84 // Instead spiSend can be used to send synchronously (or the thread logic can be added back).
85#ifdef WS2812_SPI_SYNC
86 spiSend(&WS2812_SPI, sizeof(txbuf) / sizeof(txbuf[0]), txbuf);
87#else
88 spiStartSend(&WS2812_SPI, sizeof(txbuf) / sizeof(txbuf[0]), txbuf);
89#endif
90}
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