diff options
Diffstat (limited to 'hhkb/config_vusb.h')
| -rw-r--r-- | hhkb/config_vusb.h | 88 |
1 files changed, 0 insertions, 88 deletions
diff --git a/hhkb/config_vusb.h b/hhkb/config_vusb.h index 3b44b94a3..7c4291a21 100644 --- a/hhkb/config_vusb.h +++ b/hhkb/config_vusb.h | |||
| @@ -29,92 +29,4 @@ | |||
| 29 | #endif | 29 | #endif |
| 30 | 30 | ||
| 31 | 31 | ||
| 32 | /* PS/2 lines */ | ||
| 33 | #ifdef PS2_MOUSE_ENABLE | ||
| 34 | |||
| 35 | #define PS2_CLOCK_PORT PORTD | ||
| 36 | #define PS2_CLOCK_PIN PIND | ||
| 37 | #define PS2_CLOCK_DDR DDRD | ||
| 38 | #define PS2_CLOCK_BIT 4 | ||
| 39 | #define PS2_DATA_PORT PORTD | ||
| 40 | #define PS2_DATA_PIN PIND | ||
| 41 | #define PS2_DATA_DDR DDRD | ||
| 42 | #define PS2_DATA_BIT 0 | ||
| 43 | |||
| 44 | |||
| 45 | // Synchronous USART is used to receive data from keyboard. | ||
| 46 | // Use RXD pin for PS/2 DATA line and XCK for PS/2 CLOCK. | ||
| 47 | // NOTE: This is recomended strongly if you use V-USB library. | ||
| 48 | #define PS2_USE_USART | ||
| 49 | |||
| 50 | // External or Pin Change Interrupt is used to receive data from keyboard. | ||
| 51 | // Use INT1 or PCINTxx for PS/2 CLOCK line. see below. | ||
| 52 | //#define PS2_USE_INT | ||
| 53 | |||
| 54 | |||
| 55 | #ifdef PS2_USE_USART | ||
| 56 | // synchronous, odd parity, 1-bit stop, 8-bit data, sample at falling edge | ||
| 57 | // set DDR of CLOCK as input to be slave | ||
| 58 | #define PS2_USART_INIT() do { \ | ||
| 59 | PS2_CLOCK_DDR &= ~(1<<PS2_CLOCK_BIT); \ | ||
| 60 | PS2_DATA_DDR &= ~(1<<PS2_DATA_BIT); \ | ||
| 61 | UCSR0C = ((1 << UMSEL00) | \ | ||
| 62 | (3 << UPM00) | \ | ||
| 63 | (0 << USBS0) | \ | ||
| 64 | (3 << UCSZ00) | \ | ||
| 65 | (0 << UCPOL0)); \ | ||
| 66 | UCSR0A = 0; \ | ||
| 67 | UBRR0H = 0; \ | ||
| 68 | UBRR0L = 0; \ | ||
| 69 | } while (0) | ||
| 70 | #define PS2_USART_RX_INT_ON() do { \ | ||
| 71 | UCSR0B = ((1 << RXCIE0) | \ | ||
| 72 | (1 << RXEN0)); \ | ||
| 73 | } while (0) | ||
| 74 | #define PS2_USART_RX_POLL_ON() do { \ | ||
| 75 | UCSR0B = (1 << RXEN0); \ | ||
| 76 | } while (0) | ||
| 77 | #define PS2_USART_OFF() do { \ | ||
| 78 | UCSR0C = 0; \ | ||
| 79 | UCSR0B &= ~((1 << RXEN0) | \ | ||
| 80 | (1 << TXEN0)); \ | ||
| 81 | } while (0) | ||
| 82 | #define PS2_USART_RX_READY (UCSR0A & (1<<RXC0)) | ||
| 83 | #define PS2_USART_RX_DATA UDR0 | ||
| 84 | #define PS2_USART_ERROR (UCSR0A & ((1<<FE0) | (1<<DOR0) | (1<<UPE0))) | ||
| 85 | #define PS2_USART_RX_VECT USART_RX_vect | ||
| 86 | #endif | ||
| 87 | |||
| 88 | |||
| 89 | #ifdef PS2_USE_INT | ||
| 90 | /* INT1 | ||
| 91 | #define PS2_INT_INIT() do { \ | ||
| 92 | EICRA |= ((1<<ISC11) | \ | ||
| 93 | (0<<ISC10)); \ | ||
| 94 | } while (0) | ||
| 95 | #define PS2_INT_ON() do { \ | ||
| 96 | EIMSK |= (1<<INT1); \ | ||
| 97 | } while (0) | ||
| 98 | #define PS2_INT_OFF() do { \ | ||
| 99 | EIMSK &= ~(1<<INT1); \ | ||
| 100 | } while (0) | ||
| 101 | #define PS2_INT_VECT INT1_vect | ||
| 102 | */ | ||
| 103 | |||
| 104 | /* PCINT20 */ | ||
| 105 | #define PS2_INT_INIT() do { \ | ||
| 106 | PCICR |= (1<<PCIE2); \ | ||
| 107 | } while (0) | ||
| 108 | #define PS2_INT_ON() do { \ | ||
| 109 | PCMSK2 |= (1<<PCINT20); \ | ||
| 110 | } while (0) | ||
| 111 | #define PS2_INT_OFF() do { \ | ||
| 112 | PCMSK2 &= ~(1<<PCINT20); \ | ||
| 113 | PCICR &= ~(1<<PCIE2); \ | ||
| 114 | } while (0) | ||
| 115 | #define PS2_INT_VECT PCINT2_vect | ||
| 116 | #endif | ||
| 117 | |||
| 118 | #endif | ||
| 119 | |||
| 120 | #endif | 32 | #endif |
