diff options
Diffstat (limited to 'keyboards/matrix/noah/mcuconf.h')
| -rw-r--r-- | keyboards/matrix/noah/mcuconf.h | 61 |
1 files changed, 23 insertions, 38 deletions
diff --git a/keyboards/matrix/noah/mcuconf.h b/keyboards/matrix/noah/mcuconf.h index 8405d61e1..54a1f2661 100644 --- a/keyboards/matrix/noah/mcuconf.h +++ b/keyboards/matrix/noah/mcuconf.h | |||
| @@ -1,5 +1,5 @@ | |||
| 1 | /* | 1 | /* |
| 2 | ChibiOS - Copyright (C) 2006..2016 Giovanni Di Sirio | 2 | ChibiOS - Copyright (C) 2006..2018 Giovanni Di Sirio |
| 3 | 3 | ||
| 4 | Licensed under the Apache License, Version 2.0 (the "License"); | 4 | Licensed under the Apache License, Version 2.0 (the "License"); |
| 5 | you may not use this file except in compliance with the License. | 5 | you may not use this file except in compliance with the License. |
| @@ -57,14 +57,32 @@ | |||
| 57 | #define STM32_MCO1PRE STM32_MCO1PRE_DIV1 | 57 | #define STM32_MCO1PRE STM32_MCO1PRE_DIV1 |
| 58 | #define STM32_MCO2SEL STM32_MCO2SEL_SYSCLK | 58 | #define STM32_MCO2SEL STM32_MCO2SEL_SYSCLK |
| 59 | #define STM32_MCO2PRE STM32_MCO2PRE_DIV5 | 59 | #define STM32_MCO2PRE STM32_MCO2PRE_DIV5 |
| 60 | #define STM32_I2SSRC STM32_I2SSRC_PLLI2S | 60 | #define STM32_I2SSRC STM32_I2SSRC_CKIN |
| 61 | #define STM32_PLLI2SN_VALUE 192 | 61 | #define STM32_PLLI2SN_VALUE 192 |
| 62 | #define STM32_PLLI2SR_VALUE 2 | 62 | #define STM32_PLLI2SR_VALUE 5 |
| 63 | #define STM32_PVD_ENABLE FALSE | 63 | #define STM32_PVD_ENABLE FALSE |
| 64 | #define STM32_PLS STM32_PLS_LEV0 | 64 | #define STM32_PLS STM32_PLS_LEV0 |
| 65 | #define STM32_BKPRAM_ENABLE FALSE | 65 | #define STM32_BKPRAM_ENABLE FALSE |
| 66 | 66 | ||
| 67 | /* | 67 | /* |
| 68 | * IRQ system settings. | ||
| 69 | */ | ||
| 70 | #define STM32_IRQ_EXTI0_PRIORITY 6 | ||
| 71 | #define STM32_IRQ_EXTI1_PRIORITY 6 | ||
| 72 | #define STM32_IRQ_EXTI2_PRIORITY 6 | ||
| 73 | #define STM32_IRQ_EXTI3_PRIORITY 6 | ||
| 74 | #define STM32_IRQ_EXTI4_PRIORITY 6 | ||
| 75 | #define STM32_IRQ_EXTI5_9_PRIORITY 6 | ||
| 76 | #define STM32_IRQ_EXTI10_15_PRIORITY 6 | ||
| 77 | #define STM32_IRQ_EXTI16_PRIORITY 6 | ||
| 78 | #define STM32_IRQ_EXTI17_PRIORITY 15 | ||
| 79 | #define STM32_IRQ_EXTI18_PRIORITY 6 | ||
| 80 | #define STM32_IRQ_EXTI19_PRIORITY 6 | ||
| 81 | #define STM32_IRQ_EXTI20_PRIORITY 6 | ||
| 82 | #define STM32_IRQ_EXTI21_PRIORITY 15 | ||
| 83 | #define STM32_IRQ_EXTI22_PRIORITY 15 | ||
| 84 | |||
| 85 | /* | ||
| 68 | * ADC driver system settings. | 86 | * ADC driver system settings. |
| 69 | */ | 87 | */ |
| 70 | #define STM32_ADC_ADCPRE ADC_CCR_ADCPRE_DIV4 | 88 | #define STM32_ADC_ADCPRE ADC_CCR_ADCPRE_DIV4 |
| @@ -75,22 +93,6 @@ | |||
| 75 | #define STM32_ADC_ADC1_DMA_IRQ_PRIORITY 6 | 93 | #define STM32_ADC_ADC1_DMA_IRQ_PRIORITY 6 |
| 76 | 94 | ||
| 77 | /* | 95 | /* |
| 78 | * EXT driver system settings. | ||
| 79 | */ | ||
| 80 | #define STM32_EXT_EXTI0_IRQ_PRIORITY 6 | ||
| 81 | #define STM32_EXT_EXTI1_IRQ_PRIORITY 6 | ||
| 82 | #define STM32_EXT_EXTI2_IRQ_PRIORITY 6 | ||
| 83 | #define STM32_EXT_EXTI3_IRQ_PRIORITY 6 | ||
| 84 | #define STM32_EXT_EXTI4_IRQ_PRIORITY 6 | ||
| 85 | #define STM32_EXT_EXTI5_9_IRQ_PRIORITY 6 | ||
| 86 | #define STM32_EXT_EXTI10_15_IRQ_PRIORITY 6 | ||
| 87 | #define STM32_EXT_EXTI16_IRQ_PRIORITY 6 | ||
| 88 | #define STM32_EXT_EXTI17_IRQ_PRIORITY 15 | ||
| 89 | #define STM32_EXT_EXTI18_IRQ_PRIORITY 6 | ||
| 90 | #define STM32_EXT_EXTI19_IRQ_PRIORITY 6 | ||
| 91 | #define STM32_EXT_EXTI22_IRQ_PRIORITY 15 | ||
| 92 | |||
| 93 | /* | ||
| 94 | * GPT driver system settings. | 96 | * GPT driver system settings. |
| 95 | */ | 97 | */ |
| 96 | #define STM32_GPT_USE_TIM1 FALSE | 98 | #define STM32_GPT_USE_TIM1 FALSE |
| @@ -164,9 +166,9 @@ | |||
| 164 | * PWM driver system settings. | 166 | * PWM driver system settings. |
| 165 | */ | 167 | */ |
| 166 | #define STM32_PWM_USE_ADVANCED FALSE | 168 | #define STM32_PWM_USE_ADVANCED FALSE |
| 167 | #define STM32_PWM_USE_TIM1 TRUE | 169 | #define STM32_PWM_USE_TIM1 FALSE |
| 168 | #define STM32_PWM_USE_TIM2 FALSE | 170 | #define STM32_PWM_USE_TIM2 FALSE |
| 169 | #define STM32_PWM_USE_TIM3 TRUE | 171 | #define STM32_PWM_USE_TIM3 FALSE |
| 170 | #define STM32_PWM_USE_TIM4 FALSE | 172 | #define STM32_PWM_USE_TIM4 FALSE |
| 171 | #define STM32_PWM_USE_TIM5 FALSE | 173 | #define STM32_PWM_USE_TIM5 FALSE |
| 172 | #define STM32_PWM_USE_TIM9 FALSE | 174 | #define STM32_PWM_USE_TIM9 FALSE |
| @@ -182,11 +184,9 @@ | |||
| 182 | */ | 184 | */ |
| 183 | #define STM32_SERIAL_USE_USART1 FALSE | 185 | #define STM32_SERIAL_USE_USART1 FALSE |
| 184 | #define STM32_SERIAL_USE_USART2 FALSE | 186 | #define STM32_SERIAL_USE_USART2 FALSE |
| 185 | #define STM32_SERIAL_USE_USART3 FALSE | ||
| 186 | #define STM32_SERIAL_USE_USART6 FALSE | 187 | #define STM32_SERIAL_USE_USART6 FALSE |
| 187 | #define STM32_SERIAL_USART1_PRIORITY 12 | 188 | #define STM32_SERIAL_USART1_PRIORITY 12 |
| 188 | #define STM32_SERIAL_USART2_PRIORITY 12 | 189 | #define STM32_SERIAL_USART2_PRIORITY 12 |
| 189 | #define STM32_SERIAL_USART3_PRIORITY 12 | ||
| 190 | #define STM32_SERIAL_USART6_PRIORITY 12 | 190 | #define STM32_SERIAL_USART6_PRIORITY 12 |
| 191 | 191 | ||
| 192 | /* | 192 | /* |
| @@ -195,28 +195,18 @@ | |||
| 195 | #define STM32_SPI_USE_SPI1 TRUE | 195 | #define STM32_SPI_USE_SPI1 TRUE |
| 196 | #define STM32_SPI_USE_SPI2 FALSE | 196 | #define STM32_SPI_USE_SPI2 FALSE |
| 197 | #define STM32_SPI_USE_SPI3 FALSE | 197 | #define STM32_SPI_USE_SPI3 FALSE |
| 198 | #define STM32_SPI_USE_SPI4 FALSE | ||
| 199 | #define STM32_SPI_USE_SPI5 FALSE | ||
| 200 | #define STM32_SPI_SPI1_RX_DMA_STREAM STM32_DMA_STREAM_ID(2, 0) | 198 | #define STM32_SPI_SPI1_RX_DMA_STREAM STM32_DMA_STREAM_ID(2, 0) |
| 201 | #define STM32_SPI_SPI1_TX_DMA_STREAM STM32_DMA_STREAM_ID(2, 3) | 199 | #define STM32_SPI_SPI1_TX_DMA_STREAM STM32_DMA_STREAM_ID(2, 3) |
| 202 | #define STM32_SPI_SPI2_RX_DMA_STREAM STM32_DMA_STREAM_ID(1, 3) | 200 | #define STM32_SPI_SPI2_RX_DMA_STREAM STM32_DMA_STREAM_ID(1, 3) |
| 203 | #define STM32_SPI_SPI2_TX_DMA_STREAM STM32_DMA_STREAM_ID(1, 4) | 201 | #define STM32_SPI_SPI2_TX_DMA_STREAM STM32_DMA_STREAM_ID(1, 4) |
| 204 | #define STM32_SPI_SPI3_RX_DMA_STREAM STM32_DMA_STREAM_ID(1, 0) | 202 | #define STM32_SPI_SPI3_RX_DMA_STREAM STM32_DMA_STREAM_ID(1, 0) |
| 205 | #define STM32_SPI_SPI3_TX_DMA_STREAM STM32_DMA_STREAM_ID(1, 7) | 203 | #define STM32_SPI_SPI3_TX_DMA_STREAM STM32_DMA_STREAM_ID(1, 7) |
| 206 | #define STM32_SPI_SPI4_RX_DMA_STREAM STM32_DMA_STREAM_ID(2, 4) | ||
| 207 | #define STM32_SPI_SPI4_TX_DMA_STREAM STM32_DMA_STREAM_ID(2, 1) | ||
| 208 | #define STM32_SPI_SPI5_RX_DMA_STREAM STM32_DMA_STREAM_ID(2, 5) | ||
| 209 | #define STM32_SPI_SPI5_TX_DMA_STREAM STM32_DMA_STREAM_ID(2, 6) | ||
| 210 | #define STM32_SPI_SPI1_DMA_PRIORITY 1 | 204 | #define STM32_SPI_SPI1_DMA_PRIORITY 1 |
| 211 | #define STM32_SPI_SPI2_DMA_PRIORITY 1 | 205 | #define STM32_SPI_SPI2_DMA_PRIORITY 1 |
| 212 | #define STM32_SPI_SPI3_DMA_PRIORITY 1 | 206 | #define STM32_SPI_SPI3_DMA_PRIORITY 1 |
| 213 | #define STM32_SPI_SPI4_DMA_PRIORITY 1 | ||
| 214 | #define STM32_SPI_SPI5_DMA_PRIORITY 1 | ||
| 215 | #define STM32_SPI_SPI1_IRQ_PRIORITY 10 | 207 | #define STM32_SPI_SPI1_IRQ_PRIORITY 10 |
| 216 | #define STM32_SPI_SPI2_IRQ_PRIORITY 10 | 208 | #define STM32_SPI_SPI2_IRQ_PRIORITY 10 |
| 217 | #define STM32_SPI_SPI3_IRQ_PRIORITY 10 | 209 | #define STM32_SPI_SPI3_IRQ_PRIORITY 10 |
| 218 | #define STM32_SPI_SPI4_IRQ_PRIORITY 10 | ||
| 219 | #define STM32_SPI_SPI5_IRQ_PRIORITY 10 | ||
| 220 | #define STM32_SPI_DMA_ERROR_HOOK(spip) osalSysHalt("DMA failure") | 210 | #define STM32_SPI_DMA_ERROR_HOOK(spip) osalSysHalt("DMA failure") |
| 221 | 211 | ||
| 222 | /* | 212 | /* |
| @@ -230,23 +220,18 @@ | |||
| 230 | */ | 220 | */ |
| 231 | #define STM32_UART_USE_USART1 FALSE | 221 | #define STM32_UART_USE_USART1 FALSE |
| 232 | #define STM32_UART_USE_USART2 FALSE | 222 | #define STM32_UART_USE_USART2 FALSE |
| 233 | #define STM32_UART_USE_USART3 FALSE | ||
| 234 | #define STM32_UART_USE_USART6 FALSE | 223 | #define STM32_UART_USE_USART6 FALSE |
| 235 | #define STM32_UART_USART1_RX_DMA_STREAM STM32_DMA_STREAM_ID(2, 5) | 224 | #define STM32_UART_USART1_RX_DMA_STREAM STM32_DMA_STREAM_ID(2, 5) |
| 236 | #define STM32_UART_USART1_TX_DMA_STREAM STM32_DMA_STREAM_ID(2, 7) | 225 | #define STM32_UART_USART1_TX_DMA_STREAM STM32_DMA_STREAM_ID(2, 7) |
| 237 | #define STM32_UART_USART2_RX_DMA_STREAM STM32_DMA_STREAM_ID(1, 5) | 226 | #define STM32_UART_USART2_RX_DMA_STREAM STM32_DMA_STREAM_ID(1, 5) |
| 238 | #define STM32_UART_USART2_TX_DMA_STREAM STM32_DMA_STREAM_ID(1, 6) | 227 | #define STM32_UART_USART2_TX_DMA_STREAM STM32_DMA_STREAM_ID(1, 6) |
| 239 | #define STM32_UART_USART3_RX_DMA_STREAM STM32_DMA_STREAM_ID(1, 1) | ||
| 240 | #define STM32_UART_USART3_TX_DMA_STREAM STM32_DMA_STREAM_ID(1, 3) | ||
| 241 | #define STM32_UART_USART6_RX_DMA_STREAM STM32_DMA_STREAM_ID(2, 2) | 228 | #define STM32_UART_USART6_RX_DMA_STREAM STM32_DMA_STREAM_ID(2, 2) |
| 242 | #define STM32_UART_USART6_TX_DMA_STREAM STM32_DMA_STREAM_ID(2, 7) | 229 | #define STM32_UART_USART6_TX_DMA_STREAM STM32_DMA_STREAM_ID(2, 7) |
| 243 | #define STM32_UART_USART1_IRQ_PRIORITY 12 | 230 | #define STM32_UART_USART1_IRQ_PRIORITY 12 |
| 244 | #define STM32_UART_USART2_IRQ_PRIORITY 12 | 231 | #define STM32_UART_USART2_IRQ_PRIORITY 12 |
| 245 | #define STM32_UART_USART3_IRQ_PRIORITY 12 | ||
| 246 | #define STM32_UART_USART6_IRQ_PRIORITY 12 | 232 | #define STM32_UART_USART6_IRQ_PRIORITY 12 |
| 247 | #define STM32_UART_USART1_DMA_PRIORITY 0 | 233 | #define STM32_UART_USART1_DMA_PRIORITY 0 |
| 248 | #define STM32_UART_USART2_DMA_PRIORITY 0 | 234 | #define STM32_UART_USART2_DMA_PRIORITY 0 |
| 249 | #define STM32_UART_USART3_DMA_PRIORITY 0 | ||
| 250 | #define STM32_UART_USART6_DMA_PRIORITY 0 | 235 | #define STM32_UART_USART6_DMA_PRIORITY 0 |
| 251 | #define STM32_UART_DMA_ERROR_HOOK(uartp) osalSysHalt("DMA failure") | 236 | #define STM32_UART_DMA_ERROR_HOOK(uartp) osalSysHalt("DMA failure") |
| 252 | 237 | ||
