diff options
Diffstat (limited to 'keyboards/nk65/mcuconf.h')
| -rw-r--r-- | keyboards/nk65/mcuconf.h | 286 |
1 files changed, 28 insertions, 258 deletions
diff --git a/keyboards/nk65/mcuconf.h b/keyboards/nk65/mcuconf.h index ed227b796..f37f37c17 100644 --- a/keyboards/nk65/mcuconf.h +++ b/keyboards/nk65/mcuconf.h | |||
| @@ -1,273 +1,43 @@ | |||
| 1 | /* | 1 | /* Copyright 2020 QMK |
| 2 | ChibiOS - Copyright (C) 2006..2018 Giovanni Di Sirio | ||
| 3 | |||
| 4 | Licensed under the Apache License, Version 2.0 (the "License"); | ||
| 5 | you may not use this file except in compliance with the License. | ||
| 6 | You may obtain a copy of the License at | ||
| 7 | |||
| 8 | http://www.apache.org/licenses/LICENSE-2.0 | ||
| 9 | |||
| 10 | Unless required by applicable law or agreed to in writing, software | ||
| 11 | distributed under the License is distributed on an "AS IS" BASIS, | ||
| 12 | WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. | ||
| 13 | See the License for the specific language governing permissions and | ||
| 14 | limitations under the License. | ||
| 15 | */ | ||
| 16 | |||
| 17 | #ifndef MCUCONF_H | ||
| 18 | #define MCUCONF_H | ||
| 19 | |||
| 20 | /* | ||
| 21 | * STM32F3xx drivers configuration. | ||
| 22 | * The following settings override the default settings present in | ||
| 23 | * the various device driver implementation headers. | ||
| 24 | * Note that the settings for each driver only have effect if the whole | ||
| 25 | * driver is enabled in halconf.h. | ||
| 26 | * | 2 | * |
| 27 | * IRQ priorities: | 3 | * This program is free software: you can redistribute it and/or modify |
| 28 | * 15...0 Lowest...Highest. | 4 | * it under the terms of the GNU General Public License as published by |
| 5 | * the Free Software Foundation, either version 2 of the License, or | ||
| 6 | * (at your option) any later version. | ||
| 29 | * | 7 | * |
| 30 | * DMA priorities: | 8 | * This program is distributed in the hope that it will be useful, |
| 31 | * 0...3 Lowest...Highest. | 9 | * but WITHOUT ANY WARRANTY; without even the implied warranty of |
| 32 | */ | 10 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the |
| 33 | 11 | * GNU General Public License for more details. | |
| 34 | #define STM32F3xx_MCUCONF | 12 | * |
| 35 | #define STM32F303_MCUCONF | 13 | * You should have received a copy of the GNU General Public License |
| 36 | 14 | * along with this program. If not, see <http://www.gnu.org/licenses/>. | |
| 37 | /* | ||
| 38 | * HAL driver system settings. | ||
| 39 | */ | ||
| 40 | #define STM32_NO_INIT FALSE | ||
| 41 | #define STM32_PVD_ENABLE FALSE | ||
| 42 | #define STM32_PLS STM32_PLS_LEV0 | ||
| 43 | #define STM32_HSI_ENABLED TRUE | ||
| 44 | #define STM32_LSI_ENABLED TRUE | ||
| 45 | #define STM32_HSE_ENABLED TRUE | ||
| 46 | #define STM32_LSE_ENABLED FALSE | ||
| 47 | #define STM32_SW STM32_SW_PLL | ||
| 48 | #define STM32_PLLSRC STM32_PLLSRC_HSE | ||
| 49 | #define STM32_PREDIV_VALUE 1 | ||
| 50 | #define STM32_PLLMUL_VALUE 9 | ||
| 51 | #define STM32_HPRE STM32_HPRE_DIV1 | ||
| 52 | #define STM32_PPRE1 STM32_PPRE1_DIV2 | ||
| 53 | #define STM32_PPRE2 STM32_PPRE2_DIV2 | ||
| 54 | #define STM32_MCOSEL STM32_MCOSEL_NOCLOCK | ||
| 55 | #define STM32_ADC12PRES STM32_ADC12PRES_DIV1 | ||
| 56 | #define STM32_ADC34PRES STM32_ADC34PRES_DIV1 | ||
| 57 | #define STM32_USART1SW STM32_USART1SW_PCLK | ||
| 58 | #define STM32_USART2SW STM32_USART2SW_PCLK | ||
| 59 | #define STM32_USART3SW STM32_USART3SW_PCLK | ||
| 60 | #define STM32_UART4SW STM32_UART4SW_PCLK | ||
| 61 | #define STM32_UART5SW STM32_UART5SW_PCLK | ||
| 62 | #define STM32_I2C1SW STM32_I2C1SW_SYSCLK | ||
| 63 | #define STM32_I2C2SW STM32_I2C2SW_SYSCLK | ||
| 64 | #define STM32_TIM1SW STM32_TIM1SW_PCLK2 | ||
| 65 | #define STM32_TIM8SW STM32_TIM8SW_PCLK2 | ||
| 66 | #define STM32_RTCSEL STM32_RTCSEL_LSI | ||
| 67 | #define STM32_USB_CLOCK_REQUIRED TRUE | ||
| 68 | #define STM32_USBPRE STM32_USBPRE_DIV1P5 | ||
| 69 | |||
| 70 | /* | ||
| 71 | * IRQ system settings. | ||
| 72 | */ | ||
| 73 | #define STM32_IRQ_EXTI0_PRIORITY 6 | ||
| 74 | #define STM32_IRQ_EXTI1_PRIORITY 6 | ||
| 75 | #define STM32_IRQ_EXTI2_PRIORITY 6 | ||
| 76 | #define STM32_IRQ_EXTI3_PRIORITY 6 | ||
| 77 | #define STM32_IRQ_EXTI4_PRIORITY 6 | ||
| 78 | #define STM32_IRQ_EXTI5_9_PRIORITY 6 | ||
| 79 | #define STM32_IRQ_EXTI10_15_PRIORITY 6 | ||
| 80 | #define STM32_IRQ_EXTI16_PRIORITY 6 | ||
| 81 | #define STM32_IRQ_EXTI17_PRIORITY 15 | ||
| 82 | #define STM32_IRQ_EXTI18_PRIORITY 6 | ||
| 83 | #define STM32_IRQ_EXTI19_PRIORITY 15 | ||
| 84 | #define STM32_IRQ_EXTI20_PRIORITY 15 | ||
| 85 | #define STM32_IRQ_EXTI21_22_29_PRIORITY 6 | ||
| 86 | #define STM32_IRQ_EXTI30_32_PRIORITY 6 | ||
| 87 | #define STM32_IRQ_EXTI33_PRIORITY 6 | ||
| 88 | #define STM32_IRQ_TIM1_BRK_TIM15_PRIORITY 7 | ||
| 89 | #define STM32_IRQ_TIM1_UP_TIM16_PRIORITY 7 | ||
| 90 | #define STM32_IRQ_TIM1_TRGCO_TIM17_PRIORITY 7 | ||
| 91 | #define STM32_IRQ_TIM1_CC_PRIORITY 7 | ||
| 92 | |||
| 93 | /* | ||
| 94 | * ADC driver system settings. | ||
| 95 | */ | ||
| 96 | #define STM32_ADC_DUAL_MODE FALSE | ||
| 97 | #define STM32_ADC_COMPACT_SAMPLES FALSE | ||
| 98 | #define STM32_ADC_USE_ADC1 FALSE | ||
| 99 | #define STM32_ADC_USE_ADC2 FALSE | ||
| 100 | #define STM32_ADC_USE_ADC3 FALSE | ||
| 101 | #define STM32_ADC_USE_ADC4 FALSE | ||
| 102 | #define STM32_ADC_ADC1_DMA_STREAM STM32_DMA_STREAM_ID(1, 1) | ||
| 103 | #define STM32_ADC_ADC2_DMA_STREAM STM32_DMA_STREAM_ID(2, 1) | ||
| 104 | #define STM32_ADC_ADC3_DMA_STREAM STM32_DMA_STREAM_ID(2, 5) | ||
| 105 | #define STM32_ADC_ADC4_DMA_STREAM STM32_DMA_STREAM_ID(2, 2) | ||
| 106 | #define STM32_ADC_ADC1_DMA_PRIORITY 2 | ||
| 107 | #define STM32_ADC_ADC2_DMA_PRIORITY 2 | ||
| 108 | #define STM32_ADC_ADC3_DMA_PRIORITY 2 | ||
| 109 | #define STM32_ADC_ADC4_DMA_PRIORITY 2 | ||
| 110 | #define STM32_ADC_ADC12_IRQ_PRIORITY 5 | ||
| 111 | #define STM32_ADC_ADC3_IRQ_PRIORITY 5 | ||
| 112 | #define STM32_ADC_ADC4_IRQ_PRIORITY 5 | ||
| 113 | #define STM32_ADC_ADC1_DMA_IRQ_PRIORITY 5 | ||
| 114 | #define STM32_ADC_ADC2_DMA_IRQ_PRIORITY 5 | ||
| 115 | #define STM32_ADC_ADC3_DMA_IRQ_PRIORITY 5 | ||
| 116 | #define STM32_ADC_ADC4_DMA_IRQ_PRIORITY 5 | ||
| 117 | #define STM32_ADC_ADC12_CLOCK_MODE ADC_CCR_CKMODE_AHB_DIV1 | ||
| 118 | #define STM32_ADC_ADC34_CLOCK_MODE ADC_CCR_CKMODE_AHB_DIV1 | ||
| 119 | |||
| 120 | /* | ||
| 121 | * CAN driver system settings. | ||
| 122 | */ | ||
| 123 | #define STM32_CAN_USE_CAN1 FALSE | ||
| 124 | #define STM32_CAN_CAN1_IRQ_PRIORITY 11 | ||
| 125 | |||
| 126 | /* | ||
| 127 | * DAC driver system settings. | ||
| 128 | */ | 15 | */ |
| 129 | #define STM32_DAC_DUAL_MODE FALSE | ||
| 130 | #define STM32_DAC_USE_DAC1_CH1 TRUE | ||
| 131 | #define STM32_DAC_USE_DAC1_CH2 TRUE | ||
| 132 | #define STM32_DAC_DAC1_CH1_IRQ_PRIORITY 10 | ||
| 133 | #define STM32_DAC_DAC1_CH2_IRQ_PRIORITY 10 | ||
| 134 | #define STM32_DAC_DAC1_CH1_DMA_PRIORITY 2 | ||
| 135 | #define STM32_DAC_DAC1_CH2_DMA_PRIORITY 2 | ||
| 136 | 16 | ||
| 137 | /* | 17 | /* |
| 138 | * GPT driver system settings. | 18 | * This file was auto-generated by: |
| 19 | * `qmk chibios-confmigrate -i keyboards/nk65/mcuconf.h -r platforms/chibios/QMK_PROTON_C/configs/mcuconf.h` | ||
| 139 | */ | 20 | */ |
| 140 | #define STM32_GPT_USE_TIM1 FALSE | ||
| 141 | #define STM32_GPT_USE_TIM2 FALSE | ||
| 142 | #define STM32_GPT_USE_TIM3 FALSE | ||
| 143 | #define STM32_GPT_USE_TIM4 TRUE | ||
| 144 | #define STM32_GPT_USE_TIM6 TRUE | ||
| 145 | #define STM32_GPT_USE_TIM7 TRUE | ||
| 146 | #define STM32_GPT_USE_TIM8 TRUE | ||
| 147 | #define STM32_GPT_USE_TIM15 FALSE | ||
| 148 | #define STM32_GPT_USE_TIM16 FALSE | ||
| 149 | #define STM32_GPT_USE_TIM17 FALSE | ||
| 150 | #define STM32_GPT_TIM1_IRQ_PRIORITY 7 | ||
| 151 | #define STM32_GPT_TIM2_IRQ_PRIORITY 7 | ||
| 152 | #define STM32_GPT_TIM3_IRQ_PRIORITY 7 | ||
| 153 | #define STM32_GPT_TIM4_IRQ_PRIORITY 7 | ||
| 154 | #define STM32_GPT_TIM6_IRQ_PRIORITY 7 | ||
| 155 | #define STM32_GPT_TIM7_IRQ_PRIORITY 7 | ||
| 156 | #define STM32_GPT_TIM8_IRQ_PRIORITY 7 | ||
| 157 | 21 | ||
| 158 | /* | 22 | #pragma once |
| 159 | * I2C driver system settings. | ||
| 160 | */ | ||
| 161 | #define STM32_I2C_USE_I2C1 TRUE | ||
| 162 | #define STM32_I2C_USE_I2C2 FALSE | ||
| 163 | #define STM32_I2C_BUSY_TIMEOUT 50 | ||
| 164 | #define STM32_I2C_I2C1_IRQ_PRIORITY 10 | ||
| 165 | #define STM32_I2C_I2C2_IRQ_PRIORITY 10 | ||
| 166 | #define STM32_I2C_USE_DMA TRUE | ||
| 167 | #define STM32_I2C_I2C1_DMA_PRIORITY 1 | ||
| 168 | #define STM32_I2C_I2C2_DMA_PRIORITY 1 | ||
| 169 | #define STM32_I2C_DMA_ERROR_HOOK(i2cp) osalSysHalt("DMA failure") | ||
| 170 | 23 | ||
| 171 | /* | 24 | #include_next <mcuconf.h> |
| 172 | * ICU driver system settings. | ||
| 173 | */ | ||
| 174 | #define STM32_ICU_USE_TIM1 FALSE | ||
| 175 | #define STM32_ICU_USE_TIM2 FALSE | ||
| 176 | #define STM32_ICU_USE_TIM3 FALSE | ||
| 177 | #define STM32_ICU_USE_TIM4 FALSE | ||
| 178 | #define STM32_ICU_USE_TIM8 FALSE | ||
| 179 | #define STM32_ICU_USE_TIM15 FALSE | ||
| 180 | #define STM32_ICU_TIM1_IRQ_PRIORITY 7 | ||
| 181 | #define STM32_ICU_TIM2_IRQ_PRIORITY 7 | ||
| 182 | #define STM32_ICU_TIM3_IRQ_PRIORITY 7 | ||
| 183 | #define STM32_ICU_TIM4_IRQ_PRIORITY 7 | ||
| 184 | #define STM32_ICU_TIM8_IRQ_PRIORITY 7 | ||
| 185 | 25 | ||
| 186 | /* | 26 | #undef STM32_GPT_USE_TIM4 |
| 187 | * PWM driver system settings. | 27 | #define STM32_GPT_USE_TIM4 TRUE |
| 188 | */ | ||
| 189 | #define STM32_PWM_USE_ADVANCED FALSE | ||
| 190 | #define STM32_PWM_USE_TIM1 FALSE | ||
| 191 | #define STM32_PWM_USE_TIM2 FALSE | ||
| 192 | #define STM32_PWM_USE_TIM3 FALSE | ||
| 193 | #define STM32_PWM_USE_TIM4 FALSE | ||
| 194 | #define STM32_PWM_USE_TIM8 FALSE | ||
| 195 | #define STM32_PWM_USE_TIM15 FALSE | ||
| 196 | #define STM32_PWM_USE_TIM16 FALSE | ||
| 197 | #define STM32_PWM_USE_TIM17 FALSE | ||
| 198 | #define STM32_PWM_TIM1_IRQ_PRIORITY 7 | ||
| 199 | #define STM32_PWM_TIM2_IRQ_PRIORITY 7 | ||
| 200 | #define STM32_PWM_TIM3_IRQ_PRIORITY 7 | ||
| 201 | #define STM32_PWM_TIM4_IRQ_PRIORITY 7 | ||
| 202 | #define STM32_PWM_TIM8_IRQ_PRIORITY 7 | ||
| 203 | 28 | ||
| 204 | /* | 29 | #undef STM32_GPT_USE_TIM15 |
| 205 | * RTC driver system settings. | 30 | #define STM32_GPT_USE_TIM15 FALSE |
| 206 | */ | ||
| 207 | #define STM32_RTC_PRESA_VALUE 32 | ||
| 208 | #define STM32_RTC_PRESS_VALUE 1024 | ||
| 209 | #define STM32_RTC_CR_INIT 0 | ||
| 210 | #define STM32_RTC_TAMPCR_INIT 0 | ||
| 211 | 31 | ||
| 212 | /* | 32 | #undef STM32_PWM_USE_TIM3 |
| 213 | * SERIAL driver system settings. | 33 | #define STM32_PWM_USE_TIM3 FALSE |
| 214 | */ | ||
| 215 | #define STM32_SERIAL_USE_USART1 FALSE | ||
| 216 | #define STM32_SERIAL_USE_USART2 FALSE | ||
| 217 | #define STM32_SERIAL_USE_USART3 FALSE | ||
| 218 | #define STM32_SERIAL_USE_UART4 FALSE | ||
| 219 | #define STM32_SERIAL_USE_UART5 FALSE | ||
| 220 | #define STM32_SERIAL_USART1_PRIORITY 12 | ||
| 221 | #define STM32_SERIAL_USART2_PRIORITY 12 | ||
| 222 | #define STM32_SERIAL_USART3_PRIORITY 12 | ||
| 223 | #define STM32_SERIAL_UART4_PRIORITY 12 | ||
| 224 | #define STM32_SERIAL_UART5_PRIORITY 12 | ||
| 225 | 34 | ||
| 226 | /* | 35 | #undef STM32_PWM_USE_TIM4 |
| 227 | * SPI driver system settings. | 36 | #define STM32_PWM_USE_TIM4 FALSE |
| 228 | */ | ||
| 229 | #define STM32_SPI_USE_SPI1 FALSE | ||
| 230 | #define STM32_SPI_USE_SPI2 FALSE | ||
| 231 | #define STM32_SPI_USE_SPI3 FALSE | ||
| 232 | #define STM32_SPI_SPI1_DMA_PRIORITY 1 | ||
| 233 | #define STM32_SPI_SPI2_DMA_PRIORITY 1 | ||
| 234 | #define STM32_SPI_SPI3_DMA_PRIORITY 1 | ||
| 235 | #define STM32_SPI_SPI1_IRQ_PRIORITY 10 | ||
| 236 | #define STM32_SPI_SPI2_IRQ_PRIORITY 10 | ||
| 237 | #define STM32_SPI_SPI3_IRQ_PRIORITY 10 | ||
| 238 | #define STM32_SPI_DMA_ERROR_HOOK(spip) osalSysHalt("DMA failure") | ||
| 239 | |||
| 240 | /* | ||
| 241 | * ST driver system settings. | ||
| 242 | */ | ||
| 243 | #define STM32_ST_IRQ_PRIORITY 8 | ||
| 244 | #define STM32_ST_USE_TIMER 2 | ||
| 245 | 37 | ||
| 246 | /* | 38 | #undef STM32_SERIAL_USE_USART2 |
| 247 | * UART driver system settings. | 39 | #define STM32_SERIAL_USE_USART2 FALSE |
| 248 | */ | ||
| 249 | #define STM32_UART_USE_USART1 FALSE | ||
| 250 | #define STM32_UART_USE_USART2 FALSE | ||
| 251 | #define STM32_UART_USE_USART3 FALSE | ||
| 252 | #define STM32_UART_USART1_IRQ_PRIORITY 12 | ||
| 253 | #define STM32_UART_USART2_IRQ_PRIORITY 12 | ||
| 254 | #define STM32_UART_USART3_IRQ_PRIORITY 12 | ||
| 255 | #define STM32_UART_USART1_DMA_PRIORITY 0 | ||
| 256 | #define STM32_UART_USART2_DMA_PRIORITY 0 | ||
| 257 | #define STM32_UART_USART3_DMA_PRIORITY 0 | ||
| 258 | #define STM32_UART_DMA_ERROR_HOOK(uartp) osalSysHalt("DMA failure") | ||
| 259 | 40 | ||
| 260 | /* | 41 | #undef STM32_SPI_USE_SPI2 |
| 261 | * USB driver system settings. | 42 | #define STM32_SPI_USE_SPI2 FALSE |
| 262 | */ | ||
| 263 | #define STM32_USB_USE_USB1 TRUE | ||
| 264 | #define STM32_USB_LOW_POWER_ON_SUSPEND FALSE | ||
| 265 | #define STM32_USB_USB1_HP_IRQ_PRIORITY 13 | ||
| 266 | #define STM32_USB_USB1_LP_IRQ_PRIORITY 14 | ||
| 267 | |||
| 268 | /* | ||
| 269 | * WDG driver system settings. | ||
| 270 | */ | ||
| 271 | #define STM32_WDG_USE_IWDG FALSE | ||
| 272 | 43 | ||
| 273 | #endif /* MCUCONF_H */ | ||
