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-rw-r--r--keyboards/1upkeyboards/sweet16/v1/rules.mk16
-rw-r--r--keyboards/1upkeyboards/sweet16/v2/promicro/rules.mk13
-rw-r--r--keyboards/1upkeyboards/sweet16/v2/proton_c/rules.mk1
-rw-r--r--keyboards/boston_meetup/2019/rules.mk6
-rwxr-xr-xkeyboards/ckeys/thedora/rules.mk1
-rw-r--r--keyboards/clueboard/60/rules.mk44
-rw-r--r--keyboards/clueboard/66/rev4/rules.mk20
-rw-r--r--keyboards/clueboard/66_hotswap/gen1/rules.mk46
-rw-r--r--keyboards/clueboard/california/rules.mk1
-rw-r--r--keyboards/dztech/dz60rgb/rules.mk8
-rw-r--r--keyboards/dztech/dz60rgb_ansi/rules.mk8
-rw-r--r--keyboards/dztech/dz65rgb/rules.mk6
-rw-r--r--keyboards/hadron/rules.mk1
-rw-r--r--keyboards/hadron/ver3/boards/GENERIC_STM32_F303XC/board.c126
-rw-r--r--keyboards/hadron/ver3/boards/GENERIC_STM32_F303XC/board.h1187
-rw-r--r--keyboards/hadron/ver3/boards/GENERIC_STM32_F303XC/board.mk5
-rw-r--r--keyboards/hadron/ver3/bootloader_defs.h7
-rw-r--r--keyboards/hadron/ver3/rules.mk4
-rw-r--r--keyboards/handwired/co60/rev6/rules.mk39
-rw-r--r--keyboards/handwired/co60/rev7/rules.mk39
-rw-r--r--keyboards/handwired/steamvan/rev1/rules.mk39
-rw-r--r--keyboards/handwired/wulkan/rules.mk1
-rw-r--r--keyboards/hs60/v2/boards/GENERIC_STM32_F303XC/board.c126
-rw-r--r--keyboards/hs60/v2/boards/GENERIC_STM32_F303XC/board.h1187
-rw-r--r--keyboards/hs60/v2/boards/GENERIC_STM32_F303XC/board.mk5
-rw-r--r--keyboards/hs60/v2/bootloader_defs.h7
-rw-r--r--keyboards/hs60/v2/rules.mk52
-rw-r--r--keyboards/kbdfans/kbd67/mkiirgb/rules.mk8
-rwxr-xr-xkeyboards/nk65/boards/GENERIC_STM32_F303XC/board.c126
-rwxr-xr-xkeyboards/nk65/boards/GENERIC_STM32_F303XC/board.h1187
-rwxr-xr-xkeyboards/nk65/boards/GENERIC_STM32_F303XC/board.mk5
-rwxr-xr-xkeyboards/nk65/bootloader_defs.h7
-rwxr-xr-xkeyboards/nk65/rules.mk52
-rw-r--r--keyboards/planck/ez/rules.mk4
-rw-r--r--keyboards/planck/rev6/rules.mk7
-rw-r--r--keyboards/preonic/rev3/rules.mk4
36 files changed, 94 insertions, 4301 deletions
diff --git a/keyboards/1upkeyboards/sweet16/v1/rules.mk b/keyboards/1upkeyboards/sweet16/v1/rules.mk
index 0defba1f1..09bd9e9e2 100644
--- a/keyboards/1upkeyboards/sweet16/v1/rules.mk
+++ b/keyboards/1upkeyboards/sweet16/v1/rules.mk
@@ -1,5 +1,17 @@
1# MCU name
1MCU = atmega32u4 2MCU = atmega32u4
3
4# Bootloader selection
5# Teensy halfkay
6# Pro Micro caterina
7# Atmel DFU atmel-dfu
8# LUFA DFU lufa-dfu
9# QMK DFU qmk-dfu
10# ATmega32A bootloadHID
11# ATmega328P USBasp
2BOOTLOADER = caterina 12BOOTLOADER = caterina
3LINK_TIME_OPTIMIZATION_ENABLE=yes 13
4RGBLIGHT_ENABLE = yes 14RGBLIGHT_ENABLE = yes
5BACKLIGHT_ENABLE = no # Enable keyboard backlight functionality 15BACKLIGHT_ENABLE = no # Enable keyboard backlight functionality
16
17LINK_TIME_OPTIMIZATION_ENABLE = yes
diff --git a/keyboards/1upkeyboards/sweet16/v2/promicro/rules.mk b/keyboards/1upkeyboards/sweet16/v2/promicro/rules.mk
index 4b08a7e6b..9f38504a8 100644
--- a/keyboards/1upkeyboards/sweet16/v2/promicro/rules.mk
+++ b/keyboards/1upkeyboards/sweet16/v2/promicro/rules.mk
@@ -1,6 +1,15 @@
1# MCU name
1MCU = atmega32u4 2MCU = atmega32u4
3
4# Bootloader selection
5# Teensy halfkay
6# Pro Micro caterina
7# Atmel DFU atmel-dfu
8# LUFA DFU lufa-dfu
9# QMK DFU qmk-dfu
10# ATmega32A bootloadHID
11# ATmega328P USBasp
2BOOTLOADER = caterina 12BOOTLOADER = caterina
3LINK_TIME_OPTIMIZATION_ENABLE=yes
4 13
5## Features 14## Features
6CONSOLE_ENABLE = yes 15CONSOLE_ENABLE = yes
@@ -8,3 +17,5 @@ CONSOLE_ENABLE = yes
8## On a Pro Micro you have to choose between underglow and the rotary encoder. 17## On a Pro Micro you have to choose between underglow and the rotary encoder.
9RGBLIGHT_ENABLE = no 18RGBLIGHT_ENABLE = no
10ENCODER_ENABLE = yes 19ENCODER_ENABLE = yes
20
21LINK_TIME_OPTIMIZATION_ENABLE = yes
diff --git a/keyboards/1upkeyboards/sweet16/v2/proton_c/rules.mk b/keyboards/1upkeyboards/sweet16/v2/proton_c/rules.mk
index 3bfa1623f..dedcf043a 100644
--- a/keyboards/1upkeyboards/sweet16/v2/proton_c/rules.mk
+++ b/keyboards/1upkeyboards/sweet16/v2/proton_c/rules.mk
@@ -1,3 +1,4 @@
1# MCU name
1MCU = STM32F303 2MCU = STM32F303
2 3
3## Features 4## Features
diff --git a/keyboards/boston_meetup/2019/rules.mk b/keyboards/boston_meetup/2019/rules.mk
index 7c03a025e..73f9008f0 100644
--- a/keyboards/boston_meetup/2019/rules.mk
+++ b/keyboards/boston_meetup/2019/rules.mk
@@ -1,7 +1,5 @@
1# project specific files 1# MCU name
2 2MCU = STM32F303
3# Cortex version
4MCU = STM32F303
5 3
6# Build Options 4# Build Options
7# comment out to disable the options. 5# comment out to disable the options.
diff --git a/keyboards/ckeys/thedora/rules.mk b/keyboards/ckeys/thedora/rules.mk
index 11adbdacd..92665ffb6 100755
--- a/keyboards/ckeys/thedora/rules.mk
+++ b/keyboards/ckeys/thedora/rules.mk
@@ -1,3 +1,4 @@
1# MCU name
1MCU = STM32F303 2MCU = STM32F303
2 3
3# Build Options 4# Build Options
diff --git a/keyboards/clueboard/60/rules.mk b/keyboards/clueboard/60/rules.mk
index a0927025b..a9151b87d 100644
--- a/keyboards/clueboard/60/rules.mk
+++ b/keyboards/clueboard/60/rules.mk
@@ -1,41 +1,5 @@
1# project specific files 1# MCU name
2SRC = led.c 2MCU = STM32F303
3LAYOUTS += 60_ansi 60_ansi_split_bs_rshift 60_iso
4
5## chip/board settings
6# - the next two should match the directories in
7# <chibios>/os/hal/ports/$(MCU_FAMILY)/$(MCU_SERIES)
8MCU_FAMILY = STM32
9MCU_SERIES = STM32F3xx
10
11# Linker script to use
12# - it should exist either in <chibios>/os/common/ports/ARMCMx/compilers/GCC/ld/
13# or <this_dir>/ld/
14MCU_LDSCRIPT = STM32F303xC
15
16# Startup code to use
17# - it should exist in <chibios>/os/common/startup/ARMCMx/compilers/GCC/mk/
18MCU_STARTUP = stm32f3xx
19
20# Board: it should exist either in <chibios>/os/hal/boards/
21# or <this_dir>/boards
22BOARD = GENERIC_STM32_F303XC
23
24# Cortex version
25MCU = cortex-m4
26
27# ARM version, CORTEX-M0/M1 are 6, CORTEX-M3/M4/M7 are 7
28ARMV = 7
29
30USE_FPU = yes
31
32# Vector table for application
33# 0x00000000-0x00001000 area is occupied by bootlaoder.*/
34OPT_DEFS =
35
36# Options to pass to dfu-util when flashing
37DFU_ARGS = -d 0483:df11 -a 0 -s 0x08000000:leave
38DFU_SUFFIX_ARGS = -p DF11 -v 0483
39 3
40# Build Options 4# Build Options
41# comment out to disable the options. 5# comment out to disable the options.
@@ -48,3 +12,7 @@ CONSOLE_ENABLE = yes # Console for debug
48COMMAND_ENABLE = no # Commands for debug and configuration 12COMMAND_ENABLE = no # Commands for debug and configuration
49NKRO_ENABLE = yes # USB Nkey Rollover 13NKRO_ENABLE = yes # USB Nkey Rollover
50AUDIO_ENABLE = yes 14AUDIO_ENABLE = yes
15
16# project specific files
17SRC = led.c
18LAYOUTS += 60_ansi 60_ansi_split_bs_rshift 60_iso
diff --git a/keyboards/clueboard/66/rev4/rules.mk b/keyboards/clueboard/66/rev4/rules.mk
index 4d20ff2e9..ef7989aa0 100644
--- a/keyboards/clueboard/66/rev4/rules.mk
+++ b/keyboards/clueboard/66/rev4/rules.mk
@@ -1,19 +1,5 @@
1LAYOUTS = 66_ansi 66_iso 1# MCU name
2 2MCU = STM32F303
3## chip/board settings
4MCU_FAMILY = STM32
5MCU_SERIES = STM32F3xx
6MCU_LDSCRIPT = STM32F303xC
7MCU_STARTUP = stm32f3xx
8BOARD = GENERIC_STM32_F303XC
9MCU = cortex-m4
10ARMV = 7
11USE_FPU = yes
12OPT_DEFS =
13
14# Options to pass to dfu-util when flashing
15DFU_ARGS = -d 0483:df11 -a 0 -s 0x08000000:leave
16DFU_SUFFIX_ARGS = -p DF11 -v 0483
17 3
18# Build Options 4# Build Options
19# comment out to disable the options. 5# comment out to disable the options.
@@ -31,3 +17,5 @@ MIDI_ENABLE = no # MIDI controls
31UNICODE_ENABLE = no # Unicode 17UNICODE_ENABLE = no # Unicode
32BLUETOOTH_ENABLE = no # Enable Bluetooth with the Adafruit EZ-Key HID 18BLUETOOTH_ENABLE = no # Enable Bluetooth with the Adafruit EZ-Key HID
33AUDIO_ENABLE = yes 19AUDIO_ENABLE = yes
20
21LAYOUTS = 66_ansi 66_iso
diff --git a/keyboards/clueboard/66_hotswap/gen1/rules.mk b/keyboards/clueboard/66_hotswap/gen1/rules.mk
index 326912a34..50f140def 100644
--- a/keyboards/clueboard/66_hotswap/gen1/rules.mk
+++ b/keyboards/clueboard/66_hotswap/gen1/rules.mk
@@ -1,43 +1,5 @@
1# project specific files 1# MCU name
2SRC = led.c 2MCU = STM32F303
3LAYOUTS += 66_ansi
4
5## chip/board settings
6# - the next two should match the directories in
7# <chibios>/os/hal/ports/$(MCU_FAMILY)/$(MCU_SERIES)
8MCU_FAMILY = STM32
9MCU_SERIES = STM32F3xx
10
11# Linker script to use
12# - it should exist either in <chibios>/os/common/ports/ARMCMx/compilers/GCC/ld/
13# or <this_dir>/ld/
14MCU_LDSCRIPT = STM32F303xC
15
16# Startup code to use
17# - it should exist in <chibios>/os/common/startup/ARMCMx/compilers/GCC/mk/
18MCU_STARTUP = stm32f3xx
19
20# Board: it should exist either in <chibios>/os/hal/boards/
21# or <this_dir>/boards
22BOARD = GENERIC_STM32_F303XC
23
24# Cortex version
25MCU = cortex-m4
26
27# ARM version, CORTEX-M0/M1 are 6, CORTEX-M3/M4/M7 are 7
28ARMV = 7
29
30USE_FPU = yes
31
32# Vector table for application
33# 0x00000000-0x00001000 area is occupied by bootlaoder.*/
34# The CORTEX_VTOR... is needed only for MCHCK/Infinity KB
35# OPT_DEFS = -DCORTEX_VTOR_INIT=0x08005000
36OPT_DEFS =
37
38# Options to pass to dfu-util when flashing
39DFU_ARGS = -d 0483:df11 -a 0 -s 0x08000000:leave
40DFU_SUFFIX_ARGS = -p DF11 -v 0483
41 3
42# LED Configuration 4# LED Configuration
43LED_MATRIX_ENABLE = IS31FL3731 5LED_MATRIX_ENABLE = IS31FL3731
@@ -57,3 +19,7 @@ NKRO_ENABLE = yes # USB Nkey Rollover
57#CUSTOM_MATRIX = yes # Custom matrix file 19#CUSTOM_MATRIX = yes # Custom matrix file
58AUDIO_ENABLE = yes 20AUDIO_ENABLE = yes
59# SERIAL_LINK_ENABLE = yes 21# SERIAL_LINK_ENABLE = yes
22
23# project specific files
24SRC = led.c
25LAYOUTS += 66_ansi
diff --git a/keyboards/clueboard/california/rules.mk b/keyboards/clueboard/california/rules.mk
index e9362ffb7..e96afd813 100644
--- a/keyboards/clueboard/california/rules.mk
+++ b/keyboards/clueboard/california/rules.mk
@@ -1,3 +1,4 @@
1# MCU name
1MCU = STM32F303 2MCU = STM32F303
2 3
3## Features 4## Features
diff --git a/keyboards/dztech/dz60rgb/rules.mk b/keyboards/dztech/dz60rgb/rules.mk
index ed30bec8b..f381ca585 100644
--- a/keyboards/dztech/dz60rgb/rules.mk
+++ b/keyboards/dztech/dz60rgb/rules.mk
@@ -1,6 +1,6 @@
1MCU = STM32F303 1# MCU name
2DFU_ARGS = -d 0483:df11 -a 0 -s 0x08000000:leave 2MCU = STM32F303
3DFU_SUFFIX_ARGS = -p DF11 -v 0483 3
4BACKLIGHT_ENABLE = no 4BACKLIGHT_ENABLE = no
5BOOTMAGIC_ENABLE = lite # Virtual DIP switch configuration 5BOOTMAGIC_ENABLE = lite # Virtual DIP switch configuration
6MOUSEKEY_ENABLE = yes # Mouse keys 6MOUSEKEY_ENABLE = yes # Mouse keys
@@ -11,4 +11,4 @@ COMMAND_ENABLE = no # Commands for debug and configuration
11NKRO_ENABLE = no # USB Nkey Rollover 11NKRO_ENABLE = no # USB Nkey Rollover
12AUDIO_ENABLE = no 12AUDIO_ENABLE = no
13RGB_MATRIX_ENABLE = IS31FL3733 # Use RGB matrix 13RGB_MATRIX_ENABLE = IS31FL3733 # Use RGB matrix
14NO_USB_STARTUP_CHECK = no # Disable initialization only when usb is plugged in \ No newline at end of file 14NO_USB_STARTUP_CHECK = no # Disable initialization only when usb is plugged in
diff --git a/keyboards/dztech/dz60rgb_ansi/rules.mk b/keyboards/dztech/dz60rgb_ansi/rules.mk
index 006541504..063615052 100644
--- a/keyboards/dztech/dz60rgb_ansi/rules.mk
+++ b/keyboards/dztech/dz60rgb_ansi/rules.mk
@@ -1,6 +1,6 @@
1MCU = STM32F303 1# MCU name
2DFU_ARGS = -d 0483:df11 -a 0 -s 0x08000000:leave 2MCU = STM32F303
3DFU_SUFFIX_ARGS = -p DF11 -v 0483 3
4BACKLIGHT_ENABLE = no 4BACKLIGHT_ENABLE = no
5BOOTMAGIC_ENABLE = lite # Virtual DIP switch configuration 5BOOTMAGIC_ENABLE = lite # Virtual DIP switch configuration
6MOUSEKEY_ENABLE = yes # Mouse keys 6MOUSEKEY_ENABLE = yes # Mouse keys
@@ -13,4 +13,4 @@ AUDIO_ENABLE = no
13RGB_MATRIX_ENABLE = IS31FL3733 # Use RGB matrix 13RGB_MATRIX_ENABLE = IS31FL3733 # Use RGB matrix
14NO_USB_STARTUP_CHECK = no # Disable initialization only when usb is plugged in 14NO_USB_STARTUP_CHECK = no # Disable initialization only when usb is plugged in
15 15
16LAYOUTS = 60_ansi \ No newline at end of file 16LAYOUTS = 60_ansi
diff --git a/keyboards/dztech/dz65rgb/rules.mk b/keyboards/dztech/dz65rgb/rules.mk
index bf392b4fa..6e80abf47 100644
--- a/keyboards/dztech/dz65rgb/rules.mk
+++ b/keyboards/dztech/dz65rgb/rules.mk
@@ -1,6 +1,6 @@
1MCU = STM32F303 1# MCU name
2DFU_ARGS = -d 0483:df11 -a 0 -s 0x08000000:leave 2MCU = STM32F303
3DFU_SUFFIX_ARGS = -p DF11 -v 0483 3
4BACKLIGHT_ENABLE = no 4BACKLIGHT_ENABLE = no
5BOOTMAGIC_ENABLE = lite # Virtual DIP switch configuration 5BOOTMAGIC_ENABLE = lite # Virtual DIP switch configuration
6MOUSEKEY_ENABLE = yes # Mouse keys 6MOUSEKEY_ENABLE = yes # Mouse keys
diff --git a/keyboards/hadron/rules.mk b/keyboards/hadron/rules.mk
index bd1633f61..849867575 100644
--- a/keyboards/hadron/rules.mk
+++ b/keyboards/hadron/rules.mk
@@ -1,2 +1 @@
1
2DEFAULT_FOLDER = hadron/ver2 DEFAULT_FOLDER = hadron/ver2
diff --git a/keyboards/hadron/ver3/boards/GENERIC_STM32_F303XC/board.c b/keyboards/hadron/ver3/boards/GENERIC_STM32_F303XC/board.c
deleted file mode 100644
index 4331155df..000000000
--- a/keyboards/hadron/ver3/boards/GENERIC_STM32_F303XC/board.c
+++ /dev/null
@@ -1,126 +0,0 @@
1/*
2 ChibiOS - Copyright (C) 2006..2016 Giovanni Di Sirio
3
4 Licensed under the Apache License, Version 2.0 (the "License");
5 you may not use this file except in compliance with the License.
6 You may obtain a copy of the License at
7
8 http://www.apache.org/licenses/LICENSE-2.0
9
10 Unless required by applicable law or agreed to in writing, software
11 distributed under the License is distributed on an "AS IS" BASIS,
12 WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
13 See the License for the specific language governing permissions and
14 limitations under the License.
15*/
16
17#include "hal.h"
18
19#if HAL_USE_PAL || defined(__DOXYGEN__)
20/**
21 * @brief PAL setup.
22 * @details Digital I/O ports static configuration as defined in @p board.h.
23 * This variable is used by the HAL when initializing the PAL driver.
24 */
25const PALConfig pal_default_config = {
26#if STM32_HAS_GPIOA
27 {VAL_GPIOA_MODER, VAL_GPIOA_OTYPER, VAL_GPIOA_OSPEEDR, VAL_GPIOA_PUPDR,
28 VAL_GPIOA_ODR, VAL_GPIOA_AFRL, VAL_GPIOA_AFRH},
29#endif
30#if STM32_HAS_GPIOB
31 {VAL_GPIOB_MODER, VAL_GPIOB_OTYPER, VAL_GPIOB_OSPEEDR, VAL_GPIOB_PUPDR,
32 VAL_GPIOB_ODR, VAL_GPIOB_AFRL, VAL_GPIOB_AFRH},
33#endif
34#if STM32_HAS_GPIOC
35 {VAL_GPIOC_MODER, VAL_GPIOC_OTYPER, VAL_GPIOC_OSPEEDR, VAL_GPIOC_PUPDR,
36 VAL_GPIOC_ODR, VAL_GPIOC_AFRL, VAL_GPIOC_AFRH},
37#endif
38#if STM32_HAS_GPIOD
39 {VAL_GPIOD_MODER, VAL_GPIOD_OTYPER, VAL_GPIOD_OSPEEDR, VAL_GPIOD_PUPDR,
40 VAL_GPIOD_ODR, VAL_GPIOD_AFRL, VAL_GPIOD_AFRH},
41#endif
42#if STM32_HAS_GPIOE
43 {VAL_GPIOE_MODER, VAL_GPIOE_OTYPER, VAL_GPIOE_OSPEEDR, VAL_GPIOE_PUPDR,
44 VAL_GPIOE_ODR, VAL_GPIOE_AFRL, VAL_GPIOE_AFRH},
45#endif
46#if STM32_HAS_GPIOF
47 {VAL_GPIOF_MODER, VAL_GPIOF_OTYPER, VAL_GPIOF_OSPEEDR, VAL_GPIOF_PUPDR,
48 VAL_GPIOF_ODR, VAL_GPIOF_AFRL, VAL_GPIOF_AFRH},
49#endif
50#if STM32_HAS_GPIOG
51 {VAL_GPIOG_MODER, VAL_GPIOG_OTYPER, VAL_GPIOG_OSPEEDR, VAL_GPIOG_PUPDR,
52 VAL_GPIOG_ODR, VAL_GPIOG_AFRL, VAL_GPIOG_AFRH},
53#endif
54#if STM32_HAS_GPIOH
55 {VAL_GPIOH_MODER, VAL_GPIOH_OTYPER, VAL_GPIOH_OSPEEDR, VAL_GPIOH_PUPDR,
56 VAL_GPIOH_ODR, VAL_GPIOH_AFRL, VAL_GPIOH_AFRH},
57#endif
58#if STM32_HAS_GPIOI
59 {VAL_GPIOI_MODER, VAL_GPIOI_OTYPER, VAL_GPIOI_OSPEEDR, VAL_GPIOI_PUPDR,
60 VAL_GPIOI_ODR, VAL_GPIOI_AFRL, VAL_GPIOI_AFRH}
61#endif
62};
63#endif
64
65void enter_bootloader_mode_if_requested(void);
66
67/**
68 * @brief Early initialization code.
69 * @details This initialization must be performed just after stack setup
70 * and before any other initialization.
71 */
72void __early_init(void) {
73 enter_bootloader_mode_if_requested();
74 stm32_clock_init();
75}
76
77#if HAL_USE_SDC || defined(__DOXYGEN__)
78/**
79 * @brief SDC card detection.
80 */
81bool sdc_lld_is_card_inserted(SDCDriver *sdcp) {
82
83 (void)sdcp;
84 /* TODO: Fill the implementation.*/
85 return true;
86}
87
88/**
89 * @brief SDC card write protection detection.
90 */
91bool sdc_lld_is_write_protected(SDCDriver *sdcp) {
92
93 (void)sdcp;
94 /* TODO: Fill the implementation.*/
95 return false;
96}
97#endif /* HAL_USE_SDC */
98
99#if HAL_USE_MMC_SPI || defined(__DOXYGEN__)
100/**
101 * @brief MMC_SPI card detection.
102 */
103bool mmc_lld_is_card_inserted(MMCDriver *mmcp) {
104
105 (void)mmcp;
106 /* TODO: Fill the implementation.*/
107 return true;
108}
109
110/**
111 * @brief MMC_SPI card write protection detection.
112 */
113bool mmc_lld_is_write_protected(MMCDriver *mmcp) {
114
115 (void)mmcp;
116 /* TODO: Fill the implementation.*/
117 return false;
118}
119#endif
120
121/**
122 * @brief Board-specific initialization code.
123 * @todo Add your board-specific code, if any.
124 */
125void boardInit(void) {
126}
diff --git a/keyboards/hadron/ver3/boards/GENERIC_STM32_F303XC/board.h b/keyboards/hadron/ver3/boards/GENERIC_STM32_F303XC/board.h
deleted file mode 100644
index ec26557f3..000000000
--- a/keyboards/hadron/ver3/boards/GENERIC_STM32_F303XC/board.h
+++ /dev/null
@@ -1,1187 +0,0 @@
1/*
2 ChibiOS - Copyright (C) 2006..2016 Giovanni Di Sirio
3
4 Licensed under the Apache License, Version 2.0 (the "License");
5 you may not use this file except in compliance with the License.
6 You may obtain a copy of the License at
7
8 http://www.apache.org/licenses/LICENSE-2.0
9
10 Unless required by applicable law or agreed to in writing, software
11 distributed under the License is distributed on an "AS IS" BASIS,
12 WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
13 See the License for the specific language governing permissions and
14 limitations under the License.
15*/
16
17#ifndef _BOARD_H_
18#define _BOARD_H_
19
20/*
21 * Setup for Clueboard 60% Keyboard
22 */
23
24/*
25 * Board identifier.
26 */
27#define BOARD_GENERIC_STM32_F303XC
28#define BOARD_NAME "Planck PCB"
29
30/*
31 * Board oscillators-related settings.
32 * NOTE: LSE not fitted.
33 */
34#if !defined(STM32_LSECLK)
35#define STM32_LSECLK 0U
36#endif
37
38#define STM32_LSEDRV (3U << 3U)
39
40#if !defined(STM32_HSECLK)
41#define STM32_HSECLK 8000000U
42#endif
43
44// #define STM32_HSE_BYPASS
45
46/*
47 * MCU type as defined in the ST header.
48 */
49#define STM32F303xC
50
51/*
52 * IO pins assignments.
53 */
54#define GPIOA_PIN0 0U
55#define GPIOA_PIN1 1U
56#define GPIOA_PIN2 2U
57#define GPIOA_PIN3 3U
58#define GPIOA_PIN4 4U
59#define GPIOA_PIN5 5U
60#define GPIOA_PIN6 6U
61#define GPIOA_PIN7 7U
62#define GPIOA_PIN8 8U
63#define GPIOA_PIN9 9U
64#define GPIOA_PIN10 10U
65#define GPIOA_USB_DM 11U
66#define GPIOA_USB_DP 12U
67#define GPIOA_SWDIO 13U
68#define GPIOA_SWCLK 14U
69#define GPIOA_PIN15 15U
70
71#define GPIOB_PIN0 0U
72#define GPIOB_PIN1 1U
73#define GPIOB_PIN2 2U
74#define GPIOB_PIN3 3U
75#define GPIOB_PIN4 4U
76#define GPIOB_PIN5 5U
77#define GPIOB_PIN6 6U
78#define GPIOB_PIN7 7U
79#define GPIOB_PIN8 8U
80#define GPIOB_PIN9 9U
81#define GPIOB_PIN10 10U
82#define GPIOB_PIN11 11U
83#define GPIOB_PIN12 12U
84#define GPIOB_PIN13 13U
85#define GPIOB_PIN14 14U
86#define GPIOB_PIN15 15U
87
88#define GPIOC_PIN0 0U
89#define GPIOC_PIN1 1U
90#define GPIOC_PIN2 2U
91#define GPIOC_PIN3 3U
92#define GPIOC_PIN4 4U
93#define GPIOC_PIN5 5U
94#define GPIOC_PIN6 6U
95#define GPIOC_PIN7 7U
96#define GPIOC_PIN8 8U
97#define GPIOC_PIN9 9U
98#define GPIOC_PIN10 10U
99#define GPIOC_PIN11 11U
100#define GPIOC_PIN12 12U
101#define GPIOC_PIN13 13U
102#define GPIOC_PIN14 14U
103#define GPIOC_PIN15 15U
104
105#define GPIOD_PIN0 0U
106#define GPIOD_PIN1 1U
107#define GPIOD_PIN2 2U
108#define GPIOD_PIN3 3U
109#define GPIOD_PIN4 4U
110#define GPIOD_PIN5 5U
111#define GPIOD_PIN6 6U
112#define GPIOD_PIN7 7U
113#define GPIOD_PIN8 8U
114#define GPIOD_PIN9 9U
115#define GPIOD_PIN10 10U
116#define GPIOD_PIN11 11U
117#define GPIOD_PIN12 12U
118#define GPIOD_PIN13 13U
119#define GPIOD_PIN14 14U
120#define GPIOD_PIN15 15U
121
122#define GPIOE_PIN0 0U
123#define GPIOE_PIN1 1U
124#define GPIOE_PIN2 2U
125#define GPIOE_PIN3 3U
126#define GPIOE_PIN4 4U
127#define GPIOE_PIN5 5U
128#define GPIOE_PIN6 6U
129#define GPIOE_PIN7 7U
130#define GPIOE_PIN8 8U
131#define GPIOE_PIN9 9U
132#define GPIOE_PIN10 10U
133#define GPIOE_PIN11 11U
134#define GPIOE_PIN12 12U
135#define GPIOE_PIN13 13U
136#define GPIOE_PIN14 14U
137#define GPIOE_PIN15 15U
138
139#define GPIOF_I2C2_SDA 0U
140#define GPIOF_I2C2_SCL 1U
141#define GPIOF_PIN2 2U
142#define GPIOF_PIN3 3U
143#define GPIOF_PIN4 4U
144#define GPIOF_PIN5 5U
145#define GPIOF_PIN6 6U
146#define GPIOF_PIN7 7U
147#define GPIOF_PIN8 8U
148#define GPIOF_PIN9 9U
149#define GPIOF_PIN10 10U
150#define GPIOF_PIN11 11U
151#define GPIOF_PIN12 12U
152#define GPIOF_PIN13 13U
153#define GPIOF_PIN14 14U
154#define GPIOF_PIN15 15U
155
156#define GPIOG_PIN0 0U
157#define GPIOG_PIN1 1U
158#define GPIOG_PIN2 2U
159#define GPIOG_PIN3 3U
160#define GPIOG_PIN4 4U
161#define GPIOG_PIN5 5U
162#define GPIOG_PIN6 6U
163#define GPIOG_PIN7 7U
164#define GPIOG_PIN8 8U
165#define GPIOG_PIN9 9U
166#define GPIOG_PIN10 10U
167#define GPIOG_PIN11 11U
168#define GPIOG_PIN12 12U
169#define GPIOG_PIN13 13U
170#define GPIOG_PIN14 14U
171#define GPIOG_PIN15 15U
172
173#define GPIOH_PIN0 0U
174#define GPIOH_PIN1 1U
175#define GPIOH_PIN2 2U
176#define GPIOH_PIN3 3U
177#define GPIOH_PIN4 4U
178#define GPIOH_PIN5 5U
179#define GPIOH_PIN6 6U
180#define GPIOH_PIN7 7U
181#define GPIOH_PIN8 8U
182#define GPIOH_PIN9 9U
183#define GPIOH_PIN10 10U
184#define GPIOH_PIN11 11U
185#define GPIOH_PIN12 12U
186#define GPIOH_PIN13 13U
187#define GPIOH_PIN14 14U
188#define GPIOH_PIN15 15U
189
190/*
191 * IO lines assignments.
192 */
193#define LINE_L3GD20_SDI PAL_LINE(GPIOA, 7U)
194#define LINE_USB_DM PAL_LINE(GPIOA, 11U)
195#define LINE_USB_DP PAL_LINE(GPIOA, 12U)
196#define LINE_SWDIO PAL_LINE(GPIOA, 13U)
197#define LINE_SWCLK PAL_LINE(GPIOA, 14U)
198
199#define LINE_PIN6 PAL_LINE(GPIOF, 0U)
200#define LINE_PIN7 PAL_LINE(GPIOF, 1U)
201
202#define LINE_CAPS_LOCK PAL_LINE(GPIOB, 7U)
203
204
205/*
206 * I/O ports initial setup, this configuration is established soon after reset
207 * in the initialization code.
208 * Please refer to the STM32 Reference Manual for details.
209 */
210#define PIN_MODE_INPUT(n) (0U << ((n) * 2U))
211#define PIN_MODE_OUTPUT(n) (1U << ((n) * 2U))
212#define PIN_MODE_ALTERNATE(n) (2U << ((n) * 2U))
213#define PIN_MODE_ANALOG(n) (3U << ((n) * 2U))
214#define PIN_ODR_LOW(n) (0U << (n))
215#define PIN_ODR_HIGH(n) (1U << (n))
216#define PIN_OTYPE_PUSHPULL(n) (0U << (n))
217#define PIN_OTYPE_OPENDRAIN(n) (1U << (n))
218#define PIN_OSPEED_VERYLOW(n) (0U << ((n) * 2U))
219#define PIN_OSPEED_LOW(n) (1U << ((n) * 2U))
220#define PIN_OSPEED_MEDIUM(n) (2U << ((n) * 2U))
221#define PIN_OSPEED_HIGH(n) (3U << ((n) * 2U))
222#define PIN_PUPDR_FLOATING(n) (0U << ((n) * 2U))
223#define PIN_PUPDR_PULLUP(n) (1U << ((n) * 2U))
224#define PIN_PUPDR_PULLDOWN(n) (2U << ((n) * 2U))
225#define PIN_AFIO_AF(n, v) ((v) << (((n) % 8U) * 4U))
226
227/*
228 * GPIOA setup:
229 *
230 * PA0 - NC
231 * PA1 - NC
232 * PA2 - COL1
233 * PA3 - COL2
234 * PA4 - SPEAKER1
235 * PA5 - SPEAKER2
236 * PA6 - COL3
237 * PA7 - COL8
238 * PA8 - COL6
239 * PA9 - COL7
240 * PA10 - ROW5
241 * PA11 - USB_DM (alternate 14).
242 * PA12 - USB_DP (alternate 14).
243 * PA13 - SWDIO (alternate 0).
244 * PA14 - SWCLK (alternate 0).
245 * PA15 - ROW4
246 */
247#define VAL_GPIOA_MODER (PIN_MODE_INPUT(GPIOA_PIN0) | \
248 PIN_MODE_ALTERNATE(GPIOA_PIN1) | \
249 PIN_MODE_INPUT(GPIOA_PIN2) | \
250 PIN_MODE_INPUT(GPIOA_PIN3) | \
251 PIN_MODE_INPUT(GPIOA_PIN4) | \
252 PIN_MODE_INPUT(GPIOA_PIN5) | \
253 PIN_MODE_INPUT(GPIOA_PIN6) | \
254 PIN_MODE_INPUT(GPIOA_PIN7) | \
255 PIN_MODE_INPUT(GPIOA_PIN8) | \
256 PIN_MODE_INPUT(GPIOA_PIN9) | \
257 PIN_MODE_INPUT(GPIOA_PIN10) | \
258 PIN_MODE_ALTERNATE(GPIOA_USB_DM) | \
259 PIN_MODE_ALTERNATE(GPIOA_USB_DP) | \
260 PIN_MODE_ALTERNATE(GPIOA_SWDIO) | \
261 PIN_MODE_ALTERNATE(GPIOA_SWCLK) | \
262 PIN_MODE_INPUT(GPIOA_PIN15))
263#define VAL_GPIOA_OTYPER (PIN_OTYPE_PUSHPULL(GPIOA_PIN0) | \
264 PIN_OTYPE_PUSHPULL(GPIOA_PIN1) | \
265 PIN_OTYPE_PUSHPULL(GPIOA_PIN2) | \
266 PIN_OTYPE_PUSHPULL(GPIOA_PIN3) | \
267 PIN_OTYPE_PUSHPULL(GPIOA_PIN4) | \
268 PIN_OTYPE_PUSHPULL(GPIOA_PIN5) | \
269 PIN_OTYPE_PUSHPULL(GPIOA_PIN6) | \
270 PIN_OTYPE_PUSHPULL(GPIOA_PIN7) | \
271 PIN_OTYPE_PUSHPULL(GPIOA_PIN8) | \
272 PIN_OTYPE_PUSHPULL(GPIOA_PIN9) | \
273 PIN_OTYPE_PUSHPULL(GPIOA_PIN10) | \
274 PIN_OTYPE_PUSHPULL(GPIOA_USB_DM) | \
275 PIN_OTYPE_PUSHPULL(GPIOA_USB_DP) | \
276 PIN_OTYPE_PUSHPULL(GPIOA_SWDIO) | \
277 PIN_OTYPE_PUSHPULL(GPIOA_SWCLK) | \
278 PIN_OTYPE_PUSHPULL(GPIOA_PIN15))
279#define VAL_GPIOA_OSPEEDR (PIN_OSPEED_VERYLOW(GPIOA_PIN0) | \
280 PIN_OSPEED_HIGH(GPIOA_PIN1) | \
281 PIN_OSPEED_VERYLOW(GPIOA_PIN2) | \
282 PIN_OSPEED_VERYLOW(GPIOA_PIN3) | \
283 PIN_OSPEED_VERYLOW(GPIOA_PIN4) | \
284 PIN_OSPEED_VERYLOW(GPIOA_PIN5) | \
285 PIN_OSPEED_VERYLOW(GPIOA_PIN6) | \
286 PIN_OSPEED_VERYLOW(GPIOA_PIN7) | \
287 PIN_OSPEED_VERYLOW(GPIOA_PIN8) | \
288 PIN_OSPEED_VERYLOW(GPIOA_PIN9) | \
289 PIN_OSPEED_VERYLOW(GPIOA_PIN10) | \
290 PIN_OSPEED_HIGH(GPIOA_USB_DM) | \
291 PIN_OSPEED_VERYLOW(GPIOA_USB_DP) | \
292 PIN_OSPEED_HIGH(GPIOA_SWDIO) | \
293 PIN_OSPEED_HIGH(GPIOA_SWCLK) | \
294 PIN_OSPEED_VERYLOW(GPIOA_PIN15))
295#define VAL_GPIOA_PUPDR (PIN_PUPDR_FLOATING(GPIOA_PIN0) | \
296 PIN_PUPDR_FLOATING(GPIOA_PIN1) | \
297 PIN_PUPDR_PULLUP(GPIOA_PIN2) | \
298 PIN_PUPDR_PULLUP(GPIOA_PIN3) | \
299 PIN_PUPDR_PULLUP(GPIOA_PIN4) | \
300 PIN_PUPDR_PULLUP(GPIOA_PIN5) | \
301 PIN_PUPDR_PULLUP(GPIOA_PIN6) | \
302 PIN_PUPDR_FLOATING(GPIOA_PIN7) | \
303 PIN_PUPDR_PULLUP(GPIOA_PIN8) | \
304 PIN_PUPDR_PULLUP(GPIOA_PIN9) | \
305 PIN_PUPDR_PULLUP(GPIOA_PIN10) | \
306 PIN_PUPDR_FLOATING(GPIOA_USB_DM) | \
307 PIN_PUPDR_FLOATING(GPIOA_USB_DP) | \
308 PIN_PUPDR_PULLUP(GPIOA_SWDIO) | \
309 PIN_PUPDR_PULLDOWN(GPIOA_SWCLK) | \
310 PIN_PUPDR_PULLUP(GPIOA_PIN15))
311#define VAL_GPIOA_ODR (PIN_ODR_HIGH(GPIOA_PIN0) | \
312 PIN_ODR_HIGH(GPIOA_PIN1) | \
313 PIN_ODR_HIGH(GPIOA_PIN2) | \
314 PIN_ODR_HIGH(GPIOA_PIN3) | \
315 PIN_ODR_HIGH(GPIOA_PIN4) | \
316 PIN_ODR_HIGH(GPIOA_PIN5) | \
317 PIN_ODR_HIGH(GPIOA_PIN6) | \
318 PIN_ODR_HIGH(GPIOA_PIN7) | \
319 PIN_ODR_HIGH(GPIOA_PIN8) | \
320 PIN_ODR_HIGH(GPIOA_PIN9) | \
321 PIN_ODR_HIGH(GPIOA_PIN10) | \
322 PIN_ODR_HIGH(GPIOA_USB_DM) | \
323 PIN_ODR_HIGH(GPIOA_USB_DP) | \
324 PIN_ODR_HIGH(GPIOA_SWDIO) | \
325 PIN_ODR_HIGH(GPIOA_SWCLK) | \
326 PIN_ODR_HIGH(GPIOA_PIN15))
327#define VAL_GPIOA_AFRL (PIN_AFIO_AF(GPIOA_PIN0, 0) | \
328 PIN_AFIO_AF(GPIOA_PIN1, 1) | \
329 PIN_AFIO_AF(GPIOA_PIN2, 0) | \
330 PIN_AFIO_AF(GPIOA_PIN3, 0) | \
331 PIN_AFIO_AF(GPIOA_PIN4, 0) | \
332 PIN_AFIO_AF(GPIOA_PIN5, 5) | \
333 PIN_AFIO_AF(GPIOA_PIN6, 5) | \
334 PIN_AFIO_AF(GPIOA_PIN7, 5))
335#define VAL_GPIOA_AFRH (PIN_AFIO_AF(GPIOA_PIN8, 0) | \
336 PIN_AFIO_AF(GPIOA_PIN9, 0) | \
337 PIN_AFIO_AF(GPIOA_PIN10, 0) | \
338 PIN_AFIO_AF(GPIOA_USB_DM, 14) | \
339 PIN_AFIO_AF(GPIOA_USB_DP, 14) | \
340 PIN_AFIO_AF(GPIOA_SWDIO, 0) | \
341 PIN_AFIO_AF(GPIOA_SWCLK, 0) | \
342 PIN_AFIO_AF(GPIOA_PIN15, 0))
343
344/*
345 * GPIOB setup:
346 *
347 * PB0 - PIN0 (input pullup).
348 * PB1 - PIN1 (input pullup).
349 * PB2 - PIN2 (input pullup).
350 * PB3 - PIN3 (alternate 0).
351 * PB4 - PIN4 (input pullup).
352 * PB5 - PIN5 (input pullup).
353 * PB6 - PIN6 LSM303DLHC_SCL (alternate 4).
354 * PB7 - PIN7 LSM303DLHC_SDA (alternate 4).
355 * PB8 - PIN8 (input pullup).
356 * PB9 - PIN9 (input pullup).
357 * PB10 - PIN10 (input pullup).
358 * PB11 - PIN11 (input pullup).
359 * PB12 - PIN12 (input pullup).
360 * PB13 - PIN13 (input pullup).
361 * PB14 - PIN14 (input pullup).
362 * PB15 - PIN15 (input pullup).
363 */
364#define VAL_GPIOB_MODER (PIN_MODE_INPUT(GPIOB_PIN0) | \
365 PIN_MODE_INPUT(GPIOB_PIN1) | \
366 PIN_MODE_INPUT(GPIOB_PIN2) | \
367 PIN_MODE_ALTERNATE(GPIOB_PIN3) | \
368 PIN_MODE_INPUT(GPIOB_PIN4) | \
369 PIN_MODE_INPUT(GPIOB_PIN5) | \
370 PIN_MODE_ALTERNATE(GPIOB_PIN6) | \
371 PIN_MODE_OUTPUT(GPIOB_PIN7) | \
372 PIN_MODE_INPUT(GPIOB_PIN8) | \
373 PIN_MODE_INPUT(GPIOB_PIN9) | \
374 PIN_MODE_INPUT(GPIOB_PIN10) | \
375 PIN_MODE_INPUT(GPIOB_PIN11) | \
376 PIN_MODE_INPUT(GPIOB_PIN12) | \
377 PIN_MODE_INPUT(GPIOB_PIN13) | \
378 PIN_MODE_INPUT(GPIOB_PIN14) | \
379 PIN_MODE_INPUT(GPIOB_PIN15))
380#define VAL_GPIOB_OTYPER (PIN_OTYPE_PUSHPULL(GPIOB_PIN0) | \
381 PIN_OTYPE_PUSHPULL(GPIOB_PIN1) | \
382 PIN_OTYPE_PUSHPULL(GPIOB_PIN2) | \
383 PIN_OTYPE_PUSHPULL(GPIOB_PIN3) | \
384 PIN_OTYPE_PUSHPULL(GPIOB_PIN4) | \
385 PIN_OTYPE_PUSHPULL(GPIOB_PIN5) | \
386 PIN_OTYPE_OPENDRAIN(GPIOB_PIN6) | \
387 PIN_OTYPE_PUSHPULL(GPIOB_PIN7) | \
388 PIN_OTYPE_PUSHPULL(GPIOB_PIN8) | \
389 PIN_OTYPE_PUSHPULL(GPIOB_PIN9) | \
390 PIN_OTYPE_PUSHPULL(GPIOB_PIN10) | \
391 PIN_OTYPE_PUSHPULL(GPIOB_PIN11) | \
392 PIN_OTYPE_PUSHPULL(GPIOB_PIN12) | \
393 PIN_OTYPE_PUSHPULL(GPIOB_PIN13) | \
394 PIN_OTYPE_PUSHPULL(GPIOB_PIN14) | \
395 PIN_OTYPE_PUSHPULL(GPIOB_PIN15))
396#define VAL_GPIOB_OSPEEDR (PIN_OSPEED_VERYLOW(GPIOB_PIN0) | \
397 PIN_OSPEED_VERYLOW(GPIOB_PIN1) | \
398 PIN_OSPEED_VERYLOW(GPIOB_PIN2) | \
399 PIN_OSPEED_HIGH(GPIOB_PIN3) | \
400 PIN_OSPEED_VERYLOW(GPIOB_PIN4) | \
401 PIN_OSPEED_VERYLOW(GPIOB_PIN5) | \
402 PIN_OSPEED_HIGH(GPIOB_PIN6) | \
403 PIN_OSPEED_VERYLOW(GPIOB_PIN7) | \
404 PIN_OSPEED_VERYLOW(GPIOB_PIN8) | \
405 PIN_OSPEED_VERYLOW(GPIOB_PIN9) | \
406 PIN_OSPEED_VERYLOW(GPIOB_PIN10) | \
407 PIN_OSPEED_VERYLOW(GPIOB_PIN11) | \
408 PIN_OSPEED_VERYLOW(GPIOB_PIN12) | \
409 PIN_OSPEED_VERYLOW(GPIOB_PIN13) | \
410 PIN_OSPEED_VERYLOW(GPIOB_PIN14) | \
411 PIN_OSPEED_VERYLOW(GPIOB_PIN15))
412#define VAL_GPIOB_PUPDR (PIN_PUPDR_PULLUP(GPIOB_PIN0) | \
413 PIN_PUPDR_PULLUP(GPIOB_PIN1) | \
414 PIN_PUPDR_PULLUP(GPIOB_PIN2) | \
415 PIN_PUPDR_FLOATING(GPIOB_PIN3) | \
416 PIN_PUPDR_PULLUP(GPIOB_PIN4) | \
417 PIN_PUPDR_PULLUP(GPIOB_PIN5) | \
418 PIN_PUPDR_FLOATING(GPIOB_PIN6) | \
419 PIN_PUPDR_PULLDOWN(GPIOB_PIN7) | \
420 PIN_PUPDR_PULLUP(GPIOB_PIN8) | \
421 PIN_PUPDR_PULLUP(GPIOB_PIN9) | \
422 PIN_PUPDR_PULLUP(GPIOB_PIN10) | \
423 PIN_PUPDR_PULLUP(GPIOB_PIN11) | \
424 PIN_PUPDR_PULLUP(GPIOB_PIN12) | \
425 PIN_PUPDR_PULLUP(GPIOB_PIN13) | \
426 PIN_PUPDR_PULLUP(GPIOB_PIN14) | \
427 PIN_PUPDR_PULLUP(GPIOB_PIN15))
428#define VAL_GPIOB_ODR (PIN_ODR_HIGH(GPIOB_PIN0) | \
429 PIN_ODR_HIGH(GPIOB_PIN1) | \
430 PIN_ODR_HIGH(GPIOB_PIN2) | \
431 PIN_ODR_HIGH(GPIOB_PIN3) | \
432 PIN_ODR_HIGH(GPIOB_PIN4) | \
433 PIN_ODR_HIGH(GPIOB_PIN5) | \
434 PIN_ODR_HIGH(GPIOB_PIN6) | \
435 PIN_ODR_LOW(GPIOB_PIN7) | \
436 PIN_ODR_HIGH(GPIOB_PIN8) | \
437 PIN_ODR_HIGH(GPIOB_PIN9) | \
438 PIN_ODR_HIGH(GPIOB_PIN10) | \
439 PIN_ODR_HIGH(GPIOB_PIN11) | \
440 PIN_ODR_HIGH(GPIOB_PIN12) | \
441 PIN_ODR_HIGH(GPIOB_PIN13) | \
442 PIN_ODR_HIGH(GPIOB_PIN14) | \
443 PIN_ODR_HIGH(GPIOB_PIN15))
444#define VAL_GPIOB_AFRL (PIN_AFIO_AF(GPIOB_PIN0, 0) | \
445 PIN_AFIO_AF(GPIOB_PIN1, 0) | \
446 PIN_AFIO_AF(GPIOB_PIN2, 0) | \
447 PIN_AFIO_AF(GPIOB_PIN3, 0) | \
448 PIN_AFIO_AF(GPIOB_PIN4, 0) | \
449 PIN_AFIO_AF(GPIOB_PIN5, 0) | \
450 PIN_AFIO_AF(GPIOB_PIN6, 4) | \
451 PIN_AFIO_AF(GPIOB_PIN7, 0))
452#define VAL_GPIOB_AFRH (PIN_AFIO_AF(GPIOB_PIN8, 0) | \
453 PIN_AFIO_AF(GPIOB_PIN9, 0) | \
454 PIN_AFIO_AF(GPIOB_PIN10, 0) | \
455 PIN_AFIO_AF(GPIOB_PIN11, 0) | \
456 PIN_AFIO_AF(GPIOB_PIN12, 0) | \
457 PIN_AFIO_AF(GPIOB_PIN13, 0) | \
458 PIN_AFIO_AF(GPIOB_PIN14, 0) | \
459 PIN_AFIO_AF(GPIOB_PIN15, 0))
460
461/*
462 * GPIOC setup:
463 *
464 * PC0 - PIN0 (input pullup).
465 * PC1 - PIN1 (input pullup).
466 * PC2 - PIN2 (input pullup).
467 * PC3 - PIN3 (input pullup).
468 * PC4 - PIN4 (input pullup).
469 * PC5 - PIN5 (input pullup).
470 * PC6 - PIN6 (input pullup).
471 * PC7 - PIN7 (input pullup).
472 * PC8 - PIN8 (input pullup).
473 * PC9 - PIN9 (input pullup).
474 * PC10 - PIN10 (input pullup).
475 * PC11 - PIN11 (input pullup).
476 * PC12 - PIN12 (input pullup).
477 * PC13 - PIN13 (input pullup).
478 * PC14 - PIN14 (input floating).
479 * PC15 - PIN15 (input floating).
480 */
481#define VAL_GPIOC_MODER (PIN_MODE_INPUT(GPIOC_PIN0) | \
482 PIN_MODE_INPUT(GPIOC_PIN1) | \
483 PIN_MODE_INPUT(GPIOC_PIN2) | \
484 PIN_MODE_INPUT(GPIOC_PIN3) | \
485 PIN_MODE_INPUT(GPIOC_PIN4) | \
486 PIN_MODE_INPUT(GPIOC_PIN5) | \
487 PIN_MODE_INPUT(GPIOC_PIN6) | \
488 PIN_MODE_INPUT(GPIOC_PIN7) | \
489 PIN_MODE_INPUT(GPIOC_PIN8) | \
490 PIN_MODE_INPUT(GPIOC_PIN9) | \
491 PIN_MODE_INPUT(GPIOC_PIN10) | \
492 PIN_MODE_INPUT(GPIOC_PIN11) | \
493 PIN_MODE_INPUT(GPIOC_PIN12) | \
494 PIN_MODE_INPUT(GPIOC_PIN13) | \
495 PIN_MODE_INPUT(GPIOC_PIN14) | \
496 PIN_MODE_INPUT(GPIOC_PIN15))
497#define VAL_GPIOC_OTYPER (PIN_OTYPE_PUSHPULL(GPIOC_PIN0) | \
498 PIN_OTYPE_PUSHPULL(GPIOC_PIN1) | \
499 PIN_OTYPE_PUSHPULL(GPIOC_PIN2) | \
500 PIN_OTYPE_PUSHPULL(GPIOC_PIN3) | \
501 PIN_OTYPE_PUSHPULL(GPIOC_PIN4) | \
502 PIN_OTYPE_PUSHPULL(GPIOC_PIN5) | \
503 PIN_OTYPE_PUSHPULL(GPIOC_PIN6) | \
504 PIN_OTYPE_PUSHPULL(GPIOC_PIN7) | \
505 PIN_OTYPE_PUSHPULL(GPIOC_PIN8) | \
506 PIN_OTYPE_PUSHPULL(GPIOC_PIN9) | \
507 PIN_OTYPE_PUSHPULL(GPIOC_PIN10) | \
508 PIN_OTYPE_PUSHPULL(GPIOC_PIN11) | \
509 PIN_OTYPE_PUSHPULL(GPIOC_PIN12) | \
510 PIN_OTYPE_PUSHPULL(GPIOC_PIN13) | \
511 PIN_OTYPE_PUSHPULL(GPIOC_PIN14) | \
512 PIN_OTYPE_PUSHPULL(GPIOC_PIN15))
513#define VAL_GPIOC_OSPEEDR (PIN_OSPEED_VERYLOW(GPIOC_PIN0) | \
514 PIN_OSPEED_VERYLOW(GPIOC_PIN1) | \
515 PIN_OSPEED_VERYLOW(GPIOC_PIN2) | \
516 PIN_OSPEED_VERYLOW(GPIOC_PIN3) | \
517 PIN_OSPEED_VERYLOW(GPIOC_PIN4) | \
518 PIN_OSPEED_VERYLOW(GPIOC_PIN5) | \
519 PIN_OSPEED_VERYLOW(GPIOC_PIN6) | \
520 PIN_OSPEED_VERYLOW(GPIOC_PIN7) | \
521 PIN_OSPEED_VERYLOW(GPIOC_PIN8) | \
522 PIN_OSPEED_VERYLOW(GPIOC_PIN9) | \
523 PIN_OSPEED_VERYLOW(GPIOC_PIN10) | \
524 PIN_OSPEED_VERYLOW(GPIOC_PIN11) | \
525 PIN_OSPEED_VERYLOW(GPIOC_PIN12) | \
526 PIN_OSPEED_VERYLOW(GPIOC_PIN13) | \
527 PIN_OSPEED_HIGH(GPIOC_PIN14) | \
528 PIN_OSPEED_HIGH(GPIOC_PIN15))
529#define VAL_GPIOC_PUPDR (PIN_PUPDR_PULLUP(GPIOC_PIN0) | \
530 PIN_PUPDR_PULLUP(GPIOC_PIN1) | \
531 PIN_PUPDR_PULLUP(GPIOC_PIN2) | \
532 PIN_PUPDR_PULLUP(GPIOC_PIN3) | \
533 PIN_PUPDR_PULLUP(GPIOC_PIN4) | \
534 PIN_PUPDR_PULLUP(GPIOC_PIN5) | \
535 PIN_PUPDR_PULLUP(GPIOC_PIN6) | \
536 PIN_PUPDR_PULLUP(GPIOC_PIN7) | \
537 PIN_PUPDR_PULLUP(GPIOC_PIN8) | \
538 PIN_PUPDR_PULLUP(GPIOC_PIN9) | \
539 PIN_PUPDR_PULLUP(GPIOC_PIN10) | \
540 PIN_PUPDR_PULLUP(GPIOC_PIN11) | \
541 PIN_PUPDR_PULLUP(GPIOC_PIN12) | \
542 PIN_PUPDR_PULLUP(GPIOC_PIN13) | \
543 PIN_PUPDR_FLOATING(GPIOC_PIN14) | \
544 PIN_PUPDR_FLOATING(GPIOC_PIN15))
545#define VAL_GPIOC_ODR (PIN_ODR_HIGH(GPIOC_PIN0) | \
546 PIN_ODR_HIGH(GPIOC_PIN1) | \
547 PIN_ODR_HIGH(GPIOC_PIN2) | \
548 PIN_ODR_HIGH(GPIOC_PIN3) | \
549 PIN_ODR_HIGH(GPIOC_PIN4) | \
550 PIN_ODR_HIGH(GPIOC_PIN5) | \
551 PIN_ODR_HIGH(GPIOC_PIN6) | \
552 PIN_ODR_HIGH(GPIOC_PIN7) | \
553 PIN_ODR_HIGH(GPIOC_PIN8) | \
554 PIN_ODR_HIGH(GPIOC_PIN9) | \
555 PIN_ODR_HIGH(GPIOC_PIN10) | \
556 PIN_ODR_HIGH(GPIOC_PIN11) | \
557 PIN_ODR_HIGH(GPIOC_PIN12) | \
558 PIN_ODR_HIGH(GPIOC_PIN13) | \
559 PIN_ODR_HIGH(GPIOC_PIN14) | \
560 PIN_ODR_HIGH(GPIOC_PIN15))
561#define VAL_GPIOC_AFRL (PIN_AFIO_AF(GPIOC_PIN0, 0) | \
562 PIN_AFIO_AF(GPIOC_PIN1, 0) | \
563 PIN_AFIO_AF(GPIOC_PIN2, 0) | \
564 PIN_AFIO_AF(GPIOC_PIN3, 0) | \
565 PIN_AFIO_AF(GPIOC_PIN4, 0) | \
566 PIN_AFIO_AF(GPIOC_PIN5, 0) | \
567 PIN_AFIO_AF(GPIOC_PIN6, 0) | \
568 PIN_AFIO_AF(GPIOC_PIN7, 0))
569#define VAL_GPIOC_AFRH (PIN_AFIO_AF(GPIOC_PIN8, 0) | \
570 PIN_AFIO_AF(GPIOC_PIN9, 0) | \
571 PIN_AFIO_AF(GPIOC_PIN10, 0) | \
572 PIN_AFIO_AF(GPIOC_PIN11, 0) | \
573 PIN_AFIO_AF(GPIOC_PIN12, 0) | \
574 PIN_AFIO_AF(GPIOC_PIN13, 0) | \
575 PIN_AFIO_AF(GPIOC_PIN14, 0) | \
576 PIN_AFIO_AF(GPIOC_PIN15, 0))
577
578/*
579 * GPIOD setup:
580 *
581 * PD0 - PIN0 (input pullup).
582 * PD1 - PIN1 (input pullup).
583 * PD2 - PIN2 (input pullup).
584 * PD3 - PIN3 (input pullup).
585 * PD4 - PIN4 (input pullup).
586 * PD5 - PIN5 (input pullup).
587 * PD6 - PIN6 (input pullup).
588 * PD7 - PIN7 (input pullup).
589 * PD8 - PIN8 (input pullup).
590 * PD9 - PIN9 (input pullup).
591 * PD11 - PIN10 (input pullup).
592 * PD11 - PIN11 (input pullup).
593 * PD12 - PIN12 (input pullup).
594 * PD13 - PIN13 (input pullup).
595 * PD14 - PIN14 (input pullup).
596 * PD15 - PIN15 (input pullup).
597 */
598#define VAL_GPIOD_MODER (PIN_MODE_INPUT(GPIOD_PIN0) | \
599 PIN_MODE_INPUT(GPIOD_PIN1) | \
600 PIN_MODE_INPUT(GPIOD_PIN2) | \
601 PIN_MODE_INPUT(GPIOD_PIN3) | \
602 PIN_MODE_INPUT(GPIOD_PIN4) | \
603 PIN_MODE_INPUT(GPIOD_PIN5) | \
604 PIN_MODE_INPUT(GPIOD_PIN6) | \
605 PIN_MODE_INPUT(GPIOD_PIN7) | \
606 PIN_MODE_INPUT(GPIOD_PIN8) | \
607 PIN_MODE_INPUT(GPIOD_PIN9) | \
608 PIN_MODE_INPUT(GPIOD_PIN10) | \
609 PIN_MODE_INPUT(GPIOD_PIN11) | \
610 PIN_MODE_INPUT(GPIOD_PIN12) | \
611 PIN_MODE_INPUT(GPIOD_PIN13) | \
612 PIN_MODE_INPUT(GPIOD_PIN14) | \
613 PIN_MODE_INPUT(GPIOD_PIN15))
614#define VAL_GPIOD_OTYPER (PIN_OTYPE_PUSHPULL(GPIOD_PIN0) | \
615 PIN_OTYPE_PUSHPULL(GPIOD_PIN1) | \
616 PIN_OTYPE_PUSHPULL(GPIOD_PIN2) | \
617 PIN_OTYPE_PUSHPULL(GPIOD_PIN3) | \
618 PIN_OTYPE_PUSHPULL(GPIOD_PIN4) | \
619 PIN_OTYPE_PUSHPULL(GPIOD_PIN5) | \
620 PIN_OTYPE_PUSHPULL(GPIOD_PIN6) | \
621 PIN_OTYPE_PUSHPULL(GPIOD_PIN7) | \
622 PIN_OTYPE_PUSHPULL(GPIOD_PIN8) | \
623 PIN_OTYPE_PUSHPULL(GPIOD_PIN9) | \
624 PIN_OTYPE_PUSHPULL(GPIOD_PIN10) | \
625 PIN_OTYPE_PUSHPULL(GPIOD_PIN11) | \
626 PIN_OTYPE_PUSHPULL(GPIOD_PIN12) | \
627 PIN_OTYPE_PUSHPULL(GPIOD_PIN13) | \
628 PIN_OTYPE_PUSHPULL(GPIOD_PIN14) | \
629 PIN_OTYPE_PUSHPULL(GPIOD_PIN15))
630#define VAL_GPIOD_OSPEEDR (PIN_OSPEED_VERYLOW(GPIOD_PIN0) | \
631 PIN_OSPEED_VERYLOW(GPIOD_PIN1) | \
632 PIN_OSPEED_VERYLOW(GPIOD_PIN2) | \
633 PIN_OSPEED_VERYLOW(GPIOD_PIN3) | \
634 PIN_OSPEED_VERYLOW(GPIOD_PIN4) | \
635 PIN_OSPEED_VERYLOW(GPIOD_PIN5) | \
636 PIN_OSPEED_VERYLOW(GPIOD_PIN6) | \
637 PIN_OSPEED_VERYLOW(GPIOD_PIN7) | \
638 PIN_OSPEED_VERYLOW(GPIOD_PIN8) | \
639 PIN_OSPEED_VERYLOW(GPIOD_PIN9) | \
640 PIN_OSPEED_VERYLOW(GPIOD_PIN10) | \
641 PIN_OSPEED_VERYLOW(GPIOD_PIN11) | \
642 PIN_OSPEED_VERYLOW(GPIOD_PIN12) | \
643 PIN_OSPEED_VERYLOW(GPIOD_PIN13) | \
644 PIN_OSPEED_VERYLOW(GPIOD_PIN14) | \
645 PIN_OSPEED_VERYLOW(GPIOD_PIN15))
646#define VAL_GPIOD_PUPDR (PIN_PUPDR_PULLUP(GPIOD_PIN0) | \
647 PIN_PUPDR_PULLUP(GPIOD_PIN1) | \
648 PIN_PUPDR_PULLUP(GPIOD_PIN2) | \
649 PIN_PUPDR_PULLUP(GPIOD_PIN3) | \
650 PIN_PUPDR_PULLUP(GPIOD_PIN4) | \
651 PIN_PUPDR_PULLUP(GPIOD_PIN5) | \
652 PIN_PUPDR_PULLUP(GPIOD_PIN6) | \
653 PIN_PUPDR_PULLUP(GPIOD_PIN7) | \
654 PIN_PUPDR_PULLUP(GPIOD_PIN8) | \
655 PIN_PUPDR_PULLUP(GPIOD_PIN9) | \
656 PIN_PUPDR_PULLUP(GPIOD_PIN10) | \
657 PIN_PUPDR_PULLUP(GPIOD_PIN11) | \
658 PIN_PUPDR_PULLUP(GPIOD_PIN12) | \
659 PIN_PUPDR_PULLUP(GPIOD_PIN13) | \
660 PIN_PUPDR_PULLUP(GPIOD_PIN14) | \
661 PIN_PUPDR_PULLUP(GPIOD_PIN15))
662#define VAL_GPIOD_ODR (PIN_ODR_HIGH(GPIOD_PIN0) | \
663 PIN_ODR_HIGH(GPIOD_PIN1) | \
664 PIN_ODR_HIGH(GPIOD_PIN2) | \
665 PIN_ODR_HIGH(GPIOD_PIN3) | \
666 PIN_ODR_HIGH(GPIOD_PIN4) | \
667 PIN_ODR_HIGH(GPIOD_PIN5) | \
668 PIN_ODR_HIGH(GPIOD_PIN6) | \
669 PIN_ODR_HIGH(GPIOD_PIN7) | \
670 PIN_ODR_HIGH(GPIOD_PIN8) | \
671 PIN_ODR_HIGH(GPIOD_PIN9) | \
672 PIN_ODR_HIGH(GPIOD_PIN10) | \
673 PIN_ODR_HIGH(GPIOD_PIN11) | \
674 PIN_ODR_HIGH(GPIOD_PIN12) | \
675 PIN_ODR_HIGH(GPIOD_PIN13) | \
676 PIN_ODR_HIGH(GPIOD_PIN14) | \
677 PIN_ODR_HIGH(GPIOD_PIN15))
678#define VAL_GPIOD_AFRL (PIN_AFIO_AF(GPIOD_PIN0, 0) | \
679 PIN_AFIO_AF(GPIOD_PIN1, 0) | \
680 PIN_AFIO_AF(GPIOD_PIN2, 0) | \
681 PIN_AFIO_AF(GPIOD_PIN3, 0) | \
682 PIN_AFIO_AF(GPIOD_PIN4, 0) | \
683 PIN_AFIO_AF(GPIOD_PIN5, 0) | \
684 PIN_AFIO_AF(GPIOD_PIN6, 0) | \
685 PIN_AFIO_AF(GPIOD_PIN7, 0))
686#define VAL_GPIOD_AFRH (PIN_AFIO_AF(GPIOD_PIN8, 0) | \
687 PIN_AFIO_AF(GPIOD_PIN9, 0) | \
688 PIN_AFIO_AF(GPIOD_PIN10, 0) | \
689 PIN_AFIO_AF(GPIOD_PIN11, 0) | \
690 PIN_AFIO_AF(GPIOD_PIN12, 0) | \
691 PIN_AFIO_AF(GPIOD_PIN13, 0) | \
692 PIN_AFIO_AF(GPIOD_PIN14, 0) | \
693 PIN_AFIO_AF(GPIOD_PIN15, 0))
694
695/*
696 * GPIOE setup:
697 *
698 * PE0 - PIN0 (input pullup).
699 * PE1 - PIN1 (input pullup).
700 * PE2 - PIN2 (input pullup).
701 * PE3 - PIN3 L3GD20_CS (output pushpull maximum).
702 * PE4 - PIN4 (input pullup).
703 * PE5 - PIN5 (input pullup).
704 * PE6 - PIN6 (input pullup).
705 * PE7 - PIN7 (input pullup).
706 * PE8 - PIN8 (output pushpull maximum).
707 * PE9 - PIN9 (output pushpull maximum).
708 * PE10 - PIN10 (output pushpull maximum).
709 * PE11 - PIN11 (output pushpull maximum).
710 * PE12 - PIN12 (output pushpull maximum).
711 * PE13 - PIN13 (output pushpull maximum).
712 * PE14 - PIN14 (output pushpull maximum).
713 * PE15 - PIN15 (output pushpull maximum).
714 */
715#define VAL_GPIOE_MODER (PIN_MODE_INPUT(GPIOE_PIN0) | \
716 PIN_MODE_INPUT(GPIOE_PIN1) | \
717 PIN_MODE_INPUT(GPIOE_PIN2) |\
718 PIN_MODE_OUTPUT(GPIOE_PIN3) | \
719 PIN_MODE_INPUT(GPIOE_PIN4) |\
720 PIN_MODE_INPUT(GPIOE_PIN5) |\
721 PIN_MODE_INPUT(GPIOE_PIN6) | \
722 PIN_MODE_INPUT(GPIOE_PIN7) | \
723 PIN_MODE_OUTPUT(GPIOE_PIN8) | \
724 PIN_MODE_OUTPUT(GPIOE_PIN9) | \
725 PIN_MODE_OUTPUT(GPIOE_PIN10) | \
726 PIN_MODE_OUTPUT(GPIOE_PIN11) | \
727 PIN_MODE_OUTPUT(GPIOE_PIN12) | \
728 PIN_MODE_OUTPUT(GPIOE_PIN13) | \
729 PIN_MODE_OUTPUT(GPIOE_PIN14) | \
730 PIN_MODE_OUTPUT(GPIOE_PIN15))
731#define VAL_GPIOE_OTYPER (PIN_OTYPE_PUSHPULL(GPIOE_PIN0) |\
732 PIN_OTYPE_PUSHPULL(GPIOE_PIN1) |\
733 PIN_OTYPE_PUSHPULL(GPIOE_PIN2) |\
734 PIN_OTYPE_PUSHPULL(GPIOE_PIN3) | \
735 PIN_OTYPE_PUSHPULL(GPIOE_PIN4) |\
736 PIN_OTYPE_PUSHPULL(GPIOE_PIN5) |\
737 PIN_OTYPE_PUSHPULL(GPIOE_PIN6) | \
738 PIN_OTYPE_PUSHPULL(GPIOE_PIN7) | \
739 PIN_OTYPE_PUSHPULL(GPIOE_PIN8) | \
740 PIN_OTYPE_PUSHPULL(GPIOE_PIN9) | \
741 PIN_OTYPE_PUSHPULL(GPIOE_PIN10) |\
742 PIN_OTYPE_PUSHPULL(GPIOE_PIN11) | \
743 PIN_OTYPE_PUSHPULL(GPIOE_PIN12) | \
744 PIN_OTYPE_PUSHPULL(GPIOE_PIN13) | \
745 PIN_OTYPE_PUSHPULL(GPIOE_PIN14) |\
746 PIN_OTYPE_PUSHPULL(GPIOE_PIN15))
747#define VAL_GPIOE_OSPEEDR (PIN_OSPEED_VERYLOW(GPIOE_PIN0) |\
748 PIN_OSPEED_VERYLOW(GPIOE_PIN1) |\
749 PIN_OSPEED_VERYLOW(GPIOE_PIN2) |\
750 PIN_OSPEED_HIGH(GPIOE_PIN3) | \
751 PIN_OSPEED_VERYLOW(GPIOE_PIN4) |\
752 PIN_OSPEED_VERYLOW(GPIOE_PIN5) |\
753 PIN_OSPEED_VERYLOW(GPIOE_PIN6) | \
754 PIN_OSPEED_VERYLOW(GPIOE_PIN7) | \
755 PIN_OSPEED_HIGH(GPIOE_PIN8) | \
756 PIN_OSPEED_HIGH(GPIOE_PIN9) | \
757 PIN_OSPEED_HIGH(GPIOE_PIN10) | \
758 PIN_OSPEED_HIGH(GPIOE_PIN11) | \
759 PIN_OSPEED_HIGH(GPIOE_PIN12) | \
760 PIN_OSPEED_HIGH(GPIOE_PIN13) | \
761 PIN_OSPEED_HIGH(GPIOE_PIN14) | \
762 PIN_OSPEED_HIGH(GPIOE_PIN15))
763#define VAL_GPIOE_PUPDR (PIN_PUPDR_PULLUP(GPIOE_PIN0) | \
764 PIN_PUPDR_PULLUP(GPIOE_PIN1) | \
765 PIN_PUPDR_PULLUP(GPIOE_PIN2) |\
766 PIN_PUPDR_FLOATING(GPIOE_PIN3) | \
767 PIN_PUPDR_PULLUP(GPIOE_PIN4) |\
768 PIN_PUPDR_PULLUP(GPIOE_PIN5) |\
769 PIN_PUPDR_PULLUP(GPIOE_PIN6) | \
770 PIN_PUPDR_PULLUP(GPIOE_PIN7) | \
771 PIN_PUPDR_PULLUP(GPIOE_PIN8) | \
772 PIN_PUPDR_PULLUP(GPIOE_PIN9) | \
773 PIN_PUPDR_PULLUP(GPIOE_PIN10) | \
774 PIN_PUPDR_FLOATING(GPIOE_PIN11) | \
775 PIN_PUPDR_PULLUP(GPIOE_PIN12) | \
776 PIN_PUPDR_FLOATING(GPIOE_PIN13) | \
777 PIN_PUPDR_FLOATING(GPIOE_PIN14) |\
778 PIN_PUPDR_FLOATING(GPIOE_PIN15))
779#define VAL_GPIOE_ODR (PIN_ODR_HIGH(GPIOE_PIN0) | \
780 PIN_ODR_HIGH(GPIOE_PIN1) | \
781 PIN_ODR_HIGH(GPIOE_PIN2) | \
782 PIN_ODR_HIGH(GPIOE_PIN3) | \
783 PIN_ODR_HIGH(GPIOE_PIN4) | \
784 PIN_ODR_HIGH(GPIOE_PIN5) | \
785 PIN_ODR_HIGH(GPIOE_PIN6) | \
786 PIN_ODR_HIGH(GPIOE_PIN7) | \
787 PIN_ODR_LOW(GPIOE_PIN8) | \
788 PIN_ODR_LOW(GPIOE_PIN9) | \
789 PIN_ODR_LOW(GPIOE_PIN10) | \
790 PIN_ODR_LOW(GPIOE_PIN11) | \
791 PIN_ODR_LOW(GPIOE_PIN12) | \
792 PIN_ODR_LOW(GPIOE_PIN13) | \
793 PIN_ODR_LOW(GPIOE_PIN14) | \
794 PIN_ODR_LOW(GPIOE_PIN15))
795#define VAL_GPIOE_AFRL (PIN_AFIO_AF(GPIOE_PIN0, 0) | \
796 PIN_AFIO_AF(GPIOE_PIN1, 0) | \
797 PIN_AFIO_AF(GPIOE_PIN2, 0) |\
798 PIN_AFIO_AF(GPIOE_PIN3, 0) | \
799 PIN_AFIO_AF(GPIOE_PIN4, 0) |\
800 PIN_AFIO_AF(GPIOE_PIN5, 0) |\
801 PIN_AFIO_AF(GPIOE_PIN6, 0) | \
802 PIN_AFIO_AF(GPIOE_PIN7, 0))
803#define VAL_GPIOE_AFRH (PIN_AFIO_AF(GPIOE_PIN8, 0) | \
804 PIN_AFIO_AF(GPIOE_PIN9, 0) | \
805 PIN_AFIO_AF(GPIOE_PIN10, 0) | \
806 PIN_AFIO_AF(GPIOE_PIN11, 0) | \
807 PIN_AFIO_AF(GPIOE_PIN12, 0) | \
808 PIN_AFIO_AF(GPIOE_PIN13, 0) | \
809 PIN_AFIO_AF(GPIOE_PIN14, 0) | \
810 PIN_AFIO_AF(GPIOE_PIN15, 0))
811
812/*
813 * GPIOF setup:
814 *
815 * PF0 - I2C2_SDA (input floating).
816 * PF1 - I2C2_SCL (input floating).
817 * PF2 - PIN2 (input pullup).
818 * PF3 - PIN3 (input pullup).
819 * PF4 - PIN4 (input pullup).
820 * PF5 - PIN5 (input pullup).
821 * PF6 - PIN6 (input pullup).
822 * PF7 - PIN7 (input pullup).
823 * PF8 - PIN8 (input pullup).
824 * PF9 - PIN9 (input pullup).
825 * PF10 - PIN10 (input pullup).
826 * PF11 - PIN11 (input pullup).
827 * PF12 - PIN12 (input pullup).
828 * PF13 - PIN13 (input pullup).
829 * PF14 - PIN14 (input pullup).
830 * PF15 - PIN15 (input pullup).
831 */
832#define VAL_GPIOF_MODER (PIN_MODE_INPUT(GPIOF_I2C2_SDA) | \
833 PIN_MODE_INPUT(GPIOF_I2C2_SCL) | \
834 PIN_MODE_INPUT(GPIOF_PIN2) | \
835 PIN_MODE_INPUT(GPIOF_PIN3) | \
836 PIN_MODE_INPUT(GPIOF_PIN4) | \
837 PIN_MODE_INPUT(GPIOF_PIN5) | \
838 PIN_MODE_INPUT(GPIOF_PIN6) | \
839 PIN_MODE_INPUT(GPIOF_PIN7) | \
840 PIN_MODE_INPUT(GPIOF_PIN8) | \
841 PIN_MODE_INPUT(GPIOF_PIN9) | \
842 PIN_MODE_INPUT(GPIOF_PIN10) | \
843 PIN_MODE_INPUT(GPIOF_PIN11) | \
844 PIN_MODE_INPUT(GPIOF_PIN12) | \
845 PIN_MODE_INPUT(GPIOF_PIN13) | \
846 PIN_MODE_INPUT(GPIOF_PIN14) | \
847 PIN_MODE_INPUT(GPIOF_PIN15))
848#define VAL_GPIOF_OTYPER (PIN_OTYPE_PUSHPULL(GPIOF_I2C2_SDA) | \
849 PIN_OTYPE_PUSHPULL(GPIOF_I2C2_SCL) | \
850 PIN_OTYPE_PUSHPULL(GPIOF_PIN2) | \
851 PIN_OTYPE_PUSHPULL(GPIOF_PIN3) | \
852 PIN_OTYPE_PUSHPULL(GPIOF_PIN4) | \
853 PIN_OTYPE_PUSHPULL(GPIOF_PIN5) | \
854 PIN_OTYPE_PUSHPULL(GPIOF_PIN6) | \
855 PIN_OTYPE_PUSHPULL(GPIOF_PIN7) | \
856 PIN_OTYPE_PUSHPULL(GPIOF_PIN8) | \
857 PIN_OTYPE_PUSHPULL(GPIOF_PIN9) | \
858 PIN_OTYPE_PUSHPULL(GPIOF_PIN10) | \
859 PIN_OTYPE_PUSHPULL(GPIOF_PIN11) | \
860 PIN_OTYPE_PUSHPULL(GPIOF_PIN12) | \
861 PIN_OTYPE_PUSHPULL(GPIOF_PIN13) | \
862 PIN_OTYPE_PUSHPULL(GPIOF_PIN14) | \
863 PIN_OTYPE_PUSHPULL(GPIOF_PIN15))
864#define VAL_GPIOF_OSPEEDR (PIN_OSPEED_HIGH(GPIOF_I2C2_SDA) | \
865 PIN_OSPEED_HIGH(GPIOF_I2C2_SCL) | \
866 PIN_OSPEED_VERYLOW(GPIOF_PIN2) | \
867 PIN_OSPEED_VERYLOW(GPIOF_PIN3) | \
868 PIN_OSPEED_VERYLOW(GPIOF_PIN4) | \
869 PIN_OSPEED_VERYLOW(GPIOF_PIN5) | \
870 PIN_OSPEED_VERYLOW(GPIOF_PIN6) | \
871 PIN_OSPEED_VERYLOW(GPIOF_PIN7) | \
872 PIN_OSPEED_VERYLOW(GPIOF_PIN8) | \
873 PIN_OSPEED_VERYLOW(GPIOF_PIN9) | \
874 PIN_OSPEED_VERYLOW(GPIOF_PIN10) | \
875 PIN_OSPEED_VERYLOW(GPIOF_PIN11) | \
876 PIN_OSPEED_VERYLOW(GPIOF_PIN12) | \
877 PIN_OSPEED_VERYLOW(GPIOF_PIN13) | \
878 PIN_OSPEED_VERYLOW(GPIOF_PIN14) | \
879 PIN_OSPEED_VERYLOW(GPIOF_PIN15))
880#define VAL_GPIOF_PUPDR (PIN_PUPDR_FLOATING(GPIOF_I2C2_SDA) | \
881 PIN_PUPDR_FLOATING(GPIOF_I2C2_SCL) | \
882 PIN_PUPDR_PULLUP(GPIOF_PIN2) | \
883 PIN_PUPDR_PULLUP(GPIOF_PIN3) | \
884 PIN_PUPDR_PULLUP(GPIOF_PIN4) | \
885 PIN_PUPDR_PULLUP(GPIOF_PIN5) | \
886 PIN_PUPDR_PULLUP(GPIOF_PIN6) | \
887 PIN_PUPDR_PULLUP(GPIOF_PIN7) | \
888 PIN_PUPDR_PULLUP(GPIOF_PIN8) | \
889 PIN_PUPDR_PULLUP(GPIOF_PIN9) | \
890 PIN_PUPDR_PULLUP(GPIOF_PIN10) | \
891 PIN_PUPDR_PULLUP(GPIOF_PIN11) | \
892 PIN_PUPDR_PULLUP(GPIOF_PIN12) | \
893 PIN_PUPDR_PULLUP(GPIOF_PIN13) | \
894 PIN_PUPDR_PULLUP(GPIOF_PIN14) | \
895 PIN_PUPDR_PULLUP(GPIOF_PIN15))
896#define VAL_GPIOF_ODR (PIN_ODR_HIGH(GPIOF_I2C2_SDA) | \
897 PIN_ODR_HIGH(GPIOF_I2C2_SCL) | \
898 PIN_ODR_HIGH(GPIOF_PIN2) | \
899 PIN_ODR_HIGH(GPIOF_PIN3) | \
900 PIN_ODR_HIGH(GPIOF_PIN4) | \
901 PIN_ODR_HIGH(GPIOF_PIN5) | \
902 PIN_ODR_HIGH(GPIOF_PIN6) | \
903 PIN_ODR_HIGH(GPIOF_PIN7) | \
904 PIN_ODR_HIGH(GPIOF_PIN8) | \
905 PIN_ODR_HIGH(GPIOF_PIN9) | \
906 PIN_ODR_HIGH(GPIOF_PIN10) | \
907 PIN_ODR_HIGH(GPIOF_PIN11) | \
908 PIN_ODR_HIGH(GPIOF_PIN12) | \
909 PIN_ODR_HIGH(GPIOF_PIN13) | \
910 PIN_ODR_HIGH(GPIOF_PIN14) | \
911 PIN_ODR_HIGH(GPIOF_PIN15))
912#define VAL_GPIOF_AFRL (PIN_AFIO_AF(GPIOF_I2C2_SDA, 0) | \
913 PIN_AFIO_AF(GPIOF_I2C2_SCL, 0) | \
914 PIN_AFIO_AF(GPIOF_PIN2, 0) | \
915 PIN_AFIO_AF(GPIOF_PIN3, 0) | \
916 PIN_AFIO_AF(GPIOF_PIN4, 0) | \
917 PIN_AFIO_AF(GPIOF_PIN5, 0) | \
918 PIN_AFIO_AF(GPIOF_PIN6, 0) | \
919 PIN_AFIO_AF(GPIOF_PIN7, 0))
920#define VAL_GPIOF_AFRH (PIN_AFIO_AF(GPIOF_PIN8, 0) | \
921 PIN_AFIO_AF(GPIOF_PIN9, 0) | \
922 PIN_AFIO_AF(GPIOF_PIN10, 0) | \
923 PIN_AFIO_AF(GPIOF_PIN11, 0) | \
924 PIN_AFIO_AF(GPIOF_PIN12, 0) | \
925 PIN_AFIO_AF(GPIOF_PIN13, 0) | \
926 PIN_AFIO_AF(GPIOF_PIN14, 0) | \
927 PIN_AFIO_AF(GPIOF_PIN15, 0))
928
929/*
930 * GPIOG setup:
931 *
932 * PG0 - PIN0 (input pullup).
933 * PG1 - PIN1 (input pullup).
934 * PG2 - PIN2 (input pullup).
935 * PG3 - PIN3 (input pullup).
936 * PG4 - PIN4 (input pullup).
937 * PG5 - PIN5 (input pullup).
938 * PG6 - PIN6 (input pullup).
939 * PG7 - PIN7 (input pullup).
940 * PG8 - PIN8 (input pullup).
941 * PG9 - PIN9 (input pullup).
942 * PG10 - PIN10 (input pullup).
943 * PG11 - PIN11 (input pullup).
944 * PG12 - PIN12 (input pullup).
945 * PG13 - PIN13 (input pullup).
946 * PG14 - PIN14 (input pullup).
947 * PG15 - PIN15 (input pullup).
948 */
949#define VAL_GPIOG_MODER (PIN_MODE_INPUT(GPIOG_PIN0) | \
950 PIN_MODE_INPUT(GPIOG_PIN1) | \
951 PIN_MODE_INPUT(GPIOG_PIN2) | \
952 PIN_MODE_INPUT(GPIOG_PIN3) | \
953 PIN_MODE_INPUT(GPIOG_PIN4) | \
954 PIN_MODE_INPUT(GPIOG_PIN5) | \
955 PIN_MODE_INPUT(GPIOG_PIN6) | \
956 PIN_MODE_INPUT(GPIOG_PIN7) | \
957 PIN_MODE_INPUT(GPIOG_PIN8) | \
958 PIN_MODE_INPUT(GPIOG_PIN9) | \
959 PIN_MODE_INPUT(GPIOG_PIN10) | \
960 PIN_MODE_INPUT(GPIOG_PIN11) | \
961 PIN_MODE_INPUT(GPIOG_PIN12) | \
962 PIN_MODE_INPUT(GPIOG_PIN13) | \
963 PIN_MODE_INPUT(GPIOG_PIN14) | \
964 PIN_MODE_INPUT(GPIOG_PIN15))
965#define VAL_GPIOG_OTYPER (PIN_OTYPE_PUSHPULL(GPIOG_PIN0) | \
966 PIN_OTYPE_PUSHPULL(GPIOG_PIN1) | \
967 PIN_OTYPE_PUSHPULL(GPIOG_PIN2) | \
968 PIN_OTYPE_PUSHPULL(GPIOG_PIN3) | \
969 PIN_OTYPE_PUSHPULL(GPIOG_PIN4) | \
970 PIN_OTYPE_PUSHPULL(GPIOG_PIN5) | \
971 PIN_OTYPE_PUSHPULL(GPIOG_PIN6) | \
972 PIN_OTYPE_PUSHPULL(GPIOG_PIN7) | \
973 PIN_OTYPE_PUSHPULL(GPIOG_PIN8) | \
974 PIN_OTYPE_PUSHPULL(GPIOG_PIN9) | \
975 PIN_OTYPE_PUSHPULL(GPIOG_PIN10) | \
976 PIN_OTYPE_PUSHPULL(GPIOG_PIN11) | \
977 PIN_OTYPE_PUSHPULL(GPIOG_PIN12) | \
978 PIN_OTYPE_PUSHPULL(GPIOG_PIN13) | \
979 PIN_OTYPE_PUSHPULL(GPIOG_PIN14) | \
980 PIN_OTYPE_PUSHPULL(GPIOG_PIN15))
981#define VAL_GPIOG_OSPEEDR (PIN_OSPEED_VERYLOW(GPIOG_PIN0) | \
982 PIN_OSPEED_VERYLOW(GPIOG_PIN1) | \
983 PIN_OSPEED_VERYLOW(GPIOG_PIN2) | \
984 PIN_OSPEED_VERYLOW(GPIOG_PIN3) | \
985 PIN_OSPEED_VERYLOW(GPIOG_PIN4) | \
986 PIN_OSPEED_VERYLOW(GPIOG_PIN5) | \
987 PIN_OSPEED_VERYLOW(GPIOG_PIN6) | \
988 PIN_OSPEED_VERYLOW(GPIOG_PIN7) | \
989 PIN_OSPEED_VERYLOW(GPIOG_PIN8) | \
990 PIN_OSPEED_VERYLOW(GPIOG_PIN9) | \
991 PIN_OSPEED_VERYLOW(GPIOG_PIN10) | \
992 PIN_OSPEED_VERYLOW(GPIOG_PIN11) | \
993 PIN_OSPEED_VERYLOW(GPIOG_PIN12) | \
994 PIN_OSPEED_VERYLOW(GPIOG_PIN13) | \
995 PIN_OSPEED_VERYLOW(GPIOG_PIN14) | \
996 PIN_OSPEED_VERYLOW(GPIOG_PIN15))
997#define VAL_GPIOG_PUPDR (PIN_PUPDR_PULLUP(GPIOG_PIN0) | \
998 PIN_PUPDR_PULLUP(GPIOG_PIN1) | \
999 PIN_PUPDR_PULLUP(GPIOG_PIN2) | \
1000 PIN_PUPDR_PULLUP(GPIOG_PIN3) | \
1001 PIN_PUPDR_PULLUP(GPIOG_PIN4) | \
1002 PIN_PUPDR_PULLUP(GPIOG_PIN5) | \
1003 PIN_PUPDR_PULLUP(GPIOG_PIN6) | \
1004 PIN_PUPDR_PULLUP(GPIOG_PIN7) | \
1005 PIN_PUPDR_PULLUP(GPIOG_PIN8) | \
1006 PIN_PUPDR_PULLUP(GPIOG_PIN9) | \
1007 PIN_PUPDR_PULLUP(GPIOG_PIN10) | \
1008 PIN_PUPDR_PULLUP(GPIOG_PIN11) | \
1009 PIN_PUPDR_PULLUP(GPIOG_PIN12) | \
1010 PIN_PUPDR_PULLUP(GPIOG_PIN13) | \
1011 PIN_PUPDR_PULLUP(GPIOG_PIN14) | \
1012 PIN_PUPDR_PULLUP(GPIOG_PIN15))
1013#define VAL_GPIOG_ODR (PIN_ODR_HIGH(GPIOG_PIN0) | \
1014 PIN_ODR_HIGH(GPIOG_PIN1) | \
1015 PIN_ODR_HIGH(GPIOG_PIN2) | \
1016 PIN_ODR_HIGH(GPIOG_PIN3) | \
1017 PIN_ODR_HIGH(GPIOG_PIN4) | \
1018 PIN_ODR_HIGH(GPIOG_PIN5) | \
1019 PIN_ODR_HIGH(GPIOG_PIN6) | \
1020 PIN_ODR_HIGH(GPIOG_PIN7) | \
1021 PIN_ODR_HIGH(GPIOG_PIN8) | \
1022 PIN_ODR_HIGH(GPIOG_PIN9) | \
1023 PIN_ODR_HIGH(GPIOG_PIN10) | \
1024 PIN_ODR_HIGH(GPIOG_PIN11) | \
1025 PIN_ODR_HIGH(GPIOG_PIN12) | \
1026 PIN_ODR_HIGH(GPIOG_PIN13) | \
1027 PIN_ODR_HIGH(GPIOG_PIN14) | \
1028 PIN_ODR_HIGH(GPIOG_PIN15))
1029#define VAL_GPIOG_AFRL (PIN_AFIO_AF(GPIOG_PIN0, 0) | \
1030 PIN_AFIO_AF(GPIOG_PIN1, 0) | \
1031 PIN_AFIO_AF(GPIOG_PIN2, 0) | \
1032 PIN_AFIO_AF(GPIOG_PIN3, 0) | \
1033 PIN_AFIO_AF(GPIOG_PIN4, 0) | \
1034 PIN_AFIO_AF(GPIOG_PIN5, 0) | \
1035 PIN_AFIO_AF(GPIOG_PIN6, 0) | \
1036 PIN_AFIO_AF(GPIOG_PIN7, 0))
1037#define VAL_GPIOG_AFRH (PIN_AFIO_AF(GPIOG_PIN8, 0) | \
1038 PIN_AFIO_AF(GPIOG_PIN9, 0) | \
1039 PIN_AFIO_AF(GPIOG_PIN10, 0) | \
1040 PIN_AFIO_AF(GPIOG_PIN11, 0) | \
1041 PIN_AFIO_AF(GPIOG_PIN12, 0) | \
1042 PIN_AFIO_AF(GPIOG_PIN13, 0) | \
1043 PIN_AFIO_AF(GPIOG_PIN14, 0) | \
1044 PIN_AFIO_AF(GPIOG_PIN15, 0))
1045
1046/*
1047 * GPIOH setup:
1048 *
1049 * PH0 - PIN0 (input pullup).
1050 * PH1 - PIN1 (input pullup).
1051 * PH2 - PIN2 (input pullup).
1052 * PH3 - PIN3 (input pullup).
1053 * PH4 - PIN4 (input pullup).
1054 * PH5 - PIN5 (input pullup).
1055 * PH6 - PIN6 (input pullup).
1056 * PH7 - PIN7 (input pullup).
1057 * PH8 - PIN8 (input pullup).
1058 * PH9 - PIN9 (input pullup).
1059 * PH10 - PIN10 (input pullup).
1060 * PH11 - PIN11 (input pullup).
1061 * PH12 - PIN12 (input pullup).
1062 * PH13 - PIN13 (input pullup).
1063 * PH14 - PIN14 (input pullup).
1064 * PH15 - PIN15 (input pullup).
1065 */
1066#define VAL_GPIOH_MODER (PIN_MODE_INPUT(GPIOH_PIN0) | \
1067 PIN_MODE_INPUT(GPIOH_PIN1) | \
1068 PIN_MODE_INPUT(GPIOH_PIN2) | \
1069 PIN_MODE_INPUT(GPIOH_PIN3) | \
1070 PIN_MODE_INPUT(GPIOH_PIN4) | \
1071 PIN_MODE_INPUT(GPIOH_PIN5) | \
1072 PIN_MODE_INPUT(GPIOH_PIN6) | \
1073 PIN_MODE_INPUT(GPIOH_PIN7) | \
1074 PIN_MODE_INPUT(GPIOH_PIN8) | \
1075 PIN_MODE_INPUT(GPIOH_PIN9) | \
1076 PIN_MODE_INPUT(GPIOH_PIN10) | \
1077 PIN_MODE_INPUT(GPIOH_PIN11) | \
1078 PIN_MODE_INPUT(GPIOH_PIN12) | \
1079 PIN_MODE_INPUT(GPIOH_PIN13) | \
1080 PIN_MODE_INPUT(GPIOH_PIN14) | \
1081 PIN_MODE_INPUT(GPIOH_PIN15))
1082#define VAL_GPIOH_OTYPER (PIN_OTYPE_PUSHPULL(GPIOH_PIN0) | \
1083 PIN_OTYPE_PUSHPULL(GPIOH_PIN1) | \
1084 PIN_OTYPE_PUSHPULL(GPIOH_PIN2) | \
1085 PIN_OTYPE_PUSHPULL(GPIOH_PIN3) | \
1086 PIN_OTYPE_PUSHPULL(GPIOH_PIN4) | \
1087 PIN_OTYPE_PUSHPULL(GPIOH_PIN5) | \
1088 PIN_OTYPE_PUSHPULL(GPIOH_PIN6) | \
1089 PIN_OTYPE_PUSHPULL(GPIOH_PIN7) | \
1090 PIN_OTYPE_PUSHPULL(GPIOH_PIN8) | \
1091 PIN_OTYPE_PUSHPULL(GPIOH_PIN9) | \
1092 PIN_OTYPE_PUSHPULL(GPIOH_PIN10) | \
1093 PIN_OTYPE_PUSHPULL(GPIOH_PIN11) | \
1094 PIN_OTYPE_PUSHPULL(GPIOH_PIN12) | \
1095 PIN_OTYPE_PUSHPULL(GPIOH_PIN13) | \
1096 PIN_OTYPE_PUSHPULL(GPIOH_PIN14) | \
1097 PIN_OTYPE_PUSHPULL(GPIOH_PIN15))
1098#define VAL_GPIOH_OSPEEDR (PIN_OSPEED_VERYLOW(GPIOH_PIN0) | \
1099 PIN_OSPEED_VERYLOW(GPIOH_PIN1) | \
1100 PIN_OSPEED_VERYLOW(GPIOH_PIN2) | \
1101 PIN_OSPEED_VERYLOW(GPIOH_PIN3) | \
1102 PIN_OSPEED_VERYLOW(GPIOH_PIN4) | \
1103 PIN_OSPEED_VERYLOW(GPIOH_PIN5) | \
1104 PIN_OSPEED_VERYLOW(GPIOH_PIN6) | \
1105 PIN_OSPEED_VERYLOW(GPIOH_PIN7) | \
1106 PIN_OSPEED_VERYLOW(GPIOH_PIN8) | \
1107 PIN_OSPEED_VERYLOW(GPIOH_PIN9) | \
1108 PIN_OSPEED_VERYLOW(GPIOH_PIN10) | \
1109 PIN_OSPEED_VERYLOW(GPIOH_PIN11) | \
1110 PIN_OSPEED_VERYLOW(GPIOH_PIN12) | \
1111 PIN_OSPEED_VERYLOW(GPIOH_PIN13) | \
1112 PIN_OSPEED_VERYLOW(GPIOH_PIN14) | \
1113 PIN_OSPEED_VERYLOW(GPIOH_PIN15))
1114#define VAL_GPIOH_PUPDR (PIN_PUPDR_PULLUP(GPIOH_PIN0) | \
1115 PIN_PUPDR_PULLUP(GPIOH_PIN1) | \
1116 PIN_PUPDR_PULLUP(GPIOH_PIN2) | \
1117 PIN_PUPDR_PULLUP(GPIOH_PIN3) | \
1118 PIN_PUPDR_PULLUP(GPIOH_PIN4) | \
1119 PIN_PUPDR_PULLUP(GPIOH_PIN5) | \
1120 PIN_PUPDR_PULLUP(GPIOH_PIN6) | \
1121 PIN_PUPDR_PULLUP(GPIOH_PIN7) | \
1122 PIN_PUPDR_PULLUP(GPIOH_PIN8) | \
1123 PIN_PUPDR_PULLUP(GPIOH_PIN9) | \
1124 PIN_PUPDR_PULLUP(GPIOH_PIN10) | \
1125 PIN_PUPDR_PULLUP(GPIOH_PIN11) | \
1126 PIN_PUPDR_PULLUP(GPIOH_PIN12) | \
1127 PIN_PUPDR_PULLUP(GPIOH_PIN13) | \
1128 PIN_PUPDR_PULLUP(GPIOH_PIN14) | \
1129 PIN_PUPDR_PULLUP(GPIOH_PIN15))
1130#define VAL_GPIOH_ODR (PIN_ODR_HIGH(GPIOH_PIN0) | \
1131 PIN_ODR_HIGH(GPIOH_PIN1) | \
1132 PIN_ODR_HIGH(GPIOH_PIN2) | \
1133 PIN_ODR_HIGH(GPIOH_PIN3) | \
1134 PIN_ODR_HIGH(GPIOH_PIN4) | \
1135 PIN_ODR_HIGH(GPIOH_PIN5) | \
1136 PIN_ODR_HIGH(GPIOH_PIN6) | \
1137 PIN_ODR_HIGH(GPIOH_PIN7) | \
1138 PIN_ODR_HIGH(GPIOH_PIN8) | \
1139 PIN_ODR_HIGH(GPIOH_PIN9) | \
1140 PIN_ODR_HIGH(GPIOH_PIN10) | \
1141 PIN_ODR_HIGH(GPIOH_PIN11) | \
1142 PIN_ODR_HIGH(GPIOH_PIN12) | \
1143 PIN_ODR_HIGH(GPIOH_PIN13) | \
1144 PIN_ODR_HIGH(GPIOH_PIN14) | \
1145 PIN_ODR_HIGH(GPIOH_PIN15))
1146#define VAL_GPIOH_AFRL (PIN_AFIO_AF(GPIOH_PIN0, 0) | \
1147 PIN_AFIO_AF(GPIOH_PIN1, 0) | \
1148 PIN_AFIO_AF(GPIOH_PIN2, 0) | \
1149 PIN_AFIO_AF(GPIOH_PIN3, 0) | \
1150 PIN_AFIO_AF(GPIOH_PIN4, 0) | \
1151 PIN_AFIO_AF(GPIOH_PIN5, 0) | \
1152 PIN_AFIO_AF(GPIOH_PIN6, 0) | \
1153 PIN_AFIO_AF(GPIOH_PIN7, 0))
1154#define VAL_GPIOH_AFRH (PIN_AFIO_AF(GPIOH_PIN8, 0) | \
1155 PIN_AFIO_AF(GPIOH_PIN9, 0) | \
1156 PIN_AFIO_AF(GPIOH_PIN10, 0) | \
1157 PIN_AFIO_AF(GPIOH_PIN11, 0) | \
1158 PIN_AFIO_AF(GPIOH_PIN12, 0) | \
1159 PIN_AFIO_AF(GPIOH_PIN13, 0) | \
1160 PIN_AFIO_AF(GPIOH_PIN14, 0) | \
1161 PIN_AFIO_AF(GPIOH_PIN15, 0))
1162
1163
1164/*
1165 * USB bus activation macro, required by the USB driver.
1166 */
1167// #define usb_lld_connect_bus(usbp)
1168#define usb_lld_connect_bus(usbp) (palSetPadMode(GPIOA, GPIOA_USB_DP, PAL_MODE_ALTERNATE(14)))
1169// #define usb_lld_connect_bus(usbp) palSetPadMode(GPIOA, 12, PAL_MODE_INPUT)
1170/*
1171 * USB bus de-activation macro, required by the USB driver.
1172 */
1173// #define usb_lld_disconnect_bus(usbp)
1174#define usb_lld_disconnect_bus(usbp) (palSetPadMode(GPIOA, GPIOA_USB_DP, PAL_MODE_OUTPUT_PUSHPULL)); palClearPad(GPIOA, GPIOA_USB_DP)
1175// #define usb_lld_disconnect_bus(usbp) palSetPadMode(GPIOA, 12, PAL_MODE_OUTPUT_PUSHPULL); palClearPad(GPIOA, 12)
1176
1177#if !defined(_FROM_ASM_)
1178#ifdef __cplusplus
1179extern "C" {
1180#endif
1181 void boardInit(void);
1182#ifdef __cplusplus
1183}
1184#endif
1185#endif /* _FROM_ASM_ */
1186
1187#endif /* _BOARD_H_ */
diff --git a/keyboards/hadron/ver3/boards/GENERIC_STM32_F303XC/board.mk b/keyboards/hadron/ver3/boards/GENERIC_STM32_F303XC/board.mk
deleted file mode 100644
index 43377629a..000000000
--- a/keyboards/hadron/ver3/boards/GENERIC_STM32_F303XC/board.mk
+++ /dev/null
@@ -1,5 +0,0 @@
1# List of all the board related files.
2BOARDSRC = $(BOARD_PATH)/boards/GENERIC_STM32_F303XC/board.c
3
4# Required include directories
5BOARDINC = $(BOARD_PATH)/boards/GENERIC_STM32_F303XC
diff --git a/keyboards/hadron/ver3/bootloader_defs.h b/keyboards/hadron/ver3/bootloader_defs.h
deleted file mode 100644
index 3b0e9d20a..000000000
--- a/keyboards/hadron/ver3/bootloader_defs.h
+++ /dev/null
@@ -1,7 +0,0 @@
1/* Address for jumping to bootloader on STM32 chips. */
2/* It is chip dependent, the correct number can be looked up here:
3 * http://www.st.com/web/en/resource/technical/document/application_note/CD00167594.pdf
4 * This also requires a patch to chibios:
5 * <tmk_dir>/tmk_core/tool/chibios/ch-bootloader-jump.patch
6 */
7#define STM32_BOOTLOADER_ADDRESS 0x1FFFD800
diff --git a/keyboards/hadron/ver3/rules.mk b/keyboards/hadron/ver3/rules.mk
index 1345c67f2..8ce0d77b7 100644
--- a/keyboards/hadron/ver3/rules.mk
+++ b/keyboards/hadron/ver3/rules.mk
@@ -1,6 +1,4 @@
1# projecct specific files 1# MCU name
2
3# Cortex version
4MCU = STM32F303 2MCU = STM32F303
5 3
6# Build Options 4# Build Options
diff --git a/keyboards/handwired/co60/rev6/rules.mk b/keyboards/handwired/co60/rev6/rules.mk
index dba41e12b..fc7cabb10 100644
--- a/keyboards/handwired/co60/rev6/rules.mk
+++ b/keyboards/handwired/co60/rev6/rules.mk
@@ -1,40 +1,5 @@
1# project specific files 1# MCU name
2 2MCU = STM32F303
3## chip/board settings
4# - the next two should match the directories in
5# <chibios>/os/hal/ports/$(MCU_FAMILY)/$(MCU_SERIES)
6MCU_FAMILY = STM32
7MCU_SERIES = STM32F3xx
8
9# Linker script to use
10# - it should exist either in <chibios>/os/common/ports/ARMCMx/compilers/GCC/ld/
11# or <this_dir>/ld/
12MCU_LDSCRIPT = STM32F303xC
13
14# Startup code to use
15# - it should exist in <chibios>/os/common/startup/ARMCMx/compilers/GCC/mk/
16MCU_STARTUP = stm32f3xx
17
18# Board: it should exist either in <chibios>/os/hal/boards/
19# or <this_dir>/boards
20BOARD = GENERIC_STM32_F303XC
21
22# Cortex version
23MCU = cortex-m4
24
25# ARM version, CORTEX-M0/M1 are 6, CORTEX-M3/M4/M7 are 7
26ARMV = 7
27
28USE_FPU = yes
29
30# Vector table for application
31# 0x00000000-0x00001000 area is occupied by bootlaoder.*/
32# The CORTEX_VTOR... is needed only for MCHCK/Infinity KB
33# OPT_DEFS = -DCORTEX_VTOR_INIT=0x08005000
34
35# Options to pass to dfu-util when flashing
36DFU_ARGS = -d 0483:df11 -a 0 -s 0x08000000:leave
37DFU_SUFFIX_ARGS = -v 0483 -p df11
38 3
39# Code for backlight breathing: 4# Code for backlight breathing:
40SRC += led.c 5SRC += led.c
diff --git a/keyboards/handwired/co60/rev7/rules.mk b/keyboards/handwired/co60/rev7/rules.mk
index 6e0b3856a..9daeaf047 100644
--- a/keyboards/handwired/co60/rev7/rules.mk
+++ b/keyboards/handwired/co60/rev7/rules.mk
@@ -1,40 +1,5 @@
1# project specific files 1# MCU name
2 2MCU = STM32F303
3## chip/board settings
4# - the next two should match the directories in
5# <chibios>/os/hal/ports/$(MCU_FAMILY)/$(MCU_SERIES)
6MCU_FAMILY = STM32
7MCU_SERIES = STM32F3xx
8
9# Linker script to use
10# - it should exist either in <chibios>/os/common/ports/ARMCMx/compilers/GCC/ld/
11# or <this_dir>/ld/
12MCU_LDSCRIPT = STM32F303xC
13
14# Startup code to use
15# - it should exist in <chibios>/os/common/startup/ARMCMx/compilers/GCC/mk/
16MCU_STARTUP = stm32f3xx
17
18# Board: it should exist either in <chibios>/os/hal/boards/
19# or <this_dir>/boards
20BOARD = GENERIC_STM32_F303XC
21
22# Cortex version
23MCU = cortex-m4
24
25# ARM version, CORTEX-M0/M1 are 6, CORTEX-M3/M4/M7 are 7
26ARMV = 7
27
28USE_FPU = yes
29
30# Vector table for application
31# 0x00000000-0x00001000 area is occupied by bootlaoder.*/
32# The CORTEX_VTOR... is needed only for MCHCK/Infinity KB
33# OPT_DEFS = -DCORTEX_VTOR_INIT=0x08005000
34
35# Options to pass to dfu-util when flashing
36DFU_ARGS = -d 0483:df11 -a 0 -s 0x08000000:leave
37DFU_SUFFIX_ARGS = -v 0483 -p df11
38 3
39# Code for backlight breathing: 4# Code for backlight breathing:
40SRC += led.c 5SRC += led.c
diff --git a/keyboards/handwired/steamvan/rev1/rules.mk b/keyboards/handwired/steamvan/rev1/rules.mk
index 3a91a7c60..471cb4c1e 100644
--- a/keyboards/handwired/steamvan/rev1/rules.mk
+++ b/keyboards/handwired/steamvan/rev1/rules.mk
@@ -1,40 +1,5 @@
1# project specific files 1# MCU name
2 2MCU = STM32F303
3## chip/board settings
4# - the next two should match the directories in
5# <chibios>/os/hal/ports/$(MCU_FAMILY)/$(MCU_SERIES)
6MCU_FAMILY = STM32
7MCU_SERIES = STM32F3xx
8
9# Linker script to use
10# - it should exist either in <chibios>/os/common/ports/ARMCMx/compilers/GCC/ld/
11# or <this_dir>/ld/
12MCU_LDSCRIPT = STM32F303xC
13
14# Startup code to use
15# - it should exist in <chibios>/os/common/startup/ARMCMx/compilers/GCC/mk/
16MCU_STARTUP = stm32f3xx
17
18# Board: it should exist either in <chibios>/os/hal/boards/
19# or <this_dir>/boards
20BOARD = GENERIC_STM32_F303XC
21
22# Cortex version
23MCU = cortex-m4
24
25# ARM version, CORTEX-M0/M1 are 6, CORTEX-M3/M4/M7 are 7
26ARMV = 7
27
28USE_FPU = yes
29
30# Vector table for application
31# 0x00000000-0x00001000 area is occupied by bootlaoder.*/
32# The CORTEX_VTOR... is needed only for MCHCK/Infinity KB
33# OPT_DEFS = -DCORTEX_VTOR_INIT=0x08005000
34
35# Options to pass to dfu-util when flashing
36DFU_ARGS = -d 0483:df11 -a 0 -s 0x08000000:leave
37DFU_SUFFIX_ARGS = -v 0483 -p df11
38 3
39# Code for backlight breathing: 4# Code for backlight breathing:
40SRC += led.c 5SRC += led.c
diff --git a/keyboards/handwired/wulkan/rules.mk b/keyboards/handwired/wulkan/rules.mk
index 3f881b7f1..f432c7d67 100644
--- a/keyboards/handwired/wulkan/rules.mk
+++ b/keyboards/handwired/wulkan/rules.mk
@@ -1,3 +1,4 @@
1# MCU name
1MCU = STM32F303 2MCU = STM32F303
2 3
3# Build Options 4# Build Options
diff --git a/keyboards/hs60/v2/boards/GENERIC_STM32_F303XC/board.c b/keyboards/hs60/v2/boards/GENERIC_STM32_F303XC/board.c
deleted file mode 100644
index 4331155df..000000000
--- a/keyboards/hs60/v2/boards/GENERIC_STM32_F303XC/board.c
+++ /dev/null
@@ -1,126 +0,0 @@
1/*
2 ChibiOS - Copyright (C) 2006..2016 Giovanni Di Sirio
3
4 Licensed under the Apache License, Version 2.0 (the "License");
5 you may not use this file except in compliance with the License.
6 You may obtain a copy of the License at
7
8 http://www.apache.org/licenses/LICENSE-2.0
9
10 Unless required by applicable law or agreed to in writing, software
11 distributed under the License is distributed on an "AS IS" BASIS,
12 WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
13 See the License for the specific language governing permissions and
14 limitations under the License.
15*/
16
17#include "hal.h"
18
19#if HAL_USE_PAL || defined(__DOXYGEN__)
20/**
21 * @brief PAL setup.
22 * @details Digital I/O ports static configuration as defined in @p board.h.
23 * This variable is used by the HAL when initializing the PAL driver.
24 */
25const PALConfig pal_default_config = {
26#if STM32_HAS_GPIOA
27 {VAL_GPIOA_MODER, VAL_GPIOA_OTYPER, VAL_GPIOA_OSPEEDR, VAL_GPIOA_PUPDR,
28 VAL_GPIOA_ODR, VAL_GPIOA_AFRL, VAL_GPIOA_AFRH},
29#endif
30#if STM32_HAS_GPIOB
31 {VAL_GPIOB_MODER, VAL_GPIOB_OTYPER, VAL_GPIOB_OSPEEDR, VAL_GPIOB_PUPDR,
32 VAL_GPIOB_ODR, VAL_GPIOB_AFRL, VAL_GPIOB_AFRH},
33#endif
34#if STM32_HAS_GPIOC
35 {VAL_GPIOC_MODER, VAL_GPIOC_OTYPER, VAL_GPIOC_OSPEEDR, VAL_GPIOC_PUPDR,
36 VAL_GPIOC_ODR, VAL_GPIOC_AFRL, VAL_GPIOC_AFRH},
37#endif
38#if STM32_HAS_GPIOD
39 {VAL_GPIOD_MODER, VAL_GPIOD_OTYPER, VAL_GPIOD_OSPEEDR, VAL_GPIOD_PUPDR,
40 VAL_GPIOD_ODR, VAL_GPIOD_AFRL, VAL_GPIOD_AFRH},
41#endif
42#if STM32_HAS_GPIOE
43 {VAL_GPIOE_MODER, VAL_GPIOE_OTYPER, VAL_GPIOE_OSPEEDR, VAL_GPIOE_PUPDR,
44 VAL_GPIOE_ODR, VAL_GPIOE_AFRL, VAL_GPIOE_AFRH},
45#endif
46#if STM32_HAS_GPIOF
47 {VAL_GPIOF_MODER, VAL_GPIOF_OTYPER, VAL_GPIOF_OSPEEDR, VAL_GPIOF_PUPDR,
48 VAL_GPIOF_ODR, VAL_GPIOF_AFRL, VAL_GPIOF_AFRH},
49#endif
50#if STM32_HAS_GPIOG
51 {VAL_GPIOG_MODER, VAL_GPIOG_OTYPER, VAL_GPIOG_OSPEEDR, VAL_GPIOG_PUPDR,
52 VAL_GPIOG_ODR, VAL_GPIOG_AFRL, VAL_GPIOG_AFRH},
53#endif
54#if STM32_HAS_GPIOH
55 {VAL_GPIOH_MODER, VAL_GPIOH_OTYPER, VAL_GPIOH_OSPEEDR, VAL_GPIOH_PUPDR,
56 VAL_GPIOH_ODR, VAL_GPIOH_AFRL, VAL_GPIOH_AFRH},
57#endif
58#if STM32_HAS_GPIOI
59 {VAL_GPIOI_MODER, VAL_GPIOI_OTYPER, VAL_GPIOI_OSPEEDR, VAL_GPIOI_PUPDR,
60 VAL_GPIOI_ODR, VAL_GPIOI_AFRL, VAL_GPIOI_AFRH}
61#endif
62};
63#endif
64
65void enter_bootloader_mode_if_requested(void);
66
67/**
68 * @brief Early initialization code.
69 * @details This initialization must be performed just after stack setup
70 * and before any other initialization.
71 */
72void __early_init(void) {
73 enter_bootloader_mode_if_requested();
74 stm32_clock_init();
75}
76
77#if HAL_USE_SDC || defined(__DOXYGEN__)
78/**
79 * @brief SDC card detection.
80 */
81bool sdc_lld_is_card_inserted(SDCDriver *sdcp) {
82
83 (void)sdcp;
84 /* TODO: Fill the implementation.*/
85 return true;
86}
87
88/**
89 * @brief SDC card write protection detection.
90 */
91bool sdc_lld_is_write_protected(SDCDriver *sdcp) {
92
93 (void)sdcp;
94 /* TODO: Fill the implementation.*/
95 return false;
96}
97#endif /* HAL_USE_SDC */
98
99#if HAL_USE_MMC_SPI || defined(__DOXYGEN__)
100/**
101 * @brief MMC_SPI card detection.
102 */
103bool mmc_lld_is_card_inserted(MMCDriver *mmcp) {
104
105 (void)mmcp;
106 /* TODO: Fill the implementation.*/
107 return true;
108}
109
110/**
111 * @brief MMC_SPI card write protection detection.
112 */
113bool mmc_lld_is_write_protected(MMCDriver *mmcp) {
114
115 (void)mmcp;
116 /* TODO: Fill the implementation.*/
117 return false;
118}
119#endif
120
121/**
122 * @brief Board-specific initialization code.
123 * @todo Add your board-specific code, if any.
124 */
125void boardInit(void) {
126}
diff --git a/keyboards/hs60/v2/boards/GENERIC_STM32_F303XC/board.h b/keyboards/hs60/v2/boards/GENERIC_STM32_F303XC/board.h
deleted file mode 100644
index fb7283add..000000000
--- a/keyboards/hs60/v2/boards/GENERIC_STM32_F303XC/board.h
+++ /dev/null
@@ -1,1187 +0,0 @@
1/*
2 ChibiOS - Copyright (C) 2006..2016 Giovanni Di Sirio
3
4 Licensed under the Apache License, Version 2.0 (the "License");
5 you may not use this file except in compliance with the License.
6 You may obtain a copy of the License at
7
8 http://www.apache.org/licenses/LICENSE-2.0
9
10 Unless required by applicable law or agreed to in writing, software
11 distributed under the License is distributed on an "AS IS" BASIS,
12 WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
13 See the License for the specific language governing permissions and
14 limitations under the License.
15*/
16
17#ifndef _BOARD_H_
18#define _BOARD_H_
19
20/*
21 * Setup for Clueboard 60% Keyboard
22 */
23
24/*
25 * Board identifier.
26 */
27#define BOARD_GENERIC_STM32_F303XC
28#define BOARD_NAME "HS60 V2.0 PCB"
29
30/*
31 * Board oscillators-related settings.
32 * NOTE: LSE not fitted.
33 */
34#if !defined(STM32_LSECLK)
35#define STM32_LSECLK 0U
36#endif
37
38#define STM32_LSEDRV (3U << 3U)
39
40#if !defined(STM32_HSECLK)
41#define STM32_HSECLK 8000000U
42#endif
43
44// #define STM32_HSE_BYPASS
45
46/*
47 * MCU type as defined in the ST header.
48 */
49#define STM32F303xC
50
51/*
52 * IO pins assignments.
53 */
54#define GPIOA_PIN0 0U
55#define GPIOA_PIN1 1U
56#define GPIOA_PIN2 2U
57#define GPIOA_PIN3 3U
58#define GPIOA_PIN4 4U
59#define GPIOA_PIN5 5U
60#define GPIOA_PIN6 6U
61#define GPIOA_PIN7 7U
62#define GPIOA_PIN8 8U
63#define GPIOA_PIN9 9U
64#define GPIOA_PIN10 10U
65#define GPIOA_USB_DM 11U
66#define GPIOA_USB_DP 12U
67#define GPIOA_SWDIO 13U
68#define GPIOA_SWCLK 14U
69#define GPIOA_PIN15 15U
70
71#define GPIOB_PIN0 0U
72#define GPIOB_PIN1 1U
73#define GPIOB_PIN2 2U
74#define GPIOB_PIN3 3U
75#define GPIOB_PIN4 4U
76#define GPIOB_PIN5 5U
77#define GPIOB_PIN6 6U
78#define GPIOB_PIN7 7U
79#define GPIOB_PIN8 8U
80#define GPIOB_PIN9 9U
81#define GPIOB_PIN10 10U
82#define GPIOB_PIN11 11U
83#define GPIOB_PIN12 12U
84#define GPIOB_PIN13 13U
85#define GPIOB_PIN14 14U
86#define GPIOB_PIN15 15U
87
88#define GPIOC_PIN0 0U
89#define GPIOC_PIN1 1U
90#define GPIOC_PIN2 2U
91#define GPIOC_PIN3 3U
92#define GPIOC_PIN4 4U
93#define GPIOC_PIN5 5U
94#define GPIOC_PIN6 6U
95#define GPIOC_PIN7 7U
96#define GPIOC_PIN8 8U
97#define GPIOC_PIN9 9U
98#define GPIOC_PIN10 10U
99#define GPIOC_PIN11 11U
100#define GPIOC_PIN12 12U
101#define GPIOC_PIN13 13U
102#define GPIOC_PIN14 14U
103#define GPIOC_PIN15 15U
104
105#define GPIOD_PIN0 0U
106#define GPIOD_PIN1 1U
107#define GPIOD_PIN2 2U
108#define GPIOD_PIN3 3U
109#define GPIOD_PIN4 4U
110#define GPIOD_PIN5 5U
111#define GPIOD_PIN6 6U
112#define GPIOD_PIN7 7U
113#define GPIOD_PIN8 8U
114#define GPIOD_PIN9 9U
115#define GPIOD_PIN10 10U
116#define GPIOD_PIN11 11U
117#define GPIOD_PIN12 12U
118#define GPIOD_PIN13 13U
119#define GPIOD_PIN14 14U
120#define GPIOD_PIN15 15U
121
122#define GPIOE_PIN0 0U
123#define GPIOE_PIN1 1U
124#define GPIOE_PIN2 2U
125#define GPIOE_PIN3 3U
126#define GPIOE_PIN4 4U
127#define GPIOE_PIN5 5U
128#define GPIOE_PIN6 6U
129#define GPIOE_PIN7 7U
130#define GPIOE_PIN8 8U
131#define GPIOE_PIN9 9U
132#define GPIOE_PIN10 10U
133#define GPIOE_PIN11 11U
134#define GPIOE_PIN12 12U
135#define GPIOE_PIN13 13U
136#define GPIOE_PIN14 14U
137#define GPIOE_PIN15 15U
138
139#define GPIOF_I2C2_SDA 0U
140#define GPIOF_I2C2_SCL 1U
141#define GPIOF_PIN2 2U
142#define GPIOF_PIN3 3U
143#define GPIOF_PIN4 4U
144#define GPIOF_PIN5 5U
145#define GPIOF_PIN6 6U
146#define GPIOF_PIN7 7U
147#define GPIOF_PIN8 8U
148#define GPIOF_PIN9 9U
149#define GPIOF_PIN10 10U
150#define GPIOF_PIN11 11U
151#define GPIOF_PIN12 12U
152#define GPIOF_PIN13 13U
153#define GPIOF_PIN14 14U
154#define GPIOF_PIN15 15U
155
156#define GPIOG_PIN0 0U
157#define GPIOG_PIN1 1U
158#define GPIOG_PIN2 2U
159#define GPIOG_PIN3 3U
160#define GPIOG_PIN4 4U
161#define GPIOG_PIN5 5U
162#define GPIOG_PIN6 6U
163#define GPIOG_PIN7 7U
164#define GPIOG_PIN8 8U
165#define GPIOG_PIN9 9U
166#define GPIOG_PIN10 10U
167#define GPIOG_PIN11 11U
168#define GPIOG_PIN12 12U
169#define GPIOG_PIN13 13U
170#define GPIOG_PIN14 14U
171#define GPIOG_PIN15 15U
172
173#define GPIOH_PIN0 0U
174#define GPIOH_PIN1 1U
175#define GPIOH_PIN2 2U
176#define GPIOH_PIN3 3U
177#define GPIOH_PIN4 4U
178#define GPIOH_PIN5 5U
179#define GPIOH_PIN6 6U
180#define GPIOH_PIN7 7U
181#define GPIOH_PIN8 8U
182#define GPIOH_PIN9 9U
183#define GPIOH_PIN10 10U
184#define GPIOH_PIN11 11U
185#define GPIOH_PIN12 12U
186#define GPIOH_PIN13 13U
187#define GPIOH_PIN14 14U
188#define GPIOH_PIN15 15U
189
190/*
191 * IO lines assignments.
192 */
193#define LINE_L3GD20_SDI PAL_LINE(GPIOA, 7U)
194#define LINE_USB_DM PAL_LINE(GPIOA, 11U)
195#define LINE_USB_DP PAL_LINE(GPIOA, 12U)
196#define LINE_SWDIO PAL_LINE(GPIOA, 13U)
197#define LINE_SWCLK PAL_LINE(GPIOA, 14U)
198
199#define LINE_PIN6 PAL_LINE(GPIOF, 0U)
200#define LINE_PIN7 PAL_LINE(GPIOF, 1U)
201
202#define LINE_CAPS_LOCK PAL_LINE(GPIOB, 7U)
203
204
205/*
206 * I/O ports initial setup, this configuration is established soon after reset
207 * in the initialization code.
208 * Please refer to the STM32 Reference Manual for details.
209 */
210#define PIN_MODE_INPUT(n) (0U << ((n) * 2U))
211#define PIN_MODE_OUTPUT(n) (1U << ((n) * 2U))
212#define PIN_MODE_ALTERNATE(n) (2U << ((n) * 2U))
213#define PIN_MODE_ANALOG(n) (3U << ((n) * 2U))
214#define PIN_ODR_LOW(n) (0U << (n))
215#define PIN_ODR_HIGH(n) (1U << (n))
216#define PIN_OTYPE_PUSHPULL(n) (0U << (n))
217#define PIN_OTYPE_OPENDRAIN(n) (1U << (n))
218#define PIN_OSPEED_VERYLOW(n) (0U << ((n) * 2U))
219#define PIN_OSPEED_LOW(n) (1U << ((n) * 2U))
220#define PIN_OSPEED_MEDIUM(n) (2U << ((n) * 2U))
221#define PIN_OSPEED_HIGH(n) (3U << ((n) * 2U))
222#define PIN_PUPDR_FLOATING(n) (0U << ((n) * 2U))
223#define PIN_PUPDR_PULLUP(n) (1U << ((n) * 2U))
224#define PIN_PUPDR_PULLDOWN(n) (2U << ((n) * 2U))
225#define PIN_AFIO_AF(n, v) ((v) << (((n) % 8U) * 4U))
226
227/*
228 * GPIOA setup:
229 *
230 * PA0 - NC
231 * PA1 - NC
232 * PA2 - COL1
233 * PA3 - COL2
234 * PA4 - SPEAKER1
235 * PA5 - SPEAKER2
236 * PA6 - COL3
237 * PA7 - COL8
238 * PA8 - COL6
239 * PA9 - COL7
240 * PA10 - ROW5
241 * PA11 - USB_DM (alternate 14).
242 * PA12 - USB_DP (alternate 14).
243 * PA13 - SWDIO (alternate 0).
244 * PA14 - SWCLK (alternate 0).
245 * PA15 - ROW4
246 */
247#define VAL_GPIOA_MODER (PIN_MODE_INPUT(GPIOA_PIN0) | \
248 PIN_MODE_ALTERNATE(GPIOA_PIN1) | \
249 PIN_MODE_INPUT(GPIOA_PIN2) | \
250 PIN_MODE_INPUT(GPIOA_PIN3) | \
251 PIN_MODE_INPUT(GPIOA_PIN4) | \
252 PIN_MODE_INPUT(GPIOA_PIN5) | \
253 PIN_MODE_INPUT(GPIOA_PIN6) | \
254 PIN_MODE_INPUT(GPIOA_PIN7) | \
255 PIN_MODE_INPUT(GPIOA_PIN8) | \
256 PIN_MODE_INPUT(GPIOA_PIN9) | \
257 PIN_MODE_INPUT(GPIOA_PIN10) | \
258 PIN_MODE_ALTERNATE(GPIOA_USB_DM) | \
259 PIN_MODE_ALTERNATE(GPIOA_USB_DP) | \
260 PIN_MODE_ALTERNATE(GPIOA_SWDIO) | \
261 PIN_MODE_ALTERNATE(GPIOA_SWCLK) | \
262 PIN_MODE_INPUT(GPIOA_PIN15))
263#define VAL_GPIOA_OTYPER (PIN_OTYPE_PUSHPULL(GPIOA_PIN0) | \
264 PIN_OTYPE_PUSHPULL(GPIOA_PIN1) | \
265 PIN_OTYPE_PUSHPULL(GPIOA_PIN2) | \
266 PIN_OTYPE_PUSHPULL(GPIOA_PIN3) | \
267 PIN_OTYPE_PUSHPULL(GPIOA_PIN4) | \
268 PIN_OTYPE_PUSHPULL(GPIOA_PIN5) | \
269 PIN_OTYPE_PUSHPULL(GPIOA_PIN6) | \
270 PIN_OTYPE_PUSHPULL(GPIOA_PIN7) | \
271 PIN_OTYPE_PUSHPULL(GPIOA_PIN8) | \
272 PIN_OTYPE_PUSHPULL(GPIOA_PIN9) | \
273 PIN_OTYPE_PUSHPULL(GPIOA_PIN10) | \
274 PIN_OTYPE_PUSHPULL(GPIOA_USB_DM) | \
275 PIN_OTYPE_PUSHPULL(GPIOA_USB_DP) | \
276 PIN_OTYPE_PUSHPULL(GPIOA_SWDIO) | \
277 PIN_OTYPE_PUSHPULL(GPIOA_SWCLK) | \
278 PIN_OTYPE_PUSHPULL(GPIOA_PIN15))
279#define VAL_GPIOA_OSPEEDR (PIN_OSPEED_VERYLOW(GPIOA_PIN0) | \
280 PIN_OSPEED_HIGH(GPIOA_PIN1) | \
281 PIN_OSPEED_VERYLOW(GPIOA_PIN2) | \
282 PIN_OSPEED_VERYLOW(GPIOA_PIN3) | \
283 PIN_OSPEED_VERYLOW(GPIOA_PIN4) | \
284 PIN_OSPEED_VERYLOW(GPIOA_PIN5) | \
285 PIN_OSPEED_VERYLOW(GPIOA_PIN6) | \
286 PIN_OSPEED_VERYLOW(GPIOA_PIN7) | \
287 PIN_OSPEED_VERYLOW(GPIOA_PIN8) | \
288 PIN_OSPEED_VERYLOW(GPIOA_PIN9) | \
289 PIN_OSPEED_VERYLOW(GPIOA_PIN10) | \
290 PIN_OSPEED_HIGH(GPIOA_USB_DM) | \
291 PIN_OSPEED_VERYLOW(GPIOA_USB_DP) | \
292 PIN_OSPEED_HIGH(GPIOA_SWDIO) | \
293 PIN_OSPEED_HIGH(GPIOA_SWCLK) | \
294 PIN_OSPEED_VERYLOW(GPIOA_PIN15))
295#define VAL_GPIOA_PUPDR (PIN_PUPDR_FLOATING(GPIOA_PIN0) | \
296 PIN_PUPDR_FLOATING(GPIOA_PIN1) | \
297 PIN_PUPDR_PULLUP(GPIOA_PIN2) | \
298 PIN_PUPDR_PULLUP(GPIOA_PIN3) | \
299 PIN_PUPDR_PULLUP(GPIOA_PIN4) | \
300 PIN_PUPDR_PULLUP(GPIOA_PIN5) | \
301 PIN_PUPDR_PULLUP(GPIOA_PIN6) | \
302 PIN_PUPDR_FLOATING(GPIOA_PIN7) | \
303 PIN_PUPDR_PULLUP(GPIOA_PIN8) | \
304 PIN_PUPDR_PULLUP(GPIOA_PIN9) | \
305 PIN_PUPDR_PULLUP(GPIOA_PIN10) | \
306 PIN_PUPDR_FLOATING(GPIOA_USB_DM) | \
307 PIN_PUPDR_FLOATING(GPIOA_USB_DP) | \
308 PIN_PUPDR_PULLUP(GPIOA_SWDIO) | \
309 PIN_PUPDR_PULLDOWN(GPIOA_SWCLK) | \
310 PIN_PUPDR_PULLUP(GPIOA_PIN15))
311#define VAL_GPIOA_ODR (PIN_ODR_HIGH(GPIOA_PIN0) | \
312 PIN_ODR_HIGH(GPIOA_PIN1) | \
313 PIN_ODR_HIGH(GPIOA_PIN2) | \
314 PIN_ODR_HIGH(GPIOA_PIN3) | \
315 PIN_ODR_HIGH(GPIOA_PIN4) | \
316 PIN_ODR_HIGH(GPIOA_PIN5) | \
317 PIN_ODR_HIGH(GPIOA_PIN6) | \
318 PIN_ODR_HIGH(GPIOA_PIN7) | \
319 PIN_ODR_HIGH(GPIOA_PIN8) | \
320 PIN_ODR_HIGH(GPIOA_PIN9) | \
321 PIN_ODR_HIGH(GPIOA_PIN10) | \
322 PIN_ODR_HIGH(GPIOA_USB_DM) | \
323 PIN_ODR_HIGH(GPIOA_USB_DP) | \
324 PIN_ODR_HIGH(GPIOA_SWDIO) | \
325 PIN_ODR_HIGH(GPIOA_SWCLK) | \
326 PIN_ODR_HIGH(GPIOA_PIN15))
327#define VAL_GPIOA_AFRL (PIN_AFIO_AF(GPIOA_PIN0, 0) | \
328 PIN_AFIO_AF(GPIOA_PIN1, 1) | \
329 PIN_AFIO_AF(GPIOA_PIN2, 0) | \
330 PIN_AFIO_AF(GPIOA_PIN3, 0) | \
331 PIN_AFIO_AF(GPIOA_PIN4, 0) | \
332 PIN_AFIO_AF(GPIOA_PIN5, 5) | \
333 PIN_AFIO_AF(GPIOA_PIN6, 5) | \
334 PIN_AFIO_AF(GPIOA_PIN7, 5))
335#define VAL_GPIOA_AFRH (PIN_AFIO_AF(GPIOA_PIN8, 0) | \
336 PIN_AFIO_AF(GPIOA_PIN9, 0) | \
337 PIN_AFIO_AF(GPIOA_PIN10, 0) | \
338 PIN_AFIO_AF(GPIOA_USB_DM, 14) | \
339 PIN_AFIO_AF(GPIOA_USB_DP, 14) | \
340 PIN_AFIO_AF(GPIOA_SWDIO, 0) | \
341 PIN_AFIO_AF(GPIOA_SWCLK, 0) | \
342 PIN_AFIO_AF(GPIOA_PIN15, 0))
343
344/*
345 * GPIOB setup:
346 *
347 * PB0 - PIN0 (input pullup).
348 * PB1 - PIN1 (input pullup).
349 * PB2 - PIN2 (input pullup).
350 * PB3 - PIN3 (alternate 0).
351 * PB4 - PIN4 (input pullup).
352 * PB5 - PIN5 (input pullup).
353 * PB6 - PIN6 LSM303DLHC_SCL (alternate 4).
354 * PB7 - PIN7 LSM303DLHC_SDA (alternate 4).
355 * PB8 - PIN8 (input pullup).
356 * PB9 - PIN9 (input pullup).
357 * PB10 - PIN10 (input pullup).
358 * PB11 - PIN11 (input pullup).
359 * PB12 - PIN12 (input pullup).
360 * PB13 - PIN13 (input pullup).
361 * PB14 - PIN14 (input pullup).
362 * PB15 - PIN15 (input pullup).
363 */
364#define VAL_GPIOB_MODER (PIN_MODE_INPUT(GPIOB_PIN0) | \
365 PIN_MODE_INPUT(GPIOB_PIN1) | \
366 PIN_MODE_INPUT(GPIOB_PIN2) | \
367 PIN_MODE_ALTERNATE(GPIOB_PIN3) | \
368 PIN_MODE_INPUT(GPIOB_PIN4) | \
369 PIN_MODE_INPUT(GPIOB_PIN5) | \
370 PIN_MODE_ALTERNATE(GPIOB_PIN6) | \
371 PIN_MODE_OUTPUT(GPIOB_PIN7) | \
372 PIN_MODE_INPUT(GPIOB_PIN8) | \
373 PIN_MODE_INPUT(GPIOB_PIN9) | \
374 PIN_MODE_INPUT(GPIOB_PIN10) | \
375 PIN_MODE_INPUT(GPIOB_PIN11) | \
376 PIN_MODE_INPUT(GPIOB_PIN12) | \
377 PIN_MODE_INPUT(GPIOB_PIN13) | \
378 PIN_MODE_INPUT(GPIOB_PIN14) | \
379 PIN_MODE_INPUT(GPIOB_PIN15))
380#define VAL_GPIOB_OTYPER (PIN_OTYPE_PUSHPULL(GPIOB_PIN0) | \
381 PIN_OTYPE_PUSHPULL(GPIOB_PIN1) | \
382 PIN_OTYPE_PUSHPULL(GPIOB_PIN2) | \
383 PIN_OTYPE_PUSHPULL(GPIOB_PIN3) | \
384 PIN_OTYPE_PUSHPULL(GPIOB_PIN4) | \
385 PIN_OTYPE_PUSHPULL(GPIOB_PIN5) | \
386 PIN_OTYPE_OPENDRAIN(GPIOB_PIN6) | \
387 PIN_OTYPE_PUSHPULL(GPIOB_PIN7) | \
388 PIN_OTYPE_PUSHPULL(GPIOB_PIN8) | \
389 PIN_OTYPE_PUSHPULL(GPIOB_PIN9) | \
390 PIN_OTYPE_PUSHPULL(GPIOB_PIN10) | \
391 PIN_OTYPE_PUSHPULL(GPIOB_PIN11) | \
392 PIN_OTYPE_PUSHPULL(GPIOB_PIN12) | \
393 PIN_OTYPE_PUSHPULL(GPIOB_PIN13) | \
394 PIN_OTYPE_PUSHPULL(GPIOB_PIN14) | \
395 PIN_OTYPE_PUSHPULL(GPIOB_PIN15))
396#define VAL_GPIOB_OSPEEDR (PIN_OSPEED_VERYLOW(GPIOB_PIN0) | \
397 PIN_OSPEED_VERYLOW(GPIOB_PIN1) | \
398 PIN_OSPEED_VERYLOW(GPIOB_PIN2) | \
399 PIN_OSPEED_HIGH(GPIOB_PIN3) | \
400 PIN_OSPEED_VERYLOW(GPIOB_PIN4) | \
401 PIN_OSPEED_VERYLOW(GPIOB_PIN5) | \
402 PIN_OSPEED_HIGH(GPIOB_PIN6) | \
403 PIN_OSPEED_VERYLOW(GPIOB_PIN7) | \
404 PIN_OSPEED_VERYLOW(GPIOB_PIN8) | \
405 PIN_OSPEED_VERYLOW(GPIOB_PIN9) | \
406 PIN_OSPEED_VERYLOW(GPIOB_PIN10) | \
407 PIN_OSPEED_VERYLOW(GPIOB_PIN11) | \
408 PIN_OSPEED_VERYLOW(GPIOB_PIN12) | \
409 PIN_OSPEED_VERYLOW(GPIOB_PIN13) | \
410 PIN_OSPEED_VERYLOW(GPIOB_PIN14) | \
411 PIN_OSPEED_VERYLOW(GPIOB_PIN15))
412#define VAL_GPIOB_PUPDR (PIN_PUPDR_PULLUP(GPIOB_PIN0) | \
413 PIN_PUPDR_PULLUP(GPIOB_PIN1) | \
414 PIN_PUPDR_PULLUP(GPIOB_PIN2) | \
415 PIN_PUPDR_FLOATING(GPIOB_PIN3) | \
416 PIN_PUPDR_PULLUP(GPIOB_PIN4) | \
417 PIN_PUPDR_PULLUP(GPIOB_PIN5) | \
418 PIN_PUPDR_FLOATING(GPIOB_PIN6) | \
419 PIN_PUPDR_PULLDOWN(GPIOB_PIN7) | \
420 PIN_PUPDR_PULLUP(GPIOB_PIN8) | \
421 PIN_PUPDR_PULLUP(GPIOB_PIN9) | \
422 PIN_PUPDR_PULLUP(GPIOB_PIN10) | \
423 PIN_PUPDR_PULLUP(GPIOB_PIN11) | \
424 PIN_PUPDR_PULLUP(GPIOB_PIN12) | \
425 PIN_PUPDR_PULLUP(GPIOB_PIN13) | \
426 PIN_PUPDR_PULLUP(GPIOB_PIN14) | \
427 PIN_PUPDR_PULLUP(GPIOB_PIN15))
428#define VAL_GPIOB_ODR (PIN_ODR_HIGH(GPIOB_PIN0) | \
429 PIN_ODR_HIGH(GPIOB_PIN1) | \
430 PIN_ODR_HIGH(GPIOB_PIN2) | \
431 PIN_ODR_HIGH(GPIOB_PIN3) | \
432 PIN_ODR_HIGH(GPIOB_PIN4) | \
433 PIN_ODR_HIGH(GPIOB_PIN5) | \
434 PIN_ODR_HIGH(GPIOB_PIN6) | \
435 PIN_ODR_LOW(GPIOB_PIN7) | \
436 PIN_ODR_HIGH(GPIOB_PIN8) | \
437 PIN_ODR_HIGH(GPIOB_PIN9) | \
438 PIN_ODR_HIGH(GPIOB_PIN10) | \
439 PIN_ODR_HIGH(GPIOB_PIN11) | \
440 PIN_ODR_HIGH(GPIOB_PIN12) | \
441 PIN_ODR_HIGH(GPIOB_PIN13) | \
442 PIN_ODR_HIGH(GPIOB_PIN14) | \
443 PIN_ODR_HIGH(GPIOB_PIN15))
444#define VAL_GPIOB_AFRL (PIN_AFIO_AF(GPIOB_PIN0, 0) | \
445 PIN_AFIO_AF(GPIOB_PIN1, 0) | \
446 PIN_AFIO_AF(GPIOB_PIN2, 0) | \
447 PIN_AFIO_AF(GPIOB_PIN3, 0) | \
448 PIN_AFIO_AF(GPIOB_PIN4, 0) | \
449 PIN_AFIO_AF(GPIOB_PIN5, 0) | \
450 PIN_AFIO_AF(GPIOB_PIN6, 4) | \
451 PIN_AFIO_AF(GPIOB_PIN7, 0))
452#define VAL_GPIOB_AFRH (PIN_AFIO_AF(GPIOB_PIN8, 0) | \
453 PIN_AFIO_AF(GPIOB_PIN9, 0) | \
454 PIN_AFIO_AF(GPIOB_PIN10, 0) | \
455 PIN_AFIO_AF(GPIOB_PIN11, 0) | \
456 PIN_AFIO_AF(GPIOB_PIN12, 0) | \
457 PIN_AFIO_AF(GPIOB_PIN13, 0) | \
458 PIN_AFIO_AF(GPIOB_PIN14, 0) | \
459 PIN_AFIO_AF(GPIOB_PIN15, 0))
460
461/*
462 * GPIOC setup:
463 *
464 * PC0 - PIN0 (input pullup).
465 * PC1 - PIN1 (input pullup).
466 * PC2 - PIN2 (input pullup).
467 * PC3 - PIN3 (input pullup).
468 * PC4 - PIN4 (input pullup).
469 * PC5 - PIN5 (input pullup).
470 * PC6 - PIN6 (input pullup).
471 * PC7 - PIN7 (input pullup).
472 * PC8 - PIN8 (input pullup).
473 * PC9 - PIN9 (input pullup).
474 * PC10 - PIN10 (input pullup).
475 * PC11 - PIN11 (input pullup).
476 * PC12 - PIN12 (input pullup).
477 * PC13 - PIN13 (input pullup).
478 * PC14 - PIN14 (input floating).
479 * PC15 - PIN15 (input floating).
480 */
481#define VAL_GPIOC_MODER (PIN_MODE_INPUT(GPIOC_PIN0) | \
482 PIN_MODE_INPUT(GPIOC_PIN1) | \
483 PIN_MODE_INPUT(GPIOC_PIN2) | \
484 PIN_MODE_INPUT(GPIOC_PIN3) | \
485 PIN_MODE_INPUT(GPIOC_PIN4) | \
486 PIN_MODE_INPUT(GPIOC_PIN5) | \
487 PIN_MODE_INPUT(GPIOC_PIN6) | \
488 PIN_MODE_INPUT(GPIOC_PIN7) | \
489 PIN_MODE_INPUT(GPIOC_PIN8) | \
490 PIN_MODE_INPUT(GPIOC_PIN9) | \
491 PIN_MODE_INPUT(GPIOC_PIN10) | \
492 PIN_MODE_INPUT(GPIOC_PIN11) | \
493 PIN_MODE_INPUT(GPIOC_PIN12) | \
494 PIN_MODE_INPUT(GPIOC_PIN13) | \
495 PIN_MODE_INPUT(GPIOC_PIN14) | \
496 PIN_MODE_INPUT(GPIOC_PIN15))
497#define VAL_GPIOC_OTYPER (PIN_OTYPE_PUSHPULL(GPIOC_PIN0) | \
498 PIN_OTYPE_PUSHPULL(GPIOC_PIN1) | \
499 PIN_OTYPE_PUSHPULL(GPIOC_PIN2) | \
500 PIN_OTYPE_PUSHPULL(GPIOC_PIN3) | \
501 PIN_OTYPE_PUSHPULL(GPIOC_PIN4) | \
502 PIN_OTYPE_PUSHPULL(GPIOC_PIN5) | \
503 PIN_OTYPE_PUSHPULL(GPIOC_PIN6) | \
504 PIN_OTYPE_PUSHPULL(GPIOC_PIN7) | \
505 PIN_OTYPE_PUSHPULL(GPIOC_PIN8) | \
506 PIN_OTYPE_PUSHPULL(GPIOC_PIN9) | \
507 PIN_OTYPE_PUSHPULL(GPIOC_PIN10) | \
508 PIN_OTYPE_PUSHPULL(GPIOC_PIN11) | \
509 PIN_OTYPE_PUSHPULL(GPIOC_PIN12) | \
510 PIN_OTYPE_PUSHPULL(GPIOC_PIN13) | \
511 PIN_OTYPE_PUSHPULL(GPIOC_PIN14) | \
512 PIN_OTYPE_PUSHPULL(GPIOC_PIN15))
513#define VAL_GPIOC_OSPEEDR (PIN_OSPEED_VERYLOW(GPIOC_PIN0) | \
514 PIN_OSPEED_VERYLOW(GPIOC_PIN1) | \
515 PIN_OSPEED_VERYLOW(GPIOC_PIN2) | \
516 PIN_OSPEED_VERYLOW(GPIOC_PIN3) | \
517 PIN_OSPEED_VERYLOW(GPIOC_PIN4) | \
518 PIN_OSPEED_VERYLOW(GPIOC_PIN5) | \
519 PIN_OSPEED_VERYLOW(GPIOC_PIN6) | \
520 PIN_OSPEED_VERYLOW(GPIOC_PIN7) | \
521 PIN_OSPEED_VERYLOW(GPIOC_PIN8) | \
522 PIN_OSPEED_VERYLOW(GPIOC_PIN9) | \
523 PIN_OSPEED_VERYLOW(GPIOC_PIN10) | \
524 PIN_OSPEED_VERYLOW(GPIOC_PIN11) | \
525 PIN_OSPEED_VERYLOW(GPIOC_PIN12) | \
526 PIN_OSPEED_VERYLOW(GPIOC_PIN13) | \
527 PIN_OSPEED_HIGH(GPIOC_PIN14) | \
528 PIN_OSPEED_HIGH(GPIOC_PIN15))
529#define VAL_GPIOC_PUPDR (PIN_PUPDR_PULLUP(GPIOC_PIN0) | \
530 PIN_PUPDR_PULLUP(GPIOC_PIN1) | \
531 PIN_PUPDR_PULLUP(GPIOC_PIN2) | \
532 PIN_PUPDR_PULLUP(GPIOC_PIN3) | \
533 PIN_PUPDR_PULLUP(GPIOC_PIN4) | \
534 PIN_PUPDR_PULLUP(GPIOC_PIN5) | \
535 PIN_PUPDR_PULLUP(GPIOC_PIN6) | \
536 PIN_PUPDR_PULLUP(GPIOC_PIN7) | \
537 PIN_PUPDR_PULLUP(GPIOC_PIN8) | \
538 PIN_PUPDR_PULLUP(GPIOC_PIN9) | \
539 PIN_PUPDR_PULLUP(GPIOC_PIN10) | \
540 PIN_PUPDR_PULLUP(GPIOC_PIN11) | \
541 PIN_PUPDR_PULLUP(GPIOC_PIN12) | \
542 PIN_PUPDR_PULLUP(GPIOC_PIN13) | \
543 PIN_PUPDR_FLOATING(GPIOC_PIN14) | \
544 PIN_PUPDR_FLOATING(GPIOC_PIN15))
545#define VAL_GPIOC_ODR (PIN_ODR_HIGH(GPIOC_PIN0) | \
546 PIN_ODR_HIGH(GPIOC_PIN1) | \
547 PIN_ODR_HIGH(GPIOC_PIN2) | \
548 PIN_ODR_HIGH(GPIOC_PIN3) | \
549 PIN_ODR_HIGH(GPIOC_PIN4) | \
550 PIN_ODR_HIGH(GPIOC_PIN5) | \
551 PIN_ODR_HIGH(GPIOC_PIN6) | \
552 PIN_ODR_HIGH(GPIOC_PIN7) | \
553 PIN_ODR_HIGH(GPIOC_PIN8) | \
554 PIN_ODR_HIGH(GPIOC_PIN9) | \
555 PIN_ODR_HIGH(GPIOC_PIN10) | \
556 PIN_ODR_HIGH(GPIOC_PIN11) | \
557 PIN_ODR_HIGH(GPIOC_PIN12) | \
558 PIN_ODR_HIGH(GPIOC_PIN13) | \
559 PIN_ODR_HIGH(GPIOC_PIN14) | \
560 PIN_ODR_HIGH(GPIOC_PIN15))
561#define VAL_GPIOC_AFRL (PIN_AFIO_AF(GPIOC_PIN0, 0) | \
562 PIN_AFIO_AF(GPIOC_PIN1, 0) | \
563 PIN_AFIO_AF(GPIOC_PIN2, 0) | \
564 PIN_AFIO_AF(GPIOC_PIN3, 0) | \
565 PIN_AFIO_AF(GPIOC_PIN4, 0) | \
566 PIN_AFIO_AF(GPIOC_PIN5, 0) | \
567 PIN_AFIO_AF(GPIOC_PIN6, 0) | \
568 PIN_AFIO_AF(GPIOC_PIN7, 0))
569#define VAL_GPIOC_AFRH (PIN_AFIO_AF(GPIOC_PIN8, 0) | \
570 PIN_AFIO_AF(GPIOC_PIN9, 0) | \
571 PIN_AFIO_AF(GPIOC_PIN10, 0) | \
572 PIN_AFIO_AF(GPIOC_PIN11, 0) | \
573 PIN_AFIO_AF(GPIOC_PIN12, 0) | \
574 PIN_AFIO_AF(GPIOC_PIN13, 0) | \
575 PIN_AFIO_AF(GPIOC_PIN14, 0) | \
576 PIN_AFIO_AF(GPIOC_PIN15, 0))
577
578/*
579 * GPIOD setup:
580 *
581 * PD0 - PIN0 (input pullup).
582 * PD1 - PIN1 (input pullup).
583 * PD2 - PIN2 (input pullup).
584 * PD3 - PIN3 (input pullup).
585 * PD4 - PIN4 (input pullup).
586 * PD5 - PIN5 (input pullup).
587 * PD6 - PIN6 (input pullup).
588 * PD7 - PIN7 (input pullup).
589 * PD8 - PIN8 (input pullup).
590 * PD9 - PIN9 (input pullup).
591 * PD11 - PIN10 (input pullup).
592 * PD11 - PIN11 (input pullup).
593 * PD12 - PIN12 (input pullup).
594 * PD13 - PIN13 (input pullup).
595 * PD14 - PIN14 (input pullup).
596 * PD15 - PIN15 (input pullup).
597 */
598#define VAL_GPIOD_MODER (PIN_MODE_INPUT(GPIOD_PIN0) | \
599 PIN_MODE_INPUT(GPIOD_PIN1) | \
600 PIN_MODE_INPUT(GPIOD_PIN2) | \
601 PIN_MODE_INPUT(GPIOD_PIN3) | \
602 PIN_MODE_INPUT(GPIOD_PIN4) | \
603 PIN_MODE_INPUT(GPIOD_PIN5) | \
604 PIN_MODE_INPUT(GPIOD_PIN6) | \
605 PIN_MODE_INPUT(GPIOD_PIN7) | \
606 PIN_MODE_INPUT(GPIOD_PIN8) | \
607 PIN_MODE_INPUT(GPIOD_PIN9) | \
608 PIN_MODE_INPUT(GPIOD_PIN10) | \
609 PIN_MODE_INPUT(GPIOD_PIN11) | \
610 PIN_MODE_INPUT(GPIOD_PIN12) | \
611 PIN_MODE_INPUT(GPIOD_PIN13) | \
612 PIN_MODE_INPUT(GPIOD_PIN14) | \
613 PIN_MODE_INPUT(GPIOD_PIN15))
614#define VAL_GPIOD_OTYPER (PIN_OTYPE_PUSHPULL(GPIOD_PIN0) | \
615 PIN_OTYPE_PUSHPULL(GPIOD_PIN1) | \
616 PIN_OTYPE_PUSHPULL(GPIOD_PIN2) | \
617 PIN_OTYPE_PUSHPULL(GPIOD_PIN3) | \
618 PIN_OTYPE_PUSHPULL(GPIOD_PIN4) | \
619 PIN_OTYPE_PUSHPULL(GPIOD_PIN5) | \
620 PIN_OTYPE_PUSHPULL(GPIOD_PIN6) | \
621 PIN_OTYPE_PUSHPULL(GPIOD_PIN7) | \
622 PIN_OTYPE_PUSHPULL(GPIOD_PIN8) | \
623 PIN_OTYPE_PUSHPULL(GPIOD_PIN9) | \
624 PIN_OTYPE_PUSHPULL(GPIOD_PIN10) | \
625 PIN_OTYPE_PUSHPULL(GPIOD_PIN11) | \
626 PIN_OTYPE_PUSHPULL(GPIOD_PIN12) | \
627 PIN_OTYPE_PUSHPULL(GPIOD_PIN13) | \
628 PIN_OTYPE_PUSHPULL(GPIOD_PIN14) | \
629 PIN_OTYPE_PUSHPULL(GPIOD_PIN15))
630#define VAL_GPIOD_OSPEEDR (PIN_OSPEED_VERYLOW(GPIOD_PIN0) | \
631 PIN_OSPEED_VERYLOW(GPIOD_PIN1) | \
632 PIN_OSPEED_VERYLOW(GPIOD_PIN2) | \
633 PIN_OSPEED_VERYLOW(GPIOD_PIN3) | \
634 PIN_OSPEED_VERYLOW(GPIOD_PIN4) | \
635 PIN_OSPEED_VERYLOW(GPIOD_PIN5) | \
636 PIN_OSPEED_VERYLOW(GPIOD_PIN6) | \
637 PIN_OSPEED_VERYLOW(GPIOD_PIN7) | \
638 PIN_OSPEED_VERYLOW(GPIOD_PIN8) | \
639 PIN_OSPEED_VERYLOW(GPIOD_PIN9) | \
640 PIN_OSPEED_VERYLOW(GPIOD_PIN10) | \
641 PIN_OSPEED_VERYLOW(GPIOD_PIN11) | \
642 PIN_OSPEED_VERYLOW(GPIOD_PIN12) | \
643 PIN_OSPEED_VERYLOW(GPIOD_PIN13) | \
644 PIN_OSPEED_VERYLOW(GPIOD_PIN14) | \
645 PIN_OSPEED_VERYLOW(GPIOD_PIN15))
646#define VAL_GPIOD_PUPDR (PIN_PUPDR_PULLUP(GPIOD_PIN0) | \
647 PIN_PUPDR_PULLUP(GPIOD_PIN1) | \
648 PIN_PUPDR_PULLUP(GPIOD_PIN2) | \
649 PIN_PUPDR_PULLUP(GPIOD_PIN3) | \
650 PIN_PUPDR_PULLUP(GPIOD_PIN4) | \
651 PIN_PUPDR_PULLUP(GPIOD_PIN5) | \
652 PIN_PUPDR_PULLUP(GPIOD_PIN6) | \
653 PIN_PUPDR_PULLUP(GPIOD_PIN7) | \
654 PIN_PUPDR_PULLUP(GPIOD_PIN8) | \
655 PIN_PUPDR_PULLUP(GPIOD_PIN9) | \
656 PIN_PUPDR_PULLUP(GPIOD_PIN10) | \
657 PIN_PUPDR_PULLUP(GPIOD_PIN11) | \
658 PIN_PUPDR_PULLUP(GPIOD_PIN12) | \
659 PIN_PUPDR_PULLUP(GPIOD_PIN13) | \
660 PIN_PUPDR_PULLUP(GPIOD_PIN14) | \
661 PIN_PUPDR_PULLUP(GPIOD_PIN15))
662#define VAL_GPIOD_ODR (PIN_ODR_HIGH(GPIOD_PIN0) | \
663 PIN_ODR_HIGH(GPIOD_PIN1) | \
664 PIN_ODR_HIGH(GPIOD_PIN2) | \
665 PIN_ODR_HIGH(GPIOD_PIN3) | \
666 PIN_ODR_HIGH(GPIOD_PIN4) | \
667 PIN_ODR_HIGH(GPIOD_PIN5) | \
668 PIN_ODR_HIGH(GPIOD_PIN6) | \
669 PIN_ODR_HIGH(GPIOD_PIN7) | \
670 PIN_ODR_HIGH(GPIOD_PIN8) | \
671 PIN_ODR_HIGH(GPIOD_PIN9) | \
672 PIN_ODR_HIGH(GPIOD_PIN10) | \
673 PIN_ODR_HIGH(GPIOD_PIN11) | \
674 PIN_ODR_HIGH(GPIOD_PIN12) | \
675 PIN_ODR_HIGH(GPIOD_PIN13) | \
676 PIN_ODR_HIGH(GPIOD_PIN14) | \
677 PIN_ODR_HIGH(GPIOD_PIN15))
678#define VAL_GPIOD_AFRL (PIN_AFIO_AF(GPIOD_PIN0, 0) | \
679 PIN_AFIO_AF(GPIOD_PIN1, 0) | \
680 PIN_AFIO_AF(GPIOD_PIN2, 0) | \
681 PIN_AFIO_AF(GPIOD_PIN3, 0) | \
682 PIN_AFIO_AF(GPIOD_PIN4, 0) | \
683 PIN_AFIO_AF(GPIOD_PIN5, 0) | \
684 PIN_AFIO_AF(GPIOD_PIN6, 0) | \
685 PIN_AFIO_AF(GPIOD_PIN7, 0))
686#define VAL_GPIOD_AFRH (PIN_AFIO_AF(GPIOD_PIN8, 0) | \
687 PIN_AFIO_AF(GPIOD_PIN9, 0) | \
688 PIN_AFIO_AF(GPIOD_PIN10, 0) | \
689 PIN_AFIO_AF(GPIOD_PIN11, 0) | \
690 PIN_AFIO_AF(GPIOD_PIN12, 0) | \
691 PIN_AFIO_AF(GPIOD_PIN13, 0) | \
692 PIN_AFIO_AF(GPIOD_PIN14, 0) | \
693 PIN_AFIO_AF(GPIOD_PIN15, 0))
694
695/*
696 * GPIOE setup:
697 *
698 * PE0 - PIN0 (input pullup).
699 * PE1 - PIN1 (input pullup).
700 * PE2 - PIN2 (input pullup).
701 * PE3 - PIN3 L3GD20_CS (output pushpull maximum).
702 * PE4 - PIN4 (input pullup).
703 * PE5 - PIN5 (input pullup).
704 * PE6 - PIN6 (input pullup).
705 * PE7 - PIN7 (input pullup).
706 * PE8 - PIN8 (output pushpull maximum).
707 * PE9 - PIN9 (output pushpull maximum).
708 * PE10 - PIN10 (output pushpull maximum).
709 * PE11 - PIN11 (output pushpull maximum).
710 * PE12 - PIN12 (output pushpull maximum).
711 * PE13 - PIN13 (output pushpull maximum).
712 * PE14 - PIN14 (output pushpull maximum).
713 * PE15 - PIN15 (output pushpull maximum).
714 */
715#define VAL_GPIOE_MODER (PIN_MODE_INPUT(GPIOE_PIN0) | \
716 PIN_MODE_INPUT(GPIOE_PIN1) | \
717 PIN_MODE_INPUT(GPIOE_PIN2) |\
718 PIN_MODE_OUTPUT(GPIOE_PIN3) | \
719 PIN_MODE_INPUT(GPIOE_PIN4) |\
720 PIN_MODE_INPUT(GPIOE_PIN5) |\
721 PIN_MODE_INPUT(GPIOE_PIN6) | \
722 PIN_MODE_INPUT(GPIOE_PIN7) | \
723 PIN_MODE_OUTPUT(GPIOE_PIN8) | \
724 PIN_MODE_OUTPUT(GPIOE_PIN9) | \
725 PIN_MODE_OUTPUT(GPIOE_PIN10) | \
726 PIN_MODE_OUTPUT(GPIOE_PIN11) | \
727 PIN_MODE_OUTPUT(GPIOE_PIN12) | \
728 PIN_MODE_OUTPUT(GPIOE_PIN13) | \
729 PIN_MODE_OUTPUT(GPIOE_PIN14) | \
730 PIN_MODE_OUTPUT(GPIOE_PIN15))
731#define VAL_GPIOE_OTYPER (PIN_OTYPE_PUSHPULL(GPIOE_PIN0) |\
732 PIN_OTYPE_PUSHPULL(GPIOE_PIN1) |\
733 PIN_OTYPE_PUSHPULL(GPIOE_PIN2) |\
734 PIN_OTYPE_PUSHPULL(GPIOE_PIN3) | \
735 PIN_OTYPE_PUSHPULL(GPIOE_PIN4) |\
736 PIN_OTYPE_PUSHPULL(GPIOE_PIN5) |\
737 PIN_OTYPE_PUSHPULL(GPIOE_PIN6) | \
738 PIN_OTYPE_PUSHPULL(GPIOE_PIN7) | \
739 PIN_OTYPE_PUSHPULL(GPIOE_PIN8) | \
740 PIN_OTYPE_PUSHPULL(GPIOE_PIN9) | \
741 PIN_OTYPE_PUSHPULL(GPIOE_PIN10) |\
742 PIN_OTYPE_PUSHPULL(GPIOE_PIN11) | \
743 PIN_OTYPE_PUSHPULL(GPIOE_PIN12) | \
744 PIN_OTYPE_PUSHPULL(GPIOE_PIN13) | \
745 PIN_OTYPE_PUSHPULL(GPIOE_PIN14) |\
746 PIN_OTYPE_PUSHPULL(GPIOE_PIN15))
747#define VAL_GPIOE_OSPEEDR (PIN_OSPEED_VERYLOW(GPIOE_PIN0) |\
748 PIN_OSPEED_VERYLOW(GPIOE_PIN1) |\
749 PIN_OSPEED_VERYLOW(GPIOE_PIN2) |\
750 PIN_OSPEED_HIGH(GPIOE_PIN3) | \
751 PIN_OSPEED_VERYLOW(GPIOE_PIN4) |\
752 PIN_OSPEED_VERYLOW(GPIOE_PIN5) |\
753 PIN_OSPEED_VERYLOW(GPIOE_PIN6) | \
754 PIN_OSPEED_VERYLOW(GPIOE_PIN7) | \
755 PIN_OSPEED_HIGH(GPIOE_PIN8) | \
756 PIN_OSPEED_HIGH(GPIOE_PIN9) | \
757 PIN_OSPEED_HIGH(GPIOE_PIN10) | \
758 PIN_OSPEED_HIGH(GPIOE_PIN11) | \
759 PIN_OSPEED_HIGH(GPIOE_PIN12) | \
760 PIN_OSPEED_HIGH(GPIOE_PIN13) | \
761 PIN_OSPEED_HIGH(GPIOE_PIN14) | \
762 PIN_OSPEED_HIGH(GPIOE_PIN15))
763#define VAL_GPIOE_PUPDR (PIN_PUPDR_PULLUP(GPIOE_PIN0) | \
764 PIN_PUPDR_PULLUP(GPIOE_PIN1) | \
765 PIN_PUPDR_PULLUP(GPIOE_PIN2) |\
766 PIN_PUPDR_FLOATING(GPIOE_PIN3) | \
767 PIN_PUPDR_PULLUP(GPIOE_PIN4) |\
768 PIN_PUPDR_PULLUP(GPIOE_PIN5) |\
769 PIN_PUPDR_PULLUP(GPIOE_PIN6) | \
770 PIN_PUPDR_PULLUP(GPIOE_PIN7) | \
771 PIN_PUPDR_PULLUP(GPIOE_PIN8) | \
772 PIN_PUPDR_PULLUP(GPIOE_PIN9) | \
773 PIN_PUPDR_PULLUP(GPIOE_PIN10) | \
774 PIN_PUPDR_FLOATING(GPIOE_PIN11) | \
775 PIN_PUPDR_PULLUP(GPIOE_PIN12) | \
776 PIN_PUPDR_FLOATING(GPIOE_PIN13) | \
777 PIN_PUPDR_FLOATING(GPIOE_PIN14) |\
778 PIN_PUPDR_FLOATING(GPIOE_PIN15))
779#define VAL_GPIOE_ODR (PIN_ODR_HIGH(GPIOE_PIN0) | \
780 PIN_ODR_HIGH(GPIOE_PIN1) | \
781 PIN_ODR_HIGH(GPIOE_PIN2) | \
782 PIN_ODR_HIGH(GPIOE_PIN3) | \
783 PIN_ODR_HIGH(GPIOE_PIN4) | \
784 PIN_ODR_HIGH(GPIOE_PIN5) | \
785 PIN_ODR_HIGH(GPIOE_PIN6) | \
786 PIN_ODR_HIGH(GPIOE_PIN7) | \
787 PIN_ODR_LOW(GPIOE_PIN8) | \
788 PIN_ODR_LOW(GPIOE_PIN9) | \
789 PIN_ODR_LOW(GPIOE_PIN10) | \
790 PIN_ODR_LOW(GPIOE_PIN11) | \
791 PIN_ODR_LOW(GPIOE_PIN12) | \
792 PIN_ODR_LOW(GPIOE_PIN13) | \
793 PIN_ODR_LOW(GPIOE_PIN14) | \
794 PIN_ODR_LOW(GPIOE_PIN15))
795#define VAL_GPIOE_AFRL (PIN_AFIO_AF(GPIOE_PIN0, 0) | \
796 PIN_AFIO_AF(GPIOE_PIN1, 0) | \
797 PIN_AFIO_AF(GPIOE_PIN2, 0) |\
798 PIN_AFIO_AF(GPIOE_PIN3, 0) | \
799 PIN_AFIO_AF(GPIOE_PIN4, 0) |\
800 PIN_AFIO_AF(GPIOE_PIN5, 0) |\
801 PIN_AFIO_AF(GPIOE_PIN6, 0) | \
802 PIN_AFIO_AF(GPIOE_PIN7, 0))
803#define VAL_GPIOE_AFRH (PIN_AFIO_AF(GPIOE_PIN8, 0) | \
804 PIN_AFIO_AF(GPIOE_PIN9, 0) | \
805 PIN_AFIO_AF(GPIOE_PIN10, 0) | \
806 PIN_AFIO_AF(GPIOE_PIN11, 0) | \
807 PIN_AFIO_AF(GPIOE_PIN12, 0) | \
808 PIN_AFIO_AF(GPIOE_PIN13, 0) | \
809 PIN_AFIO_AF(GPIOE_PIN14, 0) | \
810 PIN_AFIO_AF(GPIOE_PIN15, 0))
811
812/*
813 * GPIOF setup:
814 *
815 * PF0 - I2C2_SDA (input floating).
816 * PF1 - I2C2_SCL (input floating).
817 * PF2 - PIN2 (input pullup).
818 * PF3 - PIN3 (input pullup).
819 * PF4 - PIN4 (input pullup).
820 * PF5 - PIN5 (input pullup).
821 * PF6 - PIN6 (input pullup).
822 * PF7 - PIN7 (input pullup).
823 * PF8 - PIN8 (input pullup).
824 * PF9 - PIN9 (input pullup).
825 * PF10 - PIN10 (input pullup).
826 * PF11 - PIN11 (input pullup).
827 * PF12 - PIN12 (input pullup).
828 * PF13 - PIN13 (input pullup).
829 * PF14 - PIN14 (input pullup).
830 * PF15 - PIN15 (input pullup).
831 */
832#define VAL_GPIOF_MODER (PIN_MODE_INPUT(GPIOF_I2C2_SDA) | \
833 PIN_MODE_INPUT(GPIOF_I2C2_SCL) | \
834 PIN_MODE_INPUT(GPIOF_PIN2) | \
835 PIN_MODE_INPUT(GPIOF_PIN3) | \
836 PIN_MODE_INPUT(GPIOF_PIN4) | \
837 PIN_MODE_INPUT(GPIOF_PIN5) | \
838 PIN_MODE_INPUT(GPIOF_PIN6) | \
839 PIN_MODE_INPUT(GPIOF_PIN7) | \
840 PIN_MODE_INPUT(GPIOF_PIN8) | \
841 PIN_MODE_INPUT(GPIOF_PIN9) | \
842 PIN_MODE_INPUT(GPIOF_PIN10) | \
843 PIN_MODE_INPUT(GPIOF_PIN11) | \
844 PIN_MODE_INPUT(GPIOF_PIN12) | \
845 PIN_MODE_INPUT(GPIOF_PIN13) | \
846 PIN_MODE_INPUT(GPIOF_PIN14) | \
847 PIN_MODE_INPUT(GPIOF_PIN15))
848#define VAL_GPIOF_OTYPER (PIN_OTYPE_PUSHPULL(GPIOF_I2C2_SDA) | \
849 PIN_OTYPE_PUSHPULL(GPIOF_I2C2_SCL) | \
850 PIN_OTYPE_PUSHPULL(GPIOF_PIN2) | \
851 PIN_OTYPE_PUSHPULL(GPIOF_PIN3) | \
852 PIN_OTYPE_PUSHPULL(GPIOF_PIN4) | \
853 PIN_OTYPE_PUSHPULL(GPIOF_PIN5) | \
854 PIN_OTYPE_PUSHPULL(GPIOF_PIN6) | \
855 PIN_OTYPE_PUSHPULL(GPIOF_PIN7) | \
856 PIN_OTYPE_PUSHPULL(GPIOF_PIN8) | \
857 PIN_OTYPE_PUSHPULL(GPIOF_PIN9) | \
858 PIN_OTYPE_PUSHPULL(GPIOF_PIN10) | \
859 PIN_OTYPE_PUSHPULL(GPIOF_PIN11) | \
860 PIN_OTYPE_PUSHPULL(GPIOF_PIN12) | \
861 PIN_OTYPE_PUSHPULL(GPIOF_PIN13) | \
862 PIN_OTYPE_PUSHPULL(GPIOF_PIN14) | \
863 PIN_OTYPE_PUSHPULL(GPIOF_PIN15))
864#define VAL_GPIOF_OSPEEDR (PIN_OSPEED_HIGH(GPIOF_I2C2_SDA) | \
865 PIN_OSPEED_HIGH(GPIOF_I2C2_SCL) | \
866 PIN_OSPEED_VERYLOW(GPIOF_PIN2) | \
867 PIN_OSPEED_VERYLOW(GPIOF_PIN3) | \
868 PIN_OSPEED_VERYLOW(GPIOF_PIN4) | \
869 PIN_OSPEED_VERYLOW(GPIOF_PIN5) | \
870 PIN_OSPEED_VERYLOW(GPIOF_PIN6) | \
871 PIN_OSPEED_VERYLOW(GPIOF_PIN7) | \
872 PIN_OSPEED_VERYLOW(GPIOF_PIN8) | \
873 PIN_OSPEED_VERYLOW(GPIOF_PIN9) | \
874 PIN_OSPEED_VERYLOW(GPIOF_PIN10) | \
875 PIN_OSPEED_VERYLOW(GPIOF_PIN11) | \
876 PIN_OSPEED_VERYLOW(GPIOF_PIN12) | \
877 PIN_OSPEED_VERYLOW(GPIOF_PIN13) | \
878 PIN_OSPEED_VERYLOW(GPIOF_PIN14) | \
879 PIN_OSPEED_VERYLOW(GPIOF_PIN15))
880#define VAL_GPIOF_PUPDR (PIN_PUPDR_FLOATING(GPIOF_I2C2_SDA) | \
881 PIN_PUPDR_FLOATING(GPIOF_I2C2_SCL) | \
882 PIN_PUPDR_PULLUP(GPIOF_PIN2) | \
883 PIN_PUPDR_PULLUP(GPIOF_PIN3) | \
884 PIN_PUPDR_PULLUP(GPIOF_PIN4) | \
885 PIN_PUPDR_PULLUP(GPIOF_PIN5) | \
886 PIN_PUPDR_PULLUP(GPIOF_PIN6) | \
887 PIN_PUPDR_PULLUP(GPIOF_PIN7) | \
888 PIN_PUPDR_PULLUP(GPIOF_PIN8) | \
889 PIN_PUPDR_PULLUP(GPIOF_PIN9) | \
890 PIN_PUPDR_PULLUP(GPIOF_PIN10) | \
891 PIN_PUPDR_PULLUP(GPIOF_PIN11) | \
892 PIN_PUPDR_PULLUP(GPIOF_PIN12) | \
893 PIN_PUPDR_PULLUP(GPIOF_PIN13) | \
894 PIN_PUPDR_PULLUP(GPIOF_PIN14) | \
895 PIN_PUPDR_PULLUP(GPIOF_PIN15))
896#define VAL_GPIOF_ODR (PIN_ODR_HIGH(GPIOF_I2C2_SDA) | \
897 PIN_ODR_HIGH(GPIOF_I2C2_SCL) | \
898 PIN_ODR_HIGH(GPIOF_PIN2) | \
899 PIN_ODR_HIGH(GPIOF_PIN3) | \
900 PIN_ODR_HIGH(GPIOF_PIN4) | \
901 PIN_ODR_HIGH(GPIOF_PIN5) | \
902 PIN_ODR_HIGH(GPIOF_PIN6) | \
903 PIN_ODR_HIGH(GPIOF_PIN7) | \
904 PIN_ODR_HIGH(GPIOF_PIN8) | \
905 PIN_ODR_HIGH(GPIOF_PIN9) | \
906 PIN_ODR_HIGH(GPIOF_PIN10) | \
907 PIN_ODR_HIGH(GPIOF_PIN11) | \
908 PIN_ODR_HIGH(GPIOF_PIN12) | \
909 PIN_ODR_HIGH(GPIOF_PIN13) | \
910 PIN_ODR_HIGH(GPIOF_PIN14) | \
911 PIN_ODR_HIGH(GPIOF_PIN15))
912#define VAL_GPIOF_AFRL (PIN_AFIO_AF(GPIOF_I2C2_SDA, 0) | \
913 PIN_AFIO_AF(GPIOF_I2C2_SCL, 0) | \
914 PIN_AFIO_AF(GPIOF_PIN2, 0) | \
915 PIN_AFIO_AF(GPIOF_PIN3, 0) | \
916 PIN_AFIO_AF(GPIOF_PIN4, 0) | \
917 PIN_AFIO_AF(GPIOF_PIN5, 0) | \
918 PIN_AFIO_AF(GPIOF_PIN6, 0) | \
919 PIN_AFIO_AF(GPIOF_PIN7, 0))
920#define VAL_GPIOF_AFRH (PIN_AFIO_AF(GPIOF_PIN8, 0) | \
921 PIN_AFIO_AF(GPIOF_PIN9, 0) | \
922 PIN_AFIO_AF(GPIOF_PIN10, 0) | \
923 PIN_AFIO_AF(GPIOF_PIN11, 0) | \
924 PIN_AFIO_AF(GPIOF_PIN12, 0) | \
925 PIN_AFIO_AF(GPIOF_PIN13, 0) | \
926 PIN_AFIO_AF(GPIOF_PIN14, 0) | \
927 PIN_AFIO_AF(GPIOF_PIN15, 0))
928
929/*
930 * GPIOG setup:
931 *
932 * PG0 - PIN0 (input pullup).
933 * PG1 - PIN1 (input pullup).
934 * PG2 - PIN2 (input pullup).
935 * PG3 - PIN3 (input pullup).
936 * PG4 - PIN4 (input pullup).
937 * PG5 - PIN5 (input pullup).
938 * PG6 - PIN6 (input pullup).
939 * PG7 - PIN7 (input pullup).
940 * PG8 - PIN8 (input pullup).
941 * PG9 - PIN9 (input pullup).
942 * PG10 - PIN10 (input pullup).
943 * PG11 - PIN11 (input pullup).
944 * PG12 - PIN12 (input pullup).
945 * PG13 - PIN13 (input pullup).
946 * PG14 - PIN14 (input pullup).
947 * PG15 - PIN15 (input pullup).
948 */
949#define VAL_GPIOG_MODER (PIN_MODE_INPUT(GPIOG_PIN0) | \
950 PIN_MODE_INPUT(GPIOG_PIN1) | \
951 PIN_MODE_INPUT(GPIOG_PIN2) | \
952 PIN_MODE_INPUT(GPIOG_PIN3) | \
953 PIN_MODE_INPUT(GPIOG_PIN4) | \
954 PIN_MODE_INPUT(GPIOG_PIN5) | \
955 PIN_MODE_INPUT(GPIOG_PIN6) | \
956 PIN_MODE_INPUT(GPIOG_PIN7) | \
957 PIN_MODE_INPUT(GPIOG_PIN8) | \
958 PIN_MODE_INPUT(GPIOG_PIN9) | \
959 PIN_MODE_INPUT(GPIOG_PIN10) | \
960 PIN_MODE_INPUT(GPIOG_PIN11) | \
961 PIN_MODE_INPUT(GPIOG_PIN12) | \
962 PIN_MODE_INPUT(GPIOG_PIN13) | \
963 PIN_MODE_INPUT(GPIOG_PIN14) | \
964 PIN_MODE_INPUT(GPIOG_PIN15))
965#define VAL_GPIOG_OTYPER (PIN_OTYPE_PUSHPULL(GPIOG_PIN0) | \
966 PIN_OTYPE_PUSHPULL(GPIOG_PIN1) | \
967 PIN_OTYPE_PUSHPULL(GPIOG_PIN2) | \
968 PIN_OTYPE_PUSHPULL(GPIOG_PIN3) | \
969 PIN_OTYPE_PUSHPULL(GPIOG_PIN4) | \
970 PIN_OTYPE_PUSHPULL(GPIOG_PIN5) | \
971 PIN_OTYPE_PUSHPULL(GPIOG_PIN6) | \
972 PIN_OTYPE_PUSHPULL(GPIOG_PIN7) | \
973 PIN_OTYPE_PUSHPULL(GPIOG_PIN8) | \
974 PIN_OTYPE_PUSHPULL(GPIOG_PIN9) | \
975 PIN_OTYPE_PUSHPULL(GPIOG_PIN10) | \
976 PIN_OTYPE_PUSHPULL(GPIOG_PIN11) | \
977 PIN_OTYPE_PUSHPULL(GPIOG_PIN12) | \
978 PIN_OTYPE_PUSHPULL(GPIOG_PIN13) | \
979 PIN_OTYPE_PUSHPULL(GPIOG_PIN14) | \
980 PIN_OTYPE_PUSHPULL(GPIOG_PIN15))
981#define VAL_GPIOG_OSPEEDR (PIN_OSPEED_VERYLOW(GPIOG_PIN0) | \
982 PIN_OSPEED_VERYLOW(GPIOG_PIN1) | \
983 PIN_OSPEED_VERYLOW(GPIOG_PIN2) | \
984 PIN_OSPEED_VERYLOW(GPIOG_PIN3) | \
985 PIN_OSPEED_VERYLOW(GPIOG_PIN4) | \
986 PIN_OSPEED_VERYLOW(GPIOG_PIN5) | \
987 PIN_OSPEED_VERYLOW(GPIOG_PIN6) | \
988 PIN_OSPEED_VERYLOW(GPIOG_PIN7) | \
989 PIN_OSPEED_VERYLOW(GPIOG_PIN8) | \
990 PIN_OSPEED_VERYLOW(GPIOG_PIN9) | \
991 PIN_OSPEED_VERYLOW(GPIOG_PIN10) | \
992 PIN_OSPEED_VERYLOW(GPIOG_PIN11) | \
993 PIN_OSPEED_VERYLOW(GPIOG_PIN12) | \
994 PIN_OSPEED_VERYLOW(GPIOG_PIN13) | \
995 PIN_OSPEED_VERYLOW(GPIOG_PIN14) | \
996 PIN_OSPEED_VERYLOW(GPIOG_PIN15))
997#define VAL_GPIOG_PUPDR (PIN_PUPDR_PULLUP(GPIOG_PIN0) | \
998 PIN_PUPDR_PULLUP(GPIOG_PIN1) | \
999 PIN_PUPDR_PULLUP(GPIOG_PIN2) | \
1000 PIN_PUPDR_PULLUP(GPIOG_PIN3) | \
1001 PIN_PUPDR_PULLUP(GPIOG_PIN4) | \
1002 PIN_PUPDR_PULLUP(GPIOG_PIN5) | \
1003 PIN_PUPDR_PULLUP(GPIOG_PIN6) | \
1004 PIN_PUPDR_PULLUP(GPIOG_PIN7) | \
1005 PIN_PUPDR_PULLUP(GPIOG_PIN8) | \
1006 PIN_PUPDR_PULLUP(GPIOG_PIN9) | \
1007 PIN_PUPDR_PULLUP(GPIOG_PIN10) | \
1008 PIN_PUPDR_PULLUP(GPIOG_PIN11) | \
1009 PIN_PUPDR_PULLUP(GPIOG_PIN12) | \
1010 PIN_PUPDR_PULLUP(GPIOG_PIN13) | \
1011 PIN_PUPDR_PULLUP(GPIOG_PIN14) | \
1012 PIN_PUPDR_PULLUP(GPIOG_PIN15))
1013#define VAL_GPIOG_ODR (PIN_ODR_HIGH(GPIOG_PIN0) | \
1014 PIN_ODR_HIGH(GPIOG_PIN1) | \
1015 PIN_ODR_HIGH(GPIOG_PIN2) | \
1016 PIN_ODR_HIGH(GPIOG_PIN3) | \
1017 PIN_ODR_HIGH(GPIOG_PIN4) | \
1018 PIN_ODR_HIGH(GPIOG_PIN5) | \
1019 PIN_ODR_HIGH(GPIOG_PIN6) | \
1020 PIN_ODR_HIGH(GPIOG_PIN7) | \
1021 PIN_ODR_HIGH(GPIOG_PIN8) | \
1022 PIN_ODR_HIGH(GPIOG_PIN9) | \
1023 PIN_ODR_HIGH(GPIOG_PIN10) | \
1024 PIN_ODR_HIGH(GPIOG_PIN11) | \
1025 PIN_ODR_HIGH(GPIOG_PIN12) | \
1026 PIN_ODR_HIGH(GPIOG_PIN13) | \
1027 PIN_ODR_HIGH(GPIOG_PIN14) | \
1028 PIN_ODR_HIGH(GPIOG_PIN15))
1029#define VAL_GPIOG_AFRL (PIN_AFIO_AF(GPIOG_PIN0, 0) | \
1030 PIN_AFIO_AF(GPIOG_PIN1, 0) | \
1031 PIN_AFIO_AF(GPIOG_PIN2, 0) | \
1032 PIN_AFIO_AF(GPIOG_PIN3, 0) | \
1033 PIN_AFIO_AF(GPIOG_PIN4, 0) | \
1034 PIN_AFIO_AF(GPIOG_PIN5, 0) | \
1035 PIN_AFIO_AF(GPIOG_PIN6, 0) | \
1036 PIN_AFIO_AF(GPIOG_PIN7, 0))
1037#define VAL_GPIOG_AFRH (PIN_AFIO_AF(GPIOG_PIN8, 0) | \
1038 PIN_AFIO_AF(GPIOG_PIN9, 0) | \
1039 PIN_AFIO_AF(GPIOG_PIN10, 0) | \
1040 PIN_AFIO_AF(GPIOG_PIN11, 0) | \
1041 PIN_AFIO_AF(GPIOG_PIN12, 0) | \
1042 PIN_AFIO_AF(GPIOG_PIN13, 0) | \
1043 PIN_AFIO_AF(GPIOG_PIN14, 0) | \
1044 PIN_AFIO_AF(GPIOG_PIN15, 0))
1045
1046/*
1047 * GPIOH setup:
1048 *
1049 * PH0 - PIN0 (input pullup).
1050 * PH1 - PIN1 (input pullup).
1051 * PH2 - PIN2 (input pullup).
1052 * PH3 - PIN3 (input pullup).
1053 * PH4 - PIN4 (input pullup).
1054 * PH5 - PIN5 (input pullup).
1055 * PH6 - PIN6 (input pullup).
1056 * PH7 - PIN7 (input pullup).
1057 * PH8 - PIN8 (input pullup).
1058 * PH9 - PIN9 (input pullup).
1059 * PH10 - PIN10 (input pullup).
1060 * PH11 - PIN11 (input pullup).
1061 * PH12 - PIN12 (input pullup).
1062 * PH13 - PIN13 (input pullup).
1063 * PH14 - PIN14 (input pullup).
1064 * PH15 - PIN15 (input pullup).
1065 */
1066#define VAL_GPIOH_MODER (PIN_MODE_INPUT(GPIOH_PIN0) | \
1067 PIN_MODE_INPUT(GPIOH_PIN1) | \
1068 PIN_MODE_INPUT(GPIOH_PIN2) | \
1069 PIN_MODE_INPUT(GPIOH_PIN3) | \
1070 PIN_MODE_INPUT(GPIOH_PIN4) | \
1071 PIN_MODE_INPUT(GPIOH_PIN5) | \
1072 PIN_MODE_INPUT(GPIOH_PIN6) | \
1073 PIN_MODE_INPUT(GPIOH_PIN7) | \
1074 PIN_MODE_INPUT(GPIOH_PIN8) | \
1075 PIN_MODE_INPUT(GPIOH_PIN9) | \
1076 PIN_MODE_INPUT(GPIOH_PIN10) | \
1077 PIN_MODE_INPUT(GPIOH_PIN11) | \
1078 PIN_MODE_INPUT(GPIOH_PIN12) | \
1079 PIN_MODE_INPUT(GPIOH_PIN13) | \
1080 PIN_MODE_INPUT(GPIOH_PIN14) | \
1081 PIN_MODE_INPUT(GPIOH_PIN15))
1082#define VAL_GPIOH_OTYPER (PIN_OTYPE_PUSHPULL(GPIOH_PIN0) | \
1083 PIN_OTYPE_PUSHPULL(GPIOH_PIN1) | \
1084 PIN_OTYPE_PUSHPULL(GPIOH_PIN2) | \
1085 PIN_OTYPE_PUSHPULL(GPIOH_PIN3) | \
1086 PIN_OTYPE_PUSHPULL(GPIOH_PIN4) | \
1087 PIN_OTYPE_PUSHPULL(GPIOH_PIN5) | \
1088 PIN_OTYPE_PUSHPULL(GPIOH_PIN6) | \
1089 PIN_OTYPE_PUSHPULL(GPIOH_PIN7) | \
1090 PIN_OTYPE_PUSHPULL(GPIOH_PIN8) | \
1091 PIN_OTYPE_PUSHPULL(GPIOH_PIN9) | \
1092 PIN_OTYPE_PUSHPULL(GPIOH_PIN10) | \
1093 PIN_OTYPE_PUSHPULL(GPIOH_PIN11) | \
1094 PIN_OTYPE_PUSHPULL(GPIOH_PIN12) | \
1095 PIN_OTYPE_PUSHPULL(GPIOH_PIN13) | \
1096 PIN_OTYPE_PUSHPULL(GPIOH_PIN14) | \
1097 PIN_OTYPE_PUSHPULL(GPIOH_PIN15))
1098#define VAL_GPIOH_OSPEEDR (PIN_OSPEED_VERYLOW(GPIOH_PIN0) | \
1099 PIN_OSPEED_VERYLOW(GPIOH_PIN1) | \
1100 PIN_OSPEED_VERYLOW(GPIOH_PIN2) | \
1101 PIN_OSPEED_VERYLOW(GPIOH_PIN3) | \
1102 PIN_OSPEED_VERYLOW(GPIOH_PIN4) | \
1103 PIN_OSPEED_VERYLOW(GPIOH_PIN5) | \
1104 PIN_OSPEED_VERYLOW(GPIOH_PIN6) | \
1105 PIN_OSPEED_VERYLOW(GPIOH_PIN7) | \
1106 PIN_OSPEED_VERYLOW(GPIOH_PIN8) | \
1107 PIN_OSPEED_VERYLOW(GPIOH_PIN9) | \
1108 PIN_OSPEED_VERYLOW(GPIOH_PIN10) | \
1109 PIN_OSPEED_VERYLOW(GPIOH_PIN11) | \
1110 PIN_OSPEED_VERYLOW(GPIOH_PIN12) | \
1111 PIN_OSPEED_VERYLOW(GPIOH_PIN13) | \
1112 PIN_OSPEED_VERYLOW(GPIOH_PIN14) | \
1113 PIN_OSPEED_VERYLOW(GPIOH_PIN15))
1114#define VAL_GPIOH_PUPDR (PIN_PUPDR_PULLUP(GPIOH_PIN0) | \
1115 PIN_PUPDR_PULLUP(GPIOH_PIN1) | \
1116 PIN_PUPDR_PULLUP(GPIOH_PIN2) | \
1117 PIN_PUPDR_PULLUP(GPIOH_PIN3) | \
1118 PIN_PUPDR_PULLUP(GPIOH_PIN4) | \
1119 PIN_PUPDR_PULLUP(GPIOH_PIN5) | \
1120 PIN_PUPDR_PULLUP(GPIOH_PIN6) | \
1121 PIN_PUPDR_PULLUP(GPIOH_PIN7) | \
1122 PIN_PUPDR_PULLUP(GPIOH_PIN8) | \
1123 PIN_PUPDR_PULLUP(GPIOH_PIN9) | \
1124 PIN_PUPDR_PULLUP(GPIOH_PIN10) | \
1125 PIN_PUPDR_PULLUP(GPIOH_PIN11) | \
1126 PIN_PUPDR_PULLUP(GPIOH_PIN12) | \
1127 PIN_PUPDR_PULLUP(GPIOH_PIN13) | \
1128 PIN_PUPDR_PULLUP(GPIOH_PIN14) | \
1129 PIN_PUPDR_PULLUP(GPIOH_PIN15))
1130#define VAL_GPIOH_ODR (PIN_ODR_HIGH(GPIOH_PIN0) | \
1131 PIN_ODR_HIGH(GPIOH_PIN1) | \
1132 PIN_ODR_HIGH(GPIOH_PIN2) | \
1133 PIN_ODR_HIGH(GPIOH_PIN3) | \
1134 PIN_ODR_HIGH(GPIOH_PIN4) | \
1135 PIN_ODR_HIGH(GPIOH_PIN5) | \
1136 PIN_ODR_HIGH(GPIOH_PIN6) | \
1137 PIN_ODR_HIGH(GPIOH_PIN7) | \
1138 PIN_ODR_HIGH(GPIOH_PIN8) | \
1139 PIN_ODR_HIGH(GPIOH_PIN9) | \
1140 PIN_ODR_HIGH(GPIOH_PIN10) | \
1141 PIN_ODR_HIGH(GPIOH_PIN11) | \
1142 PIN_ODR_HIGH(GPIOH_PIN12) | \
1143 PIN_ODR_HIGH(GPIOH_PIN13) | \
1144 PIN_ODR_HIGH(GPIOH_PIN14) | \
1145 PIN_ODR_HIGH(GPIOH_PIN15))
1146#define VAL_GPIOH_AFRL (PIN_AFIO_AF(GPIOH_PIN0, 0) | \
1147 PIN_AFIO_AF(GPIOH_PIN1, 0) | \
1148 PIN_AFIO_AF(GPIOH_PIN2, 0) | \
1149 PIN_AFIO_AF(GPIOH_PIN3, 0) | \
1150 PIN_AFIO_AF(GPIOH_PIN4, 0) | \
1151 PIN_AFIO_AF(GPIOH_PIN5, 0) | \
1152 PIN_AFIO_AF(GPIOH_PIN6, 0) | \
1153 PIN_AFIO_AF(GPIOH_PIN7, 0))
1154#define VAL_GPIOH_AFRH (PIN_AFIO_AF(GPIOH_PIN8, 0) | \
1155 PIN_AFIO_AF(GPIOH_PIN9, 0) | \
1156 PIN_AFIO_AF(GPIOH_PIN10, 0) | \
1157 PIN_AFIO_AF(GPIOH_PIN11, 0) | \
1158 PIN_AFIO_AF(GPIOH_PIN12, 0) | \
1159 PIN_AFIO_AF(GPIOH_PIN13, 0) | \
1160 PIN_AFIO_AF(GPIOH_PIN14, 0) | \
1161 PIN_AFIO_AF(GPIOH_PIN15, 0))
1162
1163
1164/*
1165 * USB bus activation macro, required by the USB driver.
1166 */
1167// #define usb_lld_connect_bus(usbp)
1168#define usb_lld_connect_bus(usbp) (palSetPadMode(GPIOA, GPIOA_USB_DP, PAL_MODE_ALTERNATE(14)))
1169// #define usb_lld_connect_bus(usbp) palSetPadMode(GPIOA, 12, PAL_MODE_INPUT)
1170/*
1171 * USB bus de-activation macro, required by the USB driver.
1172 */
1173// #define usb_lld_disconnect_bus(usbp)
1174#define usb_lld_disconnect_bus(usbp) (palSetPadMode(GPIOA, GPIOA_USB_DP, PAL_MODE_OUTPUT_PUSHPULL)); palClearPad(GPIOA, GPIOA_USB_DP)
1175// #define usb_lld_disconnect_bus(usbp) palSetPadMode(GPIOA, 12, PAL_MODE_OUTPUT_PUSHPULL); palClearPad(GPIOA, 12)
1176
1177#if !defined(_FROM_ASM_)
1178#ifdef __cplusplus
1179extern "C" {
1180#endif
1181 void boardInit(void);
1182#ifdef __cplusplus
1183}
1184#endif
1185#endif /* _FROM_ASM_ */
1186
1187#endif /* _BOARD_H_ */
diff --git a/keyboards/hs60/v2/boards/GENERIC_STM32_F303XC/board.mk b/keyboards/hs60/v2/boards/GENERIC_STM32_F303XC/board.mk
deleted file mode 100644
index 43377629a..000000000
--- a/keyboards/hs60/v2/boards/GENERIC_STM32_F303XC/board.mk
+++ /dev/null
@@ -1,5 +0,0 @@
1# List of all the board related files.
2BOARDSRC = $(BOARD_PATH)/boards/GENERIC_STM32_F303XC/board.c
3
4# Required include directories
5BOARDINC = $(BOARD_PATH)/boards/GENERIC_STM32_F303XC
diff --git a/keyboards/hs60/v2/bootloader_defs.h b/keyboards/hs60/v2/bootloader_defs.h
deleted file mode 100644
index 3b0e9d20a..000000000
--- a/keyboards/hs60/v2/bootloader_defs.h
+++ /dev/null
@@ -1,7 +0,0 @@
1/* Address for jumping to bootloader on STM32 chips. */
2/* It is chip dependent, the correct number can be looked up here:
3 * http://www.st.com/web/en/resource/technical/document/application_note/CD00167594.pdf
4 * This also requires a patch to chibios:
5 * <tmk_dir>/tmk_core/tool/chibios/ch-bootloader-jump.patch
6 */
7#define STM32_BOOTLOADER_ADDRESS 0x1FFFD800
diff --git a/keyboards/hs60/v2/rules.mk b/keyboards/hs60/v2/rules.mk
index c2b643ad1..6c3234258 100644
--- a/keyboards/hs60/v2/rules.mk
+++ b/keyboards/hs60/v2/rules.mk
@@ -1,52 +1,11 @@
1# project specific files 1# MCU name
2SRC = keyboards/wilba_tech/wt_main.c \ 2MCU = STM32F303
3 keyboards/wilba_tech/wt_rgb_backlight.c \
4 drivers/issi/is31fl3733.c \
5 quantum/color.c \
6 drivers/arm/i2c_master.c
7
8## chip/board settings
9# the next two should match the directories in
10# <chibios>/os/hal/ports/$(MCU_FAMILY)/$(MCU_SERIES)
11MCU_FAMILY = STM32
12MCU_SERIES = STM32F3xx
13
14# Linker script to use
15# it should exist either in <chibios>/os/common/ports/ARMCMx/compilers/GCC/ld/
16# or <this_dir>/ld/
17MCU_LDSCRIPT = STM32F303xC
18
19# Startup code to use
20# - it should exist in <chibios>/os/common/startup/ARMCMx/compilers/GCC/mk/
21MCU_STARTUP = stm32f3xx
22
23# Board: it should exist either in <chibios>/os/hal/boards/
24# or <this_dir>/boards
25BOARD = GENERIC_STM32_F303XC
26
27# Cortex version
28MCU = cortex-m4
29
30# ARM version, CORTEX-M0/M1 are 6, CORTEX-M3/M4/M7 are 7
31ARMV = 7
32
33USE_FPU = yes
34
35# Vector table for application
36# 0x00000000-0x00001000 area is occupied by bootlaoder.*/
37# The CORTEX_VTOR... is needed only for MCHCK/Infinity KB
38# OPT_DEFS = -DCORTEX_VTOR_INIT=0x08005000
39OPT_DEFS =
40 3
41# Do not put the microcontroller into power saving mode 4# Do not put the microcontroller into power saving mode
42# when we get USB suspend event. We want it to keep updating 5# when we get USB suspend event. We want it to keep updating
43# backlight effects. 6# backlight effects.
44OPT_DEFS += -DNO_SUSPEND_POWER_DOWN 7OPT_DEFS += -DNO_SUSPEND_POWER_DOWN
45 8
46# Options to pass to dfu-util when flashing
47DFU_ARGS = -d 0483:df11 -a 0 -s 0x08000000:leave
48DFU_SUFFIX_ARGS = -p DF11 -v 0483
49
50# Build Options 9# Build Options
51# comment out to disable the options. 10# comment out to disable the options.
52# 11#
@@ -67,3 +26,10 @@ DYNAMIC_KEYMAP_ENABLE = no
67CIE1931_CURVE = yes 26CIE1931_CURVE = yes
68 27
69LAYOUTS = 60_ansi 60_iso 28LAYOUTS = 60_ansi 60_iso
29
30# project specific files
31SRC = keyboards/wilba_tech/wt_main.c \
32 keyboards/wilba_tech/wt_rgb_backlight.c \
33 drivers/issi/is31fl3733.c \
34 quantum/color.c \
35 drivers/arm/i2c_master.c
diff --git a/keyboards/kbdfans/kbd67/mkiirgb/rules.mk b/keyboards/kbdfans/kbd67/mkiirgb/rules.mk
index 782d86c1e..ea3746069 100644
--- a/keyboards/kbdfans/kbd67/mkiirgb/rules.mk
+++ b/keyboards/kbdfans/kbd67/mkiirgb/rules.mk
@@ -1,6 +1,6 @@
1MCU = STM32F303 1# MCU name
2DFU_ARGS = -d 0483:df11 -a 0 -s 0x08000000:leave 2MCU = STM32F303
3DFU_SUFFIX_ARGS = -p DF11 -v 0483 3
4BACKLIGHT_ENABLE = no 4BACKLIGHT_ENABLE = no
5BOOTMAGIC_ENABLE = lite # Virtual DIP switch configuration 5BOOTMAGIC_ENABLE = lite # Virtual DIP switch configuration
6MOUSEKEY_ENABLE = yes # Mouse keys 6MOUSEKEY_ENABLE = yes # Mouse keys
@@ -11,4 +11,4 @@ NKRO_ENABLE = yes # USB Nkey Rollover
11AUDIO_ENABLE = no 11AUDIO_ENABLE = no
12RGB_MATRIX_ENABLE = yes # Use RGB matrix 12RGB_MATRIX_ENABLE = yes # Use RGB matrix
13 13
14LAYOUTS = 65_ansi_blocker \ No newline at end of file 14LAYOUTS = 65_ansi_blocker
diff --git a/keyboards/nk65/boards/GENERIC_STM32_F303XC/board.c b/keyboards/nk65/boards/GENERIC_STM32_F303XC/board.c
deleted file mode 100755
index 4331155df..000000000
--- a/keyboards/nk65/boards/GENERIC_STM32_F303XC/board.c
+++ /dev/null
@@ -1,126 +0,0 @@
1/*
2 ChibiOS - Copyright (C) 2006..2016 Giovanni Di Sirio
3
4 Licensed under the Apache License, Version 2.0 (the "License");
5 you may not use this file except in compliance with the License.
6 You may obtain a copy of the License at
7
8 http://www.apache.org/licenses/LICENSE-2.0
9
10 Unless required by applicable law or agreed to in writing, software
11 distributed under the License is distributed on an "AS IS" BASIS,
12 WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
13 See the License for the specific language governing permissions and
14 limitations under the License.
15*/
16
17#include "hal.h"
18
19#if HAL_USE_PAL || defined(__DOXYGEN__)
20/**
21 * @brief PAL setup.
22 * @details Digital I/O ports static configuration as defined in @p board.h.
23 * This variable is used by the HAL when initializing the PAL driver.
24 */
25const PALConfig pal_default_config = {
26#if STM32_HAS_GPIOA
27 {VAL_GPIOA_MODER, VAL_GPIOA_OTYPER, VAL_GPIOA_OSPEEDR, VAL_GPIOA_PUPDR,
28 VAL_GPIOA_ODR, VAL_GPIOA_AFRL, VAL_GPIOA_AFRH},
29#endif
30#if STM32_HAS_GPIOB
31 {VAL_GPIOB_MODER, VAL_GPIOB_OTYPER, VAL_GPIOB_OSPEEDR, VAL_GPIOB_PUPDR,
32 VAL_GPIOB_ODR, VAL_GPIOB_AFRL, VAL_GPIOB_AFRH},
33#endif
34#if STM32_HAS_GPIOC
35 {VAL_GPIOC_MODER, VAL_GPIOC_OTYPER, VAL_GPIOC_OSPEEDR, VAL_GPIOC_PUPDR,
36 VAL_GPIOC_ODR, VAL_GPIOC_AFRL, VAL_GPIOC_AFRH},
37#endif
38#if STM32_HAS_GPIOD
39 {VAL_GPIOD_MODER, VAL_GPIOD_OTYPER, VAL_GPIOD_OSPEEDR, VAL_GPIOD_PUPDR,
40 VAL_GPIOD_ODR, VAL_GPIOD_AFRL, VAL_GPIOD_AFRH},
41#endif
42#if STM32_HAS_GPIOE
43 {VAL_GPIOE_MODER, VAL_GPIOE_OTYPER, VAL_GPIOE_OSPEEDR, VAL_GPIOE_PUPDR,
44 VAL_GPIOE_ODR, VAL_GPIOE_AFRL, VAL_GPIOE_AFRH},
45#endif
46#if STM32_HAS_GPIOF
47 {VAL_GPIOF_MODER, VAL_GPIOF_OTYPER, VAL_GPIOF_OSPEEDR, VAL_GPIOF_PUPDR,
48 VAL_GPIOF_ODR, VAL_GPIOF_AFRL, VAL_GPIOF_AFRH},
49#endif
50#if STM32_HAS_GPIOG
51 {VAL_GPIOG_MODER, VAL_GPIOG_OTYPER, VAL_GPIOG_OSPEEDR, VAL_GPIOG_PUPDR,
52 VAL_GPIOG_ODR, VAL_GPIOG_AFRL, VAL_GPIOG_AFRH},
53#endif
54#if STM32_HAS_GPIOH
55 {VAL_GPIOH_MODER, VAL_GPIOH_OTYPER, VAL_GPIOH_OSPEEDR, VAL_GPIOH_PUPDR,
56 VAL_GPIOH_ODR, VAL_GPIOH_AFRL, VAL_GPIOH_AFRH},
57#endif
58#if STM32_HAS_GPIOI
59 {VAL_GPIOI_MODER, VAL_GPIOI_OTYPER, VAL_GPIOI_OSPEEDR, VAL_GPIOI_PUPDR,
60 VAL_GPIOI_ODR, VAL_GPIOI_AFRL, VAL_GPIOI_AFRH}
61#endif
62};
63#endif
64
65void enter_bootloader_mode_if_requested(void);
66
67/**
68 * @brief Early initialization code.
69 * @details This initialization must be performed just after stack setup
70 * and before any other initialization.
71 */
72void __early_init(void) {
73 enter_bootloader_mode_if_requested();
74 stm32_clock_init();
75}
76
77#if HAL_USE_SDC || defined(__DOXYGEN__)
78/**
79 * @brief SDC card detection.
80 */
81bool sdc_lld_is_card_inserted(SDCDriver *sdcp) {
82
83 (void)sdcp;
84 /* TODO: Fill the implementation.*/
85 return true;
86}
87
88/**
89 * @brief SDC card write protection detection.
90 */
91bool sdc_lld_is_write_protected(SDCDriver *sdcp) {
92
93 (void)sdcp;
94 /* TODO: Fill the implementation.*/
95 return false;
96}
97#endif /* HAL_USE_SDC */
98
99#if HAL_USE_MMC_SPI || defined(__DOXYGEN__)
100/**
101 * @brief MMC_SPI card detection.
102 */
103bool mmc_lld_is_card_inserted(MMCDriver *mmcp) {
104
105 (void)mmcp;
106 /* TODO: Fill the implementation.*/
107 return true;
108}
109
110/**
111 * @brief MMC_SPI card write protection detection.
112 */
113bool mmc_lld_is_write_protected(MMCDriver *mmcp) {
114
115 (void)mmcp;
116 /* TODO: Fill the implementation.*/
117 return false;
118}
119#endif
120
121/**
122 * @brief Board-specific initialization code.
123 * @todo Add your board-specific code, if any.
124 */
125void boardInit(void) {
126}
diff --git a/keyboards/nk65/boards/GENERIC_STM32_F303XC/board.h b/keyboards/nk65/boards/GENERIC_STM32_F303XC/board.h
deleted file mode 100755
index 54df72ea6..000000000
--- a/keyboards/nk65/boards/GENERIC_STM32_F303XC/board.h
+++ /dev/null
@@ -1,1187 +0,0 @@
1/*
2 ChibiOS - Copyright (C) 2006..2016 Giovanni Di Sirio
3
4 Licensed under the Apache License, Version 2.0 (the "License");
5 you may not use this file except in compliance with the License.
6 You may obtain a copy of the License at
7
8 http://www.apache.org/licenses/LICENSE-2.0
9
10 Unless required by applicable law or agreed to in writing, software
11 distributed under the License is distributed on an "AS IS" BASIS,
12 WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
13 See the License for the specific language governing permissions and
14 limitations under the License.
15*/
16
17#ifndef _BOARD_H_
18#define _BOARD_H_
19
20/*
21 * Setup for NK65 Keyboard
22 */
23
24/*
25 * Board identifier.
26 */
27#define BOARD_GENERIC_STM32_F303XC
28#define BOARD_NAME "NK65 PCB"
29
30/*
31 * Board oscillators-related settings.
32 * NOTE: LSE not fitted.
33 */
34#if !defined(STM32_LSECLK)
35#define STM32_LSECLK 0U
36#endif
37
38#define STM32_LSEDRV (3U << 3U)
39
40#if !defined(STM32_HSECLK)
41#define STM32_HSECLK 8000000U
42#endif
43
44// #define STM32_HSE_BYPASS
45
46/*
47 * MCU type as defined in the ST header.
48 */
49#define STM32F303xC
50
51/*
52 * IO pins assignments.
53 */
54#define GPIOA_PIN0 0U
55#define GPIOA_PIN1 1U
56#define GPIOA_PIN2 2U
57#define GPIOA_PIN3 3U
58#define GPIOA_PIN4 4U
59#define GPIOA_PIN5 5U
60#define GPIOA_PIN6 6U
61#define GPIOA_PIN7 7U
62#define GPIOA_PIN8 8U
63#define GPIOA_PIN9 9U
64#define GPIOA_PIN10 10U
65#define GPIOA_USB_DM 11U
66#define GPIOA_USB_DP 12U
67#define GPIOA_SWDIO 13U
68#define GPIOA_SWCLK 14U
69#define GPIOA_PIN15 15U
70
71#define GPIOB_PIN0 0U
72#define GPIOB_PIN1 1U
73#define GPIOB_PIN2 2U
74#define GPIOB_PIN3 3U
75#define GPIOB_PIN4 4U
76#define GPIOB_PIN5 5U
77#define GPIOB_PIN6 6U
78#define GPIOB_PIN7 7U
79#define GPIOB_PIN8 8U
80#define GPIOB_PIN9 9U
81#define GPIOB_PIN10 10U
82#define GPIOB_PIN11 11U
83#define GPIOB_PIN12 12U
84#define GPIOB_PIN13 13U
85#define GPIOB_PIN14 14U
86#define GPIOB_PIN15 15U
87
88#define GPIOC_PIN0 0U
89#define GPIOC_PIN1 1U
90#define GPIOC_PIN2 2U
91#define GPIOC_PIN3 3U
92#define GPIOC_PIN4 4U
93#define GPIOC_PIN5 5U
94#define GPIOC_PIN6 6U
95#define GPIOC_PIN7 7U
96#define GPIOC_PIN8 8U
97#define GPIOC_PIN9 9U
98#define GPIOC_PIN10 10U
99#define GPIOC_PIN11 11U
100#define GPIOC_PIN12 12U
101#define GPIOC_PIN13 13U
102#define GPIOC_PIN14 14U
103#define GPIOC_PIN15 15U
104
105#define GPIOD_PIN0 0U
106#define GPIOD_PIN1 1U
107#define GPIOD_PIN2 2U
108#define GPIOD_PIN3 3U
109#define GPIOD_PIN4 4U
110#define GPIOD_PIN5 5U
111#define GPIOD_PIN6 6U
112#define GPIOD_PIN7 7U
113#define GPIOD_PIN8 8U
114#define GPIOD_PIN9 9U
115#define GPIOD_PIN10 10U
116#define GPIOD_PIN11 11U
117#define GPIOD_PIN12 12U
118#define GPIOD_PIN13 13U
119#define GPIOD_PIN14 14U
120#define GPIOD_PIN15 15U
121
122#define GPIOE_PIN0 0U
123#define GPIOE_PIN1 1U
124#define GPIOE_PIN2 2U
125#define GPIOE_PIN3 3U
126#define GPIOE_PIN4 4U
127#define GPIOE_PIN5 5U
128#define GPIOE_PIN6 6U
129#define GPIOE_PIN7 7U
130#define GPIOE_PIN8 8U
131#define GPIOE_PIN9 9U
132#define GPIOE_PIN10 10U
133#define GPIOE_PIN11 11U
134#define GPIOE_PIN12 12U
135#define GPIOE_PIN13 13U
136#define GPIOE_PIN14 14U
137#define GPIOE_PIN15 15U
138
139#define GPIOF_I2C2_SDA 0U
140#define GPIOF_I2C2_SCL 1U
141#define GPIOF_PIN2 2U
142#define GPIOF_PIN3 3U
143#define GPIOF_PIN4 4U
144#define GPIOF_PIN5 5U
145#define GPIOF_PIN6 6U
146#define GPIOF_PIN7 7U
147#define GPIOF_PIN8 8U
148#define GPIOF_PIN9 9U
149#define GPIOF_PIN10 10U
150#define GPIOF_PIN11 11U
151#define GPIOF_PIN12 12U
152#define GPIOF_PIN13 13U
153#define GPIOF_PIN14 14U
154#define GPIOF_PIN15 15U
155
156#define GPIOG_PIN0 0U
157#define GPIOG_PIN1 1U
158#define GPIOG_PIN2 2U
159#define GPIOG_PIN3 3U
160#define GPIOG_PIN4 4U
161#define GPIOG_PIN5 5U
162#define GPIOG_PIN6 6U
163#define GPIOG_PIN7 7U
164#define GPIOG_PIN8 8U
165#define GPIOG_PIN9 9U
166#define GPIOG_PIN10 10U
167#define GPIOG_PIN11 11U
168#define GPIOG_PIN12 12U
169#define GPIOG_PIN13 13U
170#define GPIOG_PIN14 14U
171#define GPIOG_PIN15 15U
172
173#define GPIOH_PIN0 0U
174#define GPIOH_PIN1 1U
175#define GPIOH_PIN2 2U
176#define GPIOH_PIN3 3U
177#define GPIOH_PIN4 4U
178#define GPIOH_PIN5 5U
179#define GPIOH_PIN6 6U
180#define GPIOH_PIN7 7U
181#define GPIOH_PIN8 8U
182#define GPIOH_PIN9 9U
183#define GPIOH_PIN10 10U
184#define GPIOH_PIN11 11U
185#define GPIOH_PIN12 12U
186#define GPIOH_PIN13 13U
187#define GPIOH_PIN14 14U
188#define GPIOH_PIN15 15U
189
190/*
191 * IO lines assignments.
192 */
193#define LINE_L3GD20_SDI PAL_LINE(GPIOA, 7U)
194#define LINE_USB_DM PAL_LINE(GPIOA, 11U)
195#define LINE_USB_DP PAL_LINE(GPIOA, 12U)
196#define LINE_SWDIO PAL_LINE(GPIOA, 13U)
197#define LINE_SWCLK PAL_LINE(GPIOA, 14U)
198
199#define LINE_PIN6 PAL_LINE(GPIOF, 0U)
200#define LINE_PIN7 PAL_LINE(GPIOF, 1U)
201
202#define LINE_CAPS_LOCK PAL_LINE(GPIOB, 7U)
203
204
205/*
206 * I/O ports initial setup, this configuration is established soon after reset
207 * in the initialization code.
208 * Please refer to the STM32 Reference Manual for details.
209 */
210#define PIN_MODE_INPUT(n) (0U << ((n) * 2U))
211#define PIN_MODE_OUTPUT(n) (1U << ((n) * 2U))
212#define PIN_MODE_ALTERNATE(n) (2U << ((n) * 2U))
213#define PIN_MODE_ANALOG(n) (3U << ((n) * 2U))
214#define PIN_ODR_LOW(n) (0U << (n))
215#define PIN_ODR_HIGH(n) (1U << (n))
216#define PIN_OTYPE_PUSHPULL(n) (0U << (n))
217#define PIN_OTYPE_OPENDRAIN(n) (1U << (n))
218#define PIN_OSPEED_VERYLOW(n) (0U << ((n) * 2U))
219#define PIN_OSPEED_LOW(n) (1U << ((n) * 2U))
220#define PIN_OSPEED_MEDIUM(n) (2U << ((n) * 2U))
221#define PIN_OSPEED_HIGH(n) (3U << ((n) * 2U))
222#define PIN_PUPDR_FLOATING(n) (0U << ((n) * 2U))
223#define PIN_PUPDR_PULLUP(n) (1U << ((n) * 2U))
224#define PIN_PUPDR_PULLDOWN(n) (2U << ((n) * 2U))
225#define PIN_AFIO_AF(n, v) ((v) << (((n) % 8U) * 4U))
226
227/*
228 * GPIOA setup:
229 *
230 * PA0 - NC
231 * PA1 - NC
232 * PA2 - COL1
233 * PA3 - COL2
234 * PA4 - SPEAKER1
235 * PA5 - SPEAKER2
236 * PA6 - COL3
237 * PA7 - COL8
238 * PA8 - COL6
239 * PA9 - COL7
240 * PA10 - ROW5
241 * PA11 - USB_DM (alternate 14).
242 * PA12 - USB_DP (alternate 14).
243 * PA13 - SWDIO (alternate 0).
244 * PA14 - SWCLK (alternate 0).
245 * PA15 - ROW4
246 */
247#define VAL_GPIOA_MODER (PIN_MODE_INPUT(GPIOA_PIN0) | \
248 PIN_MODE_ALTERNATE(GPIOA_PIN1) | \
249 PIN_MODE_INPUT(GPIOA_PIN2) | \
250 PIN_MODE_INPUT(GPIOA_PIN3) | \
251 PIN_MODE_INPUT(GPIOA_PIN4) | \
252 PIN_MODE_INPUT(GPIOA_PIN5) | \
253 PIN_MODE_INPUT(GPIOA_PIN6) | \
254 PIN_MODE_INPUT(GPIOA_PIN7) | \
255 PIN_MODE_INPUT(GPIOA_PIN8) | \
256 PIN_MODE_INPUT(GPIOA_PIN9) | \
257 PIN_MODE_INPUT(GPIOA_PIN10) | \
258 PIN_MODE_ALTERNATE(GPIOA_USB_DM) | \
259 PIN_MODE_ALTERNATE(GPIOA_USB_DP) | \
260 PIN_MODE_ALTERNATE(GPIOA_SWDIO) | \
261 PIN_MODE_ALTERNATE(GPIOA_SWCLK) | \
262 PIN_MODE_INPUT(GPIOA_PIN15))
263#define VAL_GPIOA_OTYPER (PIN_OTYPE_PUSHPULL(GPIOA_PIN0) | \
264 PIN_OTYPE_PUSHPULL(GPIOA_PIN1) | \
265 PIN_OTYPE_PUSHPULL(GPIOA_PIN2) | \
266 PIN_OTYPE_PUSHPULL(GPIOA_PIN3) | \
267 PIN_OTYPE_PUSHPULL(GPIOA_PIN4) | \
268 PIN_OTYPE_PUSHPULL(GPIOA_PIN5) | \
269 PIN_OTYPE_PUSHPULL(GPIOA_PIN6) | \
270 PIN_OTYPE_PUSHPULL(GPIOA_PIN7) | \
271 PIN_OTYPE_PUSHPULL(GPIOA_PIN8) | \
272 PIN_OTYPE_PUSHPULL(GPIOA_PIN9) | \
273 PIN_OTYPE_PUSHPULL(GPIOA_PIN10) | \
274 PIN_OTYPE_PUSHPULL(GPIOA_USB_DM) | \
275 PIN_OTYPE_PUSHPULL(GPIOA_USB_DP) | \
276 PIN_OTYPE_PUSHPULL(GPIOA_SWDIO) | \
277 PIN_OTYPE_PUSHPULL(GPIOA_SWCLK) | \
278 PIN_OTYPE_PUSHPULL(GPIOA_PIN15))
279#define VAL_GPIOA_OSPEEDR (PIN_OSPEED_VERYLOW(GPIOA_PIN0) | \
280 PIN_OSPEED_HIGH(GPIOA_PIN1) | \
281 PIN_OSPEED_VERYLOW(GPIOA_PIN2) | \
282 PIN_OSPEED_VERYLOW(GPIOA_PIN3) | \
283 PIN_OSPEED_VERYLOW(GPIOA_PIN4) | \
284 PIN_OSPEED_VERYLOW(GPIOA_PIN5) | \
285 PIN_OSPEED_VERYLOW(GPIOA_PIN6) | \
286 PIN_OSPEED_VERYLOW(GPIOA_PIN7) | \
287 PIN_OSPEED_VERYLOW(GPIOA_PIN8) | \
288 PIN_OSPEED_VERYLOW(GPIOA_PIN9) | \
289 PIN_OSPEED_VERYLOW(GPIOA_PIN10) | \
290 PIN_OSPEED_HIGH(GPIOA_USB_DM) | \
291 PIN_OSPEED_VERYLOW(GPIOA_USB_DP) | \
292 PIN_OSPEED_HIGH(GPIOA_SWDIO) | \
293 PIN_OSPEED_HIGH(GPIOA_SWCLK) | \
294 PIN_OSPEED_VERYLOW(GPIOA_PIN15))
295#define VAL_GPIOA_PUPDR (PIN_PUPDR_FLOATING(GPIOA_PIN0) | \
296 PIN_PUPDR_FLOATING(GPIOA_PIN1) | \
297 PIN_PUPDR_PULLUP(GPIOA_PIN2) | \
298 PIN_PUPDR_PULLUP(GPIOA_PIN3) | \
299 PIN_PUPDR_PULLUP(GPIOA_PIN4) | \
300 PIN_PUPDR_PULLUP(GPIOA_PIN5) | \
301 PIN_PUPDR_PULLUP(GPIOA_PIN6) | \
302 PIN_PUPDR_FLOATING(GPIOA_PIN7) | \
303 PIN_PUPDR_PULLUP(GPIOA_PIN8) | \
304 PIN_PUPDR_PULLUP(GPIOA_PIN9) | \
305 PIN_PUPDR_PULLUP(GPIOA_PIN10) | \
306 PIN_PUPDR_FLOATING(GPIOA_USB_DM) | \
307 PIN_PUPDR_FLOATING(GPIOA_USB_DP) | \
308 PIN_PUPDR_PULLUP(GPIOA_SWDIO) | \
309 PIN_PUPDR_PULLDOWN(GPIOA_SWCLK) | \
310 PIN_PUPDR_PULLUP(GPIOA_PIN15))
311#define VAL_GPIOA_ODR (PIN_ODR_HIGH(GPIOA_PIN0) | \
312 PIN_ODR_HIGH(GPIOA_PIN1) | \
313 PIN_ODR_HIGH(GPIOA_PIN2) | \
314 PIN_ODR_HIGH(GPIOA_PIN3) | \
315 PIN_ODR_HIGH(GPIOA_PIN4) | \
316 PIN_ODR_HIGH(GPIOA_PIN5) | \
317 PIN_ODR_HIGH(GPIOA_PIN6) | \
318 PIN_ODR_HIGH(GPIOA_PIN7) | \
319 PIN_ODR_HIGH(GPIOA_PIN8) | \
320 PIN_ODR_HIGH(GPIOA_PIN9) | \
321 PIN_ODR_HIGH(GPIOA_PIN10) | \
322 PIN_ODR_HIGH(GPIOA_USB_DM) | \
323 PIN_ODR_HIGH(GPIOA_USB_DP) | \
324 PIN_ODR_HIGH(GPIOA_SWDIO) | \
325 PIN_ODR_HIGH(GPIOA_SWCLK) | \
326 PIN_ODR_HIGH(GPIOA_PIN15))
327#define VAL_GPIOA_AFRL (PIN_AFIO_AF(GPIOA_PIN0, 0) | \
328 PIN_AFIO_AF(GPIOA_PIN1, 1) | \
329 PIN_AFIO_AF(GPIOA_PIN2, 0) | \
330 PIN_AFIO_AF(GPIOA_PIN3, 0) | \
331 PIN_AFIO_AF(GPIOA_PIN4, 0) | \
332 PIN_AFIO_AF(GPIOA_PIN5, 5) | \
333 PIN_AFIO_AF(GPIOA_PIN6, 5) | \
334 PIN_AFIO_AF(GPIOA_PIN7, 5))
335#define VAL_GPIOA_AFRH (PIN_AFIO_AF(GPIOA_PIN8, 0) | \
336 PIN_AFIO_AF(GPIOA_PIN9, 0) | \
337 PIN_AFIO_AF(GPIOA_PIN10, 0) | \
338 PIN_AFIO_AF(GPIOA_USB_DM, 14) | \
339 PIN_AFIO_AF(GPIOA_USB_DP, 14) | \
340 PIN_AFIO_AF(GPIOA_SWDIO, 0) | \
341 PIN_AFIO_AF(GPIOA_SWCLK, 0) | \
342 PIN_AFIO_AF(GPIOA_PIN15, 0))
343
344/*
345 * GPIOB setup:
346 *
347 * PB0 - PIN0 (input pullup).
348 * PB1 - PIN1 (input pullup).
349 * PB2 - PIN2 (input pullup).
350 * PB3 - PIN3 (alternate 0).
351 * PB4 - PIN4 (input pullup).
352 * PB5 - PIN5 (input pullup).
353 * PB6 - PIN6 LSM303DLHC_SCL (alternate 4).
354 * PB7 - PIN7 LSM303DLHC_SDA (alternate 4).
355 * PB8 - PIN8 (input pullup).
356 * PB9 - PIN9 (input pullup).
357 * PB10 - PIN10 (input pullup).
358 * PB11 - PIN11 (input pullup).
359 * PB12 - PIN12 (input pullup).
360 * PB13 - PIN13 (input pullup).
361 * PB14 - PIN14 (input pullup).
362 * PB15 - PIN15 (input pullup).
363 */
364#define VAL_GPIOB_MODER (PIN_MODE_INPUT(GPIOB_PIN0) | \
365 PIN_MODE_INPUT(GPIOB_PIN1) | \
366 PIN_MODE_INPUT(GPIOB_PIN2) | \
367 PIN_MODE_ALTERNATE(GPIOB_PIN3) | \
368 PIN_MODE_INPUT(GPIOB_PIN4) | \
369 PIN_MODE_INPUT(GPIOB_PIN5) | \
370 PIN_MODE_ALTERNATE(GPIOB_PIN6) | \
371 PIN_MODE_OUTPUT(GPIOB_PIN7) | \
372 PIN_MODE_INPUT(GPIOB_PIN8) | \
373 PIN_MODE_INPUT(GPIOB_PIN9) | \
374 PIN_MODE_INPUT(GPIOB_PIN10) | \
375 PIN_MODE_INPUT(GPIOB_PIN11) | \
376 PIN_MODE_INPUT(GPIOB_PIN12) | \
377 PIN_MODE_INPUT(GPIOB_PIN13) | \
378 PIN_MODE_INPUT(GPIOB_PIN14) | \
379 PIN_MODE_INPUT(GPIOB_PIN15))
380#define VAL_GPIOB_OTYPER (PIN_OTYPE_PUSHPULL(GPIOB_PIN0) | \
381 PIN_OTYPE_PUSHPULL(GPIOB_PIN1) | \
382 PIN_OTYPE_PUSHPULL(GPIOB_PIN2) | \
383 PIN_OTYPE_PUSHPULL(GPIOB_PIN3) | \
384 PIN_OTYPE_PUSHPULL(GPIOB_PIN4) | \
385 PIN_OTYPE_PUSHPULL(GPIOB_PIN5) | \
386 PIN_OTYPE_OPENDRAIN(GPIOB_PIN6) | \
387 PIN_OTYPE_PUSHPULL(GPIOB_PIN7) | \
388 PIN_OTYPE_PUSHPULL(GPIOB_PIN8) | \
389 PIN_OTYPE_PUSHPULL(GPIOB_PIN9) | \
390 PIN_OTYPE_PUSHPULL(GPIOB_PIN10) | \
391 PIN_OTYPE_PUSHPULL(GPIOB_PIN11) | \
392 PIN_OTYPE_PUSHPULL(GPIOB_PIN12) | \
393 PIN_OTYPE_PUSHPULL(GPIOB_PIN13) | \
394 PIN_OTYPE_PUSHPULL(GPIOB_PIN14) | \
395 PIN_OTYPE_PUSHPULL(GPIOB_PIN15))
396#define VAL_GPIOB_OSPEEDR (PIN_OSPEED_VERYLOW(GPIOB_PIN0) | \
397 PIN_OSPEED_VERYLOW(GPIOB_PIN1) | \
398 PIN_OSPEED_VERYLOW(GPIOB_PIN2) | \
399 PIN_OSPEED_HIGH(GPIOB_PIN3) | \
400 PIN_OSPEED_VERYLOW(GPIOB_PIN4) | \
401 PIN_OSPEED_VERYLOW(GPIOB_PIN5) | \
402 PIN_OSPEED_HIGH(GPIOB_PIN6) | \
403 PIN_OSPEED_VERYLOW(GPIOB_PIN7) | \
404 PIN_OSPEED_VERYLOW(GPIOB_PIN8) | \
405 PIN_OSPEED_VERYLOW(GPIOB_PIN9) | \
406 PIN_OSPEED_VERYLOW(GPIOB_PIN10) | \
407 PIN_OSPEED_VERYLOW(GPIOB_PIN11) | \
408 PIN_OSPEED_VERYLOW(GPIOB_PIN12) | \
409 PIN_OSPEED_VERYLOW(GPIOB_PIN13) | \
410 PIN_OSPEED_VERYLOW(GPIOB_PIN14) | \
411 PIN_OSPEED_VERYLOW(GPIOB_PIN15))
412#define VAL_GPIOB_PUPDR (PIN_PUPDR_PULLUP(GPIOB_PIN0) | \
413 PIN_PUPDR_PULLUP(GPIOB_PIN1) | \
414 PIN_PUPDR_PULLUP(GPIOB_PIN2) | \
415 PIN_PUPDR_FLOATING(GPIOB_PIN3) | \
416 PIN_PUPDR_PULLUP(GPIOB_PIN4) | \
417 PIN_PUPDR_PULLUP(GPIOB_PIN5) | \
418 PIN_PUPDR_FLOATING(GPIOB_PIN6) | \
419 PIN_PUPDR_PULLDOWN(GPIOB_PIN7) | \
420 PIN_PUPDR_PULLUP(GPIOB_PIN8) | \
421 PIN_PUPDR_PULLUP(GPIOB_PIN9) | \
422 PIN_PUPDR_PULLUP(GPIOB_PIN10) | \
423 PIN_PUPDR_PULLUP(GPIOB_PIN11) | \
424 PIN_PUPDR_PULLUP(GPIOB_PIN12) | \
425 PIN_PUPDR_PULLUP(GPIOB_PIN13) | \
426 PIN_PUPDR_PULLUP(GPIOB_PIN14) | \
427 PIN_PUPDR_PULLUP(GPIOB_PIN15))
428#define VAL_GPIOB_ODR (PIN_ODR_HIGH(GPIOB_PIN0) | \
429 PIN_ODR_HIGH(GPIOB_PIN1) | \
430 PIN_ODR_HIGH(GPIOB_PIN2) | \
431 PIN_ODR_HIGH(GPIOB_PIN3) | \
432 PIN_ODR_HIGH(GPIOB_PIN4) | \
433 PIN_ODR_HIGH(GPIOB_PIN5) | \
434 PIN_ODR_HIGH(GPIOB_PIN6) | \
435 PIN_ODR_LOW(GPIOB_PIN7) | \
436 PIN_ODR_HIGH(GPIOB_PIN8) | \
437 PIN_ODR_HIGH(GPIOB_PIN9) | \
438 PIN_ODR_HIGH(GPIOB_PIN10) | \
439 PIN_ODR_HIGH(GPIOB_PIN11) | \
440 PIN_ODR_HIGH(GPIOB_PIN12) | \
441 PIN_ODR_HIGH(GPIOB_PIN13) | \
442 PIN_ODR_HIGH(GPIOB_PIN14) | \
443 PIN_ODR_HIGH(GPIOB_PIN15))
444#define VAL_GPIOB_AFRL (PIN_AFIO_AF(GPIOB_PIN0, 0) | \
445 PIN_AFIO_AF(GPIOB_PIN1, 0) | \
446 PIN_AFIO_AF(GPIOB_PIN2, 0) | \
447 PIN_AFIO_AF(GPIOB_PIN3, 0) | \
448 PIN_AFIO_AF(GPIOB_PIN4, 0) | \
449 PIN_AFIO_AF(GPIOB_PIN5, 0) | \
450 PIN_AFIO_AF(GPIOB_PIN6, 4) | \
451 PIN_AFIO_AF(GPIOB_PIN7, 0))
452#define VAL_GPIOB_AFRH (PIN_AFIO_AF(GPIOB_PIN8, 0) | \
453 PIN_AFIO_AF(GPIOB_PIN9, 0) | \
454 PIN_AFIO_AF(GPIOB_PIN10, 0) | \
455 PIN_AFIO_AF(GPIOB_PIN11, 0) | \
456 PIN_AFIO_AF(GPIOB_PIN12, 0) | \
457 PIN_AFIO_AF(GPIOB_PIN13, 0) | \
458 PIN_AFIO_AF(GPIOB_PIN14, 0) | \
459 PIN_AFIO_AF(GPIOB_PIN15, 0))
460
461/*
462 * GPIOC setup:
463 *
464 * PC0 - PIN0 (input pullup).
465 * PC1 - PIN1 (input pullup).
466 * PC2 - PIN2 (input pullup).
467 * PC3 - PIN3 (input pullup).
468 * PC4 - PIN4 (input pullup).
469 * PC5 - PIN5 (input pullup).
470 * PC6 - PIN6 (input pullup).
471 * PC7 - PIN7 (input pullup).
472 * PC8 - PIN8 (input pullup).
473 * PC9 - PIN9 (input pullup).
474 * PC10 - PIN10 (input pullup).
475 * PC11 - PIN11 (input pullup).
476 * PC12 - PIN12 (input pullup).
477 * PC13 - PIN13 (input pullup).
478 * PC14 - PIN14 (input floating).
479 * PC15 - PIN15 (input floating).
480 */
481#define VAL_GPIOC_MODER (PIN_MODE_INPUT(GPIOC_PIN0) | \
482 PIN_MODE_INPUT(GPIOC_PIN1) | \
483 PIN_MODE_INPUT(GPIOC_PIN2) | \
484 PIN_MODE_INPUT(GPIOC_PIN3) | \
485 PIN_MODE_INPUT(GPIOC_PIN4) | \
486 PIN_MODE_INPUT(GPIOC_PIN5) | \
487 PIN_MODE_INPUT(GPIOC_PIN6) | \
488 PIN_MODE_INPUT(GPIOC_PIN7) | \
489 PIN_MODE_INPUT(GPIOC_PIN8) | \
490 PIN_MODE_INPUT(GPIOC_PIN9) | \
491 PIN_MODE_INPUT(GPIOC_PIN10) | \
492 PIN_MODE_INPUT(GPIOC_PIN11) | \
493 PIN_MODE_INPUT(GPIOC_PIN12) | \
494 PIN_MODE_INPUT(GPIOC_PIN13) | \
495 PIN_MODE_INPUT(GPIOC_PIN14) | \
496 PIN_MODE_INPUT(GPIOC_PIN15))
497#define VAL_GPIOC_OTYPER (PIN_OTYPE_PUSHPULL(GPIOC_PIN0) | \
498 PIN_OTYPE_PUSHPULL(GPIOC_PIN1) | \
499 PIN_OTYPE_PUSHPULL(GPIOC_PIN2) | \
500 PIN_OTYPE_PUSHPULL(GPIOC_PIN3) | \
501 PIN_OTYPE_PUSHPULL(GPIOC_PIN4) | \
502 PIN_OTYPE_PUSHPULL(GPIOC_PIN5) | \
503 PIN_OTYPE_PUSHPULL(GPIOC_PIN6) | \
504 PIN_OTYPE_PUSHPULL(GPIOC_PIN7) | \
505 PIN_OTYPE_PUSHPULL(GPIOC_PIN8) | \
506 PIN_OTYPE_PUSHPULL(GPIOC_PIN9) | \
507 PIN_OTYPE_PUSHPULL(GPIOC_PIN10) | \
508 PIN_OTYPE_PUSHPULL(GPIOC_PIN11) | \
509 PIN_OTYPE_PUSHPULL(GPIOC_PIN12) | \
510 PIN_OTYPE_PUSHPULL(GPIOC_PIN13) | \
511 PIN_OTYPE_PUSHPULL(GPIOC_PIN14) | \
512 PIN_OTYPE_PUSHPULL(GPIOC_PIN15))
513#define VAL_GPIOC_OSPEEDR (PIN_OSPEED_VERYLOW(GPIOC_PIN0) | \
514 PIN_OSPEED_VERYLOW(GPIOC_PIN1) | \
515 PIN_OSPEED_VERYLOW(GPIOC_PIN2) | \
516 PIN_OSPEED_VERYLOW(GPIOC_PIN3) | \
517 PIN_OSPEED_VERYLOW(GPIOC_PIN4) | \
518 PIN_OSPEED_VERYLOW(GPIOC_PIN5) | \
519 PIN_OSPEED_VERYLOW(GPIOC_PIN6) | \
520 PIN_OSPEED_VERYLOW(GPIOC_PIN7) | \
521 PIN_OSPEED_VERYLOW(GPIOC_PIN8) | \
522 PIN_OSPEED_VERYLOW(GPIOC_PIN9) | \
523 PIN_OSPEED_VERYLOW(GPIOC_PIN10) | \
524 PIN_OSPEED_VERYLOW(GPIOC_PIN11) | \
525 PIN_OSPEED_VERYLOW(GPIOC_PIN12) | \
526 PIN_OSPEED_VERYLOW(GPIOC_PIN13) | \
527 PIN_OSPEED_HIGH(GPIOC_PIN14) | \
528 PIN_OSPEED_HIGH(GPIOC_PIN15))
529#define VAL_GPIOC_PUPDR (PIN_PUPDR_PULLUP(GPIOC_PIN0) | \
530 PIN_PUPDR_PULLUP(GPIOC_PIN1) | \
531 PIN_PUPDR_PULLUP(GPIOC_PIN2) | \
532 PIN_PUPDR_PULLUP(GPIOC_PIN3) | \
533 PIN_PUPDR_PULLUP(GPIOC_PIN4) | \
534 PIN_PUPDR_PULLUP(GPIOC_PIN5) | \
535 PIN_PUPDR_PULLUP(GPIOC_PIN6) | \
536 PIN_PUPDR_PULLUP(GPIOC_PIN7) | \
537 PIN_PUPDR_PULLUP(GPIOC_PIN8) | \
538 PIN_PUPDR_PULLUP(GPIOC_PIN9) | \
539 PIN_PUPDR_PULLUP(GPIOC_PIN10) | \
540 PIN_PUPDR_PULLUP(GPIOC_PIN11) | \
541 PIN_PUPDR_PULLUP(GPIOC_PIN12) | \
542 PIN_PUPDR_PULLUP(GPIOC_PIN13) | \
543 PIN_PUPDR_FLOATING(GPIOC_PIN14) | \
544 PIN_PUPDR_FLOATING(GPIOC_PIN15))
545#define VAL_GPIOC_ODR (PIN_ODR_HIGH(GPIOC_PIN0) | \
546 PIN_ODR_HIGH(GPIOC_PIN1) | \
547 PIN_ODR_HIGH(GPIOC_PIN2) | \
548 PIN_ODR_HIGH(GPIOC_PIN3) | \
549 PIN_ODR_HIGH(GPIOC_PIN4) | \
550 PIN_ODR_HIGH(GPIOC_PIN5) | \
551 PIN_ODR_HIGH(GPIOC_PIN6) | \
552 PIN_ODR_HIGH(GPIOC_PIN7) | \
553 PIN_ODR_HIGH(GPIOC_PIN8) | \
554 PIN_ODR_HIGH(GPIOC_PIN9) | \
555 PIN_ODR_HIGH(GPIOC_PIN10) | \
556 PIN_ODR_HIGH(GPIOC_PIN11) | \
557 PIN_ODR_HIGH(GPIOC_PIN12) | \
558 PIN_ODR_HIGH(GPIOC_PIN13) | \
559 PIN_ODR_HIGH(GPIOC_PIN14) | \
560 PIN_ODR_HIGH(GPIOC_PIN15))
561#define VAL_GPIOC_AFRL (PIN_AFIO_AF(GPIOC_PIN0, 0) | \
562 PIN_AFIO_AF(GPIOC_PIN1, 0) | \
563 PIN_AFIO_AF(GPIOC_PIN2, 0) | \
564 PIN_AFIO_AF(GPIOC_PIN3, 0) | \
565 PIN_AFIO_AF(GPIOC_PIN4, 0) | \
566 PIN_AFIO_AF(GPIOC_PIN5, 0) | \
567 PIN_AFIO_AF(GPIOC_PIN6, 0) | \
568 PIN_AFIO_AF(GPIOC_PIN7, 0))
569#define VAL_GPIOC_AFRH (PIN_AFIO_AF(GPIOC_PIN8, 0) | \
570 PIN_AFIO_AF(GPIOC_PIN9, 0) | \
571 PIN_AFIO_AF(GPIOC_PIN10, 0) | \
572 PIN_AFIO_AF(GPIOC_PIN11, 0) | \
573 PIN_AFIO_AF(GPIOC_PIN12, 0) | \
574 PIN_AFIO_AF(GPIOC_PIN13, 0) | \
575 PIN_AFIO_AF(GPIOC_PIN14, 0) | \
576 PIN_AFIO_AF(GPIOC_PIN15, 0))
577
578/*
579 * GPIOD setup:
580 *
581 * PD0 - PIN0 (input pullup).
582 * PD1 - PIN1 (input pullup).
583 * PD2 - PIN2 (input pullup).
584 * PD3 - PIN3 (input pullup).
585 * PD4 - PIN4 (input pullup).
586 * PD5 - PIN5 (input pullup).
587 * PD6 - PIN6 (input pullup).
588 * PD7 - PIN7 (input pullup).
589 * PD8 - PIN8 (input pullup).
590 * PD9 - PIN9 (input pullup).
591 * PD11 - PIN10 (input pullup).
592 * PD11 - PIN11 (input pullup).
593 * PD12 - PIN12 (input pullup).
594 * PD13 - PIN13 (input pullup).
595 * PD14 - PIN14 (input pullup).
596 * PD15 - PIN15 (input pullup).
597 */
598#define VAL_GPIOD_MODER (PIN_MODE_INPUT(GPIOD_PIN0) | \
599 PIN_MODE_INPUT(GPIOD_PIN1) | \
600 PIN_MODE_INPUT(GPIOD_PIN2) | \
601 PIN_MODE_INPUT(GPIOD_PIN3) | \
602 PIN_MODE_INPUT(GPIOD_PIN4) | \
603 PIN_MODE_INPUT(GPIOD_PIN5) | \
604 PIN_MODE_INPUT(GPIOD_PIN6) | \
605 PIN_MODE_INPUT(GPIOD_PIN7) | \
606 PIN_MODE_INPUT(GPIOD_PIN8) | \
607 PIN_MODE_INPUT(GPIOD_PIN9) | \
608 PIN_MODE_INPUT(GPIOD_PIN10) | \
609 PIN_MODE_INPUT(GPIOD_PIN11) | \
610 PIN_MODE_INPUT(GPIOD_PIN12) | \
611 PIN_MODE_INPUT(GPIOD_PIN13) | \
612 PIN_MODE_INPUT(GPIOD_PIN14) | \
613 PIN_MODE_INPUT(GPIOD_PIN15))
614#define VAL_GPIOD_OTYPER (PIN_OTYPE_PUSHPULL(GPIOD_PIN0) | \
615 PIN_OTYPE_PUSHPULL(GPIOD_PIN1) | \
616 PIN_OTYPE_PUSHPULL(GPIOD_PIN2) | \
617 PIN_OTYPE_PUSHPULL(GPIOD_PIN3) | \
618 PIN_OTYPE_PUSHPULL(GPIOD_PIN4) | \
619 PIN_OTYPE_PUSHPULL(GPIOD_PIN5) | \
620 PIN_OTYPE_PUSHPULL(GPIOD_PIN6) | \
621 PIN_OTYPE_PUSHPULL(GPIOD_PIN7) | \
622 PIN_OTYPE_PUSHPULL(GPIOD_PIN8) | \
623 PIN_OTYPE_PUSHPULL(GPIOD_PIN9) | \
624 PIN_OTYPE_PUSHPULL(GPIOD_PIN10) | \
625 PIN_OTYPE_PUSHPULL(GPIOD_PIN11) | \
626 PIN_OTYPE_PUSHPULL(GPIOD_PIN12) | \
627 PIN_OTYPE_PUSHPULL(GPIOD_PIN13) | \
628 PIN_OTYPE_PUSHPULL(GPIOD_PIN14) | \
629 PIN_OTYPE_PUSHPULL(GPIOD_PIN15))
630#define VAL_GPIOD_OSPEEDR (PIN_OSPEED_VERYLOW(GPIOD_PIN0) | \
631 PIN_OSPEED_VERYLOW(GPIOD_PIN1) | \
632 PIN_OSPEED_VERYLOW(GPIOD_PIN2) | \
633 PIN_OSPEED_VERYLOW(GPIOD_PIN3) | \
634 PIN_OSPEED_VERYLOW(GPIOD_PIN4) | \
635 PIN_OSPEED_VERYLOW(GPIOD_PIN5) | \
636 PIN_OSPEED_VERYLOW(GPIOD_PIN6) | \
637 PIN_OSPEED_VERYLOW(GPIOD_PIN7) | \
638 PIN_OSPEED_VERYLOW(GPIOD_PIN8) | \
639 PIN_OSPEED_VERYLOW(GPIOD_PIN9) | \
640 PIN_OSPEED_VERYLOW(GPIOD_PIN10) | \
641 PIN_OSPEED_VERYLOW(GPIOD_PIN11) | \
642 PIN_OSPEED_VERYLOW(GPIOD_PIN12) | \
643 PIN_OSPEED_VERYLOW(GPIOD_PIN13) | \
644 PIN_OSPEED_VERYLOW(GPIOD_PIN14) | \
645 PIN_OSPEED_VERYLOW(GPIOD_PIN15))
646#define VAL_GPIOD_PUPDR (PIN_PUPDR_PULLUP(GPIOD_PIN0) | \
647 PIN_PUPDR_PULLUP(GPIOD_PIN1) | \
648 PIN_PUPDR_PULLUP(GPIOD_PIN2) | \
649 PIN_PUPDR_PULLUP(GPIOD_PIN3) | \
650 PIN_PUPDR_PULLUP(GPIOD_PIN4) | \
651 PIN_PUPDR_PULLUP(GPIOD_PIN5) | \
652 PIN_PUPDR_PULLUP(GPIOD_PIN6) | \
653 PIN_PUPDR_PULLUP(GPIOD_PIN7) | \
654 PIN_PUPDR_PULLUP(GPIOD_PIN8) | \
655 PIN_PUPDR_PULLUP(GPIOD_PIN9) | \
656 PIN_PUPDR_PULLUP(GPIOD_PIN10) | \
657 PIN_PUPDR_PULLUP(GPIOD_PIN11) | \
658 PIN_PUPDR_PULLUP(GPIOD_PIN12) | \
659 PIN_PUPDR_PULLUP(GPIOD_PIN13) | \
660 PIN_PUPDR_PULLUP(GPIOD_PIN14) | \
661 PIN_PUPDR_PULLUP(GPIOD_PIN15))
662#define VAL_GPIOD_ODR (PIN_ODR_HIGH(GPIOD_PIN0) | \
663 PIN_ODR_HIGH(GPIOD_PIN1) | \
664 PIN_ODR_HIGH(GPIOD_PIN2) | \
665 PIN_ODR_HIGH(GPIOD_PIN3) | \
666 PIN_ODR_HIGH(GPIOD_PIN4) | \
667 PIN_ODR_HIGH(GPIOD_PIN5) | \
668 PIN_ODR_HIGH(GPIOD_PIN6) | \
669 PIN_ODR_HIGH(GPIOD_PIN7) | \
670 PIN_ODR_HIGH(GPIOD_PIN8) | \
671 PIN_ODR_HIGH(GPIOD_PIN9) | \
672 PIN_ODR_HIGH(GPIOD_PIN10) | \
673 PIN_ODR_HIGH(GPIOD_PIN11) | \
674 PIN_ODR_HIGH(GPIOD_PIN12) | \
675 PIN_ODR_HIGH(GPIOD_PIN13) | \
676 PIN_ODR_HIGH(GPIOD_PIN14) | \
677 PIN_ODR_HIGH(GPIOD_PIN15))
678#define VAL_GPIOD_AFRL (PIN_AFIO_AF(GPIOD_PIN0, 0) | \
679 PIN_AFIO_AF(GPIOD_PIN1, 0) | \
680 PIN_AFIO_AF(GPIOD_PIN2, 0) | \
681 PIN_AFIO_AF(GPIOD_PIN3, 0) | \
682 PIN_AFIO_AF(GPIOD_PIN4, 0) | \
683 PIN_AFIO_AF(GPIOD_PIN5, 0) | \
684 PIN_AFIO_AF(GPIOD_PIN6, 0) | \
685 PIN_AFIO_AF(GPIOD_PIN7, 0))
686#define VAL_GPIOD_AFRH (PIN_AFIO_AF(GPIOD_PIN8, 0) | \
687 PIN_AFIO_AF(GPIOD_PIN9, 0) | \
688 PIN_AFIO_AF(GPIOD_PIN10, 0) | \
689 PIN_AFIO_AF(GPIOD_PIN11, 0) | \
690 PIN_AFIO_AF(GPIOD_PIN12, 0) | \
691 PIN_AFIO_AF(GPIOD_PIN13, 0) | \
692 PIN_AFIO_AF(GPIOD_PIN14, 0) | \
693 PIN_AFIO_AF(GPIOD_PIN15, 0))
694
695/*
696 * GPIOE setup:
697 *
698 * PE0 - PIN0 (input pullup).
699 * PE1 - PIN1 (input pullup).
700 * PE2 - PIN2 (input pullup).
701 * PE3 - PIN3 L3GD20_CS (output pushpull maximum).
702 * PE4 - PIN4 (input pullup).
703 * PE5 - PIN5 (input pullup).
704 * PE6 - PIN6 (input pullup).
705 * PE7 - PIN7 (input pullup).
706 * PE8 - PIN8 (output pushpull maximum).
707 * PE9 - PIN9 (output pushpull maximum).
708 * PE10 - PIN10 (output pushpull maximum).
709 * PE11 - PIN11 (output pushpull maximum).
710 * PE12 - PIN12 (output pushpull maximum).
711 * PE13 - PIN13 (output pushpull maximum).
712 * PE14 - PIN14 (output pushpull maximum).
713 * PE15 - PIN15 (output pushpull maximum).
714 */
715#define VAL_GPIOE_MODER (PIN_MODE_INPUT(GPIOE_PIN0) | \
716 PIN_MODE_INPUT(GPIOE_PIN1) | \
717 PIN_MODE_INPUT(GPIOE_PIN2) |\
718 PIN_MODE_OUTPUT(GPIOE_PIN3) | \
719 PIN_MODE_INPUT(GPIOE_PIN4) |\
720 PIN_MODE_INPUT(GPIOE_PIN5) |\
721 PIN_MODE_INPUT(GPIOE_PIN6) | \
722 PIN_MODE_INPUT(GPIOE_PIN7) | \
723 PIN_MODE_OUTPUT(GPIOE_PIN8) | \
724 PIN_MODE_OUTPUT(GPIOE_PIN9) | \
725 PIN_MODE_OUTPUT(GPIOE_PIN10) | \
726 PIN_MODE_OUTPUT(GPIOE_PIN11) | \
727 PIN_MODE_OUTPUT(GPIOE_PIN12) | \
728 PIN_MODE_OUTPUT(GPIOE_PIN13) | \
729 PIN_MODE_OUTPUT(GPIOE_PIN14) | \
730 PIN_MODE_OUTPUT(GPIOE_PIN15))
731#define VAL_GPIOE_OTYPER (PIN_OTYPE_PUSHPULL(GPIOE_PIN0) |\
732 PIN_OTYPE_PUSHPULL(GPIOE_PIN1) |\
733 PIN_OTYPE_PUSHPULL(GPIOE_PIN2) |\
734 PIN_OTYPE_PUSHPULL(GPIOE_PIN3) | \
735 PIN_OTYPE_PUSHPULL(GPIOE_PIN4) |\
736 PIN_OTYPE_PUSHPULL(GPIOE_PIN5) |\
737 PIN_OTYPE_PUSHPULL(GPIOE_PIN6) | \
738 PIN_OTYPE_PUSHPULL(GPIOE_PIN7) | \
739 PIN_OTYPE_PUSHPULL(GPIOE_PIN8) | \
740 PIN_OTYPE_PUSHPULL(GPIOE_PIN9) | \
741 PIN_OTYPE_PUSHPULL(GPIOE_PIN10) |\
742 PIN_OTYPE_PUSHPULL(GPIOE_PIN11) | \
743 PIN_OTYPE_PUSHPULL(GPIOE_PIN12) | \
744 PIN_OTYPE_PUSHPULL(GPIOE_PIN13) | \
745 PIN_OTYPE_PUSHPULL(GPIOE_PIN14) |\
746 PIN_OTYPE_PUSHPULL(GPIOE_PIN15))
747#define VAL_GPIOE_OSPEEDR (PIN_OSPEED_VERYLOW(GPIOE_PIN0) |\
748 PIN_OSPEED_VERYLOW(GPIOE_PIN1) |\
749 PIN_OSPEED_VERYLOW(GPIOE_PIN2) |\
750 PIN_OSPEED_HIGH(GPIOE_PIN3) | \
751 PIN_OSPEED_VERYLOW(GPIOE_PIN4) |\
752 PIN_OSPEED_VERYLOW(GPIOE_PIN5) |\
753 PIN_OSPEED_VERYLOW(GPIOE_PIN6) | \
754 PIN_OSPEED_VERYLOW(GPIOE_PIN7) | \
755 PIN_OSPEED_HIGH(GPIOE_PIN8) | \
756 PIN_OSPEED_HIGH(GPIOE_PIN9) | \
757 PIN_OSPEED_HIGH(GPIOE_PIN10) | \
758 PIN_OSPEED_HIGH(GPIOE_PIN11) | \
759 PIN_OSPEED_HIGH(GPIOE_PIN12) | \
760 PIN_OSPEED_HIGH(GPIOE_PIN13) | \
761 PIN_OSPEED_HIGH(GPIOE_PIN14) | \
762 PIN_OSPEED_HIGH(GPIOE_PIN15))
763#define VAL_GPIOE_PUPDR (PIN_PUPDR_PULLUP(GPIOE_PIN0) | \
764 PIN_PUPDR_PULLUP(GPIOE_PIN1) | \
765 PIN_PUPDR_PULLUP(GPIOE_PIN2) |\
766 PIN_PUPDR_FLOATING(GPIOE_PIN3) | \
767 PIN_PUPDR_PULLUP(GPIOE_PIN4) |\
768 PIN_PUPDR_PULLUP(GPIOE_PIN5) |\
769 PIN_PUPDR_PULLUP(GPIOE_PIN6) | \
770 PIN_PUPDR_PULLUP(GPIOE_PIN7) | \
771 PIN_PUPDR_PULLUP(GPIOE_PIN8) | \
772 PIN_PUPDR_PULLUP(GPIOE_PIN9) | \
773 PIN_PUPDR_PULLUP(GPIOE_PIN10) | \
774 PIN_PUPDR_FLOATING(GPIOE_PIN11) | \
775 PIN_PUPDR_PULLUP(GPIOE_PIN12) | \
776 PIN_PUPDR_FLOATING(GPIOE_PIN13) | \
777 PIN_PUPDR_FLOATING(GPIOE_PIN14) |\
778 PIN_PUPDR_FLOATING(GPIOE_PIN15))
779#define VAL_GPIOE_ODR (PIN_ODR_HIGH(GPIOE_PIN0) | \
780 PIN_ODR_HIGH(GPIOE_PIN1) | \
781 PIN_ODR_HIGH(GPIOE_PIN2) | \
782 PIN_ODR_HIGH(GPIOE_PIN3) | \
783 PIN_ODR_HIGH(GPIOE_PIN4) | \
784 PIN_ODR_HIGH(GPIOE_PIN5) | \
785 PIN_ODR_HIGH(GPIOE_PIN6) | \
786 PIN_ODR_HIGH(GPIOE_PIN7) | \
787 PIN_ODR_LOW(GPIOE_PIN8) | \
788 PIN_ODR_LOW(GPIOE_PIN9) | \
789 PIN_ODR_LOW(GPIOE_PIN10) | \
790 PIN_ODR_LOW(GPIOE_PIN11) | \
791 PIN_ODR_LOW(GPIOE_PIN12) | \
792 PIN_ODR_LOW(GPIOE_PIN13) | \
793 PIN_ODR_LOW(GPIOE_PIN14) | \
794 PIN_ODR_LOW(GPIOE_PIN15))
795#define VAL_GPIOE_AFRL (PIN_AFIO_AF(GPIOE_PIN0, 0) | \
796 PIN_AFIO_AF(GPIOE_PIN1, 0) | \
797 PIN_AFIO_AF(GPIOE_PIN2, 0) |\
798 PIN_AFIO_AF(GPIOE_PIN3, 0) | \
799 PIN_AFIO_AF(GPIOE_PIN4, 0) |\
800 PIN_AFIO_AF(GPIOE_PIN5, 0) |\
801 PIN_AFIO_AF(GPIOE_PIN6, 0) | \
802 PIN_AFIO_AF(GPIOE_PIN7, 0))
803#define VAL_GPIOE_AFRH (PIN_AFIO_AF(GPIOE_PIN8, 0) | \
804 PIN_AFIO_AF(GPIOE_PIN9, 0) | \
805 PIN_AFIO_AF(GPIOE_PIN10, 0) | \
806 PIN_AFIO_AF(GPIOE_PIN11, 0) | \
807 PIN_AFIO_AF(GPIOE_PIN12, 0) | \
808 PIN_AFIO_AF(GPIOE_PIN13, 0) | \
809 PIN_AFIO_AF(GPIOE_PIN14, 0) | \
810 PIN_AFIO_AF(GPIOE_PIN15, 0))
811
812/*
813 * GPIOF setup:
814 *
815 * PF0 - I2C2_SDA (input floating).
816 * PF1 - I2C2_SCL (input floating).
817 * PF2 - PIN2 (input pullup).
818 * PF3 - PIN3 (input pullup).
819 * PF4 - PIN4 (input pullup).
820 * PF5 - PIN5 (input pullup).
821 * PF6 - PIN6 (input pullup).
822 * PF7 - PIN7 (input pullup).
823 * PF8 - PIN8 (input pullup).
824 * PF9 - PIN9 (input pullup).
825 * PF10 - PIN10 (input pullup).
826 * PF11 - PIN11 (input pullup).
827 * PF12 - PIN12 (input pullup).
828 * PF13 - PIN13 (input pullup).
829 * PF14 - PIN14 (input pullup).
830 * PF15 - PIN15 (input pullup).
831 */
832#define VAL_GPIOF_MODER (PIN_MODE_INPUT(GPIOF_I2C2_SDA) | \
833 PIN_MODE_INPUT(GPIOF_I2C2_SCL) | \
834 PIN_MODE_INPUT(GPIOF_PIN2) | \
835 PIN_MODE_INPUT(GPIOF_PIN3) | \
836 PIN_MODE_INPUT(GPIOF_PIN4) | \
837 PIN_MODE_INPUT(GPIOF_PIN5) | \
838 PIN_MODE_INPUT(GPIOF_PIN6) | \
839 PIN_MODE_INPUT(GPIOF_PIN7) | \
840 PIN_MODE_INPUT(GPIOF_PIN8) | \
841 PIN_MODE_INPUT(GPIOF_PIN9) | \
842 PIN_MODE_INPUT(GPIOF_PIN10) | \
843 PIN_MODE_INPUT(GPIOF_PIN11) | \
844 PIN_MODE_INPUT(GPIOF_PIN12) | \
845 PIN_MODE_INPUT(GPIOF_PIN13) | \
846 PIN_MODE_INPUT(GPIOF_PIN14) | \
847 PIN_MODE_INPUT(GPIOF_PIN15))
848#define VAL_GPIOF_OTYPER (PIN_OTYPE_PUSHPULL(GPIOF_I2C2_SDA) | \
849 PIN_OTYPE_PUSHPULL(GPIOF_I2C2_SCL) | \
850 PIN_OTYPE_PUSHPULL(GPIOF_PIN2) | \
851 PIN_OTYPE_PUSHPULL(GPIOF_PIN3) | \
852 PIN_OTYPE_PUSHPULL(GPIOF_PIN4) | \
853 PIN_OTYPE_PUSHPULL(GPIOF_PIN5) | \
854 PIN_OTYPE_PUSHPULL(GPIOF_PIN6) | \
855 PIN_OTYPE_PUSHPULL(GPIOF_PIN7) | \
856 PIN_OTYPE_PUSHPULL(GPIOF_PIN8) | \
857 PIN_OTYPE_PUSHPULL(GPIOF_PIN9) | \
858 PIN_OTYPE_PUSHPULL(GPIOF_PIN10) | \
859 PIN_OTYPE_PUSHPULL(GPIOF_PIN11) | \
860 PIN_OTYPE_PUSHPULL(GPIOF_PIN12) | \
861 PIN_OTYPE_PUSHPULL(GPIOF_PIN13) | \
862 PIN_OTYPE_PUSHPULL(GPIOF_PIN14) | \
863 PIN_OTYPE_PUSHPULL(GPIOF_PIN15))
864#define VAL_GPIOF_OSPEEDR (PIN_OSPEED_HIGH(GPIOF_I2C2_SDA) | \
865 PIN_OSPEED_HIGH(GPIOF_I2C2_SCL) | \
866 PIN_OSPEED_VERYLOW(GPIOF_PIN2) | \
867 PIN_OSPEED_VERYLOW(GPIOF_PIN3) | \
868 PIN_OSPEED_VERYLOW(GPIOF_PIN4) | \
869 PIN_OSPEED_VERYLOW(GPIOF_PIN5) | \
870 PIN_OSPEED_VERYLOW(GPIOF_PIN6) | \
871 PIN_OSPEED_VERYLOW(GPIOF_PIN7) | \
872 PIN_OSPEED_VERYLOW(GPIOF_PIN8) | \
873 PIN_OSPEED_VERYLOW(GPIOF_PIN9) | \
874 PIN_OSPEED_VERYLOW(GPIOF_PIN10) | \
875 PIN_OSPEED_VERYLOW(GPIOF_PIN11) | \
876 PIN_OSPEED_VERYLOW(GPIOF_PIN12) | \
877 PIN_OSPEED_VERYLOW(GPIOF_PIN13) | \
878 PIN_OSPEED_VERYLOW(GPIOF_PIN14) | \
879 PIN_OSPEED_VERYLOW(GPIOF_PIN15))
880#define VAL_GPIOF_PUPDR (PIN_PUPDR_FLOATING(GPIOF_I2C2_SDA) | \
881 PIN_PUPDR_FLOATING(GPIOF_I2C2_SCL) | \
882 PIN_PUPDR_PULLUP(GPIOF_PIN2) | \
883 PIN_PUPDR_PULLUP(GPIOF_PIN3) | \
884 PIN_PUPDR_PULLUP(GPIOF_PIN4) | \
885 PIN_PUPDR_PULLUP(GPIOF_PIN5) | \
886 PIN_PUPDR_PULLUP(GPIOF_PIN6) | \
887 PIN_PUPDR_PULLUP(GPIOF_PIN7) | \
888 PIN_PUPDR_PULLUP(GPIOF_PIN8) | \
889 PIN_PUPDR_PULLUP(GPIOF_PIN9) | \
890 PIN_PUPDR_PULLUP(GPIOF_PIN10) | \
891 PIN_PUPDR_PULLUP(GPIOF_PIN11) | \
892 PIN_PUPDR_PULLUP(GPIOF_PIN12) | \
893 PIN_PUPDR_PULLUP(GPIOF_PIN13) | \
894 PIN_PUPDR_PULLUP(GPIOF_PIN14) | \
895 PIN_PUPDR_PULLUP(GPIOF_PIN15))
896#define VAL_GPIOF_ODR (PIN_ODR_HIGH(GPIOF_I2C2_SDA) | \
897 PIN_ODR_HIGH(GPIOF_I2C2_SCL) | \
898 PIN_ODR_HIGH(GPIOF_PIN2) | \
899 PIN_ODR_HIGH(GPIOF_PIN3) | \
900 PIN_ODR_HIGH(GPIOF_PIN4) | \
901 PIN_ODR_HIGH(GPIOF_PIN5) | \
902 PIN_ODR_HIGH(GPIOF_PIN6) | \
903 PIN_ODR_HIGH(GPIOF_PIN7) | \
904 PIN_ODR_HIGH(GPIOF_PIN8) | \
905 PIN_ODR_HIGH(GPIOF_PIN9) | \
906 PIN_ODR_HIGH(GPIOF_PIN10) | \
907 PIN_ODR_HIGH(GPIOF_PIN11) | \
908 PIN_ODR_HIGH(GPIOF_PIN12) | \
909 PIN_ODR_HIGH(GPIOF_PIN13) | \
910 PIN_ODR_HIGH(GPIOF_PIN14) | \
911 PIN_ODR_HIGH(GPIOF_PIN15))
912#define VAL_GPIOF_AFRL (PIN_AFIO_AF(GPIOF_I2C2_SDA, 0) | \
913 PIN_AFIO_AF(GPIOF_I2C2_SCL, 0) | \
914 PIN_AFIO_AF(GPIOF_PIN2, 0) | \
915 PIN_AFIO_AF(GPIOF_PIN3, 0) | \
916 PIN_AFIO_AF(GPIOF_PIN4, 0) | \
917 PIN_AFIO_AF(GPIOF_PIN5, 0) | \
918 PIN_AFIO_AF(GPIOF_PIN6, 0) | \
919 PIN_AFIO_AF(GPIOF_PIN7, 0))
920#define VAL_GPIOF_AFRH (PIN_AFIO_AF(GPIOF_PIN8, 0) | \
921 PIN_AFIO_AF(GPIOF_PIN9, 0) | \
922 PIN_AFIO_AF(GPIOF_PIN10, 0) | \
923 PIN_AFIO_AF(GPIOF_PIN11, 0) | \
924 PIN_AFIO_AF(GPIOF_PIN12, 0) | \
925 PIN_AFIO_AF(GPIOF_PIN13, 0) | \
926 PIN_AFIO_AF(GPIOF_PIN14, 0) | \
927 PIN_AFIO_AF(GPIOF_PIN15, 0))
928
929/*
930 * GPIOG setup:
931 *
932 * PG0 - PIN0 (input pullup).
933 * PG1 - PIN1 (input pullup).
934 * PG2 - PIN2 (input pullup).
935 * PG3 - PIN3 (input pullup).
936 * PG4 - PIN4 (input pullup).
937 * PG5 - PIN5 (input pullup).
938 * PG6 - PIN6 (input pullup).
939 * PG7 - PIN7 (input pullup).
940 * PG8 - PIN8 (input pullup).
941 * PG9 - PIN9 (input pullup).
942 * PG10 - PIN10 (input pullup).
943 * PG11 - PIN11 (input pullup).
944 * PG12 - PIN12 (input pullup).
945 * PG13 - PIN13 (input pullup).
946 * PG14 - PIN14 (input pullup).
947 * PG15 - PIN15 (input pullup).
948 */
949#define VAL_GPIOG_MODER (PIN_MODE_INPUT(GPIOG_PIN0) | \
950 PIN_MODE_INPUT(GPIOG_PIN1) | \
951 PIN_MODE_INPUT(GPIOG_PIN2) | \
952 PIN_MODE_INPUT(GPIOG_PIN3) | \
953 PIN_MODE_INPUT(GPIOG_PIN4) | \
954 PIN_MODE_INPUT(GPIOG_PIN5) | \
955 PIN_MODE_INPUT(GPIOG_PIN6) | \
956 PIN_MODE_INPUT(GPIOG_PIN7) | \
957 PIN_MODE_INPUT(GPIOG_PIN8) | \
958 PIN_MODE_INPUT(GPIOG_PIN9) | \
959 PIN_MODE_INPUT(GPIOG_PIN10) | \
960 PIN_MODE_INPUT(GPIOG_PIN11) | \
961 PIN_MODE_INPUT(GPIOG_PIN12) | \
962 PIN_MODE_INPUT(GPIOG_PIN13) | \
963 PIN_MODE_INPUT(GPIOG_PIN14) | \
964 PIN_MODE_INPUT(GPIOG_PIN15))
965#define VAL_GPIOG_OTYPER (PIN_OTYPE_PUSHPULL(GPIOG_PIN0) | \
966 PIN_OTYPE_PUSHPULL(GPIOG_PIN1) | \
967 PIN_OTYPE_PUSHPULL(GPIOG_PIN2) | \
968 PIN_OTYPE_PUSHPULL(GPIOG_PIN3) | \
969 PIN_OTYPE_PUSHPULL(GPIOG_PIN4) | \
970 PIN_OTYPE_PUSHPULL(GPIOG_PIN5) | \
971 PIN_OTYPE_PUSHPULL(GPIOG_PIN6) | \
972 PIN_OTYPE_PUSHPULL(GPIOG_PIN7) | \
973 PIN_OTYPE_PUSHPULL(GPIOG_PIN8) | \
974 PIN_OTYPE_PUSHPULL(GPIOG_PIN9) | \
975 PIN_OTYPE_PUSHPULL(GPIOG_PIN10) | \
976 PIN_OTYPE_PUSHPULL(GPIOG_PIN11) | \
977 PIN_OTYPE_PUSHPULL(GPIOG_PIN12) | \
978 PIN_OTYPE_PUSHPULL(GPIOG_PIN13) | \
979 PIN_OTYPE_PUSHPULL(GPIOG_PIN14) | \
980 PIN_OTYPE_PUSHPULL(GPIOG_PIN15))
981#define VAL_GPIOG_OSPEEDR (PIN_OSPEED_VERYLOW(GPIOG_PIN0) | \
982 PIN_OSPEED_VERYLOW(GPIOG_PIN1) | \
983 PIN_OSPEED_VERYLOW(GPIOG_PIN2) | \
984 PIN_OSPEED_VERYLOW(GPIOG_PIN3) | \
985 PIN_OSPEED_VERYLOW(GPIOG_PIN4) | \
986 PIN_OSPEED_VERYLOW(GPIOG_PIN5) | \
987 PIN_OSPEED_VERYLOW(GPIOG_PIN6) | \
988 PIN_OSPEED_VERYLOW(GPIOG_PIN7) | \
989 PIN_OSPEED_VERYLOW(GPIOG_PIN8) | \
990 PIN_OSPEED_VERYLOW(GPIOG_PIN9) | \
991 PIN_OSPEED_VERYLOW(GPIOG_PIN10) | \
992 PIN_OSPEED_VERYLOW(GPIOG_PIN11) | \
993 PIN_OSPEED_VERYLOW(GPIOG_PIN12) | \
994 PIN_OSPEED_VERYLOW(GPIOG_PIN13) | \
995 PIN_OSPEED_VERYLOW(GPIOG_PIN14) | \
996 PIN_OSPEED_VERYLOW(GPIOG_PIN15))
997#define VAL_GPIOG_PUPDR (PIN_PUPDR_PULLUP(GPIOG_PIN0) | \
998 PIN_PUPDR_PULLUP(GPIOG_PIN1) | \
999 PIN_PUPDR_PULLUP(GPIOG_PIN2) | \
1000 PIN_PUPDR_PULLUP(GPIOG_PIN3) | \
1001 PIN_PUPDR_PULLUP(GPIOG_PIN4) | \
1002 PIN_PUPDR_PULLUP(GPIOG_PIN5) | \
1003 PIN_PUPDR_PULLUP(GPIOG_PIN6) | \
1004 PIN_PUPDR_PULLUP(GPIOG_PIN7) | \
1005 PIN_PUPDR_PULLUP(GPIOG_PIN8) | \
1006 PIN_PUPDR_PULLUP(GPIOG_PIN9) | \
1007 PIN_PUPDR_PULLUP(GPIOG_PIN10) | \
1008 PIN_PUPDR_PULLUP(GPIOG_PIN11) | \
1009 PIN_PUPDR_PULLUP(GPIOG_PIN12) | \
1010 PIN_PUPDR_PULLUP(GPIOG_PIN13) | \
1011 PIN_PUPDR_PULLUP(GPIOG_PIN14) | \
1012 PIN_PUPDR_PULLUP(GPIOG_PIN15))
1013#define VAL_GPIOG_ODR (PIN_ODR_HIGH(GPIOG_PIN0) | \
1014 PIN_ODR_HIGH(GPIOG_PIN1) | \
1015 PIN_ODR_HIGH(GPIOG_PIN2) | \
1016 PIN_ODR_HIGH(GPIOG_PIN3) | \
1017 PIN_ODR_HIGH(GPIOG_PIN4) | \
1018 PIN_ODR_HIGH(GPIOG_PIN5) | \
1019 PIN_ODR_HIGH(GPIOG_PIN6) | \
1020 PIN_ODR_HIGH(GPIOG_PIN7) | \
1021 PIN_ODR_HIGH(GPIOG_PIN8) | \
1022 PIN_ODR_HIGH(GPIOG_PIN9) | \
1023 PIN_ODR_HIGH(GPIOG_PIN10) | \
1024 PIN_ODR_HIGH(GPIOG_PIN11) | \
1025 PIN_ODR_HIGH(GPIOG_PIN12) | \
1026 PIN_ODR_HIGH(GPIOG_PIN13) | \
1027 PIN_ODR_HIGH(GPIOG_PIN14) | \
1028 PIN_ODR_HIGH(GPIOG_PIN15))
1029#define VAL_GPIOG_AFRL (PIN_AFIO_AF(GPIOG_PIN0, 0) | \
1030 PIN_AFIO_AF(GPIOG_PIN1, 0) | \
1031 PIN_AFIO_AF(GPIOG_PIN2, 0) | \
1032 PIN_AFIO_AF(GPIOG_PIN3, 0) | \
1033 PIN_AFIO_AF(GPIOG_PIN4, 0) | \
1034 PIN_AFIO_AF(GPIOG_PIN5, 0) | \
1035 PIN_AFIO_AF(GPIOG_PIN6, 0) | \
1036 PIN_AFIO_AF(GPIOG_PIN7, 0))
1037#define VAL_GPIOG_AFRH (PIN_AFIO_AF(GPIOG_PIN8, 0) | \
1038 PIN_AFIO_AF(GPIOG_PIN9, 0) | \
1039 PIN_AFIO_AF(GPIOG_PIN10, 0) | \
1040 PIN_AFIO_AF(GPIOG_PIN11, 0) | \
1041 PIN_AFIO_AF(GPIOG_PIN12, 0) | \
1042 PIN_AFIO_AF(GPIOG_PIN13, 0) | \
1043 PIN_AFIO_AF(GPIOG_PIN14, 0) | \
1044 PIN_AFIO_AF(GPIOG_PIN15, 0))
1045
1046/*
1047 * GPIOH setup:
1048 *
1049 * PH0 - PIN0 (input pullup).
1050 * PH1 - PIN1 (input pullup).
1051 * PH2 - PIN2 (input pullup).
1052 * PH3 - PIN3 (input pullup).
1053 * PH4 - PIN4 (input pullup).
1054 * PH5 - PIN5 (input pullup).
1055 * PH6 - PIN6 (input pullup).
1056 * PH7 - PIN7 (input pullup).
1057 * PH8 - PIN8 (input pullup).
1058 * PH9 - PIN9 (input pullup).
1059 * PH10 - PIN10 (input pullup).
1060 * PH11 - PIN11 (input pullup).
1061 * PH12 - PIN12 (input pullup).
1062 * PH13 - PIN13 (input pullup).
1063 * PH14 - PIN14 (input pullup).
1064 * PH15 - PIN15 (input pullup).
1065 */
1066#define VAL_GPIOH_MODER (PIN_MODE_INPUT(GPIOH_PIN0) | \
1067 PIN_MODE_INPUT(GPIOH_PIN1) | \
1068 PIN_MODE_INPUT(GPIOH_PIN2) | \
1069 PIN_MODE_INPUT(GPIOH_PIN3) | \
1070 PIN_MODE_INPUT(GPIOH_PIN4) | \
1071 PIN_MODE_INPUT(GPIOH_PIN5) | \
1072 PIN_MODE_INPUT(GPIOH_PIN6) | \
1073 PIN_MODE_INPUT(GPIOH_PIN7) | \
1074 PIN_MODE_INPUT(GPIOH_PIN8) | \
1075 PIN_MODE_INPUT(GPIOH_PIN9) | \
1076 PIN_MODE_INPUT(GPIOH_PIN10) | \
1077 PIN_MODE_INPUT(GPIOH_PIN11) | \
1078 PIN_MODE_INPUT(GPIOH_PIN12) | \
1079 PIN_MODE_INPUT(GPIOH_PIN13) | \
1080 PIN_MODE_INPUT(GPIOH_PIN14) | \
1081 PIN_MODE_INPUT(GPIOH_PIN15))
1082#define VAL_GPIOH_OTYPER (PIN_OTYPE_PUSHPULL(GPIOH_PIN0) | \
1083 PIN_OTYPE_PUSHPULL(GPIOH_PIN1) | \
1084 PIN_OTYPE_PUSHPULL(GPIOH_PIN2) | \
1085 PIN_OTYPE_PUSHPULL(GPIOH_PIN3) | \
1086 PIN_OTYPE_PUSHPULL(GPIOH_PIN4) | \
1087 PIN_OTYPE_PUSHPULL(GPIOH_PIN5) | \
1088 PIN_OTYPE_PUSHPULL(GPIOH_PIN6) | \
1089 PIN_OTYPE_PUSHPULL(GPIOH_PIN7) | \
1090 PIN_OTYPE_PUSHPULL(GPIOH_PIN8) | \
1091 PIN_OTYPE_PUSHPULL(GPIOH_PIN9) | \
1092 PIN_OTYPE_PUSHPULL(GPIOH_PIN10) | \
1093 PIN_OTYPE_PUSHPULL(GPIOH_PIN11) | \
1094 PIN_OTYPE_PUSHPULL(GPIOH_PIN12) | \
1095 PIN_OTYPE_PUSHPULL(GPIOH_PIN13) | \
1096 PIN_OTYPE_PUSHPULL(GPIOH_PIN14) | \
1097 PIN_OTYPE_PUSHPULL(GPIOH_PIN15))
1098#define VAL_GPIOH_OSPEEDR (PIN_OSPEED_VERYLOW(GPIOH_PIN0) | \
1099 PIN_OSPEED_VERYLOW(GPIOH_PIN1) | \
1100 PIN_OSPEED_VERYLOW(GPIOH_PIN2) | \
1101 PIN_OSPEED_VERYLOW(GPIOH_PIN3) | \
1102 PIN_OSPEED_VERYLOW(GPIOH_PIN4) | \
1103 PIN_OSPEED_VERYLOW(GPIOH_PIN5) | \
1104 PIN_OSPEED_VERYLOW(GPIOH_PIN6) | \
1105 PIN_OSPEED_VERYLOW(GPIOH_PIN7) | \
1106 PIN_OSPEED_VERYLOW(GPIOH_PIN8) | \
1107 PIN_OSPEED_VERYLOW(GPIOH_PIN9) | \
1108 PIN_OSPEED_VERYLOW(GPIOH_PIN10) | \
1109 PIN_OSPEED_VERYLOW(GPIOH_PIN11) | \
1110 PIN_OSPEED_VERYLOW(GPIOH_PIN12) | \
1111 PIN_OSPEED_VERYLOW(GPIOH_PIN13) | \
1112 PIN_OSPEED_VERYLOW(GPIOH_PIN14) | \
1113 PIN_OSPEED_VERYLOW(GPIOH_PIN15))
1114#define VAL_GPIOH_PUPDR (PIN_PUPDR_PULLUP(GPIOH_PIN0) | \
1115 PIN_PUPDR_PULLUP(GPIOH_PIN1) | \
1116 PIN_PUPDR_PULLUP(GPIOH_PIN2) | \
1117 PIN_PUPDR_PULLUP(GPIOH_PIN3) | \
1118 PIN_PUPDR_PULLUP(GPIOH_PIN4) | \
1119 PIN_PUPDR_PULLUP(GPIOH_PIN5) | \
1120 PIN_PUPDR_PULLUP(GPIOH_PIN6) | \
1121 PIN_PUPDR_PULLUP(GPIOH_PIN7) | \
1122 PIN_PUPDR_PULLUP(GPIOH_PIN8) | \
1123 PIN_PUPDR_PULLUP(GPIOH_PIN9) | \
1124 PIN_PUPDR_PULLUP(GPIOH_PIN10) | \
1125 PIN_PUPDR_PULLUP(GPIOH_PIN11) | \
1126 PIN_PUPDR_PULLUP(GPIOH_PIN12) | \
1127 PIN_PUPDR_PULLUP(GPIOH_PIN13) | \
1128 PIN_PUPDR_PULLUP(GPIOH_PIN14) | \
1129 PIN_PUPDR_PULLUP(GPIOH_PIN15))
1130#define VAL_GPIOH_ODR (PIN_ODR_HIGH(GPIOH_PIN0) | \
1131 PIN_ODR_HIGH(GPIOH_PIN1) | \
1132 PIN_ODR_HIGH(GPIOH_PIN2) | \
1133 PIN_ODR_HIGH(GPIOH_PIN3) | \
1134 PIN_ODR_HIGH(GPIOH_PIN4) | \
1135 PIN_ODR_HIGH(GPIOH_PIN5) | \
1136 PIN_ODR_HIGH(GPIOH_PIN6) | \
1137 PIN_ODR_HIGH(GPIOH_PIN7) | \
1138 PIN_ODR_HIGH(GPIOH_PIN8) | \
1139 PIN_ODR_HIGH(GPIOH_PIN9) | \
1140 PIN_ODR_HIGH(GPIOH_PIN10) | \
1141 PIN_ODR_HIGH(GPIOH_PIN11) | \
1142 PIN_ODR_HIGH(GPIOH_PIN12) | \
1143 PIN_ODR_HIGH(GPIOH_PIN13) | \
1144 PIN_ODR_HIGH(GPIOH_PIN14) | \
1145 PIN_ODR_HIGH(GPIOH_PIN15))
1146#define VAL_GPIOH_AFRL (PIN_AFIO_AF(GPIOH_PIN0, 0) | \
1147 PIN_AFIO_AF(GPIOH_PIN1, 0) | \
1148 PIN_AFIO_AF(GPIOH_PIN2, 0) | \
1149 PIN_AFIO_AF(GPIOH_PIN3, 0) | \
1150 PIN_AFIO_AF(GPIOH_PIN4, 0) | \
1151 PIN_AFIO_AF(GPIOH_PIN5, 0) | \
1152 PIN_AFIO_AF(GPIOH_PIN6, 0) | \
1153 PIN_AFIO_AF(GPIOH_PIN7, 0))
1154#define VAL_GPIOH_AFRH (PIN_AFIO_AF(GPIOH_PIN8, 0) | \
1155 PIN_AFIO_AF(GPIOH_PIN9, 0) | \
1156 PIN_AFIO_AF(GPIOH_PIN10, 0) | \
1157 PIN_AFIO_AF(GPIOH_PIN11, 0) | \
1158 PIN_AFIO_AF(GPIOH_PIN12, 0) | \
1159 PIN_AFIO_AF(GPIOH_PIN13, 0) | \
1160 PIN_AFIO_AF(GPIOH_PIN14, 0) | \
1161 PIN_AFIO_AF(GPIOH_PIN15, 0))
1162
1163
1164/*
1165 * USB bus activation macro, required by the USB driver.
1166 */
1167// #define usb_lld_connect_bus(usbp)
1168#define usb_lld_connect_bus(usbp) (palSetPadMode(GPIOA, GPIOA_USB_DP, PAL_MODE_ALTERNATE(14)))
1169// #define usb_lld_connect_bus(usbp) palSetPadMode(GPIOA, 12, PAL_MODE_INPUT)
1170/*
1171 * USB bus de-activation macro, required by the USB driver.
1172 */
1173// #define usb_lld_disconnect_bus(usbp)
1174#define usb_lld_disconnect_bus(usbp) (palSetPadMode(GPIOA, GPIOA_USB_DP, PAL_MODE_OUTPUT_PUSHPULL)); palClearPad(GPIOA, GPIOA_USB_DP)
1175// #define usb_lld_disconnect_bus(usbp) palSetPadMode(GPIOA, 12, PAL_MODE_OUTPUT_PUSHPULL); palClearPad(GPIOA, 12)
1176
1177#if !defined(_FROM_ASM_)
1178#ifdef __cplusplus
1179extern "C" {
1180#endif
1181 void boardInit(void);
1182#ifdef __cplusplus
1183}
1184#endif
1185#endif /* _FROM_ASM_ */
1186
1187#endif /* _BOARD_H_ */
diff --git a/keyboards/nk65/boards/GENERIC_STM32_F303XC/board.mk b/keyboards/nk65/boards/GENERIC_STM32_F303XC/board.mk
deleted file mode 100755
index 43377629a..000000000
--- a/keyboards/nk65/boards/GENERIC_STM32_F303XC/board.mk
+++ /dev/null
@@ -1,5 +0,0 @@
1# List of all the board related files.
2BOARDSRC = $(BOARD_PATH)/boards/GENERIC_STM32_F303XC/board.c
3
4# Required include directories
5BOARDINC = $(BOARD_PATH)/boards/GENERIC_STM32_F303XC
diff --git a/keyboards/nk65/bootloader_defs.h b/keyboards/nk65/bootloader_defs.h
deleted file mode 100755
index 3b0e9d20a..000000000
--- a/keyboards/nk65/bootloader_defs.h
+++ /dev/null
@@ -1,7 +0,0 @@
1/* Address for jumping to bootloader on STM32 chips. */
2/* It is chip dependent, the correct number can be looked up here:
3 * http://www.st.com/web/en/resource/technical/document/application_note/CD00167594.pdf
4 * This also requires a patch to chibios:
5 * <tmk_dir>/tmk_core/tool/chibios/ch-bootloader-jump.patch
6 */
7#define STM32_BOOTLOADER_ADDRESS 0x1FFFD800
diff --git a/keyboards/nk65/rules.mk b/keyboards/nk65/rules.mk
index ca0a8e585..0840daf37 100755
--- a/keyboards/nk65/rules.mk
+++ b/keyboards/nk65/rules.mk
@@ -1,52 +1,11 @@
1# project specific files 1# MCU name
2SRC = keyboards/wilba_tech/wt_main.c \ 2MCU = STM32F303
3 keyboards/wilba_tech/wt_rgb_backlight.c \
4 drivers/issi/is31fl3733.c \
5 quantum/color.c \
6 drivers/arm/i2c_master.c
7
8## chip/board settings
9# the next two should match the directories in
10# <chibios>/os/hal/ports/$(MCU_FAMILY)/$(MCU_SERIES)
11MCU_FAMILY = STM32
12MCU_SERIES = STM32F3xx
13
14# Linker script to use
15# it should exist either in <chibios>/os/common/ports/ARMCMx/compilers/GCC/ld/
16# or <this_dir>/ld/
17MCU_LDSCRIPT = STM32F303xC
18
19# Startup code to use
20# - it should exist in <chibios>/os/common/startup/ARMCMx/compilers/GCC/mk/
21MCU_STARTUP = stm32f3xx
22
23# Board: it should exist either in <chibios>/os/hal/boards/
24# or <this_dir>/boards
25BOARD = GENERIC_STM32_F303XC
26
27# Cortex version
28MCU = cortex-m4
29
30# ARM version, CORTEX-M0/M1 are 6, CORTEX-M3/M4/M7 are 7
31ARMV = 7
32
33USE_FPU = yes
34
35# Vector table for application
36# 0x00000000-0x00001000 area is occupied by bootlaoder.*/
37# The CORTEX_VTOR... is needed only for MCHCK/Infinity KB
38# OPT_DEFS = -DCORTEX_VTOR_INIT=0x08005000
39OPT_DEFS =
40 3
41# Do not put the microcontroller into power saving mode 4# Do not put the microcontroller into power saving mode
42# when we get USB suspend event. We want it to keep updating 5# when we get USB suspend event. We want it to keep updating
43# backlight effects. 6# backlight effects.
44OPT_DEFS += -DNO_SUSPEND_POWER_DOWN 7OPT_DEFS += -DNO_SUSPEND_POWER_DOWN
45 8
46# Options to pass to dfu-util when flashing
47DFU_ARGS = -d 0483:df11 -a 0 -s 0x08000000:leave
48DFU_SUFFIX_ARGS = -p DF11 -v 0483
49
50# Build Options 9# Build Options
51# comment out to disable the options. 10# comment out to disable the options.
52# 11#
@@ -67,3 +26,10 @@ DYNAMIC_KEYMAP_ENABLE = no
67CIE1931_CURVE = yes 26CIE1931_CURVE = yes
68 27
69LAYOUTS = 65_ansi 28LAYOUTS = 65_ansi
29
30# project specific files
31SRC = keyboards/wilba_tech/wt_main.c \
32 keyboards/wilba_tech/wt_rgb_backlight.c \
33 drivers/issi/is31fl3733.c \
34 quantum/color.c \
35 drivers/arm/i2c_master.c
diff --git a/keyboards/planck/ez/rules.mk b/keyboards/planck/ez/rules.mk
index 8e1eeeb99..7fb0dec50 100644
--- a/keyboards/planck/ez/rules.mk
+++ b/keyboards/planck/ez/rules.mk
@@ -1,5 +1,5 @@
1# Cortex version 1# MCU name
2MCU = STM32F303 2MCU = STM32F303
3 3
4# Build Options 4# Build Options
5# change to "no" to disable the options, or define them in the Makefile in 5# change to "no" to disable the options, or define them in the Makefile in
diff --git a/keyboards/planck/rev6/rules.mk b/keyboards/planck/rev6/rules.mk
index 093d528e3..429fc50a2 100644
--- a/keyboards/planck/rev6/rules.mk
+++ b/keyboards/planck/rev6/rules.mk
@@ -1,8 +1,5 @@
1# project specific files 1# MCU name
2LAYOUTS += ortho_4x12 2MCU = STM32F303
3
4# Cortex version
5MCU = STM32F303
6 3
7# Build Options 4# Build Options
8# change to "no" to disable the options, or define them in the Makefile in 5# change to "no" to disable the options, or define them in the Makefile in
diff --git a/keyboards/preonic/rev3/rules.mk b/keyboards/preonic/rev3/rules.mk
index 33893c841..ad8a82967 100644
--- a/keyboards/preonic/rev3/rules.mk
+++ b/keyboards/preonic/rev3/rules.mk
@@ -1,5 +1,5 @@
1# Cortex version 1# MCU name
2MCU = STM32F303 2MCU = STM32F303
3 3
4# Build Options 4# Build Options
5# change to "no" to disable the options, or define them in the Makefile in 5# change to "no" to disable the options, or define them in the Makefile in
generated by cgit v1.2.3 (git 2.25.1) at 2025-11-18 21:59:13 +0000