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-rw-r--r--platforms/chibios/BLACKPILL_STM32_F411/configs/chconf.h714
-rw-r--r--platforms/chibios/BLACKPILL_STM32_F411/configs/halconf.h525
-rw-r--r--platforms/chibios/GENERIC_STM32_F042X6/board/board.c4
-rw-r--r--platforms/chibios/GENERIC_STM32_F072XB/configs/mcuconf.h6
-rw-r--r--platforms/chibios/GENERIC_STM32_F303XC/configs/mcuconf.h22
-rw-r--r--platforms/chibios/GENERIC_STM32_G431XB/board/board.mk9
-rw-r--r--platforms/chibios/GENERIC_STM32_G431XB/configs/config.h23
-rw-r--r--platforms/chibios/GENERIC_STM32_G431XB/configs/mcuconf.h307
-rw-r--r--platforms/chibios/GENERIC_STM32_G474XE/board/board.mk9
-rw-r--r--platforms/chibios/GENERIC_STM32_G474XE/configs/config.h30
-rw-r--r--platforms/chibios/GENERIC_STM32_G474XE/configs/mcuconf.h372
-rw-r--r--platforms/chibios/QMK_PROTON_C/board/board.mk9
-rw-r--r--platforms/chibios/QMK_PROTON_C/configs/board.h37
-rw-r--r--platforms/chibios/QMK_PROTON_C/configs/bootloader_defs.h7
-rw-r--r--platforms/chibios/QMK_PROTON_C/configs/chconf.h (renamed from platforms/chibios/BLACKPILL_STM32_F401/configs/chconf.h)94
-rw-r--r--platforms/chibios/QMK_PROTON_C/configs/config.h20
-rw-r--r--platforms/chibios/QMK_PROTON_C/configs/halconf.h (renamed from platforms/chibios/BLACKPILL_STM32_F401/configs/halconf.h)30
-rw-r--r--platforms/chibios/QMK_PROTON_C/configs/mcuconf.h273
-rw-r--r--platforms/chibios/QMK_PROTON_C/convert_to_proton_c.mk (renamed from platforms/chibios/GENERIC_STM32_F303XC/configs/proton_c.mk)7
-rw-r--r--platforms/chibios/common/configs/chconf.h124
-rw-r--r--platforms/chibios/common/configs/halconf.h28
21 files changed, 1302 insertions, 1348 deletions
diff --git a/platforms/chibios/BLACKPILL_STM32_F411/configs/chconf.h b/platforms/chibios/BLACKPILL_STM32_F411/configs/chconf.h
deleted file mode 100644
index 7dc4f84a8..000000000
--- a/platforms/chibios/BLACKPILL_STM32_F411/configs/chconf.h
+++ /dev/null
@@ -1,714 +0,0 @@
1/*
2 ChibiOS - Copyright (C) 2006..2018 Giovanni Di Sirio
3
4 Licensed under the Apache License, Version 2.0 (the "License");
5 you may not use this file except in compliance with the License.
6 You may obtain a copy of the License at
7
8 http://www.apache.org/licenses/LICENSE-2.0
9
10 Unless required by applicable law or agreed to in writing, software
11 distributed under the License is distributed on an "AS IS" BASIS,
12 WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
13 See the License for the specific language governing permissions and
14 limitations under the License.
15*/
16
17/**
18 * @file rt/templates/chconf.h
19 * @brief Configuration file template.
20 * @details A copy of this file must be placed in each project directory, it
21 * contains the application specific kernel settings.
22 *
23 * @addtogroup config
24 * @details Kernel related settings and hooks.
25 * @{
26 */
27
28#ifndef CHCONF_H
29#define CHCONF_H
30
31#define _CHIBIOS_RT_CONF_
32#define _CHIBIOS_RT_CONF_VER_6_0_
33
34/*===========================================================================*/
35/**
36 * @name System timers settings
37 * @{
38 */
39/*===========================================================================*/
40
41/**
42 * @brief System time counter resolution.
43 * @note Allowed values are 16 or 32 bits.
44 */
45#if !defined(CH_CFG_ST_RESOLUTION)
46#define CH_CFG_ST_RESOLUTION 32
47#endif
48
49/**
50 * @brief System tick frequency.
51 * @details Frequency of the system timer that drives the system ticks. This
52 * setting also defines the system tick time unit.
53 */
54#if !defined(CH_CFG_ST_FREQUENCY)
55#define CH_CFG_ST_FREQUENCY 10000
56#endif
57
58/**
59 * @brief Time intervals data size.
60 * @note Allowed values are 16, 32 or 64 bits.
61 */
62#if !defined(CH_CFG_INTERVALS_SIZE)
63#define CH_CFG_INTERVALS_SIZE 32
64#endif
65
66/**
67 * @brief Time types data size.
68 * @note Allowed values are 16 or 32 bits.
69 */
70#if !defined(CH_CFG_TIME_TYPES_SIZE)
71#define CH_CFG_TIME_TYPES_SIZE 32
72#endif
73
74/**
75 * @brief Time delta constant for the tick-less mode.
76 * @note If this value is zero then the system uses the classic
77 * periodic tick. This value represents the minimum number
78 * of ticks that is safe to specify in a timeout directive.
79 * The value one is not valid, timeouts are rounded up to
80 * this value.
81 */
82#if !defined(CH_CFG_ST_TIMEDELTA)
83#define CH_CFG_ST_TIMEDELTA 2
84#endif
85
86/** @} */
87
88/*===========================================================================*/
89/**
90 * @name Kernel parameters and options
91 * @{
92 */
93/*===========================================================================*/
94
95/**
96 * @brief Round robin interval.
97 * @details This constant is the number of system ticks allowed for the
98 * threads before preemption occurs. Setting this value to zero
99 * disables the preemption for threads with equal priority and the
100 * round robin becomes cooperative. Note that higher priority
101 * threads can still preempt, the kernel is always preemptive.
102 * @note Disabling the round robin preemption makes the kernel more compact
103 * and generally faster.
104 * @note The round robin preemption is not supported in tickless mode and
105 * must be set to zero in that case.
106 */
107#if !defined(CH_CFG_TIME_QUANTUM)
108#define CH_CFG_TIME_QUANTUM 0
109#endif
110
111/**
112 * @brief Managed RAM size.
113 * @details Size of the RAM area to be managed by the OS. If set to zero
114 * then the whole available RAM is used. The core memory is made
115 * available to the heap allocator and/or can be used directly through
116 * the simplified core memory allocator.
117 *
118 * @note In order to let the OS manage the whole RAM the linker script must
119 * provide the @p __heap_base__ and @p __heap_end__ symbols.
120 * @note Requires @p CH_CFG_USE_MEMCORE.
121 */
122#if !defined(CH_CFG_MEMCORE_SIZE)
123#define CH_CFG_MEMCORE_SIZE 0
124#endif
125
126/**
127 * @brief Idle thread automatic spawn suppression.
128 * @details When this option is activated the function @p chSysInit()
129 * does not spawn the idle thread. The application @p main()
130 * function becomes the idle thread and must implement an
131 * infinite loop.
132 */
133#if !defined(CH_CFG_NO_IDLE_THREAD)
134#define CH_CFG_NO_IDLE_THREAD FALSE
135#endif
136
137/** @} */
138
139/*===========================================================================*/
140/**
141 * @name Performance options
142 * @{
143 */
144/*===========================================================================*/
145
146/**
147 * @brief OS optimization.
148 * @details If enabled then time efficient rather than space efficient code
149 * is used when two possible implementations exist.
150 *
151 * @note This is not related to the compiler optimization options.
152 * @note The default is @p TRUE.
153 */
154#if !defined(CH_CFG_OPTIMIZE_SPEED)
155#define CH_CFG_OPTIMIZE_SPEED TRUE
156#endif
157
158/** @} */
159
160/*===========================================================================*/
161/**
162 * @name Subsystem options
163 * @{
164 */
165/*===========================================================================*/
166
167/**
168 * @brief Time Measurement APIs.
169 * @details If enabled then the time measurement APIs are included in
170 * the kernel.
171 *
172 * @note The default is @p TRUE.
173 */
174#if !defined(CH_CFG_USE_TM)
175#define CH_CFG_USE_TM TRUE
176#endif
177
178/**
179 * @brief Threads registry APIs.
180 * @details If enabled then the registry APIs are included in the kernel.
181 *
182 * @note The default is @p TRUE.
183 */
184#if !defined(CH_CFG_USE_REGISTRY)
185#define CH_CFG_USE_REGISTRY TRUE
186#endif
187
188/**
189 * @brief Threads synchronization APIs.
190 * @details If enabled then the @p chThdWait() function is included in
191 * the kernel.
192 *
193 * @note The default is @p TRUE.
194 */
195#if !defined(CH_CFG_USE_WAITEXIT)
196#define CH_CFG_USE_WAITEXIT TRUE
197#endif
198
199/**
200 * @brief Semaphores APIs.
201 * @details If enabled then the Semaphores APIs are included in the kernel.
202 *
203 * @note The default is @p TRUE.
204 */
205#if !defined(CH_CFG_USE_SEMAPHORES)
206#define CH_CFG_USE_SEMAPHORES TRUE
207#endif
208
209/**
210 * @brief Semaphores queuing mode.
211 * @details If enabled then the threads are enqueued on semaphores by
212 * priority rather than in FIFO order.
213 *
214 * @note The default is @p FALSE. Enable this if you have special
215 * requirements.
216 * @note Requires @p CH_CFG_USE_SEMAPHORES.
217 */
218#if !defined(CH_CFG_USE_SEMAPHORES_PRIORITY)
219#define CH_CFG_USE_SEMAPHORES_PRIORITY FALSE
220#endif
221
222/**
223 * @brief Mutexes APIs.
224 * @details If enabled then the mutexes APIs are included in the kernel.
225 *
226 * @note The default is @p TRUE.
227 */
228#if !defined(CH_CFG_USE_MUTEXES)
229#define CH_CFG_USE_MUTEXES TRUE
230#endif
231
232/**
233 * @brief Enables recursive behavior on mutexes.
234 * @note Recursive mutexes are heavier and have an increased
235 * memory footprint.
236 *
237 * @note The default is @p FALSE.
238 * @note Requires @p CH_CFG_USE_MUTEXES.
239 */
240#if !defined(CH_CFG_USE_MUTEXES_RECURSIVE)
241#define CH_CFG_USE_MUTEXES_RECURSIVE FALSE
242#endif
243
244/**
245 * @brief Conditional Variables APIs.
246 * @details If enabled then the conditional variables APIs are included
247 * in the kernel.
248 *
249 * @note The default is @p TRUE.
250 * @note Requires @p CH_CFG_USE_MUTEXES.
251 */
252#if !defined(CH_CFG_USE_CONDVARS)
253#define CH_CFG_USE_CONDVARS TRUE
254#endif
255
256/**
257 * @brief Conditional Variables APIs with timeout.
258 * @details If enabled then the conditional variables APIs with timeout
259 * specification are included in the kernel.
260 *
261 * @note The default is @p TRUE.
262 * @note Requires @p CH_CFG_USE_CONDVARS.
263 */
264#if !defined(CH_CFG_USE_CONDVARS_TIMEOUT)
265#define CH_CFG_USE_CONDVARS_TIMEOUT TRUE
266#endif
267
268/**
269 * @brief Events Flags APIs.
270 * @details If enabled then the event flags APIs are included in the kernel.
271 *
272 * @note The default is @p TRUE.
273 */
274#if !defined(CH_CFG_USE_EVENTS)
275#define CH_CFG_USE_EVENTS TRUE
276#endif
277
278/**
279 * @brief Events Flags APIs with timeout.
280 * @details If enabled then the events APIs with timeout specification
281 * are included in the kernel.
282 *
283 * @note The default is @p TRUE.
284 * @note Requires @p CH_CFG_USE_EVENTS.
285 */
286#if !defined(CH_CFG_USE_EVENTS_TIMEOUT)
287#define CH_CFG_USE_EVENTS_TIMEOUT TRUE
288#endif
289
290/**
291 * @brief Synchronous Messages APIs.
292 * @details If enabled then the synchronous messages APIs are included
293 * in the kernel.
294 *
295 * @note The default is @p TRUE.
296 */
297#if !defined(CH_CFG_USE_MESSAGES)
298#define CH_CFG_USE_MESSAGES TRUE
299#endif
300
301/**
302 * @brief Synchronous Messages queuing mode.
303 * @details If enabled then messages are served by priority rather than in
304 * FIFO order.
305 *
306 * @note The default is @p FALSE. Enable this if you have special
307 * requirements.
308 * @note Requires @p CH_CFG_USE_MESSAGES.
309 */
310#if !defined(CH_CFG_USE_MESSAGES_PRIORITY)
311#define CH_CFG_USE_MESSAGES_PRIORITY FALSE
312#endif
313
314/**
315 * @brief Mailboxes APIs.
316 * @details If enabled then the asynchronous messages (mailboxes) APIs are
317 * included in the kernel.
318 *
319 * @note The default is @p TRUE.
320 * @note Requires @p CH_CFG_USE_SEMAPHORES.
321 */
322#if !defined(CH_CFG_USE_MAILBOXES)
323#define CH_CFG_USE_MAILBOXES TRUE
324#endif
325
326/**
327 * @brief Core Memory Manager APIs.
328 * @details If enabled then the core memory manager APIs are included
329 * in the kernel.
330 *
331 * @note The default is @p TRUE.
332 */
333#if !defined(CH_CFG_USE_MEMCORE)
334#define CH_CFG_USE_MEMCORE TRUE
335#endif
336
337/**
338 * @brief Heap Allocator APIs.
339 * @details If enabled then the memory heap allocator APIs are included
340 * in the kernel.
341 *
342 * @note The default is @p TRUE.
343 * @note Requires @p CH_CFG_USE_MEMCORE and either @p CH_CFG_USE_MUTEXES or
344 * @p CH_CFG_USE_SEMAPHORES.
345 * @note Mutexes are recommended.
346 */
347#if !defined(CH_CFG_USE_HEAP)
348#define CH_CFG_USE_HEAP TRUE
349#endif
350
351/**
352 * @brief Memory Pools Allocator APIs.
353 * @details If enabled then the memory pools allocator APIs are included
354 * in the kernel.
355 *
356 * @note The default is @p TRUE.
357 */
358#if !defined(CH_CFG_USE_MEMPOOLS)
359#define CH_CFG_USE_MEMPOOLS TRUE
360#endif
361
362/**
363 * @brief Objects FIFOs APIs.
364 * @details If enabled then the objects FIFOs APIs are included
365 * in the kernel.
366 *
367 * @note The default is @p TRUE.
368 */
369#if !defined(CH_CFG_USE_OBJ_FIFOS)
370#define CH_CFG_USE_OBJ_FIFOS TRUE
371#endif
372
373/**
374 * @brief Pipes APIs.
375 * @details If enabled then the pipes APIs are included
376 * in the kernel.
377 *
378 * @note The default is @p TRUE.
379 */
380#if !defined(CH_CFG_USE_PIPES)
381#define CH_CFG_USE_PIPES TRUE
382#endif
383
384/**
385 * @brief Dynamic Threads APIs.
386 * @details If enabled then the dynamic threads creation APIs are included
387 * in the kernel.
388 *
389 * @note The default is @p TRUE.
390 * @note Requires @p CH_CFG_USE_WAITEXIT.
391 * @note Requires @p CH_CFG_USE_HEAP and/or @p CH_CFG_USE_MEMPOOLS.
392 */
393#if !defined(CH_CFG_USE_DYNAMIC)
394#define CH_CFG_USE_DYNAMIC TRUE
395#endif
396
397/** @} */
398
399/*===========================================================================*/
400/**
401 * @name Objects factory options
402 * @{
403 */
404/*===========================================================================*/
405
406/**
407 * @brief Objects Factory APIs.
408 * @details If enabled then the objects factory APIs are included in the
409 * kernel.
410 *
411 * @note The default is @p FALSE.
412 */
413#if !defined(CH_CFG_USE_FACTORY)
414#define CH_CFG_USE_FACTORY TRUE
415#endif
416
417/**
418 * @brief Maximum length for object names.
419 * @details If the specified length is zero then the name is stored by
420 * pointer but this could have unintended side effects.
421 */
422#if !defined(CH_CFG_FACTORY_MAX_NAMES_LENGTH)
423#define CH_CFG_FACTORY_MAX_NAMES_LENGTH 8
424#endif
425
426/**
427 * @brief Enables the registry of generic objects.
428 */
429#if !defined(CH_CFG_FACTORY_OBJECTS_REGISTRY)
430#define CH_CFG_FACTORY_OBJECTS_REGISTRY TRUE
431#endif
432
433/**
434 * @brief Enables factory for generic buffers.
435 */
436#if !defined(CH_CFG_FACTORY_GENERIC_BUFFERS)
437#define CH_CFG_FACTORY_GENERIC_BUFFERS TRUE
438#endif
439
440/**
441 * @brief Enables factory for semaphores.
442 */
443#if !defined(CH_CFG_FACTORY_SEMAPHORES)
444#define CH_CFG_FACTORY_SEMAPHORES TRUE
445#endif
446
447/**
448 * @brief Enables factory for mailboxes.
449 */
450#if !defined(CH_CFG_FACTORY_MAILBOXES)
451#define CH_CFG_FACTORY_MAILBOXES TRUE
452#endif
453
454/**
455 * @brief Enables factory for objects FIFOs.
456 */
457#if !defined(CH_CFG_FACTORY_OBJ_FIFOS)
458#define CH_CFG_FACTORY_OBJ_FIFOS TRUE
459#endif
460
461/**
462 * @brief Enables factory for Pipes.
463 */
464#if !defined(CH_CFG_FACTORY_PIPES) || defined(__DOXYGEN__)
465#define CH_CFG_FACTORY_PIPES TRUE
466#endif
467
468/** @} */
469
470/*===========================================================================*/
471/**
472 * @name Debug options
473 * @{
474 */
475/*===========================================================================*/
476
477/**
478 * @brief Debug option, kernel statistics.
479 *
480 * @note The default is @p FALSE.
481 */
482#if !defined(CH_DBG_STATISTICS)
483#define CH_DBG_STATISTICS FALSE
484#endif
485
486/**
487 * @brief Debug option, system state check.
488 * @details If enabled the correct call protocol for system APIs is checked
489 * at runtime.
490 *
491 * @note The default is @p FALSE.
492 */
493#if !defined(CH_DBG_SYSTEM_STATE_CHECK)
494#define CH_DBG_SYSTEM_STATE_CHECK FALSE
495#endif
496
497/**
498 * @brief Debug option, parameters checks.
499 * @details If enabled then the checks on the API functions input
500 * parameters are activated.
501 *
502 * @note The default is @p FALSE.
503 */
504#if !defined(CH_DBG_ENABLE_CHECKS)
505#define CH_DBG_ENABLE_CHECKS FALSE
506#endif
507
508/**
509 * @brief Debug option, consistency checks.
510 * @details If enabled then all the assertions in the kernel code are
511 * activated. This includes consistency checks inside the kernel,
512 * runtime anomalies and port-defined checks.
513 *
514 * @note The default is @p FALSE.
515 */
516#if !defined(CH_DBG_ENABLE_ASSERTS)
517#define CH_DBG_ENABLE_ASSERTS FALSE
518#endif
519
520/**
521 * @brief Debug option, trace buffer.
522 * @details If enabled then the trace buffer is activated.
523 *
524 * @note The default is @p CH_DBG_TRACE_MASK_DISABLED.
525 */
526#if !defined(CH_DBG_TRACE_MASK)
527#define CH_DBG_TRACE_MASK CH_DBG_TRACE_MASK_DISABLED
528#endif
529
530/**
531 * @brief Trace buffer entries.
532 * @note The trace buffer is only allocated if @p CH_DBG_TRACE_MASK is
533 * different from @p CH_DBG_TRACE_MASK_DISABLED.
534 */
535#if !defined(CH_DBG_TRACE_BUFFER_SIZE)
536#define CH_DBG_TRACE_BUFFER_SIZE 128
537#endif
538
539/**
540 * @brief Debug option, stack checks.
541 * @details If enabled then a runtime stack check is performed.
542 *
543 * @note The default is @p FALSE.
544 * @note The stack check is performed in a architecture/port dependent way.
545 * It may not be implemented or some ports.
546 * @note The default failure mode is to halt the system with the global
547 * @p panic_msg variable set to @p NULL.
548 */
549#if !defined(CH_DBG_ENABLE_STACK_CHECK)
550#define CH_DBG_ENABLE_STACK_CHECK FALSE
551#endif
552
553/**
554 * @brief Debug option, stacks initialization.
555 * @details If enabled then the threads working area is filled with a byte
556 * value when a thread is created. This can be useful for the
557 * runtime measurement of the used stack.
558 *
559 * @note The default is @p FALSE.
560 */
561#if !defined(CH_DBG_FILL_THREADS)
562#define CH_DBG_FILL_THREADS FALSE
563#endif
564
565/**
566 * @brief Debug option, threads profiling.
567 * @details If enabled then a field is added to the @p thread_t structure that
568 * counts the system ticks occurred while executing the thread.
569 *
570 * @note The default is @p FALSE.
571 * @note This debug option is not currently compatible with the
572 * tickless mode.
573 */
574#if !defined(CH_DBG_THREADS_PROFILING)
575#define CH_DBG_THREADS_PROFILING FALSE
576#endif
577
578/** @} */
579
580/*===========================================================================*/
581/**
582 * @name Kernel hooks
583 * @{
584 */
585/*===========================================================================*/
586
587/**
588 * @brief System structure extension.
589 * @details User fields added to the end of the @p ch_system_t structure.
590 */
591#define CH_CFG_SYSTEM_EXTRA_FIELDS \
592 /* Add threads custom fields here.*/
593
594/**
595 * @brief System initialization hook.
596 * @details User initialization code added to the @p chSysInit() function
597 * just before interrupts are enabled globally.
598 */
599#define CH_CFG_SYSTEM_INIT_HOOK() { \
600 /* Add threads initialization code here.*/ \
601}
602
603/**
604 * @brief Threads descriptor structure extension.
605 * @details User fields added to the end of the @p thread_t structure.
606 */
607#define CH_CFG_THREAD_EXTRA_FIELDS \
608 /* Add threads custom fields here.*/
609
610/**
611 * @brief Threads initialization hook.
612 * @details User initialization code added to the @p _thread_init() function.
613 *
614 * @note It is invoked from within @p _thread_init() and implicitly from all
615 * the threads creation APIs.
616 */
617#define CH_CFG_THREAD_INIT_HOOK(tp) { \
618 /* Add threads initialization code here.*/ \
619}
620
621/**
622 * @brief Threads finalization hook.
623 * @details User finalization code added to the @p chThdExit() API.
624 */
625#define CH_CFG_THREAD_EXIT_HOOK(tp) { \
626 /* Add threads finalization code here.*/ \
627}
628
629/**
630 * @brief Context switch hook.
631 * @details This hook is invoked just before switching between threads.
632 */
633#define CH_CFG_CONTEXT_SWITCH_HOOK(ntp, otp) { \
634 /* Context switch code here.*/ \
635}
636
637/**
638 * @brief ISR enter hook.
639 */
640#define CH_CFG_IRQ_PROLOGUE_HOOK() { \
641 /* IRQ prologue code here.*/ \
642}
643
644/**
645 * @brief ISR exit hook.
646 */
647#define CH_CFG_IRQ_EPILOGUE_HOOK() { \
648 /* IRQ epilogue code here.*/ \
649}
650
651/**
652 * @brief Idle thread enter hook.
653 * @note This hook is invoked within a critical zone, no OS functions
654 * should be invoked from here.
655 * @note This macro can be used to activate a power saving mode.
656 */
657#define CH_CFG_IDLE_ENTER_HOOK() { \
658 /* Idle-enter code here.*/ \
659}
660
661/**
662 * @brief Idle thread leave hook.
663 * @note This hook is invoked within a critical zone, no OS functions
664 * should be invoked from here.
665 * @note This macro can be used to deactivate a power saving mode.
666 */
667#define CH_CFG_IDLE_LEAVE_HOOK() { \
668 /* Idle-leave code here.*/ \
669}
670
671/**
672 * @brief Idle Loop hook.
673 * @details This hook is continuously invoked by the idle thread loop.
674 */
675#define CH_CFG_IDLE_LOOP_HOOK() { \
676 /* Idle loop code here.*/ \
677}
678
679/**
680 * @brief System tick event hook.
681 * @details This hook is invoked in the system tick handler immediately
682 * after processing the virtual timers queue.
683 */
684#define CH_CFG_SYSTEM_TICK_HOOK() { \
685 /* System tick event code here.*/ \
686}
687
688/**
689 * @brief System halt hook.
690 * @details This hook is invoked in case to a system halting error before
691 * the system is halted.
692 */
693#define CH_CFG_SYSTEM_HALT_HOOK(reason) { \
694 /* System halt code here.*/ \
695}
696
697/**
698 * @brief Trace hook.
699 * @details This hook is invoked each time a new record is written in the
700 * trace buffer.
701 */
702#define CH_CFG_TRACE_HOOK(tep) { \
703 /* Trace code here.*/ \
704}
705
706/** @} */
707
708/*===========================================================================*/
709/* Port-specific settings (override port settings defaulted in chcore.h). */
710/*===========================================================================*/
711
712#endif /* CHCONF_H */
713
714/** @} */
diff --git a/platforms/chibios/BLACKPILL_STM32_F411/configs/halconf.h b/platforms/chibios/BLACKPILL_STM32_F411/configs/halconf.h
deleted file mode 100644
index a8db392aa..000000000
--- a/platforms/chibios/BLACKPILL_STM32_F411/configs/halconf.h
+++ /dev/null
@@ -1,525 +0,0 @@
1/*
2 ChibiOS - Copyright (C) 2006..2018 Giovanni Di Sirio
3
4 Licensed under the Apache License, Version 2.0 (the "License");
5 you may not use this file except in compliance with the License.
6 You may obtain a copy of the License at
7
8 http://www.apache.org/licenses/LICENSE-2.0
9
10 Unless required by applicable law or agreed to in writing, software
11 distributed under the License is distributed on an "AS IS" BASIS,
12 WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
13 See the License for the specific language governing permissions and
14 limitations under the License.
15*/
16
17/**
18 * @file templates/halconf.h
19 * @brief HAL configuration header.
20 * @details HAL configuration file, this file allows to enable or disable the
21 * various device drivers from your application. You may also use
22 * this file in order to override the device drivers default settings.
23 *
24 * @addtogroup HAL_CONF
25 * @{
26 */
27
28#ifndef HALCONF_H
29#define HALCONF_H
30
31#define _CHIBIOS_HAL_CONF_
32#define _CHIBIOS_HAL_CONF_VER_7_0_
33
34#include "mcuconf.h"
35
36/**
37 * @brief Enables the PAL subsystem.
38 */
39#if !defined(HAL_USE_PAL) || defined(__DOXYGEN__)
40#define HAL_USE_PAL TRUE
41#endif
42
43/**
44 * @brief Enables the ADC subsystem.
45 */
46#if !defined(HAL_USE_ADC) || defined(__DOXYGEN__)
47#define HAL_USE_ADC FALSE
48#endif
49
50/**
51 * @brief Enables the CAN subsystem.
52 */
53#if !defined(HAL_USE_CAN) || defined(__DOXYGEN__)
54#define HAL_USE_CAN FALSE
55#endif
56
57/**
58 * @brief Enables the cryptographic subsystem.
59 */
60#if !defined(HAL_USE_CRY) || defined(__DOXYGEN__)
61#define HAL_USE_CRY FALSE
62#endif
63
64/**
65 * @brief Enables the DAC subsystem.
66 */
67#if !defined(HAL_USE_DAC) || defined(__DOXYGEN__)
68#define HAL_USE_DAC FALSE
69#endif
70
71/**
72 * @brief Enables the GPT subsystem.
73 */
74#if !defined(HAL_USE_GPT) || defined(__DOXYGEN__)
75#define HAL_USE_GPT FALSE
76#endif
77
78/**
79 * @brief Enables the I2C subsystem.
80 */
81#if !defined(HAL_USE_I2C) || defined(__DOXYGEN__)
82#define HAL_USE_I2C FALSE
83#endif
84
85/**
86 * @brief Enables the I2S subsystem.
87 */
88#if !defined(HAL_USE_I2S) || defined(__DOXYGEN__)
89#define HAL_USE_I2S FALSE
90#endif
91
92/**
93 * @brief Enables the ICU subsystem.
94 */
95#if !defined(HAL_USE_ICU) || defined(__DOXYGEN__)
96#define HAL_USE_ICU FALSE
97#endif
98
99/**
100 * @brief Enables the MAC subsystem.
101 */
102#if !defined(HAL_USE_MAC) || defined(__DOXYGEN__)
103#define HAL_USE_MAC FALSE
104#endif
105
106/**
107 * @brief Enables the MMC_SPI subsystem.
108 */
109#if !defined(HAL_USE_MMC_SPI) || defined(__DOXYGEN__)
110#define HAL_USE_MMC_SPI FALSE
111#endif
112
113/**
114 * @brief Enables the PWM subsystem.
115 */
116#if !defined(HAL_USE_PWM) || defined(__DOXYGEN__)
117#define HAL_USE_PWM FALSE
118#endif
119
120/**
121 * @brief Enables the RTC subsystem.
122 */
123#if !defined(HAL_USE_RTC) || defined(__DOXYGEN__)
124#define HAL_USE_RTC FALSE
125#endif
126
127/**
128 * @brief Enables the SDC subsystem.
129 */
130#if !defined(HAL_USE_SDC) || defined(__DOXYGEN__)
131#define HAL_USE_SDC FALSE
132#endif
133
134/**
135 * @brief Enables the SERIAL subsystem.
136 */
137#if !defined(HAL_USE_SERIAL) || defined(__DOXYGEN__)
138#define HAL_USE_SERIAL FALSE
139#endif
140
141/**
142 * @brief Enables the SERIAL over USB subsystem.
143 */
144#if !defined(HAL_USE_SERIAL_USB) || defined(__DOXYGEN__)
145#define HAL_USE_SERIAL_USB FALSE
146#endif
147
148/**
149 * @brief Enables the SIO subsystem.
150 */
151#if !defined(HAL_USE_SIO) || defined(__DOXYGEN__)
152#define HAL_USE_SIO FALSE
153#endif
154
155/**
156 * @brief Enables the SPI subsystem.
157 */
158#if !defined(HAL_USE_SPI) || defined(__DOXYGEN__)
159#define HAL_USE_SPI FALSE
160#endif
161
162/**
163 * @brief Enables the TRNG subsystem.
164 */
165#if !defined(HAL_USE_TRNG) || defined(__DOXYGEN__)
166#define HAL_USE_TRNG FALSE
167#endif
168
169/**
170 * @brief Enables the UART subsystem.
171 */
172#if !defined(HAL_USE_UART) || defined(__DOXYGEN__)
173#define HAL_USE_UART FALSE
174#endif
175
176/**
177 * @brief Enables the USB subsystem.
178 */
179#if !defined(HAL_USE_USB) || defined(__DOXYGEN__)
180#define HAL_USE_USB TRUE
181#endif
182
183/**
184 * @brief Enables the WDG subsystem.
185 */
186#if !defined(HAL_USE_WDG) || defined(__DOXYGEN__)
187#define HAL_USE_WDG FALSE
188#endif
189
190/**
191 * @brief Enables the WSPI subsystem.
192 */
193#if !defined(HAL_USE_WSPI) || defined(__DOXYGEN__)
194#define HAL_USE_WSPI FALSE
195#endif
196
197/*===========================================================================*/
198/* PAL driver related settings. */
199/*===========================================================================*/
200
201/**
202 * @brief Enables synchronous APIs.
203 * @note Disabling this option saves both code and data space.
204 */
205#if !defined(PAL_USE_CALLBACKS) || defined(__DOXYGEN__)
206#define PAL_USE_CALLBACKS FALSE
207#endif
208
209/**
210 * @brief Enables synchronous APIs.
211 * @note Disabling this option saves both code and data space.
212 */
213#if !defined(PAL_USE_WAIT) || defined(__DOXYGEN__)
214#define PAL_USE_WAIT FALSE
215#endif
216
217/*===========================================================================*/
218/* ADC driver related settings. */
219/*===========================================================================*/
220
221/**
222 * @brief Enables synchronous APIs.
223 * @note Disabling this option saves both code and data space.
224 */
225#if !defined(ADC_USE_WAIT) || defined(__DOXYGEN__)
226#define ADC_USE_WAIT TRUE
227#endif
228
229/**
230 * @brief Enables the @p adcAcquireBus() and @p adcReleaseBus() APIs.
231 * @note Disabling this option saves both code and data space.
232 */
233#if !defined(ADC_USE_MUTUAL_EXCLUSION) || defined(__DOXYGEN__)
234#define ADC_USE_MUTUAL_EXCLUSION TRUE
235#endif
236
237/*===========================================================================*/
238/* CAN driver related settings. */
239/*===========================================================================*/
240
241/**
242 * @brief Sleep mode related APIs inclusion switch.
243 */
244#if !defined(CAN_USE_SLEEP_MODE) || defined(__DOXYGEN__)
245#define CAN_USE_SLEEP_MODE TRUE
246#endif
247
248/**
249 * @brief Enforces the driver to use direct callbacks rather than OSAL events.
250 */
251#if !defined(CAN_ENFORCE_USE_CALLBACKS) || defined(__DOXYGEN__)
252#define CAN_ENFORCE_USE_CALLBACKS FALSE
253#endif
254
255/*===========================================================================*/
256/* CRY driver related settings. */
257/*===========================================================================*/
258
259/**
260 * @brief Enables the SW fall-back of the cryptographic driver.
261 * @details When enabled, this option, activates a fall-back software
262 * implementation for algorithms not supported by the underlying
263 * hardware.
264 * @note Fall-back implementations may not be present for all algorithms.
265 */
266#if !defined(HAL_CRY_USE_FALLBACK) || defined(__DOXYGEN__)
267#define HAL_CRY_USE_FALLBACK FALSE
268#endif
269
270/**
271 * @brief Makes the driver forcibly use the fall-back implementations.
272 */
273#if !defined(HAL_CRY_ENFORCE_FALLBACK) || defined(__DOXYGEN__)
274#define HAL_CRY_ENFORCE_FALLBACK FALSE
275#endif
276
277/*===========================================================================*/
278/* DAC driver related settings. */
279/*===========================================================================*/
280
281/**
282 * @brief Enables synchronous APIs.
283 * @note Disabling this option saves both code and data space.
284 */
285#if !defined(DAC_USE_WAIT) || defined(__DOXYGEN__)
286#define DAC_USE_WAIT TRUE
287#endif
288
289/**
290 * @brief Enables the @p dacAcquireBus() and @p dacReleaseBus() APIs.
291 * @note Disabling this option saves both code and data space.
292 */
293#if !defined(DAC_USE_MUTUAL_EXCLUSION) || defined(__DOXYGEN__)
294#define DAC_USE_MUTUAL_EXCLUSION TRUE
295#endif
296
297/*===========================================================================*/
298/* I2C driver related settings. */
299/*===========================================================================*/
300
301/**
302 * @brief Enables the mutual exclusion APIs on the I2C bus.
303 */
304#if !defined(I2C_USE_MUTUAL_EXCLUSION) || defined(__DOXYGEN__)
305#define I2C_USE_MUTUAL_EXCLUSION TRUE
306#endif
307
308/*===========================================================================*/
309/* MAC driver related settings. */
310/*===========================================================================*/
311
312/**
313 * @brief Enables the zero-copy API.
314 */
315#if !defined(MAC_USE_ZERO_COPY) || defined(__DOXYGEN__)
316#define MAC_USE_ZERO_COPY FALSE
317#endif
318
319/**
320 * @brief Enables an event sources for incoming packets.
321 */
322#if !defined(MAC_USE_EVENTS) || defined(__DOXYGEN__)
323#define MAC_USE_EVENTS TRUE
324#endif
325
326/*===========================================================================*/
327/* MMC_SPI driver related settings. */
328/*===========================================================================*/
329
330/**
331 * @brief Delays insertions.
332 * @details If enabled this options inserts delays into the MMC waiting
333 * routines releasing some extra CPU time for the threads with
334 * lower priority, this may slow down the driver a bit however.
335 * This option is recommended also if the SPI driver does not
336 * use a DMA channel and heavily loads the CPU.
337 */
338#if !defined(MMC_NICE_WAITING) || defined(__DOXYGEN__)
339#define MMC_NICE_WAITING TRUE
340#endif
341
342/*===========================================================================*/
343/* SDC driver related settings. */
344/*===========================================================================*/
345
346/**
347 * @brief Number of initialization attempts before rejecting the card.
348 * @note Attempts are performed at 10mS intervals.
349 */
350#if !defined(SDC_INIT_RETRY) || defined(__DOXYGEN__)
351#define SDC_INIT_RETRY 100
352#endif
353
354/**
355 * @brief Include support for MMC cards.
356 * @note MMC support is not yet implemented so this option must be kept
357 * at @p FALSE.
358 */
359#if !defined(SDC_MMC_SUPPORT) || defined(__DOXYGEN__)
360#define SDC_MMC_SUPPORT FALSE
361#endif
362
363/**
364 * @brief Delays insertions.
365 * @details If enabled this options inserts delays into the MMC waiting
366 * routines releasing some extra CPU time for the threads with
367 * lower priority, this may slow down the driver a bit however.
368 */
369#if !defined(SDC_NICE_WAITING) || defined(__DOXYGEN__)
370#define SDC_NICE_WAITING TRUE
371#endif
372
373/**
374 * @brief OCR initialization constant for V20 cards.
375 */
376#if !defined(SDC_INIT_OCR_V20) || defined(__DOXYGEN__)
377#define SDC_INIT_OCR_V20 0x50FF8000U
378#endif
379
380/**
381 * @brief OCR initialization constant for non-V20 cards.
382 */
383#if !defined(SDC_INIT_OCR) || defined(__DOXYGEN__)
384#define SDC_INIT_OCR 0x80100000U
385#endif
386
387/*===========================================================================*/
388/* SERIAL driver related settings. */
389/*===========================================================================*/
390
391/**
392 * @brief Default bit rate.
393 * @details Configuration parameter, this is the baud rate selected for the
394 * default configuration.
395 */
396#if !defined(SERIAL_DEFAULT_BITRATE) || defined(__DOXYGEN__)
397#define SERIAL_DEFAULT_BITRATE 38400
398#endif
399
400/**
401 * @brief Serial buffers size.
402 * @details Configuration parameter, you can change the depth of the queue
403 * buffers depending on the requirements of your application.
404 * @note The default is 16 bytes for both the transmission and receive
405 * buffers.
406 */
407#if !defined(SERIAL_BUFFERS_SIZE) || defined(__DOXYGEN__)
408#define SERIAL_BUFFERS_SIZE 16
409#endif
410
411/*===========================================================================*/
412/* SERIAL_USB driver related setting. */
413/*===========================================================================*/
414
415/**
416 * @brief Serial over USB buffers size.
417 * @details Configuration parameter, the buffer size must be a multiple of
418 * the USB data endpoint maximum packet size.
419 * @note The default is 256 bytes for both the transmission and receive
420 * buffers.
421 */
422#if !defined(SERIAL_USB_BUFFERS_SIZE) || defined(__DOXYGEN__)
423#define SERIAL_USB_BUFFERS_SIZE 256
424#endif
425
426/**
427 * @brief Serial over USB number of buffers.
428 * @note The default is 2 buffers.
429 */
430#if !defined(SERIAL_USB_BUFFERS_NUMBER) || defined(__DOXYGEN__)
431#define SERIAL_USB_BUFFERS_NUMBER 2
432#endif
433
434/*===========================================================================*/
435/* SPI driver related settings. */
436/*===========================================================================*/
437
438/**
439 * @brief Enables synchronous APIs.
440 * @note Disabling this option saves both code and data space.
441 */
442#if !defined(SPI_USE_WAIT) || defined(__DOXYGEN__)
443#define SPI_USE_WAIT TRUE
444#endif
445
446/**
447 * @brief Enables circular transfers APIs.
448 * @note Disabling this option saves both code and data space.
449 */
450#if !defined(SPI_USE_CIRCULAR) || defined(__DOXYGEN__)
451#define SPI_USE_CIRCULAR FALSE
452#endif
453
454
455/**
456 * @brief Enables the @p spiAcquireBus() and @p spiReleaseBus() APIs.
457 * @note Disabling this option saves both code and data space.
458 */
459#if !defined(SPI_USE_MUTUAL_EXCLUSION) || defined(__DOXYGEN__)
460#define SPI_USE_MUTUAL_EXCLUSION TRUE
461#endif
462
463/**
464 * @brief Handling method for SPI CS line.
465 * @note Disabling this option saves both code and data space.
466 */
467#if !defined(SPI_SELECT_MODE) || defined(__DOXYGEN__)
468#define SPI_SELECT_MODE SPI_SELECT_MODE_PAD
469#endif
470
471/*===========================================================================*/
472/* UART driver related settings. */
473/*===========================================================================*/
474
475/**
476 * @brief Enables synchronous APIs.
477 * @note Disabling this option saves both code and data space.
478 */
479#if !defined(UART_USE_WAIT) || defined(__DOXYGEN__)
480#define UART_USE_WAIT FALSE
481#endif
482
483/**
484 * @brief Enables the @p uartAcquireBus() and @p uartReleaseBus() APIs.
485 * @note Disabling this option saves both code and data space.
486 */
487#if !defined(UART_USE_MUTUAL_EXCLUSION) || defined(__DOXYGEN__)
488#define UART_USE_MUTUAL_EXCLUSION FALSE
489#endif
490
491/*===========================================================================*/
492/* USB driver related settings. */
493/*===========================================================================*/
494
495/**
496 * @brief Enables synchronous APIs.
497 * @note Disabling this option saves both code and data space.
498 */
499#if !defined(USB_USE_WAIT) || defined(__DOXYGEN__)
500#define USB_USE_WAIT TRUE
501#endif
502
503/*===========================================================================*/
504/* WSPI driver related settings. */
505/*===========================================================================*/
506
507/**
508 * @brief Enables synchronous APIs.
509 * @note Disabling this option saves both code and data space.
510 */
511#if !defined(WSPI_USE_WAIT) || defined(__DOXYGEN__)
512#define WSPI_USE_WAIT TRUE
513#endif
514
515/**
516 * @brief Enables the @p wspiAcquireBus() and @p wspiReleaseBus() APIs.
517 * @note Disabling this option saves both code and data space.
518 */
519#if !defined(WSPI_USE_MUTUAL_EXCLUSION) || defined(__DOXYGEN__)
520#define WSPI_USE_MUTUAL_EXCLUSION TRUE
521#endif
522
523#endif /* HALCONF_H */
524
525/** @} */
diff --git a/platforms/chibios/GENERIC_STM32_F042X6/board/board.c b/platforms/chibios/GENERIC_STM32_F042X6/board/board.c
index 3c6f54ef5..0d7c88756 100644
--- a/platforms/chibios/GENERIC_STM32_F042X6/board/board.c
+++ b/platforms/chibios/GENERIC_STM32_F042X6/board/board.c
@@ -202,16 +202,12 @@ static void stm32_gpio_init(void) {
202/* Driver exported functions. */ 202/* Driver exported functions. */
203/*===========================================================================*/ 203/*===========================================================================*/
204 204
205__attribute__((weak)) void enter_bootloader_mode_if_requested(void) {}
206
207/** 205/**
208 * @brief Early initialization code. 206 * @brief Early initialization code.
209 * @details GPIO ports and system clocks are initialized before everything 207 * @details GPIO ports and system clocks are initialized before everything
210 * else. 208 * else.
211 */ 209 */
212void __early_init(void) { 210void __early_init(void) {
213 enter_bootloader_mode_if_requested();
214
215 stm32_gpio_init(); 211 stm32_gpio_init();
216 stm32_clock_init(); 212 stm32_clock_init();
217} 213}
diff --git a/platforms/chibios/GENERIC_STM32_F072XB/configs/mcuconf.h b/platforms/chibios/GENERIC_STM32_F072XB/configs/mcuconf.h
index 688350e9c..32b2777a8 100644
--- a/platforms/chibios/GENERIC_STM32_F072XB/configs/mcuconf.h
+++ b/platforms/chibios/GENERIC_STM32_F072XB/configs/mcuconf.h
@@ -124,7 +124,7 @@
124#define STM32_PWM_USE_ADVANCED FALSE 124#define STM32_PWM_USE_ADVANCED FALSE
125#define STM32_PWM_USE_TIM1 FALSE 125#define STM32_PWM_USE_TIM1 FALSE
126#define STM32_PWM_USE_TIM2 FALSE 126#define STM32_PWM_USE_TIM2 FALSE
127#define STM32_PWM_USE_TIM3 TRUE 127#define STM32_PWM_USE_TIM3 FALSE
128#define STM32_PWM_TIM1_IRQ_PRIORITY 3 128#define STM32_PWM_TIM1_IRQ_PRIORITY 3
129#define STM32_PWM_TIM2_IRQ_PRIORITY 3 129#define STM32_PWM_TIM2_IRQ_PRIORITY 3
130#define STM32_PWM_TIM3_IRQ_PRIORITY 3 130#define STM32_PWM_TIM3_IRQ_PRIORITY 3
@@ -141,11 +141,13 @@
141 * SPI driver system settings. 141 * SPI driver system settings.
142 */ 142 */
143#define STM32_SPI_USE_SPI1 FALSE 143#define STM32_SPI_USE_SPI1 FALSE
144#define STM32_SPI_USE_SPI2 TRUE 144#define STM32_SPI_USE_SPI2 FALSE
145#define STM32_SPI_SPI1_DMA_PRIORITY 1 145#define STM32_SPI_SPI1_DMA_PRIORITY 1
146#define STM32_SPI_SPI2_DMA_PRIORITY 1 146#define STM32_SPI_SPI2_DMA_PRIORITY 1
147#define STM32_SPI_SPI1_IRQ_PRIORITY 2 147#define STM32_SPI_SPI1_IRQ_PRIORITY 2
148#define STM32_SPI_SPI2_IRQ_PRIORITY 2 148#define STM32_SPI_SPI2_IRQ_PRIORITY 2
149#define STM32_SPI_SPI1_RX_DMA_STREAM STM32_DMA_STREAM_ID(1, 2)
150#define STM32_SPI_SPI1_TX_DMA_STREAM STM32_DMA_STREAM_ID(1, 3)
149#define STM32_SPI_SPI2_RX_DMA_STREAM STM32_DMA_STREAM_ID(1, 4) 151#define STM32_SPI_SPI2_RX_DMA_STREAM STM32_DMA_STREAM_ID(1, 4)
150#define STM32_SPI_SPI2_TX_DMA_STREAM STM32_DMA_STREAM_ID(1, 5) 152#define STM32_SPI_SPI2_TX_DMA_STREAM STM32_DMA_STREAM_ID(1, 5)
151#define STM32_SPI_DMA_ERROR_HOOK(spip) osalSysHalt("DMA failure") 153#define STM32_SPI_DMA_ERROR_HOOK(spip) osalSysHalt("DMA failure")
diff --git a/platforms/chibios/GENERIC_STM32_F303XC/configs/mcuconf.h b/platforms/chibios/GENERIC_STM32_F303XC/configs/mcuconf.h
index ac2d9a1ee..c6f5a8ac5 100644
--- a/platforms/chibios/GENERIC_STM32_F303XC/configs/mcuconf.h
+++ b/platforms/chibios/GENERIC_STM32_F303XC/configs/mcuconf.h
@@ -127,8 +127,8 @@
127 * DAC driver system settings. 127 * DAC driver system settings.
128 */ 128 */
129#define STM32_DAC_DUAL_MODE FALSE 129#define STM32_DAC_DUAL_MODE FALSE
130#define STM32_DAC_USE_DAC1_CH1 TRUE 130#define STM32_DAC_USE_DAC1_CH1 FALSE
131#define STM32_DAC_USE_DAC1_CH2 TRUE 131#define STM32_DAC_USE_DAC1_CH2 FALSE
132#define STM32_DAC_DAC1_CH1_IRQ_PRIORITY 10 132#define STM32_DAC_DAC1_CH1_IRQ_PRIORITY 10
133#define STM32_DAC_DAC1_CH2_IRQ_PRIORITY 10 133#define STM32_DAC_DAC1_CH2_IRQ_PRIORITY 10
134#define STM32_DAC_DAC1_CH1_DMA_PRIORITY 2 134#define STM32_DAC_DAC1_CH1_DMA_PRIORITY 2
@@ -141,10 +141,10 @@
141#define STM32_GPT_USE_TIM2 FALSE 141#define STM32_GPT_USE_TIM2 FALSE
142#define STM32_GPT_USE_TIM3 FALSE 142#define STM32_GPT_USE_TIM3 FALSE
143#define STM32_GPT_USE_TIM4 FALSE 143#define STM32_GPT_USE_TIM4 FALSE
144#define STM32_GPT_USE_TIM6 TRUE 144#define STM32_GPT_USE_TIM6 FALSE
145#define STM32_GPT_USE_TIM7 TRUE 145#define STM32_GPT_USE_TIM7 FALSE
146#define STM32_GPT_USE_TIM8 TRUE 146#define STM32_GPT_USE_TIM8 FALSE
147#define STM32_GPT_USE_TIM15 TRUE 147#define STM32_GPT_USE_TIM15 FALSE
148#define STM32_GPT_USE_TIM16 FALSE 148#define STM32_GPT_USE_TIM16 FALSE
149#define STM32_GPT_USE_TIM17 FALSE 149#define STM32_GPT_USE_TIM17 FALSE
150#define STM32_GPT_TIM1_IRQ_PRIORITY 7 150#define STM32_GPT_TIM1_IRQ_PRIORITY 7
@@ -158,7 +158,7 @@
158/* 158/*
159 * I2C driver system settings. 159 * I2C driver system settings.
160 */ 160 */
161#define STM32_I2C_USE_I2C1 TRUE 161#define STM32_I2C_USE_I2C1 FALSE
162#define STM32_I2C_USE_I2C2 FALSE 162#define STM32_I2C_USE_I2C2 FALSE
163#define STM32_I2C_BUSY_TIMEOUT 50 163#define STM32_I2C_BUSY_TIMEOUT 50
164#define STM32_I2C_I2C1_IRQ_PRIORITY 10 164#define STM32_I2C_I2C1_IRQ_PRIORITY 10
@@ -189,8 +189,8 @@
189#define STM32_PWM_USE_ADVANCED FALSE 189#define STM32_PWM_USE_ADVANCED FALSE
190#define STM32_PWM_USE_TIM1 FALSE 190#define STM32_PWM_USE_TIM1 FALSE
191#define STM32_PWM_USE_TIM2 FALSE 191#define STM32_PWM_USE_TIM2 FALSE
192#define STM32_PWM_USE_TIM3 TRUE 192#define STM32_PWM_USE_TIM3 FALSE
193#define STM32_PWM_USE_TIM4 TRUE 193#define STM32_PWM_USE_TIM4 FALSE
194#define STM32_PWM_USE_TIM8 FALSE 194#define STM32_PWM_USE_TIM8 FALSE
195#define STM32_PWM_USE_TIM15 FALSE 195#define STM32_PWM_USE_TIM15 FALSE
196#define STM32_PWM_USE_TIM16 FALSE 196#define STM32_PWM_USE_TIM16 FALSE
@@ -213,7 +213,7 @@
213 * SERIAL driver system settings. 213 * SERIAL driver system settings.
214 */ 214 */
215#define STM32_SERIAL_USE_USART1 FALSE 215#define STM32_SERIAL_USE_USART1 FALSE
216#define STM32_SERIAL_USE_USART2 TRUE 216#define STM32_SERIAL_USE_USART2 FALSE
217#define STM32_SERIAL_USE_USART3 FALSE 217#define STM32_SERIAL_USE_USART3 FALSE
218#define STM32_SERIAL_USE_UART4 FALSE 218#define STM32_SERIAL_USE_UART4 FALSE
219#define STM32_SERIAL_USE_UART5 FALSE 219#define STM32_SERIAL_USE_UART5 FALSE
@@ -227,7 +227,7 @@
227 * SPI driver system settings. 227 * SPI driver system settings.
228 */ 228 */
229#define STM32_SPI_USE_SPI1 FALSE 229#define STM32_SPI_USE_SPI1 FALSE
230#define STM32_SPI_USE_SPI2 TRUE 230#define STM32_SPI_USE_SPI2 FALSE
231#define STM32_SPI_USE_SPI3 FALSE 231#define STM32_SPI_USE_SPI3 FALSE
232#define STM32_SPI_SPI1_DMA_PRIORITY 1 232#define STM32_SPI_SPI1_DMA_PRIORITY 1
233#define STM32_SPI_SPI2_DMA_PRIORITY 1 233#define STM32_SPI_SPI2_DMA_PRIORITY 1
diff --git a/platforms/chibios/GENERIC_STM32_G431XB/board/board.mk b/platforms/chibios/GENERIC_STM32_G431XB/board/board.mk
new file mode 100644
index 000000000..0acbcd83c
--- /dev/null
+++ b/platforms/chibios/GENERIC_STM32_G431XB/board/board.mk
@@ -0,0 +1,9 @@
1# List of all the board related files.
2BOARDSRC = $(CHIBIOS)/os/hal/boards/ST_NUCLEO64_G431RB/board.c
3
4# Required include directories
5BOARDINC = $(CHIBIOS)/os/hal/boards/ST_NUCLEO64_G431RB
6
7# Shared variables
8ALLCSRC += $(BOARDSRC)
9ALLINC += $(BOARDINC)
diff --git a/platforms/chibios/GENERIC_STM32_G431XB/configs/config.h b/platforms/chibios/GENERIC_STM32_G431XB/configs/config.h
new file mode 100644
index 000000000..39ce627e7
--- /dev/null
+++ b/platforms/chibios/GENERIC_STM32_G431XB/configs/config.h
@@ -0,0 +1,23 @@
1/* Copyright 2018-2020 Nick Brassel (@tzarc)
2 *
3 * This program is free software: you can redistribute it and/or modify
4 * it under the terms of the GNU General Public License as published by
5 * the Free Software Foundation, either version 2 of the License, or
6 * (at your option) any later version.
7 *
8 * This program is distributed in the hope that it will be useful,
9 * but WITHOUT ANY WARRANTY; without even the implied warranty of
10 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
11 * GNU General Public License for more details.
12 *
13 * You should have received a copy of the GNU General Public License
14 * along with this program. If not, see <http://www.gnu.org/licenses/>.
15 */
16
17/* Address for jumping to bootloader on STM32 chips. */
18/* It is chip dependent, the correct number can be looked up here (page 175):
19 * http://www.st.com/web/en/resource/technical/document/application_note/CD00167594.pdf
20 * This also requires a patch to chibios:
21 * <tmk_dir>/tmk_core/tool/chibios/ch-bootloader-jump.patch
22 */
23#define STM32_BOOTLOADER_ADDRESS 0x1FFF0000
diff --git a/platforms/chibios/GENERIC_STM32_G431XB/configs/mcuconf.h b/platforms/chibios/GENERIC_STM32_G431XB/configs/mcuconf.h
new file mode 100644
index 000000000..182d4885d
--- /dev/null
+++ b/platforms/chibios/GENERIC_STM32_G431XB/configs/mcuconf.h
@@ -0,0 +1,307 @@
1/*
2 ChibiOS - Copyright (C) 2006..2018 Giovanni Di Sirio
3
4 Licensed under the Apache License, Version 2.0 (the "License");
5 you may not use this file except in compliance with the License.
6 You may obtain a copy of the License at
7
8 http://www.apache.org/licenses/LICENSE-2.0
9
10 Unless required by applicable law or agreed to in writing, software
11 distributed under the License is distributed on an "AS IS" BASIS,
12 WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
13 See the License for the specific language governing permissions and
14 limitations under the License.
15*/
16
17/*
18 * STM32G4xx drivers configuration.
19 * The following settings override the default settings present in
20 * the various device driver implementation headers.
21 * Note that the settings for each driver only have effect if the whole
22 * driver is enabled in halconf.h.
23 *
24 * IRQ priorities:
25 * 15...0 Lowest...Highest.
26 *
27 * DMA priorities:
28 * 0...3 Lowest...Highest.
29 */
30
31#ifndef MCUCONF_H
32#define MCUCONF_H
33
34#define STM32G4xx_MCUCONF
35#define STM32G431_MCUCONF
36#define STM32G441_MCUCONF
37
38/*
39 * HAL driver system settings.
40 */
41#define STM32_NO_INIT FALSE
42#define STM32_VOS STM32_VOS_RANGE1
43#define STM32_PWR_CR2 (PWR_CR2_PLS_LEV0)
44#define STM32_PWR_CR3 (PWR_CR3_EIWF)
45#define STM32_PWR_CR4 (0U)
46#define STM32_HSI16_ENABLED TRUE
47#define STM32_HSI48_ENABLED TRUE
48#define STM32_HSE_ENABLED FALSE
49#define STM32_LSI_ENABLED TRUE
50#define STM32_LSE_ENABLED FALSE
51#define STM32_SW STM32_SW_PLLRCLK
52#define STM32_PLLSRC STM32_PLLSRC_HSI16
53#define STM32_PLLM_VALUE 4
54#define STM32_PLLN_VALUE 80
55#define STM32_PLLPDIV_VALUE 0
56#define STM32_PLLP_VALUE 7
57#define STM32_PLLQ_VALUE 8
58#define STM32_PLLR_VALUE 2
59#define STM32_HPRE STM32_HPRE_DIV1
60#define STM32_PPRE1 STM32_PPRE1_DIV1
61#define STM32_PPRE2 STM32_PPRE2_DIV1
62#define STM32_MCOSEL STM32_MCOSEL_NOCLOCK
63#define STM32_MCOPRE STM32_MCOPRE_DIV1
64#define STM32_LSCOSEL STM32_LSCOSEL_NOCLOCK
65
66/*
67 * Peripherals clock sources.
68 */
69#define STM32_USART1SEL STM32_USART1SEL_SYSCLK
70#define STM32_USART2SEL STM32_USART2SEL_SYSCLK
71#define STM32_USART3SEL STM32_USART3SEL_SYSCLK
72#define STM32_UART4SEL STM32_UART4SEL_SYSCLK
73#define STM32_LPUART1SEL STM32_LPUART1SEL_PCLK1
74#define STM32_I2C1SEL STM32_I2C1SEL_PCLK1
75#define STM32_I2C2SEL STM32_I2C2SEL_PCLK1
76#define STM32_I2C3SEL STM32_I2C3SEL_PCLK1
77#define STM32_LPTIM1SEL STM32_LPTIM1SEL_PCLK1
78#define STM32_SAI1SEL STM32_SAI1SEL_SYSCLK
79#define STM32_I2S23SEL STM32_I2S23SEL_SYSCLK
80#define STM32_FDCANSEL STM32_FDCANSEL_PCLK1
81#define STM32_CLK48SEL STM32_CLK48SEL_HSI48
82#define STM32_ADC12SEL STM32_ADC12SEL_PLLPCLK
83#define STM32_RTCSEL STM32_RTCSEL_NOCLOCK
84
85/*
86 * IRQ system settings.
87 */
88#define STM32_IRQ_EXTI0_PRIORITY 6
89#define STM32_IRQ_EXTI1_PRIORITY 6
90#define STM32_IRQ_EXTI2_PRIORITY 6
91#define STM32_IRQ_EXTI3_PRIORITY 6
92#define STM32_IRQ_EXTI4_PRIORITY 6
93#define STM32_IRQ_EXTI5_9_PRIORITY 6
94#define STM32_IRQ_EXTI10_15_PRIORITY 6
95#define STM32_IRQ_EXTI164041_PRIORITY 6
96#define STM32_IRQ_EXTI17_PRIORITY 6
97#define STM32_IRQ_EXTI18_PRIORITY 6
98#define STM32_IRQ_EXTI19_PRIORITY 6
99#define STM32_IRQ_EXTI20_PRIORITY 6
100#define STM32_IRQ_EXTI212229_PRIORITY 6
101#define STM32_IRQ_EXTI30_32_PRIORITY 6
102#define STM32_IRQ_EXTI33_PRIORITY 6
103
104#define STM32_IRQ_FDCAN1_PRIORITY 10
105
106#define STM32_IRQ_TIM1_BRK_TIM15_PRIORITY 7
107#define STM32_IRQ_TIM1_UP_TIM16_PRIORITY 7
108#define STM32_IRQ_TIM1_TRGCO_TIM17_PRIORITY 7
109#define STM32_IRQ_TIM1_CC_PRIORITY 7
110#define STM32_IRQ_TIM2_PRIORITY 7
111#define STM32_IRQ_TIM3_PRIORITY 7
112#define STM32_IRQ_TIM4_PRIORITY 7
113#define STM32_IRQ_TIM6_PRIORITY 7
114#define STM32_IRQ_TIM7_PRIORITY 7
115#define STM32_IRQ_TIM8_UP_PRIORITY 7
116#define STM32_IRQ_TIM8_CC_PRIORITY 7
117
118#define STM32_IRQ_USART1_PRIORITY 12
119#define STM32_IRQ_USART2_PRIORITY 12
120#define STM32_IRQ_USART3_PRIORITY 12
121#define STM32_IRQ_UART4_PRIORITY 12
122#define STM32_IRQ_LPUART1_PRIORITY 12
123
124/*
125 * ADC driver system settings.
126 */
127#define STM32_ADC_DUAL_MODE FALSE
128#define STM32_ADC_COMPACT_SAMPLES FALSE
129#define STM32_ADC_USE_ADC1 FALSE
130#define STM32_ADC_USE_ADC2 FALSE
131#define STM32_ADC_ADC1_DMA_STREAM STM32_DMA_STREAM_ID_ANY
132#define STM32_ADC_ADC2_DMA_STREAM STM32_DMA_STREAM_ID_ANY
133#define STM32_ADC_ADC1_DMA_PRIORITY 2
134#define STM32_ADC_ADC2_DMA_PRIORITY 2
135#define STM32_ADC_ADC12_IRQ_PRIORITY 5
136#define STM32_ADC_ADC1_DMA_IRQ_PRIORITY 5
137#define STM32_ADC_ADC2_DMA_IRQ_PRIORITY 5
138#define STM32_ADC_ADC12_CLOCK_MODE ADC_CCR_CKMODE_AHB_DIV4
139#define STM32_ADC_ADC12_PRESC ADC_CCR_PRESC_DIV2
140
141/*
142 * CAN driver system settings.
143 */
144#define STM32_CAN_USE_FDCAN1 FALSE
145
146/*
147 * DAC driver system settings.
148 */
149#define STM32_DAC_DUAL_MODE FALSE
150#define STM32_DAC_USE_DAC1_CH1 FALSE
151#define STM32_DAC_USE_DAC1_CH2 FALSE
152#define STM32_DAC_USE_DAC3_CH1 FALSE
153#define STM32_DAC_USE_DAC3_CH2 FALSE
154#define STM32_DAC_DAC1_CH1_IRQ_PRIORITY 10
155#define STM32_DAC_DAC1_CH2_IRQ_PRIORITY 10
156#define STM32_DAC_DAC3_CH1_IRQ_PRIORITY 10
157#define STM32_DAC_DAC3_CH2_IRQ_PRIORITY 10
158#define STM32_DAC_DAC1_CH1_DMA_PRIORITY 2
159#define STM32_DAC_DAC1_CH2_DMA_PRIORITY 2
160#define STM32_DAC_DAC3_CH1_DMA_PRIORITY 2
161#define STM32_DAC_DAC3_CH2_DMA_PRIORITY 2
162#define STM32_DAC_DAC1_CH1_DMA_STREAM STM32_DMA_STREAM_ID_ANY
163#define STM32_DAC_DAC1_CH2_DMA_STREAM STM32_DMA_STREAM_ID_ANY
164#define STM32_DAC_DAC3_CH1_DMA_STREAM STM32_DMA_STREAM_ID_ANY
165#define STM32_DAC_DAC3_CH2_DMA_STREAM STM32_DMA_STREAM_ID_ANY
166
167/*
168 * GPT driver system settings.
169 */
170#define STM32_GPT_USE_TIM1 FALSE
171#define STM32_GPT_USE_TIM2 FALSE
172#define STM32_GPT_USE_TIM3 FALSE
173#define STM32_GPT_USE_TIM4 FALSE
174#define STM32_GPT_USE_TIM6 FALSE
175#define STM32_GPT_USE_TIM7 FALSE
176#define STM32_GPT_USE_TIM8 FALSE
177#define STM32_GPT_USE_TIM15 FALSE
178#define STM32_GPT_USE_TIM16 FALSE
179#define STM32_GPT_USE_TIM17 FALSE
180
181/*
182 * I2C driver system settings.
183 */
184#define STM32_I2C_USE_I2C1 FALSE
185#define STM32_I2C_USE_I2C2 FALSE
186#define STM32_I2C_USE_I2C3 FALSE
187#define STM32_I2C_BUSY_TIMEOUT 50
188#define STM32_I2C_I2C1_RX_DMA_STREAM STM32_DMA_STREAM_ID_ANY
189#define STM32_I2C_I2C1_TX_DMA_STREAM STM32_DMA_STREAM_ID_ANY
190#define STM32_I2C_I2C2_RX_DMA_STREAM STM32_DMA_STREAM_ID_ANY
191#define STM32_I2C_I2C2_TX_DMA_STREAM STM32_DMA_STREAM_ID_ANY
192#define STM32_I2C_I2C3_RX_DMA_STREAM STM32_DMA_STREAM_ID_ANY
193#define STM32_I2C_I2C3_TX_DMA_STREAM STM32_DMA_STREAM_ID_ANY
194#define STM32_I2C_I2C1_IRQ_PRIORITY 5
195#define STM32_I2C_I2C2_IRQ_PRIORITY 5
196#define STM32_I2C_I2C3_IRQ_PRIORITY 5
197#define STM32_I2C_I2C1_DMA_PRIORITY 3
198#define STM32_I2C_I2C2_DMA_PRIORITY 3
199#define STM32_I2C_I2C3_DMA_PRIORITY 3
200#define STM32_I2C_DMA_ERROR_HOOK(i2cp) osalSysHalt("DMA failure")
201
202/*
203 * ICU driver system settings.
204 */
205#define STM32_ICU_USE_TIM1 FALSE
206#define STM32_ICU_USE_TIM2 FALSE
207#define STM32_ICU_USE_TIM3 FALSE
208#define STM32_ICU_USE_TIM4 FALSE
209#define STM32_ICU_USE_TIM8 FALSE
210#define STM32_ICU_USE_TIM15 FALSE
211
212/*
213 * PWM driver system settings.
214 */
215#define STM32_PWM_USE_ADVANCED FALSE
216#define STM32_PWM_USE_TIM1 FALSE
217#define STM32_PWM_USE_TIM2 FALSE
218#define STM32_PWM_USE_TIM3 FALSE
219#define STM32_PWM_USE_TIM4 FALSE
220#define STM32_PWM_USE_TIM8 FALSE
221#define STM32_PWM_USE_TIM15 FALSE
222#define STM32_PWM_USE_TIM16 FALSE
223#define STM32_PWM_USE_TIM17 FALSE
224
225/*
226 * RTC driver system settings.
227 */
228
229/*
230 * SDC driver system settings.
231 */
232
233/*
234 * SERIAL driver system settings.
235 */
236#define STM32_SERIAL_USE_USART1 FALSE
237#define STM32_SERIAL_USE_USART2 FALSE
238#define STM32_SERIAL_USE_USART3 FALSE
239#define STM32_SERIAL_USE_UART4 FALSE
240#define STM32_SERIAL_USE_LPUART1 FALSE
241
242/*
243 * SPI driver system settings.
244 */
245#define STM32_SPI_USE_SPI1 FALSE
246#define STM32_SPI_USE_SPI2 FALSE
247#define STM32_SPI_USE_SPI3 FALSE
248#define STM32_SPI_SPI1_RX_DMA_STREAM STM32_DMA_STREAM_ID_ANY
249#define STM32_SPI_SPI1_TX_DMA_STREAM STM32_DMA_STREAM_ID_ANY
250#define STM32_SPI_SPI2_RX_DMA_STREAM STM32_DMA_STREAM_ID_ANY
251#define STM32_SPI_SPI2_TX_DMA_STREAM STM32_DMA_STREAM_ID_ANY
252#define STM32_SPI_SPI3_RX_DMA_STREAM STM32_DMA_STREAM_ID_ANY
253#define STM32_SPI_SPI3_TX_DMA_STREAM STM32_DMA_STREAM_ID_ANY
254#define STM32_SPI_SPI1_DMA_PRIORITY 1
255#define STM32_SPI_SPI2_DMA_PRIORITY 1
256#define STM32_SPI_SPI3_DMA_PRIORITY 1
257#define STM32_SPI_SPI1_IRQ_PRIORITY 10
258#define STM32_SPI_SPI2_IRQ_PRIORITY 10
259#define STM32_SPI_SPI3_IRQ_PRIORITY 10
260#define STM32_SPI_DMA_ERROR_HOOK(spip) osalSysHalt("DMA failure")
261
262/*
263 * ST driver system settings.
264 */
265#define STM32_ST_IRQ_PRIORITY 8
266#define STM32_ST_USE_TIMER 2
267
268/*
269 * TRNG driver system settings.
270 */
271#define STM32_TRNG_USE_RNG1 FALSE
272
273/*
274 * UART driver system settings.
275 */
276#define STM32_UART_USE_USART1 FALSE
277#define STM32_UART_USE_USART2 FALSE
278#define STM32_UART_USE_USART3 FALSE
279#define STM32_UART_USE_UART4 FALSE
280#define STM32_UART_USART1_RX_DMA_STREAM STM32_DMA_STREAM_ID_ANY
281#define STM32_UART_USART1_TX_DMA_STREAM STM32_DMA_STREAM_ID_ANY
282#define STM32_UART_USART2_RX_DMA_STREAM STM32_DMA_STREAM_ID_ANY
283#define STM32_UART_USART2_TX_DMA_STREAM STM32_DMA_STREAM_ID_ANY
284#define STM32_UART_USART3_RX_DMA_STREAM STM32_DMA_STREAM_ID_ANY
285#define STM32_UART_USART3_TX_DMA_STREAM STM32_DMA_STREAM_ID_ANY
286#define STM32_UART_UART4_RX_DMA_STREAM STM32_DMA_STREAM_ID_ANY
287#define STM32_UART_UART4_TX_DMA_STREAM STM32_DMA_STREAM_ID_ANY
288#define STM32_UART_USART1_DMA_PRIORITY 0
289#define STM32_UART_USART2_DMA_PRIORITY 0
290#define STM32_UART_USART3_DMA_PRIORITY 0
291#define STM32_UART_UART4_DMA_PRIORITY 0
292#define STM32_UART_DMA_ERROR_HOOK(uartp) osalSysHalt("DMA failure")
293
294/*
295 * USB driver system settings.
296 */
297#define STM32_USB_USE_USB1 TRUE
298#define STM32_USB_LOW_POWER_ON_SUSPEND FALSE
299#define STM32_USB_USB1_HP_IRQ_PRIORITY 5
300#define STM32_USB_USB1_LP_IRQ_PRIORITY 6
301
302/*
303 * WDG driver system settings.
304 */
305#define STM32_WDG_USE_IWDG FALSE
306
307#endif /* MCUCONF_H */
diff --git a/platforms/chibios/GENERIC_STM32_G474XE/board/board.mk b/platforms/chibios/GENERIC_STM32_G474XE/board/board.mk
new file mode 100644
index 000000000..957adf509
--- /dev/null
+++ b/platforms/chibios/GENERIC_STM32_G474XE/board/board.mk
@@ -0,0 +1,9 @@
1# List of all the board related files.
2BOARDSRC = $(CHIBIOS)/os/hal/boards/ST_NUCLEO64_G474RE/board.c
3
4# Required include directories
5BOARDINC = $(CHIBIOS)/os/hal/boards/ST_NUCLEO64_G474RE
6
7# Shared variables
8ALLCSRC += $(BOARDSRC)
9ALLINC += $(BOARDINC)
diff --git a/platforms/chibios/GENERIC_STM32_G474XE/configs/config.h b/platforms/chibios/GENERIC_STM32_G474XE/configs/config.h
new file mode 100644
index 000000000..eb74d68e8
--- /dev/null
+++ b/platforms/chibios/GENERIC_STM32_G474XE/configs/config.h
@@ -0,0 +1,30 @@
1/* Copyright 2020 Nick Brassel (tzarc)
2 *
3 * This program is free software: you can redistribute it and/or modify
4 * it under the terms of the GNU General Public License as published by
5 * the Free Software Foundation, either version 3 of the License, or
6 * (at your option) any later version.
7 *
8 * This program is distributed in the hope that it will be useful,
9 * but WITHOUT ANY WARRANTY; without even the implied warranty of
10 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
11 * GNU General Public License for more details.
12 *
13 * You should have received a copy of the GNU General Public License
14 * along with this program. If not, see <https://www.gnu.org/licenses/>.
15 */
16#pragma once
17
18#ifndef STM32_BOOTLOADER_DUAL_BANK
19# define STM32_BOOTLOADER_DUAL_BANK FALSE
20#endif
21
22// To Enter bootloader from `RESET` keycode, you'll need to dedicate a GPIO to
23// charge an RC network on the BOOT0 pin.
24// See the QMK Discord's #hardware channel pins for an example circuit.
25// Insert these two lines into your keyboard's `config.h` file.
26// In the case below, PB7 is selected to charge.
27#if 0
28#define STM32_BOOTLOADER_DUAL_BANK TRUE
29#define STM32_BOOTLOADER_DUAL_BANK_GPIO B7
30#endif \ No newline at end of file
diff --git a/platforms/chibios/GENERIC_STM32_G474XE/configs/mcuconf.h b/platforms/chibios/GENERIC_STM32_G474XE/configs/mcuconf.h
new file mode 100644
index 000000000..117e920e3
--- /dev/null
+++ b/platforms/chibios/GENERIC_STM32_G474XE/configs/mcuconf.h
@@ -0,0 +1,372 @@
1/*
2 ChibiOS - Copyright (C) 2006..2018 Giovanni Di Sirio
3
4 Licensed under the Apache License, Version 2.0 (the "License");
5 you may not use this file except in compliance with the License.
6 You may obtain a copy of the License at
7
8 http://www.apache.org/licenses/LICENSE-2.0
9
10 Unless required by applicable law or agreed to in writing, software
11 distributed under the License is distributed on an "AS IS" BASIS,
12 WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
13 See the License for the specific language governing permissions and
14 limitations under the License.
15*/
16
17/*
18 * STM32G4xx drivers configuration.
19 * The following settings override the default settings present in
20 * the various device driver implementation headers.
21 * Note that the settings for each driver only have effect if the whole
22 * driver is enabled in halconf.h.
23 *
24 * IRQ priorities:
25 * 15...0 Lowest...Highest.
26 *
27 * DMA priorities:
28 * 0...3 Lowest...Highest.
29 */
30
31#ifndef MCUCONF_H
32#define MCUCONF_H
33
34#define STM32G4xx_MCUCONF
35#define STM32G473_MCUCONF
36#define STM32G483_MCUCONF
37#define STM32G474_MCUCONF
38#define STM32G484_MCUCONF
39
40/*
41 * HAL driver system settings.
42 */
43#define STM32_NO_INIT FALSE
44#define STM32_VOS STM32_VOS_RANGE1
45#define STM32_PWR_CR2 (PWR_CR2_PLS_LEV0)
46#define STM32_PWR_CR3 (PWR_CR3_EIWF)
47#define STM32_PWR_CR4 (0U)
48#define STM32_HSI16_ENABLED TRUE
49#define STM32_HSI48_ENABLED TRUE
50#define STM32_HSE_ENABLED FALSE
51#define STM32_LSI_ENABLED FALSE
52#define STM32_LSE_ENABLED FALSE
53#define STM32_SW STM32_SW_PLLRCLK
54#define STM32_PLLSRC STM32_PLLSRC_HSI16
55#define STM32_PLLM_VALUE 2
56#define STM32_PLLN_VALUE 40
57#define STM32_PLLPDIV_VALUE 0
58#define STM32_PLLP_VALUE 7
59#define STM32_PLLQ_VALUE 2
60#define STM32_PLLR_VALUE 2
61#define STM32_HPRE STM32_HPRE_DIV1
62#define STM32_PPRE1 STM32_PPRE1_DIV1
63#define STM32_PPRE2 STM32_PPRE2_DIV1
64#define STM32_MCOSEL STM32_MCOSEL_NOCLOCK
65#define STM32_MCOPRE STM32_MCOPRE_DIV1
66#define STM32_LSCOSEL STM32_LSCOSEL_NOCLOCK
67
68/*
69 * Peripherals clock sources.
70 */
71#define STM32_USART1SEL STM32_USART1SEL_SYSCLK
72#define STM32_USART2SEL STM32_USART2SEL_SYSCLK
73#define STM32_USART3SEL STM32_USART3SEL_SYSCLK
74#define STM32_UART4SEL STM32_UART4SEL_SYSCLK
75#define STM32_UART5SEL STM32_UART5SEL_SYSCLK
76#define STM32_LPUART1SEL STM32_LPUART1SEL_PCLK1
77#define STM32_I2C1SEL STM32_I2C1SEL_PCLK1
78#define STM32_I2C2SEL STM32_I2C2SEL_PCLK1
79#define STM32_I2C3SEL STM32_I2C3SEL_PCLK1
80#define STM32_I2C4SEL STM32_I2C4SEL_PCLK1
81#define STM32_LPTIM1SEL STM32_LPTIM1SEL_PCLK1
82#define STM32_SAI1SEL STM32_SAI1SEL_SYSCLK
83#define STM32_I2S23SEL STM32_I2S23SEL_SYSCLK
84#define STM32_FDCANSEL STM32_FDCANSEL_HSE
85#define STM32_CLK48SEL STM32_CLK48SEL_HSI48
86#define STM32_ADC12SEL STM32_ADC12SEL_PLLPCLK
87#define STM32_ADC345SEL STM32_ADC345SEL_PLLPCLK
88#define STM32_QSPISEL STM32_QSPISEL_SYSCLK
89#define STM32_RTCSEL STM32_RTCSEL_NOCLOCK
90
91/*
92 * IRQ system settings.
93 */
94#define STM32_IRQ_EXTI0_PRIORITY 6
95#define STM32_IRQ_EXTI1_PRIORITY 6
96#define STM32_IRQ_EXTI2_PRIORITY 6
97#define STM32_IRQ_EXTI3_PRIORITY 6
98#define STM32_IRQ_EXTI4_PRIORITY 6
99#define STM32_IRQ_EXTI5_9_PRIORITY 6
100#define STM32_IRQ_EXTI10_15_PRIORITY 6
101#define STM32_IRQ_EXTI164041_PRIORITY 6
102#define STM32_IRQ_EXTI17_PRIORITY 6
103#define STM32_IRQ_EXTI18_PRIORITY 6
104#define STM32_IRQ_EXTI19_PRIORITY 6
105#define STM32_IRQ_EXTI20_PRIORITY 6
106#define STM32_IRQ_EXTI212229_PRIORITY 6
107#define STM32_IRQ_EXTI30_32_PRIORITY 6
108#define STM32_IRQ_EXTI33_PRIORITY 6
109
110#define STM32_IRQ_FDCAN1_PRIORITY 10
111#define STM32_IRQ_FDCAN2_PRIORITY 10
112#define STM32_IRQ_FDCAN3_PRIORITY 10
113
114#define STM32_IRQ_TIM1_BRK_TIM15_PRIORITY 7
115#define STM32_IRQ_TIM1_UP_TIM16_PRIORITY 7
116#define STM32_IRQ_TIM1_TRGCO_TIM17_PRIORITY 7
117#define STM32_IRQ_TIM1_CC_PRIORITY 7
118#define STM32_IRQ_TIM2_PRIORITY 7
119#define STM32_IRQ_TIM3_PRIORITY 7
120#define STM32_IRQ_TIM4_PRIORITY 7
121#define STM32_IRQ_TIM5_PRIORITY 7
122#define STM32_IRQ_TIM6_PRIORITY 7
123#define STM32_IRQ_TIM7_PRIORITY 7
124#define STM32_IRQ_TIM8_UP_PRIORITY 7
125#define STM32_IRQ_TIM8_CC_PRIORITY 7
126#define STM32_IRQ_TIM20_UP_PRIORITY 7
127#define STM32_IRQ_TIM20_CC_PRIORITY 7
128
129#define STM32_IRQ_USART1_PRIORITY 12
130#define STM32_IRQ_USART2_PRIORITY 12
131#define STM32_IRQ_USART3_PRIORITY 12
132#define STM32_IRQ_UART4_PRIORITY 12
133#define STM32_IRQ_UART5_PRIORITY 12
134#define STM32_IRQ_LPUART1_PRIORITY 12
135
136/*
137 * ADC driver system settings.
138 */
139#define STM32_ADC_DUAL_MODE FALSE
140#define STM32_ADC_COMPACT_SAMPLES FALSE
141#define STM32_ADC_USE_ADC1 FALSE
142#define STM32_ADC_USE_ADC2 FALSE
143#define STM32_ADC_USE_ADC3 FALSE
144#define STM32_ADC_USE_ADC4 FALSE
145#define STM32_ADC_ADC1_DMA_STREAM STM32_DMA_STREAM_ID_ANY
146#define STM32_ADC_ADC2_DMA_STREAM STM32_DMA_STREAM_ID_ANY
147#define STM32_ADC_ADC3_DMA_STREAM STM32_DMA_STREAM_ID_ANY
148#define STM32_ADC_ADC4_DMA_STREAM STM32_DMA_STREAM_ID_ANY
149#define STM32_ADC_ADC1_DMA_PRIORITY 2
150#define STM32_ADC_ADC2_DMA_PRIORITY 2
151#define STM32_ADC_ADC3_DMA_PRIORITY 2
152#define STM32_ADC_ADC4_DMA_PRIORITY 2
153#define STM32_ADC_ADC12_IRQ_PRIORITY 5
154#define STM32_ADC_ADC3_IRQ_PRIORITY 5
155#define STM32_ADC_ADC4_IRQ_PRIORITY 5
156#define STM32_ADC_ADC1_DMA_IRQ_PRIORITY 5
157#define STM32_ADC_ADC2_DMA_IRQ_PRIORITY 5
158#define STM32_ADC_ADC3_DMA_IRQ_PRIORITY 5
159#define STM32_ADC_ADC4_DMA_IRQ_PRIORITY 5
160#define STM32_ADC_ADC12_CLOCK_MODE ADC_CCR_CKMODE_AHB_DIV4
161#define STM32_ADC_ADC345_CLOCK_MODE ADC_CCR_CKMODE_AHB_DIV4
162#define STM32_ADC_ADC12_PRESC ADC_CCR_PRESC_DIV2
163#define STM32_ADC_ADC345_PRESC ADC_CCR_PRESC_DIV2
164
165/*
166 * CAN driver system settings.
167 */
168#define STM32_CAN_USE_FDCAN1 FALSE
169#define STM32_CAN_USE_FDCAN2 FALSE
170#define STM32_CAN_USE_FDCAN3 FALSE
171
172/*
173 * DAC driver system settings.
174 */
175#define STM32_DAC_DUAL_MODE FALSE
176#define STM32_DAC_USE_DAC1_CH1 FALSE
177#define STM32_DAC_USE_DAC1_CH2 FALSE
178#define STM32_DAC_USE_DAC2_CH1 FALSE
179#define STM32_DAC_USE_DAC3_CH1 FALSE
180#define STM32_DAC_USE_DAC3_CH2 FALSE
181#define STM32_DAC_USE_DAC4_CH1 FALSE
182#define STM32_DAC_USE_DAC4_CH2 FALSE
183#define STM32_DAC_DAC1_CH1_IRQ_PRIORITY 10
184#define STM32_DAC_DAC1_CH2_IRQ_PRIORITY 10
185#define STM32_DAC_DAC2_CH1_IRQ_PRIORITY 10
186#define STM32_DAC_DAC3_CH1_IRQ_PRIORITY 10
187#define STM32_DAC_DAC3_CH2_IRQ_PRIORITY 10
188#define STM32_DAC_DAC4_CH1_IRQ_PRIORITY 10
189#define STM32_DAC_DAC4_CH2_IRQ_PRIORITY 10
190#define STM32_DAC_DAC1_CH1_DMA_PRIORITY 2
191#define STM32_DAC_DAC1_CH2_DMA_PRIORITY 2
192#define STM32_DAC_DAC2_CH1_DMA_PRIORITY 2
193#define STM32_DAC_DAC3_CH1_DMA_PRIORITY 2
194#define STM32_DAC_DAC3_CH2_DMA_PRIORITY 2
195#define STM32_DAC_DAC4_CH1_DMA_PRIORITY 2
196#define STM32_DAC_DAC4_CH2_DMA_PRIORITY 2
197#define STM32_DAC_DAC1_CH1_DMA_STREAM STM32_DMA_STREAM_ID_ANY
198#define STM32_DAC_DAC1_CH2_DMA_STREAM STM32_DMA_STREAM_ID_ANY
199#define STM32_DAC_DAC2_CH1_DMA_STREAM STM32_DMA_STREAM_ID_ANY
200#define STM32_DAC_DAC3_CH1_DMA_STREAM STM32_DMA_STREAM_ID_ANY
201#define STM32_DAC_DAC3_CH2_DMA_STREAM STM32_DMA_STREAM_ID_ANY
202#define STM32_DAC_DAC4_CH1_DMA_STREAM STM32_DMA_STREAM_ID_ANY
203#define STM32_DAC_DAC4_CH2_DMA_STREAM STM32_DMA_STREAM_ID_ANY
204
205/*
206 * GPT driver system settings.
207 */
208#define STM32_GPT_USE_TIM1 FALSE
209#define STM32_GPT_USE_TIM2 FALSE
210#define STM32_GPT_USE_TIM3 FALSE
211#define STM32_GPT_USE_TIM4 FALSE
212#define STM32_GPT_USE_TIM5 FALSE
213#define STM32_GPT_USE_TIM6 FALSE
214#define STM32_GPT_USE_TIM7 FALSE
215#define STM32_GPT_USE_TIM8 FALSE
216#define STM32_GPT_USE_TIM15 FALSE
217#define STM32_GPT_USE_TIM16 FALSE
218#define STM32_GPT_USE_TIM17 FALSE
219
220/*
221 * I2C driver system settings.
222 */
223#define STM32_I2C_USE_I2C1 FALSE
224#define STM32_I2C_USE_I2C2 FALSE
225#define STM32_I2C_USE_I2C3 FALSE
226#define STM32_I2C_USE_I2C4 FALSE
227#define STM32_I2C_BUSY_TIMEOUT 50
228#define STM32_I2C_I2C1_RX_DMA_STREAM STM32_DMA_STREAM_ID_ANY
229#define STM32_I2C_I2C1_TX_DMA_STREAM STM32_DMA_STREAM_ID_ANY
230#define STM32_I2C_I2C2_RX_DMA_STREAM STM32_DMA_STREAM_ID_ANY
231#define STM32_I2C_I2C2_TX_DMA_STREAM STM32_DMA_STREAM_ID_ANY
232#define STM32_I2C_I2C3_RX_DMA_STREAM STM32_DMA_STREAM_ID_ANY
233#define STM32_I2C_I2C3_TX_DMA_STREAM STM32_DMA_STREAM_ID_ANY
234#define STM32_I2C_I2C4_RX_DMA_STREAM STM32_DMA_STREAM_ID_ANY
235#define STM32_I2C_I2C4_TX_DMA_STREAM STM32_DMA_STREAM_ID_ANY
236#define STM32_I2C_I2C1_IRQ_PRIORITY 5
237#define STM32_I2C_I2C2_IRQ_PRIORITY 5
238#define STM32_I2C_I2C3_IRQ_PRIORITY 5
239#define STM32_I2C_I2C4_IRQ_PRIORITY 5
240#define STM32_I2C_I2C1_DMA_PRIORITY 3
241#define STM32_I2C_I2C2_DMA_PRIORITY 3
242#define STM32_I2C_I2C3_DMA_PRIORITY 3
243#define STM32_I2C_I2C4_DMA_PRIORITY 3
244#define STM32_I2C_DMA_ERROR_HOOK(i2cp) osalSysHalt("DMA failure")
245
246/*
247 * ICU driver system settings.
248 */
249#define STM32_ICU_USE_TIM1 FALSE
250#define STM32_ICU_USE_TIM2 FALSE
251#define STM32_ICU_USE_TIM3 FALSE
252#define STM32_ICU_USE_TIM4 FALSE
253#define STM32_ICU_USE_TIM5 FALSE
254#define STM32_ICU_USE_TIM8 FALSE
255#define STM32_ICU_USE_TIM15 FALSE
256#define STM32_ICU_USE_TIM16 FALSE
257#define STM32_ICU_USE_TIM17 FALSE
258
259/*
260 * PWM driver system settings.
261 */
262#define STM32_PWM_USE_ADVANCED FALSE
263#define STM32_PWM_USE_TIM1 FALSE
264#define STM32_PWM_USE_TIM2 FALSE
265#define STM32_PWM_USE_TIM3 FALSE
266#define STM32_PWM_USE_TIM4 FALSE
267#define STM32_PWM_USE_TIM5 FALSE
268#define STM32_PWM_USE_TIM8 FALSE
269#define STM32_PWM_USE_TIM15 FALSE
270#define STM32_PWM_USE_TIM16 FALSE
271#define STM32_PWM_USE_TIM17 FALSE
272#define STM32_PWM_USE_TIM20 FALSE
273
274/*
275 * RTC driver system settings.
276 */
277
278/*
279 * SDC driver system settings.
280 */
281
282/*
283 * SERIAL driver system settings.
284 */
285#define STM32_SERIAL_USE_USART1 FALSE
286#define STM32_SERIAL_USE_USART2 FALSE
287#define STM32_SERIAL_USE_USART3 FALSE
288#define STM32_SERIAL_USE_UART4 FALSE
289#define STM32_SERIAL_USE_UART5 FALSE
290#define STM32_SERIAL_USE_LPUART1 FALSE
291
292/*
293 * SPI driver system settings.
294 */
295#define STM32_SPI_USE_SPI1 FALSE
296#define STM32_SPI_USE_SPI2 FALSE
297#define STM32_SPI_USE_SPI3 FALSE
298#define STM32_SPI_USE_SPI4 FALSE
299#define STM32_SPI_SPI1_RX_DMA_STREAM STM32_DMA_STREAM_ID_ANY
300#define STM32_SPI_SPI1_TX_DMA_STREAM STM32_DMA_STREAM_ID_ANY
301#define STM32_SPI_SPI2_RX_DMA_STREAM STM32_DMA_STREAM_ID_ANY
302#define STM32_SPI_SPI2_TX_DMA_STREAM STM32_DMA_STREAM_ID_ANY
303#define STM32_SPI_SPI3_RX_DMA_STREAM STM32_DMA_STREAM_ID_ANY
304#define STM32_SPI_SPI3_TX_DMA_STREAM STM32_DMA_STREAM_ID_ANY
305#define STM32_SPI_SPI4_RX_DMA_STREAM STM32_DMA_STREAM_ID_ANY
306#define STM32_SPI_SPI4_TX_DMA_STREAM STM32_DMA_STREAM_ID_ANY
307#define STM32_SPI_SPI1_DMA_PRIORITY 1
308#define STM32_SPI_SPI2_DMA_PRIORITY 1
309#define STM32_SPI_SPI3_DMA_PRIORITY 1
310#define STM32_SPI_SPI4_DMA_PRIORITY 1
311#define STM32_SPI_SPI1_IRQ_PRIORITY 10
312#define STM32_SPI_SPI2_IRQ_PRIORITY 10
313#define STM32_SPI_SPI3_IRQ_PRIORITY 10
314#define STM32_SPI_SPI4_IRQ_PRIORITY 10
315#define STM32_SPI_DMA_ERROR_HOOK(spip) osalSysHalt("DMA failure")
316
317/*
318 * ST driver system settings.
319 */
320#define STM32_ST_IRQ_PRIORITY 8
321#define STM32_ST_USE_TIMER 2
322
323/*
324 * TRNG driver system settings.
325 */
326#define STM32_TRNG_USE_RNG1 FALSE
327
328/*
329 * UART driver system settings.
330 */
331#define STM32_UART_USE_USART1 FALSE
332#define STM32_UART_USE_USART2 FALSE
333#define STM32_UART_USE_USART3 FALSE
334#define STM32_UART_USE_UART4 FALSE
335#define STM32_UART_USE_UART5 FALSE
336#define STM32_UART_USART1_RX_DMA_STREAM STM32_DMA_STREAM_ID_ANY
337#define STM32_UART_USART1_TX_DMA_STREAM STM32_DMA_STREAM_ID_ANY
338#define STM32_UART_USART2_RX_DMA_STREAM STM32_DMA_STREAM_ID_ANY
339#define STM32_UART_USART2_TX_DMA_STREAM STM32_DMA_STREAM_ID_ANY
340#define STM32_UART_USART3_RX_DMA_STREAM STM32_DMA_STREAM_ID_ANY
341#define STM32_UART_USART3_TX_DMA_STREAM STM32_DMA_STREAM_ID_ANY
342#define STM32_UART_UART4_RX_DMA_STREAM STM32_DMA_STREAM_ID_ANY
343#define STM32_UART_UART4_TX_DMA_STREAM STM32_DMA_STREAM_ID_ANY
344#define STM32_UART_UART5_RX_DMA_STREAM STM32_DMA_STREAM_ID_ANY
345#define STM32_UART_UART5_TX_DMA_STREAM STM32_DMA_STREAM_ID_ANY
346#define STM32_UART_USART1_DMA_PRIORITY 0
347#define STM32_UART_USART2_DMA_PRIORITY 0
348#define STM32_UART_USART3_DMA_PRIORITY 0
349#define STM32_UART_UART4_DMA_PRIORITY 0
350#define STM32_UART_UART5_DMA_PRIORITY 0
351#define STM32_UART_DMA_ERROR_HOOK(uartp) osalSysHalt("DMA failure")
352
353/*
354 * USB driver system settings.
355 */
356#define STM32_USB_USE_USB1 TRUE
357#define STM32_USB_LOW_POWER_ON_SUSPEND FALSE
358#define STM32_USB_USB1_HP_IRQ_PRIORITY 5
359#define STM32_USB_USB1_LP_IRQ_PRIORITY 5
360
361/*
362 * WDG driver system settings.
363 */
364#define STM32_WDG_USE_IWDG FALSE
365
366/*
367 * WSPI driver system settings.
368 */
369#define STM32_WSPI_USE_QUADSPI1 FALSE
370#define STM32_WSPI_QUADSPI1_DMA_STREAM STM32_DMA_STREAM_ID(2, 7)
371
372#endif /* MCUCONF_H */
diff --git a/platforms/chibios/QMK_PROTON_C/board/board.mk b/platforms/chibios/QMK_PROTON_C/board/board.mk
new file mode 100644
index 000000000..f891e6524
--- /dev/null
+++ b/platforms/chibios/QMK_PROTON_C/board/board.mk
@@ -0,0 +1,9 @@
1# List of all the board related files.
2BOARDSRC = $(CHIBIOS)/os/hal/boards/ST_STM32F3_DISCOVERY/board.c
3
4# Required include directories
5BOARDINC = $(CHIBIOS)/os/hal/boards/ST_STM32F3_DISCOVERY
6
7# Shared variables
8ALLCSRC += $(BOARDSRC)
9ALLINC += $(BOARDINC)
diff --git a/platforms/chibios/QMK_PROTON_C/configs/board.h b/platforms/chibios/QMK_PROTON_C/configs/board.h
new file mode 100644
index 000000000..97159964d
--- /dev/null
+++ b/platforms/chibios/QMK_PROTON_C/configs/board.h
@@ -0,0 +1,37 @@
1/* Copyright 2020 Nick Brassel (tzarc)
2 *
3 * This program is free software: you can redistribute it and/or modify
4 * it under the terms of the GNU General Public License as published by
5 * the Free Software Foundation, either version 3 of the License, or
6 * (at your option) any later version.
7 *
8 * This program is distributed in the hope that it will be useful,
9 * but WITHOUT ANY WARRANTY; without even the implied warranty of
10 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
11 * GNU General Public License for more details.
12 *
13 * You should have received a copy of the GNU General Public License
14 * along with this program. If not, see <https://www.gnu.org/licenses/>.
15 */
16#pragma once
17
18#include_next "board.h"
19
20#undef STM32_HSE_BYPASS
21
22/*
23 * USB bus activation macro, required by the USB driver.
24 */
25#define usb_lld_connect_bus(usbp) \
26 do { \
27 palSetPadMode(GPIOA, GPIOA_USB_DP, PAL_MODE_ALTERNATE(14)); \
28 } while (0)
29
30/*
31 * USB bus de-activation macro, required by the USB driver.
32 */
33#define usb_lld_disconnect_bus(usbp) \
34 do { \
35 palSetPadMode(GPIOA, GPIOA_USB_DP, PAL_MODE_OUTPUT_PUSHPULL); \
36 palClearPad(GPIOA, GPIOA_USB_DP); \
37 } while (0)
diff --git a/platforms/chibios/QMK_PROTON_C/configs/bootloader_defs.h b/platforms/chibios/QMK_PROTON_C/configs/bootloader_defs.h
new file mode 100644
index 000000000..3b0e9d20a
--- /dev/null
+++ b/platforms/chibios/QMK_PROTON_C/configs/bootloader_defs.h
@@ -0,0 +1,7 @@
1/* Address for jumping to bootloader on STM32 chips. */
2/* It is chip dependent, the correct number can be looked up here:
3 * http://www.st.com/web/en/resource/technical/document/application_note/CD00167594.pdf
4 * This also requires a patch to chibios:
5 * <tmk_dir>/tmk_core/tool/chibios/ch-bootloader-jump.patch
6 */
7#define STM32_BOOTLOADER_ADDRESS 0x1FFFD800
diff --git a/platforms/chibios/BLACKPILL_STM32_F401/configs/chconf.h b/platforms/chibios/QMK_PROTON_C/configs/chconf.h
index 7dc4f84a8..a1cbf6808 100644
--- a/platforms/chibios/BLACKPILL_STM32_F401/configs/chconf.h
+++ b/platforms/chibios/QMK_PROTON_C/configs/chconf.h
@@ -29,7 +29,7 @@
29#define CHCONF_H 29#define CHCONF_H
30 30
31#define _CHIBIOS_RT_CONF_ 31#define _CHIBIOS_RT_CONF_
32#define _CHIBIOS_RT_CONF_VER_6_0_ 32#define _CHIBIOS_RT_CONF_VER_6_1_
33 33
34/*===========================================================================*/ 34/*===========================================================================*/
35/** 35/**
@@ -52,7 +52,7 @@
52 * setting also defines the system tick time unit. 52 * setting also defines the system tick time unit.
53 */ 53 */
54#if !defined(CH_CFG_ST_FREQUENCY) 54#if !defined(CH_CFG_ST_FREQUENCY)
55#define CH_CFG_ST_FREQUENCY 10000 55#define CH_CFG_ST_FREQUENCY 100000
56#endif 56#endif
57 57
58/** 58/**
@@ -109,21 +109,6 @@
109#endif 109#endif
110 110
111/** 111/**
112 * @brief Managed RAM size.
113 * @details Size of the RAM area to be managed by the OS. If set to zero
114 * then the whole available RAM is used. The core memory is made
115 * available to the heap allocator and/or can be used directly through
116 * the simplified core memory allocator.
117 *
118 * @note In order to let the OS manage the whole RAM the linker script must
119 * provide the @p __heap_base__ and @p __heap_end__ symbols.
120 * @note Requires @p CH_CFG_USE_MEMCORE.
121 */
122#if !defined(CH_CFG_MEMCORE_SIZE)
123#define CH_CFG_MEMCORE_SIZE 0
124#endif
125
126/**
127 * @brief Idle thread automatic spawn suppression. 112 * @brief Idle thread automatic spawn suppression.
128 * @details When this option is activated the function @p chSysInit() 113 * @details When this option is activated the function @p chSysInit()
129 * does not spawn the idle thread. The application @p main() 114 * does not spawn the idle thread. The application @p main()
@@ -308,9 +293,31 @@
308 * @note Requires @p CH_CFG_USE_MESSAGES. 293 * @note Requires @p CH_CFG_USE_MESSAGES.
309 */ 294 */
310#if !defined(CH_CFG_USE_MESSAGES_PRIORITY) 295#if !defined(CH_CFG_USE_MESSAGES_PRIORITY)
311#define CH_CFG_USE_MESSAGES_PRIORITY FALSE 296#define CH_CFG_USE_MESSAGES_PRIORITY TRUE
297#endif
298
299/**
300 * @brief Dynamic Threads APIs.
301 * @details If enabled then the dynamic threads creation APIs are included
302 * in the kernel.
303 *
304 * @note The default is @p TRUE.
305 * @note Requires @p CH_CFG_USE_WAITEXIT.
306 * @note Requires @p CH_CFG_USE_HEAP and/or @p CH_CFG_USE_MEMPOOLS.
307 */
308#if !defined(CH_CFG_USE_DYNAMIC)
309#define CH_CFG_USE_DYNAMIC TRUE
312#endif 310#endif
313 311
312/** @} */
313
314/*===========================================================================*/
315/**
316 * @name OSLIB options
317 * @{
318 */
319/*===========================================================================*/
320
314/** 321/**
315 * @brief Mailboxes APIs. 322 * @brief Mailboxes APIs.
316 * @details If enabled then the asynchronous messages (mailboxes) APIs are 323 * @details If enabled then the asynchronous messages (mailboxes) APIs are
@@ -335,6 +342,21 @@
335#endif 342#endif
336 343
337/** 344/**
345 * @brief Managed RAM size.
346 * @details Size of the RAM area to be managed by the OS. If set to zero
347 * then the whole available RAM is used. The core memory is made
348 * available to the heap allocator and/or can be used directly through
349 * the simplified core memory allocator.
350 *
351 * @note In order to let the OS manage the whole RAM the linker script must
352 * provide the @p __heap_base__ and @p __heap_end__ symbols.
353 * @note Requires @p CH_CFG_USE_MEMCORE.
354 */
355#if !defined(CH_CFG_MEMCORE_SIZE)
356#define CH_CFG_MEMCORE_SIZE 0
357#endif
358
359/**
338 * @brief Heap Allocator APIs. 360 * @brief Heap Allocator APIs.
339 * @details If enabled then the memory heap allocator APIs are included 361 * @details If enabled then the memory heap allocator APIs are included
340 * in the kernel. 362 * in the kernel.
@@ -382,16 +404,36 @@
382#endif 404#endif
383 405
384/** 406/**
385 * @brief Dynamic Threads APIs. 407 * @brief Objects Caches APIs.
386 * @details If enabled then the dynamic threads creation APIs are included 408 * @details If enabled then the objects caches APIs are included
387 * in the kernel. 409 * in the kernel.
388 * 410 *
389 * @note The default is @p TRUE. 411 * @note The default is @p TRUE.
390 * @note Requires @p CH_CFG_USE_WAITEXIT.
391 * @note Requires @p CH_CFG_USE_HEAP and/or @p CH_CFG_USE_MEMPOOLS.
392 */ 412 */
393#if !defined(CH_CFG_USE_DYNAMIC) 413#if !defined(CH_CFG_USE_OBJ_CACHES)
394#define CH_CFG_USE_DYNAMIC TRUE 414#define CH_CFG_USE_OBJ_CACHES FALSE
415#endif
416
417/**
418 * @brief Delegate threads APIs.
419 * @details If enabled then the delegate threads APIs are included
420 * in the kernel.
421 *
422 * @note The default is @p TRUE.
423 */
424#if !defined(CH_CFG_USE_DELEGATES)
425#define CH_CFG_USE_DELEGATES FALSE
426#endif
427
428/**
429 * @brief Jobs Queues APIs.
430 * @details If enabled then the jobs queues APIs are included
431 * in the kernel.
432 *
433 * @note The default is @p TRUE.
434 */
435#if !defined(CH_CFG_USE_JOBS)
436#define CH_CFG_USE_JOBS FALSE
395#endif 437#endif
396 438
397/** @} */ 439/** @} */
@@ -411,7 +453,7 @@
411 * @note The default is @p FALSE. 453 * @note The default is @p FALSE.
412 */ 454 */
413#if !defined(CH_CFG_USE_FACTORY) 455#if !defined(CH_CFG_USE_FACTORY)
414#define CH_CFG_USE_FACTORY TRUE 456#define CH_CFG_USE_FACTORY FALSE
415#endif 457#endif
416 458
417/** 459/**
@@ -547,7 +589,7 @@
547 * @p panic_msg variable set to @p NULL. 589 * @p panic_msg variable set to @p NULL.
548 */ 590 */
549#if !defined(CH_DBG_ENABLE_STACK_CHECK) 591#if !defined(CH_DBG_ENABLE_STACK_CHECK)
550#define CH_DBG_ENABLE_STACK_CHECK FALSE 592#define CH_DBG_ENABLE_STACK_CHECK TRUE
551#endif 593#endif
552 594
553/** 595/**
diff --git a/platforms/chibios/QMK_PROTON_C/configs/config.h b/platforms/chibios/QMK_PROTON_C/configs/config.h
new file mode 100644
index 000000000..a73f0c0b4
--- /dev/null
+++ b/platforms/chibios/QMK_PROTON_C/configs/config.h
@@ -0,0 +1,20 @@
1/* Copyright 2020 Nick Brassel (tzarc)
2 *
3 * This program is free software: you can redistribute it and/or modify
4 * it under the terms of the GNU General Public License as published by
5 * the Free Software Foundation, either version 3 of the License, or
6 * (at your option) any later version.
7 *
8 * This program is distributed in the hope that it will be useful,
9 * but WITHOUT ANY WARRANTY; without even the implied warranty of
10 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
11 * GNU General Public License for more details.
12 *
13 * You should have received a copy of the GNU General Public License
14 * along with this program. If not, see <https://www.gnu.org/licenses/>.
15 */
16#pragma once
17
18#ifndef EARLY_INIT_PERFORM_BOOTLOADER_JUMP
19# define EARLY_INIT_PERFORM_BOOTLOADER_JUMP TRUE
20#endif
diff --git a/platforms/chibios/BLACKPILL_STM32_F401/configs/halconf.h b/platforms/chibios/QMK_PROTON_C/configs/halconf.h
index a8db392aa..41fbac29e 100644
--- a/platforms/chibios/BLACKPILL_STM32_F401/configs/halconf.h
+++ b/platforms/chibios/QMK_PROTON_C/configs/halconf.h
@@ -29,9 +29,9 @@
29#define HALCONF_H 29#define HALCONF_H
30 30
31#define _CHIBIOS_HAL_CONF_ 31#define _CHIBIOS_HAL_CONF_
32#define _CHIBIOS_HAL_CONF_VER_7_0_ 32#define _CHIBIOS_HAL_CONF_VER_7_1_
33 33
34#include "mcuconf.h" 34#include <mcuconf.h>
35 35
36/** 36/**
37 * @brief Enables the PAL subsystem. 37 * @brief Enables the PAL subsystem.
@@ -65,21 +65,28 @@
65 * @brief Enables the DAC subsystem. 65 * @brief Enables the DAC subsystem.
66 */ 66 */
67#if !defined(HAL_USE_DAC) || defined(__DOXYGEN__) 67#if !defined(HAL_USE_DAC) || defined(__DOXYGEN__)
68#define HAL_USE_DAC FALSE 68#define HAL_USE_DAC TRUE
69#endif
70
71/**
72 * @brief Enables the EFlash subsystem.
73 */
74#if !defined(HAL_USE_EFL) || defined(__DOXYGEN__)
75#define HAL_USE_EFL FALSE
69#endif 76#endif
70 77
71/** 78/**
72 * @brief Enables the GPT subsystem. 79 * @brief Enables the GPT subsystem.
73 */ 80 */
74#if !defined(HAL_USE_GPT) || defined(__DOXYGEN__) 81#if !defined(HAL_USE_GPT) || defined(__DOXYGEN__)
75#define HAL_USE_GPT FALSE 82#define HAL_USE_GPT TRUE
76#endif 83#endif
77 84
78/** 85/**
79 * @brief Enables the I2C subsystem. 86 * @brief Enables the I2C subsystem.
80 */ 87 */
81#if !defined(HAL_USE_I2C) || defined(__DOXYGEN__) 88#if !defined(HAL_USE_I2C) || defined(__DOXYGEN__)
82#define HAL_USE_I2C FALSE 89#define HAL_USE_I2C TRUE
83#endif 90#endif
84 91
85/** 92/**
@@ -114,7 +121,7 @@
114 * @brief Enables the PWM subsystem. 121 * @brief Enables the PWM subsystem.
115 */ 122 */
116#if !defined(HAL_USE_PWM) || defined(__DOXYGEN__) 123#if !defined(HAL_USE_PWM) || defined(__DOXYGEN__)
117#define HAL_USE_PWM FALSE 124#define HAL_USE_PWM TRUE
118#endif 125#endif
119 126
120/** 127/**
@@ -142,7 +149,7 @@
142 * @brief Enables the SERIAL over USB subsystem. 149 * @brief Enables the SERIAL over USB subsystem.
143 */ 150 */
144#if !defined(HAL_USE_SERIAL_USB) || defined(__DOXYGEN__) 151#if !defined(HAL_USE_SERIAL_USB) || defined(__DOXYGEN__)
145#define HAL_USE_SERIAL_USB FALSE 152#define HAL_USE_SERIAL_USB TRUE
146#endif 153#endif
147 154
148/** 155/**
@@ -156,7 +163,7 @@
156 * @brief Enables the SPI subsystem. 163 * @brief Enables the SPI subsystem.
157 */ 164 */
158#if !defined(HAL_USE_SPI) || defined(__DOXYGEN__) 165#if !defined(HAL_USE_SPI) || defined(__DOXYGEN__)
159#define HAL_USE_SPI FALSE 166#define HAL_USE_SPI TRUE
160#endif 167#endif
161 168
162/** 169/**
@@ -203,7 +210,7 @@
203 * @note Disabling this option saves both code and data space. 210 * @note Disabling this option saves both code and data space.
204 */ 211 */
205#if !defined(PAL_USE_CALLBACKS) || defined(__DOXYGEN__) 212#if !defined(PAL_USE_CALLBACKS) || defined(__DOXYGEN__)
206#define PAL_USE_CALLBACKS FALSE 213#define PAL_USE_CALLBACKS TRUE
207#endif 214#endif
208 215
209/** 216/**
@@ -211,7 +218,7 @@
211 * @note Disabling this option saves both code and data space. 218 * @note Disabling this option saves both code and data space.
212 */ 219 */
213#if !defined(PAL_USE_WAIT) || defined(__DOXYGEN__) 220#if !defined(PAL_USE_WAIT) || defined(__DOXYGEN__)
214#define PAL_USE_WAIT FALSE 221#define PAL_USE_WAIT TRUE
215#endif 222#endif
216 223
217/*===========================================================================*/ 224/*===========================================================================*/
@@ -420,7 +427,7 @@
420 * buffers. 427 * buffers.
421 */ 428 */
422#if !defined(SERIAL_USB_BUFFERS_SIZE) || defined(__DOXYGEN__) 429#if !defined(SERIAL_USB_BUFFERS_SIZE) || defined(__DOXYGEN__)
423#define SERIAL_USB_BUFFERS_SIZE 256 430#define SERIAL_USB_BUFFERS_SIZE 1
424#endif 431#endif
425 432
426/** 433/**
@@ -451,7 +458,6 @@
451#define SPI_USE_CIRCULAR FALSE 458#define SPI_USE_CIRCULAR FALSE
452#endif 459#endif
453 460
454
455/** 461/**
456 * @brief Enables the @p spiAcquireBus() and @p spiReleaseBus() APIs. 462 * @brief Enables the @p spiAcquireBus() and @p spiReleaseBus() APIs.
457 * @note Disabling this option saves both code and data space. 463 * @note Disabling this option saves both code and data space.
diff --git a/platforms/chibios/QMK_PROTON_C/configs/mcuconf.h b/platforms/chibios/QMK_PROTON_C/configs/mcuconf.h
new file mode 100644
index 000000000..4d7b586c0
--- /dev/null
+++ b/platforms/chibios/QMK_PROTON_C/configs/mcuconf.h
@@ -0,0 +1,273 @@
1/*
2 ChibiOS - Copyright (C) 2006..2018 Giovanni Di Sirio
3
4 Licensed under the Apache License, Version 2.0 (the "License");
5 you may not use this file except in compliance with the License.
6 You may obtain a copy of the License at
7
8 http://www.apache.org/licenses/LICENSE-2.0
9
10 Unless required by applicable law or agreed to in writing, software
11 distributed under the License is distributed on an "AS IS" BASIS,
12 WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
13 See the License for the specific language governing permissions and
14 limitations under the License.
15*/
16
17#ifndef MCUCONF_H
18#define MCUCONF_H
19
20/*
21 * STM32F3xx drivers configuration.
22 * The following settings override the default settings present in
23 * the various device driver implementation headers.
24 * Note that the settings for each driver only have effect if the whole
25 * driver is enabled in halconf.h.
26 *
27 * IRQ priorities:
28 * 15...0 Lowest...Highest.
29 *
30 * DMA priorities:
31 * 0...3 Lowest...Highest.
32 */
33
34#define STM32F3xx_MCUCONF
35#define STM32F303_MCUCONF
36
37/*
38 * HAL driver system settings.
39 */
40#define STM32_NO_INIT FALSE
41#define STM32_PVD_ENABLE FALSE
42#define STM32_PLS STM32_PLS_LEV0
43#define STM32_HSI_ENABLED TRUE
44#define STM32_LSI_ENABLED TRUE
45#define STM32_HSE_ENABLED TRUE
46#define STM32_LSE_ENABLED FALSE
47#define STM32_SW STM32_SW_PLL
48#define STM32_PLLSRC STM32_PLLSRC_HSE
49#define STM32_PREDIV_VALUE 1
50#define STM32_PLLMUL_VALUE 9
51#define STM32_HPRE STM32_HPRE_DIV1
52#define STM32_PPRE1 STM32_PPRE1_DIV2
53#define STM32_PPRE2 STM32_PPRE2_DIV2
54#define STM32_MCOSEL STM32_MCOSEL_NOCLOCK
55#define STM32_ADC12PRES STM32_ADC12PRES_DIV1
56#define STM32_ADC34PRES STM32_ADC34PRES_DIV1
57#define STM32_USART1SW STM32_USART1SW_PCLK
58#define STM32_USART2SW STM32_USART2SW_PCLK
59#define STM32_USART3SW STM32_USART3SW_PCLK
60#define STM32_UART4SW STM32_UART4SW_PCLK
61#define STM32_UART5SW STM32_UART5SW_PCLK
62#define STM32_I2C1SW STM32_I2C1SW_SYSCLK
63#define STM32_I2C2SW STM32_I2C2SW_SYSCLK
64#define STM32_TIM1SW STM32_TIM1SW_PCLK2
65#define STM32_TIM8SW STM32_TIM8SW_PCLK2
66#define STM32_RTCSEL STM32_RTCSEL_LSI
67#define STM32_USB_CLOCK_REQUIRED TRUE
68#define STM32_USBPRE STM32_USBPRE_DIV1P5
69
70/*
71 * IRQ system settings.
72 */
73#define STM32_IRQ_EXTI0_PRIORITY 6
74#define STM32_IRQ_EXTI1_PRIORITY 6
75#define STM32_IRQ_EXTI2_PRIORITY 6
76#define STM32_IRQ_EXTI3_PRIORITY 6
77#define STM32_IRQ_EXTI4_PRIORITY 6
78#define STM32_IRQ_EXTI5_9_PRIORITY 6
79#define STM32_IRQ_EXTI10_15_PRIORITY 6
80#define STM32_IRQ_EXTI16_PRIORITY 6
81#define STM32_IRQ_EXTI17_PRIORITY 15
82#define STM32_IRQ_EXTI18_PRIORITY 6
83#define STM32_IRQ_EXTI19_PRIORITY 15
84#define STM32_IRQ_EXTI20_PRIORITY 15
85#define STM32_IRQ_EXTI21_22_29_PRIORITY 6
86#define STM32_IRQ_EXTI30_32_PRIORITY 6
87#define STM32_IRQ_EXTI33_PRIORITY 6
88#define STM32_IRQ_TIM1_BRK_TIM15_PRIORITY 7
89#define STM32_IRQ_TIM1_UP_TIM16_PRIORITY 7
90#define STM32_IRQ_TIM1_TRGCO_TIM17_PRIORITY 7
91#define STM32_IRQ_TIM1_CC_PRIORITY 7
92
93/*
94 * ADC driver system settings.
95 */
96#define STM32_ADC_DUAL_MODE FALSE
97#define STM32_ADC_COMPACT_SAMPLES FALSE
98#define STM32_ADC_USE_ADC1 FALSE
99#define STM32_ADC_USE_ADC2 FALSE
100#define STM32_ADC_USE_ADC3 FALSE
101#define STM32_ADC_USE_ADC4 FALSE
102#define STM32_ADC_ADC1_DMA_STREAM STM32_DMA_STREAM_ID(1, 1)
103#define STM32_ADC_ADC2_DMA_STREAM STM32_DMA_STREAM_ID(2, 1)
104#define STM32_ADC_ADC3_DMA_STREAM STM32_DMA_STREAM_ID(2, 5)
105#define STM32_ADC_ADC4_DMA_STREAM STM32_DMA_STREAM_ID(2, 2)
106#define STM32_ADC_ADC1_DMA_PRIORITY 2
107#define STM32_ADC_ADC2_DMA_PRIORITY 2
108#define STM32_ADC_ADC3_DMA_PRIORITY 2
109#define STM32_ADC_ADC4_DMA_PRIORITY 2
110#define STM32_ADC_ADC12_IRQ_PRIORITY 5
111#define STM32_ADC_ADC3_IRQ_PRIORITY 5
112#define STM32_ADC_ADC4_IRQ_PRIORITY 5
113#define STM32_ADC_ADC1_DMA_IRQ_PRIORITY 5
114#define STM32_ADC_ADC2_DMA_IRQ_PRIORITY 5
115#define STM32_ADC_ADC3_DMA_IRQ_PRIORITY 5
116#define STM32_ADC_ADC4_DMA_IRQ_PRIORITY 5
117#define STM32_ADC_ADC12_CLOCK_MODE ADC_CCR_CKMODE_AHB_DIV1
118#define STM32_ADC_ADC34_CLOCK_MODE ADC_CCR_CKMODE_AHB_DIV1
119
120/*
121 * CAN driver system settings.
122 */
123#define STM32_CAN_USE_CAN1 FALSE
124#define STM32_CAN_CAN1_IRQ_PRIORITY 11
125
126/*
127 * DAC driver system settings.
128 */
129#define STM32_DAC_DUAL_MODE FALSE
130#define STM32_DAC_USE_DAC1_CH1 TRUE
131#define STM32_DAC_USE_DAC1_CH2 TRUE
132#define STM32_DAC_DAC1_CH1_IRQ_PRIORITY 10
133#define STM32_DAC_DAC1_CH2_IRQ_PRIORITY 10
134#define STM32_DAC_DAC1_CH1_DMA_PRIORITY 2
135#define STM32_DAC_DAC1_CH2_DMA_PRIORITY 2
136
137/*
138 * GPT driver system settings.
139 */
140#define STM32_GPT_USE_TIM1 FALSE
141#define STM32_GPT_USE_TIM2 FALSE
142#define STM32_GPT_USE_TIM3 FALSE
143#define STM32_GPT_USE_TIM4 FALSE
144#define STM32_GPT_USE_TIM6 TRUE
145#define STM32_GPT_USE_TIM7 TRUE
146#define STM32_GPT_USE_TIM8 TRUE
147#define STM32_GPT_USE_TIM15 TRUE
148#define STM32_GPT_USE_TIM16 FALSE
149#define STM32_GPT_USE_TIM17 FALSE
150#define STM32_GPT_TIM1_IRQ_PRIORITY 7
151#define STM32_GPT_TIM2_IRQ_PRIORITY 7
152#define STM32_GPT_TIM3_IRQ_PRIORITY 7
153#define STM32_GPT_TIM4_IRQ_PRIORITY 7
154#define STM32_GPT_TIM6_IRQ_PRIORITY 7
155#define STM32_GPT_TIM7_IRQ_PRIORITY 7
156#define STM32_GPT_TIM8_IRQ_PRIORITY 7
157
158/*
159 * I2C driver system settings.
160 */
161#define STM32_I2C_USE_I2C1 TRUE
162#define STM32_I2C_USE_I2C2 FALSE
163#define STM32_I2C_BUSY_TIMEOUT 50
164#define STM32_I2C_I2C1_IRQ_PRIORITY 10
165#define STM32_I2C_I2C2_IRQ_PRIORITY 10
166#define STM32_I2C_USE_DMA TRUE
167#define STM32_I2C_I2C1_DMA_PRIORITY 1
168#define STM32_I2C_I2C2_DMA_PRIORITY 1
169#define STM32_I2C_DMA_ERROR_HOOK(i2cp) osalSysHalt("DMA failure")
170
171/*
172 * ICU driver system settings.
173 */
174#define STM32_ICU_USE_TIM1 FALSE
175#define STM32_ICU_USE_TIM2 FALSE
176#define STM32_ICU_USE_TIM3 FALSE
177#define STM32_ICU_USE_TIM4 FALSE
178#define STM32_ICU_USE_TIM8 FALSE
179#define STM32_ICU_USE_TIM15 FALSE
180#define STM32_ICU_TIM1_IRQ_PRIORITY 7
181#define STM32_ICU_TIM2_IRQ_PRIORITY 7
182#define STM32_ICU_TIM3_IRQ_PRIORITY 7
183#define STM32_ICU_TIM4_IRQ_PRIORITY 7
184#define STM32_ICU_TIM8_IRQ_PRIORITY 7
185
186/*
187 * PWM driver system settings.
188 */
189#define STM32_PWM_USE_ADVANCED FALSE
190#define STM32_PWM_USE_TIM1 FALSE
191#define STM32_PWM_USE_TIM2 FALSE
192#define STM32_PWM_USE_TIM3 TRUE
193#define STM32_PWM_USE_TIM4 TRUE
194#define STM32_PWM_USE_TIM8 FALSE
195#define STM32_PWM_USE_TIM15 FALSE
196#define STM32_PWM_USE_TIM16 FALSE
197#define STM32_PWM_USE_TIM17 FALSE
198#define STM32_PWM_TIM1_IRQ_PRIORITY 7
199#define STM32_PWM_TIM2_IRQ_PRIORITY 7
200#define STM32_PWM_TIM3_IRQ_PRIORITY 7
201#define STM32_PWM_TIM4_IRQ_PRIORITY 7
202#define STM32_PWM_TIM8_IRQ_PRIORITY 7
203
204/*
205 * RTC driver system settings.
206 */
207#define STM32_RTC_PRESA_VALUE 32
208#define STM32_RTC_PRESS_VALUE 1024
209#define STM32_RTC_CR_INIT 0
210#define STM32_RTC_TAMPCR_INIT 0
211
212/*
213 * SERIAL driver system settings.
214 */
215#define STM32_SERIAL_USE_USART1 TRUE
216#define STM32_SERIAL_USE_USART2 FALSE
217#define STM32_SERIAL_USE_USART3 FALSE
218#define STM32_SERIAL_USE_UART4 FALSE
219#define STM32_SERIAL_USE_UART5 FALSE
220#define STM32_SERIAL_USART1_PRIORITY 12
221#define STM32_SERIAL_USART2_PRIORITY 12
222#define STM32_SERIAL_USART3_PRIORITY 12
223#define STM32_SERIAL_UART4_PRIORITY 12
224#define STM32_SERIAL_UART5_PRIORITY 12
225
226/*
227 * SPI driver system settings.
228 */
229#define STM32_SPI_USE_SPI1 FALSE
230#define STM32_SPI_USE_SPI2 TRUE
231#define STM32_SPI_USE_SPI3 FALSE
232#define STM32_SPI_SPI1_DMA_PRIORITY 1
233#define STM32_SPI_SPI2_DMA_PRIORITY 1
234#define STM32_SPI_SPI3_DMA_PRIORITY 1
235#define STM32_SPI_SPI1_IRQ_PRIORITY 10
236#define STM32_SPI_SPI2_IRQ_PRIORITY 10
237#define STM32_SPI_SPI3_IRQ_PRIORITY 10
238#define STM32_SPI_DMA_ERROR_HOOK(spip) osalSysHalt("DMA failure")
239
240/*
241 * ST driver system settings.
242 */
243#define STM32_ST_IRQ_PRIORITY 8
244#define STM32_ST_USE_TIMER 2
245
246/*
247 * UART driver system settings.
248 */
249#define STM32_UART_USE_USART1 FALSE
250#define STM32_UART_USE_USART2 FALSE
251#define STM32_UART_USE_USART3 FALSE
252#define STM32_UART_USART1_IRQ_PRIORITY 12
253#define STM32_UART_USART2_IRQ_PRIORITY 12
254#define STM32_UART_USART3_IRQ_PRIORITY 12
255#define STM32_UART_USART1_DMA_PRIORITY 0
256#define STM32_UART_USART2_DMA_PRIORITY 0
257#define STM32_UART_USART3_DMA_PRIORITY 0
258#define STM32_UART_DMA_ERROR_HOOK(uartp) osalSysHalt("DMA failure")
259
260/*
261 * USB driver system settings.
262 */
263#define STM32_USB_USE_USB1 TRUE
264#define STM32_USB_LOW_POWER_ON_SUSPEND FALSE
265#define STM32_USB_USB1_HP_IRQ_PRIORITY 13
266#define STM32_USB_USB1_LP_IRQ_PRIORITY 14
267
268/*
269 * WDG driver system settings.
270 */
271#define STM32_WDG_USE_IWDG FALSE
272
273#endif /* MCUCONF_H */
diff --git a/platforms/chibios/GENERIC_STM32_F303XC/configs/proton_c.mk b/platforms/chibios/QMK_PROTON_C/convert_to_proton_c.mk
index 23907c810..3fa73a96e 100644
--- a/platforms/chibios/GENERIC_STM32_F303XC/configs/proton_c.mk
+++ b/platforms/chibios/QMK_PROTON_C/convert_to_proton_c.mk
@@ -1,9 +1,12 @@
1# Proton C MCU settings for converting AVR projects 1# Proton C MCU settings for converting AVR projects
2MCU = STM32F303 2TARGET := $(TARGET)_proton_c
3MCU := STM32F303
4BOARD := QMK_PROTON_C
5OPT_DEFS += -DCONVERT_TO_PROTON_C
3 6
4# These are defaults based on what has been implemented for ARM boards 7# These are defaults based on what has been implemented for ARM boards
5AUDIO_ENABLE = yes 8AUDIO_ENABLE = yes
6WS2812_DRIVER = bitbang 9WS2812_DRIVER = bitbang
7 10
8# Force task driven PWM until ARM can provide automatic configuration 11# Force task driven PWM until ARM can provide automatic configuration
9BACKLIGHT_DRIVER = software 12BACKLIGHT_DRIVER = software \ No newline at end of file
diff --git a/platforms/chibios/common/configs/chconf.h b/platforms/chibios/common/configs/chconf.h
index aac330370..44327a82d 100644
--- a/platforms/chibios/common/configs/chconf.h
+++ b/platforms/chibios/common/configs/chconf.h
@@ -29,7 +29,7 @@
29#define CHCONF_H 29#define CHCONF_H
30 30
31#define _CHIBIOS_RT_CONF_ 31#define _CHIBIOS_RT_CONF_
32#define _CHIBIOS_RT_CONF_VER_6_0_ 32#define _CHIBIOS_RT_CONF_VER_6_1_
33 33
34/*===========================================================================*/ 34/*===========================================================================*/
35/** 35/**
@@ -109,21 +109,6 @@
109#endif 109#endif
110 110
111/** 111/**
112 * @brief Managed RAM size.
113 * @details Size of the RAM area to be managed by the OS. If set to zero
114 * then the whole available RAM is used. The core memory is made
115 * available to the heap allocator and/or can be used directly through
116 * the simplified core memory allocator.
117 *
118 * @note In order to let the OS manage the whole RAM the linker script must
119 * provide the @p __heap_base__ and @p __heap_end__ symbols.
120 * @note Requires @p CH_CFG_USE_MEMCORE.
121 */
122#if !defined(CH_CFG_MEMCORE_SIZE)
123#define CH_CFG_MEMCORE_SIZE 0
124#endif
125
126/**
127 * @brief Idle thread automatic spawn suppression. 112 * @brief Idle thread automatic spawn suppression.
128 * @details When this option is activated the function @p chSysInit() 113 * @details When this option is activated the function @p chSysInit()
129 * does not spawn the idle thread. The application @p main() 114 * does not spawn the idle thread. The application @p main()
@@ -172,7 +157,7 @@
172 * @note The default is @p TRUE. 157 * @note The default is @p TRUE.
173 */ 158 */
174#if !defined(CH_CFG_USE_TM) 159#if !defined(CH_CFG_USE_TM)
175#define CH_CFG_USE_TM TRUE 160#define CH_CFG_USE_TM FALSE
176#endif 161#endif
177 162
178/** 163/**
@@ -182,7 +167,7 @@
182 * @note The default is @p TRUE. 167 * @note The default is @p TRUE.
183 */ 168 */
184#if !defined(CH_CFG_USE_REGISTRY) 169#if !defined(CH_CFG_USE_REGISTRY)
185#define CH_CFG_USE_REGISTRY TRUE 170#define CH_CFG_USE_REGISTRY FALSE
186#endif 171#endif
187 172
188/** 173/**
@@ -193,7 +178,7 @@
193 * @note The default is @p TRUE. 178 * @note The default is @p TRUE.
194 */ 179 */
195#if !defined(CH_CFG_USE_WAITEXIT) 180#if !defined(CH_CFG_USE_WAITEXIT)
196#define CH_CFG_USE_WAITEXIT TRUE 181#define CH_CFG_USE_WAITEXIT FALSE
197#endif 182#endif
198 183
199/** 184/**
@@ -250,7 +235,7 @@
250 * @note Requires @p CH_CFG_USE_MUTEXES. 235 * @note Requires @p CH_CFG_USE_MUTEXES.
251 */ 236 */
252#if !defined(CH_CFG_USE_CONDVARS) 237#if !defined(CH_CFG_USE_CONDVARS)
253#define CH_CFG_USE_CONDVARS TRUE 238#define CH_CFG_USE_CONDVARS FALSE
254#endif 239#endif
255 240
256/** 241/**
@@ -295,7 +280,7 @@
295 * @note The default is @p TRUE. 280 * @note The default is @p TRUE.
296 */ 281 */
297#if !defined(CH_CFG_USE_MESSAGES) 282#if !defined(CH_CFG_USE_MESSAGES)
298#define CH_CFG_USE_MESSAGES TRUE 283#define CH_CFG_USE_MESSAGES FALSE
299#endif 284#endif
300 285
301/** 286/**
@@ -308,10 +293,32 @@
308 * @note Requires @p CH_CFG_USE_MESSAGES. 293 * @note Requires @p CH_CFG_USE_MESSAGES.
309 */ 294 */
310#if !defined(CH_CFG_USE_MESSAGES_PRIORITY) 295#if !defined(CH_CFG_USE_MESSAGES_PRIORITY)
311#define CH_CFG_USE_MESSAGES_PRIORITY TRUE 296#define CH_CFG_USE_MESSAGES_PRIORITY FALSE
312#endif 297#endif
313 298
314/** 299/**
300 * @brief Dynamic Threads APIs.
301 * @details If enabled then the dynamic threads creation APIs are included
302 * in the kernel.
303 *
304 * @note The default is @p TRUE.
305 * @note Requires @p CH_CFG_USE_WAITEXIT.
306 * @note Requires @p CH_CFG_USE_HEAP and/or @p CH_CFG_USE_MEMPOOLS.
307 */
308#if !defined(CH_CFG_USE_DYNAMIC)
309#define CH_CFG_USE_DYNAMIC FALSE
310#endif
311
312/** @} */
313
314/*===========================================================================*/
315/**
316 * @name OSLIB options
317 * @{
318 */
319/*===========================================================================*/
320
321/**
315 * @brief Mailboxes APIs. 322 * @brief Mailboxes APIs.
316 * @details If enabled then the asynchronous messages (mailboxes) APIs are 323 * @details If enabled then the asynchronous messages (mailboxes) APIs are
317 * included in the kernel. 324 * included in the kernel.
@@ -320,7 +327,7 @@
320 * @note Requires @p CH_CFG_USE_SEMAPHORES. 327 * @note Requires @p CH_CFG_USE_SEMAPHORES.
321 */ 328 */
322#if !defined(CH_CFG_USE_MAILBOXES) 329#if !defined(CH_CFG_USE_MAILBOXES)
323#define CH_CFG_USE_MAILBOXES TRUE 330#define CH_CFG_USE_MAILBOXES FALSE
324#endif 331#endif
325 332
326/** 333/**
@@ -335,6 +342,21 @@
335#endif 342#endif
336 343
337/** 344/**
345 * @brief Managed RAM size.
346 * @details Size of the RAM area to be managed by the OS. If set to zero
347 * then the whole available RAM is used. The core memory is made
348 * available to the heap allocator and/or can be used directly through
349 * the simplified core memory allocator.
350 *
351 * @note In order to let the OS manage the whole RAM the linker script must
352 * provide the @p __heap_base__ and @p __heap_end__ symbols.
353 * @note Requires @p CH_CFG_USE_MEMCORE.
354 */
355#if !defined(CH_CFG_MEMCORE_SIZE)
356#define CH_CFG_MEMCORE_SIZE 0
357#endif
358
359/**
338 * @brief Heap Allocator APIs. 360 * @brief Heap Allocator APIs.
339 * @details If enabled then the memory heap allocator APIs are included 361 * @details If enabled then the memory heap allocator APIs are included
340 * in the kernel. 362 * in the kernel.
@@ -345,7 +367,7 @@
345 * @note Mutexes are recommended. 367 * @note Mutexes are recommended.
346 */ 368 */
347#if !defined(CH_CFG_USE_HEAP) 369#if !defined(CH_CFG_USE_HEAP)
348#define CH_CFG_USE_HEAP TRUE 370#define CH_CFG_USE_HEAP FALSE
349#endif 371#endif
350 372
351/** 373/**
@@ -356,7 +378,7 @@
356 * @note The default is @p TRUE. 378 * @note The default is @p TRUE.
357 */ 379 */
358#if !defined(CH_CFG_USE_MEMPOOLS) 380#if !defined(CH_CFG_USE_MEMPOOLS)
359#define CH_CFG_USE_MEMPOOLS TRUE 381#define CH_CFG_USE_MEMPOOLS FALSE
360#endif 382#endif
361 383
362/** 384/**
@@ -367,7 +389,7 @@
367 * @note The default is @p TRUE. 389 * @note The default is @p TRUE.
368 */ 390 */
369#if !defined(CH_CFG_USE_OBJ_FIFOS) 391#if !defined(CH_CFG_USE_OBJ_FIFOS)
370#define CH_CFG_USE_OBJ_FIFOS TRUE 392#define CH_CFG_USE_OBJ_FIFOS FALSE
371#endif 393#endif
372 394
373/** 395/**
@@ -378,20 +400,40 @@
378 * @note The default is @p TRUE. 400 * @note The default is @p TRUE.
379 */ 401 */
380#if !defined(CH_CFG_USE_PIPES) 402#if !defined(CH_CFG_USE_PIPES)
381#define CH_CFG_USE_PIPES TRUE 403#define CH_CFG_USE_PIPES FALSE
382#endif 404#endif
383 405
384/** 406/**
385 * @brief Dynamic Threads APIs. 407 * @brief Objects Caches APIs.
386 * @details If enabled then the dynamic threads creation APIs are included 408 * @details If enabled then the objects caches APIs are included
387 * in the kernel. 409 * in the kernel.
388 * 410 *
389 * @note The default is @p TRUE. 411 * @note The default is @p TRUE.
390 * @note Requires @p CH_CFG_USE_WAITEXIT.
391 * @note Requires @p CH_CFG_USE_HEAP and/or @p CH_CFG_USE_MEMPOOLS.
392 */ 412 */
393#if !defined(CH_CFG_USE_DYNAMIC) 413#if !defined(CH_CFG_USE_OBJ_CACHES)
394#define CH_CFG_USE_DYNAMIC TRUE 414#define CH_CFG_USE_OBJ_CACHES FALSE
415#endif
416
417/**
418 * @brief Delegate threads APIs.
419 * @details If enabled then the delegate threads APIs are included
420 * in the kernel.
421 *
422 * @note The default is @p TRUE.
423 */
424#if !defined(CH_CFG_USE_DELEGATES)
425#define CH_CFG_USE_DELEGATES FALSE
426#endif
427
428/**
429 * @brief Jobs Queues APIs.
430 * @details If enabled then the jobs queues APIs are included
431 * in the kernel.
432 *
433 * @note The default is @p TRUE.
434 */
435#if !defined(CH_CFG_USE_JOBS)
436#define CH_CFG_USE_JOBS FALSE
395#endif 437#endif
396 438
397/** @} */ 439/** @} */
@@ -411,7 +453,7 @@
411 * @note The default is @p FALSE. 453 * @note The default is @p FALSE.
412 */ 454 */
413#if !defined(CH_CFG_USE_FACTORY) 455#if !defined(CH_CFG_USE_FACTORY)
414#define CH_CFG_USE_FACTORY TRUE 456#define CH_CFG_USE_FACTORY FALSE
415#endif 457#endif
416 458
417/** 459/**
@@ -427,42 +469,42 @@
427 * @brief Enables the registry of generic objects. 469 * @brief Enables the registry of generic objects.
428 */ 470 */
429#if !defined(CH_CFG_FACTORY_OBJECTS_REGISTRY) 471#if !defined(CH_CFG_FACTORY_OBJECTS_REGISTRY)
430#define CH_CFG_FACTORY_OBJECTS_REGISTRY TRUE 472#define CH_CFG_FACTORY_OBJECTS_REGISTRY FALSE
431#endif 473#endif
432 474
433/** 475/**
434 * @brief Enables factory for generic buffers. 476 * @brief Enables factory for generic buffers.
435 */ 477 */
436#if !defined(CH_CFG_FACTORY_GENERIC_BUFFERS) 478#if !defined(CH_CFG_FACTORY_GENERIC_BUFFERS)
437#define CH_CFG_FACTORY_GENERIC_BUFFERS TRUE 479#define CH_CFG_FACTORY_GENERIC_BUFFERS FALSE
438#endif 480#endif
439 481
440/** 482/**
441 * @brief Enables factory for semaphores. 483 * @brief Enables factory for semaphores.
442 */ 484 */
443#if !defined(CH_CFG_FACTORY_SEMAPHORES) 485#if !defined(CH_CFG_FACTORY_SEMAPHORES)
444#define CH_CFG_FACTORY_SEMAPHORES TRUE 486#define CH_CFG_FACTORY_SEMAPHORES FALSE
445#endif 487#endif
446 488
447/** 489/**
448 * @brief Enables factory for mailboxes. 490 * @brief Enables factory for mailboxes.
449 */ 491 */
450#if !defined(CH_CFG_FACTORY_MAILBOXES) 492#if !defined(CH_CFG_FACTORY_MAILBOXES)
451#define CH_CFG_FACTORY_MAILBOXES TRUE 493#define CH_CFG_FACTORY_MAILBOXES FALSE
452#endif 494#endif
453 495
454/** 496/**
455 * @brief Enables factory for objects FIFOs. 497 * @brief Enables factory for objects FIFOs.
456 */ 498 */
457#if !defined(CH_CFG_FACTORY_OBJ_FIFOS) 499#if !defined(CH_CFG_FACTORY_OBJ_FIFOS)
458#define CH_CFG_FACTORY_OBJ_FIFOS TRUE 500#define CH_CFG_FACTORY_OBJ_FIFOS FALSE
459#endif 501#endif
460 502
461/** 503/**
462 * @brief Enables factory for Pipes. 504 * @brief Enables factory for Pipes.
463 */ 505 */
464#if !defined(CH_CFG_FACTORY_PIPES) || defined(__DOXYGEN__) 506#if !defined(CH_CFG_FACTORY_PIPES) || defined(__DOXYGEN__)
465#define CH_CFG_FACTORY_PIPES TRUE 507#define CH_CFG_FACTORY_PIPES FALSE
466#endif 508#endif
467 509
468/** @} */ 510/** @} */
@@ -547,7 +589,7 @@
547 * @p panic_msg variable set to @p NULL. 589 * @p panic_msg variable set to @p NULL.
548 */ 590 */
549#if !defined(CH_DBG_ENABLE_STACK_CHECK) 591#if !defined(CH_DBG_ENABLE_STACK_CHECK)
550#define CH_DBG_ENABLE_STACK_CHECK TRUE 592#define CH_DBG_ENABLE_STACK_CHECK FALSE
551#endif 593#endif
552 594
553/** 595/**
diff --git a/platforms/chibios/common/configs/halconf.h b/platforms/chibios/common/configs/halconf.h
index 6b48e289f..264ae4e6c 100644
--- a/platforms/chibios/common/configs/halconf.h
+++ b/platforms/chibios/common/configs/halconf.h
@@ -29,9 +29,9 @@
29#define HALCONF_H 29#define HALCONF_H
30 30
31#define _CHIBIOS_HAL_CONF_ 31#define _CHIBIOS_HAL_CONF_
32#define _CHIBIOS_HAL_CONF_VER_7_0_ 32#define _CHIBIOS_HAL_CONF_VER_7_1_
33 33
34#include "mcuconf.h" 34#include <mcuconf.h>
35 35
36/** 36/**
37 * @brief Enables the PAL subsystem. 37 * @brief Enables the PAL subsystem.
@@ -65,21 +65,28 @@
65 * @brief Enables the DAC subsystem. 65 * @brief Enables the DAC subsystem.
66 */ 66 */
67#if !defined(HAL_USE_DAC) || defined(__DOXYGEN__) 67#if !defined(HAL_USE_DAC) || defined(__DOXYGEN__)
68#define HAL_USE_DAC TRUE 68#define HAL_USE_DAC FALSE
69#endif
70
71/**
72 * @brief Enables the EFlash subsystem.
73 */
74#if !defined(HAL_USE_EFL) || defined(__DOXYGEN__)
75#define HAL_USE_EFL FALSE
69#endif 76#endif
70 77
71/** 78/**
72 * @brief Enables the GPT subsystem. 79 * @brief Enables the GPT subsystem.
73 */ 80 */
74#if !defined(HAL_USE_GPT) || defined(__DOXYGEN__) 81#if !defined(HAL_USE_GPT) || defined(__DOXYGEN__)
75#define HAL_USE_GPT TRUE 82#define HAL_USE_GPT FALSE
76#endif 83#endif
77 84
78/** 85/**
79 * @brief Enables the I2C subsystem. 86 * @brief Enables the I2C subsystem.
80 */ 87 */
81#if !defined(HAL_USE_I2C) || defined(__DOXYGEN__) 88#if !defined(HAL_USE_I2C) || defined(__DOXYGEN__)
82#define HAL_USE_I2C TRUE 89#define HAL_USE_I2C FALSE
83#endif 90#endif
84 91
85/** 92/**
@@ -114,7 +121,7 @@
114 * @brief Enables the PWM subsystem. 121 * @brief Enables the PWM subsystem.
115 */ 122 */
116#if !defined(HAL_USE_PWM) || defined(__DOXYGEN__) 123#if !defined(HAL_USE_PWM) || defined(__DOXYGEN__)
117#define HAL_USE_PWM TRUE 124#define HAL_USE_PWM FALSE
118#endif 125#endif
119 126
120/** 127/**
@@ -142,7 +149,7 @@
142 * @brief Enables the SERIAL over USB subsystem. 149 * @brief Enables the SERIAL over USB subsystem.
143 */ 150 */
144#if !defined(HAL_USE_SERIAL_USB) || defined(__DOXYGEN__) 151#if !defined(HAL_USE_SERIAL_USB) || defined(__DOXYGEN__)
145#define HAL_USE_SERIAL_USB TRUE 152#define HAL_USE_SERIAL_USB FALSE
146#endif 153#endif
147 154
148/** 155/**
@@ -156,7 +163,7 @@
156 * @brief Enables the SPI subsystem. 163 * @brief Enables the SPI subsystem.
157 */ 164 */
158#if !defined(HAL_USE_SPI) || defined(__DOXYGEN__) 165#if !defined(HAL_USE_SPI) || defined(__DOXYGEN__)
159#define HAL_USE_SPI TRUE 166#define HAL_USE_SPI FALSE
160#endif 167#endif
161 168
162/** 169/**
@@ -203,7 +210,7 @@
203 * @note Disabling this option saves both code and data space. 210 * @note Disabling this option saves both code and data space.
204 */ 211 */
205#if !defined(PAL_USE_CALLBACKS) || defined(__DOXYGEN__) 212#if !defined(PAL_USE_CALLBACKS) || defined(__DOXYGEN__)
206#define PAL_USE_CALLBACKS TRUE 213#define PAL_USE_CALLBACKS FALSE
207#endif 214#endif
208 215
209/** 216/**
@@ -211,7 +218,7 @@
211 * @note Disabling this option saves both code and data space. 218 * @note Disabling this option saves both code and data space.
212 */ 219 */
213#if !defined(PAL_USE_WAIT) || defined(__DOXYGEN__) 220#if !defined(PAL_USE_WAIT) || defined(__DOXYGEN__)
214#define PAL_USE_WAIT TRUE 221#define PAL_USE_WAIT FALSE
215#endif 222#endif
216 223
217/*===========================================================================*/ 224/*===========================================================================*/
@@ -451,7 +458,6 @@
451#define SPI_USE_CIRCULAR FALSE 458#define SPI_USE_CIRCULAR FALSE
452#endif 459#endif
453 460
454
455/** 461/**
456 * @brief Enables the @p spiAcquireBus() and @p spiReleaseBus() APIs. 462 * @brief Enables the @p spiAcquireBus() and @p spiReleaseBus() APIs.
457 * @note Disabling this option saves both code and data space. 463 * @note Disabling this option saves both code and data space.
generated by cgit v1.2.3 (git 2.25.1) at 2025-12-07 14:24:43 +0000