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-rw-r--r--platforms/chibios/boards/BLACKPILL_STM32_F401/configs/mcuconf.h71
-rw-r--r--platforms/chibios/boards/BLACKPILL_STM32_F411/configs/mcuconf.h65
-rw-r--r--platforms/chibios/boards/GENERIC_STM32_F405XG/configs/mcuconf.h3
-rw-r--r--platforms/chibios/boards/GENERIC_STM32_F407XE/configs/mcuconf.h3
-rw-r--r--platforms/chibios/boards/GENERIC_STM32_F446XE/configs/mcuconf.h108
-rw-r--r--platforms/chibios/boards/GENERIC_STM32_G431XB/configs/mcuconf.h15
-rw-r--r--platforms/chibios/boards/GENERIC_STM32_G474XE/configs/mcuconf.h15
-rw-r--r--platforms/chibios/boards/QMK_PROTON_C/configs/chconf.h2
-rw-r--r--platforms/chibios/boards/common/configs/chconf.h2
9 files changed, 155 insertions, 129 deletions
diff --git a/platforms/chibios/boards/BLACKPILL_STM32_F401/configs/mcuconf.h b/platforms/chibios/boards/BLACKPILL_STM32_F401/configs/mcuconf.h
index ba6e934fe..a21fd7bd1 100644
--- a/platforms/chibios/boards/BLACKPILL_STM32_F401/configs/mcuconf.h
+++ b/platforms/chibios/boards/BLACKPILL_STM32_F401/configs/mcuconf.h
@@ -1,5 +1,5 @@
1/* 1/*
2 ChibiOS - Copyright (C) 2006..2018 Giovanni Di Sirio 2 ChibiOS - Copyright (C) 2006..2020 Giovanni Di Sirio
3 3
4 Licensed under the Apache License, Version 2.0 (the "License"); 4 Licensed under the Apache License, Version 2.0 (the "License");
5 you may not use this file except in compliance with the License. 5 you may not use this file except in compliance with the License.
@@ -32,11 +32,15 @@
32 */ 32 */
33 33
34#define STM32F4xx_MCUCONF 34#define STM32F4xx_MCUCONF
35#define STM32F401_MCUCONF
35 36
36/* 37/*
37 * HAL driver system settings. 38 * HAL driver system settings.
38 */ 39 */
39#define STM32_NO_INIT FALSE 40#define STM32_NO_INIT FALSE
41#define STM32_PVD_ENABLE FALSE
42#define STM32_PLS STM32_PLS_LEV0
43#define STM32_BKPRAM_ENABLE FALSE
40#define STM32_HSI_ENABLED TRUE 44#define STM32_HSI_ENABLED TRUE
41#define STM32_LSI_ENABLED TRUE 45#define STM32_LSI_ENABLED TRUE
42#define STM32_HSE_ENABLED TRUE 46#define STM32_HSE_ENABLED TRUE
@@ -44,13 +48,13 @@
44#define STM32_CLOCK48_REQUIRED TRUE 48#define STM32_CLOCK48_REQUIRED TRUE
45#define STM32_SW STM32_SW_PLL 49#define STM32_SW STM32_SW_PLL
46#define STM32_PLLSRC STM32_PLLSRC_HSE 50#define STM32_PLLSRC STM32_PLLSRC_HSE
47#define STM32_PLLM_VALUE 25 51#define STM32_PLLM_VALUE 25
48#define STM32_PLLN_VALUE 336 52#define STM32_PLLN_VALUE 336
49#define STM32_PLLP_VALUE 4 53#define STM32_PLLP_VALUE 4
50#define STM32_PLLQ_VALUE 7 54#define STM32_PLLQ_VALUE 7
51#define STM32_HPRE STM32_HPRE_DIV1 55#define STM32_HPRE STM32_HPRE_DIV1
52#define STM32_PPRE1 STM32_PPRE1_DIV4 56#define STM32_PPRE1 STM32_PPRE1_DIV4
53#define STM32_PPRE2 STM32_PPRE2_DIV2 57#define STM32_PPRE2 STM32_PPRE2_DIV2
54#define STM32_RTCSEL STM32_RTCSEL_LSI 58#define STM32_RTCSEL STM32_RTCSEL_LSI
55#define STM32_RTCPRE_VALUE 8 59#define STM32_RTCPRE_VALUE 8
56#define STM32_MCO1SEL STM32_MCO1SEL_HSI 60#define STM32_MCO1SEL STM32_MCO1SEL_HSI
@@ -60,9 +64,6 @@
60#define STM32_I2SSRC STM32_I2SSRC_CKIN 64#define STM32_I2SSRC STM32_I2SSRC_CKIN
61#define STM32_PLLI2SN_VALUE 192 65#define STM32_PLLI2SN_VALUE 192
62#define STM32_PLLI2SR_VALUE 5 66#define STM32_PLLI2SR_VALUE 5
63#define STM32_PVD_ENABLE FALSE
64#define STM32_PLS STM32_PLS_LEV0
65#define STM32_BKPRAM_ENABLE FALSE
66 67
67/* 68/*
68 * IRQ system settings. 69 * IRQ system settings.
@@ -82,6 +83,19 @@
82#define STM32_IRQ_EXTI21_PRIORITY 15 83#define STM32_IRQ_EXTI21_PRIORITY 15
83#define STM32_IRQ_EXTI22_PRIORITY 15 84#define STM32_IRQ_EXTI22_PRIORITY 15
84 85
86#define STM32_IRQ_TIM1_BRK_TIM9_PRIORITY 7
87#define STM32_IRQ_TIM1_UP_TIM10_PRIORITY 7
88#define STM32_IRQ_TIM1_TRGCO_TIM11_PRIORITY 7
89#define STM32_IRQ_TIM1_CC_PRIORITY 7
90#define STM32_IRQ_TIM2_PRIORITY 7
91#define STM32_IRQ_TIM3_PRIORITY 7
92#define STM32_IRQ_TIM4_PRIORITY 7
93#define STM32_IRQ_TIM5_PRIORITY 7
94
95#define STM32_IRQ_USART1_PRIORITY 12
96#define STM32_IRQ_USART2_PRIORITY 12
97#define STM32_IRQ_USART6_PRIORITY 12
98
85/* 99/*
86 * ADC driver system settings. 100 * ADC driver system settings.
87 */ 101 */
@@ -101,14 +115,8 @@
101#define STM32_GPT_USE_TIM4 FALSE 115#define STM32_GPT_USE_TIM4 FALSE
102#define STM32_GPT_USE_TIM5 FALSE 116#define STM32_GPT_USE_TIM5 FALSE
103#define STM32_GPT_USE_TIM9 FALSE 117#define STM32_GPT_USE_TIM9 FALSE
118#define STM32_GPT_USE_TIM10 FALSE
104#define STM32_GPT_USE_TIM11 FALSE 119#define STM32_GPT_USE_TIM11 FALSE
105#define STM32_GPT_TIM1_IRQ_PRIORITY 7
106#define STM32_GPT_TIM2_IRQ_PRIORITY 7
107#define STM32_GPT_TIM3_IRQ_PRIORITY 7
108#define STM32_GPT_TIM4_IRQ_PRIORITY 7
109#define STM32_GPT_TIM5_IRQ_PRIORITY 7
110#define STM32_GPT_TIM9_IRQ_PRIORITY 7
111#define STM32_GPT_TIM11_IRQ_PRIORITY 7
112 120
113/* 121/*
114 * I2C driver system settings. 122 * I2C driver system settings.
@@ -155,29 +163,20 @@
155#define STM32_ICU_USE_TIM4 FALSE 163#define STM32_ICU_USE_TIM4 FALSE
156#define STM32_ICU_USE_TIM5 FALSE 164#define STM32_ICU_USE_TIM5 FALSE
157#define STM32_ICU_USE_TIM9 FALSE 165#define STM32_ICU_USE_TIM9 FALSE
158#define STM32_ICU_TIM1_IRQ_PRIORITY 7 166#define STM32_ICU_USE_TIM10 FALSE
159#define STM32_ICU_TIM2_IRQ_PRIORITY 7 167#define STM32_ICU_USE_TIM11 FALSE
160#define STM32_ICU_TIM3_IRQ_PRIORITY 7
161#define STM32_ICU_TIM4_IRQ_PRIORITY 7
162#define STM32_ICU_TIM5_IRQ_PRIORITY 7
163#define STM32_ICU_TIM9_IRQ_PRIORITY 7
164 168
165/* 169/*
166 * PWM driver system settings. 170 * PWM driver system settings.
167 */ 171 */
168#define STM32_PWM_USE_ADVANCED FALSE
169#define STM32_PWM_USE_TIM1 FALSE 172#define STM32_PWM_USE_TIM1 FALSE
170#define STM32_PWM_USE_TIM2 FALSE 173#define STM32_PWM_USE_TIM2 FALSE
171#define STM32_PWM_USE_TIM3 FALSE 174#define STM32_PWM_USE_TIM3 FALSE
172#define STM32_PWM_USE_TIM4 FALSE 175#define STM32_PWM_USE_TIM4 FALSE
173#define STM32_PWM_USE_TIM5 FALSE 176#define STM32_PWM_USE_TIM5 FALSE
174#define STM32_PWM_USE_TIM9 FALSE 177#define STM32_PWM_USE_TIM9 FALSE
175#define STM32_PWM_TIM1_IRQ_PRIORITY 7 178#define STM32_PWM_USE_TIM10 FALSE
176#define STM32_PWM_TIM2_IRQ_PRIORITY 7 179#define STM32_PWM_USE_TIM11 FALSE
177#define STM32_PWM_TIM3_IRQ_PRIORITY 7
178#define STM32_PWM_TIM4_IRQ_PRIORITY 7
179#define STM32_PWM_TIM5_IRQ_PRIORITY 7
180#define STM32_PWM_TIM9_IRQ_PRIORITY 7
181 180
182/* 181/*
183 * SERIAL driver system settings. 182 * SERIAL driver system settings.
@@ -185,9 +184,6 @@
185#define STM32_SERIAL_USE_USART1 FALSE 184#define STM32_SERIAL_USE_USART1 FALSE
186#define STM32_SERIAL_USE_USART2 FALSE 185#define STM32_SERIAL_USE_USART2 FALSE
187#define STM32_SERIAL_USE_USART6 FALSE 186#define STM32_SERIAL_USE_USART6 FALSE
188#define STM32_SERIAL_USART1_PRIORITY 12
189#define STM32_SERIAL_USART2_PRIORITY 12
190#define STM32_SERIAL_USART6_PRIORITY 12
191 187
192/* 188/*
193 * SPI driver system settings. 189 * SPI driver system settings.
@@ -227,9 +223,6 @@
227#define STM32_UART_USART2_TX_DMA_STREAM STM32_DMA_STREAM_ID(1, 6) 223#define STM32_UART_USART2_TX_DMA_STREAM STM32_DMA_STREAM_ID(1, 6)
228#define STM32_UART_USART6_RX_DMA_STREAM STM32_DMA_STREAM_ID(2, 2) 224#define STM32_UART_USART6_RX_DMA_STREAM STM32_DMA_STREAM_ID(2, 2)
229#define STM32_UART_USART6_TX_DMA_STREAM STM32_DMA_STREAM_ID(2, 7) 225#define STM32_UART_USART6_TX_DMA_STREAM STM32_DMA_STREAM_ID(2, 7)
230#define STM32_UART_USART1_IRQ_PRIORITY 12
231#define STM32_UART_USART2_IRQ_PRIORITY 12
232#define STM32_UART_USART6_IRQ_PRIORITY 12
233#define STM32_UART_USART1_DMA_PRIORITY 0 226#define STM32_UART_USART1_DMA_PRIORITY 0
234#define STM32_UART_USART2_DMA_PRIORITY 0 227#define STM32_UART_USART2_DMA_PRIORITY 0
235#define STM32_UART_USART6_DMA_PRIORITY 0 228#define STM32_UART_USART6_DMA_PRIORITY 0
@@ -241,9 +234,7 @@
241#define STM32_USB_USE_OTG1 TRUE 234#define STM32_USB_USE_OTG1 TRUE
242#define STM32_USB_OTG1_IRQ_PRIORITY 14 235#define STM32_USB_OTG1_IRQ_PRIORITY 14
243#define STM32_USB_OTG1_RX_FIFO_SIZE 512 236#define STM32_USB_OTG1_RX_FIFO_SIZE 512
244#define STM32_USB_OTG_THREAD_PRIO NORMALPRIO+1 237#define STM32_USB_HOST_WAKEUP_DURATION 2
245#define STM32_USB_OTG_THREAD_STACK_SIZE 128
246#define STM32_USB_OTGFIFO_FILL_BASEPRI 0
247 238
248/* 239/*
249 * WDG driver system settings. 240 * WDG driver system settings.
diff --git a/platforms/chibios/boards/BLACKPILL_STM32_F411/configs/mcuconf.h b/platforms/chibios/boards/BLACKPILL_STM32_F411/configs/mcuconf.h
index 0394ff56b..131c84766 100644
--- a/platforms/chibios/boards/BLACKPILL_STM32_F411/configs/mcuconf.h
+++ b/platforms/chibios/boards/BLACKPILL_STM32_F411/configs/mcuconf.h
@@ -1,5 +1,5 @@
1/* 1/*
2 ChibiOS - Copyright (C) 2006..2018 Giovanni Di Sirio 2 ChibiOS - Copyright (C) 2006..2020 Giovanni Di Sirio
3 3
4 Licensed under the Apache License, Version 2.0 (the "License"); 4 Licensed under the Apache License, Version 2.0 (the "License");
5 you may not use this file except in compliance with the License. 5 you may not use this file except in compliance with the License.
@@ -32,11 +32,15 @@
32 */ 32 */
33 33
34#define STM32F4xx_MCUCONF 34#define STM32F4xx_MCUCONF
35#define STM32F411_MCUCONF
35 36
36/* 37/*
37 * HAL driver system settings. 38 * HAL driver system settings.
38 */ 39 */
39#define STM32_NO_INIT FALSE 40#define STM32_NO_INIT FALSE
41#define STM32_PVD_ENABLE FALSE
42#define STM32_PLS STM32_PLS_LEV0
43#define STM32_BKPRAM_ENABLE FALSE
40#define STM32_HSI_ENABLED TRUE 44#define STM32_HSI_ENABLED TRUE
41#define STM32_LSI_ENABLED TRUE 45#define STM32_LSI_ENABLED TRUE
42#define STM32_HSE_ENABLED TRUE 46#define STM32_HSE_ENABLED TRUE
@@ -60,9 +64,6 @@
60#define STM32_I2SSRC STM32_I2SSRC_CKIN 64#define STM32_I2SSRC STM32_I2SSRC_CKIN
61#define STM32_PLLI2SN_VALUE 192 65#define STM32_PLLI2SN_VALUE 192
62#define STM32_PLLI2SR_VALUE 5 66#define STM32_PLLI2SR_VALUE 5
63#define STM32_PVD_ENABLE FALSE
64#define STM32_PLS STM32_PLS_LEV0
65#define STM32_BKPRAM_ENABLE FALSE
66 67
67/* 68/*
68 * IRQ system settings. 69 * IRQ system settings.
@@ -82,6 +83,19 @@
82#define STM32_IRQ_EXTI21_PRIORITY 15 83#define STM32_IRQ_EXTI21_PRIORITY 15
83#define STM32_IRQ_EXTI22_PRIORITY 15 84#define STM32_IRQ_EXTI22_PRIORITY 15
84 85
86#define STM32_IRQ_TIM1_BRK_TIM9_PRIORITY 7
87#define STM32_IRQ_TIM1_UP_TIM10_PRIORITY 7
88#define STM32_IRQ_TIM1_TRGCO_TIM11_PRIORITY 7
89#define STM32_IRQ_TIM1_CC_PRIORITY 7
90#define STM32_IRQ_TIM2_PRIORITY 7
91#define STM32_IRQ_TIM3_PRIORITY 7
92#define STM32_IRQ_TIM4_PRIORITY 7
93#define STM32_IRQ_TIM5_PRIORITY 7
94
95#define STM32_IRQ_USART1_PRIORITY 12
96#define STM32_IRQ_USART2_PRIORITY 12
97#define STM32_IRQ_USART6_PRIORITY 12
98
85/* 99/*
86 * ADC driver system settings. 100 * ADC driver system settings.
87 */ 101 */
@@ -101,14 +115,8 @@
101#define STM32_GPT_USE_TIM4 FALSE 115#define STM32_GPT_USE_TIM4 FALSE
102#define STM32_GPT_USE_TIM5 FALSE 116#define STM32_GPT_USE_TIM5 FALSE
103#define STM32_GPT_USE_TIM9 FALSE 117#define STM32_GPT_USE_TIM9 FALSE
118#define STM32_GPT_USE_TIM10 FALSE
104#define STM32_GPT_USE_TIM11 FALSE 119#define STM32_GPT_USE_TIM11 FALSE
105#define STM32_GPT_TIM1_IRQ_PRIORITY 7
106#define STM32_GPT_TIM2_IRQ_PRIORITY 7
107#define STM32_GPT_TIM3_IRQ_PRIORITY 7
108#define STM32_GPT_TIM4_IRQ_PRIORITY 7
109#define STM32_GPT_TIM5_IRQ_PRIORITY 7
110#define STM32_GPT_TIM9_IRQ_PRIORITY 7
111#define STM32_GPT_TIM11_IRQ_PRIORITY 7
112 120
113/* 121/*
114 * I2C driver system settings. 122 * I2C driver system settings.
@@ -155,29 +163,28 @@
155#define STM32_ICU_USE_TIM4 FALSE 163#define STM32_ICU_USE_TIM4 FALSE
156#define STM32_ICU_USE_TIM5 FALSE 164#define STM32_ICU_USE_TIM5 FALSE
157#define STM32_ICU_USE_TIM9 FALSE 165#define STM32_ICU_USE_TIM9 FALSE
158#define STM32_ICU_TIM1_IRQ_PRIORITY 7 166#define STM32_ICU_USE_TIM10 FALSE
159#define STM32_ICU_TIM2_IRQ_PRIORITY 7 167#define STM32_ICU_USE_TIM11 FALSE
160#define STM32_ICU_TIM3_IRQ_PRIORITY 7
161#define STM32_ICU_TIM4_IRQ_PRIORITY 7
162#define STM32_ICU_TIM5_IRQ_PRIORITY 7
163#define STM32_ICU_TIM9_IRQ_PRIORITY 7
164 168
165/* 169/*
166 * PWM driver system settings. 170 * PWM driver system settings.
167 */ 171 */
168#define STM32_PWM_USE_ADVANCED FALSE
169#define STM32_PWM_USE_TIM1 FALSE 172#define STM32_PWM_USE_TIM1 FALSE
170#define STM32_PWM_USE_TIM2 FALSE 173#define STM32_PWM_USE_TIM2 FALSE
171#define STM32_PWM_USE_TIM3 FALSE 174#define STM32_PWM_USE_TIM3 FALSE
172#define STM32_PWM_USE_TIM4 FALSE 175#define STM32_PWM_USE_TIM4 FALSE
173#define STM32_PWM_USE_TIM5 FALSE 176#define STM32_PWM_USE_TIM5 FALSE
174#define STM32_PWM_USE_TIM9 FALSE 177#define STM32_PWM_USE_TIM9 FALSE
175#define STM32_PWM_TIM1_IRQ_PRIORITY 7 178#define STM32_PWM_USE_TIM10 FALSE
176#define STM32_PWM_TIM2_IRQ_PRIORITY 7 179#define STM32_PWM_USE_TIM11 FALSE
177#define STM32_PWM_TIM3_IRQ_PRIORITY 7 180
178#define STM32_PWM_TIM4_IRQ_PRIORITY 7 181/*
179#define STM32_PWM_TIM5_IRQ_PRIORITY 7 182 * RTC driver system settings.
180#define STM32_PWM_TIM9_IRQ_PRIORITY 7 183 */
184#define STM32_RTC_PRESA_VALUE 32
185#define STM32_RTC_PRESS_VALUE 1024
186#define STM32_RTC_CR_INIT 0
187#define STM32_RTC_TAMPCR_INIT 0
181 188
182/* 189/*
183 * SERIAL driver system settings. 190 * SERIAL driver system settings.
@@ -185,9 +192,6 @@
185#define STM32_SERIAL_USE_USART1 FALSE 192#define STM32_SERIAL_USE_USART1 FALSE
186#define STM32_SERIAL_USE_USART2 FALSE 193#define STM32_SERIAL_USE_USART2 FALSE
187#define STM32_SERIAL_USE_USART6 FALSE 194#define STM32_SERIAL_USE_USART6 FALSE
188#define STM32_SERIAL_USART1_PRIORITY 12
189#define STM32_SERIAL_USART2_PRIORITY 12
190#define STM32_SERIAL_USART6_PRIORITY 12
191 195
192/* 196/*
193 * SPI driver system settings. 197 * SPI driver system settings.
@@ -227,9 +231,6 @@
227#define STM32_UART_USART2_TX_DMA_STREAM STM32_DMA_STREAM_ID(1, 6) 231#define STM32_UART_USART2_TX_DMA_STREAM STM32_DMA_STREAM_ID(1, 6)
228#define STM32_UART_USART6_RX_DMA_STREAM STM32_DMA_STREAM_ID(2, 2) 232#define STM32_UART_USART6_RX_DMA_STREAM STM32_DMA_STREAM_ID(2, 2)
229#define STM32_UART_USART6_TX_DMA_STREAM STM32_DMA_STREAM_ID(2, 7) 233#define STM32_UART_USART6_TX_DMA_STREAM STM32_DMA_STREAM_ID(2, 7)
230#define STM32_UART_USART1_IRQ_PRIORITY 12
231#define STM32_UART_USART2_IRQ_PRIORITY 12
232#define STM32_UART_USART6_IRQ_PRIORITY 12
233#define STM32_UART_USART1_DMA_PRIORITY 0 234#define STM32_UART_USART1_DMA_PRIORITY 0
234#define STM32_UART_USART2_DMA_PRIORITY 0 235#define STM32_UART_USART2_DMA_PRIORITY 0
235#define STM32_UART_USART6_DMA_PRIORITY 0 236#define STM32_UART_USART6_DMA_PRIORITY 0
@@ -241,9 +242,7 @@
241#define STM32_USB_USE_OTG1 TRUE 242#define STM32_USB_USE_OTG1 TRUE
242#define STM32_USB_OTG1_IRQ_PRIORITY 14 243#define STM32_USB_OTG1_IRQ_PRIORITY 14
243#define STM32_USB_OTG1_RX_FIFO_SIZE 512 244#define STM32_USB_OTG1_RX_FIFO_SIZE 512
244#define STM32_USB_OTG_THREAD_PRIO NORMALPRIO+1 245#define STM32_USB_HOST_WAKEUP_DURATION 2
245#define STM32_USB_OTG_THREAD_STACK_SIZE 128
246#define STM32_USB_OTGFIFO_FILL_BASEPRI 0
247 246
248/* 247/*
249 * WDG driver system settings. 248 * WDG driver system settings.
diff --git a/platforms/chibios/boards/GENERIC_STM32_F405XG/configs/mcuconf.h b/platforms/chibios/boards/GENERIC_STM32_F405XG/configs/mcuconf.h
index d2ec632d9..908a580a9 100644
--- a/platforms/chibios/boards/GENERIC_STM32_F405XG/configs/mcuconf.h
+++ b/platforms/chibios/boards/GENERIC_STM32_F405XG/configs/mcuconf.h
@@ -344,9 +344,6 @@
344#define STM32_USB_OTG2_RX_FIFO_SIZE 1024 344#define STM32_USB_OTG2_RX_FIFO_SIZE 1024
345#define STM32_USB_HOST_WAKEUP_DURATION 2 345#define STM32_USB_HOST_WAKEUP_DURATION 2
346 346
347#define STM32_USB_OTG_THREAD_PRIO NORMALPRIO+1
348#define STM32_USB_OTG_THREAD_STACK_SIZE 128
349
350/* 347/*
351 * WDG driver system settings. 348 * WDG driver system settings.
352 */ 349 */
diff --git a/platforms/chibios/boards/GENERIC_STM32_F407XE/configs/mcuconf.h b/platforms/chibios/boards/GENERIC_STM32_F407XE/configs/mcuconf.h
index 4be47fe1b..928ee56c7 100644
--- a/platforms/chibios/boards/GENERIC_STM32_F407XE/configs/mcuconf.h
+++ b/platforms/chibios/boards/GENERIC_STM32_F407XE/configs/mcuconf.h
@@ -344,9 +344,6 @@
344#define STM32_USB_OTG2_RX_FIFO_SIZE 1024 344#define STM32_USB_OTG2_RX_FIFO_SIZE 1024
345#define STM32_USB_HOST_WAKEUP_DURATION 2 345#define STM32_USB_HOST_WAKEUP_DURATION 2
346 346
347#define STM32_USB_OTG_THREAD_PRIO NORMALPRIO+1
348#define STM32_USB_OTG_THREAD_STACK_SIZE 128
349
350/* 347/*
351 * WDG driver system settings. 348 * WDG driver system settings.
352 */ 349 */
diff --git a/platforms/chibios/boards/GENERIC_STM32_F446XE/configs/mcuconf.h b/platforms/chibios/boards/GENERIC_STM32_F446XE/configs/mcuconf.h
index d2de75590..566c146c2 100644
--- a/platforms/chibios/boards/GENERIC_STM32_F446XE/configs/mcuconf.h
+++ b/platforms/chibios/boards/GENERIC_STM32_F446XE/configs/mcuconf.h
@@ -1,5 +1,5 @@
1/* 1/*
2 ChibiOS - Copyright (C) 2006..2018 Giovanni Di Sirio 2 ChibiOS - Copyright (C) 2006..2020 Giovanni Di Sirio
3 3
4 Licensed under the Apache License, Version 2.0 (the "License"); 4 Licensed under the Apache License, Version 2.0 (the "License");
5 you may not use this file except in compliance with the License. 5 you may not use this file except in compliance with the License.
@@ -32,11 +32,15 @@
32 */ 32 */
33 33
34#define STM32F4xx_MCUCONF 34#define STM32F4xx_MCUCONF
35#define STM32F446_MCUCONF
35 36
36/* 37/*
37 * HAL driver system settings. 38 * HAL driver system settings.
38 */ 39 */
39#define STM32_NO_INIT FALSE 40#define STM32_NO_INIT FALSE
41#define STM32_PVD_ENABLE FALSE
42#define STM32_PLS STM32_PLS_LEV0
43#define STM32_BKPRAM_ENABLE FALSE
40#define STM32_HSI_ENABLED FALSE 44#define STM32_HSI_ENABLED FALSE
41#define STM32_LSI_ENABLED TRUE 45#define STM32_LSI_ENABLED TRUE
42#define STM32_HSE_ENABLED TRUE 46#define STM32_HSE_ENABLED TRUE
@@ -70,9 +74,6 @@
70#define STM32_SAI1SEL STM32_SAI2SEL_PLLR 74#define STM32_SAI1SEL STM32_SAI2SEL_PLLR
71#define STM32_SAI2SEL STM32_SAI2SEL_PLLR 75#define STM32_SAI2SEL STM32_SAI2SEL_PLLR
72#define STM32_CK48MSEL STM32_CK48MSEL_PLLALT 76#define STM32_CK48MSEL STM32_CK48MSEL_PLLALT
73#define STM32_PVD_ENABLE FALSE
74#define STM32_PLS STM32_PLS_LEV0
75#define STM32_BKPRAM_ENABLE FALSE
76 77
77/* 78/*
78 * IRQ system settings. 79 * IRQ system settings.
@@ -92,6 +93,30 @@
92#define STM32_IRQ_EXTI21_PRIORITY 15 93#define STM32_IRQ_EXTI21_PRIORITY 15
93#define STM32_IRQ_EXTI22_PRIORITY 15 94#define STM32_IRQ_EXTI22_PRIORITY 15
94 95
96#define STM32_IRQ_TIM1_BRK_TIM9_PRIORITY 7
97#define STM32_IRQ_TIM1_UP_TIM10_PRIORITY 7
98#define STM32_IRQ_TIM1_TRGCO_TIM11_PRIORITY 7
99#define STM32_IRQ_TIM1_CC_PRIORITY 7
100#define STM32_IRQ_TIM2_PRIORITY 7
101#define STM32_IRQ_TIM3_PRIORITY 7
102#define STM32_IRQ_TIM4_PRIORITY 7
103#define STM32_IRQ_TIM5_PRIORITY 7
104#define STM32_IRQ_TIM6_PRIORITY 7
105#define STM32_IRQ_TIM7_PRIORITY 7
106#define STM32_IRQ_TIM8_BRK_TIM12_PRIORITY 7
107#define STM32_IRQ_TIM8_UP_TIM13_PRIORITY 7
108#define STM32_IRQ_TIM8_TRGCO_TIM14_PRIORITY 7
109#define STM32_IRQ_TIM8_CC_PRIORITY 7
110
111#define STM32_IRQ_USART1_PRIORITY 12
112#define STM32_IRQ_USART2_PRIORITY 12
113#define STM32_IRQ_USART3_PRIORITY 12
114#define STM32_IRQ_UART4_PRIORITY 12
115#define STM32_IRQ_UART5_PRIORITY 12
116#define STM32_IRQ_USART6_PRIORITY 12
117#define STM32_IRQ_UART7_PRIORITY 12
118#define STM32_IRQ_UART8_PRIORITY 12
119
95/* 120/*
96 * ADC driver system settings. 121 * ADC driver system settings.
97 */ 122 */
@@ -143,21 +168,11 @@
143#define STM32_GPT_USE_TIM7 FALSE 168#define STM32_GPT_USE_TIM7 FALSE
144#define STM32_GPT_USE_TIM8 FALSE 169#define STM32_GPT_USE_TIM8 FALSE
145#define STM32_GPT_USE_TIM9 FALSE 170#define STM32_GPT_USE_TIM9 FALSE
171#define STM32_GPT_USE_TIM10 FALSE
146#define STM32_GPT_USE_TIM11 FALSE 172#define STM32_GPT_USE_TIM11 FALSE
147#define STM32_GPT_USE_TIM12 FALSE 173#define STM32_GPT_USE_TIM12 FALSE
174#define STM32_GPT_USE_TIM13 FALSE
148#define STM32_GPT_USE_TIM14 FALSE 175#define STM32_GPT_USE_TIM14 FALSE
149#define STM32_GPT_TIM1_IRQ_PRIORITY 7
150#define STM32_GPT_TIM2_IRQ_PRIORITY 7
151#define STM32_GPT_TIM3_IRQ_PRIORITY 7
152#define STM32_GPT_TIM4_IRQ_PRIORITY 7
153#define STM32_GPT_TIM5_IRQ_PRIORITY 7
154#define STM32_GPT_TIM6_IRQ_PRIORITY 7
155#define STM32_GPT_TIM7_IRQ_PRIORITY 7
156#define STM32_GPT_TIM8_IRQ_PRIORITY 7
157#define STM32_GPT_TIM9_IRQ_PRIORITY 7
158#define STM32_GPT_TIM11_IRQ_PRIORITY 7
159#define STM32_GPT_TIM12_IRQ_PRIORITY 7
160#define STM32_GPT_TIM14_IRQ_PRIORITY 7
161 176
162/* 177/*
163 * I2C driver system settings. 178 * I2C driver system settings.
@@ -205,13 +220,11 @@
205#define STM32_ICU_USE_TIM5 FALSE 220#define STM32_ICU_USE_TIM5 FALSE
206#define STM32_ICU_USE_TIM8 FALSE 221#define STM32_ICU_USE_TIM8 FALSE
207#define STM32_ICU_USE_TIM9 FALSE 222#define STM32_ICU_USE_TIM9 FALSE
208#define STM32_ICU_TIM1_IRQ_PRIORITY 7 223#define STM32_ICU_USE_TIM10 FALSE
209#define STM32_ICU_TIM2_IRQ_PRIORITY 7 224#define STM32_ICU_USE_TIM11 FALSE
210#define STM32_ICU_TIM3_IRQ_PRIORITY 7 225#define STM32_ICU_USE_TIM12 FALSE
211#define STM32_ICU_TIM4_IRQ_PRIORITY 7 226#define STM32_ICU_USE_TIM13 FALSE
212#define STM32_ICU_TIM5_IRQ_PRIORITY 7 227#define STM32_ICU_USE_TIM14 FALSE
213#define STM32_ICU_TIM8_IRQ_PRIORITY 7
214#define STM32_ICU_TIM9_IRQ_PRIORITY 7
215 228
216/* 229/*
217 * MAC driver system settings. 230 * MAC driver system settings.
@@ -227,7 +240,6 @@
227/* 240/*
228 * PWM driver system settings. 241 * PWM driver system settings.
229 */ 242 */
230#define STM32_PWM_USE_ADVANCED FALSE
231#define STM32_PWM_USE_TIM1 FALSE 243#define STM32_PWM_USE_TIM1 FALSE
232#define STM32_PWM_USE_TIM2 FALSE 244#define STM32_PWM_USE_TIM2 FALSE
233#define STM32_PWM_USE_TIM3 FALSE 245#define STM32_PWM_USE_TIM3 FALSE
@@ -235,13 +247,19 @@
235#define STM32_PWM_USE_TIM5 FALSE 247#define STM32_PWM_USE_TIM5 FALSE
236#define STM32_PWM_USE_TIM8 FALSE 248#define STM32_PWM_USE_TIM8 FALSE
237#define STM32_PWM_USE_TIM9 FALSE 249#define STM32_PWM_USE_TIM9 FALSE
238#define STM32_PWM_TIM1_IRQ_PRIORITY 7 250#define STM32_PWM_USE_TIM10 FALSE
239#define STM32_PWM_TIM2_IRQ_PRIORITY 7 251#define STM32_PWM_USE_TIM11 FALSE
240#define STM32_PWM_TIM3_IRQ_PRIORITY 7 252#define STM32_PWM_USE_TIM12 FALSE
241#define STM32_PWM_TIM4_IRQ_PRIORITY 7 253#define STM32_PWM_USE_TIM13 FALSE
242#define STM32_PWM_TIM5_IRQ_PRIORITY 7 254#define STM32_PWM_USE_TIM14 FALSE
243#define STM32_PWM_TIM8_IRQ_PRIORITY 7 255
244#define STM32_PWM_TIM9_IRQ_PRIORITY 7 256/*
257 * RTC driver system settings.
258 */
259#define STM32_RTC_PRESA_VALUE 32
260#define STM32_RTC_PRESS_VALUE 1024
261#define STM32_RTC_CR_INIT 0
262#define STM32_RTC_TAMPCR_INIT 0
245 263
246/* 264/*
247 * SDC driver system settings. 265 * SDC driver system settings.
@@ -265,14 +283,6 @@
265#define STM32_SERIAL_USE_USART6 FALSE 283#define STM32_SERIAL_USE_USART6 FALSE
266#define STM32_SERIAL_USE_UART7 FALSE 284#define STM32_SERIAL_USE_UART7 FALSE
267#define STM32_SERIAL_USE_UART8 FALSE 285#define STM32_SERIAL_USE_UART8 FALSE
268#define STM32_SERIAL_USART1_PRIORITY 12
269#define STM32_SERIAL_USART2_PRIORITY 12
270#define STM32_SERIAL_USART3_PRIORITY 12
271#define STM32_SERIAL_UART4_PRIORITY 12
272#define STM32_SERIAL_UART5_PRIORITY 12
273#define STM32_SERIAL_USART6_PRIORITY 12
274#define STM32_SERIAL_UART7_PRIORITY 12
275#define STM32_SERIAL_UART8_PRIORITY 12
276 286
277/* 287/*
278 * SPI driver system settings. 288 * SPI driver system settings.
@@ -281,6 +291,8 @@
281#define STM32_SPI_USE_SPI2 FALSE 291#define STM32_SPI_USE_SPI2 FALSE
282#define STM32_SPI_USE_SPI3 FALSE 292#define STM32_SPI_USE_SPI3 FALSE
283#define STM32_SPI_USE_SPI4 FALSE 293#define STM32_SPI_USE_SPI4 FALSE
294#define STM32_SPI_USE_SPI5 FALSE
295#define STM32_SPI_USE_SPI6 FALSE
284#define STM32_SPI_SPI1_RX_DMA_STREAM STM32_DMA_STREAM_ID(2, 0) 296#define STM32_SPI_SPI1_RX_DMA_STREAM STM32_DMA_STREAM_ID(2, 0)
285#define STM32_SPI_SPI1_TX_DMA_STREAM STM32_DMA_STREAM_ID(2, 3) 297#define STM32_SPI_SPI1_TX_DMA_STREAM STM32_DMA_STREAM_ID(2, 3)
286#define STM32_SPI_SPI2_RX_DMA_STREAM STM32_DMA_STREAM_ID(1, 3) 298#define STM32_SPI_SPI2_RX_DMA_STREAM STM32_DMA_STREAM_ID(1, 3)
@@ -289,14 +301,22 @@
289#define STM32_SPI_SPI3_TX_DMA_STREAM STM32_DMA_STREAM_ID(1, 7) 301#define STM32_SPI_SPI3_TX_DMA_STREAM STM32_DMA_STREAM_ID(1, 7)
290#define STM32_SPI_SPI4_RX_DMA_STREAM STM32_DMA_STREAM_ID(2, 0) 302#define STM32_SPI_SPI4_RX_DMA_STREAM STM32_DMA_STREAM_ID(2, 0)
291#define STM32_SPI_SPI4_TX_DMA_STREAM STM32_DMA_STREAM_ID(2, 1) 303#define STM32_SPI_SPI4_TX_DMA_STREAM STM32_DMA_STREAM_ID(2, 1)
304#define STM32_SPI_SPI5_RX_DMA_STREAM STM32_DMA_STREAM_ID(2, 3)
305#define STM32_SPI_SPI5_TX_DMA_STREAM STM32_DMA_STREAM_ID(2, 4)
306#define STM32_SPI_SPI6_RX_DMA_STREAM STM32_DMA_STREAM_ID(2, 6)
307#define STM32_SPI_SPI6_TX_DMA_STREAM STM32_DMA_STREAM_ID(2, 5)
292#define STM32_SPI_SPI1_DMA_PRIORITY 1 308#define STM32_SPI_SPI1_DMA_PRIORITY 1
293#define STM32_SPI_SPI2_DMA_PRIORITY 1 309#define STM32_SPI_SPI2_DMA_PRIORITY 1
294#define STM32_SPI_SPI3_DMA_PRIORITY 1 310#define STM32_SPI_SPI3_DMA_PRIORITY 1
295#define STM32_SPI_SPI4_DMA_PRIORITY 1 311#define STM32_SPI_SPI4_DMA_PRIORITY 1
312#define STM32_SPI_SPI5_DMA_PRIORITY 1
313#define STM32_SPI_SPI6_DMA_PRIORITY 1
296#define STM32_SPI_SPI1_IRQ_PRIORITY 10 314#define STM32_SPI_SPI1_IRQ_PRIORITY 10
297#define STM32_SPI_SPI2_IRQ_PRIORITY 10 315#define STM32_SPI_SPI2_IRQ_PRIORITY 10
298#define STM32_SPI_SPI3_IRQ_PRIORITY 10 316#define STM32_SPI_SPI3_IRQ_PRIORITY 10
299#define STM32_SPI_SPI4_IRQ_PRIORITY 10 317#define STM32_SPI_SPI4_IRQ_PRIORITY 10
318#define STM32_SPI_SPI5_IRQ_PRIORITY 10
319#define STM32_SPI_SPI6_IRQ_PRIORITY 10
300#define STM32_SPI_DMA_ERROR_HOOK(spip) osalSysHalt("DMA failure") 320#define STM32_SPI_DMA_ERROR_HOOK(spip) osalSysHalt("DMA failure")
301 321
302/* 322/*
@@ -326,12 +346,6 @@
326#define STM32_UART_UART5_TX_DMA_STREAM STM32_DMA_STREAM_ID(1, 7) 346#define STM32_UART_UART5_TX_DMA_STREAM STM32_DMA_STREAM_ID(1, 7)
327#define STM32_UART_USART6_RX_DMA_STREAM STM32_DMA_STREAM_ID(2, 2) 347#define STM32_UART_USART6_RX_DMA_STREAM STM32_DMA_STREAM_ID(2, 2)
328#define STM32_UART_USART6_TX_DMA_STREAM STM32_DMA_STREAM_ID(2, 7) 348#define STM32_UART_USART6_TX_DMA_STREAM STM32_DMA_STREAM_ID(2, 7)
329#define STM32_UART_USART1_IRQ_PRIORITY 12
330#define STM32_UART_USART2_IRQ_PRIORITY 12
331#define STM32_UART_USART3_IRQ_PRIORITY 12
332#define STM32_UART_UART4_IRQ_PRIORITY 12
333#define STM32_UART_UART5_IRQ_PRIORITY 12
334#define STM32_UART_USART6_IRQ_PRIORITY 12
335#define STM32_UART_USART1_DMA_PRIORITY 0 349#define STM32_UART_USART1_DMA_PRIORITY 0
336#define STM32_UART_USART2_DMA_PRIORITY 0 350#define STM32_UART_USART2_DMA_PRIORITY 0
337#define STM32_UART_USART3_DMA_PRIORITY 0 351#define STM32_UART_USART3_DMA_PRIORITY 0
@@ -349,9 +363,7 @@
349#define STM32_USB_OTG2_IRQ_PRIORITY 14 363#define STM32_USB_OTG2_IRQ_PRIORITY 14
350#define STM32_USB_OTG1_RX_FIFO_SIZE 512 364#define STM32_USB_OTG1_RX_FIFO_SIZE 512
351#define STM32_USB_OTG2_RX_FIFO_SIZE 1024 365#define STM32_USB_OTG2_RX_FIFO_SIZE 1024
352#define STM32_USB_OTG_THREAD_PRIO LOWPRIO 366#define STM32_USB_HOST_WAKEUP_DURATION 2
353#define STM32_USB_OTG_THREAD_STACK_SIZE 128
354#define STM32_USB_OTGFIFO_FILL_BASEPRI 0
355 367
356/* 368/*
357 * WDG driver system settings. 369 * WDG driver system settings.
diff --git a/platforms/chibios/boards/GENERIC_STM32_G431XB/configs/mcuconf.h b/platforms/chibios/boards/GENERIC_STM32_G431XB/configs/mcuconf.h
index 182d4885d..d11502830 100644
--- a/platforms/chibios/boards/GENERIC_STM32_G431XB/configs/mcuconf.h
+++ b/platforms/chibios/boards/GENERIC_STM32_G431XB/configs/mcuconf.h
@@ -40,9 +40,24 @@
40 */ 40 */
41#define STM32_NO_INIT FALSE 41#define STM32_NO_INIT FALSE
42#define STM32_VOS STM32_VOS_RANGE1 42#define STM32_VOS STM32_VOS_RANGE1
43#define STM32_PWR_BOOST TRUE
43#define STM32_PWR_CR2 (PWR_CR2_PLS_LEV0) 44#define STM32_PWR_CR2 (PWR_CR2_PLS_LEV0)
44#define STM32_PWR_CR3 (PWR_CR3_EIWF) 45#define STM32_PWR_CR3 (PWR_CR3_EIWF)
45#define STM32_PWR_CR4 (0U) 46#define STM32_PWR_CR4 (0U)
47#define STM32_PWR_PUCRA (0U)
48#define STM32_PWR_PDCRA (0U)
49#define STM32_PWR_PUCRB (0U)
50#define STM32_PWR_PDCRB (0U)
51#define STM32_PWR_PUCRC (0U)
52#define STM32_PWR_PDCRC (0U)
53#define STM32_PWR_PUCRD (0U)
54#define STM32_PWR_PDCRD (0U)
55#define STM32_PWR_PUCRE (0U)
56#define STM32_PWR_PDCRE (0U)
57#define STM32_PWR_PUCRF (0U)
58#define STM32_PWR_PDCRF (0U)
59#define STM32_PWR_PUCRG (0U)
60#define STM32_PWR_PDCRG (0U)
46#define STM32_HSI16_ENABLED TRUE 61#define STM32_HSI16_ENABLED TRUE
47#define STM32_HSI48_ENABLED TRUE 62#define STM32_HSI48_ENABLED TRUE
48#define STM32_HSE_ENABLED FALSE 63#define STM32_HSE_ENABLED FALSE
diff --git a/platforms/chibios/boards/GENERIC_STM32_G474XE/configs/mcuconf.h b/platforms/chibios/boards/GENERIC_STM32_G474XE/configs/mcuconf.h
index 117e920e3..5710e2cb4 100644
--- a/platforms/chibios/boards/GENERIC_STM32_G474XE/configs/mcuconf.h
+++ b/platforms/chibios/boards/GENERIC_STM32_G474XE/configs/mcuconf.h
@@ -42,9 +42,24 @@
42 */ 42 */
43#define STM32_NO_INIT FALSE 43#define STM32_NO_INIT FALSE
44#define STM32_VOS STM32_VOS_RANGE1 44#define STM32_VOS STM32_VOS_RANGE1
45#define STM32_PWR_BOOST TRUE
45#define STM32_PWR_CR2 (PWR_CR2_PLS_LEV0) 46#define STM32_PWR_CR2 (PWR_CR2_PLS_LEV0)
46#define STM32_PWR_CR3 (PWR_CR3_EIWF) 47#define STM32_PWR_CR3 (PWR_CR3_EIWF)
47#define STM32_PWR_CR4 (0U) 48#define STM32_PWR_CR4 (0U)
49#define STM32_PWR_PUCRA (0U)
50#define STM32_PWR_PDCRA (0U)
51#define STM32_PWR_PUCRB (0U)
52#define STM32_PWR_PDCRB (0U)
53#define STM32_PWR_PUCRC (0U)
54#define STM32_PWR_PDCRC (0U)
55#define STM32_PWR_PUCRD (0U)
56#define STM32_PWR_PDCRD (0U)
57#define STM32_PWR_PUCRE (0U)
58#define STM32_PWR_PDCRE (0U)
59#define STM32_PWR_PUCRF (0U)
60#define STM32_PWR_PDCRF (0U)
61#define STM32_PWR_PUCRG (0U)
62#define STM32_PWR_PDCRG (0U)
48#define STM32_HSI16_ENABLED TRUE 63#define STM32_HSI16_ENABLED TRUE
49#define STM32_HSI48_ENABLED TRUE 64#define STM32_HSI48_ENABLED TRUE
50#define STM32_HSE_ENABLED FALSE 65#define STM32_HSE_ENABLED FALSE
diff --git a/platforms/chibios/boards/QMK_PROTON_C/configs/chconf.h b/platforms/chibios/boards/QMK_PROTON_C/configs/chconf.h
index a1cbf6808..f81233296 100644
--- a/platforms/chibios/boards/QMK_PROTON_C/configs/chconf.h
+++ b/platforms/chibios/boards/QMK_PROTON_C/configs/chconf.h
@@ -40,7 +40,7 @@
40 40
41/** 41/**
42 * @brief System time counter resolution. 42 * @brief System time counter resolution.
43 * @note Allowed values are 16 or 32 bits. 43 * @note Allowed values are 16, 32 or 64 bits.
44 */ 44 */
45#if !defined(CH_CFG_ST_RESOLUTION) 45#if !defined(CH_CFG_ST_RESOLUTION)
46#define CH_CFG_ST_RESOLUTION 32 46#define CH_CFG_ST_RESOLUTION 32
diff --git a/platforms/chibios/boards/common/configs/chconf.h b/platforms/chibios/boards/common/configs/chconf.h
index 44327a82d..18ad609ca 100644
--- a/platforms/chibios/boards/common/configs/chconf.h
+++ b/platforms/chibios/boards/common/configs/chconf.h
@@ -40,7 +40,7 @@
40 40
41/** 41/**
42 * @brief System time counter resolution. 42 * @brief System time counter resolution.
43 * @note Allowed values are 16 or 32 bits. 43 * @note Allowed values are 16, 32 or 64 bits.
44 */ 44 */
45#if !defined(CH_CFG_ST_RESOLUTION) 45#if !defined(CH_CFG_ST_RESOLUTION)
46#define CH_CFG_ST_RESOLUTION 32 46#define CH_CFG_ST_RESOLUTION 32
generated by cgit v1.2.3 (git 2.25.1) at 2025-07-05 17:16:54 +0000