diff options
Diffstat (limited to 'quantum/split_common/serial.c')
-rw-r--r-- | quantum/split_common/serial.c | 505 |
1 files changed, 387 insertions, 118 deletions
diff --git a/quantum/split_common/serial.c b/quantum/split_common/serial.c index 13e58d825..4df8d103b 100644 --- a/quantum/split_common/serial.c +++ b/quantum/split_common/serial.c | |||
@@ -1,5 +1,10 @@ | |||
1 | /* | 1 | /* |
2 | * WARNING: be careful changing this code, it is very timing dependent | 2 | * WARNING: be careful changing this code, it is very timing dependent |
3 | * | ||
4 | * 2018-10-28 checked | ||
5 | * avr-gcc 4.9.2 | ||
6 | * avr-gcc 5.4.0 | ||
7 | * avr-gcc 7.3.0 | ||
3 | */ | 8 | */ |
4 | 9 | ||
5 | #ifndef F_CPU | 10 | #ifndef F_CPU |
@@ -9,17 +14,19 @@ | |||
9 | #include <avr/io.h> | 14 | #include <avr/io.h> |
10 | #include <avr/interrupt.h> | 15 | #include <avr/interrupt.h> |
11 | #include <util/delay.h> | 16 | #include <util/delay.h> |
17 | #include <stddef.h> | ||
12 | #include <stdbool.h> | 18 | #include <stdbool.h> |
13 | #include "serial.h" | 19 | #include "serial.h" |
20 | //#include <pro_micro.h> | ||
14 | 21 | ||
15 | #ifdef SOFT_SERIAL_PIN | 22 | #ifdef SOFT_SERIAL_PIN |
16 | 23 | ||
17 | #ifdef __AVR_ATmega32U4__ | 24 | #ifdef __AVR_ATmega32U4__ |
18 | // if using ATmega32U4 I2C, can not use PD0 and PD1 in soft serial. | 25 | // if using ATmega32U4 I2C, can not use PD0 and PD1 in soft serial. |
19 | #ifdef USE_AVR_I2C | 26 | #ifdef USE_AVR_I2C |
20 | #if SOFT_SERIAL_PIN == D0 || SOFT_SERIAL_PIN == D1 | 27 | #if SOFT_SERIAL_PIN == D0 || SOFT_SERIAL_PIN == D1 |
21 | #error Using ATmega32U4 I2C, so can not use PD0, PD1 | 28 | #error Using ATmega32U4 I2C, so can not use PD0, PD1 |
22 | #endif | 29 | #endif |
23 | #endif | 30 | #endif |
24 | 31 | ||
25 | #if SOFT_SERIAL_PIN >= D0 && SOFT_SERIAL_PIN <= D3 | 32 | #if SOFT_SERIAL_PIN >= D0 && SOFT_SERIAL_PIN <= D3 |
@@ -63,215 +70,477 @@ | |||
63 | #error serial.c now support ATmega32U4 only | 70 | #error serial.c now support ATmega32U4 only |
64 | #endif | 71 | #endif |
65 | 72 | ||
66 | // Serial pulse period in microseconds. Its probably a bad idea to lower this | 73 | #define ALWAYS_INLINE __attribute__((always_inline)) |
67 | // value. | 74 | #define NO_INLINE __attribute__((noinline)) |
68 | #define SERIAL_DELAY 24 | 75 | #define _delay_sub_us(x) __builtin_avr_delay_cycles(x) |
76 | |||
77 | // parity check | ||
78 | #define ODD_PARITY 1 | ||
79 | #define EVEN_PARITY 0 | ||
80 | #define PARITY EVEN_PARITY | ||
81 | |||
82 | #ifdef SERIAL_DELAY | ||
83 | // custom setup in config.h | ||
84 | // #define TID_SEND_ADJUST 2 | ||
85 | // #define SERIAL_DELAY 6 // micro sec | ||
86 | // #define READ_WRITE_START_ADJUST 30 // cycles | ||
87 | // #define READ_WRITE_WIDTH_ADJUST 8 // cycles | ||
88 | #else | ||
89 | // ============ Standard setups ============ | ||
90 | |||
91 | #ifndef SELECT_SOFT_SERIAL_SPEED | ||
92 | #define SELECT_SOFT_SERIAL_SPEED 1 | ||
93 | // 0: about 189kbps (Experiment only) | ||
94 | // 1: about 137kbps (default) | ||
95 | // 2: about 75kbps | ||
96 | // 3: about 39kbps | ||
97 | // 4: about 26kbps | ||
98 | // 5: about 20kbps | ||
99 | #endif | ||
69 | 100 | ||
70 | uint8_t volatile serial_slave_buffer[SERIAL_SLAVE_BUFFER_LENGTH] = {0}; | 101 | #if __GNUC__ < 6 |
71 | uint8_t volatile serial_master_buffer[SERIAL_MASTER_BUFFER_LENGTH] = {0}; | 102 | #define TID_SEND_ADJUST 14 |
103 | #else | ||
104 | #define TID_SEND_ADJUST 2 | ||
105 | #endif | ||
72 | 106 | ||
73 | #define SLAVE_DATA_CORRUPT (1<<0) | 107 | #if SELECT_SOFT_SERIAL_SPEED == 0 |
74 | volatile uint8_t status = 0; | 108 | // Very High speed |
109 | #define SERIAL_DELAY 4 // micro sec | ||
110 | #if __GNUC__ < 6 | ||
111 | #define READ_WRITE_START_ADJUST 33 // cycles | ||
112 | #define READ_WRITE_WIDTH_ADJUST 3 // cycles | ||
113 | #else | ||
114 | #define READ_WRITE_START_ADJUST 34 // cycles | ||
115 | #define READ_WRITE_WIDTH_ADJUST 7 // cycles | ||
116 | #endif | ||
117 | #elif SELECT_SOFT_SERIAL_SPEED == 1 | ||
118 | // High speed | ||
119 | #define SERIAL_DELAY 6 // micro sec | ||
120 | #if __GNUC__ < 6 | ||
121 | #define READ_WRITE_START_ADJUST 30 // cycles | ||
122 | #define READ_WRITE_WIDTH_ADJUST 3 // cycles | ||
123 | #else | ||
124 | #define READ_WRITE_START_ADJUST 33 // cycles | ||
125 | #define READ_WRITE_WIDTH_ADJUST 7 // cycles | ||
126 | #endif | ||
127 | #elif SELECT_SOFT_SERIAL_SPEED == 2 | ||
128 | // Middle speed | ||
129 | #define SERIAL_DELAY 12 // micro sec | ||
130 | #define READ_WRITE_START_ADJUST 30 // cycles | ||
131 | #if __GNUC__ < 6 | ||
132 | #define READ_WRITE_WIDTH_ADJUST 3 // cycles | ||
133 | #else | ||
134 | #define READ_WRITE_WIDTH_ADJUST 7 // cycles | ||
135 | #endif | ||
136 | #elif SELECT_SOFT_SERIAL_SPEED == 3 | ||
137 | // Low speed | ||
138 | #define SERIAL_DELAY 24 // micro sec | ||
139 | #define READ_WRITE_START_ADJUST 30 // cycles | ||
140 | #if __GNUC__ < 6 | ||
141 | #define READ_WRITE_WIDTH_ADJUST 3 // cycles | ||
142 | #else | ||
143 | #define READ_WRITE_WIDTH_ADJUST 7 // cycles | ||
144 | #endif | ||
145 | #elif SELECT_SOFT_SERIAL_SPEED == 4 | ||
146 | // Very Low speed | ||
147 | #define SERIAL_DELAY 36 // micro sec | ||
148 | #define READ_WRITE_START_ADJUST 30 // cycles | ||
149 | #if __GNUC__ < 6 | ||
150 | #define READ_WRITE_WIDTH_ADJUST 3 // cycles | ||
151 | #else | ||
152 | #define READ_WRITE_WIDTH_ADJUST 7 // cycles | ||
153 | #endif | ||
154 | #elif SELECT_SOFT_SERIAL_SPEED == 5 | ||
155 | // Ultra Low speed | ||
156 | #define SERIAL_DELAY 48 // micro sec | ||
157 | #define READ_WRITE_START_ADJUST 30 // cycles | ||
158 | #if __GNUC__ < 6 | ||
159 | #define READ_WRITE_WIDTH_ADJUST 3 // cycles | ||
160 | #else | ||
161 | #define READ_WRITE_WIDTH_ADJUST 7 // cycles | ||
162 | #endif | ||
163 | #else | ||
164 | #error invalid SELECT_SOFT_SERIAL_SPEED value | ||
165 | #endif /* SELECT_SOFT_SERIAL_SPEED */ | ||
166 | #endif /* SERIAL_DELAY */ | ||
167 | |||
168 | #define SERIAL_DELAY_HALF1 (SERIAL_DELAY/2) | ||
169 | #define SERIAL_DELAY_HALF2 (SERIAL_DELAY - SERIAL_DELAY/2) | ||
75 | 170 | ||
171 | #define SLAVE_INT_WIDTH_US 1 | ||
172 | #ifndef SERIAL_USE_MULTI_TRANSACTION | ||
173 | #define SLAVE_INT_RESPONSE_TIME SERIAL_DELAY | ||
174 | #else | ||
175 | #define SLAVE_INT_ACK_WIDTH_UNIT 2 | ||
176 | #define SLAVE_INT_ACK_WIDTH 4 | ||
177 | #endif | ||
178 | |||
179 | static SSTD_t *Transaction_table = NULL; | ||
180 | static uint8_t Transaction_table_size = 0; | ||
181 | |||
182 | inline static void serial_delay(void) ALWAYS_INLINE; | ||
76 | inline static | 183 | inline static |
77 | void serial_delay(void) { | 184 | void serial_delay(void) { |
78 | _delay_us(SERIAL_DELAY); | 185 | _delay_us(SERIAL_DELAY); |
79 | } | 186 | } |
80 | 187 | ||
188 | inline static void serial_delay_half1(void) ALWAYS_INLINE; | ||
189 | inline static | ||
190 | void serial_delay_half1(void) { | ||
191 | _delay_us(SERIAL_DELAY_HALF1); | ||
192 | } | ||
193 | |||
194 | inline static void serial_delay_half2(void) ALWAYS_INLINE; | ||
195 | inline static | ||
196 | void serial_delay_half2(void) { | ||
197 | _delay_us(SERIAL_DELAY_HALF2); | ||
198 | } | ||
199 | |||
200 | inline static void serial_output(void) ALWAYS_INLINE; | ||
81 | inline static | 201 | inline static |
82 | void serial_output(void) { | 202 | void serial_output(void) { |
83 | SERIAL_PIN_DDR |= SERIAL_PIN_MASK; | 203 | SERIAL_PIN_DDR |= SERIAL_PIN_MASK; |
84 | } | 204 | } |
85 | 205 | ||
86 | // make the serial pin an input with pull-up resistor | 206 | // make the serial pin an input with pull-up resistor |
207 | inline static void serial_input_with_pullup(void) ALWAYS_INLINE; | ||
87 | inline static | 208 | inline static |
88 | void serial_input(void) { | 209 | void serial_input_with_pullup(void) { |
89 | SERIAL_PIN_DDR &= ~SERIAL_PIN_MASK; | 210 | SERIAL_PIN_DDR &= ~SERIAL_PIN_MASK; |
90 | SERIAL_PIN_PORT |= SERIAL_PIN_MASK; | 211 | SERIAL_PIN_PORT |= SERIAL_PIN_MASK; |
91 | } | 212 | } |
92 | 213 | ||
214 | inline static uint8_t serial_read_pin(void) ALWAYS_INLINE; | ||
93 | inline static | 215 | inline static |
94 | uint8_t serial_read_pin(void) { | 216 | uint8_t serial_read_pin(void) { |
95 | return !!(SERIAL_PIN_INPUT & SERIAL_PIN_MASK); | 217 | return !!(SERIAL_PIN_INPUT & SERIAL_PIN_MASK); |
96 | } | 218 | } |
97 | 219 | ||
220 | inline static void serial_low(void) ALWAYS_INLINE; | ||
98 | inline static | 221 | inline static |
99 | void serial_low(void) { | 222 | void serial_low(void) { |
100 | SERIAL_PIN_PORT &= ~SERIAL_PIN_MASK; | 223 | SERIAL_PIN_PORT &= ~SERIAL_PIN_MASK; |
101 | } | 224 | } |
102 | 225 | ||
226 | inline static void serial_high(void) ALWAYS_INLINE; | ||
103 | inline static | 227 | inline static |
104 | void serial_high(void) { | 228 | void serial_high(void) { |
105 | SERIAL_PIN_PORT |= SERIAL_PIN_MASK; | 229 | SERIAL_PIN_PORT |= SERIAL_PIN_MASK; |
106 | } | 230 | } |
107 | 231 | ||
108 | void serial_master_init(void) { | 232 | void soft_serial_initiator_init(SSTD_t *sstd_table, int sstd_table_size) |
109 | serial_output(); | 233 | { |
110 | serial_high(); | 234 | Transaction_table = sstd_table; |
235 | Transaction_table_size = (uint8_t)sstd_table_size; | ||
236 | serial_output(); | ||
237 | serial_high(); | ||
111 | } | 238 | } |
112 | 239 | ||
113 | void serial_slave_init(void) { | 240 | void soft_serial_target_init(SSTD_t *sstd_table, int sstd_table_size) |
114 | serial_input(); | 241 | { |
115 | 242 | Transaction_table = sstd_table; | |
116 | // Enable INT0 | 243 | Transaction_table_size = (uint8_t)sstd_table_size; |
117 | EIMSK |= _BV(INT0); | 244 | serial_input_with_pullup(); |
118 | // Trigger on falling edge of INT0 | 245 | |
119 | EICRA &= ~(_BV(ISC00) | _BV(ISC01)); | 246 | // Enable INT0-INT3,INT6 |
247 | EIMSK |= EIMSK_BIT; | ||
248 | #if SERIAL_PIN_MASK == _BV(PE6) | ||
249 | // Trigger on falling edge of INT6 | ||
250 | EICRB &= EICRx_BIT; | ||
251 | #else | ||
252 | // Trigger on falling edge of INT0-INT3 | ||
253 | EICRA &= EICRx_BIT; | ||
254 | #endif | ||
120 | } | 255 | } |
121 | 256 | ||
122 | // Used by the master to synchronize timing with the slave. | 257 | // Used by the sender to synchronize timing with the reciver. |
258 | static void sync_recv(void) NO_INLINE; | ||
123 | static | 259 | static |
124 | void sync_recv(void) { | 260 | void sync_recv(void) { |
125 | serial_input(); | 261 | for (uint8_t i = 0; i < SERIAL_DELAY*5 && serial_read_pin(); i++ ) { |
126 | // This shouldn't hang if the slave disconnects because the | 262 | } |
127 | // serial line will float to high if the slave does disconnect. | 263 | // This shouldn't hang if the target disconnects because the |
264 | // serial line will float to high if the target does disconnect. | ||
128 | while (!serial_read_pin()); | 265 | while (!serial_read_pin()); |
129 | serial_delay(); | ||
130 | } | 266 | } |
131 | 267 | ||
132 | // Used by the slave to send a synchronization signal to the master. | 268 | // Used by the reciver to send a synchronization signal to the sender. |
269 | static void sync_send(void) NO_INLINE; | ||
133 | static | 270 | static |
134 | void sync_send(void) { | 271 | void sync_send(void) { |
135 | serial_output(); | ||
136 | |||
137 | serial_low(); | 272 | serial_low(); |
138 | serial_delay(); | 273 | serial_delay(); |
139 | |||
140 | serial_high(); | 274 | serial_high(); |
141 | } | 275 | } |
142 | 276 | ||
143 | // Reads a byte from the serial line | 277 | // Reads a byte from the serial line |
144 | static | 278 | static uint8_t serial_read_chunk(uint8_t *pterrcount, uint8_t bit) NO_INLINE; |
145 | uint8_t serial_read_byte(void) { | 279 | static uint8_t serial_read_chunk(uint8_t *pterrcount, uint8_t bit) { |
146 | uint8_t byte = 0; | 280 | uint8_t byte, i, p, pb; |
147 | serial_input(); | 281 | |
148 | for ( uint8_t i = 0; i < 8; ++i) { | 282 | _delay_sub_us(READ_WRITE_START_ADJUST); |
149 | byte = (byte << 1) | serial_read_pin(); | 283 | for( i = 0, byte = 0, p = PARITY; i < bit; i++ ) { |
150 | serial_delay(); | 284 | serial_delay_half1(); // read the middle of pulses |
151 | _delay_us(1); | 285 | if( serial_read_pin() ) { |
286 | byte = (byte << 1) | 1; p ^= 1; | ||
287 | } else { | ||
288 | byte = (byte << 1) | 0; p ^= 0; | ||
289 | } | ||
290 | _delay_sub_us(READ_WRITE_WIDTH_ADJUST); | ||
291 | serial_delay_half2(); | ||
152 | } | 292 | } |
293 | /* recive parity bit */ | ||
294 | serial_delay_half1(); // read the middle of pulses | ||
295 | pb = serial_read_pin(); | ||
296 | _delay_sub_us(READ_WRITE_WIDTH_ADJUST); | ||
297 | serial_delay_half2(); | ||
298 | |||
299 | *pterrcount += (p != pb)? 1 : 0; | ||
153 | 300 | ||
154 | return byte; | 301 | return byte; |
155 | } | 302 | } |
156 | 303 | ||
157 | // Sends a byte with MSB ordering | 304 | // Sends a byte with MSB ordering |
158 | static | 305 | void serial_write_chunk(uint8_t data, uint8_t bit) NO_INLINE; |
159 | void serial_write_byte(uint8_t data) { | 306 | void serial_write_chunk(uint8_t data, uint8_t bit) { |
160 | uint8_t b = 8; | 307 | uint8_t b, p; |
161 | serial_output(); | 308 | for( p = PARITY, b = 1<<(bit-1); b ; b >>= 1) { |
162 | while( b-- ) { | 309 | if(data & b) { |
163 | if(data & (1 << b)) { | 310 | serial_high(); p ^= 1; |
164 | serial_high(); | 311 | } else { |
165 | } else { | 312 | serial_low(); p ^= 0; |
166 | serial_low(); | 313 | } |
314 | serial_delay(); | ||
167 | } | 315 | } |
316 | /* send parity bit */ | ||
317 | if(p & 1) { serial_high(); } | ||
318 | else { serial_low(); } | ||
168 | serial_delay(); | 319 | serial_delay(); |
169 | } | ||
170 | } | ||
171 | 320 | ||
172 | // interrupt handle to be used by the slave device | 321 | serial_low(); // sync_send() / senc_recv() need raise edge |
173 | ISR(SERIAL_PIN_INTERRUPT) { | 322 | } |
174 | sync_send(); | ||
175 | 323 | ||
176 | uint8_t checksum = 0; | 324 | static void serial_send_packet(uint8_t *buffer, uint8_t size) NO_INLINE; |
177 | for (int i = 0; i < SERIAL_SLAVE_BUFFER_LENGTH; ++i) { | 325 | static |
178 | serial_write_byte(serial_slave_buffer[i]); | 326 | void serial_send_packet(uint8_t *buffer, uint8_t size) { |
327 | for (uint8_t i = 0; i < size; ++i) { | ||
328 | uint8_t data; | ||
329 | data = buffer[i]; | ||
179 | sync_send(); | 330 | sync_send(); |
180 | checksum += serial_slave_buffer[i]; | 331 | serial_write_chunk(data,8); |
181 | } | 332 | } |
182 | serial_write_byte(checksum); | 333 | } |
183 | sync_send(); | ||
184 | 334 | ||
185 | // wait for the sync to finish sending | 335 | static uint8_t serial_recive_packet(uint8_t *buffer, uint8_t size) NO_INLINE; |
186 | serial_delay(); | 336 | static |
337 | uint8_t serial_recive_packet(uint8_t *buffer, uint8_t size) { | ||
338 | uint8_t pecount = 0; | ||
339 | for (uint8_t i = 0; i < size; ++i) { | ||
340 | uint8_t data; | ||
341 | sync_recv(); | ||
342 | data = serial_read_chunk(&pecount, 8); | ||
343 | buffer[i] = data; | ||
344 | } | ||
345 | return pecount == 0; | ||
346 | } | ||
187 | 347 | ||
188 | // read the middle of pulses | 348 | inline static |
189 | _delay_us(SERIAL_DELAY/2); | 349 | void change_sender2reciver(void) { |
350 | sync_send(); //0 | ||
351 | serial_delay_half1(); //1 | ||
352 | serial_low(); //2 | ||
353 | serial_input_with_pullup(); //2 | ||
354 | serial_delay_half1(); //3 | ||
355 | } | ||
190 | 356 | ||
191 | uint8_t checksum_computed = 0; | 357 | inline static |
192 | for (int i = 0; i < SERIAL_MASTER_BUFFER_LENGTH; ++i) { | 358 | void change_reciver2sender(void) { |
193 | serial_master_buffer[i] = serial_read_byte(); | 359 | sync_recv(); //0 |
194 | sync_send(); | 360 | serial_delay(); //1 |
195 | checksum_computed += serial_master_buffer[i]; | 361 | serial_low(); //3 |
362 | serial_output(); //3 | ||
363 | serial_delay_half1(); //4 | ||
364 | } | ||
365 | |||
366 | static inline uint8_t nibble_bits_count(uint8_t bits) | ||
367 | { | ||
368 | bits = (bits & 0x5) + (bits >> 1 & 0x5); | ||
369 | bits = (bits & 0x3) + (bits >> 2 & 0x3); | ||
370 | return bits; | ||
371 | } | ||
372 | |||
373 | // interrupt handle to be used by the target device | ||
374 | ISR(SERIAL_PIN_INTERRUPT) { | ||
375 | |||
376 | #ifndef SERIAL_USE_MULTI_TRANSACTION | ||
377 | serial_low(); | ||
378 | serial_output(); | ||
379 | SSTD_t *trans = Transaction_table; | ||
380 | #else | ||
381 | // recive transaction table index | ||
382 | uint8_t tid, bits; | ||
383 | uint8_t pecount = 0; | ||
384 | sync_recv(); | ||
385 | bits = serial_read_chunk(&pecount,7); | ||
386 | tid = bits>>3; | ||
387 | bits = (bits&7) != nibble_bits_count(tid); | ||
388 | if( bits || pecount> 0 || tid > Transaction_table_size ) { | ||
389 | return; | ||
196 | } | 390 | } |
197 | uint8_t checksum_received = serial_read_byte(); | 391 | serial_delay_half1(); |
198 | sync_send(); | ||
199 | 392 | ||
200 | serial_input(); // end transaction | 393 | serial_high(); // response step1 low->high |
394 | serial_output(); | ||
395 | _delay_sub_us(SLAVE_INT_ACK_WIDTH_UNIT*SLAVE_INT_ACK_WIDTH); | ||
396 | SSTD_t *trans = &Transaction_table[tid]; | ||
397 | serial_low(); // response step2 ack high->low | ||
398 | #endif | ||
201 | 399 | ||
202 | if ( checksum_computed != checksum_received ) { | 400 | // target send phase |
203 | status |= SLAVE_DATA_CORRUPT; | 401 | if( trans->target2initiator_buffer_size > 0 ) |
402 | serial_send_packet((uint8_t *)trans->target2initiator_buffer, | ||
403 | trans->target2initiator_buffer_size); | ||
404 | // target switch to input | ||
405 | change_sender2reciver(); | ||
406 | |||
407 | // target recive phase | ||
408 | if( trans->initiator2target_buffer_size > 0 ) { | ||
409 | if (serial_recive_packet((uint8_t *)trans->initiator2target_buffer, | ||
410 | trans->initiator2target_buffer_size) ) { | ||
411 | *trans->status = TRANSACTION_ACCEPTED; | ||
412 | } else { | ||
413 | *trans->status = TRANSACTION_DATA_ERROR; | ||
414 | } | ||
204 | } else { | 415 | } else { |
205 | status &= ~SLAVE_DATA_CORRUPT; | 416 | *trans->status = TRANSACTION_ACCEPTED; |
206 | } | 417 | } |
207 | } | ||
208 | 418 | ||
209 | inline | 419 | sync_recv(); //weit initiator output to high |
210 | bool serial_slave_DATA_CORRUPT(void) { | ||
211 | return status & SLAVE_DATA_CORRUPT; | ||
212 | } | 420 | } |
213 | 421 | ||
214 | // Copies the serial_slave_buffer to the master and sends the | 422 | ///////// |
215 | // serial_master_buffer to the slave. | 423 | // start transaction by initiator |
424 | // | ||
425 | // int soft_serial_transaction(int sstd_index) | ||
216 | // | 426 | // |
217 | // Returns: | 427 | // Returns: |
218 | // 0 => no error | 428 | // TRANSACTION_END |
219 | // 1 => slave did not respond | 429 | // TRANSACTION_NO_RESPONSE |
220 | int serial_update_buffers(void) { | 430 | // TRANSACTION_DATA_ERROR |
221 | // this code is very time dependent, so we need to disable interrupts | 431 | // this code is very time dependent, so we need to disable interrupts |
432 | #ifndef SERIAL_USE_MULTI_TRANSACTION | ||
433 | int soft_serial_transaction(void) { | ||
434 | SSTD_t *trans = Transaction_table; | ||
435 | #else | ||
436 | int soft_serial_transaction(int sstd_index) { | ||
437 | if( sstd_index > Transaction_table_size ) | ||
438 | return TRANSACTION_TYPE_ERROR; | ||
439 | SSTD_t *trans = &Transaction_table[sstd_index]; | ||
440 | #endif | ||
222 | cli(); | 441 | cli(); |
223 | 442 | ||
224 | // signal to the slave that we want to start a transaction | 443 | // signal to the target that we want to start a transaction |
225 | serial_output(); | 444 | serial_output(); |
226 | serial_low(); | 445 | serial_low(); |
227 | _delay_us(1); | 446 | _delay_us(SLAVE_INT_WIDTH_US); |
228 | 447 | ||
229 | // wait for the slaves response | 448 | #ifndef SERIAL_USE_MULTI_TRANSACTION |
230 | serial_input(); | 449 | // wait for the target response |
231 | serial_high(); | 450 | serial_input_with_pullup(); |
232 | _delay_us(SERIAL_DELAY); | 451 | _delay_us(SLAVE_INT_RESPONSE_TIME); |
233 | 452 | ||
234 | // check if the slave is present | 453 | // check if the target is present |
235 | if (serial_read_pin()) { | 454 | if (serial_read_pin()) { |
236 | // slave failed to pull the line low, assume not present | 455 | // target failed to pull the line low, assume not present |
456 | serial_output(); | ||
457 | serial_high(); | ||
458 | *trans->status = TRANSACTION_NO_RESPONSE; | ||
237 | sei(); | 459 | sei(); |
238 | return 1; | 460 | return TRANSACTION_NO_RESPONSE; |
239 | } | 461 | } |
240 | 462 | ||
241 | // if the slave is present syncronize with it | 463 | #else |
242 | sync_recv(); | 464 | // send transaction table index |
243 | 465 | int tid = (sstd_index<<3) | (7 & nibble_bits_count(sstd_index)); | |
244 | uint8_t checksum_computed = 0; | 466 | sync_send(); |
245 | // receive data from the slave | 467 | _delay_sub_us(TID_SEND_ADJUST); |
246 | for (int i = 0; i < SERIAL_SLAVE_BUFFER_LENGTH; ++i) { | 468 | serial_write_chunk(tid, 7); |
247 | serial_slave_buffer[i] = serial_read_byte(); | 469 | serial_delay_half1(); |
248 | sync_recv(); | 470 | |
249 | checksum_computed += serial_slave_buffer[i]; | 471 | // wait for the target response (step1 low->high) |
472 | serial_input_with_pullup(); | ||
473 | while( !serial_read_pin() ) { | ||
474 | _delay_sub_us(2); | ||
250 | } | 475 | } |
251 | uint8_t checksum_received = serial_read_byte(); | ||
252 | sync_recv(); | ||
253 | 476 | ||
254 | if (checksum_computed != checksum_received) { | 477 | // check if the target is present (step2 high->low) |
255 | sei(); | 478 | for( int i = 0; serial_read_pin(); i++ ) { |
256 | return 1; | 479 | if (i > SLAVE_INT_ACK_WIDTH + 1) { |
480 | // slave failed to pull the line low, assume not present | ||
481 | serial_output(); | ||
482 | serial_high(); | ||
483 | *trans->status = TRANSACTION_NO_RESPONSE; | ||
484 | sei(); | ||
485 | return TRANSACTION_NO_RESPONSE; | ||
486 | } | ||
487 | _delay_sub_us(SLAVE_INT_ACK_WIDTH_UNIT); | ||
257 | } | 488 | } |
489 | #endif | ||
258 | 490 | ||
259 | uint8_t checksum = 0; | 491 | // initiator recive phase |
260 | // send data to the slave | 492 | // if the target is present syncronize with it |
261 | for (int i = 0; i < SERIAL_MASTER_BUFFER_LENGTH; ++i) { | 493 | if( trans->target2initiator_buffer_size > 0 ) { |
262 | serial_write_byte(serial_master_buffer[i]); | 494 | if (!serial_recive_packet((uint8_t *)trans->target2initiator_buffer, |
263 | sync_recv(); | 495 | trans->target2initiator_buffer_size) ) { |
264 | checksum += serial_master_buffer[i]; | 496 | serial_output(); |
497 | serial_high(); | ||
498 | *trans->status = TRANSACTION_DATA_ERROR; | ||
499 | sei(); | ||
500 | return TRANSACTION_DATA_ERROR; | ||
501 | } | ||
502 | } | ||
503 | |||
504 | // initiator switch to output | ||
505 | change_reciver2sender(); | ||
506 | |||
507 | // initiator send phase | ||
508 | if( trans->initiator2target_buffer_size > 0 ) { | ||
509 | serial_send_packet((uint8_t *)trans->initiator2target_buffer, | ||
510 | trans->initiator2target_buffer_size); | ||
265 | } | 511 | } |
266 | serial_write_byte(checksum); | ||
267 | sync_recv(); | ||
268 | 512 | ||
269 | // always, release the line when not in use | 513 | // always, release the line when not in use |
270 | serial_output(); | 514 | sync_send(); |
271 | serial_high(); | ||
272 | 515 | ||
516 | *trans->status = TRANSACTION_END; | ||
273 | sei(); | 517 | sei(); |
274 | return 0; | 518 | return TRANSACTION_END; |
275 | } | 519 | } |
276 | 520 | ||
277 | #endif /* SOFT_SERIAL_PIN */ | 521 | #ifdef SERIAL_USE_MULTI_TRANSACTION |
522 | int soft_serial_get_and_clean_status(int sstd_index) { | ||
523 | SSTD_t *trans = &Transaction_table[sstd_index]; | ||
524 | cli(); | ||
525 | int retval = *trans->status; | ||
526 | *trans->status = 0;; | ||
527 | sei(); | ||
528 | return retval; | ||
529 | } | ||
530 | #endif | ||
531 | |||
532 | #endif | ||
533 | |||
534 | // Helix serial.c history | ||
535 | // 2018-1-29 fork from let's split and add PD2, modify sync_recv() (#2308, bceffdefc) | ||
536 | // 2018-6-28 bug fix master to slave comm and speed up (#3255, 1038bbef4) | ||
537 | // (adjusted with avr-gcc 4.9.2) | ||
538 | // 2018-7-13 remove USE_SERIAL_PD2 macro (#3374, f30d6dd78) | ||
539 | // (adjusted with avr-gcc 4.9.2) | ||
540 | // 2018-8-11 add support multi-type transaction (#3608, feb5e4aae) | ||
541 | // (adjusted with avr-gcc 4.9.2) | ||
542 | // 2018-10-21 fix serial and RGB animation conflict (#4191, 4665e4fff) | ||
543 | // (adjusted with avr-gcc 7.3.0) | ||
544 | // 2018-10-28 re-adjust compiler depend value of delay (#4269, 8517f8a66) | ||
545 | // (adjusted with avr-gcc 5.4.0, 7.3.0) | ||
546 | // 2018-12-17 copy to TOP/quantum/split_common/ and remove backward compatibility code (#4669) | ||