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-rw-r--r--quantum/split_common/serial.c548
1 files changed, 433 insertions, 115 deletions
diff --git a/quantum/split_common/serial.c b/quantum/split_common/serial.c
index 74bcbb6bf..1315377a3 100644
--- a/quantum/split_common/serial.c
+++ b/quantum/split_common/serial.c
@@ -1,5 +1,10 @@
1/* 1/*
2 * WARNING: be careful changing this code, it is very timing dependent 2 * WARNING: be careful changing this code, it is very timing dependent
3 *
4 * 2018-10-28 checked
5 * avr-gcc 4.9.2
6 * avr-gcc 5.4.0
7 * avr-gcc 7.3.0
3 */ 8 */
4 9
5#ifndef F_CPU 10#ifndef F_CPU
@@ -9,220 +14,533 @@
9#include <avr/io.h> 14#include <avr/io.h>
10#include <avr/interrupt.h> 15#include <avr/interrupt.h>
11#include <util/delay.h> 16#include <util/delay.h>
17#include <stddef.h>
12#include <stdbool.h> 18#include <stdbool.h>
13#include "serial.h" 19#include "serial.h"
20//#include <pro_micro.h>
21
22#ifdef SOFT_SERIAL_PIN
23
24#ifdef __AVR_ATmega32U4__
25 // if using ATmega32U4 I2C, can not use PD0 and PD1 in soft serial.
26 #ifdef USE_AVR_I2C
27 #if SOFT_SERIAL_PIN == D0 || SOFT_SERIAL_PIN == D1
28 #error Using ATmega32U4 I2C, so can not use PD0, PD1
29 #endif
30 #endif
31
32 #if SOFT_SERIAL_PIN >= D0 && SOFT_SERIAL_PIN <= D3
33 #define SERIAL_PIN_DDR DDRD
34 #define SERIAL_PIN_PORT PORTD
35 #define SERIAL_PIN_INPUT PIND
36 #if SOFT_SERIAL_PIN == D0
37 #define SERIAL_PIN_MASK _BV(PD0)
38 #define EIMSK_BIT _BV(INT0)
39 #define EICRx_BIT (~(_BV(ISC00) | _BV(ISC01)))
40 #define SERIAL_PIN_INTERRUPT INT0_vect
41 #elif SOFT_SERIAL_PIN == D1
42 #define SERIAL_PIN_MASK _BV(PD1)
43 #define EIMSK_BIT _BV(INT1)
44 #define EICRx_BIT (~(_BV(ISC10) | _BV(ISC11)))
45 #define SERIAL_PIN_INTERRUPT INT1_vect
46 #elif SOFT_SERIAL_PIN == D2
47 #define SERIAL_PIN_MASK _BV(PD2)
48 #define EIMSK_BIT _BV(INT2)
49 #define EICRx_BIT (~(_BV(ISC20) | _BV(ISC21)))
50 #define SERIAL_PIN_INTERRUPT INT2_vect
51 #elif SOFT_SERIAL_PIN == D3
52 #define SERIAL_PIN_MASK _BV(PD3)
53 #define EIMSK_BIT _BV(INT3)
54 #define EICRx_BIT (~(_BV(ISC30) | _BV(ISC31)))
55 #define SERIAL_PIN_INTERRUPT INT3_vect
56 #endif
57 #elif SOFT_SERIAL_PIN == E6
58 #define SERIAL_PIN_DDR DDRE
59 #define SERIAL_PIN_PORT PORTE
60 #define SERIAL_PIN_INPUT PINE
61 #define SERIAL_PIN_MASK _BV(PE6)
62 #define EIMSK_BIT _BV(INT6)
63 #define EICRx_BIT (~(_BV(ISC60) | _BV(ISC61)))
64 #define SERIAL_PIN_INTERRUPT INT6_vect
65 #else
66 #error invalid SOFT_SERIAL_PIN value
67 #endif
68
69#else
70 #error serial.c now support ATmega32U4 only
71#endif
14 72
15#ifndef USE_I2C 73#define ALWAYS_INLINE __attribute__((always_inline))
74#define NO_INLINE __attribute__((noinline))
75#define _delay_sub_us(x) __builtin_avr_delay_cycles(x)
76
77// parity check
78#define ODD_PARITY 1
79#define EVEN_PARITY 0
80#define PARITY EVEN_PARITY
81
82#ifdef SERIAL_DELAY
83 // custom setup in config.h
84 // #define TID_SEND_ADJUST 2
85 // #define SERIAL_DELAY 6 // micro sec
86 // #define READ_WRITE_START_ADJUST 30 // cycles
87 // #define READ_WRITE_WIDTH_ADJUST 8 // cycles
88#else
89// ============ Standard setups ============
90
91#ifndef SELECT_SOFT_SERIAL_SPEED
92#define SELECT_SOFT_SERIAL_SPEED 1
93// 0: about 189kbps (Experimental only)
94// 1: about 137kbps (default)
95// 2: about 75kbps
96// 3: about 39kbps
97// 4: about 26kbps
98// 5: about 20kbps
99#endif
16 100
17// Serial pulse period in microseconds. Its probably a bad idea to lower this 101#if __GNUC__ < 6
18// value. 102 #define TID_SEND_ADJUST 14
19#define SERIAL_DELAY 24 103#else
104 #define TID_SEND_ADJUST 2
105#endif
20 106
21uint8_t volatile serial_slave_buffer[SERIAL_SLAVE_BUFFER_LENGTH] = {0}; 107#if SELECT_SOFT_SERIAL_SPEED == 0
22uint8_t volatile serial_master_buffer[SERIAL_MASTER_BUFFER_LENGTH] = {0}; 108 // Very High speed
109 #define SERIAL_DELAY 4 // micro sec
110 #if __GNUC__ < 6
111 #define READ_WRITE_START_ADJUST 33 // cycles
112 #define READ_WRITE_WIDTH_ADJUST 3 // cycles
113 #else
114 #define READ_WRITE_START_ADJUST 34 // cycles
115 #define READ_WRITE_WIDTH_ADJUST 7 // cycles
116 #endif
117#elif SELECT_SOFT_SERIAL_SPEED == 1
118 // High speed
119 #define SERIAL_DELAY 6 // micro sec
120 #if __GNUC__ < 6
121 #define READ_WRITE_START_ADJUST 30 // cycles
122 #define READ_WRITE_WIDTH_ADJUST 3 // cycles
123 #else
124 #define READ_WRITE_START_ADJUST 33 // cycles
125 #define READ_WRITE_WIDTH_ADJUST 7 // cycles
126 #endif
127#elif SELECT_SOFT_SERIAL_SPEED == 2
128 // Middle speed
129 #define SERIAL_DELAY 12 // micro sec
130 #define READ_WRITE_START_ADJUST 30 // cycles
131 #if __GNUC__ < 6
132 #define READ_WRITE_WIDTH_ADJUST 3 // cycles
133 #else
134 #define READ_WRITE_WIDTH_ADJUST 7 // cycles
135 #endif
136#elif SELECT_SOFT_SERIAL_SPEED == 3
137 // Low speed
138 #define SERIAL_DELAY 24 // micro sec
139 #define READ_WRITE_START_ADJUST 30 // cycles
140 #if __GNUC__ < 6
141 #define READ_WRITE_WIDTH_ADJUST 3 // cycles
142 #else
143 #define READ_WRITE_WIDTH_ADJUST 7 // cycles
144 #endif
145#elif SELECT_SOFT_SERIAL_SPEED == 4
146 // Very Low speed
147 #define SERIAL_DELAY 36 // micro sec
148 #define READ_WRITE_START_ADJUST 30 // cycles
149 #if __GNUC__ < 6
150 #define READ_WRITE_WIDTH_ADJUST 3 // cycles
151 #else
152 #define READ_WRITE_WIDTH_ADJUST 7 // cycles
153 #endif
154#elif SELECT_SOFT_SERIAL_SPEED == 5
155 // Ultra Low speed
156 #define SERIAL_DELAY 48 // micro sec
157 #define READ_WRITE_START_ADJUST 30 // cycles
158 #if __GNUC__ < 6
159 #define READ_WRITE_WIDTH_ADJUST 3 // cycles
160 #else
161 #define READ_WRITE_WIDTH_ADJUST 7 // cycles
162 #endif
163#else
164#error invalid SELECT_SOFT_SERIAL_SPEED value
165#endif /* SELECT_SOFT_SERIAL_SPEED */
166#endif /* SERIAL_DELAY */
167
168#define SERIAL_DELAY_HALF1 (SERIAL_DELAY/2)
169#define SERIAL_DELAY_HALF2 (SERIAL_DELAY - SERIAL_DELAY/2)
170
171#define SLAVE_INT_WIDTH_US 1
172#ifndef SERIAL_USE_MULTI_TRANSACTION
173 #define SLAVE_INT_RESPONSE_TIME SERIAL_DELAY
174#else
175 #define SLAVE_INT_ACK_WIDTH_UNIT 2
176 #define SLAVE_INT_ACK_WIDTH 4
177#endif
23 178
24#define SLAVE_DATA_CORRUPT (1<<0) 179static SSTD_t *Transaction_table = NULL;
25volatile uint8_t status = 0; 180static uint8_t Transaction_table_size = 0;
26 181
182inline static void serial_delay(void) ALWAYS_INLINE;
27inline static 183inline static
28void serial_delay(void) { 184void serial_delay(void) {
29 _delay_us(SERIAL_DELAY); 185 _delay_us(SERIAL_DELAY);
30} 186}
31 187
188inline static void serial_delay_half1(void) ALWAYS_INLINE;
189inline static
190void serial_delay_half1(void) {
191 _delay_us(SERIAL_DELAY_HALF1);
192}
193
194inline static void serial_delay_half2(void) ALWAYS_INLINE;
195inline static
196void serial_delay_half2(void) {
197 _delay_us(SERIAL_DELAY_HALF2);
198}
199
200inline static void serial_output(void) ALWAYS_INLINE;
32inline static 201inline static
33void serial_output(void) { 202void serial_output(void) {
34 SERIAL_PIN_DDR |= SERIAL_PIN_MASK; 203 SERIAL_PIN_DDR |= SERIAL_PIN_MASK;
35} 204}
36 205
37// make the serial pin an input with pull-up resistor 206// make the serial pin an input with pull-up resistor
207inline static void serial_input_with_pullup(void) ALWAYS_INLINE;
38inline static 208inline static
39void serial_input(void) { 209void serial_input_with_pullup(void) {
40 SERIAL_PIN_DDR &= ~SERIAL_PIN_MASK; 210 SERIAL_PIN_DDR &= ~SERIAL_PIN_MASK;
41 SERIAL_PIN_PORT |= SERIAL_PIN_MASK; 211 SERIAL_PIN_PORT |= SERIAL_PIN_MASK;
42} 212}
43 213
214inline static uint8_t serial_read_pin(void) ALWAYS_INLINE;
44inline static 215inline static
45uint8_t serial_read_pin(void) { 216uint8_t serial_read_pin(void) {
46 return !!(SERIAL_PIN_INPUT & SERIAL_PIN_MASK); 217 return !!(SERIAL_PIN_INPUT & SERIAL_PIN_MASK);
47} 218}
48 219
220inline static void serial_low(void) ALWAYS_INLINE;
49inline static 221inline static
50void serial_low(void) { 222void serial_low(void) {
51 SERIAL_PIN_PORT &= ~SERIAL_PIN_MASK; 223 SERIAL_PIN_PORT &= ~SERIAL_PIN_MASK;
52} 224}
53 225
226inline static void serial_high(void) ALWAYS_INLINE;
54inline static 227inline static
55void serial_high(void) { 228void serial_high(void) {
56 SERIAL_PIN_PORT |= SERIAL_PIN_MASK; 229 SERIAL_PIN_PORT |= SERIAL_PIN_MASK;
57} 230}
58 231
59void serial_master_init(void) { 232void soft_serial_initiator_init(SSTD_t *sstd_table, int sstd_table_size)
60 serial_output(); 233{
61 serial_high(); 234 Transaction_table = sstd_table;
235 Transaction_table_size = (uint8_t)sstd_table_size;
236 serial_output();
237 serial_high();
62} 238}
63 239
64void serial_slave_init(void) { 240void soft_serial_target_init(SSTD_t *sstd_table, int sstd_table_size)
65 serial_input(); 241{
66 242 Transaction_table = sstd_table;
67 // Enable INT0 243 Transaction_table_size = (uint8_t)sstd_table_size;
68 EIMSK |= _BV(INT0); 244 serial_input_with_pullup();
69 // Trigger on falling edge of INT0 245
70 EICRA &= ~(_BV(ISC00) | _BV(ISC01)); 246 // Enable INT0-INT3,INT6
247 EIMSK |= EIMSK_BIT;
248#if SERIAL_PIN_MASK == _BV(PE6)
249 // Trigger on falling edge of INT6
250 EICRB &= EICRx_BIT;
251#else
252 // Trigger on falling edge of INT0-INT3
253 EICRA &= EICRx_BIT;
254#endif
71} 255}
72 256
73// Used by the master to synchronize timing with the slave. 257// Used by the sender to synchronize timing with the reciver.
258static void sync_recv(void) NO_INLINE;
74static 259static
75void sync_recv(void) { 260void sync_recv(void) {
76 serial_input(); 261 for (uint8_t i = 0; i < SERIAL_DELAY*5 && serial_read_pin(); i++ ) {
77 // This shouldn't hang if the slave disconnects because the 262 }
78 // serial line will float to high if the slave does disconnect. 263 // This shouldn't hang if the target disconnects because the
264 // serial line will float to high if the target does disconnect.
79 while (!serial_read_pin()); 265 while (!serial_read_pin());
80 serial_delay();
81} 266}
82 267
83// Used by the slave to send a synchronization signal to the master. 268// Used by the reciver to send a synchronization signal to the sender.
269static void sync_send(void) NO_INLINE;
84static 270static
85void sync_send(void) { 271void sync_send(void) {
86 serial_output();
87
88 serial_low(); 272 serial_low();
89 serial_delay(); 273 serial_delay();
90
91 serial_high(); 274 serial_high();
92} 275}
93 276
94// Reads a byte from the serial line 277// Reads a byte from the serial line
95static 278static uint8_t serial_read_chunk(uint8_t *pterrcount, uint8_t bit) NO_INLINE;
96uint8_t serial_read_byte(void) { 279static uint8_t serial_read_chunk(uint8_t *pterrcount, uint8_t bit) {
97 uint8_t byte = 0; 280 uint8_t byte, i, p, pb;
98 serial_input(); 281
99 for ( uint8_t i = 0; i < 8; ++i) { 282 _delay_sub_us(READ_WRITE_START_ADJUST);
100 byte = (byte << 1) | serial_read_pin(); 283 for( i = 0, byte = 0, p = PARITY; i < bit; i++ ) {
101 serial_delay(); 284 serial_delay_half1(); // read the middle of pulses
102 _delay_us(1); 285 if( serial_read_pin() ) {
286 byte = (byte << 1) | 1; p ^= 1;
287 } else {
288 byte = (byte << 1) | 0; p ^= 0;
289 }
290 _delay_sub_us(READ_WRITE_WIDTH_ADJUST);
291 serial_delay_half2();
103 } 292 }
293 /* recive parity bit */
294 serial_delay_half1(); // read the middle of pulses
295 pb = serial_read_pin();
296 _delay_sub_us(READ_WRITE_WIDTH_ADJUST);
297 serial_delay_half2();
298
299 *pterrcount += (p != pb)? 1 : 0;
104 300
105 return byte; 301 return byte;
106} 302}
107 303
108// Sends a byte with MSB ordering 304// Sends a byte with MSB ordering
109static 305void serial_write_chunk(uint8_t data, uint8_t bit) NO_INLINE;
110void serial_write_byte(uint8_t data) { 306void serial_write_chunk(uint8_t data, uint8_t bit) {
111 uint8_t b = 8; 307 uint8_t b, p;
112 serial_output(); 308 for( p = PARITY, b = 1<<(bit-1); b ; b >>= 1) {
113 while( b-- ) { 309 if(data & b) {
114 if(data & (1 << b)) { 310 serial_high(); p ^= 1;
115 serial_high(); 311 } else {
116 } else { 312 serial_low(); p ^= 0;
117 serial_low(); 313 }
314 serial_delay();
118 } 315 }
316 /* send parity bit */
317 if(p & 1) { serial_high(); }
318 else { serial_low(); }
119 serial_delay(); 319 serial_delay();
120 }
121}
122 320
123// interrupt handle to be used by the slave device 321 serial_low(); // sync_send() / senc_recv() need raise edge
124ISR(SERIAL_PIN_INTERRUPT) { 322}
125 sync_send();
126 323
127 uint8_t checksum = 0; 324static void serial_send_packet(uint8_t *buffer, uint8_t size) NO_INLINE;
128 for (int i = 0; i < SERIAL_SLAVE_BUFFER_LENGTH; ++i) { 325static
129 serial_write_byte(serial_slave_buffer[i]); 326void serial_send_packet(uint8_t *buffer, uint8_t size) {
327 for (uint8_t i = 0; i < size; ++i) {
328 uint8_t data;
329 data = buffer[i];
130 sync_send(); 330 sync_send();
131 checksum += serial_slave_buffer[i]; 331 serial_write_chunk(data,8);
132 } 332 }
133 serial_write_byte(checksum); 333}
134 sync_send();
135 334
136 // wait for the sync to finish sending 335static uint8_t serial_recive_packet(uint8_t *buffer, uint8_t size) NO_INLINE;
137 serial_delay(); 336static
337uint8_t serial_recive_packet(uint8_t *buffer, uint8_t size) {
338 uint8_t pecount = 0;
339 for (uint8_t i = 0; i < size; ++i) {
340 uint8_t data;
341 sync_recv();
342 data = serial_read_chunk(&pecount, 8);
343 buffer[i] = data;
344 }
345 return pecount == 0;
346}
138 347
139 // read the middle of pulses 348inline static
140 _delay_us(SERIAL_DELAY/2); 349void change_sender2reciver(void) {
350 sync_send(); //0
351 serial_delay_half1(); //1
352 serial_low(); //2
353 serial_input_with_pullup(); //2
354 serial_delay_half1(); //3
355}
141 356
142 uint8_t checksum_computed = 0; 357inline static
143 for (int i = 0; i < SERIAL_MASTER_BUFFER_LENGTH; ++i) { 358void change_reciver2sender(void) {
144 serial_master_buffer[i] = serial_read_byte(); 359 sync_recv(); //0
145 sync_send(); 360 serial_delay(); //1
146 checksum_computed += serial_master_buffer[i]; 361 serial_low(); //3
362 serial_output(); //3
363 serial_delay_half1(); //4
364}
365
366static inline uint8_t nibble_bits_count(uint8_t bits)
367{
368 bits = (bits & 0x5) + (bits >> 1 & 0x5);
369 bits = (bits & 0x3) + (bits >> 2 & 0x3);
370 return bits;
371}
372
373// interrupt handle to be used by the target device
374ISR(SERIAL_PIN_INTERRUPT) {
375
376#ifndef SERIAL_USE_MULTI_TRANSACTION
377 serial_low();
378 serial_output();
379 SSTD_t *trans = Transaction_table;
380#else
381 // recive transaction table index
382 uint8_t tid, bits;
383 uint8_t pecount = 0;
384 sync_recv();
385 bits = serial_read_chunk(&pecount,7);
386 tid = bits>>3;
387 bits = (bits&7) != nibble_bits_count(tid);
388 if( bits || pecount> 0 || tid > Transaction_table_size ) {
389 return;
147 } 390 }
148 uint8_t checksum_received = serial_read_byte(); 391 serial_delay_half1();
149 sync_send();
150 392
151 serial_input(); // end transaction 393 serial_high(); // response step1 low->high
394 serial_output();
395 _delay_sub_us(SLAVE_INT_ACK_WIDTH_UNIT*SLAVE_INT_ACK_WIDTH);
396 SSTD_t *trans = &Transaction_table[tid];
397 serial_low(); // response step2 ack high->low
398#endif
152 399
153 if ( checksum_computed != checksum_received ) { 400 // target send phase
154 status |= SLAVE_DATA_CORRUPT; 401 if( trans->target2initiator_buffer_size > 0 )
402 serial_send_packet((uint8_t *)trans->target2initiator_buffer,
403 trans->target2initiator_buffer_size);
404 // target switch to input
405 change_sender2reciver();
406
407 // target recive phase
408 if( trans->initiator2target_buffer_size > 0 ) {
409 if (serial_recive_packet((uint8_t *)trans->initiator2target_buffer,
410 trans->initiator2target_buffer_size) ) {
411 *trans->status = TRANSACTION_ACCEPTED;
412 } else {
413 *trans->status = TRANSACTION_DATA_ERROR;
414 }
155 } else { 415 } else {
156 status &= ~SLAVE_DATA_CORRUPT; 416 *trans->status = TRANSACTION_ACCEPTED;
157 } 417 }
158}
159 418
160inline 419 sync_recv(); //weit initiator output to high
161bool serial_slave_DATA_CORRUPT(void) {
162 return status & SLAVE_DATA_CORRUPT;
163} 420}
164 421
165// Copies the serial_slave_buffer to the master and sends the 422/////////
166// serial_master_buffer to the slave. 423// start transaction by initiator
424//
425// int soft_serial_transaction(int sstd_index)
167// 426//
168// Returns: 427// Returns:
169// 0 => no error 428// TRANSACTION_END
170// 1 => slave did not respond 429// TRANSACTION_NO_RESPONSE
171int serial_update_buffers(void) { 430// TRANSACTION_DATA_ERROR
172 // this code is very time dependent, so we need to disable interrupts 431// this code is very time dependent, so we need to disable interrupts
432#ifndef SERIAL_USE_MULTI_TRANSACTION
433int soft_serial_transaction(void) {
434 SSTD_t *trans = Transaction_table;
435#else
436int soft_serial_transaction(int sstd_index) {
437 if( sstd_index > Transaction_table_size )
438 return TRANSACTION_TYPE_ERROR;
439 SSTD_t *trans = &Transaction_table[sstd_index];
440#endif
173 cli(); 441 cli();
174 442
175 // signal to the slave that we want to start a transaction 443 // signal to the target that we want to start a transaction
176 serial_output(); 444 serial_output();
177 serial_low(); 445 serial_low();
178 _delay_us(1); 446 _delay_us(SLAVE_INT_WIDTH_US);
179 447
180 // wait for the slaves response 448#ifndef SERIAL_USE_MULTI_TRANSACTION
181 serial_input(); 449 // wait for the target response
182 serial_high(); 450 serial_input_with_pullup();
183 _delay_us(SERIAL_DELAY); 451 _delay_us(SLAVE_INT_RESPONSE_TIME);
184 452
185 // check if the slave is present 453 // check if the target is present
186 if (serial_read_pin()) { 454 if (serial_read_pin()) {
187 // slave failed to pull the line low, assume not present 455 // target failed to pull the line low, assume not present
456 serial_output();
457 serial_high();
458 *trans->status = TRANSACTION_NO_RESPONSE;
188 sei(); 459 sei();
189 return 1; 460 return TRANSACTION_NO_RESPONSE;
190 } 461 }
191 462
192 // if the slave is present syncronize with it 463#else
193 sync_recv(); 464 // send transaction table index
194 465 int tid = (sstd_index<<3) | (7 & nibble_bits_count(sstd_index));
195 uint8_t checksum_computed = 0; 466 sync_send();
196 // receive data from the slave 467 _delay_sub_us(TID_SEND_ADJUST);
197 for (int i = 0; i < SERIAL_SLAVE_BUFFER_LENGTH; ++i) { 468 serial_write_chunk(tid, 7);
198 serial_slave_buffer[i] = serial_read_byte(); 469 serial_delay_half1();
199 sync_recv(); 470
200 checksum_computed += serial_slave_buffer[i]; 471 // wait for the target response (step1 low->high)
472 serial_input_with_pullup();
473 while( !serial_read_pin() ) {
474 _delay_sub_us(2);
201 } 475 }
202 uint8_t checksum_received = serial_read_byte();
203 sync_recv();
204 476
205 if (checksum_computed != checksum_received) { 477 // check if the target is present (step2 high->low)
206 sei(); 478 for( int i = 0; serial_read_pin(); i++ ) {
207 return 1; 479 if (i > SLAVE_INT_ACK_WIDTH + 1) {
480 // slave failed to pull the line low, assume not present
481 serial_output();
482 serial_high();
483 *trans->status = TRANSACTION_NO_RESPONSE;
484 sei();
485 return TRANSACTION_NO_RESPONSE;
486 }
487 _delay_sub_us(SLAVE_INT_ACK_WIDTH_UNIT);
208 } 488 }
489#endif
209 490
210 uint8_t checksum = 0; 491 // initiator recive phase
211 // send data to the slave 492 // if the target is present syncronize with it
212 for (int i = 0; i < SERIAL_MASTER_BUFFER_LENGTH; ++i) { 493 if( trans->target2initiator_buffer_size > 0 ) {
213 serial_write_byte(serial_master_buffer[i]); 494 if (!serial_recive_packet((uint8_t *)trans->target2initiator_buffer,
214 sync_recv(); 495 trans->target2initiator_buffer_size) ) {
215 checksum += serial_master_buffer[i]; 496 serial_output();
497 serial_high();
498 *trans->status = TRANSACTION_DATA_ERROR;
499 sei();
500 return TRANSACTION_DATA_ERROR;
501 }
502 }
503
504 // initiator switch to output
505 change_reciver2sender();
506
507 // initiator send phase
508 if( trans->initiator2target_buffer_size > 0 ) {
509 serial_send_packet((uint8_t *)trans->initiator2target_buffer,
510 trans->initiator2target_buffer_size);
216 } 511 }
217 serial_write_byte(checksum);
218 sync_recv();
219 512
220 // always, release the line when not in use 513 // always, release the line when not in use
221 serial_output(); 514 sync_send();
222 serial_high();
223 515
516 *trans->status = TRANSACTION_END;
224 sei(); 517 sei();
225 return 0; 518 return TRANSACTION_END;
226} 519}
227 520
521#ifdef SERIAL_USE_MULTI_TRANSACTION
522int soft_serial_get_and_clean_status(int sstd_index) {
523 SSTD_t *trans = &Transaction_table[sstd_index];
524 cli();
525 int retval = *trans->status;
526 *trans->status = 0;;
527 sei();
528 return retval;
529}
530#endif
531
228#endif 532#endif
533
534// Helix serial.c history
535// 2018-1-29 fork from let's split and add PD2, modify sync_recv() (#2308, bceffdefc)
536// 2018-6-28 bug fix master to slave comm and speed up (#3255, 1038bbef4)
537// (adjusted with avr-gcc 4.9.2)
538// 2018-7-13 remove USE_SERIAL_PD2 macro (#3374, f30d6dd78)
539// (adjusted with avr-gcc 4.9.2)
540// 2018-8-11 add support multi-type transaction (#3608, feb5e4aae)
541// (adjusted with avr-gcc 4.9.2)
542// 2018-10-21 fix serial and RGB animation conflict (#4191, 4665e4fff)
543// (adjusted with avr-gcc 7.3.0)
544// 2018-10-28 re-adjust compiler depend value of delay (#4269, 8517f8a66)
545// (adjusted with avr-gcc 5.4.0, 7.3.0)
546// 2018-12-17 copy to TOP/quantum/split_common/ and remove backward compatibility code (#4669)