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authoryiancar <yiangosyiangou@cytanet.com.cy>2020-06-18 06:16:26 +0100
committerGitHub <noreply@github.com>2020-06-17 22:16:26 -0700
commit3e27ceee4220a56ec35d5567773cf9cda4b22842 (patch)
tree85759930eff8fbe4098d22b1e9328fb271307d46
parent67f374029df96bec9f5adc26e23a7d7e1139a129 (diff)
downloadqmk_firmware-3e27ceee4220a56ec35d5567773cf9cda4b22842.tar.gz
qmk_firmware-3e27ceee4220a56ec35d5567773cf9cda4b22842.zip
[Keyboard] Nebula12 keyboard (#9397)
Co-authored-by: Ryan <fauxpark@gmail.com> Co-authored-by: Drashna Jaelre <drashna@live.com>
Diffstat
-rw-r--r--keyboards/nebula12/boards/ST_STM32F072B_DISCOVERY/board.c268
-rw-r--r--keyboards/nebula12/boards/ST_STM32F072B_DISCOVERY/board.h940
-rw-r--r--keyboards/nebula12/boards/ST_STM32F072B_DISCOVERY/board.mk5
-rw-r--r--keyboards/nebula12/boards/ST_STM32F072B_DISCOVERY/cfg/board.chcfg703
-rw-r--r--keyboards/nebula12/bootloader_defs.h7
-rw-r--r--keyboards/nebula12/chconf.h714
-rwxr-xr-xkeyboards/nebula12/config.h169
-rw-r--r--keyboards/nebula12/halconf.h525
-rwxr-xr-xkeyboards/nebula12/info.json14
-rwxr-xr-xkeyboards/nebula12/keymaps/default/keymap.c42
-rwxr-xr-xkeyboards/nebula12/keymaps/default/readme.md7
-rwxr-xr-xkeyboards/nebula12/keymaps/via/keymap.c42
-rwxr-xr-xkeyboards/nebula12/keymaps/via/readme.md5
-rwxr-xr-xkeyboards/nebula12/keymaps/via/rules.mk1
-rw-r--r--keyboards/nebula12/mcuconf.h176
-rwxr-xr-xkeyboards/nebula12/nebula12.c20
-rwxr-xr-xkeyboards/nebula12/nebula12.h35
-rwxr-xr-xkeyboards/nebula12/readme.md32
-rwxr-xr-xkeyboards/nebula12/rules.mk34
-rw-r--r--keyboards/wilba_tech/wt_rgb_backlight.c109
20 files changed, 3839 insertions, 9 deletions
diff --git a/keyboards/nebula12/boards/ST_STM32F072B_DISCOVERY/board.c b/keyboards/nebula12/boards/ST_STM32F072B_DISCOVERY/board.c
new file mode 100644
index 000000000..7c09bd997
--- /dev/null
+++ b/keyboards/nebula12/boards/ST_STM32F072B_DISCOVERY/board.c
@@ -0,0 +1,268 @@
1/*
2 ChibiOS - Copyright (C) 2006..2018 Giovanni Di Sirio
3
4 Licensed under the Apache License, Version 2.0 (the "License");
5 you may not use this file except in compliance with the License.
6 You may obtain a copy of the License at
7
8 http://www.apache.org/licenses/LICENSE-2.0
9
10 Unless required by applicable law or agreed to in writing, software
11 distributed under the License is distributed on an "AS IS" BASIS,
12 WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
13 See the License for the specific language governing permissions and
14 limitations under the License.
15*/
16
17/*
18 * This file has been automatically generated using ChibiStudio board
19 * generator plugin. Do not edit manually.
20 */
21
22#include "hal.h"
23#include "stm32_gpio.h"
24
25/*===========================================================================*/
26/* Driver local definitions. */
27/*===========================================================================*/
28
29/*===========================================================================*/
30/* Driver exported variables. */
31/*===========================================================================*/
32
33/*===========================================================================*/
34/* Driver local variables and types. */
35/*===========================================================================*/
36
37/**
38 * @brief Type of STM32 GPIO port setup.
39 */
40typedef struct {
41 uint32_t moder;
42 uint32_t otyper;
43 uint32_t ospeedr;
44 uint32_t pupdr;
45 uint32_t odr;
46 uint32_t afrl;
47 uint32_t afrh;
48} gpio_setup_t;
49
50/**
51 * @brief Type of STM32 GPIO initialization data.
52 */
53typedef struct {
54#if STM32_HAS_GPIOA || defined(__DOXYGEN__)
55 gpio_setup_t PAData;
56#endif
57#if STM32_HAS_GPIOB || defined(__DOXYGEN__)
58 gpio_setup_t PBData;
59#endif
60#if STM32_HAS_GPIOC || defined(__DOXYGEN__)
61 gpio_setup_t PCData;
62#endif
63#if STM32_HAS_GPIOD || defined(__DOXYGEN__)
64 gpio_setup_t PDData;
65#endif
66#if STM32_HAS_GPIOE || defined(__DOXYGEN__)
67 gpio_setup_t PEData;
68#endif
69#if STM32_HAS_GPIOF || defined(__DOXYGEN__)
70 gpio_setup_t PFData;
71#endif
72#if STM32_HAS_GPIOG || defined(__DOXYGEN__)
73 gpio_setup_t PGData;
74#endif
75#if STM32_HAS_GPIOH || defined(__DOXYGEN__)
76 gpio_setup_t PHData;
77#endif
78#if STM32_HAS_GPIOI || defined(__DOXYGEN__)
79 gpio_setup_t PIData;
80#endif
81#if STM32_HAS_GPIOJ || defined(__DOXYGEN__)
82 gpio_setup_t PJData;
83#endif
84#if STM32_HAS_GPIOK || defined(__DOXYGEN__)
85 gpio_setup_t PKData;
86#endif
87} gpio_config_t;
88
89/**
90 * @brief STM32 GPIO static initialization data.
91 */
92static const gpio_config_t gpio_default_config = {
93#if STM32_HAS_GPIOA
94 {VAL_GPIOA_MODER, VAL_GPIOA_OTYPER, VAL_GPIOA_OSPEEDR, VAL_GPIOA_PUPDR,
95 VAL_GPIOA_ODR, VAL_GPIOA_AFRL, VAL_GPIOA_AFRH},
96#endif
97#if STM32_HAS_GPIOB
98 {VAL_GPIOB_MODER, VAL_GPIOB_OTYPER, VAL_GPIOB_OSPEEDR, VAL_GPIOB_PUPDR,
99 VAL_GPIOB_ODR, VAL_GPIOB_AFRL, VAL_GPIOB_AFRH},
100#endif
101#if STM32_HAS_GPIOC
102 {VAL_GPIOC_MODER, VAL_GPIOC_OTYPER, VAL_GPIOC_OSPEEDR, VAL_GPIOC_PUPDR,
103 VAL_GPIOC_ODR, VAL_GPIOC_AFRL, VAL_GPIOC_AFRH},
104#endif
105#if STM32_HAS_GPIOD
106 {VAL_GPIOD_MODER, VAL_GPIOD_OTYPER, VAL_GPIOD_OSPEEDR, VAL_GPIOD_PUPDR,
107 VAL_GPIOD_ODR, VAL_GPIOD_AFRL, VAL_GPIOD_AFRH},
108#endif
109#if STM32_HAS_GPIOE
110 {VAL_GPIOE_MODER, VAL_GPIOE_OTYPER, VAL_GPIOE_OSPEEDR, VAL_GPIOE_PUPDR,
111 VAL_GPIOE_ODR, VAL_GPIOE_AFRL, VAL_GPIOE_AFRH},
112#endif
113#if STM32_HAS_GPIOF
114 {VAL_GPIOF_MODER, VAL_GPIOF_OTYPER, VAL_GPIOF_OSPEEDR, VAL_GPIOF_PUPDR,
115 VAL_GPIOF_ODR, VAL_GPIOF_AFRL, VAL_GPIOF_AFRH},
116#endif
117#if STM32_HAS_GPIOG
118 {VAL_GPIOG_MODER, VAL_GPIOG_OTYPER, VAL_GPIOG_OSPEEDR, VAL_GPIOG_PUPDR,
119 VAL_GPIOG_ODR, VAL_GPIOG_AFRL, VAL_GPIOG_AFRH},
120#endif
121#if STM32_HAS_GPIOH
122 {VAL_GPIOH_MODER, VAL_GPIOH_OTYPER, VAL_GPIOH_OSPEEDR, VAL_GPIOH_PUPDR,
123 VAL_GPIOH_ODR, VAL_GPIOH_AFRL, VAL_GPIOH_AFRH},
124#endif
125#if STM32_HAS_GPIOI
126 {VAL_GPIOI_MODER, VAL_GPIOI_OTYPER, VAL_GPIOI_OSPEEDR, VAL_GPIOI_PUPDR,
127 VAL_GPIOI_ODR, VAL_GPIOI_AFRL, VAL_GPIOI_AFRH},
128#endif
129#if STM32_HAS_GPIOJ
130 {VAL_GPIOJ_MODER, VAL_GPIOJ_OTYPER, VAL_GPIOJ_OSPEEDR, VAL_GPIOJ_PUPDR,
131 VAL_GPIOJ_ODR, VAL_GPIOJ_AFRL, VAL_GPIOJ_AFRH},
132#endif
133#if STM32_HAS_GPIOK
134 {VAL_GPIOK_MODER, VAL_GPIOK_OTYPER, VAL_GPIOK_OSPEEDR, VAL_GPIOK_PUPDR,
135 VAL_GPIOK_ODR, VAL_GPIOK_AFRL, VAL_GPIOK_AFRH}
136#endif
137};
138
139/*===========================================================================*/
140/* Driver local functions. */
141/*===========================================================================*/
142
143static void gpio_init(stm32_gpio_t *gpiop, const gpio_setup_t *config) {
144
145 gpiop->OTYPER = config->otyper;
146 gpiop->OSPEEDR = config->ospeedr;
147 gpiop->PUPDR = config->pupdr;
148 gpiop->ODR = config->odr;
149 gpiop->AFRL = config->afrl;
150 gpiop->AFRH = config->afrh;
151 gpiop->MODER = config->moder;
152}
153
154static void stm32_gpio_init(void) {
155
156 /* Enabling GPIO-related clocks, the mask comes from the
157 registry header file.*/
158 rccResetAHB(STM32_GPIO_EN_MASK);
159 rccEnableAHB(STM32_GPIO_EN_MASK, true);
160
161 /* Initializing all the defined GPIO ports.*/
162#if STM32_HAS_GPIOA
163 gpio_init(GPIOA, &gpio_default_config.PAData);
164#endif
165#if STM32_HAS_GPIOB
166 gpio_init(GPIOB, &gpio_default_config.PBData);
167#endif
168#if STM32_HAS_GPIOC
169 gpio_init(GPIOC, &gpio_default_config.PCData);
170#endif
171#if STM32_HAS_GPIOD
172 gpio_init(GPIOD, &gpio_default_config.PDData);
173#endif
174#if STM32_HAS_GPIOE
175 gpio_init(GPIOE, &gpio_default_config.PEData);
176#endif
177#if STM32_HAS_GPIOF
178 gpio_init(GPIOF, &gpio_default_config.PFData);
179#endif
180#if STM32_HAS_GPIOG
181 gpio_init(GPIOG, &gpio_default_config.PGData);
182#endif
183#if STM32_HAS_GPIOH
184 gpio_init(GPIOH, &gpio_default_config.PHData);
185#endif
186#if STM32_HAS_GPIOI
187 gpio_init(GPIOI, &gpio_default_config.PIData);
188#endif
189#if STM32_HAS_GPIOJ
190 gpio_init(GPIOJ, &gpio_default_config.PJData);
191#endif
192#if STM32_HAS_GPIOK
193 gpio_init(GPIOK, &gpio_default_config.PKData);
194#endif
195}
196
197/*===========================================================================*/
198/* Driver interrupt handlers. */
199/*===========================================================================*/
200
201/*===========================================================================*/
202/* Driver exported functions. */
203/*===========================================================================*/
204
205/**
206 * @brief Early initialization code.
207 * @details GPIO ports and system clocks are initialized before everything
208 * else.
209 */
210void __early_init(void) {
211 extern void enter_bootloader_mode_if_requested(void);
212 enter_bootloader_mode_if_requested();
213 stm32_gpio_init();
214 stm32_clock_init();
215}
216
217#if HAL_USE_SDC || defined(__DOXYGEN__)
218/**
219 * @brief SDC card detection.
220 */
221bool sdc_lld_is_card_inserted(SDCDriver *sdcp) {
222
223 (void)sdcp;
224 /* TODO: Fill the implementation.*/
225 return true;
226}
227
228/**
229 * @brief SDC card write protection detection.
230 */
231bool sdc_lld_is_write_protected(SDCDriver *sdcp) {
232
233 (void)sdcp;
234 /* TODO: Fill the implementation.*/
235 return false;
236}
237#endif /* HAL_USE_SDC */
238
239#if HAL_USE_MMC_SPI || defined(__DOXYGEN__)
240/**
241 * @brief MMC_SPI card detection.
242 */
243bool mmc_lld_is_card_inserted(MMCDriver *mmcp) {
244
245 (void)mmcp;
246 /* TODO: Fill the implementation.*/
247 return true;
248}
249
250/**
251 * @brief MMC_SPI card write protection detection.
252 */
253bool mmc_lld_is_write_protected(MMCDriver *mmcp) {
254
255 (void)mmcp;
256 /* TODO: Fill the implementation.*/
257 return false;
258}
259#endif
260
261/**
262 * @brief Board-specific initialization code.
263 * @todo Add your board-specific code, if any.
264 */
265void boardInit(void) {
266 SYSCFG->CFGR1 |= SYSCFG_CFGR1_I2C1_DMA_RMP;
267 SYSCFG->CFGR1 &= ~(SYSCFG_CFGR1_SPI2_DMA_RMP);
268}
diff --git a/keyboards/nebula12/boards/ST_STM32F072B_DISCOVERY/board.h b/keyboards/nebula12/boards/ST_STM32F072B_DISCOVERY/board.h
new file mode 100644
index 000000000..57636d1f1
--- /dev/null
+++ b/keyboards/nebula12/boards/ST_STM32F072B_DISCOVERY/board.h
@@ -0,0 +1,940 @@
1/*
2 ChibiOS - Copyright (C) 2006..2016 Giovanni Di Sirio
3
4 Licensed under the Apache License, Version 2.0 (the "License");
5 you may not use this file except in compliance with the License.
6 You may obtain a copy of the License at
7
8 http://www.apache.org/licenses/LICENSE-2.0
9
10 Unless required by applicable law or agreed to in writing, software
11 distributed under the License is distributed on an "AS IS" BASIS,
12 WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
13 See the License for the specific language governing permissions and
14 limitations under the License.
15*/
16
17/*
18 * This file has been automatically generated using ChibiStudio board
19 * generator plugin. Do not edit manually.
20 */
21
22#ifndef BOARD_H
23#define BOARD_H
24
25/*===========================================================================*/
26/* Driver constants. */
27/*===========================================================================*/
28
29/*
30 * Setup for ST STM32F072B-Discovery board.
31 */
32
33/*
34 * Board identifier.
35 */
36#define BOARD_ST_STM32F072B_DISCOVERY
37#define BOARD_NAME "ST STM32F072B-Discovery"
38
39/*
40 * Board oscillators-related settings.
41 * NOTE: HSE not fitted.
42 */
43#if !defined(STM32_LSECLK)
44#define STM32_LSECLK 32768
45#endif
46
47#define STM32_LSEDRV (3U << 3U)
48
49#if !defined(STM32_HSECLK)
50#define STM32_HSECLK 0U
51#endif
52
53#define STM32_HSE_BYPASS
54
55/*
56 * MCU type as defined in the ST header.
57 */
58#define STM32F072xB
59
60/*
61 * IO pins assignments.
62 */
63#define GPIOA_BUTTON 0U
64#define GPIOA_PIN1 1U
65#define GPIOA_PIN2 2U
66#define GPIOA_PIN3 3U
67#define GPIOA_PIN4 4U
68#define GPIOA_PIN5 5U
69#define GPIOA_PIN6 6U
70#define GPIOA_PIN7 7U
71#define GPIOA_PIN8 8U
72#define GPIOA_PIN9 9U
73#define GPIOA_PIN10 10U
74#define GPIOA_USB_DM 11U
75#define GPIOA_USB_DP 12U
76#define GPIOA_SWDIO 13U
77#define GPIOA_SWCLK 14U
78#define GPIOA_PIN15 15U
79
80#define GPIOB_PIN0 0U
81#define GPIOB_PIN1 1U
82#define GPIOB_PIN2 2U
83#define GPIOB_PIN3 3U
84#define GPIOB_PIN4 4U
85#define GPIOB_PIN5 5U
86#define GPIOB_PIN6 6U
87#define GPIOB_PIN7 7U
88#define GPIOB_PIN8 8U
89#define GPIOB_PIN9 9U
90#define GPIOB_PIN10 10U
91#define GPIOB_PIN11 11U
92#define GPIOB_PIN12 12U
93#define GPIOB_SPI2_SCK 13U
94#define GPIOB_SPI2_MISO 14U
95#define GPIOB_SPI2_MOSI 15U
96
97#define GPIOC_MEMS_CS 0U
98#define GPIOC_PIN1 1U
99#define GPIOC_PIN2 2U
100#define GPIOC_PIN3 3U
101#define GPIOC_PIN4 4U
102#define GPIOC_PIN5 5U
103#define GPIOC_LED_RED 6U
104#define GPIOC_LED_BLUE 7U
105#define GPIOC_LED_ORANGE 8U
106#define GPIOC_LED_GREEN 9U
107#define GPIOC_PIN10 10U
108#define GPIOC_PIN11 11U
109#define GPIOC_PIN12 12U
110#define GPIOC_PIN13 13U
111#define GPIOC_OSC32_IN 14U
112#define GPIOC_OSC32_OUT 15U
113
114#define GPIOD_PIN0 0U
115#define GPIOD_PIN1 1U
116#define GPIOD_PIN2 2U
117#define GPIOD_PIN3 3U
118#define GPIOD_PIN4 4U
119#define GPIOD_PIN5 5U
120#define GPIOD_PIN6 6U
121#define GPIOD_PIN7 7U
122#define GPIOD_PIN8 8U
123#define GPIOD_PIN9 9U
124#define GPIOD_PIN10 10U
125#define GPIOD_PIN11 11U
126#define GPIOD_PIN12 12U
127#define GPIOD_PIN13 13U
128#define GPIOD_PIN14 14U
129#define GPIOD_PIN15 15U
130
131#define GPIOE_PIN0 0U
132#define GPIOE_PIN1 1U
133#define GPIOE_PIN2 2U
134#define GPIOE_PIN3 3U
135#define GPIOE_PIN4 4U
136#define GPIOE_PIN5 5U
137#define GPIOE_PIN6 6U
138#define GPIOE_PIN7 7U
139#define GPIOE_PIN8 8U
140#define GPIOE_PIN9 9U
141#define GPIOE_PIN10 10U
142#define GPIOE_PIN11 11U
143#define GPIOE_PIN12 12U
144#define GPIOE_PIN13 13U
145#define GPIOE_PIN14 14U
146#define GPIOE_PIN15 15U
147
148#define GPIOF_OSC_IN 0U
149#define GPIOF_OSC_OUT 1U
150#define GPIOF_PIN2 2U
151#define GPIOF_PIN3 3U
152#define GPIOF_PIN4 4U
153#define GPIOF_PIN5 5U
154#define GPIOF_PIN6 6U
155#define GPIOF_PIN7 7U
156#define GPIOF_PIN8 8U
157#define GPIOF_PIN9 9U
158#define GPIOF_PIN10 10U
159#define GPIOF_PIN11 11U
160#define GPIOF_PIN12 12U
161#define GPIOF_PIN13 13U
162#define GPIOF_PIN14 14U
163#define GPIOF_PIN15 15U
164
165/*
166 * IO lines assignments.
167 */
168#define LINE_BUTTON PAL_LINE(GPIOA, 0U)
169#define LINE_USB_DM PAL_LINE(GPIOA, 11U)
170#define LINE_USB_DP PAL_LINE(GPIOA, 12U)
171#define LINE_SWDIO PAL_LINE(GPIOA, 13U)
172#define LINE_SWCLK PAL_LINE(GPIOA, 14U)
173#define LINE_SPI2_SCK PAL_LINE(GPIOB, 13U)
174#define LINE_SPI2_MISO PAL_LINE(GPIOB, 14U)
175#define LINE_SPI2_MOSI PAL_LINE(GPIOB, 15U)
176#define LINE_MEMS_CS PAL_LINE(GPIOC, 0U)
177#define LINE_LED_RED PAL_LINE(GPIOC, 6U)
178#define LINE_LED_BLUE PAL_LINE(GPIOC, 7U)
179#define LINE_LED_ORANGE PAL_LINE(GPIOC, 8U)
180#define LINE_LED_GREEN PAL_LINE(GPIOC, 9U)
181#define LINE_OSC32_IN PAL_LINE(GPIOC, 14U)
182#define LINE_OSC32_OUT PAL_LINE(GPIOC, 15U)
183#define LINE_OSC_IN PAL_LINE(GPIOF, 0U)
184#define LINE_OSC_OUT PAL_LINE(GPIOF, 1U)
185
186/*===========================================================================*/
187/* Driver pre-compile time settings. */
188/*===========================================================================*/
189
190/*===========================================================================*/
191/* Derived constants and error checks. */
192/*===========================================================================*/
193
194/*===========================================================================*/
195/* Driver data structures and types. */
196/*===========================================================================*/
197
198/*===========================================================================*/
199/* Driver macros. */
200/*===========================================================================*/
201
202/*
203 * I/O ports initial setup, this configuration is established soon after reset
204 * in the initialization code.
205 * Please refer to the STM32 Reference Manual for details.
206 */
207#define PIN_MODE_INPUT(n) (0U << ((n) * 2U))
208#define PIN_MODE_OUTPUT(n) (1U << ((n) * 2U))
209#define PIN_MODE_ALTERNATE(n) (2U << ((n) * 2U))
210#define PIN_MODE_ANALOG(n) (3U << ((n) * 2U))
211#define PIN_ODR_LOW(n) (0U << (n))
212#define PIN_ODR_HIGH(n) (1U << (n))
213#define PIN_OTYPE_PUSHPULL(n) (0U << (n))
214#define PIN_OTYPE_OPENDRAIN(n) (1U << (n))
215#define PIN_OSPEED_VERYLOW(n) (0U << ((n) * 2U))
216#define PIN_OSPEED_LOW(n) (1U << ((n) * 2U))
217#define PIN_OSPEED_MEDIUM(n) (2U << ((n) * 2U))
218#define PIN_OSPEED_HIGH(n) (3U << ((n) * 2U))
219#define PIN_PUPDR_FLOATING(n) (0U << ((n) * 2U))
220#define PIN_PUPDR_PULLUP(n) (1U << ((n) * 2U))
221#define PIN_PUPDR_PULLDOWN(n) (2U << ((n) * 2U))
222#define PIN_AFIO_AF(n, v) ((v) << (((n) % 8U) * 4U))
223
224/*
225 * GPIOA setup:
226 *
227 * PA0 - BUTTON (input floating).
228 * PA1 - PIN1 (input pullup).
229 * PA2 - PIN2 (input pullup).
230 * PA3 - PIN3 (input pullup).
231 * PA4 - PIN4 (input pullup).
232 * PA5 - PIN5 (input pullup).
233 * PA6 - PIN6 (input pullup).
234 * PA7 - PIN7 (input pullup).
235 * PA8 - PIN8 (input pullup).
236 * PA9 - PIN9 (input pullup).
237 * PA10 - PIN10 (input pullup).
238 * PA11 - USB_DM (input floating).
239 * PA12 - USB_DP (input floating).
240 * PA13 - SWDIO (alternate 0).
241 * PA14 - SWCLK (alternate 0).
242 * PA15 - PIN15 (input pullup).
243 */
244#define VAL_GPIOA_MODER (PIN_MODE_INPUT(GPIOA_BUTTON) | \
245 PIN_MODE_INPUT(GPIOA_PIN1) | \
246 PIN_MODE_INPUT(GPIOA_PIN2) | \
247 PIN_MODE_INPUT(GPIOA_PIN3) | \
248 PIN_MODE_INPUT(GPIOA_PIN4) | \
249 PIN_MODE_INPUT(GPIOA_PIN5) | \
250 PIN_MODE_INPUT(GPIOA_PIN6) | \
251 PIN_MODE_INPUT(GPIOA_PIN7) | \
252 PIN_MODE_INPUT(GPIOA_PIN8) | \
253 PIN_MODE_INPUT(GPIOA_PIN9) | \
254 PIN_MODE_INPUT(GPIOA_PIN10) | \
255 PIN_MODE_INPUT(GPIOA_USB_DM) | \
256 PIN_MODE_INPUT(GPIOA_USB_DP) | \
257 PIN_MODE_ALTERNATE(GPIOA_SWDIO) | \
258 PIN_MODE_ALTERNATE(GPIOA_SWCLK) | \
259 PIN_MODE_INPUT(GPIOA_PIN15))
260#define VAL_GPIOA_OTYPER (PIN_OTYPE_PUSHPULL(GPIOA_BUTTON) | \
261 PIN_OTYPE_PUSHPULL(GPIOA_PIN1) | \
262 PIN_OTYPE_PUSHPULL(GPIOA_PIN2) | \
263 PIN_OTYPE_PUSHPULL(GPIOA_PIN3) | \
264 PIN_OTYPE_PUSHPULL(GPIOA_PIN4) | \
265 PIN_OTYPE_PUSHPULL(GPIOA_PIN5) | \
266 PIN_OTYPE_PUSHPULL(GPIOA_PIN6) | \
267 PIN_OTYPE_PUSHPULL(GPIOA_PIN7) | \
268 PIN_OTYPE_PUSHPULL(GPIOA_PIN8) | \
269 PIN_OTYPE_PUSHPULL(GPIOA_PIN9) | \
270 PIN_OTYPE_PUSHPULL(GPIOA_PIN10) | \
271 PIN_OTYPE_PUSHPULL(GPIOA_USB_DM) | \
272 PIN_OTYPE_PUSHPULL(GPIOA_USB_DP) | \
273 PIN_OTYPE_PUSHPULL(GPIOA_SWDIO) | \
274 PIN_OTYPE_PUSHPULL(GPIOA_SWCLK) | \
275 PIN_OTYPE_PUSHPULL(GPIOA_PIN15))
276#define VAL_GPIOA_OSPEEDR (PIN_OSPEED_VERYLOW(GPIOA_BUTTON) | \
277 PIN_OSPEED_VERYLOW(GPIOA_PIN1) | \
278 PIN_OSPEED_VERYLOW(GPIOA_PIN2) | \
279 PIN_OSPEED_VERYLOW(GPIOA_PIN3) | \
280 PIN_OSPEED_VERYLOW(GPIOA_PIN4) | \
281 PIN_OSPEED_VERYLOW(GPIOA_PIN5) | \
282 PIN_OSPEED_VERYLOW(GPIOA_PIN6) | \
283 PIN_OSPEED_VERYLOW(GPIOA_PIN7) | \
284 PIN_OSPEED_VERYLOW(GPIOA_PIN8) | \
285 PIN_OSPEED_VERYLOW(GPIOA_PIN9) | \
286 PIN_OSPEED_VERYLOW(GPIOA_PIN10) | \
287 PIN_OSPEED_VERYLOW(GPIOA_USB_DM) | \
288 PIN_OSPEED_VERYLOW(GPIOA_USB_DP) | \
289 PIN_OSPEED_HIGH(GPIOA_SWDIO) | \
290 PIN_OSPEED_HIGH(GPIOA_SWCLK) | \
291 PIN_OSPEED_HIGH(GPIOA_PIN15))
292#define VAL_GPIOA_PUPDR (PIN_PUPDR_FLOATING(GPIOA_BUTTON) | \
293 PIN_PUPDR_PULLUP(GPIOA_PIN1) | \
294 PIN_PUPDR_PULLUP(GPIOA_PIN2) | \
295 PIN_PUPDR_PULLUP(GPIOA_PIN3) | \
296 PIN_PUPDR_PULLUP(GPIOA_PIN4) | \
297 PIN_PUPDR_PULLUP(GPIOA_PIN5) | \
298 PIN_PUPDR_PULLUP(GPIOA_PIN6) | \
299 PIN_PUPDR_PULLUP(GPIOA_PIN7) | \
300 PIN_PUPDR_PULLUP(GPIOA_PIN8) | \
301 PIN_PUPDR_PULLUP(GPIOA_PIN9) | \
302 PIN_PUPDR_PULLUP(GPIOA_PIN10) | \
303 PIN_PUPDR_FLOATING(GPIOA_USB_DM) | \
304 PIN_PUPDR_FLOATING(GPIOA_USB_DP) | \
305 PIN_PUPDR_PULLUP(GPIOA_SWDIO) | \
306 PIN_PUPDR_PULLDOWN(GPIOA_SWCLK) | \
307 PIN_PUPDR_PULLUP(GPIOA_PIN15))
308#define VAL_GPIOA_ODR (PIN_ODR_HIGH(GPIOA_BUTTON) | \
309 PIN_ODR_HIGH(GPIOA_PIN1) | \
310 PIN_ODR_HIGH(GPIOA_PIN2) | \
311 PIN_ODR_HIGH(GPIOA_PIN3) | \
312 PIN_ODR_HIGH(GPIOA_PIN4) | \
313 PIN_ODR_HIGH(GPIOA_PIN5) | \
314 PIN_ODR_HIGH(GPIOA_PIN6) | \
315 PIN_ODR_HIGH(GPIOA_PIN7) | \
316 PIN_ODR_HIGH(GPIOA_PIN8) | \
317 PIN_ODR_HIGH(GPIOA_PIN9) | \
318 PIN_ODR_HIGH(GPIOA_PIN10) | \
319 PIN_ODR_HIGH(GPIOA_USB_DM) | \
320 PIN_ODR_HIGH(GPIOA_USB_DP) | \
321 PIN_ODR_HIGH(GPIOA_SWDIO) | \
322 PIN_ODR_HIGH(GPIOA_SWCLK) | \
323 PIN_ODR_HIGH(GPIOA_PIN15))
324#define VAL_GPIOA_AFRL (PIN_AFIO_AF(GPIOA_BUTTON, 0U) | \
325 PIN_AFIO_AF(GPIOA_PIN1, 0U) | \
326 PIN_AFIO_AF(GPIOA_PIN2, 0U) | \
327 PIN_AFIO_AF(GPIOA_PIN3, 0U) | \
328 PIN_AFIO_AF(GPIOA_PIN4, 0U) | \
329 PIN_AFIO_AF(GPIOA_PIN5, 0U) | \
330 PIN_AFIO_AF(GPIOA_PIN6, 0U) | \
331 PIN_AFIO_AF(GPIOA_PIN7, 0U))
332#define VAL_GPIOA_AFRH (PIN_AFIO_AF(GPIOA_PIN8, 0U) | \
333 PIN_AFIO_AF(GPIOA_PIN9, 0U) | \
334 PIN_AFIO_AF(GPIOA_PIN10, 0U) | \
335 PIN_AFIO_AF(GPIOA_USB_DM, 0U) | \
336 PIN_AFIO_AF(GPIOA_USB_DP, 0U) | \
337 PIN_AFIO_AF(GPIOA_SWDIO, 0U) | \
338 PIN_AFIO_AF(GPIOA_SWCLK, 0U) | \
339 PIN_AFIO_AF(GPIOA_PIN15, 0U))
340
341/*
342 * GPIOB setup:
343 *
344 * PB0 - PIN0 (input pullup).
345 * PB1 - PIN1 (input pullup).
346 * PB2 - PIN2 (input pullup).
347 * PB3 - PIN3 (input pullup).
348 * PB4 - PIN4 (input pullup).
349 * PB5 - PIN5 (input pullup).
350 * PB6 - PIN6 (input pullup).
351 * PB7 - PIN7 (input pullup).
352 * PB8 - PIN8 (input pullup).
353 * PB9 - PIN9 (input pullup).
354 * PB10 - PIN10 (input pullup).
355 * PB11 - PIN11 (input pullup).
356 * PB12 - PIN12 (input pullup).
357 * PB13 - SPI2_SCK (alternate 0).
358 * PB14 - SPI2_MISO (alternate 0).
359 * PB15 - SPI2_MOSI (alternate 0).
360 */
361#define VAL_GPIOB_MODER (PIN_MODE_INPUT(GPIOB_PIN0) | \
362 PIN_MODE_INPUT(GPIOB_PIN1) | \
363 PIN_MODE_INPUT(GPIOB_PIN2) | \
364 PIN_MODE_INPUT(GPIOB_PIN3) | \
365 PIN_MODE_INPUT(GPIOB_PIN4) | \
366 PIN_MODE_INPUT(GPIOB_PIN5) | \
367 PIN_MODE_INPUT(GPIOB_PIN6) | \
368 PIN_MODE_INPUT(GPIOB_PIN7) | \
369 PIN_MODE_INPUT(GPIOB_PIN8) | \
370 PIN_MODE_INPUT(GPIOB_PIN9) | \
371 PIN_MODE_INPUT(GPIOB_PIN10) | \
372 PIN_MODE_INPUT(GPIOB_PIN11) | \
373 PIN_MODE_INPUT(GPIOB_PIN12) | \
374 PIN_MODE_ALTERNATE(GPIOB_SPI2_SCK) | \
375 PIN_MODE_ALTERNATE(GPIOB_SPI2_MISO) | \
376 PIN_MODE_ALTERNATE(GPIOB_SPI2_MOSI))
377#define VAL_GPIOB_OTYPER (PIN_OTYPE_PUSHPULL(GPIOB_PIN0) | \
378 PIN_OTYPE_PUSHPULL(GPIOB_PIN1) | \
379 PIN_OTYPE_PUSHPULL(GPIOB_PIN2) | \
380 PIN_OTYPE_PUSHPULL(GPIOB_PIN3) | \
381 PIN_OTYPE_PUSHPULL(GPIOB_PIN4) | \
382 PIN_OTYPE_PUSHPULL(GPIOB_PIN5) | \
383 PIN_OTYPE_PUSHPULL(GPIOB_PIN6) | \
384 PIN_OTYPE_PUSHPULL(GPIOB_PIN7) | \
385 PIN_OTYPE_PUSHPULL(GPIOB_PIN8) | \
386 PIN_OTYPE_PUSHPULL(GPIOB_PIN9) | \
387 PIN_OTYPE_PUSHPULL(GPIOB_PIN10) | \
388 PIN_OTYPE_PUSHPULL(GPIOB_PIN11) | \
389 PIN_OTYPE_PUSHPULL(GPIOB_PIN12) | \
390 PIN_OTYPE_PUSHPULL(GPIOB_SPI2_SCK) | \
391 PIN_OTYPE_PUSHPULL(GPIOB_SPI2_MISO) | \
392 PIN_OTYPE_PUSHPULL(GPIOB_SPI2_MOSI))
393#define VAL_GPIOB_OSPEEDR (PIN_OSPEED_VERYLOW(GPIOB_PIN0) | \
394 PIN_OSPEED_VERYLOW(GPIOB_PIN1) | \
395 PIN_OSPEED_HIGH(GPIOB_PIN2) | \
396 PIN_OSPEED_HIGH(GPIOB_PIN3) | \
397 PIN_OSPEED_HIGH(GPIOB_PIN4) | \
398 PIN_OSPEED_VERYLOW(GPIOB_PIN5) | \
399 PIN_OSPEED_VERYLOW(GPIOB_PIN6) | \
400 PIN_OSPEED_VERYLOW(GPIOB_PIN7) | \
401 PIN_OSPEED_VERYLOW(GPIOB_PIN8) | \
402 PIN_OSPEED_VERYLOW(GPIOB_PIN9) | \
403 PIN_OSPEED_VERYLOW(GPIOB_PIN10) | \
404 PIN_OSPEED_VERYLOW(GPIOB_PIN11) | \
405 PIN_OSPEED_VERYLOW(GPIOB_PIN12) | \
406 PIN_OSPEED_VERYLOW(GPIOB_SPI2_SCK) | \
407 PIN_OSPEED_VERYLOW(GPIOB_SPI2_MISO) | \
408 PIN_OSPEED_VERYLOW(GPIOB_SPI2_MOSI))
409#define VAL_GPIOB_PUPDR (PIN_PUPDR_PULLUP(GPIOB_PIN0) | \
410 PIN_PUPDR_PULLUP(GPIOB_PIN1) | \
411 PIN_PUPDR_PULLUP(GPIOB_PIN2) | \
412 PIN_PUPDR_PULLUP(GPIOB_PIN3) | \
413 PIN_PUPDR_PULLUP(GPIOB_PIN4) | \
414 PIN_PUPDR_PULLUP(GPIOB_PIN5) | \
415 PIN_PUPDR_PULLUP(GPIOB_PIN6) | \
416 PIN_PUPDR_PULLUP(GPIOB_PIN7) | \
417 PIN_PUPDR_PULLUP(GPIOB_PIN8) | \
418 PIN_PUPDR_PULLUP(GPIOB_PIN9) | \
419 PIN_PUPDR_PULLUP(GPIOB_PIN10) | \
420 PIN_PUPDR_PULLUP(GPIOB_PIN11) | \
421 PIN_PUPDR_PULLUP(GPIOB_PIN12) | \
422 PIN_PUPDR_FLOATING(GPIOB_SPI2_SCK) | \
423 PIN_PUPDR_FLOATING(GPIOB_SPI2_MISO) | \
424 PIN_PUPDR_FLOATING(GPIOB_SPI2_MOSI))
425#define VAL_GPIOB_ODR (PIN_ODR_HIGH(GPIOB_PIN0) | \
426 PIN_ODR_HIGH(GPIOB_PIN1) | \
427 PIN_ODR_HIGH(GPIOB_PIN2) | \
428 PIN_ODR_HIGH(GPIOB_PIN3) | \
429 PIN_ODR_HIGH(GPIOB_PIN4) | \
430 PIN_ODR_HIGH(GPIOB_PIN5) | \
431 PIN_ODR_HIGH(GPIOB_PIN6) | \
432 PIN_ODR_HIGH(GPIOB_PIN7) | \
433 PIN_ODR_HIGH(GPIOB_PIN8) | \
434 PIN_ODR_HIGH(GPIOB_PIN9) | \
435 PIN_ODR_HIGH(GPIOB_PIN10) | \
436 PIN_ODR_HIGH(GPIOB_PIN11) | \
437 PIN_ODR_HIGH(GPIOB_PIN12) | \
438 PIN_ODR_HIGH(GPIOB_SPI2_SCK) | \
439 PIN_ODR_HIGH(GPIOB_SPI2_MISO) | \
440 PIN_ODR_HIGH(GPIOB_SPI2_MOSI))
441#define VAL_GPIOB_AFRL (PIN_AFIO_AF(GPIOB_PIN0, 0U) | \
442 PIN_AFIO_AF(GPIOB_PIN1, 0U) | \
443 PIN_AFIO_AF(GPIOB_PIN2, 0U) | \
444 PIN_AFIO_AF(GPIOB_PIN3, 0U) | \
445 PIN_AFIO_AF(GPIOB_PIN4, 0U) | \
446 PIN_AFIO_AF(GPIOB_PIN5, 0U) | \
447 PIN_AFIO_AF(GPIOB_PIN6, 0U) | \
448 PIN_AFIO_AF(GPIOB_PIN7, 0U))
449#define VAL_GPIOB_AFRH (PIN_AFIO_AF(GPIOB_PIN8, 0U) | \
450 PIN_AFIO_AF(GPIOB_PIN9, 0U) | \
451 PIN_AFIO_AF(GPIOB_PIN10, 0U) | \
452 PIN_AFIO_AF(GPIOB_PIN11, 0U) | \
453 PIN_AFIO_AF(GPIOB_PIN12, 0U) | \
454 PIN_AFIO_AF(GPIOB_SPI2_SCK, 0U) | \
455 PIN_AFIO_AF(GPIOB_SPI2_MISO, 0U) | \
456 PIN_AFIO_AF(GPIOB_SPI2_MOSI, 0U))
457
458/*
459 * GPIOC setup:
460 *
461 * PC0 - MEMS_CS (output pushpull maximum).
462 * PC1 - PIN1 (input pullup).
463 * PC2 - PIN2 (input pullup).
464 * PC3 - PIN3 (input pullup).
465 * PC4 - PIN4 (input pullup).
466 * PC5 - PIN5 (input pullup).
467 * PC6 - LED_RED (output pushpull maximum).
468 * PC7 - LED_BLUE (output pushpull maximum).
469 * PC8 - LED_ORANGE (output pushpull maximum).
470 * PC9 - LED_GREEN (output pushpull maximum).
471 * PC10 - PIN10 (input pullup).
472 * PC11 - PIN11 (input pullup).
473 * PC12 - PIN12 (input pullup).
474 * PC13 - PIN13 (input pullup).
475 * PC14 - OSC32_IN (input floating).
476 * PC15 - OSC32_OUT (input floating).
477 */
478#define VAL_GPIOC_MODER (PIN_MODE_OUTPUT(GPIOC_MEMS_CS) | \
479 PIN_MODE_INPUT(GPIOC_PIN1) | \
480 PIN_MODE_INPUT(GPIOC_PIN2) | \
481 PIN_MODE_INPUT(GPIOC_PIN3) | \
482 PIN_MODE_INPUT(GPIOC_PIN4) | \
483 PIN_MODE_INPUT(GPIOC_PIN5) | \
484 PIN_MODE_OUTPUT(GPIOC_LED_RED) | \
485 PIN_MODE_OUTPUT(GPIOC_LED_BLUE) | \
486 PIN_MODE_OUTPUT(GPIOC_LED_ORANGE) | \
487 PIN_MODE_OUTPUT(GPIOC_LED_GREEN) | \
488 PIN_MODE_INPUT(GPIOC_PIN10) | \
489 PIN_MODE_INPUT(GPIOC_PIN11) | \
490 PIN_MODE_INPUT(GPIOC_PIN12) | \
491 PIN_MODE_INPUT(GPIOC_PIN13) | \
492 PIN_MODE_INPUT(GPIOC_OSC32_IN) | \
493 PIN_MODE_INPUT(GPIOC_OSC32_OUT))
494#define VAL_GPIOC_OTYPER (PIN_OTYPE_PUSHPULL(GPIOC_MEMS_CS) | \
495 PIN_OTYPE_PUSHPULL(GPIOC_PIN1) | \
496 PIN_OTYPE_PUSHPULL(GPIOC_PIN2) | \
497 PIN_OTYPE_PUSHPULL(GPIOC_PIN3) | \
498 PIN_OTYPE_PUSHPULL(GPIOC_PIN4) | \
499 PIN_OTYPE_PUSHPULL(GPIOC_PIN5) | \
500 PIN_OTYPE_PUSHPULL(GPIOC_LED_RED) | \
501 PIN_OTYPE_PUSHPULL(GPIOC_LED_BLUE) | \
502 PIN_OTYPE_PUSHPULL(GPIOC_LED_ORANGE) | \
503 PIN_OTYPE_PUSHPULL(GPIOC_LED_GREEN) | \
504 PIN_OTYPE_PUSHPULL(GPIOC_PIN10) | \
505 PIN_OTYPE_PUSHPULL(GPIOC_PIN11) | \
506 PIN_OTYPE_PUSHPULL(GPIOC_PIN12) | \
507 PIN_OTYPE_PUSHPULL(GPIOC_PIN13) | \
508 PIN_OTYPE_PUSHPULL(GPIOC_OSC32_IN) | \
509 PIN_OTYPE_PUSHPULL(GPIOC_OSC32_OUT))
510#define VAL_GPIOC_OSPEEDR (PIN_OSPEED_HIGH(GPIOC_MEMS_CS) | \
511 PIN_OSPEED_VERYLOW(GPIOC_PIN1) | \
512 PIN_OSPEED_VERYLOW(GPIOC_PIN2) | \
513 PIN_OSPEED_VERYLOW(GPIOC_PIN3) | \
514 PIN_OSPEED_VERYLOW(GPIOC_PIN4) | \
515 PIN_OSPEED_VERYLOW(GPIOC_PIN5) | \
516 PIN_OSPEED_HIGH(GPIOC_LED_RED) | \
517 PIN_OSPEED_HIGH(GPIOC_LED_BLUE) | \
518 PIN_OSPEED_HIGH(GPIOC_LED_ORANGE) | \
519 PIN_OSPEED_HIGH(GPIOC_LED_GREEN) | \
520 PIN_OSPEED_VERYLOW(GPIOC_PIN10) | \
521 PIN_OSPEED_VERYLOW(GPIOC_PIN11) | \
522 PIN_OSPEED_VERYLOW(GPIOC_PIN12) | \
523 PIN_OSPEED_VERYLOW(GPIOC_PIN13) | \
524 PIN_OSPEED_HIGH(GPIOC_OSC32_IN) | \
525 PIN_OSPEED_HIGH(GPIOC_OSC32_OUT))
526#define VAL_GPIOC_PUPDR (PIN_PUPDR_FLOATING(GPIOC_MEMS_CS) | \
527 PIN_PUPDR_PULLUP(GPIOC_PIN1) | \
528 PIN_PUPDR_PULLUP(GPIOC_PIN2) | \
529 PIN_PUPDR_PULLUP(GPIOC_PIN3) | \
530 PIN_PUPDR_PULLUP(GPIOC_PIN4) | \
531 PIN_PUPDR_PULLUP(GPIOC_PIN5) | \
532 PIN_PUPDR_FLOATING(GPIOC_LED_RED) | \
533 PIN_PUPDR_FLOATING(GPIOC_LED_BLUE) | \
534 PIN_PUPDR_FLOATING(GPIOC_LED_ORANGE) | \
535 PIN_PUPDR_FLOATING(GPIOC_LED_GREEN) | \
536 PIN_PUPDR_PULLUP(GPIOC_PIN10) | \
537 PIN_PUPDR_PULLUP(GPIOC_PIN11) | \
538 PIN_PUPDR_PULLUP(GPIOC_PIN12) | \
539 PIN_PUPDR_PULLUP(GPIOC_PIN13) | \
540 PIN_PUPDR_FLOATING(GPIOC_OSC32_IN) | \
541 PIN_PUPDR_FLOATING(GPIOC_OSC32_OUT))
542#define VAL_GPIOC_ODR (PIN_ODR_HIGH(GPIOC_MEMS_CS) | \
543 PIN_ODR_HIGH(GPIOC_PIN1) | \
544 PIN_ODR_HIGH(GPIOC_PIN2) | \
545 PIN_ODR_HIGH(GPIOC_PIN3) | \
546 PIN_ODR_HIGH(GPIOC_PIN4) | \
547 PIN_ODR_HIGH(GPIOC_PIN5) | \
548 PIN_ODR_LOW(GPIOC_LED_RED) | \
549 PIN_ODR_LOW(GPIOC_LED_BLUE) | \
550 PIN_ODR_LOW(GPIOC_LED_ORANGE) | \
551 PIN_ODR_LOW(GPIOC_LED_GREEN) | \
552 PIN_ODR_HIGH(GPIOC_PIN10) | \
553 PIN_ODR_HIGH(GPIOC_PIN11) | \
554 PIN_ODR_HIGH(GPIOC_PIN12) | \
555 PIN_ODR_HIGH(GPIOC_PIN13) | \
556 PIN_ODR_HIGH(GPIOC_OSC32_IN) | \
557 PIN_ODR_HIGH(GPIOC_OSC32_OUT))
558#define VAL_GPIOC_AFRL (PIN_AFIO_AF(GPIOC_MEMS_CS, 0U) | \
559 PIN_AFIO_AF(GPIOC_PIN1, 0U) | \
560 PIN_AFIO_AF(GPIOC_PIN2, 0U) | \
561 PIN_AFIO_AF(GPIOC_PIN3, 0U) | \
562 PIN_AFIO_AF(GPIOC_PIN4, 0U) | \
563 PIN_AFIO_AF(GPIOC_PIN5, 0U) | \
564 PIN_AFIO_AF(GPIOC_LED_RED, 0U) | \
565 PIN_AFIO_AF(GPIOC_LED_BLUE, 0U))
566#define VAL_GPIOC_AFRH (PIN_AFIO_AF(GPIOC_LED_ORANGE, 0U) | \
567 PIN_AFIO_AF(GPIOC_LED_GREEN, 0U) | \
568 PIN_AFIO_AF(GPIOC_PIN10, 0U) | \
569 PIN_AFIO_AF(GPIOC_PIN11, 0U) | \
570 PIN_AFIO_AF(GPIOC_PIN12, 0U) | \
571 PIN_AFIO_AF(GPIOC_PIN13, 0U) | \
572 PIN_AFIO_AF(GPIOC_OSC32_IN, 0U) | \
573 PIN_AFIO_AF(GPIOC_OSC32_OUT, 0U))
574
575/*
576 * GPIOD setup:
577 *
578 * PD0 - PIN0 (input pullup).
579 * PD1 - PIN1 (input pullup).
580 * PD2 - PIN2 (input pullup).
581 * PD3 - PIN3 (input pullup).
582 * PD4 - PIN4 (input pullup).
583 * PD5 - PIN5 (input pullup).
584 * PD6 - PIN6 (input pullup).
585 * PD7 - PIN7 (input pullup).
586 * PD8 - PIN8 (input pullup).
587 * PD9 - PIN9 (input pullup).
588 * PD10 - PIN10 (input pullup).
589 * PD11 - PIN11 (input pullup).
590 * PD12 - PIN12 (input pullup).
591 * PD13 - PIN13 (input pullup).
592 * PD14 - PIN14 (input pullup).
593 * PD15 - PIN15 (input pullup).
594 */
595#define VAL_GPIOD_MODER (PIN_MODE_INPUT(GPIOD_PIN0) | \
596 PIN_MODE_INPUT(GPIOD_PIN1) | \
597 PIN_MODE_INPUT(GPIOD_PIN2) | \
598 PIN_MODE_INPUT(GPIOD_PIN3) | \
599 PIN_MODE_INPUT(GPIOD_PIN4) | \
600 PIN_MODE_INPUT(GPIOD_PIN5) | \
601 PIN_MODE_INPUT(GPIOD_PIN6) | \
602 PIN_MODE_INPUT(GPIOD_PIN7) | \
603 PIN_MODE_INPUT(GPIOD_PIN8) | \
604 PIN_MODE_INPUT(GPIOD_PIN9) | \
605 PIN_MODE_INPUT(GPIOD_PIN10) | \
606 PIN_MODE_INPUT(GPIOD_PIN11) | \
607 PIN_MODE_INPUT(GPIOD_PIN12) | \
608 PIN_MODE_INPUT(GPIOD_PIN13) | \
609 PIN_MODE_INPUT(GPIOD_PIN14) | \
610 PIN_MODE_INPUT(GPIOD_PIN15))
611#define VAL_GPIOD_OTYPER (PIN_OTYPE_PUSHPULL(GPIOD_PIN0) | \
612 PIN_OTYPE_PUSHPULL(GPIOD_PIN1) | \
613 PIN_OTYPE_PUSHPULL(GPIOD_PIN2) | \
614 PIN_OTYPE_PUSHPULL(GPIOD_PIN3) | \
615 PIN_OTYPE_PUSHPULL(GPIOD_PIN4) | \
616 PIN_OTYPE_PUSHPULL(GPIOD_PIN5) | \
617 PIN_OTYPE_PUSHPULL(GPIOD_PIN6) | \
618 PIN_OTYPE_PUSHPULL(GPIOD_PIN7) | \
619 PIN_OTYPE_PUSHPULL(GPIOD_PIN8) | \
620 PIN_OTYPE_PUSHPULL(GPIOD_PIN9) | \
621 PIN_OTYPE_PUSHPULL(GPIOD_PIN10) | \
622 PIN_OTYPE_PUSHPULL(GPIOD_PIN11) | \
623 PIN_OTYPE_PUSHPULL(GPIOD_PIN12) | \
624 PIN_OTYPE_PUSHPULL(GPIOD_PIN13) | \
625 PIN_OTYPE_PUSHPULL(GPIOD_PIN14) | \
626 PIN_OTYPE_PUSHPULL(GPIOD_PIN15))
627#define VAL_GPIOD_OSPEEDR (PIN_OSPEED_VERYLOW(GPIOD_PIN0) | \
628 PIN_OSPEED_VERYLOW(GPIOD_PIN1) | \
629 PIN_OSPEED_VERYLOW(GPIOD_PIN2) | \
630 PIN_OSPEED_VERYLOW(GPIOD_PIN3) | \
631 PIN_OSPEED_VERYLOW(GPIOD_PIN4) | \
632 PIN_OSPEED_VERYLOW(GPIOD_PIN5) | \
633 PIN_OSPEED_VERYLOW(GPIOD_PIN6) | \
634 PIN_OSPEED_VERYLOW(GPIOD_PIN7) | \
635 PIN_OSPEED_VERYLOW(GPIOD_PIN8) | \
636 PIN_OSPEED_VERYLOW(GPIOD_PIN9) | \
637 PIN_OSPEED_VERYLOW(GPIOD_PIN10) | \
638 PIN_OSPEED_VERYLOW(GPIOD_PIN11) | \
639 PIN_OSPEED_VERYLOW(GPIOD_PIN12) | \
640 PIN_OSPEED_VERYLOW(GPIOD_PIN13) | \
641 PIN_OSPEED_VERYLOW(GPIOD_PIN14) | \
642 PIN_OSPEED_VERYLOW(GPIOD_PIN15))
643#define VAL_GPIOD_PUPDR (PIN_PUPDR_PULLUP(GPIOD_PIN0) | \
644 PIN_PUPDR_PULLUP(GPIOD_PIN1) | \
645 PIN_PUPDR_PULLUP(GPIOD_PIN2) | \
646 PIN_PUPDR_PULLUP(GPIOD_PIN3) | \
647 PIN_PUPDR_PULLUP(GPIOD_PIN4) | \
648 PIN_PUPDR_PULLUP(GPIOD_PIN5) | \
649 PIN_PUPDR_PULLUP(GPIOD_PIN6) | \
650 PIN_PUPDR_PULLUP(GPIOD_PIN7) | \
651 PIN_PUPDR_PULLUP(GPIOD_PIN8) | \
652 PIN_PUPDR_PULLUP(GPIOD_PIN9) | \
653 PIN_PUPDR_PULLUP(GPIOD_PIN10) | \
654 PIN_PUPDR_PULLUP(GPIOD_PIN11) | \
655 PIN_PUPDR_PULLUP(GPIOD_PIN12) | \
656 PIN_PUPDR_PULLUP(GPIOD_PIN13) | \
657 PIN_PUPDR_PULLUP(GPIOD_PIN14) | \
658 PIN_PUPDR_PULLUP(GPIOD_PIN15))
659#define VAL_GPIOD_ODR (PIN_ODR_HIGH(GPIOD_PIN0) | \
660 PIN_ODR_HIGH(GPIOD_PIN1) | \
661 PIN_ODR_HIGH(GPIOD_PIN2) | \
662 PIN_ODR_HIGH(GPIOD_PIN3) | \
663 PIN_ODR_HIGH(GPIOD_PIN4) | \
664 PIN_ODR_HIGH(GPIOD_PIN5) | \
665 PIN_ODR_HIGH(GPIOD_PIN6) | \
666 PIN_ODR_HIGH(GPIOD_PIN7) | \
667 PIN_ODR_HIGH(GPIOD_PIN8) | \
668 PIN_ODR_HIGH(GPIOD_PIN9) | \
669 PIN_ODR_HIGH(GPIOD_PIN10) | \
670 PIN_ODR_HIGH(GPIOD_PIN11) | \
671 PIN_ODR_HIGH(GPIOD_PIN12) | \
672 PIN_ODR_HIGH(GPIOD_PIN13) | \
673 PIN_ODR_HIGH(GPIOD_PIN14) | \
674 PIN_ODR_HIGH(GPIOD_PIN15))
675#define VAL_GPIOD_AFRL (PIN_AFIO_AF(GPIOD_PIN0, 0U) | \
676 PIN_AFIO_AF(GPIOD_PIN1, 0U) | \
677 PIN_AFIO_AF(GPIOD_PIN2, 0U) | \
678 PIN_AFIO_AF(GPIOD_PIN3, 0U) | \
679 PIN_AFIO_AF(GPIOD_PIN4, 0U) | \
680 PIN_AFIO_AF(GPIOD_PIN5, 0U) | \
681 PIN_AFIO_AF(GPIOD_PIN6, 0U) | \
682 PIN_AFIO_AF(GPIOD_PIN7, 0U))
683#define VAL_GPIOD_AFRH (PIN_AFIO_AF(GPIOD_PIN8, 0U) | \
684 PIN_AFIO_AF(GPIOD_PIN9, 0U) | \
685 PIN_AFIO_AF(GPIOD_PIN10, 0U) | \
686 PIN_AFIO_AF(GPIOD_PIN11, 0U) | \
687 PIN_AFIO_AF(GPIOD_PIN12, 0U) | \
688 PIN_AFIO_AF(GPIOD_PIN13, 0U) | \
689 PIN_AFIO_AF(GPIOD_PIN14, 0U) | \
690 PIN_AFIO_AF(GPIOD_PIN15, 0U))
691
692/*
693 * GPIOE setup:
694 *
695 * PE0 - PIN0 (input pullup).
696 * PE1 - PIN1 (input pullup).
697 * PE2 - PIN2 (input pullup).
698 * PE3 - PIN3 (input pullup).
699 * PE4 - PIN4 (input pullup).
700 * PE5 - PIN5 (input pullup).
701 * PE6 - PIN6 (input pullup).
702 * PE7 - PIN7 (input pullup).
703 * PE8 - PIN8 (input pullup).
704 * PE9 - PIN9 (input pullup).
705 * PE10 - PIN10 (input pullup).
706 * PE11 - PIN11 (input pullup).
707 * PE12 - PIN12 (input pullup).
708 * PE13 - PIN13 (input pullup).
709 * PE14 - PIN14 (input pullup).
710 * PE15 - PIN15 (input pullup).
711 */
712#define VAL_GPIOE_MODER (PIN_MODE_INPUT(GPIOE_PIN0) | \
713 PIN_MODE_INPUT(GPIOE_PIN1) | \
714 PIN_MODE_INPUT(GPIOE_PIN2) | \
715 PIN_MODE_INPUT(GPIOE_PIN3) | \
716 PIN_MODE_INPUT(GPIOE_PIN4) | \
717 PIN_MODE_INPUT(GPIOE_PIN5) | \
718 PIN_MODE_INPUT(GPIOE_PIN6) | \
719 PIN_MODE_INPUT(GPIOE_PIN7) | \
720 PIN_MODE_INPUT(GPIOE_PIN8) | \
721 PIN_MODE_INPUT(GPIOE_PIN9) | \
722 PIN_MODE_INPUT(GPIOE_PIN10) | \
723 PIN_MODE_INPUT(GPIOE_PIN11) | \
724 PIN_MODE_INPUT(GPIOE_PIN12) | \
725 PIN_MODE_INPUT(GPIOE_PIN13) | \
726 PIN_MODE_INPUT(GPIOE_PIN14) | \
727 PIN_MODE_INPUT(GPIOE_PIN15))
728#define VAL_GPIOE_OTYPER (PIN_OTYPE_PUSHPULL(GPIOE_PIN0) | \
729 PIN_OTYPE_PUSHPULL(GPIOE_PIN1) | \
730 PIN_OTYPE_PUSHPULL(GPIOE_PIN2) | \
731 PIN_OTYPE_PUSHPULL(GPIOE_PIN3) | \
732 PIN_OTYPE_PUSHPULL(GPIOE_PIN4) | \
733 PIN_OTYPE_PUSHPULL(GPIOE_PIN5) | \
734 PIN_OTYPE_PUSHPULL(GPIOE_PIN6) | \
735 PIN_OTYPE_PUSHPULL(GPIOE_PIN7) | \
736 PIN_OTYPE_PUSHPULL(GPIOE_PIN8) | \
737 PIN_OTYPE_PUSHPULL(GPIOE_PIN9) | \
738 PIN_OTYPE_PUSHPULL(GPIOE_PIN10) | \
739 PIN_OTYPE_PUSHPULL(GPIOE_PIN11) | \
740 PIN_OTYPE_PUSHPULL(GPIOE_PIN12) | \
741 PIN_OTYPE_PUSHPULL(GPIOE_PIN13) | \
742 PIN_OTYPE_PUSHPULL(GPIOE_PIN14) | \
743 PIN_OTYPE_PUSHPULL(GPIOE_PIN15))
744#define VAL_GPIOE_OSPEEDR (PIN_OSPEED_VERYLOW(GPIOE_PIN0) | \
745 PIN_OSPEED_VERYLOW(GPIOE_PIN1) | \
746 PIN_OSPEED_VERYLOW(GPIOE_PIN2) | \
747 PIN_OSPEED_VERYLOW(GPIOE_PIN3) | \
748 PIN_OSPEED_VERYLOW(GPIOE_PIN4) | \
749 PIN_OSPEED_VERYLOW(GPIOE_PIN5) | \
750 PIN_OSPEED_VERYLOW(GPIOE_PIN6) | \
751 PIN_OSPEED_VERYLOW(GPIOE_PIN7) | \
752 PIN_OSPEED_VERYLOW(GPIOE_PIN8) | \
753 PIN_OSPEED_VERYLOW(GPIOE_PIN9) | \
754 PIN_OSPEED_VERYLOW(GPIOE_PIN10) | \
755 PIN_OSPEED_VERYLOW(GPIOE_PIN11) | \
756 PIN_OSPEED_VERYLOW(GPIOE_PIN12) | \
757 PIN_OSPEED_VERYLOW(GPIOE_PIN13) | \
758 PIN_OSPEED_VERYLOW(GPIOE_PIN14) | \
759 PIN_OSPEED_VERYLOW(GPIOE_PIN15))
760#define VAL_GPIOE_PUPDR (PIN_PUPDR_PULLUP(GPIOE_PIN0) | \
761 PIN_PUPDR_PULLUP(GPIOE_PIN1) | \
762 PIN_PUPDR_PULLUP(GPIOE_PIN2) | \
763 PIN_PUPDR_PULLUP(GPIOE_PIN3) | \
764 PIN_PUPDR_PULLUP(GPIOE_PIN4) | \
765 PIN_PUPDR_PULLUP(GPIOE_PIN5) | \
766 PIN_PUPDR_PULLUP(GPIOE_PIN6) | \
767 PIN_PUPDR_PULLUP(GPIOE_PIN7) | \
768 PIN_PUPDR_PULLUP(GPIOE_PIN8) | \
769 PIN_PUPDR_PULLUP(GPIOE_PIN9) | \
770 PIN_PUPDR_PULLUP(GPIOE_PIN10) | \
771 PIN_PUPDR_PULLUP(GPIOE_PIN11) | \
772 PIN_PUPDR_PULLUP(GPIOE_PIN12) | \
773 PIN_PUPDR_PULLUP(GPIOE_PIN13) | \
774 PIN_PUPDR_PULLUP(GPIOE_PIN14) | \
775 PIN_PUPDR_PULLUP(GPIOE_PIN15))
776#define VAL_GPIOE_ODR (PIN_ODR_HIGH(GPIOE_PIN0) | \
777 PIN_ODR_HIGH(GPIOE_PIN1) | \
778 PIN_ODR_HIGH(GPIOE_PIN2) | \
779 PIN_ODR_HIGH(GPIOE_PIN3) | \
780 PIN_ODR_HIGH(GPIOE_PIN4) | \
781 PIN_ODR_HIGH(GPIOE_PIN5) | \
782 PIN_ODR_HIGH(GPIOE_PIN6) | \
783 PIN_ODR_HIGH(GPIOE_PIN7) | \
784 PIN_ODR_HIGH(GPIOE_PIN8) | \
785 PIN_ODR_HIGH(GPIOE_PIN9) | \
786 PIN_ODR_HIGH(GPIOE_PIN10) | \
787 PIN_ODR_HIGH(GPIOE_PIN11) | \
788 PIN_ODR_HIGH(GPIOE_PIN12) | \
789 PIN_ODR_HIGH(GPIOE_PIN13) | \
790 PIN_ODR_HIGH(GPIOE_PIN14) | \
791 PIN_ODR_HIGH(GPIOE_PIN15))
792#define VAL_GPIOE_AFRL (PIN_AFIO_AF(GPIOE_PIN0, 0U) | \
793 PIN_AFIO_AF(GPIOE_PIN1, 0U) | \
794 PIN_AFIO_AF(GPIOE_PIN2, 0U) | \
795 PIN_AFIO_AF(GPIOE_PIN3, 0U) | \
796 PIN_AFIO_AF(GPIOE_PIN4, 0U) | \
797 PIN_AFIO_AF(GPIOE_PIN5, 0U) | \
798 PIN_AFIO_AF(GPIOE_PIN6, 0U) | \
799 PIN_AFIO_AF(GPIOE_PIN7, 0U))
800#define VAL_GPIOE_AFRH (PIN_AFIO_AF(GPIOE_PIN8, 0U) | \
801 PIN_AFIO_AF(GPIOE_PIN9, 0U) | \
802 PIN_AFIO_AF(GPIOE_PIN10, 0U) | \
803 PIN_AFIO_AF(GPIOE_PIN11, 0U) | \
804 PIN_AFIO_AF(GPIOE_PIN12, 0U) | \
805 PIN_AFIO_AF(GPIOE_PIN13, 0U) | \
806 PIN_AFIO_AF(GPIOE_PIN14, 0U) | \
807 PIN_AFIO_AF(GPIOE_PIN15, 0U))
808
809/*
810 * GPIOF setup:
811 *
812 * PF0 - OSC_IN (input floating).
813 * PF1 - OSC_OUT (input floating).
814 * PF2 - PIN2 (input pullup).
815 * PF3 - PIN3 (input pullup).
816 * PF4 - PIN4 (input pullup).
817 * PF5 - PIN5 (input pullup).
818 * PF6 - PIN6 (input pullup).
819 * PF7 - PIN7 (input pullup).
820 * PF8 - PIN8 (input pullup).
821 * PF9 - PIN9 (input pullup).
822 * PF10 - PIN10 (input pullup).
823 * PF11 - PIN11 (input pullup).
824 * PF12 - PIN12 (input pullup).
825 * PF13 - PIN13 (input pullup).
826 * PF14 - PIN14 (input pullup).
827 * PF15 - PIN15 (input pullup).
828 */
829#define VAL_GPIOF_MODER (PIN_MODE_INPUT(GPIOF_OSC_IN) | \
830 PIN_MODE_INPUT(GPIOF_OSC_OUT) | \
831 PIN_MODE_INPUT(GPIOF_PIN2) | \
832 PIN_MODE_INPUT(GPIOF_PIN3) | \
833 PIN_MODE_INPUT(GPIOF_PIN4) | \
834 PIN_MODE_INPUT(GPIOF_PIN5) | \
835 PIN_MODE_INPUT(GPIOF_PIN6) | \
836 PIN_MODE_INPUT(GPIOF_PIN7) | \
837 PIN_MODE_INPUT(GPIOF_PIN8) | \
838 PIN_MODE_INPUT(GPIOF_PIN9) | \
839 PIN_MODE_INPUT(GPIOF_PIN10) | \
840 PIN_MODE_INPUT(GPIOF_PIN11) | \
841 PIN_MODE_INPUT(GPIOF_PIN12) | \
842 PIN_MODE_INPUT(GPIOF_PIN13) | \
843 PIN_MODE_INPUT(GPIOF_PIN14) | \
844 PIN_MODE_INPUT(GPIOF_PIN15))
845#define VAL_GPIOF_OTYPER (PIN_OTYPE_PUSHPULL(GPIOF_OSC_IN) | \
846 PIN_OTYPE_PUSHPULL(GPIOF_OSC_OUT) | \
847 PIN_OTYPE_PUSHPULL(GPIOF_PIN2) | \
848 PIN_OTYPE_PUSHPULL(GPIOF_PIN3) | \
849 PIN_OTYPE_PUSHPULL(GPIOF_PIN4) | \
850 PIN_OTYPE_PUSHPULL(GPIOF_PIN5) | \
851 PIN_OTYPE_PUSHPULL(GPIOF_PIN6) | \
852 PIN_OTYPE_PUSHPULL(GPIOF_PIN7) | \
853 PIN_OTYPE_PUSHPULL(GPIOF_PIN8) | \
854 PIN_OTYPE_PUSHPULL(GPIOF_PIN9) | \
855 PIN_OTYPE_PUSHPULL(GPIOF_PIN10) | \
856 PIN_OTYPE_PUSHPULL(GPIOF_PIN11) | \
857 PIN_OTYPE_PUSHPULL(GPIOF_PIN12) | \
858 PIN_OTYPE_PUSHPULL(GPIOF_PIN13) | \
859 PIN_OTYPE_PUSHPULL(GPIOF_PIN14) | \
860 PIN_OTYPE_PUSHPULL(GPIOF_PIN15))
861#define VAL_GPIOF_OSPEEDR (PIN_OSPEED_VERYLOW(GPIOF_OSC_IN) | \
862 PIN_OSPEED_VERYLOW(GPIOF_OSC_OUT) | \
863 PIN_OSPEED_VERYLOW(GPIOF_PIN2) | \
864 PIN_OSPEED_VERYLOW(GPIOF_PIN3) | \
865 PIN_OSPEED_VERYLOW(GPIOF_PIN4) | \
866 PIN_OSPEED_VERYLOW(GPIOF_PIN5) | \
867 PIN_OSPEED_VERYLOW(GPIOF_PIN6) | \
868 PIN_OSPEED_VERYLOW(GPIOF_PIN7) | \
869 PIN_OSPEED_VERYLOW(GPIOF_PIN8) | \
870 PIN_OSPEED_VERYLOW(GPIOF_PIN9) | \
871 PIN_OSPEED_VERYLOW(GPIOF_PIN10) | \
872 PIN_OSPEED_VERYLOW(GPIOF_PIN11) | \
873 PIN_OSPEED_VERYLOW(GPIOF_PIN12) | \
874 PIN_OSPEED_VERYLOW(GPIOF_PIN13) | \
875 PIN_OSPEED_VERYLOW(GPIOF_PIN14) | \
876 PIN_OSPEED_VERYLOW(GPIOF_PIN15))
877#define VAL_GPIOF_PUPDR (PIN_PUPDR_FLOATING(GPIOF_OSC_IN) | \
878 PIN_PUPDR_FLOATING(GPIOF_OSC_OUT) | \
879 PIN_PUPDR_PULLUP(GPIOF_PIN2) | \
880 PIN_PUPDR_PULLUP(GPIOF_PIN3) | \
881 PIN_PUPDR_PULLUP(GPIOF_PIN4) | \
882 PIN_PUPDR_PULLUP(GPIOF_PIN5) | \
883 PIN_PUPDR_PULLUP(GPIOF_PIN6) | \
884 PIN_PUPDR_PULLUP(GPIOF_PIN7) | \
885 PIN_PUPDR_PULLUP(GPIOF_PIN8) | \
886 PIN_PUPDR_PULLUP(GPIOF_PIN9) | \
887 PIN_PUPDR_PULLUP(GPIOF_PIN10) | \
888 PIN_PUPDR_PULLUP(GPIOF_PIN11) | \
889 PIN_PUPDR_PULLUP(GPIOF_PIN12) | \
890 PIN_PUPDR_PULLUP(GPIOF_PIN13) | \
891 PIN_PUPDR_PULLUP(GPIOF_PIN14) | \
892 PIN_PUPDR_PULLUP(GPIOF_PIN15))
893#define VAL_GPIOF_ODR (PIN_ODR_HIGH(GPIOF_OSC_IN) | \
894 PIN_ODR_HIGH(GPIOF_OSC_OUT) | \
895 PIN_ODR_HIGH(GPIOF_PIN2) | \
896 PIN_ODR_HIGH(GPIOF_PIN3) | \
897 PIN_ODR_HIGH(GPIOF_PIN4) | \
898 PIN_ODR_HIGH(GPIOF_PIN5) | \
899 PIN_ODR_HIGH(GPIOF_PIN6) | \
900 PIN_ODR_HIGH(GPIOF_PIN7) | \
901 PIN_ODR_HIGH(GPIOF_PIN8) | \
902 PIN_ODR_HIGH(GPIOF_PIN9) | \
903 PIN_ODR_HIGH(GPIOF_PIN10) | \
904 PIN_ODR_HIGH(GPIOF_PIN11) | \
905 PIN_ODR_HIGH(GPIOF_PIN12) | \
906 PIN_ODR_HIGH(GPIOF_PIN13) | \
907 PIN_ODR_HIGH(GPIOF_PIN14) | \
908 PIN_ODR_HIGH(GPIOF_PIN15))
909#define VAL_GPIOF_AFRL (PIN_AFIO_AF(GPIOF_OSC_IN, 0U) | \
910 PIN_AFIO_AF(GPIOF_OSC_OUT, 0U) | \
911 PIN_AFIO_AF(GPIOF_PIN2, 0U) | \
912 PIN_AFIO_AF(GPIOF_PIN3, 0U) | \
913 PIN_AFIO_AF(GPIOF_PIN4, 0U) | \
914 PIN_AFIO_AF(GPIOF_PIN5, 0U) | \
915 PIN_AFIO_AF(GPIOF_PIN6, 0U) | \
916 PIN_AFIO_AF(GPIOF_PIN7, 0U))
917#define VAL_GPIOF_AFRH (PIN_AFIO_AF(GPIOF_PIN8, 0U) | \
918 PIN_AFIO_AF(GPIOF_PIN9, 0U) | \
919 PIN_AFIO_AF(GPIOF_PIN10, 0U) | \
920 PIN_AFIO_AF(GPIOF_PIN11, 0U) | \
921 PIN_AFIO_AF(GPIOF_PIN12, 0U) | \
922 PIN_AFIO_AF(GPIOF_PIN13, 0U) | \
923 PIN_AFIO_AF(GPIOF_PIN14, 0U) | \
924 PIN_AFIO_AF(GPIOF_PIN15, 0U))
925
926/*===========================================================================*/
927/* External declarations. */
928/*===========================================================================*/
929
930#if !defined(_FROM_ASM_)
931#ifdef __cplusplus
932extern "C" {
933#endif
934 void boardInit(void);
935#ifdef __cplusplus
936}
937#endif
938#endif /* _FROM_ASM_ */
939
940#endif /* BOARD_H */
diff --git a/keyboards/nebula12/boards/ST_STM32F072B_DISCOVERY/board.mk b/keyboards/nebula12/boards/ST_STM32F072B_DISCOVERY/board.mk
new file mode 100644
index 000000000..b98dcdd26
--- /dev/null
+++ b/keyboards/nebula12/boards/ST_STM32F072B_DISCOVERY/board.mk
@@ -0,0 +1,5 @@
1# List of all the board related files.
2BOARDSRC = $(BOARD_PATH)/boards/ST_STM32F072B_DISCOVERY/board.c
3
4# Required include directories
5BOARDINC = $(BOARD_PATH)/boards/ST_STM32F072B_DISCOVERY
diff --git a/keyboards/nebula12/boards/ST_STM32F072B_DISCOVERY/cfg/board.chcfg b/keyboards/nebula12/boards/ST_STM32F072B_DISCOVERY/cfg/board.chcfg
new file mode 100644
index 000000000..9c7cf4fd7
--- /dev/null
+++ b/keyboards/nebula12/boards/ST_STM32F072B_DISCOVERY/cfg/board.chcfg
@@ -0,0 +1,703 @@
1<?xml version="1.0" encoding="UTF-8"?>
2<!-- STM32F0xx board Template -->
3<board
4 xmlns:xsi="http://www.w3.org/2001/XMLSchema-instance"
5 xsi:noNamespaceSchemaLocation="http://www.chibios.org/xml/schema/boards/stm32f0xx_board.xsd">
6 <configuration_settings>
7 <templates_path>resources/gencfg/processors/boards/stm32f0xx/templates</templates_path>
8 <output_path>..</output_path>
9 <hal_version>3.0.x</hal_version>
10 </configuration_settings>
11 <board_name>ST STM32F072B-Discovery</board_name>
12 <board_id>ST_STM32F072B_DISCOVERY</board_id>
13 <board_functions></board_functions>
14 <subtype>STM32F072xB</subtype>
15 <clocks HSEFrequency="0" HSEBypass="true" LSEFrequency="0"
16 LSEBypass="false" LSEDrive="3 High Drive (default)" />
17 <ports>
18 <GPIOA>
19 <pin0
20 ID="BUTTON"
21 Type="PushPull"
22 Speed="Minimum"
23 Resistor="Floating"
24 Level="High"
25 Mode="Input"
26 Alternate="0" />
27 <pin1
28 ID=""
29 Type="PushPull"
30 Speed="Minimum"
31 Resistor="PullUp"
32 Level="High"
33 Mode="Input"
34 Alternate="0" />
35 <pin2
36 ID=""
37 Type="PushPull"
38 Speed="Minimum"
39 Resistor="PullUp"
40 Level="High"
41 Mode="Input"
42 Alternate="0" />
43 <pin3
44 ID=""
45 Type="PushPull"
46 Speed="Minimum"
47 Resistor="PullUp"
48 Level="High"
49 Mode="Input"
50 Alternate="0" />
51 <pin4
52 ID=""
53 Type="PushPull"
54 Speed="Minimum"
55 Resistor="PullUp"
56 Level="High"
57 Mode="Input"
58 Alternate="0" />
59 <pin5
60 ID=""
61 Type="PushPull"
62 Speed="Minimum"
63 Resistor="PullUp"
64 Level="High"
65 Mode="Input"
66 Alternate="0" />
67 <pin6
68 ID=""
69 Type="PushPull"
70 Speed="Minimum"
71 Resistor="PullUp"
72 Level="High"
73 Mode="Input"
74 Alternate="0" />
75 <pin7
76 ID=""
77 Type="PushPull"
78 Speed="Minimum"
79 Resistor="PullUp"
80 Level="High"
81 Mode="Input"
82 Alternate="0" />
83 <pin8
84 ID=""
85 Type="PushPull"
86 Speed="Minimum"
87 Resistor="PullUp"
88 Level="High"
89 Mode="Input"
90 Alternate="0" />
91 <pin9
92 ID=""
93 Type="PushPull"
94 Speed="Minimum"
95 Resistor="PullUp"
96 Level="High"
97 Mode="Input"
98 Alternate="0" />
99 <pin10
100 ID=""
101 Type="PushPull"
102 Speed="Minimum"
103 Resistor="PullUp"
104 Level="High"
105 Mode="Input"
106 Alternate="0" />
107 <pin11
108 ID="USB_DM"
109 Type="PushPull"
110 Speed="Minimum"
111 Resistor="Floating"
112 Level="High"
113 Mode="Input"
114 Alternate="0" />
115 <pin12
116 ID="USB_DP"
117 Type="PushPull"
118 Speed="Minimum"
119 Resistor="Floating"
120 Level="High"
121 Mode="Input"
122 Alternate="0" />
123 <pin13
124 ID="SWDIO"
125 Type="PushPull"
126 Speed="Maximum"
127 Resistor="PullUp"
128 Level="High"
129 Mode="Alternate"
130 Alternate="0" />
131 <pin14
132 ID="SWCLK"
133 Type="PushPull"
134 Speed="Maximum"
135 Resistor="PullDown"
136 Level="High"
137 Mode="Alternate"
138 Alternate="0" />
139 <pin15
140 ID=""
141 Type="PushPull"
142 Speed="Maximum"
143 Resistor="PullUp"
144 Level="High"
145 Mode="Input"
146 Alternate="0" />
147 </GPIOA>
148 <GPIOB>
149 <pin0
150 ID=""
151 Type="PushPull"
152 Speed="Minimum"
153 Resistor="PullUp"
154 Level="High"
155 Mode="Input"
156 Alternate="0" />
157 <pin1
158 ID=""
159 Type="PushPull"
160 Speed="Minimum"
161 Resistor="PullUp"
162 Level="High"
163 Mode="Input"
164 Alternate="0" />
165 <pin2
166 ID=""
167 Type="PushPull"
168 Speed="Maximum"
169 Resistor="PullUp"
170 Level="High"
171 Mode="Input"
172 Alternate="0" />
173 <pin3
174 ID=""
175 Type="PushPull"
176 Speed="Maximum"
177 Resistor="PullUp"
178 Level="High"
179 Mode="Input"
180 Alternate="0" />
181 <pin4
182 ID=""
183 Type="PushPull"
184 Speed="Maximum"
185 Resistor="PullUp"
186 Level="High"
187 Mode="Input"
188 Alternate="0" />
189 <pin5
190 ID=""
191 Type="PushPull"
192 Speed="Minimum"
193 Resistor="PullUp"
194 Level="High"
195 Mode="Input"
196 Alternate="0" />
197 <pin6
198 ID=""
199 Type="PushPull"
200 Speed="Minimum"
201 Resistor="PullUp"
202 Level="High"
203 Mode="Input"
204 Alternate="0" />
205 <pin7
206 ID=""
207 Type="PushPull"
208 Speed="Minimum"
209 Resistor="PullUp"
210 Level="High"
211 Mode="Input"
212 Alternate="0" />
213 <pin8
214 ID=""
215 Type="PushPull"
216 Speed="Minimum"
217 Resistor="PullUp"
218 Level="High"
219 Mode="Input"
220 Alternate="0" />
221 <pin9
222 ID=""
223 Type="PushPull"
224 Speed="Minimum"
225 Resistor="PullUp"
226 Level="High"
227 Mode="Input"
228 Alternate="0" />
229 <pin10
230 ID=""
231 Type="PushPull"
232 Speed="Minimum"
233 Resistor="PullUp"
234 Level="High"
235 Mode="Input"
236 Alternate="0" />
237 <pin11
238 ID=""
239 Type="PushPull"
240 Speed="Minimum"
241 Resistor="PullUp"
242 Level="High"
243 Mode="Input"
244 Alternate="0" />
245 <pin12
246 ID=""
247 Type="PushPull"
248 Speed="Minimum"
249 Resistor="PullUp"
250 Level="High"
251 Mode="Input"
252 Alternate="0" />
253 <pin13
254 ID="SPI2_SCK"
255 Type="PushPull"
256 Speed="Minimum"
257 Resistor="Floating"
258 Level="High"
259 Mode="Alternate"
260 Alternate="0" />
261 <pin14
262 ID="SPI2_MISO"
263 Type="PushPull"
264 Speed="Minimum"
265 Resistor="Floating"
266 Level="High"
267 Mode="Alternate"
268 Alternate="0" />
269 <pin15
270 ID="SPI2_MOSI"
271 Type="PushPull"
272 Speed="Minimum"
273 Resistor="Floating"
274 Level="High"
275 Mode="Alternate"
276 Alternate="0" />
277 </GPIOB>
278 <GPIOC>
279 <pin0
280 ID="MEMS_CS"
281 Type="PushPull"
282 Speed="Maximum"
283 Resistor="Floating"
284 Level="High"
285 Mode="Output"
286 Alternate="0" />
287 <pin1
288 ID=""
289 Type="PushPull"
290 Speed="Minimum"
291 Resistor="PullUp"
292 Level="High"
293 Mode="Input"
294 Alternate="0" />
295 <pin2
296 ID=""
297 Type="PushPull"
298 Speed="Minimum"
299 Resistor="PullUp"
300 Level="High"
301 Mode="Input"
302 Alternate="0" />
303 <pin3
304 ID=""
305 Type="PushPull"
306 Speed="Minimum"
307 Resistor="PullUp"
308 Level="High"
309 Mode="Input"
310 Alternate="0" />
311 <pin4
312 ID=""
313 Type="PushPull"
314 Speed="Minimum"
315 Resistor="PullUp"
316 Level="High"
317 Mode="Input"
318 Alternate="0" />
319 <pin5
320 ID=""
321 Type="PushPull"
322 Speed="Minimum"
323 Resistor="PullUp"
324 Level="High"
325 Mode="Input"
326 Alternate="0" />
327 <pin6
328 ID="LED_RED"
329 Type="PushPull"
330 Speed="Maximum"
331 Resistor="Floating"
332 Level="Low"
333 Mode="Output"
334 Alternate="0" />
335 <pin7
336 ID="LED_BLUE"
337 Type="PushPull"
338 Speed="Maximum"
339 Resistor="Floating"
340 Level="Low"
341 Mode="Output"
342 Alternate="0" />
343 <pin8
344 ID="LED_ORANGE"
345 Type="PushPull"
346 Speed="Maximum"
347 Resistor="Floating"
348 Level="Low"
349 Mode="Output"
350 Alternate="0" ></pin8>
351 <pin9
352 ID="LED_GREEN"
353 Type="PushPull"
354 Speed="Maximum"
355 Resistor="Floating"
356 Level="Low"
357 Mode="Output"
358 Alternate="0" />
359 <pin10
360 ID=""
361 Type="PushPull"
362 Speed="Minimum"
363 Resistor="PullUp"
364 Level="High"
365 Mode="Input"
366 Alternate="0" />
367 <pin11
368 ID=""
369 Type="PushPull"
370 Speed="Minimum"
371 Resistor="PullUp"
372 Level="High"
373 Mode="Input"
374 Alternate="0" />
375 <pin12
376 ID=""
377 Type="PushPull"
378 Speed="Minimum"
379 Resistor="PullUp"
380 Level="High"
381 Mode="Input"
382 Alternate="0" />
383 <pin13
384 ID=""
385 Type="PushPull"
386 Speed="Minimum"
387 Resistor="PullUp"
388 Level="High"
389 Mode="Input"
390 Alternate="0" />
391 <pin14
392 ID="OSC32_IN"
393 Type="PushPull"
394 Speed="Maximum"
395 Resistor="Floating"
396 Level="High"
397 Mode="Input"
398 Alternate="0" />
399 <pin15
400 ID="OSC32_OUT"
401 Type="PushPull"
402 Speed="Maximum"
403 Resistor="Floating"
404 Level="High"
405 Mode="Input"
406 Alternate="0" />
407 </GPIOC>
408 <GPIOD>
409 <pin0
410 ID=""
411 Type="PushPull"
412 Speed="Minimum"
413 Resistor="PullUp"
414 Level="High"
415 Mode="Input"
416 Alternate="0" />
417 <pin1
418 ID=""
419 Type="PushPull"
420 Speed="Minimum"
421 Resistor="PullUp"
422 Level="High"
423 Mode="Input"
424 Alternate="0" />
425 <pin2
426 ID=""
427 Type="PushPull"
428 Speed="Minimum"
429 Resistor="PullUp"
430 Level="High"
431 Mode="Input"
432 Alternate="0" />
433 <pin3
434 ID=""
435 Type="PushPull"
436 Speed="Minimum"
437 Resistor="PullUp"
438 Level="High"
439 Mode="Input"
440 Alternate="0" />
441 <pin4
442 ID=""
443 Type="PushPull"
444 Speed="Minimum"
445 Resistor="PullUp"
446 Level="High"
447 Mode="Input"
448 Alternate="0" />
449 <pin5
450 ID=""
451 Type="PushPull"
452 Speed="Minimum"
453 Resistor="PullUp"
454 Level="High"
455 Mode="Input"
456 Alternate="0" />
457 <pin6
458 ID=""
459 Type="PushPull"
460 Speed="Minimum"
461 Resistor="PullUp"
462 Level="High"
463 Mode="Input"
464 Alternate="0" />
465 <pin7
466 ID=""
467 Type="PushPull"
468 Speed="Minimum"
469 Resistor="PullUp"
470 Level="High"
471 Mode="Input"
472 Alternate="0" />
473 <pin8
474 ID=""
475 Type="PushPull"
476 Speed="Minimum"
477 Resistor="PullUp"
478 Level="High"
479 Mode="Input"
480 Alternate="0" />
481 <pin9
482 ID=""
483 Type="PushPull"
484 Speed="Minimum"
485 Resistor="PullUp"
486 Level="High"
487 Mode="Input"
488 Alternate="0" />
489 <pin10
490 ID=""
491 Type="PushPull"
492 Speed="Minimum"
493 Resistor="PullUp"
494 Level="High"
495 Mode="Input"
496 Alternate="0" />
497 <pin11
498 ID=""
499 Type="PushPull"
500 Speed="Minimum"
501 Resistor="PullUp"
502 Level="High"
503 Mode="Input"
504 Alternate="0" />
505 <pin12
506 ID=""
507 Type="PushPull"
508 Speed="Minimum"
509 Resistor="PullUp"
510 Level="High"
511 Mode="Input"
512 Alternate="0" />
513 <pin13
514 ID=""
515 Type="PushPull"
516 Speed="Minimum"
517 Resistor="PullUp"
518 Level="High"
519 Mode="Input"
520 Alternate="0" />
521 <pin14
522 ID=""
523 Type="PushPull"
524 Speed="Minimum"
525 Resistor="PullUp"
526 Level="High"
527 Mode="Input"
528 Alternate="0" />
529 <pin15
530 ID=""
531 Type="PushPull"
532 Speed="Minimum"
533 Resistor="PullUp"
534 Level="High"
535 Mode="Input"
536 Alternate="0" />
537 </GPIOD>
538 <GPIOE>
539 <pin0 ID="" Type="PushPull" Speed="Minimum" Resistor="PullUp"
540 Level="High" Mode="Input" Alternate="0" />
541 <pin1 ID="" Type="PushPull" Speed="Minimum" Resistor="PullUp"
542 Level="High" Mode="Input" Alternate="0" />
543 <pin2 ID="" Type="PushPull" Speed="Minimum" Resistor="PullUp"
544 Level="High" Mode="Input" Alternate="0" />
545 <pin3 ID="" Type="PushPull" Speed="Minimum" Resistor="PullUp"
546 Level="High" Mode="Input" Alternate="0" />
547 <pin4 ID="" Type="PushPull" Speed="Minimum" Resistor="PullUp"
548 Level="High" Mode="Input" Alternate="0" />
549 <pin5 ID="" Type="PushPull" Speed="Minimum" Resistor="PullUp"
550 Level="High" Mode="Input" Alternate="0" />
551 <pin6 ID="" Type="PushPull" Speed="Minimum" Resistor="PullUp"
552 Level="High" Mode="Input" Alternate="0" />
553 <pin7 ID="" Type="PushPull" Speed="Minimum" Resistor="PullUp"
554 Level="High" Mode="Input" Alternate="0" />
555 <pin8 ID="" Type="PushPull" Speed="Minimum" Resistor="PullUp"
556 Level="High" Mode="Input" Alternate="0" />
557 <pin9 ID="" Type="PushPull" Speed="Minimum" Resistor="PullUp"
558 Level="High" Mode="Input" Alternate="0" />
559 <pin10 ID="" Type="PushPull" Speed="Minimum" Resistor="PullUp"
560 Level="High" Mode="Input" Alternate="0" />
561 <pin11 ID="" Type="PushPull" Speed="Minimum" Resistor="PullUp"
562 Level="High" Mode="Input" Alternate="0" />
563 <pin12 ID="" Type="PushPull" Speed="Minimum" Resistor="PullUp"
564 Level="High" Mode="Input" Alternate="0" />
565 <pin13 ID="" Type="PushPull" Speed="Minimum" Resistor="PullUp"
566 Level="High" Mode="Input" Alternate="0" />
567 <pin14 ID="" Type="PushPull" Speed="Minimum" Resistor="PullUp"
568 Level="High" Mode="Input" Alternate="0" />
569 <pin15 ID="" Type="PushPull" Speed="Minimum" Resistor="PullUp"
570 Level="High" Mode="Input" Alternate="0" />
571 </GPIOE>
572 <GPIOF>
573 <pin0
574 ID="OSC_IN"
575 Type="PushPull"
576 Speed="Minimum"
577 Resistor="Floating"
578 Level="High"
579 Mode="Input"
580 Alternate="0" />
581 <pin1
582 ID="OSC_OUT"
583 Type="PushPull"
584 Speed="Minimum"
585 Resistor="Floating"
586 Level="High"
587 Mode="Input"
588 Alternate="0" />
589 <pin2
590 ID=""
591 Type="PushPull"
592 Speed="Minimum"
593 Resistor="PullUp"
594 Level="High"
595 Mode="Input"
596 Alternate="0" />
597 <pin3
598 ID=""
599 Type="PushPull"
600 Speed="Minimum"
601 Resistor="PullUp"
602 Level="High"
603 Mode="Input"
604 Alternate="0" />
605 <pin4
606 ID=""
607 Type="PushPull"
608 Speed="Minimum"
609 Resistor="PullUp"
610 Level="High"
611 Mode="Input"
612 Alternate="0" />
613 <pin5
614 ID=""
615 Type="PushPull"
616 Speed="Minimum"
617 Resistor="PullUp"
618 Level="High"
619 Mode="Input"
620 Alternate="0" />
621 <pin6
622 ID=""
623 Type="PushPull"
624 Speed="Minimum"
625 Resistor="PullUp"
626 Level="High"
627 Mode="Input"
628 Alternate="0" />
629 <pin7
630 ID=""
631 Type="PushPull"
632 Speed="Minimum"
633 Resistor="PullUp"
634 Level="High"
635 Mode="Input"
636 Alternate="0" />
637 <pin8
638 ID=""
639 Type="PushPull"
640 Speed="Minimum"
641 Resistor="PullUp"
642 Level="High"
643 Mode="Input"
644 Alternate="0" />
645 <pin9
646 ID=""
647 Type="PushPull"
648 Speed="Minimum"
649 Resistor="PullUp"
650 Level="High"
651 Mode="Input"
652 Alternate="0" />
653 <pin10
654 ID=""
655 Type="PushPull"
656 Speed="Minimum"
657 Resistor="PullUp"
658 Level="High"
659 Mode="Input"
660 Alternate="0" />
661 <pin11
662 ID=""
663 Type="PushPull"
664 Speed="Minimum"
665 Resistor="PullUp"
666 Level="High"
667 Mode="Input"
668 Alternate="0" />
669 <pin12
670 ID=""
671 Type="PushPull"
672 Speed="Minimum"
673 Resistor="PullUp"
674 Level="High"
675 Mode="Input"
676 Alternate="0" />
677 <pin13
678 ID=""
679 Type="PushPull"
680 Speed="Minimum"
681 Resistor="PullUp"
682 Level="High"
683 Mode="Input"
684 Alternate="0" />
685 <pin14
686 ID=""
687 Type="PushPull"
688 Speed="Minimum"
689 Resistor="PullUp"
690 Level="High"
691 Mode="Input"
692 Alternate="0" />
693 <pin15
694 ID=""
695 Type="PushPull"
696 Speed="Minimum"
697 Resistor="PullUp"
698 Level="High"
699 Mode="Input"
700 Alternate="0" />
701 </GPIOF>
702 </ports>
703</board>
diff --git a/keyboards/nebula12/bootloader_defs.h b/keyboards/nebula12/bootloader_defs.h
new file mode 100644
index 000000000..02c48c4e6
--- /dev/null
+++ b/keyboards/nebula12/bootloader_defs.h
@@ -0,0 +1,7 @@
1/* Address for jumping to bootloader on STM32 chips. */
2/* It is chip dependent, the correct number can be looked up here (page 175):
3 * http://www.st.com/web/en/resource/technical/document/application_note/CD00167594.pdf
4 * This also requires a patch to chibios:
5 * <tmk_dir>/tmk_core/tool/chibios/ch-bootloader-jump.patch
6 */
7#define STM32_BOOTLOADER_ADDRESS 0x1FFFC800
diff --git a/keyboards/nebula12/chconf.h b/keyboards/nebula12/chconf.h
new file mode 100644
index 000000000..03f63da36
--- /dev/null
+++ b/keyboards/nebula12/chconf.h
@@ -0,0 +1,714 @@
1/*
2 ChibiOS - Copyright (C) 2006..2018 Giovanni Di Sirio
3
4 Licensed under the Apache License, Version 2.0 (the "License");
5 you may not use this file except in compliance with the License.
6 You may obtain a copy of the License at
7
8 http://www.apache.org/licenses/LICENSE-2.0
9
10 Unless required by applicable law or agreed to in writing, software
11 distributed under the License is distributed on an "AS IS" BASIS,
12 WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
13 See the License for the specific language governing permissions and
14 limitations under the License.
15*/
16
17/**
18 * @file rt/templates/chconf.h
19 * @brief Configuration file template.
20 * @details A copy of this file must be placed in each project directory, it
21 * contains the application specific kernel settings.
22 *
23 * @addtogroup config
24 * @details Kernel related settings and hooks.
25 * @{
26 */
27
28#ifndef CHCONF_H
29#define CHCONF_H
30
31#define _CHIBIOS_RT_CONF_
32#define _CHIBIOS_RT_CONF_VER_6_0_
33
34/*===========================================================================*/
35/**
36 * @name System timers settings
37 * @{
38 */
39/*===========================================================================*/
40
41/**
42 * @brief System time counter resolution.
43 * @note Allowed values are 16 or 32 bits.
44 */
45#if !defined(CH_CFG_ST_RESOLUTION)
46#define CH_CFG_ST_RESOLUTION 32
47#endif
48
49/**
50 * @brief System tick frequency.
51 * @details Frequency of the system timer that drives the system ticks. This
52 * setting also defines the system tick time unit.
53 */
54#if !defined(CH_CFG_ST_FREQUENCY)
55#define CH_CFG_ST_FREQUENCY 10000
56#endif
57
58/**
59 * @brief Time intervals data size.
60 * @note Allowed values are 16, 32 or 64 bits.
61 */
62#if !defined(CH_CFG_INTERVALS_SIZE)
63#define CH_CFG_INTERVALS_SIZE 32
64#endif
65
66/**
67 * @brief Time types data size.
68 * @note Allowed values are 16 or 32 bits.
69 */
70#if !defined(CH_CFG_TIME_TYPES_SIZE)
71#define CH_CFG_TIME_TYPES_SIZE 32
72#endif
73
74/**
75 * @brief Time delta constant for the tick-less mode.
76 * @note If this value is zero then the system uses the classic
77 * periodic tick. This value represents the minimum number
78 * of ticks that is safe to specify in a timeout directive.
79 * The value one is not valid, timeouts are rounded up to
80 * this value.
81 */
82#if !defined(CH_CFG_ST_TIMEDELTA)
83#define CH_CFG_ST_TIMEDELTA 2
84#endif
85
86/** @} */
87
88/*===========================================================================*/
89/**
90 * @name Kernel parameters and options
91 * @{
92 */
93/*===========================================================================*/
94
95/**
96 * @brief Round robin interval.
97 * @details This constant is the number of system ticks allowed for the
98 * threads before preemption occurs. Setting this value to zero
99 * disables the preemption for threads with equal priority and the
100 * round robin becomes cooperative. Note that higher priority
101 * threads can still preempt, the kernel is always preemptive.
102 * @note Disabling the round robin preemption makes the kernel more compact
103 * and generally faster.
104 * @note The round robin preemption is not supported in tickless mode and
105 * must be set to zero in that case.
106 */
107#if !defined(CH_CFG_TIME_QUANTUM)
108#define CH_CFG_TIME_QUANTUM 0
109#endif
110
111/**
112 * @brief Managed RAM size.
113 * @details Size of the RAM area to be managed by the OS. If set to zero
114 * then the whole available RAM is used. The core memory is made
115 * available to the heap allocator and/or can be used directly through
116 * the simplified core memory allocator.
117 *
118 * @note In order to let the OS manage the whole RAM the linker script must
119 * provide the @p __heap_base__ and @p __heap_end__ symbols.
120 * @note Requires @p CH_CFG_USE_MEMCORE.
121 */
122#if !defined(CH_CFG_MEMCORE_SIZE)
123#define CH_CFG_MEMCORE_SIZE 0
124#endif
125
126/**
127 * @brief Idle thread automatic spawn suppression.
128 * @details When this option is activated the function @p chSysInit()
129 * does not spawn the idle thread. The application @p main()
130 * function becomes the idle thread and must implement an
131 * infinite loop.
132 */
133#if !defined(CH_CFG_NO_IDLE_THREAD)
134#define CH_CFG_NO_IDLE_THREAD FALSE
135#endif
136
137/** @} */
138
139/*===========================================================================*/
140/**
141 * @name Performance options
142 * @{
143 */
144/*===========================================================================*/
145
146/**
147 * @brief OS optimization.
148 * @details If enabled then time efficient rather than space efficient code
149 * is used when two possible implementations exist.
150 *
151 * @note This is not related to the compiler optimization options.
152 * @note The default is @p TRUE.
153 */
154#if !defined(CH_CFG_OPTIMIZE_SPEED)
155#define CH_CFG_OPTIMIZE_SPEED FALSE
156#endif
157
158/** @} */
159
160/*===========================================================================*/
161/**
162 * @name Subsystem options
163 * @{
164 */
165/*===========================================================================*/
166
167/**
168 * @brief Time Measurement APIs.
169 * @details If enabled then the time measurement APIs are included in
170 * the kernel.
171 *
172 * @note The default is @p TRUE.
173 */
174#if !defined(CH_CFG_USE_TM)
175#define CH_CFG_USE_TM FALSE
176#endif
177
178/**
179 * @brief Threads registry APIs.
180 * @details If enabled then the registry APIs are included in the kernel.
181 *
182 * @note The default is @p TRUE.
183 */
184#if !defined(CH_CFG_USE_REGISTRY)
185#define CH_CFG_USE_REGISTRY TRUE
186#endif
187
188/**
189 * @brief Threads synchronization APIs.
190 * @details If enabled then the @p chThdWait() function is included in
191 * the kernel.
192 *
193 * @note The default is @p TRUE.
194 */
195#if !defined(CH_CFG_USE_WAITEXIT)
196#define CH_CFG_USE_WAITEXIT TRUE
197#endif
198
199/**
200 * @brief Semaphores APIs.
201 * @details If enabled then the Semaphores APIs are included in the kernel.
202 *
203 * @note The default is @p TRUE.
204 */
205#if !defined(CH_CFG_USE_SEMAPHORES)
206#define CH_CFG_USE_SEMAPHORES TRUE
207#endif
208
209/**
210 * @brief Semaphores queuing mode.
211 * @details If enabled then the threads are enqueued on semaphores by
212 * priority rather than in FIFO order.
213 *
214 * @note The default is @p FALSE. Enable this if you have special
215 * requirements.
216 * @note Requires @p CH_CFG_USE_SEMAPHORES.
217 */
218#if !defined(CH_CFG_USE_SEMAPHORES_PRIORITY)
219#define CH_CFG_USE_SEMAPHORES_PRIORITY FALSE
220#endif
221
222/**
223 * @brief Mutexes APIs.
224 * @details If enabled then the mutexes APIs are included in the kernel.
225 *
226 * @note The default is @p TRUE.
227 */
228#if !defined(CH_CFG_USE_MUTEXES)
229#define CH_CFG_USE_MUTEXES TRUE
230#endif
231
232/**
233 * @brief Enables recursive behavior on mutexes.
234 * @note Recursive mutexes are heavier and have an increased
235 * memory footprint.
236 *
237 * @note The default is @p FALSE.
238 * @note Requires @p CH_CFG_USE_MUTEXES.
239 */
240#if !defined(CH_CFG_USE_MUTEXES_RECURSIVE)
241#define CH_CFG_USE_MUTEXES_RECURSIVE FALSE
242#endif
243
244/**
245 * @brief Conditional Variables APIs.
246 * @details If enabled then the conditional variables APIs are included
247 * in the kernel.
248 *
249 * @note The default is @p TRUE.
250 * @note Requires @p CH_CFG_USE_MUTEXES.
251 */
252#if !defined(CH_CFG_USE_CONDVARS)
253#define CH_CFG_USE_CONDVARS TRUE
254#endif
255
256/**
257 * @brief Conditional Variables APIs with timeout.
258 * @details If enabled then the conditional variables APIs with timeout
259 * specification are included in the kernel.
260 *
261 * @note The default is @p TRUE.
262 * @note Requires @p CH_CFG_USE_CONDVARS.
263 */
264#if !defined(CH_CFG_USE_CONDVARS_TIMEOUT)
265#define CH_CFG_USE_CONDVARS_TIMEOUT FALSE
266#endif
267
268/**
269 * @brief Events Flags APIs.
270 * @details If enabled then the event flags APIs are included in the kernel.
271 *
272 * @note The default is @p TRUE.
273 */
274#if !defined(CH_CFG_USE_EVENTS)
275#define CH_CFG_USE_EVENTS TRUE
276#endif
277
278/**
279 * @brief Events Flags APIs with timeout.
280 * @details If enabled then the events APIs with timeout specification
281 * are included in the kernel.
282 *
283 * @note The default is @p TRUE.
284 * @note Requires @p CH_CFG_USE_EVENTS.
285 */
286#if !defined(CH_CFG_USE_EVENTS_TIMEOUT)
287#define CH_CFG_USE_EVENTS_TIMEOUT TRUE
288#endif
289
290/**
291 * @brief Synchronous Messages APIs.
292 * @details If enabled then the synchronous messages APIs are included
293 * in the kernel.
294 *
295 * @note The default is @p TRUE.
296 */
297#if !defined(CH_CFG_USE_MESSAGES)
298#define CH_CFG_USE_MESSAGES TRUE
299#endif
300
301/**
302 * @brief Synchronous Messages queuing mode.
303 * @details If enabled then messages are served by priority rather than in
304 * FIFO order.
305 *
306 * @note The default is @p FALSE. Enable this if you have special
307 * requirements.
308 * @note Requires @p CH_CFG_USE_MESSAGES.
309 */
310#if !defined(CH_CFG_USE_MESSAGES_PRIORITY)
311#define CH_CFG_USE_MESSAGES_PRIORITY FALSE
312#endif
313
314/**
315 * @brief Mailboxes APIs.
316 * @details If enabled then the asynchronous messages (mailboxes) APIs are
317 * included in the kernel.
318 *
319 * @note The default is @p TRUE.
320 * @note Requires @p CH_CFG_USE_SEMAPHORES.
321 */
322#if !defined(CH_CFG_USE_MAILBOXES)
323#define CH_CFG_USE_MAILBOXES TRUE
324#endif
325
326/**
327 * @brief Core Memory Manager APIs.
328 * @details If enabled then the core memory manager APIs are included
329 * in the kernel.
330 *
331 * @note The default is @p TRUE.
332 */
333#if !defined(CH_CFG_USE_MEMCORE)
334#define CH_CFG_USE_MEMCORE TRUE
335#endif
336
337/**
338 * @brief Heap Allocator APIs.
339 * @details If enabled then the memory heap allocator APIs are included
340 * in the kernel.
341 *
342 * @note The default is @p TRUE.
343 * @note Requires @p CH_CFG_USE_MEMCORE and either @p CH_CFG_USE_MUTEXES or
344 * @p CH_CFG_USE_SEMAPHORES.
345 * @note Mutexes are recommended.
346 */
347#if !defined(CH_CFG_USE_HEAP)
348#define CH_CFG_USE_HEAP FALSE
349#endif
350
351/**
352 * @brief Memory Pools Allocator APIs.
353 * @details If enabled then the memory pools allocator APIs are included
354 * in the kernel.
355 *
356 * @note The default is @p TRUE.
357 */
358#if !defined(CH_CFG_USE_MEMPOOLS)
359#define CH_CFG_USE_MEMPOOLS FALSE
360#endif
361
362/**
363 * @brief Objects FIFOs APIs.
364 * @details If enabled then the objects FIFOs APIs are included
365 * in the kernel.
366 *
367 * @note The default is @p TRUE.
368 */
369#if !defined(CH_CFG_USE_OBJ_FIFOS)
370#define CH_CFG_USE_OBJ_FIFOS FALSE
371#endif
372
373/**
374 * @brief Pipes APIs.
375 * @details If enabled then the pipes APIs are included
376 * in the kernel.
377 *
378 * @note The default is @p TRUE.
379 */
380#if !defined(CH_CFG_USE_PIPES)
381#define CH_CFG_USE_PIPES FALSE
382#endif
383
384/**
385 * @brief Dynamic Threads APIs.
386 * @details If enabled then the dynamic threads creation APIs are included
387 * in the kernel.
388 *
389 * @note The default is @p TRUE.
390 * @note Requires @p CH_CFG_USE_WAITEXIT.
391 * @note Requires @p CH_CFG_USE_HEAP and/or @p CH_CFG_USE_MEMPOOLS.
392 */
393#if !defined(CH_CFG_USE_DYNAMIC)
394#define CH_CFG_USE_DYNAMIC FALSE
395#endif
396
397/** @} */
398
399/*===========================================================================*/
400/**
401 * @name Objects factory options
402 * @{
403 */
404/*===========================================================================*/
405
406/**
407 * @brief Objects Factory APIs.
408 * @details If enabled then the objects factory APIs are included in the
409 * kernel.
410 *
411 * @note The default is @p FALSE.
412 */
413#if !defined(CH_CFG_USE_FACTORY)
414#define CH_CFG_USE_FACTORY FALSE
415#endif
416
417/**
418 * @brief Maximum length for object names.
419 * @details If the specified length is zero then the name is stored by
420 * pointer but this could have unintended side effects.
421 */
422#if !defined(CH_CFG_FACTORY_MAX_NAMES_LENGTH)
423#define CH_CFG_FACTORY_MAX_NAMES_LENGTH 8
424#endif
425
426/**
427 * @brief Enables the registry of generic objects.
428 */
429#if !defined(CH_CFG_FACTORY_OBJECTS_REGISTRY)
430#define CH_CFG_FACTORY_OBJECTS_REGISTRY FALSE
431#endif
432
433/**
434 * @brief Enables factory for generic buffers.
435 */
436#if !defined(CH_CFG_FACTORY_GENERIC_BUFFERS)
437#define CH_CFG_FACTORY_GENERIC_BUFFERS FALSE
438#endif
439
440/**
441 * @brief Enables factory for semaphores.
442 */
443#if !defined(CH_CFG_FACTORY_SEMAPHORES)
444#define CH_CFG_FACTORY_SEMAPHORES FALSE
445#endif
446
447/**
448 * @brief Enables factory for mailboxes.
449 */
450#if !defined(CH_CFG_FACTORY_MAILBOXES)
451#define CH_CFG_FACTORY_MAILBOXES FALSE
452#endif
453
454/**
455 * @brief Enables factory for objects FIFOs.
456 */
457#if !defined(CH_CFG_FACTORY_OBJ_FIFOS)
458#define CH_CFG_FACTORY_OBJ_FIFOS FALSE
459#endif
460
461/**
462 * @brief Enables factory for Pipes.
463 */
464#if !defined(CH_CFG_FACTORY_PIPES) || defined(__DOXYGEN__)
465#define CH_CFG_FACTORY_PIPES FALSE
466#endif
467
468/** @} */
469
470/*===========================================================================*/
471/**
472 * @name Debug options
473 * @{
474 */
475/*===========================================================================*/
476
477/**
478 * @brief Debug option, kernel statistics.
479 *
480 * @note The default is @p FALSE.
481 */
482#if !defined(CH_DBG_STATISTICS)
483#define CH_DBG_STATISTICS FALSE
484#endif
485
486/**
487 * @brief Debug option, system state check.
488 * @details If enabled the correct call protocol for system APIs is checked
489 * at runtime.
490 *
491 * @note The default is @p FALSE.
492 */
493#if !defined(CH_DBG_SYSTEM_STATE_CHECK)
494#define CH_DBG_SYSTEM_STATE_CHECK FALSE
495#endif
496
497/**
498 * @brief Debug option, parameters checks.
499 * @details If enabled then the checks on the API functions input
500 * parameters are activated.
501 *
502 * @note The default is @p FALSE.
503 */
504#if !defined(CH_DBG_ENABLE_CHECKS)
505#define CH_DBG_ENABLE_CHECKS FALSE
506#endif
507
508/**
509 * @brief Debug option, consistency checks.
510 * @details If enabled then all the assertions in the kernel code are
511 * activated. This includes consistency checks inside the kernel,
512 * runtime anomalies and port-defined checks.
513 *
514 * @note The default is @p FALSE.
515 */
516#if !defined(CH_DBG_ENABLE_ASSERTS)
517#define CH_DBG_ENABLE_ASSERTS FALSE
518#endif
519
520/**
521 * @brief Debug option, trace buffer.
522 * @details If enabled then the trace buffer is activated.
523 *
524 * @note The default is @p CH_DBG_TRACE_MASK_DISABLED.
525 */
526#if !defined(CH_DBG_TRACE_MASK)
527#define CH_DBG_TRACE_MASK CH_DBG_TRACE_MASK_DISABLED
528#endif
529
530/**
531 * @brief Trace buffer entries.
532 * @note The trace buffer is only allocated if @p CH_DBG_TRACE_MASK is
533 * different from @p CH_DBG_TRACE_MASK_DISABLED.
534 */
535#if !defined(CH_DBG_TRACE_BUFFER_SIZE)
536#define CH_DBG_TRACE_BUFFER_SIZE 128
537#endif
538
539/**
540 * @brief Debug option, stack checks.
541 * @details If enabled then a runtime stack check is performed.
542 *
543 * @note The default is @p FALSE.
544 * @note The stack check is performed in a architecture/port dependent way.
545 * It may not be implemented or some ports.
546 * @note The default failure mode is to halt the system with the global
547 * @p panic_msg variable set to @p NULL.
548 */
549#if !defined(CH_DBG_ENABLE_STACK_CHECK)
550#define CH_DBG_ENABLE_STACK_CHECK FALSE
551#endif
552
553/**
554 * @brief Debug option, stacks initialization.
555 * @details If enabled then the threads working area is filled with a byte
556 * value when a thread is created. This can be useful for the
557 * runtime measurement of the used stack.
558 *
559 * @note The default is @p FALSE.
560 */
561#if !defined(CH_DBG_FILL_THREADS)
562#define CH_DBG_FILL_THREADS FALSE
563#endif
564
565/**
566 * @brief Debug option, threads profiling.
567 * @details If enabled then a field is added to the @p thread_t structure that
568 * counts the system ticks occurred while executing the thread.
569 *
570 * @note The default is @p FALSE.
571 * @note This debug option is not currently compatible with the
572 * tickless mode.
573 */
574#if !defined(CH_DBG_THREADS_PROFILING)
575#define CH_DBG_THREADS_PROFILING FALSE
576#endif
577
578/** @} */
579
580/*===========================================================================*/
581/**
582 * @name Kernel hooks
583 * @{
584 */
585/*===========================================================================*/
586
587/**
588 * @brief System structure extension.
589 * @details User fields added to the end of the @p ch_system_t structure.
590 */
591#define CH_CFG_SYSTEM_EXTRA_FIELDS \
592 /* Add threads custom fields here.*/
593
594/**
595 * @brief System initialization hook.
596 * @details User initialization code added to the @p chSysInit() function
597 * just before interrupts are enabled globally.
598 */
599#define CH_CFG_SYSTEM_INIT_HOOK() { \
600 /* Add threads initialization code here.*/ \
601}
602
603/**
604 * @brief Threads descriptor structure extension.
605 * @details User fields added to the end of the @p thread_t structure.
606 */
607#define CH_CFG_THREAD_EXTRA_FIELDS \
608 /* Add threads custom fields here.*/
609
610/**
611 * @brief Threads initialization hook.
612 * @details User initialization code added to the @p _thread_init() function.
613 *
614 * @note It is invoked from within @p _thread_init() and implicitly from all
615 * the threads creation APIs.
616 */
617#define CH_CFG_THREAD_INIT_HOOK(tp) { \
618 /* Add threads initialization code here.*/ \
619}
620
621/**
622 * @brief Threads finalization hook.
623 * @details User finalization code added to the @p chThdExit() API.
624 */
625#define CH_CFG_THREAD_EXIT_HOOK(tp) { \
626 /* Add threads finalization code here.*/ \
627}
628
629/**
630 * @brief Context switch hook.
631 * @details This hook is invoked just before switching between threads.
632 */
633#define CH_CFG_CONTEXT_SWITCH_HOOK(ntp, otp) { \
634 /* Context switch code here.*/ \
635}
636
637/**
638 * @brief ISR enter hook.
639 */
640#define CH_CFG_IRQ_PROLOGUE_HOOK() { \
641 /* IRQ prologue code here.*/ \
642}
643
644/**
645 * @brief ISR exit hook.
646 */
647#define CH_CFG_IRQ_EPILOGUE_HOOK() { \
648 /* IRQ epilogue code here.*/ \
649}
650
651/**
652 * @brief Idle thread enter hook.
653 * @note This hook is invoked within a critical zone, no OS functions
654 * should be invoked from here.
655 * @note This macro can be used to activate a power saving mode.
656 */
657#define CH_CFG_IDLE_ENTER_HOOK() { \
658 /* Idle-enter code here.*/ \
659}
660
661/**
662 * @brief Idle thread leave hook.
663 * @note This hook is invoked within a critical zone, no OS functions
664 * should be invoked from here.
665 * @note This macro can be used to deactivate a power saving mode.
666 */
667#define CH_CFG_IDLE_LEAVE_HOOK() { \
668 /* Idle-leave code here.*/ \
669}
670
671/**
672 * @brief Idle Loop hook.
673 * @details This hook is continuously invoked by the idle thread loop.
674 */
675#define CH_CFG_IDLE_LOOP_HOOK() { \
676 /* Idle loop code here.*/ \
677}
678
679/**
680 * @brief System tick event hook.
681 * @details This hook is invoked in the system tick handler immediately
682 * after processing the virtual timers queue.
683 */
684#define CH_CFG_SYSTEM_TICK_HOOK() { \
685 /* System tick event code here.*/ \
686}
687
688/**
689 * @brief System halt hook.
690 * @details This hook is invoked in case to a system halting error before
691 * the system is halted.
692 */
693#define CH_CFG_SYSTEM_HALT_HOOK(reason) { \
694 /* System halt code here.*/ \
695}
696
697/**
698 * @brief Trace hook.
699 * @details This hook is invoked each time a new record is written in the
700 * trace buffer.
701 */
702#define CH_CFG_TRACE_HOOK(tep) { \
703 /* Trace code here.*/ \
704}
705
706/** @} */
707
708/*===========================================================================*/
709/* Port-specific settings (override port settings defaulted in chcore.h). */
710/*===========================================================================*/
711
712#endif /* CHCONF_H */
713
714/** @} */
diff --git a/keyboards/nebula12/config.h b/keyboards/nebula12/config.h
new file mode 100755
index 000000000..8b460a87a
--- /dev/null
+++ b/keyboards/nebula12/config.h
@@ -0,0 +1,169 @@
1/*
2Copyright 2020 Yiancar
3
4This program is free software: you can redistribute it and/or modify
5it under the terms of the GNU General Public License as published by
6the Free Software Foundation, either version 2 of the License, or
7(at your option) any later version.
8
9This program is distributed in the hope that it will be useful,
10but WITHOUT ANY WARRANTY; without even the implied warranty of
11MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
12GNU General Public License for more details.
13
14You should have received a copy of the GNU General Public License
15along with this program. If not, see <http://www.gnu.org/licenses/>.
16*/
17
18#pragma once
19
20#include "config_common.h"
21
22/* USB Device descriptor parameter */
23#define VENDOR_ID 0x8968
24#define PRODUCT_ID 0x5337
25#define DEVICE_VER 0x0001
26#define MANUFACTURER Yiancar-Designs
27#define PRODUCT NEBULA12
28#define DESCRIPTION "A 12-key, tool-free RGB keyboard"
29
30/* key matrix size */
31#define MATRIX_ROWS 4
32#define MATRIX_COLS 3
33
34#define MATRIX_ROW_PINS { A8, C15, A0, A1 }
35#define MATRIX_COL_PINS { A9, C13, C14 }
36// To enable debugger set A13 A14 -> A5 A7
37
38/* COL2ROW, ROW2COL*/
39#define DIODE_DIRECTION COL2ROW
40
41/* Debounce reduces chatter (unintended double-presses) - set 0 if debouncing is not needed */
42#define DEBOUNCE 5
43
44/* Setting up 400KHz I2C Clock for a 48MHz system clock */
45#define I2C1_SCL_PAL_MODE 1
46#define I2C1_SDA_PAL_MODE 1
47#define I2C1_TIMINGR_SCLDEL 3U
48#define I2C1_TIMINGR_SDADEL 1U
49#define I2C1_TIMINGR_SCLH 3U
50#define I2C1_TIMINGR_SCLL 9U
51
52/* define if matrix has ghost (lacks anti-ghosting diodes) */
53//#define MATRIX_HAS_GHOST
54
55/* If defined, GRAVE_ESC will always act as ESC when CTRL is held.
56 * This is userful for the Windows task manager shortcut (ctrl+shift+esc).
57 */
58// #define GRAVE_ESC_CTRL_OVERRIDE
59
60/*
61 * Force NKRO
62 *
63 * Force NKRO (nKey Rollover) to be enabled by default, regardless of the saved
64 * state in the bootmagic EEPROM settings. (Note that NKRO must be enabled in the
65 * makefile for this to work.)
66 *
67 * If forced on, NKRO can be disabled via magic key (default = LShift+RShift+N)
68 * until the next keyboard reset.
69 *
70 * NKRO may prevent your keystrokes from being detected in the BIOS, but it is
71 * fully operational during normal computer usage.
72 *
73 * For a less heavy-handed approach, enable NKRO via magic key (LShift+RShift+N)
74 * or via bootmagic (hold SPACE+N while plugging in the keyboard). Once set by
75 * bootmagic, NKRO mode will always be enabled until it is toggled again during a
76 * power-up.
77 *
78 */
79//#define FORCE_NKRO
80
81/*
82 * Magic Key Options
83 *
84 * Magic keys are hotkey commands that allow control over firmware functions of
85 * the keyboard. They are best used in combination with the HID Listen program,
86 * found here: https://www.pjrc.com/teensy/hid_listen.html
87 *
88 * The options below allow the magic key functionality to be changed. This is
89 * useful if your keyboard/keypad is missing keys and you want magic key support.
90 *
91 */
92
93#define WS2812_SPI SPID2 // default: SPID1
94#define WS2812_SPI_MOSI_PAL_MODE 0 // Pin "alternate function", see the respective datasheet for the appropriate values for your MCU. default: 5
95
96#define RGB_DI_PIN B15
97#ifdef RGB_DI_PIN
98 #define RGBLED_NUM 4
99 #define RGBLIGHT_HUE_STEP 8
100 #define RGBLIGHT_SAT_STEP 8
101 #define RGBLIGHT_VAL_STEP 8
102 #define RGBLIGHT_LIMIT_VAL 255 /* The maximum brightness level */
103 #define RGBLIGHT_SLEEP /* If defined, the RGB lighting will be switched off when the host goes to sleep */
104 #define RGBLIGHT_ANIMATIONS
105#endif
106
107/* Bootmagic Lite key configuration */
108#define BOOTMAGIC_LITE_ROW 0
109#define BOOTMAGIC_LITE_COLUMN 0
110
111/* Backlight options */
112
113#define RGB_BACKLIGHT_ENABLED 1
114
115#define RGB_BACKLIGHT_NEBULA12
116
117// they aren't really used if RGB_BACKLIGHT_NEBULA65 defined
118#define RGB_BACKLIGHT_USE_SPLIT_BACKSPACE 0
119#define RGB_BACKLIGHT_USE_SPLIT_LEFT_SHIFT 0
120#define RGB_BACKLIGHT_USE_SPLIT_RIGHT_SHIFT 0
121#define RGB_BACKLIGHT_USE_7U_SPACEBAR 0
122#define RGB_BACKLIGHT_USE_ISO_ENTER 0
123#define RGB_BACKLIGHT_DISABLE_HHKB_BLOCKER_LEDS 0
124
125// disable backlight when USB suspended (PC sleep/hibernate/shutdown)
126#define RGB_BACKLIGHT_DISABLE_WHEN_USB_SUSPENDED 0
127
128// disable backlight after timeout in minutes, 0 = no timeout
129#define RGB_BACKLIGHT_DISABLE_AFTER_TIMEOUT 0
130
131// the default brightness
132#define RGB_BACKLIGHT_BRIGHTNESS 255
133
134// the default effect (RGB test)
135#define RGB_BACKLIGHT_EFFECT 6
136
137// the default effect speed (0-3)
138#define RGB_BACKLIGHT_EFFECT_SPEED 0
139
140// the default color1 and color2
141#define RGB_BACKLIGHT_COLOR_1 { .h = 0, .s = 255 }
142#define RGB_BACKLIGHT_COLOR_2 { .h = 127, .s = 255 }
143
144#define DRIVER_COUNT 1
145#define DRIVER_LED_TOTAL 16
146
147// These define which keys in the matrix are alphas/mods
148// Used for backlight effects so colors are different for
149// alphas vs. mods
150// Each value is for a row, bit 0 is column 0
151// Alpha=0 Mod=1
152#define RGB_BACKLIGHT_ALPHAS_MODS_ROW_0 0b0000000000000000
153#define RGB_BACKLIGHT_ALPHAS_MODS_ROW_1 0b0000000000000000
154#define RGB_BACKLIGHT_ALPHAS_MODS_ROW_2 0b0000000000000000
155#define RGB_BACKLIGHT_ALPHAS_MODS_ROW_3 0b0000000000000000
156#define RGB_BACKLIGHT_ALPHAS_MODS_ROW_4 0b0000000000000000
157
158#define RGB_BACKLIGHT_CAPS_LOCK_INDICATOR { .color = { .h = 0, .s = 0 }, .index = 255 }
159#define RGB_BACKLIGHT_LAYER_1_INDICATOR { .color = { .h = 0, .s = 0 }, .index = 255 }
160#define RGB_BACKLIGHT_LAYER_2_INDICATOR { .color = { .h = 0, .s = 0 }, .index = 255 }
161#define RGB_BACKLIGHT_LAYER_3_INDICATOR { .color = { .h = 0, .s = 0 }, .index = 255 }
162
163// Backlight config starts after VIA's EEPROM usage,
164// dynamic keymaps start after this.
165#define VIA_EEPROM_CUSTOM_CONFIG_SIZE 32
166
167// VIA lighting is handled by the keyboard-level code
168#define VIA_CUSTOM_LIGHTING_ENABLE
169#define VIA_QMK_RGBLIGHT_ENABLE
diff --git a/keyboards/nebula12/halconf.h b/keyboards/nebula12/halconf.h
new file mode 100644
index 000000000..b5b151ee2
--- /dev/null
+++ b/keyboards/nebula12/halconf.h
@@ -0,0 +1,525 @@
1/*
2 ChibiOS - Copyright (C) 2006..2018 Giovanni Di Sirio
3
4 Licensed under the Apache License, Version 2.0 (the "License");
5 you may not use this file except in compliance with the License.
6 You may obtain a copy of the License at
7
8 http://www.apache.org/licenses/LICENSE-2.0
9
10 Unless required by applicable law or agreed to in writing, software
11 distributed under the License is distributed on an "AS IS" BASIS,
12 WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
13 See the License for the specific language governing permissions and
14 limitations under the License.
15*/
16
17/**
18 * @file templates/halconf.h
19 * @brief HAL configuration header.
20 * @details HAL configuration file, this file allows to enable or disable the
21 * various device drivers from your application. You may also use
22 * this file in order to override the device drivers default settings.
23 *
24 * @addtogroup HAL_CONF
25 * @{
26 */
27
28#ifndef HALCONF_H
29#define HALCONF_H
30
31#define _CHIBIOS_HAL_CONF_
32#define _CHIBIOS_HAL_CONF_VER_7_0_
33
34#include "mcuconf.h"
35
36/**
37 * @brief Enables the PAL subsystem.
38 */
39#if !defined(HAL_USE_PAL) || defined(__DOXYGEN__)
40#define HAL_USE_PAL TRUE
41#endif
42
43/**
44 * @brief Enables the ADC subsystem.
45 */
46#if !defined(HAL_USE_ADC) || defined(__DOXYGEN__)
47#define HAL_USE_ADC FALSE
48#endif
49
50/**
51 * @brief Enables the CAN subsystem.
52 */
53#if !defined(HAL_USE_CAN) || defined(__DOXYGEN__)
54#define HAL_USE_CAN FALSE
55#endif
56
57/**
58 * @brief Enables the cryptographic subsystem.
59 */
60#if !defined(HAL_USE_CRY) || defined(__DOXYGEN__)
61#define HAL_USE_CRY FALSE
62#endif
63
64/**
65 * @brief Enables the DAC subsystem.
66 */
67#if !defined(HAL_USE_DAC) || defined(__DOXYGEN__)
68#define HAL_USE_DAC FALSE
69#endif
70
71/**
72 * @brief Enables the GPT subsystem.
73 */
74#if !defined(HAL_USE_GPT) || defined(__DOXYGEN__)
75#define HAL_USE_GPT TRUE
76#endif
77
78/**
79 * @brief Enables the I2C subsystem.
80 */
81#if !defined(HAL_USE_I2C) || defined(__DOXYGEN__)
82#define HAL_USE_I2C TRUE
83#endif
84
85/**
86 * @brief Enables the I2S subsystem.
87 */
88#if !defined(HAL_USE_I2S) || defined(__DOXYGEN__)
89#define HAL_USE_I2S FALSE
90#endif
91
92/**
93 * @brief Enables the ICU subsystem.
94 */
95#if !defined(HAL_USE_ICU) || defined(__DOXYGEN__)
96#define HAL_USE_ICU FALSE
97#endif
98
99/**
100 * @brief Enables the MAC subsystem.
101 */
102#if !defined(HAL_USE_MAC) || defined(__DOXYGEN__)
103#define HAL_USE_MAC FALSE
104#endif
105
106/**
107 * @brief Enables the MMC_SPI subsystem.
108 */
109#if !defined(HAL_USE_MMC_SPI) || defined(__DOXYGEN__)
110#define HAL_USE_MMC_SPI FALSE
111#endif
112
113/**
114 * @brief Enables the PWM subsystem.
115 */
116#if !defined(HAL_USE_PWM) || defined(__DOXYGEN__)
117#define HAL_USE_PWM FALSE
118#endif
119
120/**
121 * @brief Enables the RTC subsystem.
122 */
123#if !defined(HAL_USE_RTC) || defined(__DOXYGEN__)
124#define HAL_USE_RTC FALSE
125#endif
126
127/**
128 * @brief Enables the SDC subsystem.
129 */
130#if !defined(HAL_USE_SDC) || defined(__DOXYGEN__)
131#define HAL_USE_SDC FALSE
132#endif
133
134/**
135 * @brief Enables the SERIAL subsystem.
136 */
137#if !defined(HAL_USE_SERIAL) || defined(__DOXYGEN__)
138#define HAL_USE_SERIAL FALSE
139#endif
140
141/**
142 * @brief Enables the SERIAL over USB subsystem.
143 */
144#if !defined(HAL_USE_SERIAL_USB) || defined(__DOXYGEN__)
145#define HAL_USE_SERIAL_USB FALSE
146#endif
147
148/**
149 * @brief Enables the SIO subsystem.
150 */
151#if !defined(HAL_USE_SIO) || defined(__DOXYGEN__)
152#define HAL_USE_SIO FALSE
153#endif
154
155/**
156 * @brief Enables the SPI subsystem.
157 */
158#if !defined(HAL_USE_SPI) || defined(__DOXYGEN__)
159#define HAL_USE_SPI TRUE
160#endif
161
162/**
163 * @brief Enables the TRNG subsystem.
164 */
165#if !defined(HAL_USE_TRNG) || defined(__DOXYGEN__)
166#define HAL_USE_TRNG FALSE
167#endif
168
169/**
170 * @brief Enables the UART subsystem.
171 */
172#if !defined(HAL_USE_UART) || defined(__DOXYGEN__)
173#define HAL_USE_UART FALSE
174#endif
175
176/**
177 * @brief Enables the USB subsystem.
178 */
179#if !defined(HAL_USE_USB) || defined(__DOXYGEN__)
180#define HAL_USE_USB TRUE
181#endif
182
183/**
184 * @brief Enables the WDG subsystem.
185 */
186#if !defined(HAL_USE_WDG) || defined(__DOXYGEN__)
187#define HAL_USE_WDG FALSE
188#endif
189
190/**
191 * @brief Enables the WSPI subsystem.
192 */
193#if !defined(HAL_USE_WSPI) || defined(__DOXYGEN__)
194#define HAL_USE_WSPI FALSE
195#endif
196
197/*===========================================================================*/
198/* PAL driver related settings. */
199/*===========================================================================*/
200
201/**
202 * @brief Enables synchronous APIs.
203 * @note Disabling this option saves both code and data space.
204 */
205#if !defined(PAL_USE_CALLBACKS) || defined(__DOXYGEN__)
206#define PAL_USE_CALLBACKS FALSE
207#endif
208
209/**
210 * @brief Enables synchronous APIs.
211 * @note Disabling this option saves both code and data space.
212 */
213#if !defined(PAL_USE_WAIT) || defined(__DOXYGEN__)
214#define PAL_USE_WAIT FALSE
215#endif
216
217/*===========================================================================*/
218/* ADC driver related settings. */
219/*===========================================================================*/
220
221/**
222 * @brief Enables synchronous APIs.
223 * @note Disabling this option saves both code and data space.
224 */
225#if !defined(ADC_USE_WAIT) || defined(__DOXYGEN__)
226#define ADC_USE_WAIT TRUE
227#endif
228
229/**
230 * @brief Enables the @p adcAcquireBus() and @p adcReleaseBus() APIs.
231 * @note Disabling this option saves both code and data space.
232 */
233#if !defined(ADC_USE_MUTUAL_EXCLUSION) || defined(__DOXYGEN__)
234#define ADC_USE_MUTUAL_EXCLUSION TRUE
235#endif
236
237/*===========================================================================*/
238/* CAN driver related settings. */
239/*===========================================================================*/
240
241/**
242 * @brief Sleep mode related APIs inclusion switch.
243 */
244#if !defined(CAN_USE_SLEEP_MODE) || defined(__DOXYGEN__)
245#define CAN_USE_SLEEP_MODE TRUE
246#endif
247
248/**
249 * @brief Enforces the driver to use direct callbacks rather than OSAL events.
250 */
251#if !defined(CAN_ENFORCE_USE_CALLBACKS) || defined(__DOXYGEN__)
252#define CAN_ENFORCE_USE_CALLBACKS FALSE
253#endif
254
255/*===========================================================================*/
256/* CRY driver related settings. */
257/*===========================================================================*/
258
259/**
260 * @brief Enables the SW fall-back of the cryptographic driver.
261 * @details When enabled, this option, activates a fall-back software
262 * implementation for algorithms not supported by the underlying
263 * hardware.
264 * @note Fall-back implementations may not be present for all algorithms.
265 */
266#if !defined(HAL_CRY_USE_FALLBACK) || defined(__DOXYGEN__)
267#define HAL_CRY_USE_FALLBACK FALSE
268#endif
269
270/**
271 * @brief Makes the driver forcibly use the fall-back implementations.
272 */
273#if !defined(HAL_CRY_ENFORCE_FALLBACK) || defined(__DOXYGEN__)
274#define HAL_CRY_ENFORCE_FALLBACK FALSE
275#endif
276
277/*===========================================================================*/
278/* DAC driver related settings. */
279/*===========================================================================*/
280
281/**
282 * @brief Enables synchronous APIs.
283 * @note Disabling this option saves both code and data space.
284 */
285#if !defined(DAC_USE_WAIT) || defined(__DOXYGEN__)
286#define DAC_USE_WAIT TRUE
287#endif
288
289/**
290 * @brief Enables the @p dacAcquireBus() and @p dacReleaseBus() APIs.
291 * @note Disabling this option saves both code and data space.
292 */
293#if !defined(DAC_USE_MUTUAL_EXCLUSION) || defined(__DOXYGEN__)
294#define DAC_USE_MUTUAL_EXCLUSION TRUE
295#endif
296
297/*===========================================================================*/
298/* I2C driver related settings. */
299/*===========================================================================*/
300
301/**
302 * @brief Enables the mutual exclusion APIs on the I2C bus.
303 */
304#if !defined(I2C_USE_MUTUAL_EXCLUSION) || defined(__DOXYGEN__)
305#define I2C_USE_MUTUAL_EXCLUSION TRUE
306#endif
307
308/*===========================================================================*/
309/* MAC driver related settings. */
310/*===========================================================================*/
311
312/**
313 * @brief Enables the zero-copy API.
314 */
315#if !defined(MAC_USE_ZERO_COPY) || defined(__DOXYGEN__)
316#define MAC_USE_ZERO_COPY FALSE
317#endif
318
319/**
320 * @brief Enables an event sources for incoming packets.
321 */
322#if !defined(MAC_USE_EVENTS) || defined(__DOXYGEN__)
323#define MAC_USE_EVENTS TRUE
324#endif
325
326/*===========================================================================*/
327/* MMC_SPI driver related settings. */
328/*===========================================================================*/
329
330/**
331 * @brief Delays insertions.
332 * @details If enabled this options inserts delays into the MMC waiting
333 * routines releasing some extra CPU time for the threads with
334 * lower priority, this may slow down the driver a bit however.
335 * This option is recommended also if the SPI driver does not
336 * use a DMA channel and heavily loads the CPU.
337 */
338#if !defined(MMC_NICE_WAITING) || defined(__DOXYGEN__)
339#define MMC_NICE_WAITING TRUE
340#endif
341
342/*===========================================================================*/
343/* SDC driver related settings. */
344/*===========================================================================*/
345
346/**
347 * @brief Number of initialization attempts before rejecting the card.
348 * @note Attempts are performed at 10mS intervals.
349 */
350#if !defined(SDC_INIT_RETRY) || defined(__DOXYGEN__)
351#define SDC_INIT_RETRY 100
352#endif
353
354/**
355 * @brief Include support for MMC cards.
356 * @note MMC support is not yet implemented so this option must be kept
357 * at @p FALSE.
358 */
359#if !defined(SDC_MMC_SUPPORT) || defined(__DOXYGEN__)
360#define SDC_MMC_SUPPORT FALSE
361#endif
362
363/**
364 * @brief Delays insertions.
365 * @details If enabled this options inserts delays into the MMC waiting
366 * routines releasing some extra CPU time for the threads with
367 * lower priority, this may slow down the driver a bit however.
368 */
369#if !defined(SDC_NICE_WAITING) || defined(__DOXYGEN__)
370#define SDC_NICE_WAITING TRUE
371#endif
372
373/**
374 * @brief OCR initialization constant for V20 cards.
375 */
376#if !defined(SDC_INIT_OCR_V20) || defined(__DOXYGEN__)
377#define SDC_INIT_OCR_V20 0x50FF8000U
378#endif
379
380/**
381 * @brief OCR initialization constant for non-V20 cards.
382 */
383#if !defined(SDC_INIT_OCR) || defined(__DOXYGEN__)
384#define SDC_INIT_OCR 0x80100000U
385#endif
386
387/*===========================================================================*/
388/* SERIAL driver related settings. */
389/*===========================================================================*/
390
391/**
392 * @brief Default bit rate.
393 * @details Configuration parameter, this is the baud rate selected for the
394 * default configuration.
395 */
396#if !defined(SERIAL_DEFAULT_BITRATE) || defined(__DOXYGEN__)
397#define SERIAL_DEFAULT_BITRATE 38400
398#endif
399
400/**
401 * @brief Serial buffers size.
402 * @details Configuration parameter, you can change the depth of the queue
403 * buffers depending on the requirements of your application.
404 * @note The default is 16 bytes for both the transmission and receive
405 * buffers.
406 */
407#if !defined(SERIAL_BUFFERS_SIZE) || defined(__DOXYGEN__)
408#define SERIAL_BUFFERS_SIZE 16
409#endif
410
411/*===========================================================================*/
412/* SERIAL_USB driver related setting. */
413/*===========================================================================*/
414
415/**
416 * @brief Serial over USB buffers size.
417 * @details Configuration parameter, the buffer size must be a multiple of
418 * the USB data endpoint maximum packet size.
419 * @note The default is 256 bytes for both the transmission and receive
420 * buffers.
421 */
422#if !defined(SERIAL_USB_BUFFERS_SIZE) || defined(__DOXYGEN__)
423#define SERIAL_USB_BUFFERS_SIZE 1
424#endif
425
426/**
427 * @brief Serial over USB number of buffers.
428 * @note The default is 2 buffers.
429 */
430#if !defined(SERIAL_USB_BUFFERS_NUMBER) || defined(__DOXYGEN__)
431#define SERIAL_USB_BUFFERS_NUMBER 2
432#endif
433
434/*===========================================================================*/
435/* SPI driver related settings. */
436/*===========================================================================*/
437
438/**
439 * @brief Enables synchronous APIs.
440 * @note Disabling this option saves both code and data space.
441 */
442#if !defined(SPI_USE_WAIT) || defined(__DOXYGEN__)
443#define SPI_USE_WAIT TRUE
444#endif
445
446/**
447 * @brief Enables circular transfers APIs.
448 * @note Disabling this option saves both code and data space.
449 */
450#if !defined(SPI_USE_CIRCULAR) || defined(__DOXYGEN__)
451#define SPI_USE_CIRCULAR FALSE
452#endif
453
454
455/**
456 * @brief Enables the @p spiAcquireBus() and @p spiReleaseBus() APIs.
457 * @note Disabling this option saves both code and data space.
458 */
459#if !defined(SPI_USE_MUTUAL_EXCLUSION) || defined(__DOXYGEN__)
460#define SPI_USE_MUTUAL_EXCLUSION TRUE
461#endif
462
463/**
464 * @brief Handling method for SPI CS line.
465 * @note Disabling this option saves both code and data space.
466 */
467#if !defined(SPI_SELECT_MODE) || defined(__DOXYGEN__)
468#define SPI_SELECT_MODE SPI_SELECT_MODE_PAD
469#endif
470
471/*===========================================================================*/
472/* UART driver related settings. */
473/*===========================================================================*/
474
475/**
476 * @brief Enables synchronous APIs.
477 * @note Disabling this option saves both code and data space.
478 */
479#if !defined(UART_USE_WAIT) || defined(__DOXYGEN__)
480#define UART_USE_WAIT FALSE
481#endif
482
483/**
484 * @brief Enables the @p uartAcquireBus() and @p uartReleaseBus() APIs.
485 * @note Disabling this option saves both code and data space.
486 */
487#if !defined(UART_USE_MUTUAL_EXCLUSION) || defined(__DOXYGEN__)
488#define UART_USE_MUTUAL_EXCLUSION FALSE
489#endif
490
491/*===========================================================================*/
492/* USB driver related settings. */
493/*===========================================================================*/
494
495/**
496 * @brief Enables synchronous APIs.
497 * @note Disabling this option saves both code and data space.
498 */
499#if !defined(USB_USE_WAIT) || defined(__DOXYGEN__)
500#define USB_USE_WAIT TRUE
501#endif
502
503/*===========================================================================*/
504/* WSPI driver related settings. */
505/*===========================================================================*/
506
507/**
508 * @brief Enables synchronous APIs.
509 * @note Disabling this option saves both code and data space.
510 */
511#if !defined(WSPI_USE_WAIT) || defined(__DOXYGEN__)
512#define WSPI_USE_WAIT TRUE
513#endif
514
515/**
516 * @brief Enables the @p wspiAcquireBus() and @p wspiReleaseBus() APIs.
517 * @note Disabling this option saves both code and data space.
518 */
519#if !defined(WSPI_USE_MUTUAL_EXCLUSION) || defined(__DOXYGEN__)
520#define WSPI_USE_MUTUAL_EXCLUSION TRUE
521#endif
522
523#endif /* HALCONF_H */
524
525/** @} */
diff --git a/keyboards/nebula12/info.json b/keyboards/nebula12/info.json
new file mode 100755
index 000000000..16d04fa86
--- /dev/null
+++ b/keyboards/nebula12/info.json
@@ -0,0 +1,14 @@
1{
2 "keyboard_name": "NEBULA12",
3 "url": "",
4 "maintainer": "yiancar",
5 "width": 3,
6 "height": 4,
7 "layouts": {
8 "LAYOUT_68_ansi": {
9 "layout": [
10 {"x":0, "y":0}, {"x":1, "y":0}, {"x":2, "y":0}, {"x":0, "y":1}, {"x":1, "y":1}, {"x":2, "y":1}, {"x":0, "y":2}, {"x":1, "y":2}, {"x":2, "y":2}, {"x":0, "y":3}, {"x":1, "y":3}, {"x":2, "y":3}
11 ]
12 }
13 }
14}
diff --git a/keyboards/nebula12/keymaps/default/keymap.c b/keyboards/nebula12/keymaps/default/keymap.c
new file mode 100755
index 000000000..670d25e73
--- /dev/null
+++ b/keyboards/nebula12/keymaps/default/keymap.c
@@ -0,0 +1,42 @@
1/* Copyright 2020 Yiancar
2 *
3 * This program is free software: you can redistribute it and/or modify
4 * it under the terms of the GNU General Public License as published by
5 * the Free Software Foundation, either version 2 of the License, or
6 * (at your option) any later version.
7 *
8 * This program is distributed in the hope that it will be useful,
9 * but WITHOUT ANY WARRANTY; without even the implied warranty of
10 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
11 * GNU General Public License for more details.
12 *
13 * You should have received a copy of the GNU General Public License
14 * along with this program. If not, see <http://www.gnu.org/licenses/>.
15 */
16#include QMK_KEYBOARD_H
17
18const uint16_t PROGMEM keymaps[][MATRIX_ROWS][MATRIX_COLS] = {
19[0] = LAYOUT_all( /* Base */
20 KC_P7, KC_P8, KC_P9,
21 KC_P4, KC_P5, KC_P6,
22 KC_P1, KC_P2, KC_P3,
23 MO(1), KC_P0, KC_PDOT),
24
25[1] = LAYOUT_all( /* FN */
26 RGB_TOG, RGB_MOD, KC_TRNS,
27 EF_DEC, EF_INC, KC_TRNS,
28 KC_TRNS, KC_TRNS, KC_TRNS,
29 KC_TRNS, KC_TRNS, KC_PENT),
30
31[2] = LAYOUT_all( /* Empty for dynamic keymaps */
32 KC_TRNS, KC_TRNS, KC_TRNS,
33 KC_TRNS, KC_TRNS, KC_TRNS,
34 KC_TRNS, KC_TRNS, KC_TRNS,
35 KC_TRNS, KC_TRNS, KC_TRNS),
36
37[3] = LAYOUT_all( /* Empty for dynamic keymaps */
38 KC_TRNS, KC_TRNS, KC_TRNS,
39 KC_TRNS, KC_TRNS, KC_TRNS,
40 KC_TRNS, KC_TRNS, KC_TRNS,
41 KC_TRNS, KC_TRNS, KC_TRNS),
42};
diff --git a/keyboards/nebula12/keymaps/default/readme.md b/keyboards/nebula12/keymaps/default/readme.md
new file mode 100755
index 000000000..706ec9f3b
--- /dev/null
+++ b/keyboards/nebula12/keymaps/default/readme.md
@@ -0,0 +1,7 @@
1# The default keymap for Nebula12. VIA support disabled.
2
3![Layer 0](https://i.imgur.com/CoMteJW.png)
4
5![Layer 1](https://i.imgur.com/LbIPiJj.png)
6
7The full RGB control does not fit due to the small number of keys. Using VIA might be a good idea!
diff --git a/keyboards/nebula12/keymaps/via/keymap.c b/keyboards/nebula12/keymaps/via/keymap.c
new file mode 100755
index 000000000..670d25e73
--- /dev/null
+++ b/keyboards/nebula12/keymaps/via/keymap.c
@@ -0,0 +1,42 @@
1/* Copyright 2020 Yiancar
2 *
3 * This program is free software: you can redistribute it and/or modify
4 * it under the terms of the GNU General Public License as published by
5 * the Free Software Foundation, either version 2 of the License, or
6 * (at your option) any later version.
7 *
8 * This program is distributed in the hope that it will be useful,
9 * but WITHOUT ANY WARRANTY; without even the implied warranty of
10 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
11 * GNU General Public License for more details.
12 *
13 * You should have received a copy of the GNU General Public License
14 * along with this program. If not, see <http://www.gnu.org/licenses/>.
15 */
16#include QMK_KEYBOARD_H
17
18const uint16_t PROGMEM keymaps[][MATRIX_ROWS][MATRIX_COLS] = {
19[0] = LAYOUT_all( /* Base */
20 KC_P7, KC_P8, KC_P9,
21 KC_P4, KC_P5, KC_P6,
22 KC_P1, KC_P2, KC_P3,
23 MO(1), KC_P0, KC_PDOT),
24
25[1] = LAYOUT_all( /* FN */
26 RGB_TOG, RGB_MOD, KC_TRNS,
27 EF_DEC, EF_INC, KC_TRNS,
28 KC_TRNS, KC_TRNS, KC_TRNS,
29 KC_TRNS, KC_TRNS, KC_PENT),
30
31[2] = LAYOUT_all( /* Empty for dynamic keymaps */
32 KC_TRNS, KC_TRNS, KC_TRNS,
33 KC_TRNS, KC_TRNS, KC_TRNS,
34 KC_TRNS, KC_TRNS, KC_TRNS,
35 KC_TRNS, KC_TRNS, KC_TRNS),
36
37[3] = LAYOUT_all( /* Empty for dynamic keymaps */
38 KC_TRNS, KC_TRNS, KC_TRNS,
39 KC_TRNS, KC_TRNS, KC_TRNS,
40 KC_TRNS, KC_TRNS, KC_TRNS,
41 KC_TRNS, KC_TRNS, KC_TRNS),
42};
diff --git a/keyboards/nebula12/keymaps/via/readme.md b/keyboards/nebula12/keymaps/via/readme.md
new file mode 100755
index 000000000..7023515d7
--- /dev/null
+++ b/keyboards/nebula12/keymaps/via/readme.md
@@ -0,0 +1,5 @@
1# The default keymap for Nebula12. VIA support enabled.
2
3![Layer 0](https://i.imgur.com/CoMteJW.png)
4
5![Layer 1](https://i.imgur.com/LbIPiJj.png)
diff --git a/keyboards/nebula12/keymaps/via/rules.mk b/keyboards/nebula12/keymaps/via/rules.mk
new file mode 100755
index 000000000..1e5b99807
--- /dev/null
+++ b/keyboards/nebula12/keymaps/via/rules.mk
@@ -0,0 +1 @@
VIA_ENABLE = yes
diff --git a/keyboards/nebula12/mcuconf.h b/keyboards/nebula12/mcuconf.h
new file mode 100644
index 000000000..a414763ed
--- /dev/null
+++ b/keyboards/nebula12/mcuconf.h
@@ -0,0 +1,176 @@
1/*
2 ChibiOS - Copyright (C) 2006..2015 Giovanni Di Sirio
3
4 Licensed under the Apache License, Version 2.0 (the "License");
5 you may not use this file except in compliance with the License.
6 You may obtain a copy of the License at
7
8 http://www.apache.org/licenses/LICENSE-2.0
9
10 Unless required by applicable law or agreed to in writing, software
11 distributed under the License is distributed on an "AS IS" BASIS,
12 WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
13 See the License for the specific language governing permissions and
14 limitations under the License.
15*/
16
17#ifndef _MCUCONF_H_
18#define _MCUCONF_H_
19
20/*
21 * STM32F0xx drivers configuration.
22 * The following settings override the default settings present in
23 * the various device driver implementation headers.
24 * Note that the settings for each driver only have effect if the whole
25 * driver is enabled in halconf.h.
26 *
27 * IRQ priorities:
28 * 3...0 Lowest...Highest.
29 *
30 * DMA priorities:
31 * 0...3 Lowest...Highest.
32 */
33
34#define STM32F0xx_MCUCONF
35// #define STM32F070xB
36
37/*
38 * HAL driver system settings.
39 */
40#define STM32_NO_INIT FALSE
41#define STM32_PVD_ENABLE FALSE
42#define STM32_PLS STM32_PLS_LEV0
43#define STM32_HSI_ENABLED TRUE
44#define STM32_HSI14_ENABLED TRUE
45#define STM32_HSI48_ENABLED FALSE
46#define STM32_LSI_ENABLED TRUE
47#define STM32_HSE_ENABLED FALSE
48#define STM32_LSE_ENABLED FALSE
49#define STM32_SW STM32_SW_PLL
50#define STM32_PLLSRC STM32_PLLSRC_HSI_DIV2
51#define STM32_PREDIV_VALUE 1
52#define STM32_PLLMUL_VALUE 12
53#define STM32_HPRE STM32_HPRE_DIV1
54#define STM32_PPRE STM32_PPRE_DIV1
55#define STM32_ADCSW STM32_ADCSW_HSI14
56#define STM32_ADCPRE STM32_ADCPRE_DIV4
57#define STM32_MCOSEL STM32_MCOSEL_NOCLOCK
58#define STM32_ADCPRE STM32_ADCPRE_DIV4
59#define STM32_ADCSW STM32_ADCSW_HSI14
60#define STM32_USBSW STM32_USBSW_HSI48
61#define STM32_CECSW STM32_CECSW_HSI
62#define STM32_I2C1SW STM32_I2C1SW_HSI
63#define STM32_USART1SW STM32_USART1SW_PCLK
64#define STM32_RTCSEL STM32_RTCSEL_LSI
65
66/*
67 * ADC driver system settings.
68 */
69#define STM32_ADC_USE_ADC1 FALSE
70#define STM32_ADC_ADC1_DMA_PRIORITY 2
71#define STM32_ADC_IRQ_PRIORITY 2
72#define STM32_ADC_ADC1_DMA_IRQ_PRIORITY 2
73
74/*
75 * EXT driver system settings.
76 */
77#define STM32_EXT_EXTI0_1_IRQ_PRIORITY 3
78#define STM32_EXT_EXTI2_3_IRQ_PRIORITY 3
79#define STM32_EXT_EXTI4_15_IRQ_PRIORITY 3
80#define STM32_EXT_EXTI16_IRQ_PRIORITY 3
81#define STM32_EXT_EXTI17_IRQ_PRIORITY 3
82
83/*
84 * GPT driver system settings.
85 */
86#define STM32_GPT_USE_TIM1 FALSE
87#define STM32_GPT_USE_TIM2 FALSE
88#define STM32_GPT_USE_TIM3 TRUE
89#define STM32_GPT_USE_TIM14 FALSE
90#define STM32_GPT_TIM1_IRQ_PRIORITY 2
91#define STM32_GPT_TIM2_IRQ_PRIORITY 2
92#define STM32_GPT_TIM3_IRQ_PRIORITY 2
93#define STM32_GPT_TIM14_IRQ_PRIORITY 2
94
95/*
96 * I2C driver system settings.
97 */
98#define STM32_I2C_USE_I2C1 TRUE
99#define STM32_I2C_USE_I2C2 FALSE
100#define STM32_I2C_BUSY_TIMEOUT 50
101#define STM32_I2C_I2C1_IRQ_PRIORITY 3
102#define STM32_I2C_I2C2_IRQ_PRIORITY 3
103#define STM32_I2C_USE_DMA TRUE
104#define STM32_I2C_I2C1_DMA_PRIORITY 1
105#define STM32_I2C_I2C2_DMA_PRIORITY 1
106#define STM32_I2C_I2C1_RX_DMA_STREAM STM32_DMA_STREAM_ID(1, 7)
107#define STM32_I2C_I2C1_TX_DMA_STREAM STM32_DMA_STREAM_ID(1, 6)
108#define STM32_I2C_DMA_ERROR_HOOK(i2cp) osalSysHalt("DMA failure")
109
110/*
111 * ICU driver system settings.
112 */
113#define STM32_ICU_USE_TIM1 FALSE
114#define STM32_ICU_USE_TIM2 FALSE
115#define STM32_ICU_USE_TIM3 FALSE
116#define STM32_ICU_TIM1_IRQ_PRIORITY 3
117#define STM32_ICU_TIM2_IRQ_PRIORITY 3
118#define STM32_ICU_TIM3_IRQ_PRIORITY 3
119
120/*
121 * PWM driver system settings.
122 */
123#define STM32_PWM_USE_ADVANCED FALSE
124#define STM32_PWM_USE_TIM1 FALSE
125#define STM32_PWM_USE_TIM2 FALSE
126#define STM32_PWM_USE_TIM3 FALSE
127#define STM32_PWM_TIM1_IRQ_PRIORITY 3
128#define STM32_PWM_TIM2_IRQ_PRIORITY 3
129#define STM32_PWM_TIM3_IRQ_PRIORITY 3
130
131/*
132 * SERIAL driver system settings.
133 */
134#define STM32_SERIAL_USE_USART1 FALSE
135#define STM32_SERIAL_USE_USART2 FALSE
136#define STM32_SERIAL_USART1_PRIORITY 3
137#define STM32_SERIAL_USART2_PRIORITY 3
138
139/*
140 * SPI driver system settings.
141 */
142#define STM32_SPI_USE_SPI1 FALSE
143#define STM32_SPI_USE_SPI2 TRUE
144#define STM32_SPI_SPI1_DMA_PRIORITY 1
145#define STM32_SPI_SPI2_DMA_PRIORITY 1
146#define STM32_SPI_SPI1_IRQ_PRIORITY 2
147#define STM32_SPI_SPI2_IRQ_PRIORITY 2
148#define STM32_SPI_SPI2_RX_DMA_STREAM STM32_DMA_STREAM_ID(1, 4)
149#define STM32_SPI_SPI2_TX_DMA_STREAM STM32_DMA_STREAM_ID(1, 5)
150#define STM32_SPI_DMA_ERROR_HOOK(spip) osalSysHalt("DMA failure")
151
152/*
153 * ST driver system settings.
154 */
155#define STM32_ST_IRQ_PRIORITY 2
156#define STM32_ST_USE_TIMER 2
157
158/*
159 * UART driver system settings.
160 */
161#define STM32_UART_USE_USART1 FALSE
162#define STM32_UART_USE_USART2 FALSE
163#define STM32_UART_USART1_IRQ_PRIORITY 3
164#define STM32_UART_USART2_IRQ_PRIORITY 3
165#define STM32_UART_USART1_DMA_PRIORITY 0
166#define STM32_UART_USART2_DMA_PRIORITY 0
167#define STM32_UART_DMA_ERROR_HOOK(uartp) osalSysHalt("DMA failure")
168
169/*
170 * USB driver system settings.
171 */
172#define STM32_USB_USE_USB1 TRUE
173#define STM32_USB_LOW_POWER_ON_SUSPEND FALSE
174#define STM32_USB_USB1_LP_IRQ_PRIORITY 3
175
176#endif /* _MCUCONF_H_ */
diff --git a/keyboards/nebula12/nebula12.c b/keyboards/nebula12/nebula12.c
new file mode 100755
index 000000000..6deecb8f4
--- /dev/null
+++ b/keyboards/nebula12/nebula12.c
@@ -0,0 +1,20 @@
1/* Copyright 2020 Yiancar
2 *
3 * This program is free software: you can redistribute it and/or modify
4 * it under the terms of the GNU General Public License as published by
5 * the Free Software Foundation, either version 2 of the License, or
6 * (at your option) any later version.
7 *
8 * This program is distributed in the hope that it will be useful,
9 * but WITHOUT ANY WARRANTY; without even the implied warranty of
10 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
11 * GNU General Public License for more details.
12 *
13 * You should have received a copy of the GNU General Public License
14 * along with this program. If not, see <http://www.gnu.org/licenses/>.
15 */
16#ifndef RGB_BACKLIGHT_NEBULA12
17#error RGB_BACKLIGHT_NEBULA12 not defined, recheck config.h
18#endif
19
20#include "nebula12.h"
diff --git a/keyboards/nebula12/nebula12.h b/keyboards/nebula12/nebula12.h
new file mode 100755
index 000000000..1c73fbdae
--- /dev/null
+++ b/keyboards/nebula12/nebula12.h
@@ -0,0 +1,35 @@
1/* Copyright 2020 Yiancar
2 *
3 * This program is free software: you can redistribute it and/or modify
4 * it under the terms of the GNU General Public License as published by
5 * the Free Software Foundation, either version 2 of the License, or
6 * (at your option) any later version.
7 *
8 * This program is distributed in the hope that it will be useful,
9 * but WITHOUT ANY WARRANTY; without even the implied warranty of
10 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
11 * GNU General Public License for more details.
12 *
13 * You should have received a copy of the GNU General Public License
14 * along with this program. If not, see <http://www.gnu.org/licenses/>.
15 */
16#pragma once
17
18#define XXX KC_NO
19
20#include "quantum.h"
21#include "../wilba_tech/wt_rgb_backlight_keycodes.h"
22
23// This a shortcut to help you visually see your layout.
24
25#define LAYOUT_all( \
26 K00, K01, K02, \
27 K10, K11, K12, \
28 K20, K21, K22, \
29 K30, K31, K32 \
30) { \
31 { K00, K01, K02, }, \
32 { K10, K11, K12, }, \
33 { K20, K21, K22, }, \
34 { K30, K31, K32, } \
35}
diff --git a/keyboards/nebula12/readme.md b/keyboards/nebula12/readme.md
new file mode 100755
index 000000000..3a68d0a97
--- /dev/null
+++ b/keyboards/nebula12/readme.md
@@ -0,0 +1,32 @@
1# Nebula65
2
3This is a standard fixed layout 12 key PCB. It supports VIA, full per-key RGB and underglow RGB.
4
5* Keyboard Maintainer: [Yiancar](http://yiancar-designs.com/) and on [GitHub](https://github.com/yiancar)
6* Hardware Supported: A 65% keyboard with STM32F072CB
7* Hardware Availability: https://spaceholdings.net/
8
9## Instructions
10
11### Build
12
13Make example for this keyboard (after setting up your build environment):
14
15 make nebula12:via
16
17See the [build environment setup](https://docs.qmk.fm/#/getting_started_build_tools) and the [make instructions](https://docs.qmk.fm/#/getting_started_make_guide) for more information. Brand new to QMK? Start with our [Complete Newbs Guide](https://docs.qmk.fm/#/newbs).
18
19### Reset
20
21- Unplug
22- Hold Escape
23- Plug In
24- Unplug
25- Release Escape
26
27### Flash
28
29- Unplug
30- Hold Escape
31- Plug In
32- Flash using QMK Toolbox or dfu-util (`make nebula12:<keymap>:dfu-util`)
diff --git a/keyboards/nebula12/rules.mk b/keyboards/nebula12/rules.mk
new file mode 100755
index 000000000..c897d9dda
--- /dev/null
+++ b/keyboards/nebula12/rules.mk
@@ -0,0 +1,34 @@
1# MCU name
2MCU = STM32F072
3
4BOARD = ST_STM32F072B_DISCOVERY
5
6# Do not put the microcontroller into power saving mode
7# when we get USB suspend event. We want it to keep updating
8# backlight effects.
9OPT_DEFS += -DNO_SUSPEND_POWER_DOWN
10
11# Build Options
12# comment out to disable the options.
13#
14BACKLIGHT_ENABLE = no # Enable keyboard backlight functionality
15BOOTMAGIC_ENABLE = lite # Virtual DIP switch configuration
16MOUSEKEY_ENABLE = yes # Mouse keys
17EXTRAKEY_ENABLE = yes # Audio control and System control
18CONSOLE_ENABLE = no # Console for debug
19COMMAND_ENABLE = no # Commands for debug and configuration
20SLEEP_LED_ENABLE = no # Breathing sleep LED during USB suspend
21NKRO_ENABLE = yes # USB Nkey Rollover
22AUDIO_ENABLE = no # Audio output on port C6
23NO_USB_STARTUP_CHECK = no # Disable initialization only when usb is plugged in
24RGBLIGHT_ENABLE = yes # Underglow RGB
25WS2812_DRIVER = spi # Underglow RGB Driver
26
27CIE1931_CURVE = yes
28
29# project specific files
30SRC += keyboards/wilba_tech/wt_main.c \
31 keyboards/wilba_tech/wt_rgb_backlight.c \
32 drivers/issi/is31fl3731.c \
33 quantum/color.c
34QUANTUM_LIB_SRC += drivers/chibios/i2c_master.c
diff --git a/keyboards/wilba_tech/wt_rgb_backlight.c b/keyboards/wilba_tech/wt_rgb_backlight.c
index 221d924c4..e2506bf3f 100644
--- a/keyboards/wilba_tech/wt_rgb_backlight.c
+++ b/keyboards/wilba_tech/wt_rgb_backlight.c
@@ -21,6 +21,7 @@
21 defined(RGB_BACKLIGHT_KOYU) || \ 21 defined(RGB_BACKLIGHT_KOYU) || \
22 defined(RGB_BACKLIGHT_HS60) || \ 22 defined(RGB_BACKLIGHT_HS60) || \
23 defined(RGB_BACKLIGHT_NK65) || \ 23 defined(RGB_BACKLIGHT_NK65) || \
24 defined(RGB_BACKLIGHT_NEBULA12) || \
24 defined(RGB_BACKLIGHT_NEBULA65) || \ 25 defined(RGB_BACKLIGHT_NEBULA65) || \
25 defined(RGB_BACKLIGHT_U80_A) || \ 26 defined(RGB_BACKLIGHT_U80_A) || \
26 defined(RGB_BACKLIGHT_DAWN60) || \ 27 defined(RGB_BACKLIGHT_DAWN60) || \
@@ -44,7 +45,7 @@
44#include "wt_rgb_backlight_api.h" 45#include "wt_rgb_backlight_api.h"
45#include "wt_rgb_backlight_keycodes.h" 46#include "wt_rgb_backlight_keycodes.h"
46 47
47#if !defined(RGB_BACKLIGHT_HS60) && !defined(RGB_BACKLIGHT_NK65) && !defined(RGB_BACKLIGHT_NEBULA65) 48#if !defined(RGB_BACKLIGHT_HS60) && !defined(RGB_BACKLIGHT_NK65) && !defined(RGB_BACKLIGHT_NEBULA65) && !defined(RGB_BACKLIGHT_NEBULA12)
48#include <avr/interrupt.h> 49#include <avr/interrupt.h>
49#include "drivers/avr/i2c_master.h" 50#include "drivers/avr/i2c_master.h"
50#else 51#else
@@ -84,6 +85,8 @@ LED_TYPE g_ws2812_leds[WS2812_LED_TOTAL];
84#define BACKLIGHT_LED_COUNT 108 85#define BACKLIGHT_LED_COUNT 108
85#elif defined(RGB_BACKLIGHT_DAWN60) 86#elif defined(RGB_BACKLIGHT_DAWN60)
86#define BACKLIGHT_LED_COUNT 84 //64 + 20 87#define BACKLIGHT_LED_COUNT 84 //64 + 20
88#elif defined(RGB_BACKLIGHT_NEBULA12)
89#define BACKLIGHT_LED_COUNT 16
87#else 90#else
88#define BACKLIGHT_LED_COUNT 72 91#define BACKLIGHT_LED_COUNT 72
89#endif 92#endif
@@ -358,6 +361,36 @@ const is31_led g_is31_leds[DRIVER_LED_TOTAL] = {
358 {1, K_16, J_16, L_16}, //LB64 361 {1, K_16, J_16, L_16}, //LB64
359}; 362};
360 363
364#elif defined(RGB_BACKLIGHT_NEBULA12)
365// This is a 7-bit address, that gets left-shifted and bit 0
366// set to 0 for write, 1 for read (as per I2C protocol)
367#define ISSI_ADDR_1 0x74
368
369const is31_led g_is31_leds[DRIVER_LED_TOTAL] = {
370/* Refer to IS31 manual for these locations
371 * driver
372 * | R location
373 * | | G location
374 * | | | B location
375 * | | | | */
376 {0, C1_1, C3_2, C4_2}, //A1
377 {0, C1_2, C2_2, C4_3}, //A2
378 {0, C1_3, C2_3, C3_3}, //A3
379 {0, C1_4, C2_4, C3_4}, //A4
380 {0, C1_5, C2_5, C3_5}, //A5
381 {0, C1_6, C2_6, C3_6}, //A6
382 {0, C1_7, C2_7, C3_7}, //A7
383 {0, C1_8, C2_8, C3_8}, //A8
384 {0, C9_1, C8_1, C7_1}, //A9
385 {0, C9_2, C8_2, C7_2}, //A10
386 {0, C9_3, C8_3, C7_3}, //A11
387 {0, C9_4, C8_4, C7_4}, //A12
388 {0, C9_5, C8_5, C7_5}, //A13
389 {0, C9_6, C8_6, C7_6}, //A14
390 {0, C9_7, C8_7, C6_6}, //A15
391 {0, C9_8, C7_7, C6_7}, //A16
392};
393
361#elif defined(RGB_BACKLIGHT_U80_A) 394#elif defined(RGB_BACKLIGHT_U80_A)
362 395
363// U80-A prototype uses 3 ISSI drivers 396// U80-A prototype uses 3 ISSI drivers
@@ -928,6 +961,21 @@ const Point g_map_led_to_point_polar[BACKLIGHT_LED_COUNT] PROGMEM = {
928 //LA62..LB5 961 //LA62..LB5
929 {221,255}, {225,255}, {229,255}, {22,255}, {12,255}, {244,255}, {234,255}, {255,255} 962 {221,255}, {225,255}, {229,255}, {22,255}, {12,255}, {244,255}, {234,255}, {255,255}
930}; 963};
964
965#elif defined(RGB_BACKLIGHT_NEBULA12)
966const Point g_map_led_to_point[BACKLIGHT_LED_COUNT] PROGMEM = {
967 // A1..A16
968 {0,0}, {16,0}, {32,0}, {0,16}, {16,16}, {32,16}, {0,32}, {16,32},
969 {255,255}, {255,255}, {255,255}, {255,255},
970 {32,48}, {16,48}, {0,48}, {32,32}
971};
972const Point g_map_led_to_point_polar[BACKLIGHT_LED_COUNT] PROGMEM = {
973 // A1..A16
974 {72,197}, {64,194}, {56,197}, {85,74}, {64,64}, {43,74}, {171,74}, {192,64},
975 {255,255}, {255,255}, {255,255}, {255,255},
976 {200,196}, {192,192}, {184,196}, {213,74}
977};
978
931#elif defined(RGB_BACKLIGHT_NEBULA65) 979#elif defined(RGB_BACKLIGHT_NEBULA65)
932const Point g_map_led_to_point[BACKLIGHT_LED_COUNT] PROGMEM = { 980const Point g_map_led_to_point[BACKLIGHT_LED_COUNT] PROGMEM = {
933 // LA1..LA60 981 // LA1..LA60
@@ -951,6 +999,7 @@ const Point g_map_led_to_point_polar[BACKLIGHT_LED_COUNT] PROGMEM = {
951 //LA62..LB5 999 //LA62..LB5
952 {207,255}, {213,255}, {218,255}, {35,255}, {21,255}, {19,255}, {224,255}, {32,255} 1000 {207,255}, {213,255}, {218,255}, {35,255}, {21,255}, {19,255}, {224,255}, {32,255}
953}; 1001};
1002
954#elif defined(RGB_BACKLIGHT_M6_B) 1003#elif defined(RGB_BACKLIGHT_M6_B)
955// M6-B is really simple: 1004// M6-B is really simple:
956// 0 3 5 1005// 0 3 5
@@ -1018,7 +1067,7 @@ void map_led_to_point( uint8_t index, Point *point )
1018 point->x = pgm_read_byte(addr); 1067 point->x = pgm_read_byte(addr);
1019 point->y = pgm_read_byte(addr+1); 1068 point->y = pgm_read_byte(addr+1);
1020 1069
1021#if defined(RGB_BACKLIGHT_M6_B) || defined(RGB_BACKLIGHT_HS60) || defined(RGB_BACKLIGHT_NK65) || defined(RGB_BACKLIGHT_NEBULA65) 1070#if defined(RGB_BACKLIGHT_M6_B) || defined(RGB_BACKLIGHT_HS60) || defined(RGB_BACKLIGHT_NK65) || defined(RGB_BACKLIGHT_NEBULA65) || defined(RGB_BACKLIGHT_NEBULA12)
1022 return; 1071 return;
1023#endif 1072#endif
1024 1073
@@ -1219,6 +1268,18 @@ const uint8_t g_map_row_column_to_led[MATRIX_ROWS][MATRIX_COLS] PROGMEM = {
1219 { 4-1, 255, 8-1, 12-1, 16-1, 20-1, 24-1, 28-1, 32-1, 36-1, 40-1, 44-1, 51-1, 52-1, 3+64-1 }, 1268 { 4-1, 255, 8-1, 12-1, 16-1, 20-1, 24-1, 28-1, 32-1, 36-1, 40-1, 44-1, 51-1, 52-1, 3+64-1 },
1220 { 57-1, 58-1, 59-1, 255, 255, 255, 60-1, 255, 255, 48-1, 62-1, 63-1, 64-1, 56-1, 4+64-1 } 1269 { 57-1, 58-1, 59-1, 255, 255, 255, 60-1, 255, 255, 48-1, 62-1, 63-1, 64-1, 56-1, 4+64-1 }
1221}; 1270};
1271#elif defined(RGB_BACKLIGHT_NEBULA12)
1272//
1273// A1, A2, A3,
1274// A4, A5, A6,
1275// A7, A8, A16,
1276// A15, A14, A13,
1277const uint8_t g_map_row_column_to_led[MATRIX_ROWS][MATRIX_COLS] PROGMEM = {
1278 { 1-1, 2-1, 3-1 },
1279 { 4-1, 5-1, 6-1 },
1280 { 7-1, 8-1, 16-1 },
1281 { 15-1, 14-1, 13-1 }
1282};
1222#elif defined(RGB_BACKLIGHT_M6_B) 1283#elif defined(RGB_BACKLIGHT_M6_B)
1223// M6-B is really simple: 1284// M6-B is really simple:
1224// 0 3 5 1285// 0 3 5
@@ -1263,6 +1324,9 @@ void backlight_update_pwm_buffers(void)
1263 IS31FL3733_update_pwm_buffers( ISSI_ADDR_2, 1 ); 1324 IS31FL3733_update_pwm_buffers( ISSI_ADDR_2, 1 );
1264 IS31FL3733_update_led_control_registers( ISSI_ADDR_1, 0 ); 1325 IS31FL3733_update_led_control_registers( ISSI_ADDR_1, 0 );
1265 IS31FL3733_update_led_control_registers( ISSI_ADDR_2, 1 ); 1326 IS31FL3733_update_led_control_registers( ISSI_ADDR_2, 1 );
1327#elif defined(RGB_BACKLIGHT_NEBULA12)
1328 IS31FL3731_update_pwm_buffers( ISSI_ADDR_1, 0 );
1329 IS31FL3731_update_led_control_registers( ISSI_ADDR_1, 0 );
1266#elif defined(RGB_BACKLIGHT_U80_A) 1330#elif defined(RGB_BACKLIGHT_U80_A)
1267 static uint8_t driver = 0; 1331 static uint8_t driver = 0;
1268 switch ( driver ) 1332 switch ( driver )
@@ -1340,7 +1404,7 @@ void backlight_set_key_hit(uint8_t row, uint8_t column)
1340 g_any_key_hit = 0; 1404 g_any_key_hit = 0;
1341} 1405}
1342 1406
1343#if !defined(RGB_BACKLIGHT_HS60) && !defined(RGB_BACKLIGHT_NK65) && !defined(RGB_BACKLIGHT_NEBULA65) 1407#if !defined(RGB_BACKLIGHT_HS60) && !defined(RGB_BACKLIGHT_NK65) && !defined(RGB_BACKLIGHT_NEBULA65) && !defined(RGB_BACKLIGHT_NEBULA12)
1344// This is (F_CPU/1024) / 20 Hz 1408// This is (F_CPU/1024) / 20 Hz
1345// = 15625 Hz / 20 Hz 1409// = 15625 Hz / 20 Hz
1346// = 781 1410// = 781
@@ -1376,6 +1440,28 @@ void backlight_timer_disable(void)
1376{ 1440{
1377 TIMSK3 &= ~_BV(OCIE3A); 1441 TIMSK3 &= ~_BV(OCIE3A);
1378} 1442}
1443#elif defined(RGB_BACKLIGHT_NEBULA12) //STM32, use GPT with TIM3. Enable in halconf.h
1444static void gpt_backlight_timer_task(GPTDriver *gptp);
1445// Timer setup at 200Khz, callback at 10k ticks = 20Hz
1446static GPTConfig gpt3cfg1 = {
1447 .frequency = 200000U,
1448 .callback = gpt_backlight_timer_task
1449};
1450
1451void backlight_timer_init(void)
1452{
1453 gptStart(&GPTD3, &gpt3cfg1);
1454}
1455
1456void backlight_timer_enable(void)
1457{
1458 gptStartContinuous(&GPTD3, 10000);
1459}
1460
1461void backlight_timer_disable(void)
1462{
1463 gptStopTimer(&GPTD3);
1464}
1379#else //STM32, use GPT with TIM4. Enable in halconf.h 1465#else //STM32, use GPT with TIM4. Enable in halconf.h
1380static void gpt_backlight_timer_task(GPTDriver *gptp); 1466static void gpt_backlight_timer_task(GPTDriver *gptp);
1381// Timer setup at 200Khz, callback at 10k ticks = 20Hz 1467// Timer setup at 200Khz, callback at 10k ticks = 20Hz
@@ -1398,7 +1484,7 @@ void backlight_timer_disable(void)
1398{ 1484{
1399 gptStopTimer(&GPTD4); 1485 gptStopTimer(&GPTD4);
1400} 1486}
1401#endif //!defined(RGB_BACKLIGHT_HS60) && !defined(RGB_BACKLIGHT_NK65) 1487#endif //!defined(RGB_BACKLIGHT_HS60) && !defined(RGB_BACKLIGHT_NK65) && !defined(RGB_BACKLIGHT_NEBULA12)
1402 1488
1403void backlight_set_suspend_state(bool state) 1489void backlight_set_suspend_state(bool state)
1404{ 1490{
@@ -1635,7 +1721,7 @@ void backlight_effect_cycle_all(void)
1635 for ( int i=0; i<BACKLIGHT_LED_COUNT; i++ ) 1721 for ( int i=0; i<BACKLIGHT_LED_COUNT; i++ )
1636 { 1722 {
1637 uint16_t offset2 = g_key_hit[i]<<2; 1723 uint16_t offset2 = g_key_hit[i]<<2;
1638#if !defined(RGB_BACKLIGHT_HS60) && !defined(RGB_BACKLIGHT_NK65) && !defined(RGB_BACKLIGHT_DAWN60) && !defined(RGB_BACKLIGHT_NEBULA65) 1724#if !defined(RGB_BACKLIGHT_HS60) && !defined(RGB_BACKLIGHT_NK65) && !defined(RGB_BACKLIGHT_DAWN60) && !defined(RGB_BACKLIGHT_NEBULA65) && !defined(RGB_BACKLIGHT_NEBULA12)
1639 // stabilizer LEDs use spacebar hits 1725 // stabilizer LEDs use spacebar hits
1640 if ( i == 36+6 || i == 54+13 || // LC6, LD13 1726 if ( i == 36+6 || i == 54+13 || // LC6, LD13
1641 ( g_config.use_7u_spacebar && i == 54+14 ) ) // LD14 1727 ( g_config.use_7u_spacebar && i == 54+14 ) ) // LD14
@@ -1660,7 +1746,7 @@ void backlight_effect_cycle_left_right(void)
1660 for ( int i=0; i<BACKLIGHT_LED_COUNT; i++ ) 1746 for ( int i=0; i<BACKLIGHT_LED_COUNT; i++ )
1661 { 1747 {
1662 uint16_t offset2 = g_key_hit[i]<<2; 1748 uint16_t offset2 = g_key_hit[i]<<2;
1663#if !defined(RGB_BACKLIGHT_HS60) && !defined(RGB_BACKLIGHT_NK65) && !defined(RGB_BACKLIGHT_DAWN60) && !defined(RGB_BACKLIGHT_NEBULA65) 1749#if !defined(RGB_BACKLIGHT_HS60) && !defined(RGB_BACKLIGHT_NK65) && !defined(RGB_BACKLIGHT_DAWN60) && !defined(RGB_BACKLIGHT_NEBULA65) && !defined(RGB_BACKLIGHT_NEBULA12)
1664 // stabilizer LEDs use spacebar hits 1750 // stabilizer LEDs use spacebar hits
1665 if ( i == 36+6 || i == 54+13 || // LC6, LD13 1751 if ( i == 36+6 || i == 54+13 || // LC6, LD13
1666 ( g_config.use_7u_spacebar && i == 54+14 ) ) // LD14 1752 ( g_config.use_7u_spacebar && i == 54+14 ) ) // LD14
@@ -1687,7 +1773,7 @@ void backlight_effect_cycle_up_down(void)
1687 for ( int i=0; i<BACKLIGHT_LED_COUNT; i++ ) 1773 for ( int i=0; i<BACKLIGHT_LED_COUNT; i++ )
1688 { 1774 {
1689 uint16_t offset2 = g_key_hit[i]<<2; 1775 uint16_t offset2 = g_key_hit[i]<<2;
1690#if !defined(RGB_BACKLIGHT_HS60) && !defined(RGB_BACKLIGHT_NK65) && !defined(RGB_BACKLIGHT_DAWN60) && !defined(RGB_BACKLIGHT_NEBULA65) 1776#if !defined(RGB_BACKLIGHT_HS60) && !defined(RGB_BACKLIGHT_NK65) && !defined(RGB_BACKLIGHT_DAWN60) && !defined(RGB_BACKLIGHT_NEBULA65) && !defined(RGB_BACKLIGHT_NEBULA12)
1691 // stabilizer LEDs use spacebar hits 1777 // stabilizer LEDs use spacebar hits
1692 if ( i == 36+6 || i == 54+13 || // LC6, LD13 1778 if ( i == 36+6 || i == 54+13 || // LC6, LD13
1693 ( g_config.use_7u_spacebar && i == 54+14 ) ) // LD14 1779 ( g_config.use_7u_spacebar && i == 54+14 ) ) // LD14
@@ -1861,7 +1947,7 @@ void backlight_effect_indicators(void)
1861 } 1947 }
1862} 1948}
1863 1949
1864#if !defined(RGB_BACKLIGHT_HS60) && !defined(RGB_BACKLIGHT_NK65) && !defined(RGB_BACKLIGHT_NEBULA65) 1950#if !defined(RGB_BACKLIGHT_HS60) && !defined(RGB_BACKLIGHT_NK65) && !defined(RGB_BACKLIGHT_NEBULA65) && !defined(RGB_BACKLIGHT_NEBULA12)
1865ISR(TIMER3_COMPA_vect) 1951ISR(TIMER3_COMPA_vect)
1866#else //STM32 interrupt 1952#else //STM32 interrupt
1867static void gpt_backlight_timer_task(GPTDriver *gptp) 1953static void gpt_backlight_timer_task(GPTDriver *gptp)
@@ -2374,8 +2460,9 @@ void backlight_init_drivers(void)
2374 IS31FL3733_update_led_control_registers( ISSI_ADDR_2, 1 ); 2460 IS31FL3733_update_led_control_registers( ISSI_ADDR_2, 1 );
2375#else 2461#else
2376 IS31FL3731_init( ISSI_ADDR_1 ); 2462 IS31FL3731_init( ISSI_ADDR_1 );
2463#if !defined(RGB_BACKLIGHT_NEBULA12)
2377 IS31FL3731_init( ISSI_ADDR_2 ); 2464 IS31FL3731_init( ISSI_ADDR_2 );
2378 2465#endif
2379#if defined(RGB_BACKLIGHT_U80_A) 2466#if defined(RGB_BACKLIGHT_U80_A)
2380 IS31FL3731_init( ISSI_ADDR_3 ); 2467 IS31FL3731_init( ISSI_ADDR_3 );
2381#endif 2468#endif
@@ -2461,13 +2548,17 @@ void backlight_init_drivers(void)
2461 bool enabled = !( ( index == 15+7 && !g_config.use_split_backspace ) || //other backspace 2548 bool enabled = !( ( index == 15+7 && !g_config.use_split_backspace ) || //other backspace
2462 ( index == 47+13 && g_config.use_7u_spacebar ) || //LD13 2549 ( index == 47+13 && g_config.use_7u_spacebar ) || //LD13
2463 ( index == 47+15 && g_config.use_7u_spacebar ) ); //LD15 2550 ( index == 47+15 && g_config.use_7u_spacebar ) ); //LD15
2551#elif defined(RGB_BACKLIGHT_NEBULA12)
2552 bool enabled = !( ( index >= 9-1 && index <= 12-1 ) ); // A9-A12
2464#endif 2553#endif
2465 // This only caches it for later 2554 // This only caches it for later
2466 IS31FL3731_set_led_control_register( index, enabled, enabled, enabled ); 2555 IS31FL3731_set_led_control_register( index, enabled, enabled, enabled );
2467 } 2556 }
2468 // This actually updates the LED drivers 2557 // This actually updates the LED drivers
2469 IS31FL3731_update_led_control_registers( ISSI_ADDR_1, 0 ); 2558 IS31FL3731_update_led_control_registers( ISSI_ADDR_1, 0 );
2559#if !defined(RGB_BACKLIGHT_NEBULA12)
2470 IS31FL3731_update_led_control_registers( ISSI_ADDR_2, 1 ); 2560 IS31FL3731_update_led_control_registers( ISSI_ADDR_2, 1 );
2561#endif
2471#if defined(RGB_BACKLIGHT_U80_A) 2562#if defined(RGB_BACKLIGHT_U80_A)
2472 IS31FL3731_update_led_control_registers( ISSI_ADDR_3, 2 ); 2563 IS31FL3731_update_led_control_registers( ISSI_ADDR_3, 2 );
2473#endif 2564#endif
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