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authoryulei <yuleiz@gmail.com>2021-11-05 10:54:40 +0800
committerGitHub <noreply@github.com>2021-11-05 13:54:40 +1100
commit3f62b46939dbd2dd04d5d8c7b7ad53323f832332 (patch)
tree50e2c93b3951401b395c6ba19aabf1c162f91195
parent2ac2695cb5fac5402e9a9834c55dce9d34ed0da5 (diff)
downloadqmk_firmware-3f62b46939dbd2dd04d5d8c7b7ad53323f832332.tar.gz
qmk_firmware-3f62b46939dbd2dd04d5d8c7b7ad53323f832332.zip
add matrix abelx keyboard (#10968)
* add matrix abelx keyboard * Update keyboards/matrix/abelx/abelx.c Co-authored-by: Drashna Jaelre <drashna@live.com> * fixed rgb led pin issue * Apply suggestions from code review Co-authored-by: James Young <18669334+noroadsleft@users.noreply.github.com> * Update keyboards/matrix/abelx/aw9523b.h Co-authored-by: James Young <18669334+noroadsleft@users.noreply.github.com> * Update keyboards/matrix/abelx/aw9523b.c Co-authored-by: James Young <18669334+noroadsleft@users.noreply.github.com> * Update keyboards/matrix/abelx/abelx.h Co-authored-by: James Young <18669334+noroadsleft@users.noreply.github.com> * Update keyboards/matrix/abelx/abelx.c Co-authored-by: James Young <18669334+noroadsleft@users.noreply.github.com> * fixed board name * Apply suggestions from code review Co-authored-by: Nick Brassel <nick@tzarc.org> * move led update from scan_kb to hoursekeeping_kb * move led update from scan_kb to housekeeping_kb Co-authored-by: Drashna Jaelre <drashna@live.com> Co-authored-by: James Young <18669334+noroadsleft@users.noreply.github.com> Co-authored-by: Nick Brassel <nick@tzarc.org>
Diffstat
-rw-r--r--keyboards/matrix/abelx/abelx.c99
-rw-r--r--keyboards/matrix/abelx/abelx.h61
-rw-r--r--keyboards/matrix/abelx/aw9523b.c100
-rw-r--r--keyboards/matrix/abelx/aw9523b.h62
-rw-r--r--keyboards/matrix/abelx/boards/abelx_bd/board.c268
-rw-r--r--keyboards/matrix/abelx/boards/abelx_bd/board.h1299
-rw-r--r--keyboards/matrix/abelx/boards/abelx_bd/board.mk9
-rw-r--r--keyboards/matrix/abelx/bootloader_defs.h7
-rw-r--r--keyboards/matrix/abelx/chconf.h714
-rw-r--r--keyboards/matrix/abelx/config.h108
-rw-r--r--keyboards/matrix/abelx/halconf.h525
-rw-r--r--keyboards/matrix/abelx/info.json15
-rw-r--r--keyboards/matrix/abelx/keymaps/default/keymap.c41
-rw-r--r--keyboards/matrix/abelx/keymaps/iso/keymap.c39
-rw-r--r--keyboards/matrix/abelx/ld/abelx_boot.ld85
-rw-r--r--keyboards/matrix/abelx/matrix.c108
-rw-r--r--keyboards/matrix/abelx/mcuconf.h253
-rw-r--r--keyboards/matrix/abelx/readme.md11
-rw-r--r--keyboards/matrix/abelx/rules.mk57
-rw-r--r--keyboards/matrix/abelx/tca6424.c117
-rw-r--r--keyboards/matrix/abelx/tca6424.h42
21 files changed, 4020 insertions, 0 deletions
diff --git a/keyboards/matrix/abelx/abelx.c b/keyboards/matrix/abelx/abelx.c
new file mode 100644
index 000000000..77e749ee4
--- /dev/null
+++ b/keyboards/matrix/abelx/abelx.c
@@ -0,0 +1,99 @@
1/**
2 * abelx.c
3 *
4 * Copyright 2020 astro <yuleiz@gmail.com>
5 *
6 * This program is free software: you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License as published by
8 * the Free Software Foundation, either version 2 of the License, or
9 * (at your option) any later version.
10 *
11 * This program is distributed in the hope that it will be useful,
12 * but WITHOUT ANY WARRANTY; without even the implied warranty of
13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 * GNU General Public License for more details.
15 *
16 * You should have received a copy of the GNU General Public License
17 * along with this program. If not, see <http://www.gnu.org/licenses/>.
18 */
19
20#include "abelx.h"
21#include "tca6424.h"
22#include "aw9523b.h"
23
24void set_pin(uint16_t pin)
25{
26 uint8_t data = tca6424_read_port(GET_PORT(pin));
27 data |= ( 1 << GET_PIN(pin));
28 tca6424_write_port(GET_PORT(pin), data);
29}
30
31void clear_pin(uint16_t pin)
32{
33 uint8_t data = tca6424_read_port(GET_PORT(pin));
34 data &= ~( 1 << GET_PIN(pin));
35 tca6424_write_port(GET_PORT(pin), data);
36}
37
38uint8_t read_pin(uint16_t pin)
39{
40 uint8_t data = tca6424_read_port(GET_PORT(pin));
41 return (data & (1<<GET_PIN(pin))) ? 1 : 0;
42}
43
44void matrix_init_kb(void) {
45#ifdef RGBLIGHT_ENABLE
46 aw9523b_init(AW9523B_ADDR);
47#endif
48 matrix_init_user();
49}
50
51
52void housekeeping_task_kb(void) {
53#ifdef RGBLIGHT_ENABLE
54 aw9523b_update_pwm_buffers(AW9523B_ADDR);
55#endif
56}
57
58#ifdef RGBLIGHT_ENABLE
59#include "rgblight.h"
60#include "i2c_master.h"
61
62const aw9523b_led g_aw9523b_leds[AW9523B_RGB_NUM] = {
63 {AW9523B_P12_PWM, AW9523B_P11_PWM, AW9523B_P10_PWM},
64 {AW9523B_P01_PWM, AW9523B_P00_PWM, AW9523B_P13_PWM},
65 {AW9523B_P04_PWM, AW9523B_P03_PWM, AW9523B_P02_PWM},
66 {AW9523B_P07_PWM, AW9523B_P06_PWM, AW9523B_P05_PWM},
67};
68
69void rgblight_call_driver(LED_TYPE *start_led, uint8_t num_leds)
70{
71 uint8_t num = num_leds < AW9523B_RGB_NUM ? num_leds : AW9523B_RGB_NUM;
72
73 ws2812_setleds(start_led, num);
74
75 for (int i = 0; i < num; i++) {
76 aw9523b_set_color(i, start_led[i].r, start_led[i].g, start_led[i].b);
77 }
78}
79
80#endif
81
82static uint16_t caps_lock_pin = DEF_PIN(TCA6424_PORT2, 3);
83static uint16_t scroll_lock_pin = DEF_PIN(TCA6424_PORT0, 0);
84
85bool led_update_kb(led_t led_state) {
86 bool res = led_update_user(led_state);
87 if (res) {
88 led_state.caps_lock ? set_pin(caps_lock_pin) : clear_pin(caps_lock_pin);
89 led_state.scroll_lock ? set_pin(scroll_lock_pin) : clear_pin(scroll_lock_pin);
90 }
91 return res;
92}
93
94#define REBOOT_MAGIC 0x41544B42
95void shutdown_user(void)
96{
97 // set the magic number for resetting to the bootloader
98 *(uint32_t *)(&(RTCD1.rtc->BKP0R)) = REBOOT_MAGIC;
99}
diff --git a/keyboards/matrix/abelx/abelx.h b/keyboards/matrix/abelx/abelx.h
new file mode 100644
index 000000000..b5a1cc7aa
--- /dev/null
+++ b/keyboards/matrix/abelx/abelx.h
@@ -0,0 +1,61 @@
1/**
2 * abelx.h
3 *
4 * Copyright 2020 astro <yuleiz@gmail.com>
5 *
6 * This program is free software: you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License as published by
8 * the Free Software Foundation, either version 2 of the License, or
9 * (at your option) any later version.
10 *
11 * This program is distributed in the hope that it will be useful,
12 * but WITHOUT ANY WARRANTY; without even the implied warranty of
13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 * GNU General Public License for more details.
15 *
16 * You should have received a copy of the GNU General Public License
17 * along with this program. If not, see <http://www.gnu.org/licenses/>.
18 */
19
20#pragma once
21
22#include "quantum.h"
23
24
25#define LAYOUT_tkl_iso( \
26 K000, K001, K002, K003, K004, K005, K006, K007, K008, K009, K010, K011, K012, K013, K014, K015, \
27 \
28 K100, K101, K102, K103, K104, K105, K106, K107, K108, K109, K110, K111, K112, K113, K114, K115, K116, \
29 K200, K201, K202, K203, K204, K205, K206, K207, K208, K209, K210, K211, K212, K214, K215, K216, \
30 K300, K301, K302, K303, K304, K305, K306, K307, K308, K309, K310, K311, K312, K313, \
31 K400, K401, K402, K403, K404, K405, K406, K407, K408, K409, K410, K411, K412, K413, \
32 K500, K501, K502, K506, K509, K510, K511, K512, K513, K514, K515\
33) { \
34 { K000, K001, K002, K003, K004, K005, K006, K007, K008, K009, K010, K011, K012, K013, K014, K015}, \
35 { K100, K101, K102, K103, K104, K105, K106, K107, K108, K109, K110, K111, K112, K113, K114, K115}, \
36 { K200, K201, K202, K203, K204, K205, K206, K207, K208, K209, K210, K211, K212, KC_NO, K214, K116}, \
37 { K300, K301, K302, K303, K304, K305, K306, K307, K308, K309, K310, K311, K312, K313, K215, K216}, \
38 { K400, K401, K402, K403, K404, K405, K406, K407, K408, K409, K410, K411, K412, KC_NO, K413,KC_NO}, \
39 { K500, K501, K502, KC_NO, KC_NO, KC_NO, K506, K509, K510, K511, K512, K513, K514, KC_NO, K515,KC_NO}, \
40}
41
42#define LAYOUT_tkl_ansi( \
43 K000, K001, K002, K003, K004, K005, K006, K007, K008, K009, K010, K011, K012, K013, K014, K015, \
44 \
45 K100, K101, K102, K103, K104, K105, K106, K107, K108, K109, K110, K111, K112, K113, K114, K115, K116, \
46 K200, K201, K202, K203, K204, K205, K206, K207, K208, K209, K210, K211, K212, K213, K214, K215, K216, \
47 K300, K301, K302, K303, K304, K305, K306, K307, K308, K309, K310, K311, K313, \
48 K400, K402, K403, K404, K405, K406, K407, K408, K409, K410, K411, K412, K413, \
49 K500, K501, K502, K506, K509, K510, K511, K512, K513, K514, K515\
50) { \
51 { K000, K001, K002, K003, K004, K005, K006, K007, K008, K009, K010, K011, K012, K013, K014, K015}, \
52 { K100, K101, K102, K103, K104, K105, K106, K107, K108, K109, K110, K111, K112, K113, K114, K115}, \
53 { K200, K201, K202, K203, K204, K205, K206, K207, K208, K209, K210, K211, K212, K213, K214, K116}, \
54 { K300, K301, K302, K303, K304, K305, K306, K307, K308, K309, K310, K311, KC_NO, K313, K215, K216}, \
55 { K400, KC_NO, K402, K403, K404, K405, K406, K407, K408, K409, K410, K411, K412, KC_NO, K413,KC_NO}, \
56 { K500, K501, K502, KC_NO, KC_NO, KC_NO, K506, K509, K510, K511, K512, K513, K514, KC_NO, K515,KC_NO}, \
57}
58
59void set_pin(uint16_t pin);
60void clear_pin(uint16_t pin);
61uint8_t read_pin(uint16_t pin);
diff --git a/keyboards/matrix/abelx/aw9523b.c b/keyboards/matrix/abelx/aw9523b.c
new file mode 100644
index 000000000..8c6e8eacc
--- /dev/null
+++ b/keyboards/matrix/abelx/aw9523b.c
@@ -0,0 +1,100 @@
1/**
2 * @file aw9523b.c
3 * @brief driver implementation of aw9523b
4 *
5 * Copyright 2020 astro <yuleiz@gmail.com>
6 *
7 * This program is free software: you can redistribute it and/or modify
8 * it under the terms of the GNU General Public License as published by
9 * the Free Software Foundation, either version 2 of the License, or
10 * (at your option) any later version.
11 *
12 * This program is distributed in the hope that it will be useful,
13 * but WITHOUT ANY WARRANTY; without even the implied warranty of
14 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15 * GNU General Public License for more details.
16 *
17 * You should have received a copy of the GNU General Public License
18 * along with this program. If not, see <http://www.gnu.org/licenses/>.
19 */
20
21#include <stdbool.h>
22#include "aw9523b.h"
23#include "wait.h"
24#include "i2c_master.h"
25
26#define AW9523B_P0_INPUT 0x00
27#define AW9523B_P1_INPUT 0x01
28#define AW9523B_P0_OUTPUT 0x02
29#define AW9523B_P1_OUTPUT 0x03
30#define AW9523B_P0_CONF 0x04
31#define AW9523B_P1_CONF 0x05
32#define AW9523B_P0_INT 0x06
33#define AW9523B_P1_INT 0x07
34
35#define AW9523B_ID 0x10
36#define AW9523B_CTL 0x11
37#define AW9523B_P0_LED 0x12
38#define AW9523B_P1_LED 0x13
39
40
41#define AW9523B_RESET 0x7F
42
43#define TIMEOUT 100
44
45#define PWM2BUF(x) ((x) - AW9523B_PWM_BASE)
46static uint8_t aw9523b_pwm_buf[AW9523B_PWM_SIZE];
47static bool aw9523b_pwm_dirty = false;
48
49void aw9523b_init(uint8_t addr)
50{
51 i2c_init();
52 // reset chip
53 uint8_t data = 0;
54 i2c_writeReg(addr, AW9523B_RESET, &data, 1, TIMEOUT);
55 wait_ms(1);
56 // set max led current
57 data = 0x03; // 37mA/4
58 i2c_writeReg(addr, AW9523B_CTL, &data, 1, TIMEOUT);
59 // set port to led mode
60 data = 0;
61 i2c_writeReg(addr, AW9523B_P0_LED, &data, 1, TIMEOUT);
62 i2c_writeReg(addr, AW9523B_P1_LED, &data, 1, TIMEOUT);
63 // clear pwm buff
64 for (uint8_t i = 0; i < 16; i++) {
65 aw9523b_pwm_buf[i] = 0;
66 }
67 aw9523b_pwm_dirty = false;
68}
69
70void aw9523b_set_color(int index, uint8_t red, uint8_t green, uint8_t blue)
71{
72 if (index >= AW9523B_RGB_NUM) return;
73
74 aw9523b_led led = g_aw9523b_leds[index];
75 aw9523b_pwm_buf[PWM2BUF(led.r)] = red;
76 aw9523b_pwm_buf[PWM2BUF(led.g)] = green;
77 aw9523b_pwm_buf[PWM2BUF(led.b)] = blue;
78 aw9523b_pwm_dirty = true;
79}
80
81void aw9523b_set_color_all(uint8_t red, uint8_t green, uint8_t blue)
82{
83 for (uint8_t i = 0; i < AW9523B_RGB_NUM; i++) {
84 aw9523b_set_color(i, red, green, blue);
85 }
86 aw9523b_pwm_dirty = true;
87}
88
89void aw9523b_update_pwm_buffers(uint8_t addr)
90{
91 if (aw9523b_pwm_dirty) {
92 for (uint8_t i = 0; i < AW9523B_RGB_NUM; i++){
93 aw9523b_led led = g_aw9523b_leds[i];
94 i2c_writeReg(addr, led.r, &aw9523b_pwm_buf[PWM2BUF(led.r)], 1, TIMEOUT);
95 i2c_writeReg(addr, led.g, &aw9523b_pwm_buf[PWM2BUF(led.g)], 1, TIMEOUT);
96 i2c_writeReg(addr, led.b, &aw9523b_pwm_buf[PWM2BUF(led.b)], 1, TIMEOUT);
97 }
98 aw9523b_pwm_dirty = false;
99 }
100}
diff --git a/keyboards/matrix/abelx/aw9523b.h b/keyboards/matrix/abelx/aw9523b.h
new file mode 100644
index 000000000..daee0c855
--- /dev/null
+++ b/keyboards/matrix/abelx/aw9523b.h
@@ -0,0 +1,62 @@
1/**
2 * @file aw9523b.h
3 * @brief driver for aw9523b
4 *
5 * Copyright 2020 astro <yuleiz@gmail.com>
6 *
7 * This program is free software: you can redistribute it and/or modify
8 * it under the terms of the GNU General Public License as published by
9 * the Free Software Foundation, either version 2 of the License, or
10 * (at your option) any later version.
11 *
12 * This program is distributed in the hope that it will be useful,
13 * but WITHOUT ANY WARRANTY; without even the implied warranty of
14 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15 * GNU General Public License for more details.
16 *
17 * You should have received a copy of the GNU General Public License
18 * along with this program. If not, see <http://www.gnu.org/licenses/>.
19 */
20
21#pragma once
22
23#include <stdint.h>
24
25#ifndef AW9523B_ADDR
26 #define AW9523B_ADDR 0xB6
27#endif
28
29#define AW9523B_PWM_BASE 0x20
30
31#define AW9523B_P10_PWM 0x20
32#define AW9523B_P11_PWM 0x21
33#define AW9523B_P12_PWM 0x22
34#define AW9523B_P13_PWM 0x23
35#define AW9523B_P00_PWM 0x24
36#define AW9523B_P01_PWM 0x25
37#define AW9523B_P02_PWM 0x26
38#define AW9523B_P03_PWM 0x27
39#define AW9523B_P04_PWM 0x28
40#define AW9523B_P05_PWM 0x29
41#define AW9523B_P06_PWM 0x2A
42#define AW9523B_P07_PWM 0x2B
43#define AW9523B_P14_PWM 0x2C
44#define AW9523B_P15_PWM 0x2D
45#define AW9523B_P16_PWM 0x2E
46#define AW9523B_P17_PWM 0x2F
47
48#define AW9523B_PWM_SIZE 16
49
50typedef struct {
51 uint8_t r;
52 uint8_t g;
53 uint8_t b;
54} aw9523b_led;
55
56extern const aw9523b_led g_aw9523b_leds[AW9523B_RGB_NUM];
57
58void aw9523b_init(uint8_t addr);
59
60void aw9523b_set_color(int index, uint8_t red, uint8_t green, uint8_t blue);
61void aw9523b_set_color_all(uint8_t red, uint8_t green, uint8_t blue);
62void aw9523b_update_pwm_buffers(uint8_t addr);
diff --git a/keyboards/matrix/abelx/boards/abelx_bd/board.c b/keyboards/matrix/abelx/boards/abelx_bd/board.c
new file mode 100644
index 000000000..68cf23cdd
--- /dev/null
+++ b/keyboards/matrix/abelx/boards/abelx_bd/board.c
@@ -0,0 +1,268 @@
1/*
2 ChibiOS - Copyright (C) 2006..2018 Giovanni Di Sirio
3
4 Licensed under the Apache License, Version 2.0 (the "License");
5 you may not use this file except in compliance with the License.
6 You may obtain a copy of the License at
7
8 http://www.apache.org/licenses/LICENSE-2.0
9
10 Unless required by applicable law or agreed to in writing, software
11 distributed under the License is distributed on an "AS IS" BASIS,
12 WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
13 See the License for the specific language governing permissions and
14 limitations under the License.
15*/
16
17/*
18 * This file has been automatically generated using ChibiStudio board
19 * generator plugin. Do not edit manually.
20 */
21
22#include "hal.h"
23#include "stm32_gpio.h"
24
25/*===========================================================================*/
26/* Driver local definitions. */
27/*===========================================================================*/
28
29/*===========================================================================*/
30/* Driver exported variables. */
31/*===========================================================================*/
32
33/*===========================================================================*/
34/* Driver local variables and types. */
35/*===========================================================================*/
36
37/**
38 * @brief Type of STM32 GPIO port setup.
39 */
40typedef struct {
41 uint32_t moder;
42 uint32_t otyper;
43 uint32_t ospeedr;
44 uint32_t pupdr;
45 uint32_t odr;
46 uint32_t afrl;
47 uint32_t afrh;
48} gpio_setup_t;
49
50/**
51 * @brief Type of STM32 GPIO initialization data.
52 */
53typedef struct {
54#if STM32_HAS_GPIOA || defined(__DOXYGEN__)
55 gpio_setup_t PAData;
56#endif
57#if STM32_HAS_GPIOB || defined(__DOXYGEN__)
58 gpio_setup_t PBData;
59#endif
60#if STM32_HAS_GPIOC || defined(__DOXYGEN__)
61 gpio_setup_t PCData;
62#endif
63#if STM32_HAS_GPIOD || defined(__DOXYGEN__)
64 gpio_setup_t PDData;
65#endif
66#if STM32_HAS_GPIOE || defined(__DOXYGEN__)
67 gpio_setup_t PEData;
68#endif
69#if STM32_HAS_GPIOF || defined(__DOXYGEN__)
70 gpio_setup_t PFData;
71#endif
72#if STM32_HAS_GPIOG || defined(__DOXYGEN__)
73 gpio_setup_t PGData;
74#endif
75#if STM32_HAS_GPIOH || defined(__DOXYGEN__)
76 gpio_setup_t PHData;
77#endif
78#if STM32_HAS_GPIOI || defined(__DOXYGEN__)
79 gpio_setup_t PIData;
80#endif
81#if STM32_HAS_GPIOJ || defined(__DOXYGEN__)
82 gpio_setup_t PJData;
83#endif
84#if STM32_HAS_GPIOK || defined(__DOXYGEN__)
85 gpio_setup_t PKData;
86#endif
87} gpio_config_t;
88
89/**
90 * @brief STM32 GPIO static initialization data.
91 */
92static const gpio_config_t gpio_default_config = {
93#if STM32_HAS_GPIOA
94 {VAL_GPIOA_MODER, VAL_GPIOA_OTYPER, VAL_GPIOA_OSPEEDR, VAL_GPIOA_PUPDR,
95 VAL_GPIOA_ODR, VAL_GPIOA_AFRL, VAL_GPIOA_AFRH},
96#endif
97#if STM32_HAS_GPIOB
98 {VAL_GPIOB_MODER, VAL_GPIOB_OTYPER, VAL_GPIOB_OSPEEDR, VAL_GPIOB_PUPDR,
99 VAL_GPIOB_ODR, VAL_GPIOB_AFRL, VAL_GPIOB_AFRH},
100#endif
101#if STM32_HAS_GPIOC
102 {VAL_GPIOC_MODER, VAL_GPIOC_OTYPER, VAL_GPIOC_OSPEEDR, VAL_GPIOC_PUPDR,
103 VAL_GPIOC_ODR, VAL_GPIOC_AFRL, VAL_GPIOC_AFRH},
104#endif
105#if STM32_HAS_GPIOD
106 {VAL_GPIOD_MODER, VAL_GPIOD_OTYPER, VAL_GPIOD_OSPEEDR, VAL_GPIOD_PUPDR,
107 VAL_GPIOD_ODR, VAL_GPIOD_AFRL, VAL_GPIOD_AFRH},
108#endif
109#if STM32_HAS_GPIOE
110 {VAL_GPIOE_MODER, VAL_GPIOE_OTYPER, VAL_GPIOE_OSPEEDR, VAL_GPIOE_PUPDR,
111 VAL_GPIOE_ODR, VAL_GPIOE_AFRL, VAL_GPIOE_AFRH},
112#endif
113#if STM32_HAS_GPIOF
114 {VAL_GPIOF_MODER, VAL_GPIOF_OTYPER, VAL_GPIOF_OSPEEDR, VAL_GPIOF_PUPDR,
115 VAL_GPIOF_ODR, VAL_GPIOF_AFRL, VAL_GPIOF_AFRH},
116#endif
117#if STM32_HAS_GPIOG
118 {VAL_GPIOG_MODER, VAL_GPIOG_OTYPER, VAL_GPIOG_OSPEEDR, VAL_GPIOG_PUPDR,
119 VAL_GPIOG_ODR, VAL_GPIOG_AFRL, VAL_GPIOG_AFRH},
120#endif
121#if STM32_HAS_GPIOH
122 {VAL_GPIOH_MODER, VAL_GPIOH_OTYPER, VAL_GPIOH_OSPEEDR, VAL_GPIOH_PUPDR,
123 VAL_GPIOH_ODR, VAL_GPIOH_AFRL, VAL_GPIOH_AFRH},
124#endif
125#if STM32_HAS_GPIOI
126 {VAL_GPIOI_MODER, VAL_GPIOI_OTYPER, VAL_GPIOI_OSPEEDR, VAL_GPIOI_PUPDR,
127 VAL_GPIOI_ODR, VAL_GPIOI_AFRL, VAL_GPIOI_AFRH},
128#endif
129#if STM32_HAS_GPIOJ
130 {VAL_GPIOJ_MODER, VAL_GPIOJ_OTYPER, VAL_GPIOJ_OSPEEDR, VAL_GPIOJ_PUPDR,
131 VAL_GPIOJ_ODR, VAL_GPIOJ_AFRL, VAL_GPIOJ_AFRH},
132#endif
133#if STM32_HAS_GPIOK
134 {VAL_GPIOK_MODER, VAL_GPIOK_OTYPER, VAL_GPIOK_OSPEEDR, VAL_GPIOK_PUPDR,
135 VAL_GPIOK_ODR, VAL_GPIOK_AFRL, VAL_GPIOK_AFRH}
136#endif
137};
138
139/*===========================================================================*/
140/* Driver local functions. */
141/*===========================================================================*/
142
143static void gpio_init(stm32_gpio_t *gpiop, const gpio_setup_t *config) {
144
145 gpiop->OTYPER = config->otyper;
146 gpiop->OSPEEDR = config->ospeedr;
147 gpiop->PUPDR = config->pupdr;
148 gpiop->ODR = config->odr;
149 gpiop->AFRL = config->afrl;
150 gpiop->AFRH = config->afrh;
151 gpiop->MODER = config->moder;
152}
153
154static void stm32_gpio_init(void) {
155
156 /* Enabling GPIO-related clocks, the mask comes from the
157 registry header file.*/
158 rccResetAHB1(STM32_GPIO_EN_MASK);
159 rccEnableAHB1(STM32_GPIO_EN_MASK, true);
160
161 /* Initializing all the defined GPIO ports.*/
162#if STM32_HAS_GPIOA
163 gpio_init(GPIOA, &gpio_default_config.PAData);
164#endif
165#if STM32_HAS_GPIOB
166 gpio_init(GPIOB, &gpio_default_config.PBData);
167#endif
168#if STM32_HAS_GPIOC
169 gpio_init(GPIOC, &gpio_default_config.PCData);
170#endif
171#if STM32_HAS_GPIOD
172 gpio_init(GPIOD, &gpio_default_config.PDData);
173#endif
174#if STM32_HAS_GPIOE
175 gpio_init(GPIOE, &gpio_default_config.PEData);
176#endif
177#if STM32_HAS_GPIOF
178 gpio_init(GPIOF, &gpio_default_config.PFData);
179#endif
180#if STM32_HAS_GPIOG
181 gpio_init(GPIOG, &gpio_default_config.PGData);
182#endif
183#if STM32_HAS_GPIOH
184 gpio_init(GPIOH, &gpio_default_config.PHData);
185#endif
186#if STM32_HAS_GPIOI
187 gpio_init(GPIOI, &gpio_default_config.PIData);
188#endif
189#if STM32_HAS_GPIOJ
190 gpio_init(GPIOJ, &gpio_default_config.PJData);
191#endif
192#if STM32_HAS_GPIOK
193 gpio_init(GPIOK, &gpio_default_config.PKData);
194#endif
195}
196
197/*===========================================================================*/
198/* Driver interrupt handlers. */
199/*===========================================================================*/
200
201/*===========================================================================*/
202/* Driver exported functions. */
203/*===========================================================================*/
204
205/**
206 * @brief Early initialization code.
207 * @details GPIO ports and system clocks are initialized before everything
208 * else.
209 */
210void __early_init(void) {
211 extern void enter_bootloader_mode_if_requested(void);
212 enter_bootloader_mode_if_requested();
213
214 stm32_gpio_init();
215 stm32_clock_init();
216}
217
218#if HAL_USE_SDC || defined(__DOXYGEN__)
219/**
220 * @brief SDC card detection.
221 */
222bool sdc_lld_is_card_inserted(SDCDriver *sdcp) {
223
224 (void)sdcp;
225 /* TODO: Fill the implementation.*/
226 return true;
227}
228
229/**
230 * @brief SDC card write protection detection.
231 */
232bool sdc_lld_is_write_protected(SDCDriver *sdcp) {
233
234 (void)sdcp;
235 /* TODO: Fill the implementation.*/
236 return false;
237}
238#endif /* HAL_USE_SDC */
239
240#if HAL_USE_MMC_SPI || defined(__DOXYGEN__)
241/**
242 * @brief MMC_SPI card detection.
243 */
244bool mmc_lld_is_card_inserted(MMCDriver *mmcp) {
245
246 (void)mmcp;
247 /* TODO: Fill the implementation.*/
248 return true;
249}
250
251/**
252 * @brief MMC_SPI card write protection detection.
253 */
254bool mmc_lld_is_write_protected(MMCDriver *mmcp) {
255
256 (void)mmcp;
257 /* TODO: Fill the implementation.*/
258 return false;
259}
260#endif
261
262/**
263 * @brief Board-specific initialization code.
264 * @todo Add your board-specific code, if any.
265 */
266void boardInit(void) {
267
268}
diff --git a/keyboards/matrix/abelx/boards/abelx_bd/board.h b/keyboards/matrix/abelx/boards/abelx_bd/board.h
new file mode 100644
index 000000000..e57147fab
--- /dev/null
+++ b/keyboards/matrix/abelx/boards/abelx_bd/board.h
@@ -0,0 +1,1299 @@
1/*
2 ChibiOS - Copyright (C) 2006..2016 Giovanni Di Sirio
3
4 Licensed under the Apache License, Version 2.0 (the "License");
5 you may not use this file except in compliance with the License.
6 You may obtain a copy of the License at
7
8 http://www.apache.org/licenses/LICENSE-2.0
9
10 Unless required by applicable law or agreed to in writing, software
11 distributed under the License is distributed on an "AS IS" BASIS,
12 WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
13 See the License for the specific language governing permissions and
14 limitations under the License.
15*/
16
17/*
18 * This file has been automatically generated using ChibiStudio board
19 * generator plugin. Do not edit manually.
20 */
21
22#ifndef BOARD_H
23#define BOARD_H
24
25/*
26 * Board identifier.
27 */
28#define BOARD_MATRIX_ABELX
29#define BOARD_NAME "Matrix ABELX keyboard"
30#define BOARD_OTG_NOVBUSSENS
31
32/*
33 * Board oscillators-related settings.
34 * NOTE: LSE not fitted.
35 */
36#if !defined(STM32_LSECLK)
37#define STM32_LSECLK 0U
38#endif
39
40#if !defined(STM32_HSECLK)
41#define STM32_HSECLK 8000000U
42#endif
43
44//#define STM32_HSE_BYPASS
45
46/*
47 * Board voltages.
48 * Required for performance limits calculation.
49 */
50#define STM32_VDD 300U
51
52/*
53 * MCU type as defined in the ST header.
54 */
55#define STM32F411xE
56
57/*
58 * IO pins assignments.
59 */
60#define GPIOA_PIN0 0U
61#define GPIOA_PIN1 1U
62#define GPIOA_PIN2 2U
63#define GPIOA_PIN3 3U
64#define GPIOA_PIN4 4U
65#define GPIOA_SCK 5U
66#define GPIOA_MISO 6U
67#define GPIOA_MOSI 7U
68#define GPIOA_PIN8 8U
69#define GPIOA_PIN9 9U
70#define GPIOA_PIN10 10U
71#define GPIOA_OTG_FS_DM 11U
72#define GPIOA_OTG_FS_DP 12U
73#define GPIOA_SWDIO 13U
74#define GPIOA_SWCLK 14U
75#define GPIOA_PIN15 15U
76
77#define GPIOB_PIN0 0U
78#define GPIOB_PIN1 1U
79#define GPIOB_PIN2 2U
80#define GPIOB_SWO 3U
81#define GPIOB_PIN4 4U
82#define GPIOB_PIN5 5U
83#define GPIOB_UART_TX 6U
84#define GPIOB_UART_RX 7U
85#define GPIOB_PIN8 8U
86#define GPIOB_PIN9 9U
87#define GPIOB_PIN10 10U
88#define GPIOB_PIN11 11U
89#define GPIOB_PIN12 12U
90#define GPIOB_PIN13 13U
91#define GPIOB_PIN14 14U
92#define GPIOB_PIN15 15U
93
94#define GPIOC_PIN0 0U
95#define GPIOC_PIN1 1U
96#define GPIOC_PIN2 2U
97#define GPIOC_PIN3 3U
98#define GPIOC_PIN4 4U
99#define GPIOC_PIN5 5U
100#define GPIOC_PIN6 6U
101#define GPIOC_PIN7 7U
102#define GPIOC_PIN8 8U
103#define GPIOC_PIN9 9U
104#define GPIOC_PIN10 10U
105#define GPIOC_PIN11 11U
106#define GPIOC_PIN12 12U
107#define GPIOC_PIN13 13U
108#define GPIOC_PIN14 14U
109#define GPIOC_PIN15 15U
110
111#define GPIOD_PIN0 0U
112#define GPIOD_PIN1 1U
113#define GPIOD_PIN2 2U
114#define GPIOD_PIN3 3U
115#define GPIOD_PIN4 4U
116#define GPIOD_PIN5 5U
117#define GPIOD_PIN6 6U
118#define GPIOD_PIN7 7U
119#define GPIOD_PIN8 8U
120#define GPIOD_PIN9 9U
121#define GPIOD_PIN10 10U
122#define GPIOD_PIN11 11U
123#define GPIOD_PIN12 12U
124#define GPIOD_PIN13 13U
125#define GPIOD_PIN14 14U
126#define GPIOD_PIN15 15U
127
128#define GPIOE_PIN0 0U
129#define GPIOE_PIN1 1U
130#define GPIOE_PIN2 2U
131#define GPIOE_PIN3 3U
132#define GPIOE_PIN4 4U
133#define GPIOE_PIN5 5U
134#define GPIOE_PIN6 6U
135#define GPIOE_PIN7 7U
136#define GPIOE_PIN8 8U
137#define GPIOE_PIN9 9U
138#define GPIOE_PIN10 10U
139#define GPIOE_PIN11 11U
140#define GPIOE_PIN12 12U
141#define GPIOE_PIN13 13U
142#define GPIOE_PIN14 14U
143#define GPIOE_PIN15 15U
144
145#define GPIOF_PIN0 0U
146#define GPIOF_PIN1 1U
147#define GPIOF_PIN2 2U
148#define GPIOF_PIN3 3U
149#define GPIOF_PIN4 4U
150#define GPIOF_PIN5 5U
151#define GPIOF_PIN6 6U
152#define GPIOF_PIN7 7U
153#define GPIOF_PIN8 8U
154#define GPIOF_PIN9 9U
155#define GPIOF_PIN10 10U
156#define GPIOF_PIN11 11U
157#define GPIOF_PIN12 12U
158#define GPIOF_PIN13 13U
159#define GPIOF_PIN14 14U
160#define GPIOF_PIN15 15U
161
162#define GPIOG_PIN0 0U
163#define GPIOG_PIN1 1U
164#define GPIOG_PIN2 2U
165#define GPIOG_PIN3 3U
166#define GPIOG_PIN4 4U
167#define GPIOG_PIN5 5U
168#define GPIOG_PIN6 6U
169#define GPIOG_PIN7 7U
170#define GPIOG_PIN8 8U
171#define GPIOG_PIN9 9U
172#define GPIOG_PIN10 10U
173#define GPIOG_PIN11 11U
174#define GPIOG_PIN12 12U
175#define GPIOG_PIN13 13U
176#define GPIOG_PIN14 14U
177#define GPIOG_PIN15 15U
178
179#define GPIOH_OSC_IN 0U
180#define GPIOH_OSC_OUT 1U
181#define GPIOH_PIN2 2U
182#define GPIOH_PIN3 3U
183#define GPIOH_PIN4 4U
184#define GPIOH_PIN5 5U
185#define GPIOH_PIN6 6U
186#define GPIOH_PIN7 7U
187#define GPIOH_PIN8 8U
188#define GPIOH_PIN9 9U
189#define GPIOH_PIN10 10U
190#define GPIOH_PIN11 11U
191#define GPIOH_PIN12 12U
192#define GPIOH_PIN13 13U
193#define GPIOH_PIN14 14U
194#define GPIOH_PIN15 15U
195
196#define GPIOI_PIN0 0U
197#define GPIOI_PIN1 1U
198#define GPIOI_PIN2 2U
199#define GPIOI_PIN3 3U
200#define GPIOI_PIN4 4U
201#define GPIOI_PIN5 5U
202#define GPIOI_PIN6 6U
203#define GPIOI_PIN7 7U
204#define GPIOI_PIN8 8U
205#define GPIOI_PIN9 9U
206#define GPIOI_PIN10 10U
207#define GPIOI_PIN11 11U
208#define GPIOI_PIN12 12U
209#define GPIOI_PIN13 13U
210#define GPIOI_PIN14 14U
211#define GPIOI_PIN15 15U
212
213/*
214 * I/O ports initial setup, this configuration is established soon after reset
215 * in the initialization code.
216 * Please refer to the STM32 Reference Manual for details.
217 */
218#define PIN_MODE_INPUT(n) (0U << ((n) * 2U))
219#define PIN_MODE_OUTPUT(n) (1U << ((n) * 2U))
220#define PIN_MODE_ALTERNATE(n) (2U << ((n) * 2U))
221#define PIN_MODE_ANALOG(n) (3U << ((n) * 2U))
222#define PIN_ODR_LOW(n) (0U << (n))
223#define PIN_ODR_HIGH(n) (1U << (n))
224#define PIN_OTYPE_PUSHPULL(n) (0U << (n))
225#define PIN_OTYPE_OPENDRAIN(n) (1U << (n))
226#define PIN_OSPEED_VERYLOW(n) (0U << ((n) * 2U))
227#define PIN_OSPEED_LOW(n) (1U << ((n) * 2U))
228#define PIN_OSPEED_MEDIUM(n) (2U << ((n) * 2U))
229#define PIN_OSPEED_HIGH(n) (3U << ((n) * 2U))
230#define PIN_PUPDR_FLOATING(n) (0U << ((n) * 2U))
231#define PIN_PUPDR_PULLUP(n) (1U << ((n) * 2U))
232#define PIN_PUPDR_PULLDOWN(n) (2U << ((n) * 2U))
233#define PIN_AFIO_AF(n, v) ((v) << (((n) % 8U) * 4U))
234
235/*
236 * GPIOA setup:
237 *
238 * PA0 - (input pullup).
239 * PA1 - (input pullup).
240 * PA2 - (input pullup).
241 * PA3 - (input pullup).
242 * PA4 - (input pullup).
243 * PA5 - SPI SCK (alternate 5).
244 * PA6 - SPI MISO (alternate 5).
245 * PA7 - SPI MOSI (alternate 5).
246 * PA8 - (input pullup).
247 * PA9 - (input pullup).
248 * PA10 - (input pullup).
249 * PA11 - OTG_FS_DM (alternate 10).
250 * PA12 - OTG_FS_DP (alternate 10).
251 * PA13 - SWDIO (alternate 0).
252 * PA14 - SWCLK (alternate 0).
253 * PA15 - (input pullup).
254 */
255#define VAL_GPIOA_MODER (PIN_MODE_INPUT(GPIOA_PIN0) | \
256 PIN_MODE_INPUT(GPIOA_PIN1) | \
257 PIN_MODE_INPUT(GPIOA_PIN2) | \
258 PIN_MODE_INPUT(GPIOA_PIN3) | \
259 PIN_MODE_INPUT(GPIOA_PIN4) | \
260 PIN_MODE_ALTERNATE(GPIOA_SCK) | \
261 PIN_MODE_ALTERNATE(GPIOA_MISO) | \
262 PIN_MODE_ALTERNATE(GPIOA_MOSI) | \
263 PIN_MODE_INPUT(GPIOA_PIN8) | \
264 PIN_MODE_INPUT(GPIOA_PIN9) | \
265 PIN_MODE_INPUT(GPIOA_PIN10) | \
266 PIN_MODE_ALTERNATE(GPIOA_OTG_FS_DM) | \
267 PIN_MODE_ALTERNATE(GPIOA_OTG_FS_DP) | \
268 PIN_MODE_ALTERNATE(GPIOA_SWDIO) | \
269 PIN_MODE_ALTERNATE(GPIOA_SWCLK) | \
270 PIN_MODE_INPUT(GPIOA_PIN15))
271#define VAL_GPIOA_OTYPER (PIN_OTYPE_PUSHPULL(GPIOA_PIN0) | \
272 PIN_OTYPE_PUSHPULL(GPIOA_PIN1) | \
273 PIN_OTYPE_PUSHPULL(GPIOA_PIN2) | \
274 PIN_OTYPE_PUSHPULL(GPIOA_PIN3) | \
275 PIN_OTYPE_PUSHPULL(GPIOA_PIN4) | \
276 PIN_OTYPE_PUSHPULL(GPIOA_SCK) | \
277 PIN_OTYPE_PUSHPULL(GPIOA_MISO) | \
278 PIN_OTYPE_PUSHPULL(GPIOA_MOSI) | \
279 PIN_OTYPE_PUSHPULL(GPIOA_PIN8) | \
280 PIN_OTYPE_PUSHPULL(GPIOA_PIN9) | \
281 PIN_OTYPE_PUSHPULL(GPIOA_PIN10) | \
282 PIN_OTYPE_PUSHPULL(GPIOA_OTG_FS_DM) | \
283 PIN_OTYPE_PUSHPULL(GPIOA_OTG_FS_DP) | \
284 PIN_OTYPE_PUSHPULL(GPIOA_SWDIO) | \
285 PIN_OTYPE_PUSHPULL(GPIOA_SWCLK) | \
286 PIN_OTYPE_PUSHPULL(GPIOA_PIN15))
287#define VAL_GPIOA_OSPEEDR (PIN_OSPEED_VERYLOW(GPIOA_PIN0) | \
288 PIN_OSPEED_VERYLOW(GPIOA_PIN1) | \
289 PIN_OSPEED_VERYLOW(GPIOA_PIN2) | \
290 PIN_OSPEED_VERYLOW(GPIOA_PIN3) | \
291 PIN_OSPEED_VERYLOW(GPIOA_PIN4) | \
292 PIN_OSPEED_HIGH(GPIOA_SCK) | \
293 PIN_OSPEED_HIGH(GPIOA_MISO) | \
294 PIN_OSPEED_HIGH(GPIOA_MOSI) | \
295 PIN_OSPEED_VERYLOW(GPIOA_PIN8) | \
296 PIN_OSPEED_VERYLOW(GPIOA_PIN9) | \
297 PIN_OSPEED_VERYLOW(GPIOA_PIN10) | \
298 PIN_OSPEED_HIGH(GPIOA_OTG_FS_DM) | \
299 PIN_OSPEED_HIGH(GPIOA_OTG_FS_DP) | \
300 PIN_OSPEED_HIGH(GPIOA_SWDIO) | \
301 PIN_OSPEED_HIGH(GPIOA_SWCLK) | \
302 PIN_OSPEED_VERYLOW(GPIOA_PIN15))
303#define VAL_GPIOA_PUPDR (PIN_PUPDR_PULLUP(GPIOA_PIN0) | \
304 PIN_PUPDR_PULLUP(GPIOA_PIN1) | \
305 PIN_PUPDR_PULLUP(GPIOA_PIN2) | \
306 PIN_PUPDR_PULLUP(GPIOA_PIN3) | \
307 PIN_PUPDR_PULLUP(GPIOA_PIN4) | \
308 PIN_PUPDR_PULLUP(GPIOA_SCK) | \
309 PIN_PUPDR_PULLUP(GPIOA_MISO) | \
310 PIN_PUPDR_PULLUP(GPIOA_MOSI) | \
311 PIN_PUPDR_PULLUP(GPIOA_PIN8) | \
312 PIN_PUPDR_PULLUP(GPIOA_PIN9) | \
313 PIN_PUPDR_PULLUP(GPIOA_PIN10) | \
314 PIN_PUPDR_FLOATING(GPIOA_OTG_FS_DM) | \
315 PIN_PUPDR_FLOATING(GPIOA_OTG_FS_DP) | \
316 PIN_PUPDR_PULLUP(GPIOA_SWDIO) | \
317 PIN_PUPDR_PULLDOWN(GPIOA_SWCLK) | \
318 PIN_PUPDR_PULLUP(GPIOA_PIN15))
319#define VAL_GPIOA_ODR (PIN_ODR_HIGH(GPIOA_PIN0) | \
320 PIN_ODR_HIGH(GPIOA_PIN1) | \
321 PIN_ODR_HIGH(GPIOA_PIN2) | \
322 PIN_ODR_HIGH(GPIOA_PIN3) | \
323 PIN_ODR_HIGH(GPIOA_PIN4) | \
324 PIN_ODR_HIGH(GPIOA_SCK) | \
325 PIN_ODR_HIGH(GPIOA_MISO) | \
326 PIN_ODR_HIGH(GPIOA_MOSI) | \
327 PIN_ODR_HIGH(GPIOA_PIN8) | \
328 PIN_ODR_HIGH(GPIOA_PIN9) | \
329 PIN_ODR_HIGH(GPIOA_PIN10) | \
330 PIN_ODR_HIGH(GPIOA_OTG_FS_DM) | \
331 PIN_ODR_HIGH(GPIOA_OTG_FS_DP) | \
332 PIN_ODR_HIGH(GPIOA_SWDIO) | \
333 PIN_ODR_HIGH(GPIOA_SWCLK) | \
334 PIN_ODR_HIGH(GPIOA_PIN15))
335#define VAL_GPIOA_AFRL (PIN_AFIO_AF(GPIOA_PIN0, 0U) | \
336 PIN_AFIO_AF(GPIOA_PIN1, 0U) | \
337 PIN_AFIO_AF(GPIOA_PIN2, 0U) | \
338 PIN_AFIO_AF(GPIOA_PIN3, 0U) | \
339 PIN_AFIO_AF(GPIOA_PIN4, 0U) | \
340 PIN_AFIO_AF(GPIOA_SCK, 5U) | \
341 PIN_AFIO_AF(GPIOA_MISO, 5U) | \
342 PIN_AFIO_AF(GPIOA_MOSI, 5U))
343#define VAL_GPIOA_AFRH (PIN_AFIO_AF(GPIOA_PIN8, 0U) | \
344 PIN_AFIO_AF(GPIOA_PIN9, 0U) | \
345 PIN_AFIO_AF(GPIOA_PIN10, 0U) | \
346 PIN_AFIO_AF(GPIOA_OTG_FS_DM, 10U) | \
347 PIN_AFIO_AF(GPIOA_OTG_FS_DP, 10U) | \
348 PIN_AFIO_AF(GPIOA_SWDIO, 0U) | \
349 PIN_AFIO_AF(GPIOA_SWCLK, 0U) | \
350 PIN_AFIO_AF(GPIOA_PIN15, 0U))
351
352/*
353 * GPIOB setup:
354 *
355 * PB0 - (input pullup).
356 * PB1 - (input pullup).
357 * PB2 - (input pullup).
358 * PB3 - SWO (alternate 0).
359 * PB4 - (input pullup).
360 * PB5 - (input pullup).
361 * PB6 - UART TX (alternate 7).
362 * PB7 - UART RX (alternate 7).
363 * PB8 - (input pullup).
364 * PB9 - (input pullup).
365 * PB10 - (input pullup).
366 * PB11 - (input pullup).
367 * PB12 - (input pullup).
368 * PB13 - (input pullup).
369 * PB14 - (input pullup).
370 * PB15 - (input pullup).
371 */
372#define VAL_GPIOB_MODER (PIN_MODE_INPUT(GPIOB_PIN0) | \
373 PIN_MODE_INPUT(GPIOB_PIN1) | \
374 PIN_MODE_INPUT(GPIOB_PIN2) | \
375 PIN_MODE_ALTERNATE(GPIOB_SWO) | \
376 PIN_MODE_INPUT(GPIOB_PIN4) | \
377 PIN_MODE_INPUT(GPIOB_PIN5) | \
378 PIN_MODE_ALTERNATE(GPIOB_UART_TX) | \
379 PIN_MODE_ALTERNATE(GPIOB_UART_RX) | \
380 PIN_MODE_INPUT(GPIOB_PIN8) | \
381 PIN_MODE_INPUT(GPIOB_PIN9) | \
382 PIN_MODE_INPUT(GPIOB_PIN10) | \
383 PIN_MODE_INPUT(GPIOB_PIN11) | \
384 PIN_MODE_INPUT(GPIOB_PIN12) | \
385 PIN_MODE_INPUT(GPIOB_PIN13) | \
386 PIN_MODE_INPUT(GPIOB_PIN14) | \
387 PIN_MODE_INPUT(GPIOB_PIN15))
388#define VAL_GPIOB_OTYPER (PIN_OTYPE_PUSHPULL(GPIOB_PIN0) | \
389 PIN_OTYPE_PUSHPULL(GPIOB_PIN1) | \
390 PIN_OTYPE_PUSHPULL(GPIOB_PIN2) | \
391 PIN_OTYPE_PUSHPULL(GPIOB_SWO) | \
392 PIN_OTYPE_PUSHPULL(GPIOB_PIN4) | \
393 PIN_OTYPE_PUSHPULL(GPIOB_PIN5) | \
394 PIN_OTYPE_PUSHPULL(GPIOB_UART_TX) | \
395 PIN_OTYPE_PUSHPULL(GPIOB_UART_RX) | \
396 PIN_OTYPE_PUSHPULL(GPIOB_PIN8) | \
397 PIN_OTYPE_PUSHPULL(GPIOB_PIN9) | \
398 PIN_OTYPE_PUSHPULL(GPIOB_PIN10) | \
399 PIN_OTYPE_PUSHPULL(GPIOB_PIN11) | \
400 PIN_OTYPE_PUSHPULL(GPIOB_PIN12) | \
401 PIN_OTYPE_PUSHPULL(GPIOB_PIN13) | \
402 PIN_OTYPE_PUSHPULL(GPIOB_PIN14) | \
403 PIN_OTYPE_PUSHPULL(GPIOB_PIN15))
404#define VAL_GPIOB_OSPEEDR (PIN_OSPEED_VERYLOW(GPIOB_PIN0) | \
405 PIN_OSPEED_VERYLOW(GPIOB_PIN1) | \
406 PIN_OSPEED_VERYLOW(GPIOB_PIN2) | \
407 PIN_OSPEED_HIGH(GPIOB_SWO) | \
408 PIN_OSPEED_VERYLOW(GPIOB_PIN4) | \
409 PIN_OSPEED_VERYLOW(GPIOB_PIN5) | \
410 PIN_OSPEED_HIGH(GPIOB_UART_TX) | \
411 PIN_OSPEED_HIGH(GPIOB_UART_RX) | \
412 PIN_OSPEED_VERYLOW(GPIOB_PIN8) | \
413 PIN_OSPEED_VERYLOW(GPIOB_PIN9) | \
414 PIN_OSPEED_VERYLOW(GPIOB_PIN10) | \
415 PIN_OSPEED_VERYLOW(GPIOB_PIN11) | \
416 PIN_OSPEED_VERYLOW(GPIOB_PIN12) | \
417 PIN_OSPEED_VERYLOW(GPIOB_PIN13) | \
418 PIN_OSPEED_VERYLOW(GPIOB_PIN14) | \
419 PIN_OSPEED_VERYLOW(GPIOB_PIN15))
420#define VAL_GPIOB_PUPDR (PIN_PUPDR_PULLUP(GPIOB_PIN0) | \
421 PIN_PUPDR_PULLUP(GPIOB_PIN1) | \
422 PIN_PUPDR_PULLUP(GPIOB_PIN2) | \
423 PIN_PUPDR_PULLUP(GPIOB_SWO) | \
424 PIN_PUPDR_PULLUP(GPIOB_PIN4) | \
425 PIN_PUPDR_PULLUP(GPIOB_PIN5) | \
426 PIN_PUPDR_FLOATING(GPIOB_UART_TX) | \
427 PIN_PUPDR_FLOATING(GPIOB_UART_RX) | \
428 PIN_PUPDR_PULLUP(GPIOB_PIN8) | \
429 PIN_PUPDR_PULLUP(GPIOB_PIN9) | \
430 PIN_PUPDR_PULLUP(GPIOB_PIN10) | \
431 PIN_PUPDR_PULLUP(GPIOB_PIN11) | \
432 PIN_PUPDR_PULLUP(GPIOB_PIN12) | \
433 PIN_PUPDR_PULLUP(GPIOB_PIN13) | \
434 PIN_PUPDR_PULLUP(GPIOB_PIN14) | \
435 PIN_PUPDR_PULLUP(GPIOB_PIN15))
436#define VAL_GPIOB_ODR (PIN_ODR_HIGH(GPIOB_PIN0) | \
437 PIN_ODR_HIGH(GPIOB_PIN1) | \
438 PIN_ODR_HIGH(GPIOB_PIN2) | \
439 PIN_ODR_HIGH(GPIOB_SWO) | \
440 PIN_ODR_HIGH(GPIOB_PIN4) | \
441 PIN_ODR_HIGH(GPIOB_PIN5) | \
442 PIN_ODR_HIGH(GPIOB_UART_TX) | \
443 PIN_ODR_HIGH(GPIOB_UART_RX) | \
444 PIN_ODR_HIGH(GPIOB_PIN8) | \
445 PIN_ODR_HIGH(GPIOB_PIN9) | \
446 PIN_ODR_HIGH(GPIOB_PIN10) | \
447 PIN_ODR_HIGH(GPIOB_PIN11) | \
448 PIN_ODR_HIGH(GPIOB_PIN12) | \
449 PIN_ODR_HIGH(GPIOB_PIN13) | \
450 PIN_ODR_HIGH(GPIOB_PIN14) | \
451 PIN_ODR_HIGH(GPIOB_PIN15))
452#define VAL_GPIOB_AFRL (PIN_AFIO_AF(GPIOB_PIN0, 0U) | \
453 PIN_AFIO_AF(GPIOB_PIN1, 0U) | \
454 PIN_AFIO_AF(GPIOB_PIN2, 0U) | \
455 PIN_AFIO_AF(GPIOB_SWO, 0U) | \
456 PIN_AFIO_AF(GPIOB_PIN4, 0U) | \
457 PIN_AFIO_AF(GPIOB_PIN5, 0U) | \
458 PIN_AFIO_AF(GPIOB_UART_TX, 7U) | \
459 PIN_AFIO_AF(GPIOB_UART_RX, 7U))
460#define VAL_GPIOB_AFRH (PIN_AFIO_AF(GPIOB_PIN8, 0U) | \
461 PIN_AFIO_AF(GPIOB_PIN9, 0U) | \
462 PIN_AFIO_AF(GPIOB_PIN10, 0U) | \
463 PIN_AFIO_AF(GPIOB_PIN11, 0U) | \
464 PIN_AFIO_AF(GPIOB_PIN12, 0U) | \
465 PIN_AFIO_AF(GPIOB_PIN13, 0U) | \
466 PIN_AFIO_AF(GPIOB_PIN14, 0U) | \
467 PIN_AFIO_AF(GPIOB_PIN15, 0U))
468
469/*
470 * GPIOC setup:
471 *
472 * PC0 - (input pullup).
473 * PC1 - (input pullup).
474 * PC2 - (input pullup).
475 * PC3 - (input pullup).
476 * PC4 - (input pullup).
477 * PC5 - (input pullup).
478 * PC6 - (input pullup).
479 * PC7 - (input pullup).
480 * PC8 - (input pullup).
481 * PC9 - (input pullup).
482 * PC10 - (input pullup).
483 * PC11 - (input pullup).
484 * PC12 - (input pullup).
485 * PC13 - (input floating).
486 * PC14 - (input floating).
487 * PC15 - (input floating).
488 */
489#define VAL_GPIOC_MODER (PIN_MODE_INPUT(GPIOC_PIN0) | \
490 PIN_MODE_INPUT(GPIOC_PIN1) | \
491 PIN_MODE_INPUT(GPIOC_PIN2) | \
492 PIN_MODE_INPUT(GPIOC_PIN3) | \
493 PIN_MODE_INPUT(GPIOC_PIN4) | \
494 PIN_MODE_INPUT(GPIOC_PIN5) | \
495 PIN_MODE_INPUT(GPIOC_PIN6) | \
496 PIN_MODE_INPUT(GPIOC_PIN7) | \
497 PIN_MODE_INPUT(GPIOC_PIN8) | \
498 PIN_MODE_INPUT(GPIOC_PIN9) | \
499 PIN_MODE_INPUT(GPIOC_PIN10) | \
500 PIN_MODE_INPUT(GPIOC_PIN11) | \
501 PIN_MODE_INPUT(GPIOC_PIN12) | \
502 PIN_MODE_INPUT(GPIOC_PIN13) | \
503 PIN_MODE_INPUT(GPIOC_PIN14) | \
504 PIN_MODE_INPUT(GPIOC_PIN15))
505#define VAL_GPIOC_OTYPER (PIN_OTYPE_PUSHPULL(GPIOC_PIN0) | \
506 PIN_OTYPE_PUSHPULL(GPIOC_PIN1) | \
507 PIN_OTYPE_PUSHPULL(GPIOC_PIN2) | \
508 PIN_OTYPE_PUSHPULL(GPIOC_PIN3) | \
509 PIN_OTYPE_PUSHPULL(GPIOC_PIN4) | \
510 PIN_OTYPE_PUSHPULL(GPIOC_PIN5) | \
511 PIN_OTYPE_PUSHPULL(GPIOC_PIN6) | \
512 PIN_OTYPE_PUSHPULL(GPIOC_PIN7) | \
513 PIN_OTYPE_PUSHPULL(GPIOC_PIN8) | \
514 PIN_OTYPE_PUSHPULL(GPIOC_PIN9) | \
515 PIN_OTYPE_PUSHPULL(GPIOC_PIN10) | \
516 PIN_OTYPE_PUSHPULL(GPIOC_PIN11) | \
517 PIN_OTYPE_PUSHPULL(GPIOC_PIN12) | \
518 PIN_OTYPE_PUSHPULL(GPIOC_PIN13) | \
519 PIN_OTYPE_PUSHPULL(GPIOC_PIN14) | \
520 PIN_OTYPE_PUSHPULL(GPIOC_PIN15))
521#define VAL_GPIOC_OSPEEDR (PIN_OSPEED_VERYLOW(GPIOC_PIN0) | \
522 PIN_OSPEED_VERYLOW(GPIOC_PIN1) | \
523 PIN_OSPEED_VERYLOW(GPIOC_PIN2) | \
524 PIN_OSPEED_VERYLOW(GPIOC_PIN3) | \
525 PIN_OSPEED_VERYLOW(GPIOC_PIN4) | \
526 PIN_OSPEED_VERYLOW(GPIOC_PIN5) | \
527 PIN_OSPEED_VERYLOW(GPIOC_PIN6) | \
528 PIN_OSPEED_VERYLOW(GPIOC_PIN7) | \
529 PIN_OSPEED_VERYLOW(GPIOC_PIN8) | \
530 PIN_OSPEED_VERYLOW(GPIOC_PIN9) | \
531 PIN_OSPEED_VERYLOW(GPIOC_PIN10) | \
532 PIN_OSPEED_VERYLOW(GPIOC_PIN11) | \
533 PIN_OSPEED_VERYLOW(GPIOC_PIN12) | \
534 PIN_OSPEED_VERYLOW(GPIOC_PIN13) | \
535 PIN_OSPEED_VERYLOW(GPIOC_PIN14) | \
536 PIN_OSPEED_VERYLOW(GPIOC_PIN15))
537#define VAL_GPIOC_PUPDR (PIN_PUPDR_PULLUP(GPIOC_PIN0) | \
538 PIN_PUPDR_PULLUP(GPIOC_PIN1) | \
539 PIN_PUPDR_PULLUP(GPIOC_PIN2) | \
540 PIN_PUPDR_PULLUP(GPIOC_PIN3) | \
541 PIN_PUPDR_PULLUP(GPIOC_PIN4) | \
542 PIN_PUPDR_PULLUP(GPIOC_PIN5) | \
543 PIN_PUPDR_PULLUP(GPIOC_PIN6) | \
544 PIN_PUPDR_PULLUP(GPIOC_PIN7) | \
545 PIN_PUPDR_PULLUP(GPIOC_PIN8) | \
546 PIN_PUPDR_PULLUP(GPIOC_PIN9) | \
547 PIN_PUPDR_PULLUP(GPIOC_PIN10) | \
548 PIN_PUPDR_PULLUP(GPIOC_PIN11) | \
549 PIN_PUPDR_PULLUP(GPIOC_PIN12) | \
550 PIN_PUPDR_PULLUP(GPIOC_PIN13) | \
551 PIN_PUPDR_PULLUP(GPIOC_PIN14) | \
552 PIN_PUPDR_PULLUP(GPIOC_PIN15))
553#define VAL_GPIOC_ODR (PIN_ODR_HIGH(GPIOC_PIN0) | \
554 PIN_ODR_HIGH(GPIOC_PIN1) | \
555 PIN_ODR_HIGH(GPIOC_PIN2) | \
556 PIN_ODR_HIGH(GPIOC_PIN3) | \
557 PIN_ODR_HIGH(GPIOC_PIN4) | \
558 PIN_ODR_HIGH(GPIOC_PIN5) | \
559 PIN_ODR_HIGH(GPIOC_PIN6) | \
560 PIN_ODR_HIGH(GPIOC_PIN7) | \
561 PIN_ODR_HIGH(GPIOC_PIN8) | \
562 PIN_ODR_HIGH(GPIOC_PIN9) | \
563 PIN_ODR_HIGH(GPIOC_PIN10) | \
564 PIN_ODR_HIGH(GPIOC_PIN11) | \
565 PIN_ODR_HIGH(GPIOC_PIN12) | \
566 PIN_ODR_HIGH(GPIOC_PIN13) | \
567 PIN_ODR_HIGH(GPIOC_PIN14) | \
568 PIN_ODR_HIGH(GPIOC_PIN15))
569#define VAL_GPIOC_AFRL (PIN_AFIO_AF(GPIOC_PIN0, 0U) | \
570 PIN_AFIO_AF(GPIOC_PIN1, 0U) | \
571 PIN_AFIO_AF(GPIOC_PIN2, 0U) | \
572 PIN_AFIO_AF(GPIOC_PIN3, 0U) | \
573 PIN_AFIO_AF(GPIOC_PIN4, 0U) | \
574 PIN_AFIO_AF(GPIOC_PIN5, 0U) | \
575 PIN_AFIO_AF(GPIOC_PIN6, 0U) | \
576 PIN_AFIO_AF(GPIOC_PIN7, 0U))
577#define VAL_GPIOC_AFRH (PIN_AFIO_AF(GPIOC_PIN8, 0U) | \
578 PIN_AFIO_AF(GPIOC_PIN9, 0U) | \
579 PIN_AFIO_AF(GPIOC_PIN10, 0U) | \
580 PIN_AFIO_AF(GPIOC_PIN11, 0U) | \
581 PIN_AFIO_AF(GPIOC_PIN12, 0U) | \
582 PIN_AFIO_AF(GPIOC_PIN13, 0U) | \
583 PIN_AFIO_AF(GPIOC_PIN14, 0U) | \
584 PIN_AFIO_AF(GPIOC_PIN15, 0U))
585
586/*
587 * GPIOD setup:
588 *
589 * PD0 - PIN0 (input pullup).
590 * PD1 - PIN1 (input pullup).
591 * PD2 - PIN2 (input pullup).
592 * PD3 - PIN3 (input pullup).
593 * PD4 - PIN4 (input pullup).
594 * PD5 - PIN5 (input pullup).
595 * PD6 - PIN6 (input pullup).
596 * PD7 - PIN7 (input pullup).
597 * PD8 - PIN8 (input pullup).
598 * PD9 - PIN9 (input pullup).
599 * PD10 - PIN10 (input pullup).
600 * PD11 - PIN11 (input pullup).
601 * PD12 - PIN12 (input pullup).
602 * PD13 - PIN13 (input pullup).
603 * PD14 - PIN14 (input pullup).
604 * PD15 - PIN15 (input pullup).
605 */
606#define VAL_GPIOD_MODER (PIN_MODE_INPUT(GPIOD_PIN0) | \
607 PIN_MODE_INPUT(GPIOD_PIN1) | \
608 PIN_MODE_INPUT(GPIOD_PIN2) | \
609 PIN_MODE_INPUT(GPIOD_PIN3) | \
610 PIN_MODE_INPUT(GPIOD_PIN4) | \
611 PIN_MODE_INPUT(GPIOD_PIN5) | \
612 PIN_MODE_INPUT(GPIOD_PIN6) | \
613 PIN_MODE_INPUT(GPIOD_PIN7) | \
614 PIN_MODE_INPUT(GPIOD_PIN8) | \
615 PIN_MODE_INPUT(GPIOD_PIN9) | \
616 PIN_MODE_INPUT(GPIOD_PIN10) | \
617 PIN_MODE_INPUT(GPIOD_PIN11) | \
618 PIN_MODE_INPUT(GPIOD_PIN12) | \
619 PIN_MODE_INPUT(GPIOD_PIN13) | \
620 PIN_MODE_INPUT(GPIOD_PIN14) | \
621 PIN_MODE_INPUT(GPIOD_PIN15))
622#define VAL_GPIOD_OTYPER (PIN_OTYPE_PUSHPULL(GPIOD_PIN0) | \
623 PIN_OTYPE_PUSHPULL(GPIOD_PIN1) | \
624 PIN_OTYPE_PUSHPULL(GPIOD_PIN2) | \
625 PIN_OTYPE_PUSHPULL(GPIOD_PIN3) | \
626 PIN_OTYPE_PUSHPULL(GPIOD_PIN4) | \
627 PIN_OTYPE_PUSHPULL(GPIOD_PIN5) | \
628 PIN_OTYPE_PUSHPULL(GPIOD_PIN6) | \
629 PIN_OTYPE_PUSHPULL(GPIOD_PIN7) | \
630 PIN_OTYPE_PUSHPULL(GPIOD_PIN8) | \
631 PIN_OTYPE_PUSHPULL(GPIOD_PIN9) | \
632 PIN_OTYPE_PUSHPULL(GPIOD_PIN10) | \
633 PIN_OTYPE_PUSHPULL(GPIOD_PIN11) | \
634 PIN_OTYPE_PUSHPULL(GPIOD_PIN12) | \
635 PIN_OTYPE_PUSHPULL(GPIOD_PIN13) | \
636 PIN_OTYPE_PUSHPULL(GPIOD_PIN14) | \
637 PIN_OTYPE_PUSHPULL(GPIOD_PIN15))
638#define VAL_GPIOD_OSPEEDR (PIN_OSPEED_HIGH(GPIOD_PIN0) | \
639 PIN_OSPEED_HIGH(GPIOD_PIN1) | \
640 PIN_OSPEED_HIGH(GPIOD_PIN2) | \
641 PIN_OSPEED_HIGH(GPIOD_PIN3) | \
642 PIN_OSPEED_HIGH(GPIOD_PIN4) | \
643 PIN_OSPEED_HIGH(GPIOD_PIN5) | \
644 PIN_OSPEED_HIGH(GPIOD_PIN6) | \
645 PIN_OSPEED_HIGH(GPIOD_PIN7) | \
646 PIN_OSPEED_HIGH(GPIOD_PIN8) | \
647 PIN_OSPEED_HIGH(GPIOD_PIN9) | \
648 PIN_OSPEED_HIGH(GPIOD_PIN10) | \
649 PIN_OSPEED_HIGH(GPIOD_PIN11) | \
650 PIN_OSPEED_HIGH(GPIOD_PIN12) | \
651 PIN_OSPEED_HIGH(GPIOD_PIN13) | \
652 PIN_OSPEED_HIGH(GPIOD_PIN14) | \
653 PIN_OSPEED_HIGH(GPIOD_PIN15))
654#define VAL_GPIOD_PUPDR (PIN_PUPDR_PULLUP(GPIOD_PIN0) | \
655 PIN_PUPDR_PULLUP(GPIOD_PIN1) | \
656 PIN_PUPDR_PULLUP(GPIOD_PIN2) | \
657 PIN_PUPDR_PULLUP(GPIOD_PIN3) | \
658 PIN_PUPDR_PULLUP(GPIOD_PIN4) | \
659 PIN_PUPDR_PULLUP(GPIOD_PIN5) | \
660 PIN_PUPDR_PULLUP(GPIOD_PIN6) | \
661 PIN_PUPDR_PULLUP(GPIOD_PIN7) | \
662 PIN_PUPDR_PULLUP(GPIOD_PIN8) | \
663 PIN_PUPDR_PULLUP(GPIOD_PIN9) | \
664 PIN_PUPDR_PULLUP(GPIOD_PIN10) | \
665 PIN_PUPDR_PULLUP(GPIOD_PIN11) | \
666 PIN_PUPDR_PULLUP(GPIOD_PIN12) | \
667 PIN_PUPDR_PULLUP(GPIOD_PIN13) | \
668 PIN_PUPDR_PULLUP(GPIOD_PIN14) | \
669 PIN_PUPDR_PULLUP(GPIOD_PIN15))
670#define VAL_GPIOD_ODR (PIN_ODR_HIGH(GPIOD_PIN0) | \
671 PIN_ODR_HIGH(GPIOD_PIN1) | \
672 PIN_ODR_HIGH(GPIOD_PIN2) | \
673 PIN_ODR_HIGH(GPIOD_PIN3) | \
674 PIN_ODR_HIGH(GPIOD_PIN4) | \
675 PIN_ODR_HIGH(GPIOD_PIN5) | \
676 PIN_ODR_HIGH(GPIOD_PIN6) | \
677 PIN_ODR_HIGH(GPIOD_PIN7) | \
678 PIN_ODR_HIGH(GPIOD_PIN8) | \
679 PIN_ODR_HIGH(GPIOD_PIN9) | \
680 PIN_ODR_HIGH(GPIOD_PIN10) | \
681 PIN_ODR_HIGH(GPIOD_PIN11) | \
682 PIN_ODR_HIGH(GPIOD_PIN12) | \
683 PIN_ODR_HIGH(GPIOD_PIN13) | \
684 PIN_ODR_HIGH(GPIOD_PIN14) | \
685 PIN_ODR_HIGH(GPIOD_PIN15))
686#define VAL_GPIOD_AFRL (PIN_AFIO_AF(GPIOD_PIN0, 0U) | \
687 PIN_AFIO_AF(GPIOD_PIN1, 0U) | \
688 PIN_AFIO_AF(GPIOD_PIN2, 0U) | \
689 PIN_AFIO_AF(GPIOD_PIN3, 0U) | \
690 PIN_AFIO_AF(GPIOD_PIN4, 0U) | \
691 PIN_AFIO_AF(GPIOD_PIN5, 0U) | \
692 PIN_AFIO_AF(GPIOD_PIN6, 0U) | \
693 PIN_AFIO_AF(GPIOD_PIN7, 0U))
694#define VAL_GPIOD_AFRH (PIN_AFIO_AF(GPIOD_PIN8, 0U) | \
695 PIN_AFIO_AF(GPIOD_PIN9, 0U) | \
696 PIN_AFIO_AF(GPIOD_PIN10, 0U) | \
697 PIN_AFIO_AF(GPIOD_PIN11, 0U) | \
698 PIN_AFIO_AF(GPIOD_PIN12, 0U) | \
699 PIN_AFIO_AF(GPIOD_PIN13, 0U) | \
700 PIN_AFIO_AF(GPIOD_PIN14, 0U) | \
701 PIN_AFIO_AF(GPIOD_PIN15, 0U))
702
703/*
704 * GPIOE setup:
705 *
706 * PE0 - PIN0 (input pullup).
707 * PE1 - PIN1 (input pullup).
708 * PE2 - PIN2 (input pullup).
709 * PE3 - PIN3 (input pullup).
710 * PE4 - PIN4 (input pullup).
711 * PE5 - PIN5 (input pullup).
712 * PE6 - PIN6 (input pullup).
713 * PE7 - PIN7 (input pullup).
714 * PE8 - PIN8 (input pullup).
715 * PE9 - PIN9 (input pullup).
716 * PE10 - PIN10 (input pullup).
717 * PE11 - PIN11 (input pullup).
718 * PE12 - PIN12 (input pullup).
719 * PE13 - PIN13 (input pullup).
720 * PE14 - PIN14 (input pullup).
721 * PE15 - PIN15 (input pullup).
722 */
723#define VAL_GPIOE_MODER (PIN_MODE_INPUT(GPIOE_PIN0) | \
724 PIN_MODE_INPUT(GPIOE_PIN1) | \
725 PIN_MODE_INPUT(GPIOE_PIN2) | \
726 PIN_MODE_INPUT(GPIOE_PIN3) | \
727 PIN_MODE_INPUT(GPIOE_PIN4) | \
728 PIN_MODE_INPUT(GPIOE_PIN5) | \
729 PIN_MODE_INPUT(GPIOE_PIN6) | \
730 PIN_MODE_INPUT(GPIOE_PIN7) | \
731 PIN_MODE_INPUT(GPIOE_PIN8) | \
732 PIN_MODE_INPUT(GPIOE_PIN9) | \
733 PIN_MODE_INPUT(GPIOE_PIN10) | \
734 PIN_MODE_INPUT(GPIOE_PIN11) | \
735 PIN_MODE_INPUT(GPIOE_PIN12) | \
736 PIN_MODE_INPUT(GPIOE_PIN13) | \
737 PIN_MODE_INPUT(GPIOE_PIN14) | \
738 PIN_MODE_INPUT(GPIOE_PIN15))
739#define VAL_GPIOE_OTYPER (PIN_OTYPE_PUSHPULL(GPIOE_PIN0) | \
740 PIN_OTYPE_PUSHPULL(GPIOE_PIN1) | \
741 PIN_OTYPE_PUSHPULL(GPIOE_PIN2) | \
742 PIN_OTYPE_PUSHPULL(GPIOE_PIN3) | \
743 PIN_OTYPE_PUSHPULL(GPIOE_PIN4) | \
744 PIN_OTYPE_PUSHPULL(GPIOE_PIN5) | \
745 PIN_OTYPE_PUSHPULL(GPIOE_PIN6) | \
746 PIN_OTYPE_PUSHPULL(GPIOE_PIN7) | \
747 PIN_OTYPE_PUSHPULL(GPIOE_PIN8) | \
748 PIN_OTYPE_PUSHPULL(GPIOE_PIN9) | \
749 PIN_OTYPE_PUSHPULL(GPIOE_PIN10) | \
750 PIN_OTYPE_PUSHPULL(GPIOE_PIN11) | \
751 PIN_OTYPE_PUSHPULL(GPIOE_PIN12) | \
752 PIN_OTYPE_PUSHPULL(GPIOE_PIN13) | \
753 PIN_OTYPE_PUSHPULL(GPIOE_PIN14) | \
754 PIN_OTYPE_PUSHPULL(GPIOE_PIN15))
755#define VAL_GPIOE_OSPEEDR (PIN_OSPEED_HIGH(GPIOE_PIN0) | \
756 PIN_OSPEED_HIGH(GPIOE_PIN1) | \
757 PIN_OSPEED_HIGH(GPIOE_PIN2) | \
758 PIN_OSPEED_HIGH(GPIOE_PIN3) | \
759 PIN_OSPEED_HIGH(GPIOE_PIN4) | \
760 PIN_OSPEED_HIGH(GPIOE_PIN5) | \
761 PIN_OSPEED_HIGH(GPIOE_PIN6) | \
762 PIN_OSPEED_HIGH(GPIOE_PIN7) | \
763 PIN_OSPEED_HIGH(GPIOE_PIN8) | \
764 PIN_OSPEED_HIGH(GPIOE_PIN9) | \
765 PIN_OSPEED_HIGH(GPIOE_PIN10) | \
766 PIN_OSPEED_HIGH(GPIOE_PIN11) | \
767 PIN_OSPEED_HIGH(GPIOE_PIN12) | \
768 PIN_OSPEED_HIGH(GPIOE_PIN13) | \
769 PIN_OSPEED_HIGH(GPIOE_PIN14) | \
770 PIN_OSPEED_HIGH(GPIOE_PIN15))
771#define VAL_GPIOE_PUPDR (PIN_PUPDR_PULLUP(GPIOE_PIN0) | \
772 PIN_PUPDR_PULLUP(GPIOE_PIN1) | \
773 PIN_PUPDR_PULLUP(GPIOE_PIN2) | \
774 PIN_PUPDR_PULLUP(GPIOE_PIN3) | \
775 PIN_PUPDR_PULLUP(GPIOE_PIN4) | \
776 PIN_PUPDR_PULLUP(GPIOE_PIN5) | \
777 PIN_PUPDR_PULLUP(GPIOE_PIN6) | \
778 PIN_PUPDR_PULLUP(GPIOE_PIN7) | \
779 PIN_PUPDR_PULLUP(GPIOE_PIN8) | \
780 PIN_PUPDR_PULLUP(GPIOE_PIN9) | \
781 PIN_PUPDR_PULLUP(GPIOE_PIN10) | \
782 PIN_PUPDR_PULLUP(GPIOE_PIN11) | \
783 PIN_PUPDR_PULLUP(GPIOE_PIN12) | \
784 PIN_PUPDR_PULLUP(GPIOE_PIN13) | \
785 PIN_PUPDR_PULLUP(GPIOE_PIN14) | \
786 PIN_PUPDR_PULLUP(GPIOE_PIN15))
787#define VAL_GPIOE_ODR (PIN_ODR_HIGH(GPIOE_PIN0) | \
788 PIN_ODR_HIGH(GPIOE_PIN1) | \
789 PIN_ODR_HIGH(GPIOE_PIN2) | \
790 PIN_ODR_HIGH(GPIOE_PIN3) | \
791 PIN_ODR_HIGH(GPIOE_PIN4) | \
792 PIN_ODR_HIGH(GPIOE_PIN5) | \
793 PIN_ODR_HIGH(GPIOE_PIN6) | \
794 PIN_ODR_HIGH(GPIOE_PIN7) | \
795 PIN_ODR_HIGH(GPIOE_PIN8) | \
796 PIN_ODR_HIGH(GPIOE_PIN9) | \
797 PIN_ODR_HIGH(GPIOE_PIN10) | \
798 PIN_ODR_HIGH(GPIOE_PIN11) | \
799 PIN_ODR_HIGH(GPIOE_PIN12) | \
800 PIN_ODR_HIGH(GPIOE_PIN13) | \
801 PIN_ODR_HIGH(GPIOE_PIN14) | \
802 PIN_ODR_HIGH(GPIOE_PIN15))
803#define VAL_GPIOE_AFRL (PIN_AFIO_AF(GPIOE_PIN0, 0U) | \
804 PIN_AFIO_AF(GPIOE_PIN1, 0U) | \
805 PIN_AFIO_AF(GPIOE_PIN2, 0U) | \
806 PIN_AFIO_AF(GPIOE_PIN3, 0U) | \
807 PIN_AFIO_AF(GPIOE_PIN4, 0U) | \
808 PIN_AFIO_AF(GPIOE_PIN5, 0U) | \
809 PIN_AFIO_AF(GPIOE_PIN6, 0U) | \
810 PIN_AFIO_AF(GPIOE_PIN7, 0U))
811#define VAL_GPIOE_AFRH (PIN_AFIO_AF(GPIOE_PIN8, 0U) | \
812 PIN_AFIO_AF(GPIOE_PIN9, 0U) | \
813 PIN_AFIO_AF(GPIOE_PIN10, 0U) | \
814 PIN_AFIO_AF(GPIOE_PIN11, 0U) | \
815 PIN_AFIO_AF(GPIOE_PIN12, 0U) | \
816 PIN_AFIO_AF(GPIOE_PIN13, 0U) | \
817 PIN_AFIO_AF(GPIOE_PIN14, 0U) | \
818 PIN_AFIO_AF(GPIOE_PIN15, 0U))
819
820/*
821 * GPIOF setup:
822 *
823 * PF0 - PIN0 (input pullup).
824 * PF1 - PIN1 (input pullup).
825 * PF2 - PIN2 (input pullup).
826 * PF3 - PIN3 (input pullup).
827 * PF4 - PIN4 (input pullup).
828 * PF5 - PIN5 (input pullup).
829 * PF6 - PIN6 (input pullup).
830 * PF7 - PIN7 (input pullup).
831 * PF8 - PIN8 (input pullup).
832 * PF9 - PIN9 (input pullup).
833 * PF10 - PIN10 (input pullup).
834 * PF11 - PIN11 (input pullup).
835 * PF12 - PIN12 (input pullup).
836 * PF13 - PIN13 (input pullup).
837 * PF14 - PIN14 (input pullup).
838 * PF15 - PIN15 (input pullup).
839 */
840#define VAL_GPIOF_MODER (PIN_MODE_INPUT(GPIOF_PIN0) | \
841 PIN_MODE_INPUT(GPIOF_PIN1) | \
842 PIN_MODE_INPUT(GPIOF_PIN2) | \
843 PIN_MODE_INPUT(GPIOF_PIN3) | \
844 PIN_MODE_INPUT(GPIOF_PIN4) | \
845 PIN_MODE_INPUT(GPIOF_PIN5) | \
846 PIN_MODE_INPUT(GPIOF_PIN6) | \
847 PIN_MODE_INPUT(GPIOF_PIN7) | \
848 PIN_MODE_INPUT(GPIOF_PIN8) | \
849 PIN_MODE_INPUT(GPIOF_PIN9) | \
850 PIN_MODE_INPUT(GPIOF_PIN10) | \
851 PIN_MODE_INPUT(GPIOF_PIN11) | \
852 PIN_MODE_INPUT(GPIOF_PIN12) | \
853 PIN_MODE_INPUT(GPIOF_PIN13) | \
854 PIN_MODE_INPUT(GPIOF_PIN14) | \
855 PIN_MODE_INPUT(GPIOF_PIN15))
856#define VAL_GPIOF_OTYPER (PIN_OTYPE_PUSHPULL(GPIOF_PIN0) | \
857 PIN_OTYPE_PUSHPULL(GPIOF_PIN1) | \
858 PIN_OTYPE_PUSHPULL(GPIOF_PIN2) | \
859 PIN_OTYPE_PUSHPULL(GPIOF_PIN3) | \
860 PIN_OTYPE_PUSHPULL(GPIOF_PIN4) | \
861 PIN_OTYPE_PUSHPULL(GPIOF_PIN5) | \
862 PIN_OTYPE_PUSHPULL(GPIOF_PIN6) | \
863 PIN_OTYPE_PUSHPULL(GPIOF_PIN7) | \
864 PIN_OTYPE_PUSHPULL(GPIOF_PIN8) | \
865 PIN_OTYPE_PUSHPULL(GPIOF_PIN9) | \
866 PIN_OTYPE_PUSHPULL(GPIOF_PIN10) | \
867 PIN_OTYPE_PUSHPULL(GPIOF_PIN11) | \
868 PIN_OTYPE_PUSHPULL(GPIOF_PIN12) | \
869 PIN_OTYPE_PUSHPULL(GPIOF_PIN13) | \
870 PIN_OTYPE_PUSHPULL(GPIOF_PIN14) | \
871 PIN_OTYPE_PUSHPULL(GPIOF_PIN15))
872#define VAL_GPIOF_OSPEEDR (PIN_OSPEED_HIGH(GPIOF_PIN0) | \
873 PIN_OSPEED_HIGH(GPIOF_PIN1) | \
874 PIN_OSPEED_HIGH(GPIOF_PIN2) | \
875 PIN_OSPEED_HIGH(GPIOF_PIN3) | \
876 PIN_OSPEED_HIGH(GPIOF_PIN4) | \
877 PIN_OSPEED_HIGH(GPIOF_PIN5) | \
878 PIN_OSPEED_HIGH(GPIOF_PIN6) | \
879 PIN_OSPEED_HIGH(GPIOF_PIN7) | \
880 PIN_OSPEED_HIGH(GPIOF_PIN8) | \
881 PIN_OSPEED_HIGH(GPIOF_PIN9) | \
882 PIN_OSPEED_HIGH(GPIOF_PIN10) | \
883 PIN_OSPEED_HIGH(GPIOF_PIN11) | \
884 PIN_OSPEED_HIGH(GPIOF_PIN12) | \
885 PIN_OSPEED_HIGH(GPIOF_PIN13) | \
886 PIN_OSPEED_HIGH(GPIOF_PIN14) | \
887 PIN_OSPEED_HIGH(GPIOF_PIN15))
888#define VAL_GPIOF_PUPDR (PIN_PUPDR_PULLUP(GPIOF_PIN0) | \
889 PIN_PUPDR_PULLUP(GPIOF_PIN1) | \
890 PIN_PUPDR_PULLUP(GPIOF_PIN2) | \
891 PIN_PUPDR_PULLUP(GPIOF_PIN3) | \
892 PIN_PUPDR_PULLUP(GPIOF_PIN4) | \
893 PIN_PUPDR_PULLUP(GPIOF_PIN5) | \
894 PIN_PUPDR_PULLUP(GPIOF_PIN6) | \
895 PIN_PUPDR_PULLUP(GPIOF_PIN7) | \
896 PIN_PUPDR_PULLUP(GPIOF_PIN8) | \
897 PIN_PUPDR_PULLUP(GPIOF_PIN9) | \
898 PIN_PUPDR_PULLUP(GPIOF_PIN10) | \
899 PIN_PUPDR_PULLUP(GPIOF_PIN11) | \
900 PIN_PUPDR_PULLUP(GPIOF_PIN12) | \
901 PIN_PUPDR_PULLUP(GPIOF_PIN13) | \
902 PIN_PUPDR_PULLUP(GPIOF_PIN14) | \
903 PIN_PUPDR_PULLUP(GPIOF_PIN15))
904#define VAL_GPIOF_ODR (PIN_ODR_HIGH(GPIOF_PIN0) | \
905 PIN_ODR_HIGH(GPIOF_PIN1) | \
906 PIN_ODR_HIGH(GPIOF_PIN2) | \
907 PIN_ODR_HIGH(GPIOF_PIN3) | \
908 PIN_ODR_HIGH(GPIOF_PIN4) | \
909 PIN_ODR_HIGH(GPIOF_PIN5) | \
910 PIN_ODR_HIGH(GPIOF_PIN6) | \
911 PIN_ODR_HIGH(GPIOF_PIN7) | \
912 PIN_ODR_HIGH(GPIOF_PIN8) | \
913 PIN_ODR_HIGH(GPIOF_PIN9) | \
914 PIN_ODR_HIGH(GPIOF_PIN10) | \
915 PIN_ODR_HIGH(GPIOF_PIN11) | \
916 PIN_ODR_HIGH(GPIOF_PIN12) | \
917 PIN_ODR_HIGH(GPIOF_PIN13) | \
918 PIN_ODR_HIGH(GPIOF_PIN14) | \
919 PIN_ODR_HIGH(GPIOF_PIN15))
920#define VAL_GPIOF_AFRL (PIN_AFIO_AF(GPIOF_PIN0, 0U) | \
921 PIN_AFIO_AF(GPIOF_PIN1, 0U) | \
922 PIN_AFIO_AF(GPIOF_PIN2, 0U) | \
923 PIN_AFIO_AF(GPIOF_PIN3, 0U) | \
924 PIN_AFIO_AF(GPIOF_PIN4, 0U) | \
925 PIN_AFIO_AF(GPIOF_PIN5, 0U) | \
926 PIN_AFIO_AF(GPIOF_PIN6, 0U) | \
927 PIN_AFIO_AF(GPIOF_PIN7, 0U))
928#define VAL_GPIOF_AFRH (PIN_AFIO_AF(GPIOF_PIN8, 0U) | \
929 PIN_AFIO_AF(GPIOF_PIN9, 0U) | \
930 PIN_AFIO_AF(GPIOF_PIN10, 0U) | \
931 PIN_AFIO_AF(GPIOF_PIN11, 0U) | \
932 PIN_AFIO_AF(GPIOF_PIN12, 0U) | \
933 PIN_AFIO_AF(GPIOF_PIN13, 0U) | \
934 PIN_AFIO_AF(GPIOF_PIN14, 0U) | \
935 PIN_AFIO_AF(GPIOF_PIN15, 0U))
936
937/*
938 * GPIOG setup:
939 *
940 * PG0 - PIN0 (input pullup).
941 * PG1 - PIN1 (input pullup).
942 * PG2 - PIN2 (input pullup).
943 * PG3 - PIN3 (input pullup).
944 * PG4 - PIN4 (input pullup).
945 * PG5 - PIN5 (input pullup).
946 * PG6 - PIN6 (input pullup).
947 * PG7 - PIN7 (input pullup).
948 * PG8 - PIN8 (input pullup).
949 * PG9 - PIN9 (input pullup).
950 * PG10 - PIN10 (input pullup).
951 * PG11 - PIN11 (input pullup).
952 * PG12 - PIN12 (input pullup).
953 * PG13 - PIN13 (input pullup).
954 * PG14 - PIN14 (input pullup).
955 * PG15 - PIN15 (input pullup).
956 */
957#define VAL_GPIOG_MODER (PIN_MODE_INPUT(GPIOG_PIN0) | \
958 PIN_MODE_INPUT(GPIOG_PIN1) | \
959 PIN_MODE_INPUT(GPIOG_PIN2) | \
960 PIN_MODE_INPUT(GPIOG_PIN3) | \
961 PIN_MODE_INPUT(GPIOG_PIN4) | \
962 PIN_MODE_INPUT(GPIOG_PIN5) | \
963 PIN_MODE_INPUT(GPIOG_PIN6) | \
964 PIN_MODE_INPUT(GPIOG_PIN7) | \
965 PIN_MODE_INPUT(GPIOG_PIN8) | \
966 PIN_MODE_INPUT(GPIOG_PIN9) | \
967 PIN_MODE_INPUT(GPIOG_PIN10) | \
968 PIN_MODE_INPUT(GPIOG_PIN11) | \
969 PIN_MODE_INPUT(GPIOG_PIN12) | \
970 PIN_MODE_INPUT(GPIOG_PIN13) | \
971 PIN_MODE_INPUT(GPIOG_PIN14) | \
972 PIN_MODE_INPUT(GPIOG_PIN15))
973#define VAL_GPIOG_OTYPER (PIN_OTYPE_PUSHPULL(GPIOG_PIN0) | \
974 PIN_OTYPE_PUSHPULL(GPIOG_PIN1) | \
975 PIN_OTYPE_PUSHPULL(GPIOG_PIN2) | \
976 PIN_OTYPE_PUSHPULL(GPIOG_PIN3) | \
977 PIN_OTYPE_PUSHPULL(GPIOG_PIN4) | \
978 PIN_OTYPE_PUSHPULL(GPIOG_PIN5) | \
979 PIN_OTYPE_PUSHPULL(GPIOG_PIN6) | \
980 PIN_OTYPE_PUSHPULL(GPIOG_PIN7) | \
981 PIN_OTYPE_PUSHPULL(GPIOG_PIN8) | \
982 PIN_OTYPE_PUSHPULL(GPIOG_PIN9) | \
983 PIN_OTYPE_PUSHPULL(GPIOG_PIN10) | \
984 PIN_OTYPE_PUSHPULL(GPIOG_PIN11) | \
985 PIN_OTYPE_PUSHPULL(GPIOG_PIN12) | \
986 PIN_OTYPE_PUSHPULL(GPIOG_PIN13) | \
987 PIN_OTYPE_PUSHPULL(GPIOG_PIN14) | \
988 PIN_OTYPE_PUSHPULL(GPIOG_PIN15))
989#define VAL_GPIOG_OSPEEDR (PIN_OSPEED_HIGH(GPIOG_PIN0) | \
990 PIN_OSPEED_HIGH(GPIOG_PIN1) | \
991 PIN_OSPEED_HIGH(GPIOG_PIN2) | \
992 PIN_OSPEED_HIGH(GPIOG_PIN3) | \
993 PIN_OSPEED_HIGH(GPIOG_PIN4) | \
994 PIN_OSPEED_HIGH(GPIOG_PIN5) | \
995 PIN_OSPEED_HIGH(GPIOG_PIN6) | \
996 PIN_OSPEED_HIGH(GPIOG_PIN7) | \
997 PIN_OSPEED_HIGH(GPIOG_PIN8) | \
998 PIN_OSPEED_HIGH(GPIOG_PIN9) | \
999 PIN_OSPEED_HIGH(GPIOG_PIN10) | \
1000 PIN_OSPEED_HIGH(GPIOG_PIN11) | \
1001 PIN_OSPEED_HIGH(GPIOG_PIN12) | \
1002 PIN_OSPEED_HIGH(GPIOG_PIN13) | \
1003 PIN_OSPEED_HIGH(GPIOG_PIN14) | \
1004 PIN_OSPEED_HIGH(GPIOG_PIN15))
1005#define VAL_GPIOG_PUPDR (PIN_PUPDR_PULLUP(GPIOG_PIN0) | \
1006 PIN_PUPDR_PULLUP(GPIOG_PIN1) | \
1007 PIN_PUPDR_PULLUP(GPIOG_PIN2) | \
1008 PIN_PUPDR_PULLUP(GPIOG_PIN3) | \
1009 PIN_PUPDR_PULLUP(GPIOG_PIN4) | \
1010 PIN_PUPDR_PULLUP(GPIOG_PIN5) | \
1011 PIN_PUPDR_PULLUP(GPIOG_PIN6) | \
1012 PIN_PUPDR_PULLUP(GPIOG_PIN7) | \
1013 PIN_PUPDR_PULLUP(GPIOG_PIN8) | \
1014 PIN_PUPDR_PULLUP(GPIOG_PIN9) | \
1015 PIN_PUPDR_PULLUP(GPIOG_PIN10) | \
1016 PIN_PUPDR_PULLUP(GPIOG_PIN11) | \
1017 PIN_PUPDR_PULLUP(GPIOG_PIN12) | \
1018 PIN_PUPDR_PULLUP(GPIOG_PIN13) | \
1019 PIN_PUPDR_PULLUP(GPIOG_PIN14) | \
1020 PIN_PUPDR_PULLUP(GPIOG_PIN15))
1021#define VAL_GPIOG_ODR (PIN_ODR_HIGH(GPIOG_PIN0) | \
1022 PIN_ODR_HIGH(GPIOG_PIN1) | \
1023 PIN_ODR_HIGH(GPIOG_PIN2) | \
1024 PIN_ODR_HIGH(GPIOG_PIN3) | \
1025 PIN_ODR_HIGH(GPIOG_PIN4) | \
1026 PIN_ODR_HIGH(GPIOG_PIN5) | \
1027 PIN_ODR_HIGH(GPIOG_PIN6) | \
1028 PIN_ODR_HIGH(GPIOG_PIN7) | \
1029 PIN_ODR_HIGH(GPIOG_PIN8) | \
1030 PIN_ODR_HIGH(GPIOG_PIN9) | \
1031 PIN_ODR_HIGH(GPIOG_PIN10) | \
1032 PIN_ODR_HIGH(GPIOG_PIN11) | \
1033 PIN_ODR_HIGH(GPIOG_PIN12) | \
1034 PIN_ODR_HIGH(GPIOG_PIN13) | \
1035 PIN_ODR_HIGH(GPIOG_PIN14) | \
1036 PIN_ODR_HIGH(GPIOG_PIN15))
1037#define VAL_GPIOG_AFRL (PIN_AFIO_AF(GPIOG_PIN0, 0U) | \
1038 PIN_AFIO_AF(GPIOG_PIN1, 0U) | \
1039 PIN_AFIO_AF(GPIOG_PIN2, 0U) | \
1040 PIN_AFIO_AF(GPIOG_PIN3, 0U) | \
1041 PIN_AFIO_AF(GPIOG_PIN4, 0U) | \
1042 PIN_AFIO_AF(GPIOG_PIN5, 0U) | \
1043 PIN_AFIO_AF(GPIOG_PIN6, 0U) | \
1044 PIN_AFIO_AF(GPIOG_PIN7, 0U))
1045#define VAL_GPIOG_AFRH (PIN_AFIO_AF(GPIOG_PIN8, 0U) | \
1046 PIN_AFIO_AF(GPIOG_PIN9, 0U) | \
1047 PIN_AFIO_AF(GPIOG_PIN10, 0U) | \
1048 PIN_AFIO_AF(GPIOG_PIN11, 0U) | \
1049 PIN_AFIO_AF(GPIOG_PIN12, 0U) | \
1050 PIN_AFIO_AF(GPIOG_PIN13, 0U) | \
1051 PIN_AFIO_AF(GPIOG_PIN14, 0U) | \
1052 PIN_AFIO_AF(GPIOG_PIN15, 0U))
1053
1054/*
1055 * GPIOH setup:
1056 *
1057 * PH0 - OSC_IN (input floating).
1058 * PH1 - OSC_OUT (input floating).
1059 * PH2 - PIN2 (input pullup).
1060 * PH3 - PIN3 (input pullup).
1061 * PH4 - PIN4 (input pullup).
1062 * PH5 - PIN5 (input pullup).
1063 * PH6 - PIN6 (input pullup).
1064 * PH7 - PIN7 (input pullup).
1065 * PH8 - PIN8 (input pullup).
1066 * PH9 - PIN9 (input pullup).
1067 * PH10 - PIN10 (input pullup).
1068 * PH11 - PIN11 (input pullup).
1069 * PH12 - PIN12 (input pullup).
1070 * PH13 - PIN13 (input pullup).
1071 * PH14 - PIN14 (input pullup).
1072 * PH15 - PIN15 (input pullup).
1073 */
1074#define VAL_GPIOH_MODER (PIN_MODE_INPUT(GPIOH_OSC_IN) | \
1075 PIN_MODE_INPUT(GPIOH_OSC_OUT) | \
1076 PIN_MODE_INPUT(GPIOH_PIN2) | \
1077 PIN_MODE_INPUT(GPIOH_PIN3) | \
1078 PIN_MODE_INPUT(GPIOH_PIN4) | \
1079 PIN_MODE_INPUT(GPIOH_PIN5) | \
1080 PIN_MODE_INPUT(GPIOH_PIN6) | \
1081 PIN_MODE_INPUT(GPIOH_PIN7) | \
1082 PIN_MODE_INPUT(GPIOH_PIN8) | \
1083 PIN_MODE_INPUT(GPIOH_PIN9) | \
1084 PIN_MODE_INPUT(GPIOH_PIN10) | \
1085 PIN_MODE_INPUT(GPIOH_PIN11) | \
1086 PIN_MODE_INPUT(GPIOH_PIN12) | \
1087 PIN_MODE_INPUT(GPIOH_PIN13) | \
1088 PIN_MODE_INPUT(GPIOH_PIN14) | \
1089 PIN_MODE_INPUT(GPIOH_PIN15))
1090#define VAL_GPIOH_OTYPER (PIN_OTYPE_PUSHPULL(GPIOH_OSC_IN) | \
1091 PIN_OTYPE_PUSHPULL(GPIOH_OSC_OUT) | \
1092 PIN_OTYPE_PUSHPULL(GPIOH_PIN2) | \
1093 PIN_OTYPE_PUSHPULL(GPIOH_PIN3) | \
1094 PIN_OTYPE_PUSHPULL(GPIOH_PIN4) | \
1095 PIN_OTYPE_PUSHPULL(GPIOH_PIN5) | \
1096 PIN_OTYPE_PUSHPULL(GPIOH_PIN6) | \
1097 PIN_OTYPE_PUSHPULL(GPIOH_PIN7) | \
1098 PIN_OTYPE_PUSHPULL(GPIOH_PIN8) | \
1099 PIN_OTYPE_PUSHPULL(GPIOH_PIN9) | \
1100 PIN_OTYPE_PUSHPULL(GPIOH_PIN10) | \
1101 PIN_OTYPE_PUSHPULL(GPIOH_PIN11) | \
1102 PIN_OTYPE_PUSHPULL(GPIOH_PIN12) | \
1103 PIN_OTYPE_PUSHPULL(GPIOH_PIN13) | \
1104 PIN_OTYPE_PUSHPULL(GPIOH_PIN14) | \
1105 PIN_OTYPE_PUSHPULL(GPIOH_PIN15))
1106#define VAL_GPIOH_OSPEEDR (PIN_OSPEED_HIGH(GPIOH_OSC_IN) | \
1107 PIN_OSPEED_HIGH(GPIOH_OSC_OUT) | \
1108 PIN_OSPEED_HIGH(GPIOH_PIN2) | \
1109 PIN_OSPEED_HIGH(GPIOH_PIN3) | \
1110 PIN_OSPEED_HIGH(GPIOH_PIN4) | \
1111 PIN_OSPEED_HIGH(GPIOH_PIN5) | \
1112 PIN_OSPEED_HIGH(GPIOH_PIN6) | \
1113 PIN_OSPEED_HIGH(GPIOH_PIN7) | \
1114 PIN_OSPEED_HIGH(GPIOH_PIN8) | \
1115 PIN_OSPEED_HIGH(GPIOH_PIN9) | \
1116 PIN_OSPEED_HIGH(GPIOH_PIN10) | \
1117 PIN_OSPEED_HIGH(GPIOH_PIN11) | \
1118 PIN_OSPEED_HIGH(GPIOH_PIN12) | \
1119 PIN_OSPEED_HIGH(GPIOH_PIN13) | \
1120 PIN_OSPEED_HIGH(GPIOH_PIN14) | \
1121 PIN_OSPEED_HIGH(GPIOH_PIN15))
1122#define VAL_GPIOH_PUPDR (PIN_PUPDR_FLOATING(GPIOH_OSC_IN) | \
1123 PIN_PUPDR_FLOATING(GPIOH_OSC_OUT) | \
1124 PIN_PUPDR_PULLUP(GPIOH_PIN2) | \
1125 PIN_PUPDR_PULLUP(GPIOH_PIN3) | \
1126 PIN_PUPDR_PULLUP(GPIOH_PIN4) | \
1127 PIN_PUPDR_PULLUP(GPIOH_PIN5) | \
1128 PIN_PUPDR_PULLUP(GPIOH_PIN6) | \
1129 PIN_PUPDR_PULLUP(GPIOH_PIN7) | \
1130 PIN_PUPDR_PULLUP(GPIOH_PIN8) | \
1131 PIN_PUPDR_PULLUP(GPIOH_PIN9) | \
1132 PIN_PUPDR_PULLUP(GPIOH_PIN10) | \
1133 PIN_PUPDR_PULLUP(GPIOH_PIN11) | \
1134 PIN_PUPDR_PULLUP(GPIOH_PIN12) | \
1135 PIN_PUPDR_PULLUP(GPIOH_PIN13) | \
1136 PIN_PUPDR_PULLUP(GPIOH_PIN14) | \
1137 PIN_PUPDR_PULLUP(GPIOH_PIN15))
1138#define VAL_GPIOH_ODR (PIN_ODR_HIGH(GPIOH_OSC_IN) | \
1139 PIN_ODR_HIGH(GPIOH_OSC_OUT) | \
1140 PIN_ODR_HIGH(GPIOH_PIN2) | \
1141 PIN_ODR_HIGH(GPIOH_PIN3) | \
1142 PIN_ODR_HIGH(GPIOH_PIN4) | \
1143 PIN_ODR_HIGH(GPIOH_PIN5) | \
1144 PIN_ODR_HIGH(GPIOH_PIN6) | \
1145 PIN_ODR_HIGH(GPIOH_PIN7) | \
1146 PIN_ODR_HIGH(GPIOH_PIN8) | \
1147 PIN_ODR_HIGH(GPIOH_PIN9) | \
1148 PIN_ODR_HIGH(GPIOH_PIN10) | \
1149 PIN_ODR_HIGH(GPIOH_PIN11) | \
1150 PIN_ODR_HIGH(GPIOH_PIN12) | \
1151 PIN_ODR_HIGH(GPIOH_PIN13) | \
1152 PIN_ODR_HIGH(GPIOH_PIN14) | \
1153 PIN_ODR_HIGH(GPIOH_PIN15))
1154#define VAL_GPIOH_AFRL (PIN_AFIO_AF(GPIOH_OSC_IN, 0U) | \
1155 PIN_AFIO_AF(GPIOH_OSC_OUT, 0U) | \
1156 PIN_AFIO_AF(GPIOH_PIN2, 0U) | \
1157 PIN_AFIO_AF(GPIOH_PIN3, 0U) | \
1158 PIN_AFIO_AF(GPIOH_PIN4, 0U) | \
1159 PIN_AFIO_AF(GPIOH_PIN5, 0U) | \
1160 PIN_AFIO_AF(GPIOH_PIN6, 0U) | \
1161 PIN_AFIO_AF(GPIOH_PIN7, 0U))
1162#define VAL_GPIOH_AFRH (PIN_AFIO_AF(GPIOH_PIN8, 0U) | \
1163 PIN_AFIO_AF(GPIOH_PIN9, 0U) | \
1164 PIN_AFIO_AF(GPIOH_PIN10, 0U) | \
1165 PIN_AFIO_AF(GPIOH_PIN11, 0U) | \
1166 PIN_AFIO_AF(GPIOH_PIN12, 0U) | \
1167 PIN_AFIO_AF(GPIOH_PIN13, 0U) | \
1168 PIN_AFIO_AF(GPIOH_PIN14, 0U) | \
1169 PIN_AFIO_AF(GPIOH_PIN15, 0U))
1170
1171/*
1172 * GPIOI setup:
1173 *
1174 * PI0 - PIN0 (input pullup).
1175 * PI1 - PIN1 (input pullup).
1176 * PI2 - PIN2 (input pullup).
1177 * PI3 - PIN3 (input pullup).
1178 * PI4 - PIN4 (input pullup).
1179 * PI5 - PIN5 (input pullup).
1180 * PI6 - PIN6 (input pullup).
1181 * PI7 - PIN7 (input pullup).
1182 * PI8 - PIN8 (input pullup).
1183 * PI9 - PIN9 (input pullup).
1184 * PI10 - PIN10 (input pullup).
1185 * PI11 - PIN11 (input pullup).
1186 * PI12 - PIN12 (input pullup).
1187 * PI13 - PIN13 (input pullup).
1188 * PI14 - PIN14 (input pullup).
1189 * PI15 - PIN15 (input pullup).
1190 */
1191#define VAL_GPIOI_MODER (PIN_MODE_INPUT(GPIOI_PIN0) | \
1192 PIN_MODE_INPUT(GPIOI_PIN1) | \
1193 PIN_MODE_INPUT(GPIOI_PIN2) | \
1194 PIN_MODE_INPUT(GPIOI_PIN3) | \
1195 PIN_MODE_INPUT(GPIOI_PIN4) | \
1196 PIN_MODE_INPUT(GPIOI_PIN5) | \
1197 PIN_MODE_INPUT(GPIOI_PIN6) | \
1198 PIN_MODE_INPUT(GPIOI_PIN7) | \
1199 PIN_MODE_INPUT(GPIOI_PIN8) | \
1200 PIN_MODE_INPUT(GPIOI_PIN9) | \
1201 PIN_MODE_INPUT(GPIOI_PIN10) | \
1202 PIN_MODE_INPUT(GPIOI_PIN11) | \
1203 PIN_MODE_INPUT(GPIOI_PIN12) | \
1204 PIN_MODE_INPUT(GPIOI_PIN13) | \
1205 PIN_MODE_INPUT(GPIOI_PIN14) | \
1206 PIN_MODE_INPUT(GPIOI_PIN15))
1207#define VAL_GPIOI_OTYPER (PIN_OTYPE_PUSHPULL(GPIOI_PIN0) | \
1208 PIN_OTYPE_PUSHPULL(GPIOI_PIN1) | \
1209 PIN_OTYPE_PUSHPULL(GPIOI_PIN2) | \
1210 PIN_OTYPE_PUSHPULL(GPIOI_PIN3) | \
1211 PIN_OTYPE_PUSHPULL(GPIOI_PIN4) | \
1212 PIN_OTYPE_PUSHPULL(GPIOI_PIN5) | \
1213 PIN_OTYPE_PUSHPULL(GPIOI_PIN6) | \
1214 PIN_OTYPE_PUSHPULL(GPIOI_PIN7) | \
1215 PIN_OTYPE_PUSHPULL(GPIOI_PIN8) | \
1216 PIN_OTYPE_PUSHPULL(GPIOI_PIN9) | \
1217 PIN_OTYPE_PUSHPULL(GPIOI_PIN10) | \
1218 PIN_OTYPE_PUSHPULL(GPIOI_PIN11) | \
1219 PIN_OTYPE_PUSHPULL(GPIOI_PIN12) | \
1220 PIN_OTYPE_PUSHPULL(GPIOI_PIN13) | \
1221 PIN_OTYPE_PUSHPULL(GPIOI_PIN14) | \
1222 PIN_OTYPE_PUSHPULL(GPIOI_PIN15))
1223#define VAL_GPIOI_OSPEEDR (PIN_OSPEED_HIGH(GPIOI_PIN0) | \
1224 PIN_OSPEED_HIGH(GPIOI_PIN1) | \
1225 PIN_OSPEED_HIGH(GPIOI_PIN2) | \
1226 PIN_OSPEED_HIGH(GPIOI_PIN3) | \
1227 PIN_OSPEED_HIGH(GPIOI_PIN4) | \
1228 PIN_OSPEED_HIGH(GPIOI_PIN5) | \
1229 PIN_OSPEED_HIGH(GPIOI_PIN6) | \
1230 PIN_OSPEED_HIGH(GPIOI_PIN7) | \
1231 PIN_OSPEED_HIGH(GPIOI_PIN8) | \
1232 PIN_OSPEED_HIGH(GPIOI_PIN9) | \
1233 PIN_OSPEED_HIGH(GPIOI_PIN10) | \
1234 PIN_OSPEED_HIGH(GPIOI_PIN11) | \
1235 PIN_OSPEED_HIGH(GPIOI_PIN12) | \
1236 PIN_OSPEED_HIGH(GPIOI_PIN13) | \
1237 PIN_OSPEED_HIGH(GPIOI_PIN14) | \
1238 PIN_OSPEED_HIGH(GPIOI_PIN15))
1239#define VAL_GPIOI_PUPDR (PIN_PUPDR_PULLUP(GPIOI_PIN0) | \
1240 PIN_PUPDR_PULLUP(GPIOI_PIN1) | \
1241 PIN_PUPDR_PULLUP(GPIOI_PIN2) | \
1242 PIN_PUPDR_PULLUP(GPIOI_PIN3) | \
1243 PIN_PUPDR_PULLUP(GPIOI_PIN4) | \
1244 PIN_PUPDR_PULLUP(GPIOI_PIN5) | \
1245 PIN_PUPDR_PULLUP(GPIOI_PIN6) | \
1246 PIN_PUPDR_PULLUP(GPIOI_PIN7) | \
1247 PIN_PUPDR_PULLUP(GPIOI_PIN8) | \
1248 PIN_PUPDR_PULLUP(GPIOI_PIN9) | \
1249 PIN_PUPDR_PULLUP(GPIOI_PIN10) | \
1250 PIN_PUPDR_PULLUP(GPIOI_PIN11) | \
1251 PIN_PUPDR_PULLUP(GPIOI_PIN12) | \
1252 PIN_PUPDR_PULLUP(GPIOI_PIN13) | \
1253 PIN_PUPDR_PULLUP(GPIOI_PIN14) | \
1254 PIN_PUPDR_PULLUP(GPIOI_PIN15))
1255#define VAL_GPIOI_ODR (PIN_ODR_HIGH(GPIOI_PIN0) | \
1256 PIN_ODR_HIGH(GPIOI_PIN1) | \
1257 PIN_ODR_HIGH(GPIOI_PIN2) | \
1258 PIN_ODR_HIGH(GPIOI_PIN3) | \
1259 PIN_ODR_HIGH(GPIOI_PIN4) | \
1260 PIN_ODR_HIGH(GPIOI_PIN5) | \
1261 PIN_ODR_HIGH(GPIOI_PIN6) | \
1262 PIN_ODR_HIGH(GPIOI_PIN7) | \
1263 PIN_ODR_HIGH(GPIOI_PIN8) | \
1264 PIN_ODR_HIGH(GPIOI_PIN9) | \
1265 PIN_ODR_HIGH(GPIOI_PIN10) | \
1266 PIN_ODR_HIGH(GPIOI_PIN11) | \
1267 PIN_ODR_HIGH(GPIOI_PIN12) | \
1268 PIN_ODR_HIGH(GPIOI_PIN13) | \
1269 PIN_ODR_HIGH(GPIOI_PIN14) | \
1270 PIN_ODR_HIGH(GPIOI_PIN15))
1271#define VAL_GPIOI_AFRL (PIN_AFIO_AF(GPIOI_PIN0, 0U) | \
1272 PIN_AFIO_AF(GPIOI_PIN1, 0U) | \
1273 PIN_AFIO_AF(GPIOI_PIN2, 0U) | \
1274 PIN_AFIO_AF(GPIOI_PIN3, 0U) | \
1275 PIN_AFIO_AF(GPIOI_PIN4, 0U) | \
1276 PIN_AFIO_AF(GPIOI_PIN5, 0U) | \
1277 PIN_AFIO_AF(GPIOI_PIN6, 0U) | \
1278 PIN_AFIO_AF(GPIOI_PIN7, 0U))
1279#define VAL_GPIOI_AFRH (PIN_AFIO_AF(GPIOI_PIN8, 0U) | \
1280 PIN_AFIO_AF(GPIOI_PIN9, 0U) | \
1281 PIN_AFIO_AF(GPIOI_PIN10, 0U) | \
1282 PIN_AFIO_AF(GPIOI_PIN11, 0U) | \
1283 PIN_AFIO_AF(GPIOI_PIN12, 0U) | \
1284 PIN_AFIO_AF(GPIOI_PIN13, 0U) | \
1285 PIN_AFIO_AF(GPIOI_PIN14, 0U) | \
1286 PIN_AFIO_AF(GPIOI_PIN15, 0U))
1287
1288
1289#if !defined(_FROM_ASM_)
1290#ifdef __cplusplus
1291extern "C" {
1292#endif
1293 void boardInit(void);
1294#ifdef __cplusplus
1295}
1296#endif
1297#endif /* _FROM_ASM_ */
1298
1299#endif /* BOARD_H */
diff --git a/keyboards/matrix/abelx/boards/abelx_bd/board.mk b/keyboards/matrix/abelx/boards/abelx_bd/board.mk
new file mode 100644
index 000000000..a4404001f
--- /dev/null
+++ b/keyboards/matrix/abelx/boards/abelx_bd/board.mk
@@ -0,0 +1,9 @@
1# List of all the board related files.
2BOARDSRC = $(BOARD_PATH)/boards/abelx_bd/board.c
3
4# Required include directories
5BOARDINC = $(BOARD_PATH)/boards/abelx_bd
6
7# Shared variables
8ALLCSRC += $(BOARDSRC)
9ALLINC += $(BOARDINC)
diff --git a/keyboards/matrix/abelx/bootloader_defs.h b/keyboards/matrix/abelx/bootloader_defs.h
new file mode 100644
index 000000000..20b8f73e6
--- /dev/null
+++ b/keyboards/matrix/abelx/bootloader_defs.h
@@ -0,0 +1,7 @@
1/* Address for jumping to bootloader on STM32 chips. */
2/* It is chip dependent, the correct number can be looked up here:
3 * http://www.st.com/web/en/resource/technical/document/application_note/CD00167594.pdf
4 * This also requires a patch to chibios:
5 * <tmk_dir>/tmk_core/tool/chibios/ch-bootloader-jump.patch
6 */
7#define STM32_BOOTLOADER_ADDRESS 0x1FFF0000
diff --git a/keyboards/matrix/abelx/chconf.h b/keyboards/matrix/abelx/chconf.h
new file mode 100644
index 000000000..7dc4f84a8
--- /dev/null
+++ b/keyboards/matrix/abelx/chconf.h
@@ -0,0 +1,714 @@
1/*
2 ChibiOS - Copyright (C) 2006..2018 Giovanni Di Sirio
3
4 Licensed under the Apache License, Version 2.0 (the "License");
5 you may not use this file except in compliance with the License.
6 You may obtain a copy of the License at
7
8 http://www.apache.org/licenses/LICENSE-2.0
9
10 Unless required by applicable law or agreed to in writing, software
11 distributed under the License is distributed on an "AS IS" BASIS,
12 WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
13 See the License for the specific language governing permissions and
14 limitations under the License.
15*/
16
17/**
18 * @file rt/templates/chconf.h
19 * @brief Configuration file template.
20 * @details A copy of this file must be placed in each project directory, it
21 * contains the application specific kernel settings.
22 *
23 * @addtogroup config
24 * @details Kernel related settings and hooks.
25 * @{
26 */
27
28#ifndef CHCONF_H
29#define CHCONF_H
30
31#define _CHIBIOS_RT_CONF_
32#define _CHIBIOS_RT_CONF_VER_6_0_
33
34/*===========================================================================*/
35/**
36 * @name System timers settings
37 * @{
38 */
39/*===========================================================================*/
40
41/**
42 * @brief System time counter resolution.
43 * @note Allowed values are 16 or 32 bits.
44 */
45#if !defined(CH_CFG_ST_RESOLUTION)
46#define CH_CFG_ST_RESOLUTION 32
47#endif
48
49/**
50 * @brief System tick frequency.
51 * @details Frequency of the system timer that drives the system ticks. This
52 * setting also defines the system tick time unit.
53 */
54#if !defined(CH_CFG_ST_FREQUENCY)
55#define CH_CFG_ST_FREQUENCY 10000
56#endif
57
58/**
59 * @brief Time intervals data size.
60 * @note Allowed values are 16, 32 or 64 bits.
61 */
62#if !defined(CH_CFG_INTERVALS_SIZE)
63#define CH_CFG_INTERVALS_SIZE 32
64#endif
65
66/**
67 * @brief Time types data size.
68 * @note Allowed values are 16 or 32 bits.
69 */
70#if !defined(CH_CFG_TIME_TYPES_SIZE)
71#define CH_CFG_TIME_TYPES_SIZE 32
72#endif
73
74/**
75 * @brief Time delta constant for the tick-less mode.
76 * @note If this value is zero then the system uses the classic
77 * periodic tick. This value represents the minimum number
78 * of ticks that is safe to specify in a timeout directive.
79 * The value one is not valid, timeouts are rounded up to
80 * this value.
81 */
82#if !defined(CH_CFG_ST_TIMEDELTA)
83#define CH_CFG_ST_TIMEDELTA 2
84#endif
85
86/** @} */
87
88/*===========================================================================*/
89/**
90 * @name Kernel parameters and options
91 * @{
92 */
93/*===========================================================================*/
94
95/**
96 * @brief Round robin interval.
97 * @details This constant is the number of system ticks allowed for the
98 * threads before preemption occurs. Setting this value to zero
99 * disables the preemption for threads with equal priority and the
100 * round robin becomes cooperative. Note that higher priority
101 * threads can still preempt, the kernel is always preemptive.
102 * @note Disabling the round robin preemption makes the kernel more compact
103 * and generally faster.
104 * @note The round robin preemption is not supported in tickless mode and
105 * must be set to zero in that case.
106 */
107#if !defined(CH_CFG_TIME_QUANTUM)
108#define CH_CFG_TIME_QUANTUM 0
109#endif
110
111/**
112 * @brief Managed RAM size.
113 * @details Size of the RAM area to be managed by the OS. If set to zero
114 * then the whole available RAM is used. The core memory is made
115 * available to the heap allocator and/or can be used directly through
116 * the simplified core memory allocator.
117 *
118 * @note In order to let the OS manage the whole RAM the linker script must
119 * provide the @p __heap_base__ and @p __heap_end__ symbols.
120 * @note Requires @p CH_CFG_USE_MEMCORE.
121 */
122#if !defined(CH_CFG_MEMCORE_SIZE)
123#define CH_CFG_MEMCORE_SIZE 0
124#endif
125
126/**
127 * @brief Idle thread automatic spawn suppression.
128 * @details When this option is activated the function @p chSysInit()
129 * does not spawn the idle thread. The application @p main()
130 * function becomes the idle thread and must implement an
131 * infinite loop.
132 */
133#if !defined(CH_CFG_NO_IDLE_THREAD)
134#define CH_CFG_NO_IDLE_THREAD FALSE
135#endif
136
137/** @} */
138
139/*===========================================================================*/
140/**
141 * @name Performance options
142 * @{
143 */
144/*===========================================================================*/
145
146/**
147 * @brief OS optimization.
148 * @details If enabled then time efficient rather than space efficient code
149 * is used when two possible implementations exist.
150 *
151 * @note This is not related to the compiler optimization options.
152 * @note The default is @p TRUE.
153 */
154#if !defined(CH_CFG_OPTIMIZE_SPEED)
155#define CH_CFG_OPTIMIZE_SPEED TRUE
156#endif
157
158/** @} */
159
160/*===========================================================================*/
161/**
162 * @name Subsystem options
163 * @{
164 */
165/*===========================================================================*/
166
167/**
168 * @brief Time Measurement APIs.
169 * @details If enabled then the time measurement APIs are included in
170 * the kernel.
171 *
172 * @note The default is @p TRUE.
173 */
174#if !defined(CH_CFG_USE_TM)
175#define CH_CFG_USE_TM TRUE
176#endif
177
178/**
179 * @brief Threads registry APIs.
180 * @details If enabled then the registry APIs are included in the kernel.
181 *
182 * @note The default is @p TRUE.
183 */
184#if !defined(CH_CFG_USE_REGISTRY)
185#define CH_CFG_USE_REGISTRY TRUE
186#endif
187
188/**
189 * @brief Threads synchronization APIs.
190 * @details If enabled then the @p chThdWait() function is included in
191 * the kernel.
192 *
193 * @note The default is @p TRUE.
194 */
195#if !defined(CH_CFG_USE_WAITEXIT)
196#define CH_CFG_USE_WAITEXIT TRUE
197#endif
198
199/**
200 * @brief Semaphores APIs.
201 * @details If enabled then the Semaphores APIs are included in the kernel.
202 *
203 * @note The default is @p TRUE.
204 */
205#if !defined(CH_CFG_USE_SEMAPHORES)
206#define CH_CFG_USE_SEMAPHORES TRUE
207#endif
208
209/**
210 * @brief Semaphores queuing mode.
211 * @details If enabled then the threads are enqueued on semaphores by
212 * priority rather than in FIFO order.
213 *
214 * @note The default is @p FALSE. Enable this if you have special
215 * requirements.
216 * @note Requires @p CH_CFG_USE_SEMAPHORES.
217 */
218#if !defined(CH_CFG_USE_SEMAPHORES_PRIORITY)
219#define CH_CFG_USE_SEMAPHORES_PRIORITY FALSE
220#endif
221
222/**
223 * @brief Mutexes APIs.
224 * @details If enabled then the mutexes APIs are included in the kernel.
225 *
226 * @note The default is @p TRUE.
227 */
228#if !defined(CH_CFG_USE_MUTEXES)
229#define CH_CFG_USE_MUTEXES TRUE
230#endif
231
232/**
233 * @brief Enables recursive behavior on mutexes.
234 * @note Recursive mutexes are heavier and have an increased
235 * memory footprint.
236 *
237 * @note The default is @p FALSE.
238 * @note Requires @p CH_CFG_USE_MUTEXES.
239 */
240#if !defined(CH_CFG_USE_MUTEXES_RECURSIVE)
241#define CH_CFG_USE_MUTEXES_RECURSIVE FALSE
242#endif
243
244/**
245 * @brief Conditional Variables APIs.
246 * @details If enabled then the conditional variables APIs are included
247 * in the kernel.
248 *
249 * @note The default is @p TRUE.
250 * @note Requires @p CH_CFG_USE_MUTEXES.
251 */
252#if !defined(CH_CFG_USE_CONDVARS)
253#define CH_CFG_USE_CONDVARS TRUE
254#endif
255
256/**
257 * @brief Conditional Variables APIs with timeout.
258 * @details If enabled then the conditional variables APIs with timeout
259 * specification are included in the kernel.
260 *
261 * @note The default is @p TRUE.
262 * @note Requires @p CH_CFG_USE_CONDVARS.
263 */
264#if !defined(CH_CFG_USE_CONDVARS_TIMEOUT)
265#define CH_CFG_USE_CONDVARS_TIMEOUT TRUE
266#endif
267
268/**
269 * @brief Events Flags APIs.
270 * @details If enabled then the event flags APIs are included in the kernel.
271 *
272 * @note The default is @p TRUE.
273 */
274#if !defined(CH_CFG_USE_EVENTS)
275#define CH_CFG_USE_EVENTS TRUE
276#endif
277
278/**
279 * @brief Events Flags APIs with timeout.
280 * @details If enabled then the events APIs with timeout specification
281 * are included in the kernel.
282 *
283 * @note The default is @p TRUE.
284 * @note Requires @p CH_CFG_USE_EVENTS.
285 */
286#if !defined(CH_CFG_USE_EVENTS_TIMEOUT)
287#define CH_CFG_USE_EVENTS_TIMEOUT TRUE
288#endif
289
290/**
291 * @brief Synchronous Messages APIs.
292 * @details If enabled then the synchronous messages APIs are included
293 * in the kernel.
294 *
295 * @note The default is @p TRUE.
296 */
297#if !defined(CH_CFG_USE_MESSAGES)
298#define CH_CFG_USE_MESSAGES TRUE
299#endif
300
301/**
302 * @brief Synchronous Messages queuing mode.
303 * @details If enabled then messages are served by priority rather than in
304 * FIFO order.
305 *
306 * @note The default is @p FALSE. Enable this if you have special
307 * requirements.
308 * @note Requires @p CH_CFG_USE_MESSAGES.
309 */
310#if !defined(CH_CFG_USE_MESSAGES_PRIORITY)
311#define CH_CFG_USE_MESSAGES_PRIORITY FALSE
312#endif
313
314/**
315 * @brief Mailboxes APIs.
316 * @details If enabled then the asynchronous messages (mailboxes) APIs are
317 * included in the kernel.
318 *
319 * @note The default is @p TRUE.
320 * @note Requires @p CH_CFG_USE_SEMAPHORES.
321 */
322#if !defined(CH_CFG_USE_MAILBOXES)
323#define CH_CFG_USE_MAILBOXES TRUE
324#endif
325
326/**
327 * @brief Core Memory Manager APIs.
328 * @details If enabled then the core memory manager APIs are included
329 * in the kernel.
330 *
331 * @note The default is @p TRUE.
332 */
333#if !defined(CH_CFG_USE_MEMCORE)
334#define CH_CFG_USE_MEMCORE TRUE
335#endif
336
337/**
338 * @brief Heap Allocator APIs.
339 * @details If enabled then the memory heap allocator APIs are included
340 * in the kernel.
341 *
342 * @note The default is @p TRUE.
343 * @note Requires @p CH_CFG_USE_MEMCORE and either @p CH_CFG_USE_MUTEXES or
344 * @p CH_CFG_USE_SEMAPHORES.
345 * @note Mutexes are recommended.
346 */
347#if !defined(CH_CFG_USE_HEAP)
348#define CH_CFG_USE_HEAP TRUE
349#endif
350
351/**
352 * @brief Memory Pools Allocator APIs.
353 * @details If enabled then the memory pools allocator APIs are included
354 * in the kernel.
355 *
356 * @note The default is @p TRUE.
357 */
358#if !defined(CH_CFG_USE_MEMPOOLS)
359#define CH_CFG_USE_MEMPOOLS TRUE
360#endif
361
362/**
363 * @brief Objects FIFOs APIs.
364 * @details If enabled then the objects FIFOs APIs are included
365 * in the kernel.
366 *
367 * @note The default is @p TRUE.
368 */
369#if !defined(CH_CFG_USE_OBJ_FIFOS)
370#define CH_CFG_USE_OBJ_FIFOS TRUE
371#endif
372
373/**
374 * @brief Pipes APIs.
375 * @details If enabled then the pipes APIs are included
376 * in the kernel.
377 *
378 * @note The default is @p TRUE.
379 */
380#if !defined(CH_CFG_USE_PIPES)
381#define CH_CFG_USE_PIPES TRUE
382#endif
383
384/**
385 * @brief Dynamic Threads APIs.
386 * @details If enabled then the dynamic threads creation APIs are included
387 * in the kernel.
388 *
389 * @note The default is @p TRUE.
390 * @note Requires @p CH_CFG_USE_WAITEXIT.
391 * @note Requires @p CH_CFG_USE_HEAP and/or @p CH_CFG_USE_MEMPOOLS.
392 */
393#if !defined(CH_CFG_USE_DYNAMIC)
394#define CH_CFG_USE_DYNAMIC TRUE
395#endif
396
397/** @} */
398
399/*===========================================================================*/
400/**
401 * @name Objects factory options
402 * @{
403 */
404/*===========================================================================*/
405
406/**
407 * @brief Objects Factory APIs.
408 * @details If enabled then the objects factory APIs are included in the
409 * kernel.
410 *
411 * @note The default is @p FALSE.
412 */
413#if !defined(CH_CFG_USE_FACTORY)
414#define CH_CFG_USE_FACTORY TRUE
415#endif
416
417/**
418 * @brief Maximum length for object names.
419 * @details If the specified length is zero then the name is stored by
420 * pointer but this could have unintended side effects.
421 */
422#if !defined(CH_CFG_FACTORY_MAX_NAMES_LENGTH)
423#define CH_CFG_FACTORY_MAX_NAMES_LENGTH 8
424#endif
425
426/**
427 * @brief Enables the registry of generic objects.
428 */
429#if !defined(CH_CFG_FACTORY_OBJECTS_REGISTRY)
430#define CH_CFG_FACTORY_OBJECTS_REGISTRY TRUE
431#endif
432
433/**
434 * @brief Enables factory for generic buffers.
435 */
436#if !defined(CH_CFG_FACTORY_GENERIC_BUFFERS)
437#define CH_CFG_FACTORY_GENERIC_BUFFERS TRUE
438#endif
439
440/**
441 * @brief Enables factory for semaphores.
442 */
443#if !defined(CH_CFG_FACTORY_SEMAPHORES)
444#define CH_CFG_FACTORY_SEMAPHORES TRUE
445#endif
446
447/**
448 * @brief Enables factory for mailboxes.
449 */
450#if !defined(CH_CFG_FACTORY_MAILBOXES)
451#define CH_CFG_FACTORY_MAILBOXES TRUE
452#endif
453
454/**
455 * @brief Enables factory for objects FIFOs.
456 */
457#if !defined(CH_CFG_FACTORY_OBJ_FIFOS)
458#define CH_CFG_FACTORY_OBJ_FIFOS TRUE
459#endif
460
461/**
462 * @brief Enables factory for Pipes.
463 */
464#if !defined(CH_CFG_FACTORY_PIPES) || defined(__DOXYGEN__)
465#define CH_CFG_FACTORY_PIPES TRUE
466#endif
467
468/** @} */
469
470/*===========================================================================*/
471/**
472 * @name Debug options
473 * @{
474 */
475/*===========================================================================*/
476
477/**
478 * @brief Debug option, kernel statistics.
479 *
480 * @note The default is @p FALSE.
481 */
482#if !defined(CH_DBG_STATISTICS)
483#define CH_DBG_STATISTICS FALSE
484#endif
485
486/**
487 * @brief Debug option, system state check.
488 * @details If enabled the correct call protocol for system APIs is checked
489 * at runtime.
490 *
491 * @note The default is @p FALSE.
492 */
493#if !defined(CH_DBG_SYSTEM_STATE_CHECK)
494#define CH_DBG_SYSTEM_STATE_CHECK FALSE
495#endif
496
497/**
498 * @brief Debug option, parameters checks.
499 * @details If enabled then the checks on the API functions input
500 * parameters are activated.
501 *
502 * @note The default is @p FALSE.
503 */
504#if !defined(CH_DBG_ENABLE_CHECKS)
505#define CH_DBG_ENABLE_CHECKS FALSE
506#endif
507
508/**
509 * @brief Debug option, consistency checks.
510 * @details If enabled then all the assertions in the kernel code are
511 * activated. This includes consistency checks inside the kernel,
512 * runtime anomalies and port-defined checks.
513 *
514 * @note The default is @p FALSE.
515 */
516#if !defined(CH_DBG_ENABLE_ASSERTS)
517#define CH_DBG_ENABLE_ASSERTS FALSE
518#endif
519
520/**
521 * @brief Debug option, trace buffer.
522 * @details If enabled then the trace buffer is activated.
523 *
524 * @note The default is @p CH_DBG_TRACE_MASK_DISABLED.
525 */
526#if !defined(CH_DBG_TRACE_MASK)
527#define CH_DBG_TRACE_MASK CH_DBG_TRACE_MASK_DISABLED
528#endif
529
530/**
531 * @brief Trace buffer entries.
532 * @note The trace buffer is only allocated if @p CH_DBG_TRACE_MASK is
533 * different from @p CH_DBG_TRACE_MASK_DISABLED.
534 */
535#if !defined(CH_DBG_TRACE_BUFFER_SIZE)
536#define CH_DBG_TRACE_BUFFER_SIZE 128
537#endif
538
539/**
540 * @brief Debug option, stack checks.
541 * @details If enabled then a runtime stack check is performed.
542 *
543 * @note The default is @p FALSE.
544 * @note The stack check is performed in a architecture/port dependent way.
545 * It may not be implemented or some ports.
546 * @note The default failure mode is to halt the system with the global
547 * @p panic_msg variable set to @p NULL.
548 */
549#if !defined(CH_DBG_ENABLE_STACK_CHECK)
550#define CH_DBG_ENABLE_STACK_CHECK FALSE
551#endif
552
553/**
554 * @brief Debug option, stacks initialization.
555 * @details If enabled then the threads working area is filled with a byte
556 * value when a thread is created. This can be useful for the
557 * runtime measurement of the used stack.
558 *
559 * @note The default is @p FALSE.
560 */
561#if !defined(CH_DBG_FILL_THREADS)
562#define CH_DBG_FILL_THREADS FALSE
563#endif
564
565/**
566 * @brief Debug option, threads profiling.
567 * @details If enabled then a field is added to the @p thread_t structure that
568 * counts the system ticks occurred while executing the thread.
569 *
570 * @note The default is @p FALSE.
571 * @note This debug option is not currently compatible with the
572 * tickless mode.
573 */
574#if !defined(CH_DBG_THREADS_PROFILING)
575#define CH_DBG_THREADS_PROFILING FALSE
576#endif
577
578/** @} */
579
580/*===========================================================================*/
581/**
582 * @name Kernel hooks
583 * @{
584 */
585/*===========================================================================*/
586
587/**
588 * @brief System structure extension.
589 * @details User fields added to the end of the @p ch_system_t structure.
590 */
591#define CH_CFG_SYSTEM_EXTRA_FIELDS \
592 /* Add threads custom fields here.*/
593
594/**
595 * @brief System initialization hook.
596 * @details User initialization code added to the @p chSysInit() function
597 * just before interrupts are enabled globally.
598 */
599#define CH_CFG_SYSTEM_INIT_HOOK() { \
600 /* Add threads initialization code here.*/ \
601}
602
603/**
604 * @brief Threads descriptor structure extension.
605 * @details User fields added to the end of the @p thread_t structure.
606 */
607#define CH_CFG_THREAD_EXTRA_FIELDS \
608 /* Add threads custom fields here.*/
609
610/**
611 * @brief Threads initialization hook.
612 * @details User initialization code added to the @p _thread_init() function.
613 *
614 * @note It is invoked from within @p _thread_init() and implicitly from all
615 * the threads creation APIs.
616 */
617#define CH_CFG_THREAD_INIT_HOOK(tp) { \
618 /* Add threads initialization code here.*/ \
619}
620
621/**
622 * @brief Threads finalization hook.
623 * @details User finalization code added to the @p chThdExit() API.
624 */
625#define CH_CFG_THREAD_EXIT_HOOK(tp) { \
626 /* Add threads finalization code here.*/ \
627}
628
629/**
630 * @brief Context switch hook.
631 * @details This hook is invoked just before switching between threads.
632 */
633#define CH_CFG_CONTEXT_SWITCH_HOOK(ntp, otp) { \
634 /* Context switch code here.*/ \
635}
636
637/**
638 * @brief ISR enter hook.
639 */
640#define CH_CFG_IRQ_PROLOGUE_HOOK() { \
641 /* IRQ prologue code here.*/ \
642}
643
644/**
645 * @brief ISR exit hook.
646 */
647#define CH_CFG_IRQ_EPILOGUE_HOOK() { \
648 /* IRQ epilogue code here.*/ \
649}
650
651/**
652 * @brief Idle thread enter hook.
653 * @note This hook is invoked within a critical zone, no OS functions
654 * should be invoked from here.
655 * @note This macro can be used to activate a power saving mode.
656 */
657#define CH_CFG_IDLE_ENTER_HOOK() { \
658 /* Idle-enter code here.*/ \
659}
660
661/**
662 * @brief Idle thread leave hook.
663 * @note This hook is invoked within a critical zone, no OS functions
664 * should be invoked from here.
665 * @note This macro can be used to deactivate a power saving mode.
666 */
667#define CH_CFG_IDLE_LEAVE_HOOK() { \
668 /* Idle-leave code here.*/ \
669}
670
671/**
672 * @brief Idle Loop hook.
673 * @details This hook is continuously invoked by the idle thread loop.
674 */
675#define CH_CFG_IDLE_LOOP_HOOK() { \
676 /* Idle loop code here.*/ \
677}
678
679/**
680 * @brief System tick event hook.
681 * @details This hook is invoked in the system tick handler immediately
682 * after processing the virtual timers queue.
683 */
684#define CH_CFG_SYSTEM_TICK_HOOK() { \
685 /* System tick event code here.*/ \
686}
687
688/**
689 * @brief System halt hook.
690 * @details This hook is invoked in case to a system halting error before
691 * the system is halted.
692 */
693#define CH_CFG_SYSTEM_HALT_HOOK(reason) { \
694 /* System halt code here.*/ \
695}
696
697/**
698 * @brief Trace hook.
699 * @details This hook is invoked each time a new record is written in the
700 * trace buffer.
701 */
702#define CH_CFG_TRACE_HOOK(tep) { \
703 /* Trace code here.*/ \
704}
705
706/** @} */
707
708/*===========================================================================*/
709/* Port-specific settings (override port settings defaulted in chcore.h). */
710/*===========================================================================*/
711
712#endif /* CHCONF_H */
713
714/** @} */
diff --git a/keyboards/matrix/abelx/config.h b/keyboards/matrix/abelx/config.h
new file mode 100644
index 000000000..145bb3099
--- /dev/null
+++ b/keyboards/matrix/abelx/config.h
@@ -0,0 +1,108 @@
1/**
2 * config.h
3 *
4 * Copyright 2020 astro <yuleiz@gmail.com>
5 *
6 * This program is free software: you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License as published by
8 * the Free Software Foundation, either version 2 of the License, or
9 * (at your option) any later version.
10 *
11 * This program is distributed in the hope that it will be useful,
12 * but WITHOUT ANY WARRANTY; without even the implied warranty of
13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 * GNU General Public License for more details.
15 *
16 * You should have received a copy of the GNU General Public License
17 * along with this program. If not, see <http://www.gnu.org/licenses/>.
18 */
19
20#pragma once
21
22/* USB Device descriptor parameter */
23#define VENDOR_ID 0x4D58 // MX
24#define PRODUCT_ID 0xAB87 // abelx keyboard
25#define DEVICE_VER 0x0001
26#define MANUFACTURER MATRIX
27#define PRODUCT ABELX
28
29/* key matrix size */
30#define MATRIX_ROWS 6
31#define MATRIX_COLS 16
32
33#define DEF_PIN(port, pin) (((port) << 8) | pin)
34#define GET_PORT(pp) (((pp) >> 8) & 0xFF)
35#define GET_PIN(pp) ((pp) & 0xFF)
36
37#define MATRIX_ROW_PINS { \
38 DEF_PIN(TCA6424_PORT2, 7), \
39 DEF_PIN(TCA6424_PORT2, 6), \
40 DEF_PIN(TCA6424_PORT2, 0), \
41 DEF_PIN(TCA6424_PORT2, 2), \
42 DEF_PIN(TCA6424_PORT2, 4), \
43 DEF_PIN(TCA6424_PORT2, 5) }
44
45#define MATRIX_COL_PINS { \
46 DEF_PIN(TCA6424_PORT2, 1), \
47 DEF_PIN(TCA6424_PORT1, 7), \
48 DEF_PIN(TCA6424_PORT1, 6), \
49 DEF_PIN(TCA6424_PORT1, 5), \
50 DEF_PIN(TCA6424_PORT1, 4), \
51 DEF_PIN(TCA6424_PORT1, 3), \
52 DEF_PIN(TCA6424_PORT1, 2), \
53 DEF_PIN(TCA6424_PORT1, 1), \
54 DEF_PIN(TCA6424_PORT1, 0), \
55 DEF_PIN(TCA6424_PORT0, 7), \
56 DEF_PIN(TCA6424_PORT0, 6), \
57 DEF_PIN(TCA6424_PORT0, 5), \
58 DEF_PIN(TCA6424_PORT0, 4), \
59 DEF_PIN(TCA6424_PORT0, 3), \
60 DEF_PIN(TCA6424_PORT0, 2), \
61 DEF_PIN(TCA6424_PORT0, 1) }
62
63#define ROW1_MASK 0x80
64#define ROW2_MASK 0x40
65#define ROW3_MASK 0x01
66#define ROW4_MASK 0x04
67#define ROW5_MASK 0x10
68#define ROW6_MASK 0x20
69#define ROW_PORT TCA6424_PORT2
70
71#define COL1_MASK 0x02
72#define COL2_MASK 0x80
73#define COL3_MASK 0x40
74#define COL4_MASK 0x20
75#define COL5_MASK 0x10
76#define COL6_MASK 0x08
77#define COL7_MASK 0x04
78#define COL8_MASK 0x02
79#define COL9_MASK 0x01
80#define COL10_MASK 0x80
81#define COL11_MASK 0x40
82#define COL12_MASK 0x20
83#define COL13_MASK 0x10
84#define COL14_MASK 0x08
85#define COL15_MASK 0x04
86#define COL16_MASK 0x02
87
88#define UNUSED_PINS
89
90#define DIODE_DIRECTION COL2ROW
91#define DEBOUNCE 5
92
93// i2c setting
94#define USE_I2CV1
95#define I2C1_SCL 8
96#define I2C1_SDA 9
97#define I2C1_CLOCK_SPEED 400000
98#define I2C1_DUTY_CYCLE FAST_DUTY_CYCLE_2
99
100
101// rgb light setting
102#define RGBLED_NUM 9
103#define RGB_DI_PIN B4
104#define RGBLIGHT_ANIMATIONS
105
106#define AW9523B_RGB_NUM 4
107
108#define EARLY_INIT_PERFORM_BOOTLOADER_JUMP FALSE
diff --git a/keyboards/matrix/abelx/halconf.h b/keyboards/matrix/abelx/halconf.h
new file mode 100644
index 000000000..fb5a76072
--- /dev/null
+++ b/keyboards/matrix/abelx/halconf.h
@@ -0,0 +1,525 @@
1/*
2 ChibiOS - Copyright (C) 2006..2018 Giovanni Di Sirio
3
4 Licensed under the Apache License, Version 2.0 (the "License");
5 you may not use this file except in compliance with the License.
6 You may obtain a copy of the License at
7
8 http://www.apache.org/licenses/LICENSE-2.0
9
10 Unless required by applicable law or agreed to in writing, software
11 distributed under the License is distributed on an "AS IS" BASIS,
12 WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
13 See the License for the specific language governing permissions and
14 limitations under the License.
15*/
16
17/**
18 * @file templates/halconf.h
19 * @brief HAL configuration header.
20 * @details HAL configuration file, this file allows to enable or disable the
21 * various device drivers from your application. You may also use
22 * this file in order to override the device drivers default settings.
23 *
24 * @addtogroup HAL_CONF
25 * @{
26 */
27
28#ifndef HALCONF_H
29#define HALCONF_H
30
31#define _CHIBIOS_HAL_CONF_
32#define _CHIBIOS_HAL_CONF_VER_7_0_
33
34#include "mcuconf.h"
35
36/**
37 * @brief Enables the PAL subsystem.
38 */
39#if !defined(HAL_USE_PAL) || defined(__DOXYGEN__)
40#define HAL_USE_PAL TRUE
41#endif
42
43/**
44 * @brief Enables the ADC subsystem.
45 */
46#if !defined(HAL_USE_ADC) || defined(__DOXYGEN__)
47#define HAL_USE_ADC FALSE
48#endif
49
50/**
51 * @brief Enables the CAN subsystem.
52 */
53#if !defined(HAL_USE_CAN) || defined(__DOXYGEN__)
54#define HAL_USE_CAN FALSE
55#endif
56
57/**
58 * @brief Enables the cryptographic subsystem.
59 */
60#if !defined(HAL_USE_CRY) || defined(__DOXYGEN__)
61#define HAL_USE_CRY FALSE
62#endif
63
64/**
65 * @brief Enables the DAC subsystem.
66 */
67#if !defined(HAL_USE_DAC) || defined(__DOXYGEN__)
68#define HAL_USE_DAC FALSE
69#endif
70
71/**
72 * @brief Enables the GPT subsystem.
73 */
74#if !defined(HAL_USE_GPT) || defined(__DOXYGEN__)
75#define HAL_USE_GPT FALSE
76#endif
77
78/**
79 * @brief Enables the I2C subsystem.
80 */
81#if !defined(HAL_USE_I2C) || defined(__DOXYGEN__)
82#define HAL_USE_I2C TRUE
83#endif
84
85/**
86 * @brief Enables the I2S subsystem.
87 */
88#if !defined(HAL_USE_I2S) || defined(__DOXYGEN__)
89#define HAL_USE_I2S FALSE
90#endif
91
92/**
93 * @brief Enables the ICU subsystem.
94 */
95#if !defined(HAL_USE_ICU) || defined(__DOXYGEN__)
96#define HAL_USE_ICU FALSE
97#endif
98
99/**
100 * @brief Enables the MAC subsystem.
101 */
102#if !defined(HAL_USE_MAC) || defined(__DOXYGEN__)
103#define HAL_USE_MAC FALSE
104#endif
105
106/**
107 * @brief Enables the MMC_SPI subsystem.
108 */
109#if !defined(HAL_USE_MMC_SPI) || defined(__DOXYGEN__)
110#define HAL_USE_MMC_SPI FALSE
111#endif
112
113/**
114 * @brief Enables the PWM subsystem.
115 */
116#if !defined(HAL_USE_PWM) || defined(__DOXYGEN__)
117#define HAL_USE_PWM FALSE
118#endif
119
120/**
121 * @brief Enables the RTC subsystem.
122 */
123#if !defined(HAL_USE_RTC) || defined(__DOXYGEN__)
124#define HAL_USE_RTC TRUE
125#endif
126
127/**
128 * @brief Enables the SDC subsystem.
129 */
130#if !defined(HAL_USE_SDC) || defined(__DOXYGEN__)
131#define HAL_USE_SDC FALSE
132#endif
133
134/**
135 * @brief Enables the SERIAL subsystem.
136 */
137#if !defined(HAL_USE_SERIAL) || defined(__DOXYGEN__)
138#define HAL_USE_SERIAL FALSE
139#endif
140
141/**
142 * @brief Enables the SERIAL over USB subsystem.
143 */
144#if !defined(HAL_USE_SERIAL_USB) || defined(__DOXYGEN__)
145#define HAL_USE_SERIAL_USB FALSE
146#endif
147
148/**
149 * @brief Enables the SIO subsystem.
150 */
151#if !defined(HAL_USE_SIO) || defined(__DOXYGEN__)
152#define HAL_USE_SIO FALSE
153#endif
154
155/**
156 * @brief Enables the SPI subsystem.
157 */
158#if !defined(HAL_USE_SPI) || defined(__DOXYGEN__)
159#define HAL_USE_SPI FALSE
160#endif
161
162/**
163 * @brief Enables the TRNG subsystem.
164 */
165#if !defined(HAL_USE_TRNG) || defined(__DOXYGEN__)
166#define HAL_USE_TRNG FALSE
167#endif
168
169/**
170 * @brief Enables the UART subsystem.
171 */
172#if !defined(HAL_USE_UART) || defined(__DOXYGEN__)
173#define HAL_USE_UART TRUE
174#endif
175
176/**
177 * @brief Enables the USB subsystem.
178 */
179#if !defined(HAL_USE_USB) || defined(__DOXYGEN__)
180#define HAL_USE_USB TRUE
181#endif
182
183/**
184 * @brief Enables the WDG subsystem.
185 */
186#if !defined(HAL_USE_WDG) || defined(__DOXYGEN__)
187#define HAL_USE_WDG FALSE
188#endif
189
190/**
191 * @brief Enables the WSPI subsystem.
192 */
193#if !defined(HAL_USE_WSPI) || defined(__DOXYGEN__)
194#define HAL_USE_WSPI FALSE
195#endif
196
197/*===========================================================================*/
198/* PAL driver related settings. */
199/*===========================================================================*/
200
201/**
202 * @brief Enables synchronous APIs.
203 * @note Disabling this option saves both code and data space.
204 */
205#if !defined(PAL_USE_CALLBACKS) || defined(__DOXYGEN__)
206#define PAL_USE_CALLBACKS FALSE
207#endif
208
209/**
210 * @brief Enables synchronous APIs.
211 * @note Disabling this option saves both code and data space.
212 */
213#if !defined(PAL_USE_WAIT) || defined(__DOXYGEN__)
214#define PAL_USE_WAIT FALSE
215#endif
216
217/*===========================================================================*/
218/* ADC driver related settings. */
219/*===========================================================================*/
220
221/**
222 * @brief Enables synchronous APIs.
223 * @note Disabling this option saves both code and data space.
224 */
225#if !defined(ADC_USE_WAIT) || defined(__DOXYGEN__)
226#define ADC_USE_WAIT TRUE
227#endif
228
229/**
230 * @brief Enables the @p adcAcquireBus() and @p adcReleaseBus() APIs.
231 * @note Disabling this option saves both code and data space.
232 */
233#if !defined(ADC_USE_MUTUAL_EXCLUSION) || defined(__DOXYGEN__)
234#define ADC_USE_MUTUAL_EXCLUSION TRUE
235#endif
236
237/*===========================================================================*/
238/* CAN driver related settings. */
239/*===========================================================================*/
240
241/**
242 * @brief Sleep mode related APIs inclusion switch.
243 */
244#if !defined(CAN_USE_SLEEP_MODE) || defined(__DOXYGEN__)
245#define CAN_USE_SLEEP_MODE TRUE
246#endif
247
248/**
249 * @brief Enforces the driver to use direct callbacks rather than OSAL events.
250 */
251#if !defined(CAN_ENFORCE_USE_CALLBACKS) || defined(__DOXYGEN__)
252#define CAN_ENFORCE_USE_CALLBACKS FALSE
253#endif
254
255/*===========================================================================*/
256/* CRY driver related settings. */
257/*===========================================================================*/
258
259/**
260 * @brief Enables the SW fall-back of the cryptographic driver.
261 * @details When enabled, this option, activates a fall-back software
262 * implementation for algorithms not supported by the underlying
263 * hardware.
264 * @note Fall-back implementations may not be present for all algorithms.
265 */
266#if !defined(HAL_CRY_USE_FALLBACK) || defined(__DOXYGEN__)
267#define HAL_CRY_USE_FALLBACK FALSE
268#endif
269
270/**
271 * @brief Makes the driver forcibly use the fall-back implementations.
272 */
273#if !defined(HAL_CRY_ENFORCE_FALLBACK) || defined(__DOXYGEN__)
274#define HAL_CRY_ENFORCE_FALLBACK FALSE
275#endif
276
277/*===========================================================================*/
278/* DAC driver related settings. */
279/*===========================================================================*/
280
281/**
282 * @brief Enables synchronous APIs.
283 * @note Disabling this option saves both code and data space.
284 */
285#if !defined(DAC_USE_WAIT) || defined(__DOXYGEN__)
286#define DAC_USE_WAIT TRUE
287#endif
288
289/**
290 * @brief Enables the @p dacAcquireBus() and @p dacReleaseBus() APIs.
291 * @note Disabling this option saves both code and data space.
292 */
293#if !defined(DAC_USE_MUTUAL_EXCLUSION) || defined(__DOXYGEN__)
294#define DAC_USE_MUTUAL_EXCLUSION TRUE
295#endif
296
297/*===========================================================================*/
298/* I2C driver related settings. */
299/*===========================================================================*/
300
301/**
302 * @brief Enables the mutual exclusion APIs on the I2C bus.
303 */
304#if !defined(I2C_USE_MUTUAL_EXCLUSION) || defined(__DOXYGEN__)
305#define I2C_USE_MUTUAL_EXCLUSION TRUE
306#endif
307
308/*===========================================================================*/
309/* MAC driver related settings. */
310/*===========================================================================*/
311
312/**
313 * @brief Enables the zero-copy API.
314 */
315#if !defined(MAC_USE_ZERO_COPY) || defined(__DOXYGEN__)
316#define MAC_USE_ZERO_COPY FALSE
317#endif
318
319/**
320 * @brief Enables an event sources for incoming packets.
321 */
322#if !defined(MAC_USE_EVENTS) || defined(__DOXYGEN__)
323#define MAC_USE_EVENTS TRUE
324#endif
325
326/*===========================================================================*/
327/* MMC_SPI driver related settings. */
328/*===========================================================================*/
329
330/**
331 * @brief Delays insertions.
332 * @details If enabled this options inserts delays into the MMC waiting
333 * routines releasing some extra CPU time for the threads with
334 * lower priority, this may slow down the driver a bit however.
335 * This option is recommended also if the SPI driver does not
336 * use a DMA channel and heavily loads the CPU.
337 */
338#if !defined(MMC_NICE_WAITING) || defined(__DOXYGEN__)
339#define MMC_NICE_WAITING TRUE
340#endif
341
342/*===========================================================================*/
343/* SDC driver related settings. */
344/*===========================================================================*/
345
346/**
347 * @brief Number of initialization attempts before rejecting the card.
348 * @note Attempts are performed at 10mS intervals.
349 */
350#if !defined(SDC_INIT_RETRY) || defined(__DOXYGEN__)
351#define SDC_INIT_RETRY 100
352#endif
353
354/**
355 * @brief Include support for MMC cards.
356 * @note MMC support is not yet implemented so this option must be kept
357 * at @p FALSE.
358 */
359#if !defined(SDC_MMC_SUPPORT) || defined(__DOXYGEN__)
360#define SDC_MMC_SUPPORT FALSE
361#endif
362
363/**
364 * @brief Delays insertions.
365 * @details If enabled this options inserts delays into the MMC waiting
366 * routines releasing some extra CPU time for the threads with
367 * lower priority, this may slow down the driver a bit however.
368 */
369#if !defined(SDC_NICE_WAITING) || defined(__DOXYGEN__)
370#define SDC_NICE_WAITING TRUE
371#endif
372
373/**
374 * @brief OCR initialization constant for V20 cards.
375 */
376#if !defined(SDC_INIT_OCR_V20) || defined(__DOXYGEN__)
377#define SDC_INIT_OCR_V20 0x50FF8000U
378#endif
379
380/**
381 * @brief OCR initialization constant for non-V20 cards.
382 */
383#if !defined(SDC_INIT_OCR) || defined(__DOXYGEN__)
384#define SDC_INIT_OCR 0x80100000U
385#endif
386
387/*===========================================================================*/
388/* SERIAL driver related settings. */
389/*===========================================================================*/
390
391/**
392 * @brief Default bit rate.
393 * @details Configuration parameter, this is the baud rate selected for the
394 * default configuration.
395 */
396#if !defined(SERIAL_DEFAULT_BITRATE) || defined(__DOXYGEN__)
397#define SERIAL_DEFAULT_BITRATE 38400
398#endif
399
400/**
401 * @brief Serial buffers size.
402 * @details Configuration parameter, you can change the depth of the queue
403 * buffers depending on the requirements of your application.
404 * @note The default is 16 bytes for both the transmission and receive
405 * buffers.
406 */
407#if !defined(SERIAL_BUFFERS_SIZE) || defined(__DOXYGEN__)
408#define SERIAL_BUFFERS_SIZE 16
409#endif
410
411/*===========================================================================*/
412/* SERIAL_USB driver related setting. */
413/*===========================================================================*/
414
415/**
416 * @brief Serial over USB buffers size.
417 * @details Configuration parameter, the buffer size must be a multiple of
418 * the USB data endpoint maximum packet size.
419 * @note The default is 256 bytes for both the transmission and receive
420 * buffers.
421 */
422#if !defined(SERIAL_USB_BUFFERS_SIZE) || defined(__DOXYGEN__)
423#define SERIAL_USB_BUFFERS_SIZE 256
424#endif
425
426/**
427 * @brief Serial over USB number of buffers.
428 * @note The default is 2 buffers.
429 */
430#if !defined(SERIAL_USB_BUFFERS_NUMBER) || defined(__DOXYGEN__)
431#define SERIAL_USB_BUFFERS_NUMBER 2
432#endif
433
434/*===========================================================================*/
435/* SPI driver related settings. */
436/*===========================================================================*/
437
438/**
439 * @brief Enables synchronous APIs.
440 * @note Disabling this option saves both code and data space.
441 */
442#if !defined(SPI_USE_WAIT) || defined(__DOXYGEN__)
443#define SPI_USE_WAIT TRUE
444#endif
445
446/**
447 * @brief Enables circular transfers APIs.
448 * @note Disabling this option saves both code and data space.
449 */
450#if !defined(SPI_USE_CIRCULAR) || defined(__DOXYGEN__)
451#define SPI_USE_CIRCULAR FALSE
452#endif
453
454
455/**
456 * @brief Enables the @p spiAcquireBus() and @p spiReleaseBus() APIs.
457 * @note Disabling this option saves both code and data space.
458 */
459#if !defined(SPI_USE_MUTUAL_EXCLUSION) || defined(__DOXYGEN__)
460#define SPI_USE_MUTUAL_EXCLUSION FALSE
461#endif
462
463/**
464 * @brief Handling method for SPI CS line.
465 * @note Disabling this option saves both code and data space.
466 */
467#if !defined(SPI_SELECT_MODE) || defined(__DOXYGEN__)
468#define SPI_SELECT_MODE SPI_SELECT_MODE_PAD
469#endif
470
471/*===========================================================================*/
472/* UART driver related settings. */
473/*===========================================================================*/
474
475/**
476 * @brief Enables synchronous APIs.
477 * @note Disabling this option saves both code and data space.
478 */
479#if !defined(UART_USE_WAIT) || defined(__DOXYGEN__)
480#define UART_USE_WAIT FALSE
481#endif
482
483/**
484 * @brief Enables the @p uartAcquireBus() and @p uartReleaseBus() APIs.
485 * @note Disabling this option saves both code and data space.
486 */
487#if !defined(UART_USE_MUTUAL_EXCLUSION) || defined(__DOXYGEN__)
488#define UART_USE_MUTUAL_EXCLUSION FALSE
489#endif
490
491/*===========================================================================*/
492/* USB driver related settings. */
493/*===========================================================================*/
494
495/**
496 * @brief Enables synchronous APIs.
497 * @note Disabling this option saves both code and data space.
498 */
499#if !defined(USB_USE_WAIT) || defined(__DOXYGEN__)
500#define USB_USE_WAIT TRUE
501#endif
502
503/*===========================================================================*/
504/* WSPI driver related settings. */
505/*===========================================================================*/
506
507/**
508 * @brief Enables synchronous APIs.
509 * @note Disabling this option saves both code and data space.
510 */
511#if !defined(WSPI_USE_WAIT) || defined(__DOXYGEN__)
512#define WSPI_USE_WAIT TRUE
513#endif
514
515/**
516 * @brief Enables the @p wspiAcquireBus() and @p wspiReleaseBus() APIs.
517 * @note Disabling this option saves both code and data space.
518 */
519#if !defined(WSPI_USE_MUTUAL_EXCLUSION) || defined(__DOXYGEN__)
520#define WSPI_USE_MUTUAL_EXCLUSION TRUE
521#endif
522
523#endif /* HALCONF_H */
524
525/** @} */
diff --git a/keyboards/matrix/abelx/info.json b/keyboards/matrix/abelx/info.json
new file mode 100644
index 000000000..18bed65bc
--- /dev/null
+++ b/keyboards/matrix/abelx/info.json
@@ -0,0 +1,15 @@
1{
2 "keyboard_name": "Matrix ABELX keyboard",
3 "url": "",
4 "maintainer": "qmk",
5 "width": 18.25,
6 "height": 6.5,
7 "layouts": {
8 "LAYOUT_tkl_ansi": {
9 "layout": [{"label":"Esc", "x":0, "y":0}, {"label":"F1", "x":2, "y":0}, {"label":"F2", "x":3, "y":0}, {"label":"F3", "x":4, "y":0}, {"label":"F4", "x":5, "y":0}, {"label":"F5", "x":6.5, "y":0}, {"label":"F6", "x":7.5, "y":0}, {"label":"F7", "x":8.5, "y":0}, {"label":"F8", "x":9.5, "y":0}, {"label":"F9", "x":11, "y":0}, {"label":"F10", "x":12, "y":0}, {"label":"F11", "x":13, "y":0}, {"label":"F12", "x":14, "y":0}, {"label":"PrtSc", "x":15.25, "y":0}, {"label":"Scroll Lock", "x":16.25, "y":0}, {"label":"Pause", "x":17.25, "y":0}, {"label":"~", "x":0, "y":1.5}, {"label":"!", "x":1, "y":1.5}, {"label":"@", "x":2, "y":1.5}, {"label":"#", "x":3, "y":1.5}, {"label":"$", "x":4, "y":1.5}, {"label":"%", "x":5, "y":1.5}, {"label":"^", "x":6, "y":1.5}, {"label":"&", "x":7, "y":1.5}, {"label":"*", "x":8, "y":1.5}, {"label":"(", "x":9, "y":1.5}, {"label":")", "x":10, "y":1.5}, {"label":"_", "x":11, "y":1.5}, {"label":"+", "x":12, "y":1.5}, {"label":"Backspace", "x":13, "y":1.5, "w":2}, {"label":"Insert", "x":15.25, "y":1.5}, {"label":"Home", "x":16.25, "y":1.5}, {"label":"PgUp", "x":17.25, "y":1.5}, {"label":"Tab", "x":0, "y":2.5, "w":1.5}, {"label":"Q", "x":1.5, "y":2.5}, {"label":"W", "x":2.5, "y":2.5}, {"label":"E", "x":3.5, "y":2.5}, {"label":"R", "x":4.5, "y":2.5}, {"label":"T", "x":5.5, "y":2.5}, {"label":"Y", "x":6.5, "y":2.5}, {"label":"U", "x":7.5, "y":2.5}, {"label":"I", "x":8.5, "y":2.5}, {"label":"O", "x":9.5, "y":2.5}, {"label":"P", "x":10.5, "y":2.5}, {"label":"{", "x":11.5, "y":2.5}, {"label":"}", "x":12.5, "y":2.5}, {"label":"|", "x":13.5, "y":2.5, "w":1.5}, {"label":"Delete", "x":15.25, "y":2.5}, {"label":"End", "x":16.25, "y":2.5}, {"label":"PgDn", "x":17.25, "y":2.5}, {"label":"Caps Lock", "x":0, "y":3.5, "w":1.75}, {"label":"A", "x":1.75, "y":3.5}, {"label":"S", "x":2.75, "y":3.5}, {"label":"D", "x":3.75, "y":3.5}, {"label":"F", "x":4.75, "y":3.5}, {"label":"G", "x":5.75, "y":3.5}, {"label":"H", "x":6.75, "y":3.5}, {"label":"J", "x":7.75, "y":3.5}, {"label":"K", "x":8.75, "y":3.5}, {"label":"L", "x":9.75, "y":3.5}, {"label":":", "x":10.75, "y":3.5}, {"label":"\"", "x":11.75, "y":3.5}, {"label":"Enter", "x":12.75, "y":3.5, "w":2.25}, {"label":"Shift", "x":0, "y":4.5, "w":2.25}, {"label":"Z", "x":2.25, "y":4.5}, {"label":"X", "x":3.25, "y":4.5}, {"label":"C", "x":4.25, "y":4.5}, {"label":"V", "x":5.25, "y":4.5}, {"label":"B", "x":6.25, "y":4.5}, {"label":"N", "x":7.25, "y":4.5}, {"label":"M", "x":8.25, "y":4.5}, {"label":"<", "x":9.25, "y":4.5}, {"label":">", "x":10.25, "y":4.5}, {"label":"?", "x":11.25, "y":4.5}, {"label":"Shift", "x":12.25, "y":4.5, "w":2.75}, {"label":"\u2191", "x":16.25, "y":4.5}, {"label":"Ctrl", "x":0, "y":5.5, "w":1.25}, {"label":"Win", "x":1.25, "y":5.5, "w":1.25}, {"label":"Alt", "x":2.5, "y":5.5, "w":1.25}, {"x":3.75, "y":5.5, "w":6.25}, {"label":"Alt", "x":10, "y":5.5, "w":1.25}, {"label":"Win", "x":11.25, "y":5.5, "w":1.25},{"label":"Menu", "x":12.5, "y":5.5, "w":1.25}, {"label":"Ctrl", "x":13.75, "y":5.5, "w":1.25}, {"label":"\u2190", "x":15.25, "y":5.5}, {"label":"\u2193", "x":16.25, "y":5.5}, {"label":"\u2192", "x":17.25, "y":5.5}]
10 },
11 "LAYOUT_tkl_iso": {
12 "layout": [{"label":"Esc", "x":0, "y":0}, {"label":"F1", "x":2, "y":0}, {"label":"F2", "x":3, "y":0}, {"label":"F3", "x":4, "y":0}, {"label":"F4", "x":5, "y":0}, {"label":"F5", "x":6.5, "y":0}, {"label":"F6", "x":7.5, "y":0}, {"label":"F7", "x":8.5, "y":0}, {"label":"F8", "x":9.5, "y":0}, {"label":"F9", "x":11, "y":0}, {"label":"F10", "x":12, "y":0}, {"label":"F11", "x":13, "y":0}, {"label":"F12", "x":14, "y":0}, {"label":"PrtSc", "x":15.25, "y":0}, {"label":"Scroll Lock", "x":16.25, "y":0}, {"label":"Pause", "x":17.25, "y":0}, {"label":"\u00ac", "x":0, "y":1.5}, {"label":"!", "x":1, "y":1.5}, {"label":"\"", "x":2, "y":1.5}, {"label":"\u00a3", "x":3, "y":1.5}, {"label":"$", "x":4, "y":1.5}, {"label":"%", "x":5, "y":1.5}, {"label":"^", "x":6, "y":1.5}, {"label":"&", "x":7, "y":1.5}, {"label":"*", "x":8, "y":1.5}, {"label":"(", "x":9, "y":1.5}, {"label":")", "x":10, "y":1.5}, {"label":"_", "x":11, "y":1.5}, {"label":"+", "x":12, "y":1.5}, {"label":"Backspace", "x":13, "y":1.5, "w":2}, {"label":"Insert", "x":15.25, "y":1.5}, {"label":"Home", "x":16.25, "y":1.5}, {"label":"PgUp", "x":17.25, "y":1.5}, {"label":"Tab", "x":0, "y":2.5, "w":1.5}, {"label":"Q", "x":1.5, "y":2.5}, {"label":"W", "x":2.5, "y":2.5}, {"label":"E", "x":3.5, "y":2.5}, {"label":"R", "x":4.5, "y":2.5}, {"label":"T", "x":5.5, "y":2.5}, {"label":"Y", "x":6.5, "y":2.5}, {"label":"U", "x":7.5, "y":2.5}, {"label":"I", "x":8.5, "y":2.5}, {"label":"O", "x":9.5, "y":2.5}, {"label":"P", "x":10.5, "y":2.5}, {"label":"{", "x":11.5, "y":2.5}, {"label":"}", "x":12.5, "y":2.5}, {"label":"Delete", "x":15.25, "y":2.5}, {"label":"End", "x":16.25, "y":2.5}, {"label":"PgDn", "x":17.25, "y":2.5}, {"label":"Caps Lock", "x":0, "y":3.5, "w":1.75}, {"label":"A", "x":1.75, "y":3.5}, {"label":"S", "x":2.75, "y":3.5}, {"label":"D", "x":3.75, "y":3.5}, {"label":"F", "x":4.75, "y":3.5}, {"label":"G", "x":5.75, "y":3.5}, {"label":"H", "x":6.75, "y":3.5}, {"label":"J", "x":7.75, "y":3.5}, {"label":"K", "x":8.75, "y":3.5}, {"label":"L", "x":9.75, "y":3.5}, {"label":":", "x":10.75, "y":3.5}, {"label":"@", "x":11.75, "y":3.5}, {"label":"~", "x":12.75, "y":3.5}, {"label":"Enter", "x":13.75, "y":2.5, "w":1.25, "h":2}, {"label":"Shift", "x":0, "y":4.5, "w":1.25}, {"label":"|", "x":1.25, "y":4.5}, {"label":"Z", "x":2.25, "y":4.5}, {"label":"X", "x":3.25, "y":4.5}, {"label":"C", "x":4.25, "y":4.5}, {"label":"V", "x":5.25, "y":4.5}, {"label":"B", "x":6.25, "y":4.5}, {"label":"N", "x":7.25, "y":4.5}, {"label":"M", "x":8.25, "y":4.5}, {"label":"<", "x":9.25, "y":4.5}, {"label":">", "x":10.25, "y":4.5}, {"label":"?", "x":11.25, "y":4.5}, {"label":"Shift", "x":12.25, "y":4.5, "w":2.75}, {"label":"\u2191", "x":16.25, "y":4.5}, {"label":"Ctrl", "x":0, "y":5.5, "w":1.25}, {"label":"Win", "x":1.25, "y":5.5, "w":1.25}, {"label":"Alt", "x":2.5, "y":5.5, "w":1.25}, {"x":3.75, "y":5.5, "w":6.25}, {"label":"Alt", "x":10, "y":5.5, "w":1.25}, {"label":"Win", "x":11.25, "y":5.5, "w":1.25},{"label":"Menu", "x":12.5, "y":5.5, "w":1.25}, {"label":"Ctrl", "x":13.75, "y":5.5, "w":1.25}, {"label":"\u2190", "x":15.25, "y":5.5}, {"label":"\u2193", "x":16.25, "y":5.5}, {"label":"\u2192", "x":17.25, "y":5.5}]
13 }
14 }
15}
diff --git a/keyboards/matrix/abelx/keymaps/default/keymap.c b/keyboards/matrix/abelx/keymaps/default/keymap.c
new file mode 100644
index 000000000..ecba6d6d1
--- /dev/null
+++ b/keyboards/matrix/abelx/keymaps/default/keymap.c
@@ -0,0 +1,41 @@
1/**
2 * keymap.c
3 *
4 * Copyright 2020 astro <yuleiz@gmail.com>
5 *
6 * This program is free software: you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License as published by
8 * the Free Software Foundation, either version 2 of the License, or
9 * (at your option) any later version.
10 *
11 * This program is distributed in the hope that it will be useful,
12 * but WITHOUT ANY WARRANTY; without even the implied warranty of
13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 * GNU General Public License for more details.
15 *
16 * You should have received a copy of the GNU General Public License
17 * along with this program. If not, see <http://www.gnu.org/licenses/>.
18 */
19
20#include QMK_KEYBOARD_H
21
22const uint16_t PROGMEM keymaps[][MATRIX_ROWS][MATRIX_COLS] = {
23 [0]=LAYOUT_tkl_ansi(
24
25 KC_ESC, KC_F1, KC_F2, KC_F3, KC_F4, KC_F5, KC_F6, KC_F7, KC_F8, KC_F9, KC_F10, KC_F11, KC_F12, KC_PSCR, KC_SLCK, LT(1,KC_PAUS),
26
27 KC_GRV, KC_1, KC_2, KC_3, KC_4, KC_5, KC_6, KC_7, KC_8, KC_9, KC_0, KC_MINS, KC_EQL, KC_BSPC, KC_INS, KC_HOME, KC_PGUP,
28 KC_TAB, KC_Q, KC_W, KC_E, KC_R, KC_T, KC_Y, KC_U, KC_I, KC_O, KC_P, KC_LBRC, KC_RBRC, KC_BSLS, KC_DEL, KC_END, KC_PGDN,
29 KC_CAPS, KC_A, KC_S, KC_D, KC_F, KC_G, KC_H, KC_J, KC_K, KC_L, KC_SCLN, KC_QUOT, KC_ENT,
30 KC_LSFT, KC_Z, KC_X, KC_C, KC_V, KC_B, KC_N, KC_M, KC_COMM, KC_DOT, KC_SLSH, KC_RSFT, KC_UP,
31 KC_LCTL, KC_LGUI, KC_LALT, KC_SPC, KC_RALT,KC_RALT, MO(1), KC_RCTL, KC_LEFT, KC_DOWN, KC_RIGHT),
32
33 [1]=LAYOUT_tkl_ansi(
34 KC_MUTE, _______, _______, _______, _______, _______, _______, _______, _______, _______, _______, _______, _______, _______, _______, _______,
35
36 _______, _______, _______, _______, _______, _______, _______, _______, _______, _______, _______, _______, _______, _______, _______, _______, _______,
37 KC_NLCK, RGB_TOG, RGB_MOD, RGB_HUI, RGB_HUD, RGB_SAI, RGB_SAD, RGB_VAI, RGB_VAD, _______, _______, _______, _______, _______, _______, _______, _______,
38 RESET, _______, _______, _______, _______, _______, _______, _______, _______, _______, _______, _______, _______,
39 _______, _______, _______, _______, _______, _______, _______, _______, _______, _______, _______, _______, KC_VOLU,
40 _______, _______, _______, KC_MPLY, _______, _______, _______, _______, KC_MPRV, KC_VOLD, KC_MNXT),
41};
diff --git a/keyboards/matrix/abelx/keymaps/iso/keymap.c b/keyboards/matrix/abelx/keymaps/iso/keymap.c
new file mode 100644
index 000000000..81cfcd74d
--- /dev/null
+++ b/keyboards/matrix/abelx/keymaps/iso/keymap.c
@@ -0,0 +1,39 @@
1/**
2 * keymap.c
3 *
4 * Copyright 2020 astro <yuleiz@gmail.com>
5 *
6 * This program is free software: you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License as published by
8 * the Free Software Foundation, either version 2 of the License, or
9 * (at your option) any later version.
10 *
11 * This program is distributed in the hope that it will be useful,
12 * but WITHOUT ANY WARRANTY; without even the implied warranty of
13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 * GNU General Public License for more details.
15 *
16 * You should have received a copy of the GNU General Public License
17 * along with this program. If not, see <http://www.gnu.org/licenses/>.
18 */
19
20#include QMK_KEYBOARD_H
21
22const uint16_t PROGMEM keymaps[][MATRIX_ROWS][MATRIX_COLS] = {
23 [0]=LAYOUT_tkl_iso(
24 KC_ESC, KC_F1, KC_F2, KC_F3, KC_F4, KC_F5, KC_F6, KC_F7, KC_F8, KC_F9, KC_F10, KC_F11, KC_F12, KC_PSCR, KC_SLCK, LT(1,KC_PAUS),
25 KC_GRV, KC_1, KC_2, KC_3, KC_4, KC_5, KC_6, KC_7, KC_8, KC_9, KC_0, KC_MINS, KC_EQL, KC_BSPC, KC_INS, KC_HOME, KC_PGUP,
26 KC_TAB, KC_Q, KC_W, KC_E, KC_R, KC_T, KC_Y, KC_U, KC_I, KC_O, KC_P, KC_LBRC, KC_RBRC, KC_DEL, KC_END, KC_PGDN,
27 KC_CAPS, KC_A, KC_S, KC_D, KC_F, KC_G, KC_H, KC_J, KC_K, KC_L, KC_SCLN, KC_QUOT, KC_BSLS, KC_ENT,
28 KC_LSFT, KC_LGUI, KC_Z, KC_X, KC_C, KC_V, KC_B, KC_N, KC_M, KC_COMM, KC_DOT, KC_SLSH, KC_RSFT, KC_UP,
29 KC_LCTL, KC_LGUI, KC_LALT, KC_SPC, KC_RALT,KC_RALT, MO(1), KC_RCTL, KC_LEFT, KC_DOWN, KC_RGHT),
30
31 [1]=LAYOUT_tkl_iso(
32 KC_MUTE, _______, _______, _______, _______, _______, _______, _______, _______, _______, _______, _______, _______, _______, _______, _______,
33
34 _______, _______, _______, _______, _______, _______, _______, _______, _______, _______, _______, _______, _______, _______, _______, _______, _______,
35 KC_NLCK, RGB_TOG, RGB_MOD, RGB_HUI, RGB_HUD, RGB_SAI, RGB_SAD, RGB_VAI, RGB_VAD, _______, _______, _______, _______, _______, _______, _______,
36 RESET, _______, _______, _______, _______, _______, _______, _______, _______, _______, _______, _______, _______, _______,
37 _______, _______, _______, _______, _______, _______, _______, _______, _______, _______, _______, _______, _______, KC_VOLU,
38 _______, _______, _______, KC_MPLY, _______, _______, _______, _______, KC_MPRV, KC_VOLD, KC_MNXT),
39};
diff --git a/keyboards/matrix/abelx/ld/abelx_boot.ld b/keyboards/matrix/abelx/ld/abelx_boot.ld
new file mode 100644
index 000000000..3abdd1529
--- /dev/null
+++ b/keyboards/matrix/abelx/ld/abelx_boot.ld
@@ -0,0 +1,85 @@
1/*
2 ChibiOS - Copyright (C) 2006..2016 Giovanni Di Sirio
3
4 Licensed under the Apache License, Version 2.0 (the "License");
5 you may not use this file except in compliance with the License.
6 You may obtain a copy of the License at
7
8 http://www.apache.org/licenses/LICENSE-2.0
9
10 Unless required by applicable law or agreed to in writing, software
11 distributed under the License is distributed on an "AS IS" BASIS,
12 WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
13 See the License for the specific language governing permissions and
14 limitations under the License.
15*/
16
17/*
18 * STM32F411xE memory setup.
19 */
20MEMORY
21{
22 flash0 : org = 0x08020000, len = 512k-128k
23 flash1 : org = 0x00000000, len = 0
24 flash2 : org = 0x00000000, len = 0
25 flash3 : org = 0x00000000, len = 0
26 flash4 : org = 0x00000000, len = 0
27 flash5 : org = 0x00000000, len = 0
28 flash6 : org = 0x00000000, len = 0
29 flash7 : org = 0x00000000, len = 0
30 ram0 : org = 0x20000000, len = 128k
31 ram1 : org = 0x00000000, len = 0
32 ram2 : org = 0x00000000, len = 0
33 ram3 : org = 0x00000000, len = 0
34 ram4 : org = 0x00000000, len = 0
35 ram5 : org = 0x00000000, len = 0
36 ram6 : org = 0x00000000, len = 0
37 ram7 : org = 0x00000000, len = 0
38}
39
40/* For each data/text section two region are defined, a virtual region
41 and a load region (_LMA suffix).*/
42
43/* Flash region to be used for exception vectors.*/
44REGION_ALIAS("VECTORS_FLASH", flash0);
45REGION_ALIAS("VECTORS_FLASH_LMA", flash0);
46
47/* Flash region to be used for constructors and destructors.*/
48REGION_ALIAS("XTORS_FLASH", flash0);
49REGION_ALIAS("XTORS_FLASH_LMA", flash0);
50
51/* Flash region to be used for code text.*/
52REGION_ALIAS("TEXT_FLASH", flash0);
53REGION_ALIAS("TEXT_FLASH_LMA", flash0);
54
55/* Flash region to be used for read only data.*/
56REGION_ALIAS("RODATA_FLASH", flash0);
57REGION_ALIAS("RODATA_FLASH_LMA", flash0);
58
59/* Flash region to be used for various.*/
60REGION_ALIAS("VARIOUS_FLASH", flash0);
61REGION_ALIAS("VARIOUS_FLASH_LMA", flash0);
62
63/* Flash region to be used for RAM(n) initialization data.*/
64REGION_ALIAS("RAM_INIT_FLASH_LMA", flash0);
65
66/* RAM region to be used for Main stack. This stack accommodates the processing
67 of all exceptions and interrupts.*/
68REGION_ALIAS("MAIN_STACK_RAM", ram0);
69
70/* RAM region to be used for the process stack. This is the stack used by
71 the main() function.*/
72REGION_ALIAS("PROCESS_STACK_RAM", ram0);
73
74/* RAM region to be used for data segment.*/
75REGION_ALIAS("DATA_RAM", ram0);
76REGION_ALIAS("DATA_RAM_LMA", flash0);
77
78/* RAM region to be used for BSS segment.*/
79REGION_ALIAS("BSS_RAM", ram0);
80
81/* RAM region to be used for the default heap.*/
82REGION_ALIAS("HEAP_RAM", ram0);
83
84/* Generic rules inclusion.*/
85INCLUDE rules.ld
diff --git a/keyboards/matrix/abelx/matrix.c b/keyboards/matrix/abelx/matrix.c
new file mode 100644
index 000000000..56129bd0b
--- /dev/null
+++ b/keyboards/matrix/abelx/matrix.c
@@ -0,0 +1,108 @@
1/**
2 * matrix.c
3 *
4 * Copyright 2020 astro <yuleiz@gmail.com>
5 *
6 * This program is free software: you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License as published by
8 * the Free Software Foundation, either version 2 of the License, or
9 * (at your option) any later version.
10 *
11 * This program is distributed in the hope that it will be useful,
12 * but WITHOUT ANY WARRANTY; without even the implied warranty of
13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 * GNU General Public License for more details.
15 *
16 * You should have received a copy of the GNU General Public License
17 * along with this program. If not, see <http://www.gnu.org/licenses/>.
18 */
19
20#include <stdint.h>
21#include <stdbool.h>
22#include <string.h>
23#include "quantum.h"
24#include "matrix.h"
25#include "tca6424.h"
26#include "abelx.h"
27
28static const uint16_t col_pins[MATRIX_COLS] = MATRIX_COL_PINS;
29
30void matrix_init_custom(void)
31{
32 tca6424_init();
33 // set port0
34 tca6424_write_config(TCA6424_PORT0, 0);
35 // set port1
36 tca6424_write_config(TCA6424_PORT1, 0);
37 // set port2
38 tca6424_write_config(TCA6424_PORT2, 0xF5);
39
40 // clear output
41 tca6424_write_port(TCA6424_PORT0, 0);
42 tca6424_write_port(TCA6424_PORT1, 0);
43 tca6424_write_port(TCA6424_PORT2, 0);
44}
45
46
47static uint8_t row_mask[] = {ROW1_MASK,ROW2_MASK,ROW3_MASK,ROW4_MASK,ROW5_MASK,ROW6_MASK};
48static uint8_t col_mask[] = {COL1_MASK, COL2_MASK, COL3_MASK, COL4_MASK, COL5_MASK, COL6_MASK, COL7_MASK, COL8_MASK, COL9_MASK, COL10_MASK, COL11_MASK, COL12_MASK, COL13_MASK, COL14_MASK, COL15_MASK, COL16_MASK};
49
50bool matrix_scan_custom(matrix_row_t current_matrix[])
51{
52 bool changed = false;
53 uint8_t p0_data = tca6424_read_port(TCA6424_PORT0);
54
55 for (int col = 0; col < MATRIX_COLS; col++) {
56 // Select col and wait for col selecton to stabilize
57 switch(col) {
58 case 0:
59 set_pin(col_pins[col]);
60 break;
61 case 1 ... 8:
62 tca6424_write_port(TCA6424_PORT1, col_mask[col]);
63 break;
64 default:
65 tca6424_write_port(TCA6424_PORT0, col_mask[col]|(p0_data&0x01));
66 break;
67 }
68 matrix_io_delay();
69
70 // read row port for all rows
71 uint8_t row_value = tca6424_read_port(ROW_PORT);
72 for (uint8_t row = 0; row < MATRIX_ROWS; row++) {
73 uint8_t tmp = row;
74 // Store last value of row prior to reading
75 matrix_row_t last_row_value = current_matrix[tmp];
76
77 // Check row pin state
78 if (row_value & row_mask[row]) {
79 // Pin HI, set col bit
80 current_matrix[tmp] |= (1 << col);
81 } else {
82 // Pin LOW, clear col bit
83 current_matrix[tmp] &= ~(1 << col);
84 }
85
86 // Determine if the matrix changed state
87 if ((last_row_value != current_matrix[tmp]) && !(changed)) {
88 changed = true;
89 }
90 }
91 // Unselect col
92 switch(col) {
93 case 0:
94 clear_pin(col_pins[col]);
95 break;
96 case 8:
97 tca6424_write_port(TCA6424_PORT1, 0);
98 break;
99 case 15:
100 tca6424_write_port(TCA6424_PORT0, p0_data&0x01);
101 break;
102 default:
103 break;
104 }
105 }
106
107 return changed;
108}
diff --git a/keyboards/matrix/abelx/mcuconf.h b/keyboards/matrix/abelx/mcuconf.h
new file mode 100644
index 000000000..e26b2823f
--- /dev/null
+++ b/keyboards/matrix/abelx/mcuconf.h
@@ -0,0 +1,253 @@
1/*
2 ChibiOS - Copyright (C) 2006..2018 Giovanni Di Sirio
3
4 Licensed under the Apache License, Version 2.0 (the "License");
5 you may not use this file except in compliance with the License.
6 You may obtain a copy of the License at
7
8 http://www.apache.org/licenses/LICENSE-2.0
9
10 Unless required by applicable law or agreed to in writing, software
11 distributed under the License is distributed on an "AS IS" BASIS,
12 WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
13 See the License for the specific language governing permissions and
14 limitations under the License.
15*/
16
17#ifndef MCUCONF_H
18#define MCUCONF_H
19
20/*
21 * STM32F4xx drivers configuration.
22 * The following settings override the default settings present in
23 * the various device driver implementation headers.
24 * Note that the settings for each driver only have effect if the whole
25 * driver is enabled in halconf.h.
26 *
27 * IRQ priorities:
28 * 15...0 Lowest...Highest.
29 *
30 * DMA priorities:
31 * 0...3 Lowest...Highest.
32 */
33
34#define STM32F4xx_MCUCONF
35
36/*
37 * HAL driver system settings.
38 */
39#define STM32_NO_INIT FALSE
40#define STM32_HSI_ENABLED TRUE
41#define STM32_LSI_ENABLED TRUE
42#define STM32_HSE_ENABLED TRUE
43#define STM32_LSE_ENABLED FALSE
44#define STM32_CLOCK48_REQUIRED TRUE
45#define STM32_SW STM32_SW_PLL
46#define STM32_PLLSRC STM32_PLLSRC_HSE
47#define STM32_PLLM_VALUE 8
48#define STM32_PLLN_VALUE 192
49#define STM32_PLLP_VALUE 2
50#define STM32_PLLQ_VALUE 4
51#define STM32_HPRE STM32_HPRE_DIV1
52#define STM32_PPRE1 STM32_PPRE1_DIV2
53#define STM32_PPRE2 STM32_PPRE2_DIV2
54#define STM32_RTCSEL STM32_RTCSEL_LSI
55#define STM32_RTCPRE_VALUE 8
56#define STM32_MCO1SEL STM32_MCO1SEL_HSI
57#define STM32_MCO1PRE STM32_MCO1PRE_DIV1
58#define STM32_MCO2SEL STM32_MCO2SEL_SYSCLK
59#define STM32_MCO2PRE STM32_MCO2PRE_DIV5
60#define STM32_I2SSRC STM32_I2SSRC_CKIN
61#define STM32_PLLI2SN_VALUE 192
62#define STM32_PLLI2SR_VALUE 5
63#define STM32_PVD_ENABLE FALSE
64#define STM32_PLS STM32_PLS_LEV0
65#define STM32_BKPRAM_ENABLE FALSE
66
67/*
68 * IRQ system settings.
69 */
70#define STM32_IRQ_EXTI0_PRIORITY 6
71#define STM32_IRQ_EXTI1_PRIORITY 6
72#define STM32_IRQ_EXTI2_PRIORITY 6
73#define STM32_IRQ_EXTI3_PRIORITY 6
74#define STM32_IRQ_EXTI4_PRIORITY 6
75#define STM32_IRQ_EXTI5_9_PRIORITY 6
76#define STM32_IRQ_EXTI10_15_PRIORITY 6
77#define STM32_IRQ_EXTI16_PRIORITY 6
78#define STM32_IRQ_EXTI17_PRIORITY 15
79#define STM32_IRQ_EXTI18_PRIORITY 6
80#define STM32_IRQ_EXTI19_PRIORITY 6
81#define STM32_IRQ_EXTI20_PRIORITY 6
82#define STM32_IRQ_EXTI21_PRIORITY 15
83#define STM32_IRQ_EXTI22_PRIORITY 15
84
85/*
86 * ADC driver system settings.
87 */
88#define STM32_ADC_ADCPRE ADC_CCR_ADCPRE_DIV4
89#define STM32_ADC_USE_ADC1 FALSE
90#define STM32_ADC_ADC1_DMA_STREAM STM32_DMA_STREAM_ID(2, 4)
91#define STM32_ADC_ADC1_DMA_PRIORITY 2
92#define STM32_ADC_IRQ_PRIORITY 6
93#define STM32_ADC_ADC1_DMA_IRQ_PRIORITY 6
94
95/*
96 * GPT driver system settings.
97 */
98#define STM32_GPT_USE_TIM1 FALSE
99#define STM32_GPT_USE_TIM2 FALSE
100#define STM32_GPT_USE_TIM3 FALSE
101#define STM32_GPT_USE_TIM4 TRUE
102#define STM32_GPT_USE_TIM5 FALSE
103#define STM32_GPT_USE_TIM9 FALSE
104#define STM32_GPT_USE_TIM11 FALSE
105#define STM32_GPT_TIM1_IRQ_PRIORITY 7
106#define STM32_GPT_TIM2_IRQ_PRIORITY 7
107#define STM32_GPT_TIM3_IRQ_PRIORITY 7
108#define STM32_GPT_TIM4_IRQ_PRIORITY 7
109#define STM32_GPT_TIM5_IRQ_PRIORITY 7
110#define STM32_GPT_TIM9_IRQ_PRIORITY 7
111#define STM32_GPT_TIM11_IRQ_PRIORITY 7
112
113/*
114 * I2C driver system settings.
115 */
116#define STM32_I2C_USE_I2C1 TRUE
117#define STM32_I2C_USE_I2C2 FALSE
118#define STM32_I2C_USE_I2C3 FALSE
119#define STM32_I2C_BUSY_TIMEOUT 50
120#define STM32_I2C_I2C1_RX_DMA_STREAM STM32_DMA_STREAM_ID(1, 0)
121#define STM32_I2C_I2C1_TX_DMA_STREAM STM32_DMA_STREAM_ID(1, 6)
122#define STM32_I2C_I2C2_RX_DMA_STREAM STM32_DMA_STREAM_ID(1, 2)
123#define STM32_I2C_I2C2_TX_DMA_STREAM STM32_DMA_STREAM_ID(1, 7)
124#define STM32_I2C_I2C3_RX_DMA_STREAM STM32_DMA_STREAM_ID(1, 2)
125#define STM32_I2C_I2C3_TX_DMA_STREAM STM32_DMA_STREAM_ID(1, 4)
126#define STM32_I2C_I2C1_IRQ_PRIORITY 5
127#define STM32_I2C_I2C2_IRQ_PRIORITY 5
128#define STM32_I2C_I2C3_IRQ_PRIORITY 5
129#define STM32_I2C_I2C1_DMA_PRIORITY 3
130#define STM32_I2C_I2C2_DMA_PRIORITY 3
131#define STM32_I2C_I2C3_DMA_PRIORITY 3
132#define STM32_I2C_DMA_ERROR_HOOK(i2cp) osalSysHalt("DMA failure")
133
134/*
135 * I2S driver system settings.
136 */
137#define STM32_I2S_USE_SPI2 FALSE
138#define STM32_I2S_USE_SPI3 FALSE
139#define STM32_I2S_SPI2_IRQ_PRIORITY 10
140#define STM32_I2S_SPI3_IRQ_PRIORITY 10
141#define STM32_I2S_SPI2_DMA_PRIORITY 1
142#define STM32_I2S_SPI3_DMA_PRIORITY 1
143#define STM32_I2S_SPI2_RX_DMA_STREAM STM32_DMA_STREAM_ID(1, 3)
144#define STM32_I2S_SPI2_TX_DMA_STREAM STM32_DMA_STREAM_ID(1, 4)
145#define STM32_I2S_SPI3_RX_DMA_STREAM STM32_DMA_STREAM_ID(1, 0)
146#define STM32_I2S_SPI3_TX_DMA_STREAM STM32_DMA_STREAM_ID(1, 7)
147#define STM32_I2S_DMA_ERROR_HOOK(i2sp) osalSysHalt("DMA failure")
148
149/*
150 * ICU driver system settings.
151 */
152#define STM32_ICU_USE_TIM1 FALSE
153#define STM32_ICU_USE_TIM2 FALSE
154#define STM32_ICU_USE_TIM3 FALSE
155#define STM32_ICU_USE_TIM4 FALSE
156#define STM32_ICU_USE_TIM5 FALSE
157#define STM32_ICU_USE_TIM9 FALSE
158#define STM32_ICU_TIM1_IRQ_PRIORITY 7
159#define STM32_ICU_TIM2_IRQ_PRIORITY 7
160#define STM32_ICU_TIM3_IRQ_PRIORITY 7
161#define STM32_ICU_TIM4_IRQ_PRIORITY 7
162#define STM32_ICU_TIM5_IRQ_PRIORITY 7
163#define STM32_ICU_TIM9_IRQ_PRIORITY 7
164
165/*
166 * PWM driver system settings.
167 */
168#define STM32_PWM_USE_ADVANCED FALSE
169#define STM32_PWM_USE_TIM1 FALSE
170#define STM32_PWM_USE_TIM2 FALSE
171#define STM32_PWM_USE_TIM3 FALSE
172#define STM32_PWM_USE_TIM4 FALSE
173#define STM32_PWM_USE_TIM5 FALSE
174#define STM32_PWM_USE_TIM9 FALSE
175#define STM32_PWM_TIM1_IRQ_PRIORITY 7
176#define STM32_PWM_TIM2_IRQ_PRIORITY 7
177#define STM32_PWM_TIM3_IRQ_PRIORITY 7
178#define STM32_PWM_TIM4_IRQ_PRIORITY 7
179#define STM32_PWM_TIM5_IRQ_PRIORITY 7
180#define STM32_PWM_TIM9_IRQ_PRIORITY 7
181
182/*
183 * SERIAL driver system settings.
184 */
185#define STM32_SERIAL_USE_USART1 FALSE
186#define STM32_SERIAL_USE_USART2 FALSE
187#define STM32_SERIAL_USE_USART6 FALSE
188#define STM32_SERIAL_USART1_PRIORITY 12
189#define STM32_SERIAL_USART2_PRIORITY 12
190#define STM32_SERIAL_USART6_PRIORITY 12
191
192/*
193 * SPI driver system settings.
194 */
195#define STM32_SPI_USE_SPI1 FALSE
196#define STM32_SPI_USE_SPI2 FALSE
197#define STM32_SPI_USE_SPI3 FALSE
198#define STM32_SPI_SPI1_RX_DMA_STREAM STM32_DMA_STREAM_ID(2, 0)
199#define STM32_SPI_SPI1_TX_DMA_STREAM STM32_DMA_STREAM_ID(2, 3)
200#define STM32_SPI_SPI2_RX_DMA_STREAM STM32_DMA_STREAM_ID(1, 3)
201#define STM32_SPI_SPI2_TX_DMA_STREAM STM32_DMA_STREAM_ID(1, 4)
202#define STM32_SPI_SPI3_RX_DMA_STREAM STM32_DMA_STREAM_ID(1, 0)
203#define STM32_SPI_SPI3_TX_DMA_STREAM STM32_DMA_STREAM_ID(1, 7)
204#define STM32_SPI_SPI1_DMA_PRIORITY 1
205#define STM32_SPI_SPI2_DMA_PRIORITY 1
206#define STM32_SPI_SPI3_DMA_PRIORITY 1
207#define STM32_SPI_SPI1_IRQ_PRIORITY 10
208#define STM32_SPI_SPI2_IRQ_PRIORITY 10
209#define STM32_SPI_SPI3_IRQ_PRIORITY 10
210#define STM32_SPI_DMA_ERROR_HOOK(spip) osalSysHalt("DMA failure")
211
212/*
213 * ST driver system settings.
214 */
215#define STM32_ST_IRQ_PRIORITY 8
216#define STM32_ST_USE_TIMER 2
217
218/*
219 * UART driver system settings.
220 */
221#define STM32_UART_USE_USART1 TRUE
222#define STM32_UART_USE_USART2 FALSE
223#define STM32_UART_USE_USART6 FALSE
224#define STM32_UART_USART1_RX_DMA_STREAM STM32_DMA_STREAM_ID(2, 5)
225#define STM32_UART_USART1_TX_DMA_STREAM STM32_DMA_STREAM_ID(2, 7)
226#define STM32_UART_USART2_RX_DMA_STREAM STM32_DMA_STREAM_ID(1, 5)
227#define STM32_UART_USART2_TX_DMA_STREAM STM32_DMA_STREAM_ID(1, 6)
228#define STM32_UART_USART6_RX_DMA_STREAM STM32_DMA_STREAM_ID(2, 2)
229#define STM32_UART_USART6_TX_DMA_STREAM STM32_DMA_STREAM_ID(2, 7)
230#define STM32_UART_USART1_IRQ_PRIORITY 12
231#define STM32_UART_USART2_IRQ_PRIORITY 12
232#define STM32_UART_USART6_IRQ_PRIORITY 12
233#define STM32_UART_USART1_DMA_PRIORITY 0
234#define STM32_UART_USART2_DMA_PRIORITY 0
235#define STM32_UART_USART6_DMA_PRIORITY 0
236#define STM32_UART_DMA_ERROR_HOOK(uartp) osalSysHalt("DMA failure")
237
238/*
239 * USB driver system settings.
240 */
241#define STM32_USB_USE_OTG1 TRUE
242#define STM32_USB_OTG1_IRQ_PRIORITY 14
243#define STM32_USB_OTG1_RX_FIFO_SIZE 512
244#define STM32_USB_OTG_THREAD_PRIO LOWPRIO
245#define STM32_USB_OTG_THREAD_STACK_SIZE 128
246#define STM32_USB_OTGFIFO_FILL_BASEPRI 0
247
248/*
249 * WDG driver system settings.
250 */
251#define STM32_WDG_USE_IWDG FALSE
252
253#endif /* MCUCONF_H */
diff --git a/keyboards/matrix/abelx/readme.md b/keyboards/matrix/abelx/readme.md
new file mode 100644
index 000000000..e02438a1a
--- /dev/null
+++ b/keyboards/matrix/abelx/readme.md
@@ -0,0 +1,11 @@
1# Matrix ABELX keyboard
2
3* Keyboard Maintainer: [astro](https://github.com/yulei)
4* Hardware Supported: Matrix ABELX keyboard
5* Hardware Availability:
6
7Make example for this keyboard (after setting up your build environment):
8
9 make matrix/abelx:default
10
11See the [build environment setup](https://docs.qmk.fm/#/getting_started_build_tools) and the [make instructions](https://docs.qmk.fm/#/getting_started_make_guide) for more information. Brand new to QMK? Start with our [Complete Newbs Guide](https://docs.qmk.fm/#/newbs).
diff --git a/keyboards/matrix/abelx/rules.mk b/keyboards/matrix/abelx/rules.mk
new file mode 100644
index 000000000..bd8156dd6
--- /dev/null
+++ b/keyboards/matrix/abelx/rules.mk
@@ -0,0 +1,57 @@
1## chip/board settings
2# - the next two should match the directories in
3# <chibios>/os/hal/ports/$(MCU_FAMILY)/$(MCU_SERIES)
4MCU_FAMILY = STM32
5MCU_SERIES = STM32F4xx
6
7# Linker script to use
8# - it should exist either in <chibios>/os/common/ports/ARMCMx/compilers/GCC/ld/
9# or <this_dir>/ld/
10MCU_LDSCRIPT = abelx_boot
11
12# Startup code to use
13# - it should exist in <chibios>/os/common/startup/ARMCMx/compilers/GCC/mk/
14MCU_STARTUP = stm32f4xx
15
16# Board: it should exist either in <chibios>/os/hal/boards/
17# or <this_dir>/boards
18BOARD = abelx_bd
19
20# Cortex version
21MCU = cortex-m4
22
23# ARM version, CORTEX-M0/M1 are 6, CORTEX-M3/M4/M7 are 7
24ARMV = 7
25
26USE_FPU = yes
27
28# Vector table for application
29# 0x00000000-0x00001000 area is occupied by bootlaoder.*/
30OPT_DEFS =
31
32# Options to pass to dfu-util when flashing
33#DFU_ARGS = -d 0483:df11 -a 0 -s 0x08000000:leave
34#DFU_SUFFIX_ARGS = -p DF11 -v 0483
35
36# Build Options
37# change yes to no to disable
38#
39BOOTMAGIC_ENABLE = yes # Virtual DIP switch configuration
40MOUSEKEY_ENABLE = yes # Mouse keys
41EXTRAKEY_ENABLE = yes # Audio control and System control
42CONSOLE_ENABLE = no # Console for debug
43COMMAND_ENABLE = no # Commands for debug and configuration
44# Do not enable SLEEP_LED_ENABLE. it uses the same timer as BACKLIGHT_ENABLE
45SLEEP_LED_ENABLE = no # Breathing sleep LED during USB suspend
46# if this doesn't work, see here: https://github.com/tmk/tmk_keyboard/wiki/FAQ#nkro-doesnt-work
47NKRO_ENABLE = no # USB Nkey Rollover
48BACKLIGHT_ENABLE = no # Enable keyboard backlight functionality
49RGBLIGHT_ENABLE = yes # Enable keyboard RGB underglow
50BLUETOOTH_ENABLE = no # Enable Bluetooth
51AUDIO_ENABLE = no # Audio output
52NO_USB_STARTUP_CHECK = yes # Disable initialization only when usb is plugged in
53
54CUSTOM_MATRIX = lite
55# project specific files
56SRC += matrix.c tca6424.c aw9523b.c
57QUANTUM_LIB_SRC += i2c_master.c
diff --git a/keyboards/matrix/abelx/tca6424.c b/keyboards/matrix/abelx/tca6424.c
new file mode 100644
index 000000000..44dc7909d
--- /dev/null
+++ b/keyboards/matrix/abelx/tca6424.c
@@ -0,0 +1,117 @@
1/**
2 * @file tca6424.c
3 * @author astro
4 * @brief driver for the tca6424
5 *
6 * Copyright 2020 astro <yuleiz@gmail.com>
7 *
8 * This program is free software: you can redistribute it and/or modify
9 * it under the terms of the GNU General Public License as published by
10 * the Free Software Foundation, either version 2 of the License, or
11 * (at your option) any later version.
12 *
13 * This program is distributed in the hope that it will be useful,
14 * but WITHOUT ANY WARRANTY; without even the implied warranty of
15 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
16 * GNU General Public License for more details.
17 *
18 * You should have received a copy of the GNU General Public License
19 * along with this program. If not, see <http://www.gnu.org/licenses/>.
20 */
21
22#include "tca6424.h"
23#include "i2c_master.h"
24
25#define TCA6424_INPUT_PORT0 0x0
26#define TCA6424_INPUT_PORT1 0x01
27#define TCA6424_INPUT_PORT2 0x02
28
29#define TCA6424_OUTPUT_PORT0 0x04
30#define TCA6424_OUTPUT_PORT1 0x05
31#define TCA6424_OUTPUT_PORT2 0x06
32
33#define TCA6424_POLARITY_PORT0 0x08
34#define TCA6424_POLARITY_PORT1 0x09
35#define TCA6424_POLARITY_PORT2 0x0A
36
37#define TCA6424_CONF_PORT0 0x0C
38#define TCA6424_CONF_PORT1 0x0D
39#define TCA6424_CONF_PORT2 0x0E
40
41#define TIMEOUT 100
42
43void tca6424_init(void)
44{
45 i2c_init();
46}
47
48static void write_port(uint8_t p, uint8_t d)
49{
50 i2c_writeReg(TCA6424_ADDR, p, &d, 1, TIMEOUT);
51}
52
53static uint8_t read_port(uint8_t port)
54{
55 uint8_t data = 0;
56 i2c_readReg(TCA6424_ADDR, port, &data, 1, TIMEOUT);
57 return data;
58}
59
60void tca6424_write_config(TCA6424_PORT port, uint8_t data)
61{
62 switch(port) {
63 case TCA6424_PORT0:
64 write_port(TCA6424_CONF_PORT0, data);
65 break;
66 case TCA6424_PORT1:
67 write_port(TCA6424_CONF_PORT1, data);
68 break;
69 case TCA6424_PORT2:
70 write_port(TCA6424_CONF_PORT2, data);
71 break;
72 }
73}
74
75void tca6424_write_polarity(TCA6424_PORT port, uint8_t data)
76{
77 switch(port) {
78 case TCA6424_PORT0:
79 write_port(TCA6424_POLARITY_PORT0, data);
80 break;
81 case TCA6424_PORT1:
82 write_port(TCA6424_POLARITY_PORT1, data);
83 break;
84 case TCA6424_PORT2:
85 write_port(TCA6424_POLARITY_PORT2, data);
86 break;
87 }
88}
89
90void tca6424_write_port(TCA6424_PORT port, uint8_t data)
91{
92 switch(port) {
93 case TCA6424_PORT0:
94 write_port(TCA6424_OUTPUT_PORT0, data);
95 break;
96 case TCA6424_PORT1:
97 write_port(TCA6424_OUTPUT_PORT1, data);
98 break;
99 case TCA6424_PORT2:
100 write_port(TCA6424_OUTPUT_PORT2, data);
101 break;
102 }
103}
104
105uint8_t tca6424_read_port(TCA6424_PORT port)
106{
107 switch(port) {
108 case TCA6424_PORT0:
109 return read_port(TCA6424_INPUT_PORT0);
110 case TCA6424_PORT1:
111 return read_port(TCA6424_INPUT_PORT1);
112 case TCA6424_PORT2:
113 return read_port(TCA6424_INPUT_PORT2);
114 }
115
116 return 0;
117}
diff --git a/keyboards/matrix/abelx/tca6424.h b/keyboards/matrix/abelx/tca6424.h
new file mode 100644
index 000000000..519c6370e
--- /dev/null
+++ b/keyboards/matrix/abelx/tca6424.h
@@ -0,0 +1,42 @@
1/**
2 * @file tca6424.h
3 * @author astro
4 * @brief driver for the tca6424
5 *
6 * Copyright 2020 astro <yuleiz@gmail.com>
7 *
8 * This program is free software: you can redistribute it and/or modify
9 * it under the terms of the GNU General Public License as published by
10 * the Free Software Foundation, either version 2 of the License, or
11 * (at your option) any later version.
12 *
13 * This program is distributed in the hope that it will be useful,
14 * but WITHOUT ANY WARRANTY; without even the implied warranty of
15 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
16 * GNU General Public License for more details.
17 *
18 * You should have received a copy of the GNU General Public License
19 * along with this program. If not, see <http://www.gnu.org/licenses/>.
20 */
21
22#pragma once
23
24#include <stdint.h>
25
26#ifndef TCA6424_ADDR
27 #define TCA6424_ADDR 0x44
28#endif
29
30typedef enum {
31 TCA6424_PORT0 = 0,
32 TCA6424_PORT1,
33 TCA6424_PORT2,
34} TCA6424_PORT;
35
36void tca6424_init(void);
37
38void tca6424_write_config(TCA6424_PORT port, uint8_t data);
39void tca6424_write_polarity(TCA6424_PORT port, uint8_t data);
40
41void tca6424_write_port(TCA6424_PORT port, uint8_t data);
42uint8_t tca6424_read_port(TCA6424_PORT port);
generated by cgit v1.2.3 (git 2.25.1) at 2025-11-19 19:57:35 +0000