aboutsummaryrefslogtreecommitdiff
diff options
context:
space:
mode:
authorTerryMathews <terry@terrymathews.net>2019-01-19 01:19:14 -0500
committerDrashna Jaelre <drashna@live.com>2019-01-18 22:19:14 -0800
commitebec12fbe8bff9b657f3fe6abee67e37ef0a1ba6 (patch)
treeab24e1a85478e5d4de4c997416e63a074dc58c0e
parentc4680a6460bcc0a3695f3e9232089374c40fc29c (diff)
downloadqmk_firmware-ebec12fbe8bff9b657f3fe6abee67e37ef0a1ba6.tar.gz
qmk_firmware-ebec12fbe8bff9b657f3fe6abee67e37ef0a1ba6.zip
[Keyboard] Initial support for TKC Candybar (#4881)
* Initial support for TKC Candybar * Correct FN layer issue Both shift keys were overloaded. Moved Caps Lock to FN + C. * Update keyboard description in config.h. * Info.json * Update project information * Update keyboards/candybar/readme.md Co-Authored-By: TerryMathews <terry@terrymathews.net>
Diffstat
-rw-r--r--keyboards/candybar/boards/ST_STM32F072B_DISCOVERY/board.c111
-rw-r--r--keyboards/candybar/boards/ST_STM32F072B_DISCOVERY/board.h923
-rw-r--r--keyboards/candybar/boards/ST_STM32F072B_DISCOVERY/board.mk5
-rw-r--r--keyboards/candybar/bootloader_defs.h7
-rw-r--r--keyboards/candybar/candybar.c21
-rw-r--r--keyboards/candybar/candybar.h30
-rw-r--r--keyboards/candybar/chconf.h524
-rw-r--r--keyboards/candybar/config.h121
-rw-r--r--keyboards/candybar/halconf.h353
-rw-r--r--keyboards/candybar/info.json207
-rw-r--r--keyboards/candybar/keymaps/default/keymap.c38
-rw-r--r--keyboards/candybar/mcuconf.h171
-rw-r--r--keyboards/candybar/readme.md18
-rw-r--r--keyboards/candybar/rules.mk50
14 files changed, 2579 insertions, 0 deletions
diff --git a/keyboards/candybar/boards/ST_STM32F072B_DISCOVERY/board.c b/keyboards/candybar/boards/ST_STM32F072B_DISCOVERY/board.c
new file mode 100644
index 000000000..7e9f90853
--- /dev/null
+++ b/keyboards/candybar/boards/ST_STM32F072B_DISCOVERY/board.c
@@ -0,0 +1,111 @@
1/*
2 ChibiOS - Copyright (C) 2006..2016 Giovanni Di Sirio
3
4 Licensed under the Apache License, Version 2.0 (the "License");
5 you may not use this file except in compliance with the License.
6 You may obtain a copy of the License at
7
8 http://www.apache.org/licenses/LICENSE-2.0
9
10 Unless required by applicable law or agreed to in writing, software
11 distributed under the License is distributed on an "AS IS" BASIS,
12 WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
13 See the License for the specific language governing permissions and
14 limitations under the License.
15*/
16
17/*
18 * This file has been automatically generated using ChibiStudio board
19 * generator plugin. Do not edit manually.
20 */
21
22#include "hal.h"
23
24#if HAL_USE_PAL || defined(__DOXYGEN__)
25/**
26 * @brief PAL setup.
27 * @details Digital I/O ports static configuration as defined in @p board.h.
28 * This variable is used by the HAL when initializing the PAL driver.
29 */
30const PALConfig pal_default_config = {
31#if STM32_HAS_GPIOA
32 {VAL_GPIOA_MODER, VAL_GPIOA_OTYPER, VAL_GPIOA_OSPEEDR, VAL_GPIOA_PUPDR,
33 VAL_GPIOA_ODR, VAL_GPIOA_AFRL, VAL_GPIOA_AFRH},
34#endif
35#if STM32_HAS_GPIOB
36 {VAL_GPIOB_MODER, VAL_GPIOB_OTYPER, VAL_GPIOB_OSPEEDR, VAL_GPIOB_PUPDR,
37 VAL_GPIOB_ODR, VAL_GPIOB_AFRL, VAL_GPIOB_AFRH},
38#endif
39#if STM32_HAS_GPIOC
40 {VAL_GPIOC_MODER, VAL_GPIOC_OTYPER, VAL_GPIOC_OSPEEDR, VAL_GPIOC_PUPDR,
41 VAL_GPIOC_ODR, VAL_GPIOC_AFRL, VAL_GPIOC_AFRH},
42#endif
43#if STM32_HAS_GPIOD
44 {VAL_GPIOD_MODER, VAL_GPIOD_OTYPER, VAL_GPIOD_OSPEEDR, VAL_GPIOD_PUPDR,
45 VAL_GPIOD_ODR, VAL_GPIOD_AFRL, VAL_GPIOD_AFRH},
46#endif
47#if STM32_HAS_GPIOE
48 {VAL_GPIOE_MODER, VAL_GPIOE_OTYPER, VAL_GPIOE_OSPEEDR, VAL_GPIOE_PUPDR,
49 VAL_GPIOE_ODR, VAL_GPIOE_AFRL, VAL_GPIOE_AFRH},
50#endif
51#if STM32_HAS_GPIOF
52 {VAL_GPIOF_MODER, VAL_GPIOF_OTYPER, VAL_GPIOF_OSPEEDR, VAL_GPIOF_PUPDR,
53 VAL_GPIOF_ODR, VAL_GPIOF_AFRL, VAL_GPIOF_AFRH},
54#endif
55#if STM32_HAS_GPIOG
56 {VAL_GPIOG_MODER, VAL_GPIOG_OTYPER, VAL_GPIOG_OSPEEDR, VAL_GPIOG_PUPDR,
57 VAL_GPIOG_ODR, VAL_GPIOG_AFRL, VAL_GPIOG_AFRH},
58#endif
59#if STM32_HAS_GPIOH
60 {VAL_GPIOH_MODER, VAL_GPIOH_OTYPER, VAL_GPIOH_OSPEEDR, VAL_GPIOH_PUPDR,
61 VAL_GPIOH_ODR, VAL_GPIOH_AFRL, VAL_GPIOH_AFRH},
62#endif
63#if STM32_HAS_GPIOI
64 {VAL_GPIOI_MODER, VAL_GPIOI_OTYPER, VAL_GPIOI_OSPEEDR, VAL_GPIOI_PUPDR,
65 VAL_GPIOI_ODR, VAL_GPIOI_AFRL, VAL_GPIOI_AFRH}
66#endif
67};
68#endif
69
70void enter_bootloader_mode_if_requested(void);
71
72/**
73 * @brief Early initialization code.
74 * @details This initialization must be performed just after stack setup
75 * and before any other initialization.
76 */
77void __early_init(void) {
78 enter_bootloader_mode_if_requested();
79 stm32_clock_init();
80}
81
82
83
84#if HAL_USE_MMC_SPI || defined(__DOXYGEN__)
85/**
86 * @brief MMC_SPI card detection.
87 */
88bool mmc_lld_is_card_inserted(MMCDriver *mmcp) {
89
90 (void)mmcp;
91 /* TODO: Fill the implementation.*/
92 return true;
93}
94
95/**
96 * @brief MMC_SPI card write protection detection.
97 */
98bool mmc_lld_is_write_protected(MMCDriver *mmcp) {
99
100 (void)mmcp;
101 /* TODO: Fill the implementation.*/
102 return false;
103}
104#endif
105
106/**
107 * @brief Board-specific initialization code.
108 * @todo Add your board-specific code, if any.
109 */
110void boardInit(void) {
111}
diff --git a/keyboards/candybar/boards/ST_STM32F072B_DISCOVERY/board.h b/keyboards/candybar/boards/ST_STM32F072B_DISCOVERY/board.h
new file mode 100644
index 000000000..173f7b605
--- /dev/null
+++ b/keyboards/candybar/boards/ST_STM32F072B_DISCOVERY/board.h
@@ -0,0 +1,923 @@
1/*
2 ChibiOS - Copyright (C) 2006..2016 Giovanni Di Sirio
3
4 Licensed under the Apache License, Version 2.0 (the "License");
5 you may not use this file except in compliance with the License.
6 You may obtain a copy of the License at
7
8 http://www.apache.org/licenses/LICENSE-2.0
9
10 Unless required by applicable law or agreed to in writing, software
11 distributed under the License is distributed on an "AS IS" BASIS,
12 WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
13 See the License for the specific language governing permissions and
14 limitations under the License.
15*/
16
17/*
18 * This file has been automatically generated using ChibiStudio board
19 * generator plugin. Do not edit manually.
20 */
21
22#ifndef BOARD_H
23#define BOARD_H
24
25/*
26 * Setup for ST STM32F072B-Discovery board.
27 */
28
29/*
30 * Board identifier.
31 */
32#define BOARD_ST_STM32F072B_DISCOVERY
33#define BOARD_NAME "ST STM32F072B-Discovery"
34
35/*
36 * Board oscillators-related settings.
37 * NOTE: LSE not fitted.
38 * NOTE: HSE not fitted.
39 */
40#if !defined(STM32_LSECLK)
41#define STM32_LSECLK 0U
42#endif
43
44#define STM32_LSEDRV (3U << 3U)
45
46#if !defined(STM32_HSECLK)
47#define STM32_HSECLK 0U
48#endif
49
50#define STM32_HSE_BYPASS
51
52/*
53 * MCU type as defined in the ST header.
54 */
55#define STM32F072xB
56
57/*
58 * IO pins assignments.
59 */
60#define GPIOA_BUTTON 0U
61#define GPIOA_PIN1 1U
62#define GPIOA_PIN2 2U
63#define GPIOA_PIN3 3U
64#define GPIOA_PIN4 4U
65#define GPIOA_PIN5 5U
66#define GPIOA_PIN6 6U
67#define GPIOA_PIN7 7U
68#define GPIOA_PIN8 8U
69#define GPIOA_PIN9 9U
70#define GPIOA_PIN10 10U
71#define GPIOA_USB_DM 11U
72#define GPIOA_USB_DP 12U
73#define GPIOA_SWDIO 13U
74#define GPIOA_SWCLK 14U
75#define GPIOA_PIN15 15U
76
77#define GPIOB_PIN0 0U
78#define GPIOB_PIN1 1U
79#define GPIOB_PIN2 2U
80#define GPIOB_PIN3 3U
81#define GPIOB_PIN4 4U
82#define GPIOB_PIN5 5U
83#define GPIOB_PIN6 6U
84#define GPIOB_PIN7 7U
85#define GPIOB_PIN8 8U
86#define GPIOB_PIN9 9U
87#define GPIOB_PIN10 10U
88#define GPIOB_PIN11 11U
89#define GPIOB_PIN12 12U
90#define GPIOB_SPI2_SCK 13U
91#define GPIOB_SPI2_MISO 14U
92#define GPIOB_SPI2_MOSI 15U
93
94#define GPIOC_MEMS_CS 0U
95#define GPIOC_PIN1 1U
96#define GPIOC_PIN2 2U
97#define GPIOC_PIN3 3U
98#define GPIOC_PIN4 4U
99#define GPIOC_PIN5 5U
100#define GPIOC_LED_RED 6U
101#define GPIOC_LED_BLUE 7U
102#define GPIOC_LED_ORANGE 8U
103#define GPIOC_LED_GREEN 9U
104#define GPIOC_PIN10 10U
105#define GPIOC_PIN11 11U
106#define GPIOC_PIN12 12U
107#define GPIOC_PIN13 13U
108#define GPIOC_OSC32_IN 14U
109#define GPIOC_OSC32_OUT 15U
110
111#define GPIOD_PIN0 0U
112#define GPIOD_PIN1 1U
113#define GPIOD_PIN2 2U
114#define GPIOD_PIN3 3U
115#define GPIOD_PIN4 4U
116#define GPIOD_PIN5 5U
117#define GPIOD_PIN6 6U
118#define GPIOD_PIN7 7U
119#define GPIOD_PIN8 8U
120#define GPIOD_PIN9 9U
121#define GPIOD_PIN10 10U
122#define GPIOD_PIN11 11U
123#define GPIOD_PIN12 12U
124#define GPIOD_PIN13 13U
125#define GPIOD_PIN14 14U
126#define GPIOD_PIN15 15U
127
128#define GPIOE_PIN0 0U
129#define GPIOE_PIN1 1U
130#define GPIOE_PIN2 2U
131#define GPIOE_PIN3 3U
132#define GPIOE_PIN4 4U
133#define GPIOE_PIN5 5U
134#define GPIOE_PIN6 6U
135#define GPIOE_PIN7 7U
136#define GPIOE_PIN8 8U
137#define GPIOE_PIN9 9U
138#define GPIOE_PIN10 10U
139#define GPIOE_PIN11 11U
140#define GPIOE_PIN12 12U
141#define GPIOE_PIN13 13U
142#define GPIOE_PIN14 14U
143#define GPIOE_PIN15 15U
144
145#define GPIOF_OSC_IN 0U
146#define GPIOF_OSC_OUT 1U
147#define GPIOF_PIN2 2U
148#define GPIOF_PIN3 3U
149#define GPIOF_PIN4 4U
150#define GPIOF_PIN5 5U
151#define GPIOF_PIN6 6U
152#define GPIOF_PIN7 7U
153#define GPIOF_PIN8 8U
154#define GPIOF_PIN9 9U
155#define GPIOF_PIN10 10U
156#define GPIOF_PIN11 11U
157#define GPIOF_PIN12 12U
158#define GPIOF_PIN13 13U
159#define GPIOF_PIN14 14U
160#define GPIOF_PIN15 15U
161
162/*
163 * IO lines assignments.
164 */
165#define LINE_BUTTON PAL_LINE(GPIOA, 0U)
166#define LINE_USB_DM PAL_LINE(GPIOA, 11U)
167#define LINE_USB_DP PAL_LINE(GPIOA, 12U)
168#define LINE_SWDIO PAL_LINE(GPIOA, 13U)
169#define LINE_SWCLK PAL_LINE(GPIOA, 14U)
170
171#define LINE_SPI2_SCK PAL_LINE(GPIOB, 13U)
172#define LINE_SPI2_MISO PAL_LINE(GPIOB, 14U)
173#define LINE_SPI2_MOSI PAL_LINE(GPIOB, 15U)
174
175#define LINE_MEMS_CS PAL_LINE(GPIOC, 0U)
176#define LINE_LED_RED PAL_LINE(GPIOC, 6U)
177#define LINE_LED_BLUE PAL_LINE(GPIOC, 7U)
178#define LINE_LED_ORANGE PAL_LINE(GPIOC, 8U)
179#define LINE_LED_GREEN PAL_LINE(GPIOC, 9U)
180#define LINE_OSC32_IN PAL_LINE(GPIOC, 14U)
181#define LINE_OSC32_OUT PAL_LINE(GPIOC, 15U)
182
183
184
185#define LINE_OSC_IN PAL_LINE(GPIOF, 0U)
186#define LINE_OSC_OUT PAL_LINE(GPIOF, 1U)
187
188/*
189 * I/O ports initial setup, this configuration is established soon after reset
190 * in the initialization code.
191 * Please refer to the STM32 Reference Manual for details.
192 */
193#define PIN_MODE_INPUT(n) (0U << ((n) * 2U))
194#define PIN_MODE_OUTPUT(n) (1U << ((n) * 2U))
195#define PIN_MODE_ALTERNATE(n) (2U << ((n) * 2U))
196#define PIN_MODE_ANALOG(n) (3U << ((n) * 2U))
197#define PIN_ODR_LOW(n) (0U << (n))
198#define PIN_ODR_HIGH(n) (1U << (n))
199#define PIN_OTYPE_PUSHPULL(n) (0U << (n))
200#define PIN_OTYPE_OPENDRAIN(n) (1U << (n))
201#define PIN_OSPEED_VERYLOW(n) (0U << ((n) * 2U))
202#define PIN_OSPEED_LOW(n) (1U << ((n) * 2U))
203#define PIN_OSPEED_MEDIUM(n) (2U << ((n) * 2U))
204#define PIN_OSPEED_HIGH(n) (3U << ((n) * 2U))
205#define PIN_PUPDR_FLOATING(n) (0U << ((n) * 2U))
206#define PIN_PUPDR_PULLUP(n) (1U << ((n) * 2U))
207#define PIN_PUPDR_PULLDOWN(n) (2U << ((n) * 2U))
208#define PIN_AFIO_AF(n, v) ((v) << (((n) % 8U) * 4U))
209
210/*
211 * GPIOA setup:
212 *
213 * PA0 - BUTTON (input floating).
214 * PA1 - PIN1 (input pullup).
215 * PA2 - PIN2 (input pullup).
216 * PA3 - PIN3 (input pullup).
217 * PA4 - PIN4 (input pullup).
218 * PA5 - PIN5 (input pullup).
219 * PA6 - PIN6 (input pullup).
220 * PA7 - PIN7 (input pullup).
221 * PA8 - PIN8 (input pullup).
222 * PA9 - PIN9 (input pullup).
223 * PA10 - PIN10 (input pullup).
224 * PA11 - USB_DM (input floating).
225 * PA12 - USB_DP (input floating).
226 * PA13 - SWDIO (alternate 0).
227 * PA14 - SWCLK (alternate 0).
228 * PA15 - PIN15 (input pullup).
229 */
230#define VAL_GPIOA_MODER (PIN_MODE_INPUT(GPIOA_BUTTON) | \
231 PIN_MODE_INPUT(GPIOA_PIN1) | \
232 PIN_MODE_INPUT(GPIOA_PIN2) | \
233 PIN_MODE_INPUT(GPIOA_PIN3) | \
234 PIN_MODE_INPUT(GPIOA_PIN4) | \
235 PIN_MODE_INPUT(GPIOA_PIN5) | \
236 PIN_MODE_INPUT(GPIOA_PIN6) | \
237 PIN_MODE_INPUT(GPIOA_PIN7) | \
238 PIN_MODE_INPUT(GPIOA_PIN8) | \
239 PIN_MODE_INPUT(GPIOA_PIN9) | \
240 PIN_MODE_INPUT(GPIOA_PIN10) | \
241 PIN_MODE_INPUT(GPIOA_USB_DM) | \
242 PIN_MODE_INPUT(GPIOA_USB_DP) | \
243 PIN_MODE_ALTERNATE(GPIOA_SWDIO) | \
244 PIN_MODE_ALTERNATE(GPIOA_SWCLK) | \
245 PIN_MODE_INPUT(GPIOA_PIN15))
246#define VAL_GPIOA_OTYPER (PIN_OTYPE_PUSHPULL(GPIOA_BUTTON) | \
247 PIN_OTYPE_PUSHPULL(GPIOA_PIN1) | \
248 PIN_OTYPE_PUSHPULL(GPIOA_PIN2) | \
249 PIN_OTYPE_PUSHPULL(GPIOA_PIN3) | \
250 PIN_OTYPE_PUSHPULL(GPIOA_PIN4) | \
251 PIN_OTYPE_PUSHPULL(GPIOA_PIN5) | \
252 PIN_OTYPE_PUSHPULL(GPIOA_PIN6) | \
253 PIN_OTYPE_PUSHPULL(GPIOA_PIN7) | \
254 PIN_OTYPE_PUSHPULL(GPIOA_PIN8) | \
255 PIN_OTYPE_PUSHPULL(GPIOA_PIN9) | \
256 PIN_OTYPE_PUSHPULL(GPIOA_PIN10) | \
257 PIN_OTYPE_PUSHPULL(GPIOA_USB_DM) | \
258 PIN_OTYPE_PUSHPULL(GPIOA_USB_DP) | \
259 PIN_OTYPE_PUSHPULL(GPIOA_SWDIO) | \
260 PIN_OTYPE_PUSHPULL(GPIOA_SWCLK) | \
261 PIN_OTYPE_PUSHPULL(GPIOA_PIN15))
262#define VAL_GPIOA_OSPEEDR (PIN_OSPEED_VERYLOW(GPIOA_BUTTON) | \
263 PIN_OSPEED_VERYLOW(GPIOA_PIN1) | \
264 PIN_OSPEED_VERYLOW(GPIOA_PIN2) | \
265 PIN_OSPEED_VERYLOW(GPIOA_PIN3) | \
266 PIN_OSPEED_VERYLOW(GPIOA_PIN4) | \
267 PIN_OSPEED_VERYLOW(GPIOA_PIN5) | \
268 PIN_OSPEED_VERYLOW(GPIOA_PIN6) | \
269 PIN_OSPEED_VERYLOW(GPIOA_PIN7) | \
270 PIN_OSPEED_VERYLOW(GPIOA_PIN8) | \
271 PIN_OSPEED_VERYLOW(GPIOA_PIN9) | \
272 PIN_OSPEED_VERYLOW(GPIOA_PIN10) | \
273 PIN_OSPEED_VERYLOW(GPIOA_USB_DM) | \
274 PIN_OSPEED_VERYLOW(GPIOA_USB_DP) | \
275 PIN_OSPEED_HIGH(GPIOA_SWDIO) | \
276 PIN_OSPEED_HIGH(GPIOA_SWCLK) | \
277 PIN_OSPEED_HIGH(GPIOA_PIN15))
278#define VAL_GPIOA_PUPDR (PIN_PUPDR_FLOATING(GPIOA_BUTTON) | \
279 PIN_PUPDR_PULLUP(GPIOA_PIN1) | \
280 PIN_PUPDR_PULLUP(GPIOA_PIN2) | \
281 PIN_PUPDR_PULLUP(GPIOA_PIN3) | \
282 PIN_PUPDR_PULLUP(GPIOA_PIN4) | \
283 PIN_PUPDR_PULLUP(GPIOA_PIN5) | \
284 PIN_PUPDR_PULLUP(GPIOA_PIN6) | \
285 PIN_PUPDR_PULLUP(GPIOA_PIN7) | \
286 PIN_PUPDR_PULLUP(GPIOA_PIN8) | \
287 PIN_PUPDR_PULLUP(GPIOA_PIN9) | \
288 PIN_PUPDR_PULLUP(GPIOA_PIN10) | \
289 PIN_PUPDR_FLOATING(GPIOA_USB_DM) | \
290 PIN_PUPDR_FLOATING(GPIOA_USB_DP) | \
291 PIN_PUPDR_PULLUP(GPIOA_SWDIO) | \
292 PIN_PUPDR_PULLDOWN(GPIOA_SWCLK) | \
293 PIN_PUPDR_PULLUP(GPIOA_PIN15))
294#define VAL_GPIOA_ODR (PIN_ODR_HIGH(GPIOA_BUTTON) | \
295 PIN_ODR_HIGH(GPIOA_PIN1) | \
296 PIN_ODR_HIGH(GPIOA_PIN2) | \
297 PIN_ODR_HIGH(GPIOA_PIN3) | \
298 PIN_ODR_HIGH(GPIOA_PIN4) | \
299 PIN_ODR_HIGH(GPIOA_PIN5) | \
300 PIN_ODR_HIGH(GPIOA_PIN6) | \
301 PIN_ODR_HIGH(GPIOA_PIN7) | \
302 PIN_ODR_HIGH(GPIOA_PIN8) | \
303 PIN_ODR_HIGH(GPIOA_PIN9) | \
304 PIN_ODR_HIGH(GPIOA_PIN10) | \
305 PIN_ODR_HIGH(GPIOA_USB_DM) | \
306 PIN_ODR_HIGH(GPIOA_USB_DP) | \
307 PIN_ODR_HIGH(GPIOA_SWDIO) | \
308 PIN_ODR_HIGH(GPIOA_SWCLK) | \
309 PIN_ODR_HIGH(GPIOA_PIN15))
310#define VAL_GPIOA_AFRL (PIN_AFIO_AF(GPIOA_BUTTON, 0U) | \
311 PIN_AFIO_AF(GPIOA_PIN1, 0U) | \
312 PIN_AFIO_AF(GPIOA_PIN2, 0U) | \
313 PIN_AFIO_AF(GPIOA_PIN3, 0U) | \
314 PIN_AFIO_AF(GPIOA_PIN4, 0U) | \
315 PIN_AFIO_AF(GPIOA_PIN5, 0U) | \
316 PIN_AFIO_AF(GPIOA_PIN6, 0U) | \
317 PIN_AFIO_AF(GPIOA_PIN7, 0U))
318#define VAL_GPIOA_AFRH (PIN_AFIO_AF(GPIOA_PIN8, 0U) | \
319 PIN_AFIO_AF(GPIOA_PIN9, 0U) | \
320 PIN_AFIO_AF(GPIOA_PIN10, 0U) | \
321 PIN_AFIO_AF(GPIOA_USB_DM, 0U) | \
322 PIN_AFIO_AF(GPIOA_USB_DP, 0U) | \
323 PIN_AFIO_AF(GPIOA_SWDIO, 0U) | \
324 PIN_AFIO_AF(GPIOA_SWCLK, 0U) | \
325 PIN_AFIO_AF(GPIOA_PIN15, 0U))
326
327/*
328 * GPIOB setup:
329 *
330 * PB0 - PIN0 (input pullup).
331 * PB1 - PIN1 (input pullup).
332 * PB2 - PIN2 (input pullup).
333 * PB3 - PIN3 (input pullup).
334 * PB4 - PIN4 (input pullup).
335 * PB5 - PIN5 (input pullup).
336 * PB6 - PIN6 (input pullup).
337 * PB7 - PIN7 (input pullup).
338 * PB8 - PIN8 (input pullup).
339 * PB9 - PIN9 (input pullup).
340 * PB10 - PIN10 (input pullup).
341 * PB11 - PIN11 (input pullup).
342 * PB12 - PIN12 (input pullup).
343 * PB13 - SPI2_SCK (alternate 0).
344 * PB14 - SPI2_MISO (alternate 0).
345 * PB15 - SPI2_MOSI (alternate 0).
346 */
347#define VAL_GPIOB_MODER (PIN_MODE_INPUT(GPIOB_PIN0) | \
348 PIN_MODE_INPUT(GPIOB_PIN1) | \
349 PIN_MODE_INPUT(GPIOB_PIN2) | \
350 PIN_MODE_INPUT(GPIOB_PIN3) | \
351 PIN_MODE_INPUT(GPIOB_PIN4) | \
352 PIN_MODE_INPUT(GPIOB_PIN5) | \
353 PIN_MODE_INPUT(GPIOB_PIN6) | \
354 PIN_MODE_INPUT(GPIOB_PIN7) | \
355 PIN_MODE_INPUT(GPIOB_PIN8) | \
356 PIN_MODE_INPUT(GPIOB_PIN9) | \
357 PIN_MODE_INPUT(GPIOB_PIN10) | \
358 PIN_MODE_INPUT(GPIOB_PIN11) | \
359 PIN_MODE_INPUT(GPIOB_PIN12) | \
360 PIN_MODE_ALTERNATE(GPIOB_SPI2_SCK) | \
361 PIN_MODE_ALTERNATE(GPIOB_SPI2_MISO) | \
362 PIN_MODE_ALTERNATE(GPIOB_SPI2_MOSI))
363#define VAL_GPIOB_OTYPER (PIN_OTYPE_PUSHPULL(GPIOB_PIN0) | \
364 PIN_OTYPE_PUSHPULL(GPIOB_PIN1) | \
365 PIN_OTYPE_PUSHPULL(GPIOB_PIN2) | \
366 PIN_OTYPE_PUSHPULL(GPIOB_PIN3) | \
367 PIN_OTYPE_PUSHPULL(GPIOB_PIN4) | \
368 PIN_OTYPE_PUSHPULL(GPIOB_PIN5) | \
369 PIN_OTYPE_PUSHPULL(GPIOB_PIN6) | \
370 PIN_OTYPE_PUSHPULL(GPIOB_PIN7) | \
371 PIN_OTYPE_PUSHPULL(GPIOB_PIN8) | \
372 PIN_OTYPE_PUSHPULL(GPIOB_PIN9) | \
373 PIN_OTYPE_PUSHPULL(GPIOB_PIN10) | \
374 PIN_OTYPE_PUSHPULL(GPIOB_PIN11) | \
375 PIN_OTYPE_PUSHPULL(GPIOB_PIN12) | \
376 PIN_OTYPE_PUSHPULL(GPIOB_SPI2_SCK) | \
377 PIN_OTYPE_PUSHPULL(GPIOB_SPI2_MISO) | \
378 PIN_OTYPE_PUSHPULL(GPIOB_SPI2_MOSI))
379#define VAL_GPIOB_OSPEEDR (PIN_OSPEED_VERYLOW(GPIOB_PIN0) | \
380 PIN_OSPEED_VERYLOW(GPIOB_PIN1) | \
381 PIN_OSPEED_HIGH(GPIOB_PIN2) | \
382 PIN_OSPEED_HIGH(GPIOB_PIN3) | \
383 PIN_OSPEED_HIGH(GPIOB_PIN4) | \
384 PIN_OSPEED_VERYLOW(GPIOB_PIN5) | \
385 PIN_OSPEED_VERYLOW(GPIOB_PIN6) | \
386 PIN_OSPEED_VERYLOW(GPIOB_PIN7) | \
387 PIN_OSPEED_VERYLOW(GPIOB_PIN8) | \
388 PIN_OSPEED_VERYLOW(GPIOB_PIN9) | \
389 PIN_OSPEED_VERYLOW(GPIOB_PIN10) | \
390 PIN_OSPEED_VERYLOW(GPIOB_PIN11) | \
391 PIN_OSPEED_VERYLOW(GPIOB_PIN12) | \
392 PIN_OSPEED_VERYLOW(GPIOB_SPI2_SCK) | \
393 PIN_OSPEED_VERYLOW(GPIOB_SPI2_MISO) | \
394 PIN_OSPEED_VERYLOW(GPIOB_SPI2_MOSI))
395#define VAL_GPIOB_PUPDR (PIN_PUPDR_PULLUP(GPIOB_PIN0) | \
396 PIN_PUPDR_PULLUP(GPIOB_PIN1) | \
397 PIN_PUPDR_PULLUP(GPIOB_PIN2) | \
398 PIN_PUPDR_PULLUP(GPIOB_PIN3) | \
399 PIN_PUPDR_PULLUP(GPIOB_PIN4) | \
400 PIN_PUPDR_PULLUP(GPIOB_PIN5) | \
401 PIN_PUPDR_PULLUP(GPIOB_PIN6) | \
402 PIN_PUPDR_PULLUP(GPIOB_PIN7) | \
403 PIN_PUPDR_PULLUP(GPIOB_PIN8) | \
404 PIN_PUPDR_PULLUP(GPIOB_PIN9) | \
405 PIN_PUPDR_PULLUP(GPIOB_PIN10) | \
406 PIN_PUPDR_PULLUP(GPIOB_PIN11) | \
407 PIN_PUPDR_PULLUP(GPIOB_PIN12) | \
408 PIN_PUPDR_FLOATING(GPIOB_SPI2_SCK) | \
409 PIN_PUPDR_FLOATING(GPIOB_SPI2_MISO) | \
410 PIN_PUPDR_FLOATING(GPIOB_SPI2_MOSI))
411#define VAL_GPIOB_ODR (PIN_ODR_HIGH(GPIOB_PIN0) | \
412 PIN_ODR_HIGH(GPIOB_PIN1) | \
413 PIN_ODR_HIGH(GPIOB_PIN2) | \
414 PIN_ODR_HIGH(GPIOB_PIN3) | \
415 PIN_ODR_HIGH(GPIOB_PIN4) | \
416 PIN_ODR_HIGH(GPIOB_PIN5) | \
417 PIN_ODR_HIGH(GPIOB_PIN6) | \
418 PIN_ODR_HIGH(GPIOB_PIN7) | \
419 PIN_ODR_HIGH(GPIOB_PIN8) | \
420 PIN_ODR_HIGH(GPIOB_PIN9) | \
421 PIN_ODR_HIGH(GPIOB_PIN10) | \
422 PIN_ODR_HIGH(GPIOB_PIN11) | \
423 PIN_ODR_HIGH(GPIOB_PIN12) | \
424 PIN_ODR_HIGH(GPIOB_SPI2_SCK) | \
425 PIN_ODR_HIGH(GPIOB_SPI2_MISO) | \
426 PIN_ODR_HIGH(GPIOB_SPI2_MOSI))
427#define VAL_GPIOB_AFRL (PIN_AFIO_AF(GPIOB_PIN0, 0U) | \
428 PIN_AFIO_AF(GPIOB_PIN1, 0U) | \
429 PIN_AFIO_AF(GPIOB_PIN2, 0U) | \
430 PIN_AFIO_AF(GPIOB_PIN3, 0U) | \
431 PIN_AFIO_AF(GPIOB_PIN4, 0U) | \
432 PIN_AFIO_AF(GPIOB_PIN5, 0U) | \
433 PIN_AFIO_AF(GPIOB_PIN6, 0U) | \
434 PIN_AFIO_AF(GPIOB_PIN7, 0U))
435#define VAL_GPIOB_AFRH (PIN_AFIO_AF(GPIOB_PIN8, 0U) | \
436 PIN_AFIO_AF(GPIOB_PIN9, 0U) | \
437 PIN_AFIO_AF(GPIOB_PIN10, 0U) | \
438 PIN_AFIO_AF(GPIOB_PIN11, 0U) | \
439 PIN_AFIO_AF(GPIOB_PIN12, 0U) | \
440 PIN_AFIO_AF(GPIOB_SPI2_SCK, 0U) | \
441 PIN_AFIO_AF(GPIOB_SPI2_MISO, 0U) | \
442 PIN_AFIO_AF(GPIOB_SPI2_MOSI, 0U))
443
444/*
445 * GPIOC setup:
446 *
447 * PC0 - MEMS_CS (output pushpull maximum).
448 * PC1 - PIN1 (input pullup).
449 * PC2 - PIN2 (input pullup).
450 * PC3 - PIN3 (input pullup).
451 * PC4 - PIN4 (input pullup).
452 * PC5 - PIN5 (input pullup).
453 * PC6 - LED_RED (output pushpull maximum).
454 * PC7 - LED_BLUE (output pushpull maximum).
455 * PC8 - LED_ORANGE (output pushpull maximum).
456 * PC9 - LED_GREEN (output pushpull maximum).
457 * PC10 - PIN10 (input pullup).
458 * PC11 - PIN11 (input pullup).
459 * PC12 - PIN12 (input pullup).
460 * PC13 - PIN13 (input pullup).
461 * PC14 - OSC32_IN (input floating).
462 * PC15 - OSC32_OUT (input floating).
463 */
464#define VAL_GPIOC_MODER (PIN_MODE_OUTPUT(GPIOC_MEMS_CS) | \
465 PIN_MODE_INPUT(GPIOC_PIN1) | \
466 PIN_MODE_INPUT(GPIOC_PIN2) | \
467 PIN_MODE_INPUT(GPIOC_PIN3) | \
468 PIN_MODE_INPUT(GPIOC_PIN4) | \
469 PIN_MODE_INPUT(GPIOC_PIN5) | \
470 PIN_MODE_OUTPUT(GPIOC_LED_RED) | \
471 PIN_MODE_OUTPUT(GPIOC_LED_BLUE) | \
472 PIN_MODE_OUTPUT(GPIOC_LED_ORANGE) | \
473 PIN_MODE_OUTPUT(GPIOC_LED_GREEN) | \
474 PIN_MODE_INPUT(GPIOC_PIN10) | \
475 PIN_MODE_INPUT(GPIOC_PIN11) | \
476 PIN_MODE_INPUT(GPIOC_PIN12) | \
477 PIN_MODE_INPUT(GPIOC_PIN13) | \
478 PIN_MODE_INPUT(GPIOC_OSC32_IN) | \
479 PIN_MODE_INPUT(GPIOC_OSC32_OUT))
480#define VAL_GPIOC_OTYPER (PIN_OTYPE_PUSHPULL(GPIOC_MEMS_CS) | \
481 PIN_OTYPE_PUSHPULL(GPIOC_PIN1) | \
482 PIN_OTYPE_PUSHPULL(GPIOC_PIN2) | \
483 PIN_OTYPE_PUSHPULL(GPIOC_PIN3) | \
484 PIN_OTYPE_PUSHPULL(GPIOC_PIN4) | \
485 PIN_OTYPE_PUSHPULL(GPIOC_PIN5) | \
486 PIN_OTYPE_PUSHPULL(GPIOC_LED_RED) | \
487 PIN_OTYPE_PUSHPULL(GPIOC_LED_BLUE) | \
488 PIN_OTYPE_PUSHPULL(GPIOC_LED_ORANGE) | \
489 PIN_OTYPE_PUSHPULL(GPIOC_LED_GREEN) | \
490 PIN_OTYPE_PUSHPULL(GPIOC_PIN10) | \
491 PIN_OTYPE_PUSHPULL(GPIOC_PIN11) | \
492 PIN_OTYPE_PUSHPULL(GPIOC_PIN12) | \
493 PIN_OTYPE_PUSHPULL(GPIOC_PIN13) | \
494 PIN_OTYPE_PUSHPULL(GPIOC_OSC32_IN) | \
495 PIN_OTYPE_PUSHPULL(GPIOC_OSC32_OUT))
496#define VAL_GPIOC_OSPEEDR (PIN_OSPEED_HIGH(GPIOC_MEMS_CS) | \
497 PIN_OSPEED_VERYLOW(GPIOC_PIN1) | \
498 PIN_OSPEED_VERYLOW(GPIOC_PIN2) | \
499 PIN_OSPEED_VERYLOW(GPIOC_PIN3) | \
500 PIN_OSPEED_VERYLOW(GPIOC_PIN4) | \
501 PIN_OSPEED_VERYLOW(GPIOC_PIN5) | \
502 PIN_OSPEED_HIGH(GPIOC_LED_RED) | \
503 PIN_OSPEED_HIGH(GPIOC_LED_BLUE) | \
504 PIN_OSPEED_HIGH(GPIOC_LED_ORANGE) | \
505 PIN_OSPEED_HIGH(GPIOC_LED_GREEN) | \
506 PIN_OSPEED_VERYLOW(GPIOC_PIN10) | \
507 PIN_OSPEED_VERYLOW(GPIOC_PIN11) | \
508 PIN_OSPEED_VERYLOW(GPIOC_PIN12) | \
509 PIN_OSPEED_VERYLOW(GPIOC_PIN13) | \
510 PIN_OSPEED_HIGH(GPIOC_OSC32_IN) | \
511 PIN_OSPEED_HIGH(GPIOC_OSC32_OUT))
512#define VAL_GPIOC_PUPDR (PIN_PUPDR_FLOATING(GPIOC_MEMS_CS) | \
513 PIN_PUPDR_PULLUP(GPIOC_PIN1) | \
514 PIN_PUPDR_PULLUP(GPIOC_PIN2) | \
515 PIN_PUPDR_PULLUP(GPIOC_PIN3) | \
516 PIN_PUPDR_PULLUP(GPIOC_PIN4) | \
517 PIN_PUPDR_PULLUP(GPIOC_PIN5) | \
518 PIN_PUPDR_FLOATING(GPIOC_LED_RED) | \
519 PIN_PUPDR_FLOATING(GPIOC_LED_BLUE) | \
520 PIN_PUPDR_FLOATING(GPIOC_LED_ORANGE) | \
521 PIN_PUPDR_FLOATING(GPIOC_LED_GREEN) | \
522 PIN_PUPDR_PULLUP(GPIOC_PIN10) | \
523 PIN_PUPDR_PULLUP(GPIOC_PIN11) | \
524 PIN_PUPDR_PULLUP(GPIOC_PIN12) | \
525 PIN_PUPDR_PULLUP(GPIOC_PIN13) | \
526 PIN_PUPDR_FLOATING(GPIOC_OSC32_IN) | \
527 PIN_PUPDR_FLOATING(GPIOC_OSC32_OUT))
528#define VAL_GPIOC_ODR (PIN_ODR_HIGH(GPIOC_MEMS_CS) | \
529 PIN_ODR_HIGH(GPIOC_PIN1) | \
530 PIN_ODR_HIGH(GPIOC_PIN2) | \
531 PIN_ODR_HIGH(GPIOC_PIN3) | \
532 PIN_ODR_HIGH(GPIOC_PIN4) | \
533 PIN_ODR_HIGH(GPIOC_PIN5) | \
534 PIN_ODR_LOW(GPIOC_LED_RED) | \
535 PIN_ODR_LOW(GPIOC_LED_BLUE) | \
536 PIN_ODR_LOW(GPIOC_LED_ORANGE) | \
537 PIN_ODR_LOW(GPIOC_LED_GREEN) | \
538 PIN_ODR_HIGH(GPIOC_PIN10) | \
539 PIN_ODR_HIGH(GPIOC_PIN11) | \
540 PIN_ODR_HIGH(GPIOC_PIN12) | \
541 PIN_ODR_HIGH(GPIOC_PIN13) | \
542 PIN_ODR_HIGH(GPIOC_OSC32_IN) | \
543 PIN_ODR_HIGH(GPIOC_OSC32_OUT))
544#define VAL_GPIOC_AFRL (PIN_AFIO_AF(GPIOC_MEMS_CS, 0U) | \
545 PIN_AFIO_AF(GPIOC_PIN1, 0U) | \
546 PIN_AFIO_AF(GPIOC_PIN2, 0U) | \
547 PIN_AFIO_AF(GPIOC_PIN3, 0U) | \
548 PIN_AFIO_AF(GPIOC_PIN4, 0U) | \
549 PIN_AFIO_AF(GPIOC_PIN5, 0U) | \
550 PIN_AFIO_AF(GPIOC_LED_RED, 0U) | \
551 PIN_AFIO_AF(GPIOC_LED_BLUE, 0U))
552#define VAL_GPIOC_AFRH (PIN_AFIO_AF(GPIOC_LED_ORANGE, 0U) | \
553 PIN_AFIO_AF(GPIOC_LED_GREEN, 0U) | \
554 PIN_AFIO_AF(GPIOC_PIN10, 0U) | \
555 PIN_AFIO_AF(GPIOC_PIN11, 0U) | \
556 PIN_AFIO_AF(GPIOC_PIN12, 0U) | \
557 PIN_AFIO_AF(GPIOC_PIN13, 0U) | \
558 PIN_AFIO_AF(GPIOC_OSC32_IN, 0U) | \
559 PIN_AFIO_AF(GPIOC_OSC32_OUT, 0U))
560
561/*
562 * GPIOD setup:
563 *
564 * PD0 - PIN0 (input pullup).
565 * PD1 - PIN1 (input pullup).
566 * PD2 - PIN2 (input pullup).
567 * PD3 - PIN3 (input pullup).
568 * PD4 - PIN4 (input pullup).
569 * PD5 - PIN5 (input pullup).
570 * PD6 - PIN6 (input pullup).
571 * PD7 - PIN7 (input pullup).
572 * PD8 - PIN8 (input pullup).
573 * PD9 - PIN9 (input pullup).
574 * PD10 - PIN10 (input pullup).
575 * PD11 - PIN11 (input pullup).
576 * PD12 - PIN12 (input pullup).
577 * PD13 - PIN13 (input pullup).
578 * PD14 - PIN14 (input pullup).
579 * PD15 - PIN15 (input pullup).
580 */
581#define VAL_GPIOD_MODER (PIN_MODE_INPUT(GPIOD_PIN0) | \
582 PIN_MODE_INPUT(GPIOD_PIN1) | \
583 PIN_MODE_INPUT(GPIOD_PIN2) | \
584 PIN_MODE_INPUT(GPIOD_PIN3) | \
585 PIN_MODE_INPUT(GPIOD_PIN4) | \
586 PIN_MODE_INPUT(GPIOD_PIN5) | \
587 PIN_MODE_INPUT(GPIOD_PIN6) | \
588 PIN_MODE_INPUT(GPIOD_PIN7) | \
589 PIN_MODE_INPUT(GPIOD_PIN8) | \
590 PIN_MODE_INPUT(GPIOD_PIN9) | \
591 PIN_MODE_INPUT(GPIOD_PIN10) | \
592 PIN_MODE_INPUT(GPIOD_PIN11) | \
593 PIN_MODE_INPUT(GPIOD_PIN12) | \
594 PIN_MODE_INPUT(GPIOD_PIN13) | \
595 PIN_MODE_INPUT(GPIOD_PIN14) | \
596 PIN_MODE_INPUT(GPIOD_PIN15))
597#define VAL_GPIOD_OTYPER (PIN_OTYPE_PUSHPULL(GPIOD_PIN0) | \
598 PIN_OTYPE_PUSHPULL(GPIOD_PIN1) | \
599 PIN_OTYPE_PUSHPULL(GPIOD_PIN2) | \
600 PIN_OTYPE_PUSHPULL(GPIOD_PIN3) | \
601 PIN_OTYPE_PUSHPULL(GPIOD_PIN4) | \
602 PIN_OTYPE_PUSHPULL(GPIOD_PIN5) | \
603 PIN_OTYPE_PUSHPULL(GPIOD_PIN6) | \
604 PIN_OTYPE_PUSHPULL(GPIOD_PIN7) | \
605 PIN_OTYPE_PUSHPULL(GPIOD_PIN8) | \
606 PIN_OTYPE_PUSHPULL(GPIOD_PIN9) | \
607 PIN_OTYPE_PUSHPULL(GPIOD_PIN10) | \
608 PIN_OTYPE_PUSHPULL(GPIOD_PIN11) | \
609 PIN_OTYPE_PUSHPULL(GPIOD_PIN12) | \
610 PIN_OTYPE_PUSHPULL(GPIOD_PIN13) | \
611 PIN_OTYPE_PUSHPULL(GPIOD_PIN14) | \
612 PIN_OTYPE_PUSHPULL(GPIOD_PIN15))
613#define VAL_GPIOD_OSPEEDR (PIN_OSPEED_VERYLOW(GPIOD_PIN0) | \
614 PIN_OSPEED_VERYLOW(GPIOD_PIN1) | \
615 PIN_OSPEED_VERYLOW(GPIOD_PIN2) | \
616 PIN_OSPEED_VERYLOW(GPIOD_PIN3) | \
617 PIN_OSPEED_VERYLOW(GPIOD_PIN4) | \
618 PIN_OSPEED_VERYLOW(GPIOD_PIN5) | \
619 PIN_OSPEED_VERYLOW(GPIOD_PIN6) | \
620 PIN_OSPEED_VERYLOW(GPIOD_PIN7) | \
621 PIN_OSPEED_VERYLOW(GPIOD_PIN8) | \
622 PIN_OSPEED_VERYLOW(GPIOD_PIN9) | \
623 PIN_OSPEED_VERYLOW(GPIOD_PIN10) | \
624 PIN_OSPEED_VERYLOW(GPIOD_PIN11) | \
625 PIN_OSPEED_VERYLOW(GPIOD_PIN12) | \
626 PIN_OSPEED_VERYLOW(GPIOD_PIN13) | \
627 PIN_OSPEED_VERYLOW(GPIOD_PIN14) | \
628 PIN_OSPEED_VERYLOW(GPIOD_PIN15))
629#define VAL_GPIOD_PUPDR (PIN_PUPDR_PULLUP(GPIOD_PIN0) | \
630 PIN_PUPDR_PULLUP(GPIOD_PIN1) | \
631 PIN_PUPDR_PULLUP(GPIOD_PIN2) | \
632 PIN_PUPDR_PULLUP(GPIOD_PIN3) | \
633 PIN_PUPDR_PULLUP(GPIOD_PIN4) | \
634 PIN_PUPDR_PULLUP(GPIOD_PIN5) | \
635 PIN_PUPDR_PULLUP(GPIOD_PIN6) | \
636 PIN_PUPDR_PULLUP(GPIOD_PIN7) | \
637 PIN_PUPDR_PULLUP(GPIOD_PIN8) | \
638 PIN_PUPDR_PULLUP(GPIOD_PIN9) | \
639 PIN_PUPDR_PULLUP(GPIOD_PIN10) | \
640 PIN_PUPDR_PULLUP(GPIOD_PIN11) | \
641 PIN_PUPDR_PULLUP(GPIOD_PIN12) | \
642 PIN_PUPDR_PULLUP(GPIOD_PIN13) | \
643 PIN_PUPDR_PULLUP(GPIOD_PIN14) | \
644 PIN_PUPDR_PULLUP(GPIOD_PIN15))
645#define VAL_GPIOD_ODR (PIN_ODR_HIGH(GPIOD_PIN0) | \
646 PIN_ODR_HIGH(GPIOD_PIN1) | \
647 PIN_ODR_HIGH(GPIOD_PIN2) | \
648 PIN_ODR_HIGH(GPIOD_PIN3) | \
649 PIN_ODR_HIGH(GPIOD_PIN4) | \
650 PIN_ODR_HIGH(GPIOD_PIN5) | \
651 PIN_ODR_HIGH(GPIOD_PIN6) | \
652 PIN_ODR_HIGH(GPIOD_PIN7) | \
653 PIN_ODR_HIGH(GPIOD_PIN8) | \
654 PIN_ODR_HIGH(GPIOD_PIN9) | \
655 PIN_ODR_HIGH(GPIOD_PIN10) | \
656 PIN_ODR_HIGH(GPIOD_PIN11) | \
657 PIN_ODR_HIGH(GPIOD_PIN12) | \
658 PIN_ODR_HIGH(GPIOD_PIN13) | \
659 PIN_ODR_HIGH(GPIOD_PIN14) | \
660 PIN_ODR_HIGH(GPIOD_PIN15))
661#define VAL_GPIOD_AFRL (PIN_AFIO_AF(GPIOD_PIN0, 0U) | \
662 PIN_AFIO_AF(GPIOD_PIN1, 0U) | \
663 PIN_AFIO_AF(GPIOD_PIN2, 0U) | \
664 PIN_AFIO_AF(GPIOD_PIN3, 0U) | \
665 PIN_AFIO_AF(GPIOD_PIN4, 0U) | \
666 PIN_AFIO_AF(GPIOD_PIN5, 0U) | \
667 PIN_AFIO_AF(GPIOD_PIN6, 0U) | \
668 PIN_AFIO_AF(GPIOD_PIN7, 0U))
669#define VAL_GPIOD_AFRH (PIN_AFIO_AF(GPIOD_PIN8, 0U) | \
670 PIN_AFIO_AF(GPIOD_PIN9, 0U) | \
671 PIN_AFIO_AF(GPIOD_PIN10, 0U) | \
672 PIN_AFIO_AF(GPIOD_PIN11, 0U) | \
673 PIN_AFIO_AF(GPIOD_PIN12, 0U) | \
674 PIN_AFIO_AF(GPIOD_PIN13, 0U) | \
675 PIN_AFIO_AF(GPIOD_PIN14, 0U) | \
676 PIN_AFIO_AF(GPIOD_PIN15, 0U))
677
678/*
679 * GPIOE setup:
680 *
681 * PE0 - PIN0 (input pullup).
682 * PE1 - PIN1 (input pullup).
683 * PE2 - PIN2 (input pullup).
684 * PE3 - PIN3 (input pullup).
685 * PE4 - PIN4 (input pullup).
686 * PE5 - PIN5 (input pullup).
687 * PE6 - PIN6 (input pullup).
688 * PE7 - PIN7 (input pullup).
689 * PE8 - PIN8 (input pullup).
690 * PE9 - PIN9 (input pullup).
691 * PE10 - PIN10 (input pullup).
692 * PE11 - PIN11 (input pullup).
693 * PE12 - PIN12 (input pullup).
694 * PE13 - PIN13 (input pullup).
695 * PE14 - PIN14 (input pullup).
696 * PE15 - PIN15 (input pullup).
697 */
698#define VAL_GPIOE_MODER (PIN_MODE_INPUT(GPIOE_PIN0) | \
699 PIN_MODE_INPUT(GPIOE_PIN1) | \
700 PIN_MODE_INPUT(GPIOE_PIN2) | \
701 PIN_MODE_INPUT(GPIOE_PIN3) | \
702 PIN_MODE_INPUT(GPIOE_PIN4) | \
703 PIN_MODE_INPUT(GPIOE_PIN5) | \
704 PIN_MODE_INPUT(GPIOE_PIN6) | \
705 PIN_MODE_INPUT(GPIOE_PIN7) | \
706 PIN_MODE_INPUT(GPIOE_PIN8) | \
707 PIN_MODE_INPUT(GPIOE_PIN9) | \
708 PIN_MODE_INPUT(GPIOE_PIN10) | \
709 PIN_MODE_INPUT(GPIOE_PIN11) | \
710 PIN_MODE_INPUT(GPIOE_PIN12) | \
711 PIN_MODE_INPUT(GPIOE_PIN13) | \
712 PIN_MODE_INPUT(GPIOE_PIN14) | \
713 PIN_MODE_INPUT(GPIOE_PIN15))
714#define VAL_GPIOE_OTYPER (PIN_OTYPE_PUSHPULL(GPIOE_PIN0) | \
715 PIN_OTYPE_PUSHPULL(GPIOE_PIN1) | \
716 PIN_OTYPE_PUSHPULL(GPIOE_PIN2) | \
717 PIN_OTYPE_PUSHPULL(GPIOE_PIN3) | \
718 PIN_OTYPE_PUSHPULL(GPIOE_PIN4) | \
719 PIN_OTYPE_PUSHPULL(GPIOE_PIN5) | \
720 PIN_OTYPE_PUSHPULL(GPIOE_PIN6) | \
721 PIN_OTYPE_PUSHPULL(GPIOE_PIN7) | \
722 PIN_OTYPE_PUSHPULL(GPIOE_PIN8) | \
723 PIN_OTYPE_PUSHPULL(GPIOE_PIN9) | \
724 PIN_OTYPE_PUSHPULL(GPIOE_PIN10) | \
725 PIN_OTYPE_PUSHPULL(GPIOE_PIN11) | \
726 PIN_OTYPE_PUSHPULL(GPIOE_PIN12) | \
727 PIN_OTYPE_PUSHPULL(GPIOE_PIN13) | \
728 PIN_OTYPE_PUSHPULL(GPIOE_PIN14) | \
729 PIN_OTYPE_PUSHPULL(GPIOE_PIN15))
730#define VAL_GPIOE_OSPEEDR (PIN_OSPEED_VERYLOW(GPIOE_PIN0) | \
731 PIN_OSPEED_VERYLOW(GPIOE_PIN1) | \
732 PIN_OSPEED_VERYLOW(GPIOE_PIN2) | \
733 PIN_OSPEED_VERYLOW(GPIOE_PIN3) | \
734 PIN_OSPEED_VERYLOW(GPIOE_PIN4) | \
735 PIN_OSPEED_VERYLOW(GPIOE_PIN5) | \
736 PIN_OSPEED_VERYLOW(GPIOE_PIN6) | \
737 PIN_OSPEED_VERYLOW(GPIOE_PIN7) | \
738 PIN_OSPEED_VERYLOW(GPIOE_PIN8) | \
739 PIN_OSPEED_VERYLOW(GPIOE_PIN9) | \
740 PIN_OSPEED_VERYLOW(GPIOE_PIN10) | \
741 PIN_OSPEED_VERYLOW(GPIOE_PIN11) | \
742 PIN_OSPEED_VERYLOW(GPIOE_PIN12) | \
743 PIN_OSPEED_VERYLOW(GPIOE_PIN13) | \
744 PIN_OSPEED_VERYLOW(GPIOE_PIN14) | \
745 PIN_OSPEED_VERYLOW(GPIOE_PIN15))
746#define VAL_GPIOE_PUPDR (PIN_PUPDR_PULLUP(GPIOE_PIN0) | \
747 PIN_PUPDR_PULLUP(GPIOE_PIN1) | \
748 PIN_PUPDR_PULLUP(GPIOE_PIN2) | \
749 PIN_PUPDR_PULLUP(GPIOE_PIN3) | \
750 PIN_PUPDR_PULLUP(GPIOE_PIN4) | \
751 PIN_PUPDR_PULLUP(GPIOE_PIN5) | \
752 PIN_PUPDR_PULLUP(GPIOE_PIN6) | \
753 PIN_PUPDR_PULLUP(GPIOE_PIN7) | \
754 PIN_PUPDR_PULLUP(GPIOE_PIN8) | \
755 PIN_PUPDR_PULLUP(GPIOE_PIN9) | \
756 PIN_PUPDR_PULLUP(GPIOE_PIN10) | \
757 PIN_PUPDR_PULLUP(GPIOE_PIN11) | \
758 PIN_PUPDR_PULLUP(GPIOE_PIN12) | \
759 PIN_PUPDR_PULLUP(GPIOE_PIN13) | \
760 PIN_PUPDR_PULLUP(GPIOE_PIN14) | \
761 PIN_PUPDR_PULLUP(GPIOE_PIN15))
762#define VAL_GPIOE_ODR (PIN_ODR_HIGH(GPIOE_PIN0) | \
763 PIN_ODR_HIGH(GPIOE_PIN1) | \
764 PIN_ODR_HIGH(GPIOE_PIN2) | \
765 PIN_ODR_HIGH(GPIOE_PIN3) | \
766 PIN_ODR_HIGH(GPIOE_PIN4) | \
767 PIN_ODR_HIGH(GPIOE_PIN5) | \
768 PIN_ODR_HIGH(GPIOE_PIN6) | \
769 PIN_ODR_HIGH(GPIOE_PIN7) | \
770 PIN_ODR_HIGH(GPIOE_PIN8) | \
771 PIN_ODR_HIGH(GPIOE_PIN9) | \
772 PIN_ODR_HIGH(GPIOE_PIN10) | \
773 PIN_ODR_HIGH(GPIOE_PIN11) | \
774 PIN_ODR_HIGH(GPIOE_PIN12) | \
775 PIN_ODR_HIGH(GPIOE_PIN13) | \
776 PIN_ODR_HIGH(GPIOE_PIN14) | \
777 PIN_ODR_HIGH(GPIOE_PIN15))
778#define VAL_GPIOE_AFRL (PIN_AFIO_AF(GPIOE_PIN0, 0U) | \
779 PIN_AFIO_AF(GPIOE_PIN1, 0U) | \
780 PIN_AFIO_AF(GPIOE_PIN2, 0U) | \
781 PIN_AFIO_AF(GPIOE_PIN3, 0U) | \
782 PIN_AFIO_AF(GPIOE_PIN4, 0U) | \
783 PIN_AFIO_AF(GPIOE_PIN5, 0U) | \
784 PIN_AFIO_AF(GPIOE_PIN6, 0U) | \
785 PIN_AFIO_AF(GPIOE_PIN7, 0U))
786#define VAL_GPIOE_AFRH (PIN_AFIO_AF(GPIOE_PIN8, 0U) | \
787 PIN_AFIO_AF(GPIOE_PIN9, 0U) | \
788 PIN_AFIO_AF(GPIOE_PIN10, 0U) | \
789 PIN_AFIO_AF(GPIOE_PIN11, 0U) | \
790 PIN_AFIO_AF(GPIOE_PIN12, 0U) | \
791 PIN_AFIO_AF(GPIOE_PIN13, 0U) | \
792 PIN_AFIO_AF(GPIOE_PIN14, 0U) | \
793 PIN_AFIO_AF(GPIOE_PIN15, 0U))
794
795/*
796 * GPIOF setup:
797 *
798 * PF0 - OSC_IN (input floating).
799 * PF1 - OSC_OUT (input floating).
800 * PF2 - PIN2 (input pullup).
801 * PF3 - PIN3 (input pullup).
802 * PF4 - PIN4 (input pullup).
803 * PF5 - PIN5 (input pullup).
804 * PF6 - PIN6 (input pullup).
805 * PF7 - PIN7 (input pullup).
806 * PF8 - PIN8 (input pullup).
807 * PF9 - PIN9 (input pullup).
808 * PF10 - PIN10 (input pullup).
809 * PF11 - PIN11 (input pullup).
810 * PF12 - PIN12 (input pullup).
811 * PF13 - PIN13 (input pullup).
812 * PF14 - PIN14 (input pullup).
813 * PF15 - PIN15 (input pullup).
814 */
815#define VAL_GPIOF_MODER (PIN_MODE_INPUT(GPIOF_OSC_IN) | \
816 PIN_MODE_INPUT(GPIOF_OSC_OUT) | \
817 PIN_MODE_INPUT(GPIOF_PIN2) | \
818 PIN_MODE_INPUT(GPIOF_PIN3) | \
819 PIN_MODE_INPUT(GPIOF_PIN4) | \
820 PIN_MODE_INPUT(GPIOF_PIN5) | \
821 PIN_MODE_INPUT(GPIOF_PIN6) | \
822 PIN_MODE_INPUT(GPIOF_PIN7) | \
823 PIN_MODE_INPUT(GPIOF_PIN8) | \
824 PIN_MODE_INPUT(GPIOF_PIN9) | \
825 PIN_MODE_INPUT(GPIOF_PIN10) | \
826 PIN_MODE_INPUT(GPIOF_PIN11) | \
827 PIN_MODE_INPUT(GPIOF_PIN12) | \
828 PIN_MODE_INPUT(GPIOF_PIN13) | \
829 PIN_MODE_INPUT(GPIOF_PIN14) | \
830 PIN_MODE_INPUT(GPIOF_PIN15))
831#define VAL_GPIOF_OTYPER (PIN_OTYPE_PUSHPULL(GPIOF_OSC_IN) | \
832 PIN_OTYPE_PUSHPULL(GPIOF_OSC_OUT) | \
833 PIN_OTYPE_PUSHPULL(GPIOF_PIN2) | \
834 PIN_OTYPE_PUSHPULL(GPIOF_PIN3) | \
835 PIN_OTYPE_PUSHPULL(GPIOF_PIN4) | \
836 PIN_OTYPE_PUSHPULL(GPIOF_PIN5) | \
837 PIN_OTYPE_PUSHPULL(GPIOF_PIN6) | \
838 PIN_OTYPE_PUSHPULL(GPIOF_PIN7) | \
839 PIN_OTYPE_PUSHPULL(GPIOF_PIN8) | \
840 PIN_OTYPE_PUSHPULL(GPIOF_PIN9) | \
841 PIN_OTYPE_PUSHPULL(GPIOF_PIN10) | \
842 PIN_OTYPE_PUSHPULL(GPIOF_PIN11) | \
843 PIN_OTYPE_PUSHPULL(GPIOF_PIN12) | \
844 PIN_OTYPE_PUSHPULL(GPIOF_PIN13) | \
845 PIN_OTYPE_PUSHPULL(GPIOF_PIN14) | \
846 PIN_OTYPE_PUSHPULL(GPIOF_PIN15))
847#define VAL_GPIOF_OSPEEDR (PIN_OSPEED_VERYLOW(GPIOF_OSC_IN) | \
848 PIN_OSPEED_VERYLOW(GPIOF_OSC_OUT) | \
849 PIN_OSPEED_VERYLOW(GPIOF_PIN2) | \
850 PIN_OSPEED_VERYLOW(GPIOF_PIN3) | \
851 PIN_OSPEED_VERYLOW(GPIOF_PIN4) | \
852 PIN_OSPEED_VERYLOW(GPIOF_PIN5) | \
853 PIN_OSPEED_VERYLOW(GPIOF_PIN6) | \
854 PIN_OSPEED_VERYLOW(GPIOF_PIN7) | \
855 PIN_OSPEED_VERYLOW(GPIOF_PIN8) | \
856 PIN_OSPEED_VERYLOW(GPIOF_PIN9) | \
857 PIN_OSPEED_VERYLOW(GPIOF_PIN10) | \
858 PIN_OSPEED_VERYLOW(GPIOF_PIN11) | \
859 PIN_OSPEED_VERYLOW(GPIOF_PIN12) | \
860 PIN_OSPEED_VERYLOW(GPIOF_PIN13) | \
861 PIN_OSPEED_VERYLOW(GPIOF_PIN14) | \
862 PIN_OSPEED_VERYLOW(GPIOF_PIN15))
863#define VAL_GPIOF_PUPDR (PIN_PUPDR_FLOATING(GPIOF_OSC_IN) | \
864 PIN_PUPDR_FLOATING(GPIOF_OSC_OUT) | \
865 PIN_PUPDR_PULLUP(GPIOF_PIN2) | \
866 PIN_PUPDR_PULLUP(GPIOF_PIN3) | \
867 PIN_PUPDR_PULLUP(GPIOF_PIN4) | \
868 PIN_PUPDR_PULLUP(GPIOF_PIN5) | \
869 PIN_PUPDR_PULLUP(GPIOF_PIN6) | \
870 PIN_PUPDR_PULLUP(GPIOF_PIN7) | \
871 PIN_PUPDR_PULLUP(GPIOF_PIN8) | \
872 PIN_PUPDR_PULLUP(GPIOF_PIN9) | \
873 PIN_PUPDR_PULLUP(GPIOF_PIN10) | \
874 PIN_PUPDR_PULLUP(GPIOF_PIN11) | \
875 PIN_PUPDR_PULLUP(GPIOF_PIN12) | \
876 PIN_PUPDR_PULLUP(GPIOF_PIN13) | \
877 PIN_PUPDR_PULLUP(GPIOF_PIN14) | \
878 PIN_PUPDR_PULLUP(GPIOF_PIN15))
879#define VAL_GPIOF_ODR (PIN_ODR_HIGH(GPIOF_OSC_IN) | \
880 PIN_ODR_HIGH(GPIOF_OSC_OUT) | \
881 PIN_ODR_HIGH(GPIOF_PIN2) | \
882 PIN_ODR_HIGH(GPIOF_PIN3) | \
883 PIN_ODR_HIGH(GPIOF_PIN4) | \
884 PIN_ODR_HIGH(GPIOF_PIN5) | \
885 PIN_ODR_HIGH(GPIOF_PIN6) | \
886 PIN_ODR_HIGH(GPIOF_PIN7) | \
887 PIN_ODR_HIGH(GPIOF_PIN8) | \
888 PIN_ODR_HIGH(GPIOF_PIN9) | \
889 PIN_ODR_HIGH(GPIOF_PIN10) | \
890 PIN_ODR_HIGH(GPIOF_PIN11) | \
891 PIN_ODR_HIGH(GPIOF_PIN12) | \
892 PIN_ODR_HIGH(GPIOF_PIN13) | \
893 PIN_ODR_HIGH(GPIOF_PIN14) | \
894 PIN_ODR_HIGH(GPIOF_PIN15))
895#define VAL_GPIOF_AFRL (PIN_AFIO_AF(GPIOF_OSC_IN, 0U) | \
896 PIN_AFIO_AF(GPIOF_OSC_OUT, 0U) | \
897 PIN_AFIO_AF(GPIOF_PIN2, 0U) | \
898 PIN_AFIO_AF(GPIOF_PIN3, 0U) | \
899 PIN_AFIO_AF(GPIOF_PIN4, 0U) | \
900 PIN_AFIO_AF(GPIOF_PIN5, 0U) | \
901 PIN_AFIO_AF(GPIOF_PIN6, 0U) | \
902 PIN_AFIO_AF(GPIOF_PIN7, 0U))
903#define VAL_GPIOF_AFRH (PIN_AFIO_AF(GPIOF_PIN8, 0U) | \
904 PIN_AFIO_AF(GPIOF_PIN9, 0U) | \
905 PIN_AFIO_AF(GPIOF_PIN10, 0U) | \
906 PIN_AFIO_AF(GPIOF_PIN11, 0U) | \
907 PIN_AFIO_AF(GPIOF_PIN12, 0U) | \
908 PIN_AFIO_AF(GPIOF_PIN13, 0U) | \
909 PIN_AFIO_AF(GPIOF_PIN14, 0U) | \
910 PIN_AFIO_AF(GPIOF_PIN15, 0U))
911
912
913#if !defined(_FROM_ASM_)
914#ifdef __cplusplus
915extern "C" {
916#endif
917 void boardInit(void);
918#ifdef __cplusplus
919}
920#endif
921#endif /* _FROM_ASM_ */
922
923#endif /* BOARD_H */
diff --git a/keyboards/candybar/boards/ST_STM32F072B_DISCOVERY/board.mk b/keyboards/candybar/boards/ST_STM32F072B_DISCOVERY/board.mk
new file mode 100644
index 000000000..b98dcdd26
--- /dev/null
+++ b/keyboards/candybar/boards/ST_STM32F072B_DISCOVERY/board.mk
@@ -0,0 +1,5 @@
1# List of all the board related files.
2BOARDSRC = $(BOARD_PATH)/boards/ST_STM32F072B_DISCOVERY/board.c
3
4# Required include directories
5BOARDINC = $(BOARD_PATH)/boards/ST_STM32F072B_DISCOVERY
diff --git a/keyboards/candybar/bootloader_defs.h b/keyboards/candybar/bootloader_defs.h
new file mode 100644
index 000000000..43eb7b2f6
--- /dev/null
+++ b/keyboards/candybar/bootloader_defs.h
@@ -0,0 +1,7 @@
1/* Address for jumping to bootloader on STM32 chips. */
2/* It is chip dependent, the correct number can be looked up here:
3 * http://www.st.com/web/en/resource/technical/document/application_note/CD00167594.pdf
4 * This also requires a patch to chibios:
5 * <tmk_dir>/tmk_core/tool/chibios/ch-bootloader-jump.patch
6 */
7#define STM32_BOOTLOADER_ADDRESS 0x1FFFC800
diff --git a/keyboards/candybar/candybar.c b/keyboards/candybar/candybar.c
new file mode 100644
index 000000000..c79e536cc
--- /dev/null
+++ b/keyboards/candybar/candybar.c
@@ -0,0 +1,21 @@
1/* Copyright 2018 Jack Humbert
2 *
3 * This program is free software: you can redistribute it and/or modify
4 * it under the terms of the GNU General Public License as published by
5 * the Free Software Foundation, either version 2 of the License, or
6 * (at your option) any later version.
7 *
8 * This program is distributed in the hope that it will be useful,
9 * but WITHOUT ANY WARRANTY; without even the implied warranty of
10 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
11 * GNU General Public License for more details.
12 *
13 * You should have received a copy of the GNU General Public License
14 * along with this program. If not, see <http://www.gnu.org/licenses/>.
15 */
16
17#include "candybar.h"
18
19void matrix_init_kb(void) {
20 matrix_init_user();
21}
diff --git a/keyboards/candybar/candybar.h b/keyboards/candybar/candybar.h
new file mode 100644
index 000000000..262edf3bb
--- /dev/null
+++ b/keyboards/candybar/candybar.h
@@ -0,0 +1,30 @@
1/* Copyright 2018 Jack Humbert
2 *
3 * This program is free software: you can redistribute it and/or modify
4 * it under the terms of the GNU General Public License as published by
5 * the Free Software Foundation, either version 2 of the License, or
6 * (at your option) any later version.
7 *
8 * This program is distributed in the hope that it will be useful,
9 * but WITHOUT ANY WARRANTY; without even the implied warranty of
10 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
11 * GNU General Public License for more details.
12 *
13 * You should have received a copy of the GNU General Public License
14 * along with this program. If not, see <http://www.gnu.org/licenses/>.
15 */
16
17#pragma once
18#include "quantum.h"
19
20#define LAYOUT( \
21 k00, k01, k02, k03, k04, k05, k06, k07, k08, k09, k0a, k0b, k0c, k0d, k0e, k0f, k0g, \
22 k10, k11, k12, k13, k14, k15, k16, k17, k18, k19, k1a, k1c, k1d, k1e, k1f, k1g, \
23 k20, k22, k23, k24, k25, k26, k27, k28, k29, k2a, k2b, k2c, k2d, k2e, k2f, k2g, \
24 k30, k31, k32, k35, k37, k38, k39, k3a, k3b, k3c, k3d, k3e, k3f, k3g \
25) { \
26 { k00, k01, k02, k03, k04, k05, k06, k07, k08, k09, k0a, k0b, k0c, k0d, k0e, k0f, k0g }, \
27 { k10, k11, k12, k13, k14, k15, k16, k17, k18, k19, k1a, KC_NO, k1c, k1d, k1e, k1f, k1g }, \
28 { k20, KC_NO, k22, k23, k24, k25, k26, k27, k28, k29, k2a, k2b, k2c, k2d, k2e, k2f, k2g }, \
29 { k30, k31, k32, KC_NO, KC_NO, k35, KC_NO, k37, k38, k39, k3a, k3b, k3c, k3d, k3e, k3f, k3g } \
30}
diff --git a/keyboards/candybar/chconf.h b/keyboards/candybar/chconf.h
new file mode 100644
index 000000000..99fa8ce39
--- /dev/null
+++ b/keyboards/candybar/chconf.h
@@ -0,0 +1,524 @@
1/*
2 ChibiOS - Copyright (C) 2006..2015 Giovanni Di Sirio
3
4 Licensed under the Apache License, Version 2.0 (the "License");
5 you may not use this file except in compliance with the License.
6 You may obtain a copy of the License at
7
8 http://www.apache.org/licenses/LICENSE-2.0
9
10 Unless required by applicable law or agreed to in writing, software
11 distributed under the License is distributed on an "AS IS" BASIS,
12 WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
13 See the License for the specific language governing permissions and
14 limitations under the License.
15*/
16
17/**
18 * @file templates/chconf.h
19 * @brief Configuration file template.
20 * @details A copy of this file must be placed in each project directory, it
21 * contains the application specific kernel settings.
22 *
23 * @addtogroup config
24 * @details Kernel related settings and hooks.
25 * @{
26 */
27
28#ifndef CHCONF_H
29#define CHCONF_H
30
31#define _CHIBIOS_RT_CONF_
32
33/*===========================================================================*/
34/**
35 * @name System timers settings
36 * @{
37 */
38/*===========================================================================*/
39
40/**
41 * @brief System time counter resolution.
42 * @note Allowed values are 16 or 32 bits.
43 */
44#define CH_CFG_ST_RESOLUTION 32
45
46/**
47 * @brief System tick frequency.
48 * @details Frequency of the system timer that drives the system ticks. This
49 * setting also defines the system tick time unit.
50 */
51#define CH_CFG_ST_FREQUENCY 10000
52
53/**
54 * @brief Time delta constant for the tick-less mode.
55 * @note If this value is zero then the system uses the classic
56 * periodic tick. This value represents the minimum number
57 * of ticks that is safe to specify in a timeout directive.
58 * The value one is not valid, timeouts are rounded up to
59 * this value.
60 */
61#define CH_CFG_ST_TIMEDELTA 2
62
63/** @} */
64
65/*===========================================================================*/
66/**
67 * @name Kernel parameters and options
68 * @{
69 */
70/*===========================================================================*/
71
72/**
73 * @brief Round robin interval.
74 * @details This constant is the number of system ticks allowed for the
75 * threads before preemption occurs. Setting this value to zero
76 * disables the preemption for threads with equal priority and the
77 * round robin becomes cooperative. Note that higher priority
78 * threads can still preempt, the kernel is always preemptive.
79 * @note Disabling the round robin preemption makes the kernel more compact
80 * and generally faster.
81 * @note The round robin preemption is not supported in tickless mode and
82 * must be set to zero in that case.
83 */
84#define CH_CFG_TIME_QUANTUM 0
85
86/**
87 * @brief Managed RAM size.
88 * @details Size of the RAM area to be managed by the OS. If set to zero
89 * then the whole available RAM is used. The core memory is made
90 * available to the heap allocator and/or can be used directly through
91 * the simplified core memory allocator.
92 *
93 * @note In order to let the OS manage the whole RAM the linker script must
94 * provide the @p __heap_base__ and @p __heap_end__ symbols.
95 * @note Requires @p CH_CFG_USE_MEMCORE.
96 */
97#define CH_CFG_MEMCORE_SIZE 0
98
99/**
100 * @brief Idle thread automatic spawn suppression.
101 * @details When this option is activated the function @p chSysInit()
102 * does not spawn the idle thread. The application @p main()
103 * function becomes the idle thread and must implement an
104 * infinite loop.
105 */
106#define CH_CFG_NO_IDLE_THREAD FALSE
107
108/* Use __WFI in the idle thread for waiting. Does lower the power
109 * consumption. */
110#define CORTEX_ENABLE_WFI_IDLE TRUE
111
112/** @} */
113
114/*===========================================================================*/
115/**
116 * @name Performance options
117 * @{
118 */
119/*===========================================================================*/
120
121/**
122 * @brief OS optimization.
123 * @details If enabled then time efficient rather than space efficient code
124 * is used when two possible implementations exist.
125 *
126 * @note This is not related to the compiler optimization options.
127 * @note The default is @p TRUE.
128 */
129#define CH_CFG_OPTIMIZE_SPEED FALSE
130
131/** @} */
132
133/*===========================================================================*/
134/**
135 * @name Subsystem options
136 * @{
137 */
138/*===========================================================================*/
139
140/**
141 * @brief Time Measurement APIs.
142 * @details If enabled then the time measurement APIs are included in
143 * the kernel.
144 *
145 * @note The default is @p TRUE.
146 */
147#define CH_CFG_USE_TM FALSE
148
149/**
150 * @brief Threads registry APIs.
151 * @details If enabled then the registry APIs are included in the kernel.
152 *
153 * @note The default is @p TRUE.
154 */
155#define CH_CFG_USE_REGISTRY TRUE
156
157/**
158 * @brief Threads synchronization APIs.
159 * @details If enabled then the @p chThdWait() function is included in
160 * the kernel.
161 *
162 * @note The default is @p TRUE.
163 */
164#define CH_CFG_USE_WAITEXIT TRUE
165
166/**
167 * @brief Semaphores APIs.
168 * @details If enabled then the Semaphores APIs are included in the kernel.
169 *
170 * @note The default is @p TRUE.
171 */
172#define CH_CFG_USE_SEMAPHORES TRUE
173
174/**
175 * @brief Semaphores queuing mode.
176 * @details If enabled then the threads are enqueued on semaphores by
177 * priority rather than in FIFO order.
178 *
179 * @note The default is @p FALSE. Enable this if you have special
180 * requirements.
181 * @note Requires @p CH_CFG_USE_SEMAPHORES.
182 */
183#define CH_CFG_USE_SEMAPHORES_PRIORITY FALSE
184
185/**
186 * @brief Mutexes APIs.
187 * @details If enabled then the mutexes APIs are included in the kernel.
188 *
189 * @note The default is @p TRUE.
190 */
191#define CH_CFG_USE_MUTEXES TRUE
192
193/**
194 * @brief Enables recursive behavior on mutexes.
195 * @note Recursive mutexes are heavier and have an increased
196 * memory footprint.
197 *
198 * @note The default is @p FALSE.
199 * @note Requires @p CH_CFG_USE_MUTEXES.
200 */
201#define CH_CFG_USE_MUTEXES_RECURSIVE FALSE
202
203/**
204 * @brief Conditional Variables APIs.
205 * @details If enabled then the conditional variables APIs are included
206 * in the kernel.
207 *
208 * @note The default is @p TRUE.
209 * @note Requires @p CH_CFG_USE_MUTEXES.
210 */
211#define CH_CFG_USE_CONDVARS TRUE
212
213/**
214 * @brief Conditional Variables APIs with timeout.
215 * @details If enabled then the conditional variables APIs with timeout
216 * specification are included in the kernel.
217 *
218 * @note The default is @p TRUE.
219 * @note Requires @p CH_CFG_USE_CONDVARS.
220 */
221#define CH_CFG_USE_CONDVARS_TIMEOUT FALSE
222
223/**
224 * @brief Events Flags APIs.
225 * @details If enabled then the event flags APIs are included in the kernel.
226 *
227 * @note The default is @p TRUE.
228 */
229#define CH_CFG_USE_EVENTS TRUE
230
231/**
232 * @brief Events Flags APIs with timeout.
233 * @details If enabled then the events APIs with timeout specification
234 * are included in the kernel.
235 *
236 * @note The default is @p TRUE.
237 * @note Requires @p CH_CFG_USE_EVENTS.
238 */
239#define CH_CFG_USE_EVENTS_TIMEOUT TRUE
240
241/**
242 * @brief Synchronous Messages APIs.
243 * @details If enabled then the synchronous messages APIs are included
244 * in the kernel.
245 *
246 * @note The default is @p TRUE.
247 */
248#define CH_CFG_USE_MESSAGES TRUE
249
250/**
251 * @brief Synchronous Messages queuing mode.
252 * @details If enabled then messages are served by priority rather than in
253 * FIFO order.
254 *
255 * @note The default is @p FALSE. Enable this if you have special
256 * requirements.
257 * @note Requires @p CH_CFG_USE_MESSAGES.
258 */
259#define CH_CFG_USE_MESSAGES_PRIORITY FALSE
260
261/**
262 * @brief Mailboxes APIs.
263 * @details If enabled then the asynchronous messages (mailboxes) APIs are
264 * included in the kernel.
265 *
266 * @note The default is @p TRUE.
267 * @note Requires @p CH_CFG_USE_SEMAPHORES.
268 */
269#define CH_CFG_USE_MAILBOXES TRUE
270
271/**
272 * @brief Core Memory Manager APIs.
273 * @details If enabled then the core memory manager APIs are included
274 * in the kernel.
275 *
276 * @note The default is @p TRUE.
277 */
278#define CH_CFG_USE_MEMCORE FALSE
279
280/**
281 * @brief Heap Allocator APIs.
282 * @details If enabled then the memory heap allocator APIs are included
283 * in the kernel.
284 *
285 * @note The default is @p TRUE.
286 * @note Requires @p CH_CFG_USE_MEMCORE and either @p CH_CFG_USE_MUTEXES or
287 * @p CH_CFG_USE_SEMAPHORES.
288 * @note Mutexes are recommended.
289 */
290#define CH_CFG_USE_HEAP FALSE
291
292/**
293 * @brief Memory Pools Allocator APIs.
294 * @details If enabled then the memory pools allocator APIs are included
295 * in the kernel.
296 *
297 * @note The default is @p TRUE.
298 */
299#define CH_CFG_USE_MEMPOOLS FALSE
300
301/**
302 * @brief Dynamic Threads APIs.
303 * @details If enabled then the dynamic threads creation APIs are included
304 * in the kernel.
305 *
306 * @note The default is @p TRUE.
307 * @note Requires @p CH_CFG_USE_WAITEXIT.
308 * @note Requires @p CH_CFG_USE_HEAP and/or @p CH_CFG_USE_MEMPOOLS.
309 */
310#define CH_CFG_USE_DYNAMIC FALSE
311
312/** @} */
313
314/*===========================================================================*/
315/**
316 * @name Debug options
317 * @{
318 */
319/*===========================================================================*/
320
321/**
322 * @brief Debug option, kernel statistics.
323 *
324 * @note The default is @p FALSE.
325 */
326#define CH_DBG_STATISTICS FALSE
327
328/**
329 * @brief Debug option, system state check.
330 * @details If enabled the correct call protocol for system APIs is checked
331 * at runtime.
332 *
333 * @note The default is @p FALSE.
334 */
335#define CH_DBG_SYSTEM_STATE_CHECK FALSE
336
337/**
338 * @brief Debug option, parameters checks.
339 * @details If enabled then the checks on the API functions input
340 * parameters are activated.
341 *
342 * @note The default is @p FALSE.
343 */
344#define CH_DBG_ENABLE_CHECKS FALSE
345
346/**
347 * @brief Debug option, consistency checks.
348 * @details If enabled then all the assertions in the kernel code are
349 * activated. This includes consistency checks inside the kernel,
350 * runtime anomalies and port-defined checks.
351 *
352 * @note The default is @p FALSE.
353 */
354#define CH_DBG_ENABLE_ASSERTS FALSE
355
356/**
357 * @brief Debug option, trace buffer.
358 * @details If enabled then the trace buffer is activated.
359 *
360 * @note The default is @p CH_DBG_TRACE_MASK_DISABLED.
361 */
362#define CH_DBG_TRACE_MASK CH_DBG_TRACE_MASK_DISABLED
363
364/**
365 * @brief Trace buffer entries.
366 * @note The trace buffer is only allocated if @p CH_DBG_TRACE_MASK is
367 * different from @p CH_DBG_TRACE_MASK_DISABLED.
368 */
369#define CH_DBG_TRACE_BUFFER_SIZE 128
370
371/**
372 * @brief Debug option, stack checks.
373 * @details If enabled then a runtime stack check is performed.
374 *
375 * @note The default is @p FALSE.
376 * @note The stack check is performed in a architecture/port dependent way.
377 * It may not be implemented or some ports.
378 * @note The default failure mode is to halt the system with the global
379 * @p panic_msg variable set to @p NULL.
380 */
381#define CH_DBG_ENABLE_STACK_CHECK FALSE
382
383/**
384 * @brief Debug option, stacks initialization.
385 * @details If enabled then the threads working area is filled with a byte
386 * value when a thread is created. This can be useful for the
387 * runtime measurement of the used stack.
388 *
389 * @note The default is @p FALSE.
390 */
391#define CH_DBG_FILL_THREADS FALSE
392
393/**
394 * @brief Debug option, threads profiling.
395 * @details If enabled then a field is added to the @p thread_t structure that
396 * counts the system ticks occurred while executing the thread.
397 *
398 * @note The default is @p FALSE.
399 * @note This debug option is not currently compatible with the
400 * tickless mode.
401 */
402#define CH_DBG_THREADS_PROFILING FALSE
403
404/** @} */
405
406/*===========================================================================*/
407/**
408 * @name Kernel hooks
409 * @{
410 */
411/*===========================================================================*/
412
413/**
414 * @brief Threads descriptor structure extension.
415 * @details User fields added to the end of the @p thread_t structure.
416 */
417#define CH_CFG_THREAD_EXTRA_FIELDS \
418 /* Add threads custom fields here.*/
419
420/**
421 * @brief Threads initialization hook.
422 * @details User initialization code added to the @p chThdInit() API.
423 *
424 * @note It is invoked from within @p chThdInit() and implicitly from all
425 * the threads creation APIs.
426 */
427#define CH_CFG_THREAD_INIT_HOOK(tp) { \
428 /* Add threads initialization code here.*/ \
429}
430
431/**
432 * @brief Threads finalization hook.
433 * @details User finalization code added to the @p chThdExit() API.
434 */
435#define CH_CFG_THREAD_EXIT_HOOK(tp) { \
436 /* Add threads finalization code here.*/ \
437}
438
439/**
440 * @brief Context switch hook.
441 * @details This hook is invoked just before switching between threads.
442 */
443#define CH_CFG_CONTEXT_SWITCH_HOOK(ntp, otp) { \
444 /* Context switch code here.*/ \
445}
446
447/**
448 * @brief ISR enter hook.
449 */
450#define CH_CFG_IRQ_PROLOGUE_HOOK() { \
451 /* IRQ prologue code here.*/ \
452}
453
454/**
455 * @brief ISR exit hook.
456 */
457#define CH_CFG_IRQ_EPILOGUE_HOOK() { \
458 /* IRQ epilogue code here.*/ \
459}
460
461/**
462 * @brief Idle thread enter hook.
463 * @note This hook is invoked within a critical zone, no OS functions
464 * should be invoked from here.
465 * @note This macro can be used to activate a power saving mode.
466 */
467#define CH_CFG_IDLE_ENTER_HOOK() { \
468 /* Idle-enter code here.*/ \
469}
470
471/**
472 * @brief Idle thread leave hook.
473 * @note This hook is invoked within a critical zone, no OS functions
474 * should be invoked from here.
475 * @note This macro can be used to deactivate a power saving mode.
476 */
477#define CH_CFG_IDLE_LEAVE_HOOK() { \
478 /* Idle-leave code here.*/ \
479}
480
481/**
482 * @brief Idle Loop hook.
483 * @details This hook is continuously invoked by the idle thread loop.
484 */
485#define CH_CFG_IDLE_LOOP_HOOK() { \
486 /* Idle loop code here.*/ \
487}
488
489/**
490 * @brief System tick event hook.
491 * @details This hook is invoked in the system tick handler immediately
492 * after processing the virtual timers queue.
493 */
494#define CH_CFG_SYSTEM_TICK_HOOK() { \
495 /* System tick event code here.*/ \
496}
497
498/**
499 * @brief System halt hook.
500 * @details This hook is invoked in case to a system halting error before
501 * the system is halted.
502 */
503#define CH_CFG_SYSTEM_HALT_HOOK(reason) { \
504 /* System halt code here.*/ \
505}
506
507/**
508 * @brief Trace hook.
509 * @details This hook is invoked each time a new record is written in the
510 * trace buffer.
511 */
512#define CH_CFG_TRACE_HOOK(tep) { \
513 /* Trace code here.*/ \
514}
515
516/** @} */
517
518/*===========================================================================*/
519/* Port-specific settings (override port settings defaulted in chcore.h). */
520/*===========================================================================*/
521
522#endif /* CHCONF_H */
523
524/** @} */
diff --git a/keyboards/candybar/config.h b/keyboards/candybar/config.h
new file mode 100644
index 000000000..113e91717
--- /dev/null
+++ b/keyboards/candybar/config.h
@@ -0,0 +1,121 @@
1/* Copyright 2018 Jack Humbert
2 *
3 * This program is free software: you can redistribute it and/or modify
4 * it under the terms of the GNU General Public License as published by
5 * the Free Software Foundation, either version 2 of the License, or
6 * (at your option) any later version.
7 *
8 * This program is distributed in the hope that it will be useful,
9 * but WITHOUT ANY WARRANTY; without even the implied warranty of
10 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
11 * GNU General Public License for more details.
12 *
13 * You should have received a copy of the GNU General Public License
14 * along with this program. If not, see <http://www.gnu.org/licenses/>.
15 */
16
17#pragma once
18
19#include "config_common.h"
20
21/* USB Device descriptor parameter */
22#define VENDOR_ID 0xFEED
23#define PRODUCT_ID 0x6060
24#define DEVICE_VER 0x0006
25#define MANUFACTURER The Key Company
26#define PRODUCT Candybar
27#define DESCRIPTION A compact staggered 40% keyboard with attached numpad
28
29/* key matrix size */
30#define MATRIX_ROWS 4
31#define MATRIX_COLS 17
32#define DIODE_DIRECTION COL2ROW
33#define MATRIX_ROW_PINS { A8, A9, A10, A13 }
34#define MATRIX_COL_PINS { A0, A1, A2, A3, A4, A5, A6, A7, B0, B1, B2, B10, B11, B12, B13, B14, B15 }
35
36
37/* Debounce reduces chatter (unintended double-presses) - set 0 if debouncing is not needed */
38#define DEBOUNCE 5
39
40/* Mechanical locking support. Use KC_LCAP, KC_LNUM or KC_LSCR instead in keymap */
41//#define LOCKING_SUPPORT_ENABLE
42/* Locking resynchronize hack */
43//#define LOCKING_RESYNC_ENABLE
44
45/*
46 * Force NKRO
47 *
48 * Force NKRO (nKey Rollover) to be enabled by default, regardless of the saved
49 * state in the bootmagic EEPROM settings. (Note that NKRO must be enabled in the
50 * makefile for this to work.)
51 *
52 * If forced on, NKRO can be disabled via magic key (default = LShift+RShift+N)
53 * until the next keyboard reset.
54 *
55 * NKRO may prevent your keystrokes from being detected in the BIOS, but it is
56 * fully operational during normal computer usage.
57 *
58 * For a less heavy-handed approach, enable NKRO via magic key (LShift+RShift+N)
59 * or via bootmagic (hold SPACE+N while plugging in the keyboard). Once set by
60 * bootmagic, NKRO mode will always be enabled until it is toggled again during a
61 * power-up.
62 *
63 */
64//#define FORCE_NKRO
65
66/* key combination for magic key command */
67#define IS_COMMAND() ( \
68 keyboard_report->mods == (MOD_BIT(KC_LSHIFT) | MOD_BIT(KC_RSHIFT)) \
69)
70
71/*
72 * Feature disable options
73 * These options are also useful to firmware size reduction.
74 */
75
76/* disable debug print */
77//#define NO_DEBUG
78
79/* disable print */
80//#define NO_PRINT
81
82/* disable action features */
83//#define NO_ACTION_LAYER
84//#define NO_ACTION_TAPPING
85//#define NO_ACTION_ONESHOT
86//#define NO_ACTION_MACRO
87//#define NO_ACTION_FUNCTION
88
89/*
90 * MIDI options
91 */
92
93/* Prevent use of disabled MIDI features in the keymap */
94//#define MIDI_ENABLE_STRICT 1
95
96/* enable basic MIDI features:
97 - MIDI notes can be sent when in Music mode is on
98*/
99//#define MIDI_BASIC
100
101/* enable advanced MIDI features:
102 - MIDI notes can be added to the keymap
103 - Octave shift and transpose
104 - Virtual sustain, portamento, and modulation wheel
105 - etc.
106*/
107//#define MIDI_ADVANCED
108
109/* override number of MIDI tone keycodes (each octave adds 12 keycodes and allocates 12 bytes) */
110//#define MIDI_TONE_KEYCODE_OCTAVES 1
111
112// #define WS2812_LED_N 2
113// #define RGBLED_NUM WS2812_LED_N
114// #define WS2812_TIM_N 2
115// #define WS2812_TIM_CH 2
116// #define PORT_WS2812 GPIOA
117// #define PIN_WS2812 1
118// #define WS2812_DMA_STREAM STM32_DMA1_STREAM2 // DMA stream for TIMx_UP (look up in reference manual under DMA Channel selection)
119//#define WS2812_DMA_CHANNEL 7 // DMA channel for TIMx_UP
120//#define WS2812_EXTERNAL_PULLUP
121
diff --git a/keyboards/candybar/halconf.h b/keyboards/candybar/halconf.h
new file mode 100644
index 000000000..8b9724b1a
--- /dev/null
+++ b/keyboards/candybar/halconf.h
@@ -0,0 +1,353 @@
1/*
2 ChibiOS - Copyright (C) 2006..2015 Giovanni Di Sirio
3
4 Licensed under the Apache License, Version 2.0 (the "License");
5 you may not use this file except in compliance with the License.
6 You may obtain a copy of the License at
7
8 http://www.apache.org/licenses/LICENSE-2.0
9
10 Unless required by applicable law or agreed to in writing, software
11 distributed under the License is distributed on an "AS IS" BASIS,
12 WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
13 See the License for the specific language governing permissions and
14 limitations under the License.
15*/
16
17/**
18 * @file templates/halconf.h
19 * @brief HAL configuration header.
20 * @details HAL configuration file, this file allows to enable or disable the
21 * various device drivers from your application. You may also use
22 * this file in order to override the device drivers default settings.
23 *
24 * @addtogroup HAL_CONF
25 * @{
26 */
27
28#ifndef _HALCONF_H_
29#define _HALCONF_H_
30
31#include "mcuconf.h"
32
33/**
34 * @brief Enables the PAL subsystem.
35 */
36#if !defined(HAL_USE_PAL) || defined(__DOXYGEN__)
37#define HAL_USE_PAL TRUE
38#endif
39
40/**
41 * @brief Enables the ADC subsystem.
42 */
43#if !defined(HAL_USE_ADC) || defined(__DOXYGEN__)
44#define HAL_USE_ADC FALSE
45#endif
46
47/**
48 * @brief Enables the CAN subsystem.
49 */
50#if !defined(HAL_USE_CAN) || defined(__DOXYGEN__)
51#define HAL_USE_CAN FALSE
52#endif
53
54/**
55 * @brief Enables the DAC subsystem.
56 */
57#if !defined(HAL_USE_DAC) || defined(__DOXYGEN__)
58#define HAL_USE_DAC FALSE
59#endif
60
61/**
62 * @brief Enables the EXT subsystem.
63 */
64#if !defined(HAL_USE_EXT) || defined(__DOXYGEN__)
65#define HAL_USE_EXT FALSE
66#endif
67
68/**
69 * @brief Enables the GPT subsystem.
70 */
71#if !defined(HAL_USE_GPT) || defined(__DOXYGEN__)
72#define HAL_USE_GPT FALSE
73#endif
74
75/**
76 * @brief Enables the I2C subsystem.
77 */
78#if !defined(HAL_USE_I2C) || defined(__DOXYGEN__)
79#define HAL_USE_I2C FALSE
80#endif
81
82/**
83 * @brief Enables the I2S subsystem.
84 */
85#if !defined(HAL_USE_I2S) || defined(__DOXYGEN__)
86#define HAL_USE_I2S FALSE
87#endif
88
89/**
90 * @brief Enables the ICU subsystem.
91 */
92#if !defined(HAL_USE_ICU) || defined(__DOXYGEN__)
93#define HAL_USE_ICU FALSE
94#endif
95
96/**
97 * @brief Enables the MAC subsystem.
98 */
99#if !defined(HAL_USE_MAC) || defined(__DOXYGEN__)
100#define HAL_USE_MAC FALSE
101#endif
102
103/**
104 * @brief Enables the MMC_SPI subsystem.
105 */
106#if !defined(HAL_USE_MMC_SPI) || defined(__DOXYGEN__)
107#define HAL_USE_MMC_SPI FALSE
108#endif
109
110/**
111 * @brief Enables the PWM subsystem.
112 */
113#if !defined(HAL_USE_PWM) || defined(__DOXYGEN__)
114#define HAL_USE_PWM FALSE
115#endif
116
117/**
118 * @brief Enables the RTC subsystem.
119 */
120#if !defined(HAL_USE_RTC) || defined(__DOXYGEN__)
121#define HAL_USE_RTC FALSE
122#endif
123
124/**
125 * @brief Enables the SDC subsystem.
126 */
127#if !defined(HAL_USE_SDC) || defined(__DOXYGEN__)
128#define HAL_USE_SDC FALSE
129#endif
130
131/**
132 * @brief Enables the SERIAL subsystem.
133 */
134#if !defined(HAL_USE_SERIAL) || defined(__DOXYGEN__)
135#define HAL_USE_SERIAL FALSE
136#endif
137
138/**
139 * @brief Enables the SERIAL over USB subsystem.
140 */
141#if !defined(HAL_USE_SERIAL_USB) || defined(__DOXYGEN__)
142#define HAL_USE_SERIAL_USB FALSE
143#endif
144
145/**
146 * @brief Enables the SPI subsystem.
147 */
148#if !defined(HAL_USE_SPI) || defined(__DOXYGEN__)
149#define HAL_USE_SPI FALSE
150#endif
151
152/**
153 * @brief Enables the UART subsystem.
154 */
155#if !defined(HAL_USE_UART) || defined(__DOXYGEN__)
156#define HAL_USE_UART FALSE
157#endif
158
159/**
160 * @brief Enables the USB subsystem.
161 */
162#if !defined(HAL_USE_USB) || defined(__DOXYGEN__)
163#define HAL_USE_USB TRUE
164#endif
165
166/**
167 * @brief Enables the WDG subsystem.
168 */
169#if !defined(HAL_USE_WDG) || defined(__DOXYGEN__)
170#define HAL_USE_WDG FALSE
171#endif
172
173/*===========================================================================*/
174/* ADC driver related settings. */
175/*===========================================================================*/
176
177/**
178 * @brief Enables synchronous APIs.
179 * @note Disabling this option saves both code and data space.
180 */
181#if !defined(ADC_USE_WAIT) || defined(__DOXYGEN__)
182#define ADC_USE_WAIT TRUE
183#endif
184
185/**
186 * @brief Enables the @p adcAcquireBus() and @p adcReleaseBus() APIs.
187 * @note Disabling this option saves both code and data space.
188 */
189#if !defined(ADC_USE_MUTUAL_EXCLUSION) || defined(__DOXYGEN__)
190#define ADC_USE_MUTUAL_EXCLUSION TRUE
191#endif
192
193/*===========================================================================*/
194/* CAN driver related settings. */
195/*===========================================================================*/
196
197/**
198 * @brief Sleep mode related APIs inclusion switch.
199 */
200#if !defined(CAN_USE_SLEEP_MODE) || defined(__DOXYGEN__)
201#define CAN_USE_SLEEP_MODE TRUE
202#endif
203
204/*===========================================================================*/
205/* I2C driver related settings. */
206/*===========================================================================*/
207
208/**
209 * @brief Enables the mutual exclusion APIs on the I2C bus.
210 */
211#if !defined(I2C_USE_MUTUAL_EXCLUSION) || defined(__DOXYGEN__)
212#define I2C_USE_MUTUAL_EXCLUSION TRUE
213#endif
214
215/*===========================================================================*/
216/* MAC driver related settings. */
217/*===========================================================================*/
218
219/**
220 * @brief Enables an event sources for incoming packets.
221 */
222#if !defined(MAC_USE_ZERO_COPY) || defined(__DOXYGEN__)
223#define MAC_USE_ZERO_COPY FALSE
224#endif
225
226/**
227 * @brief Enables an event sources for incoming packets.
228 */
229#if !defined(MAC_USE_EVENTS) || defined(__DOXYGEN__)
230#define MAC_USE_EVENTS TRUE
231#endif
232
233/*===========================================================================*/
234/* MMC_SPI driver related settings. */
235/*===========================================================================*/
236
237/**
238 * @brief Delays insertions.
239 * @details If enabled this options inserts delays into the MMC waiting
240 * routines releasing some extra CPU time for the threads with
241 * lower priority, this may slow down the driver a bit however.
242 * This option is recommended also if the SPI driver does not
243 * use a DMA channel and heavily loads the CPU.
244 */
245#if !defined(MMC_NICE_WAITING) || defined(__DOXYGEN__)
246#define MMC_NICE_WAITING TRUE
247#endif
248
249/*===========================================================================*/
250/* SDC driver related settings. */
251/*===========================================================================*/
252
253/**
254 * @brief Number of initialization attempts before rejecting the card.
255 * @note Attempts are performed at 10mS intervals.
256 */
257#if !defined(SDC_INIT_RETRY) || defined(__DOXYGEN__)
258#define SDC_INIT_RETRY 100
259#endif
260
261/**
262 * @brief Include support for MMC cards.
263 * @note MMC support is not yet implemented so this option must be kept
264 * at @p FALSE.
265 */
266#if !defined(SDC_MMC_SUPPORT) || defined(__DOXYGEN__)
267#define SDC_MMC_SUPPORT FALSE
268#endif
269
270/**
271 * @brief Delays insertions.
272 * @details If enabled this options inserts delays into the MMC waiting
273 * routines releasing some extra CPU time for the threads with
274 * lower priority, this may slow down the driver a bit however.
275 */
276#if !defined(SDC_NICE_WAITING) || defined(__DOXYGEN__)
277#define SDC_NICE_WAITING TRUE
278#endif
279
280/*===========================================================================*/
281/* SERIAL driver related settings. */
282/*===========================================================================*/
283
284/**
285 * @brief Default bit rate.
286 * @details Configuration parameter, this is the baud rate selected for the
287 * default configuration.
288 */
289#if !defined(SERIAL_DEFAULT_BITRATE) || defined(__DOXYGEN__)
290#define SERIAL_DEFAULT_BITRATE 38400
291#endif
292
293/**
294 * @brief Serial buffers size.
295 * @details Configuration parameter, you can change the depth of the queue
296 * buffers depending on the requirements of your application.
297 * @note The default is 64 bytes for both the transmission and receive
298 * buffers.
299 */
300#if !defined(SERIAL_BUFFERS_SIZE) || defined(__DOXYGEN__)
301#define SERIAL_BUFFERS_SIZE 16
302#endif
303
304/*===========================================================================*/
305/* SERIAL_USB driver related setting. */
306/*===========================================================================*/
307
308/**
309 * @brief Serial over USB buffers size.
310 * @details Configuration parameter, the buffer size must be a multiple of
311 * the USB data endpoint maximum packet size.
312 * @note The default is 64 bytes for both the transmission and receive
313 * buffers.
314 */
315#if !defined(SERIAL_USB_BUFFERS_SIZE) || defined(__DOXYGEN__)
316#define SERIAL_USB_BUFFERS_SIZE 1
317#endif
318
319/*===========================================================================*/
320/* SPI driver related settings. */
321/*===========================================================================*/
322
323/**
324 * @brief Enables synchronous APIs.
325 * @note Disabling this option saves both code and data space.
326 */
327#if !defined(SPI_USE_WAIT) || defined(__DOXYGEN__)
328#define SPI_USE_WAIT TRUE
329#endif
330
331/**
332 * @brief Enables the @p spiAcquireBus() and @p spiReleaseBus() APIs.
333 * @note Disabling this option saves both code and data space.
334 */
335#if !defined(SPI_USE_MUTUAL_EXCLUSION) || defined(__DOXYGEN__)
336#define SPI_USE_MUTUAL_EXCLUSION TRUE
337#endif
338
339/*===========================================================================*/
340/* USB driver related settings. */
341/*===========================================================================*/
342
343/**
344 * @brief Enables synchronous APIs.
345 * @note Disabling this option saves both code and data space.
346 */
347#if !defined(USB_USE_WAIT) || defined(__DOXYGEN__)
348#define USB_USE_WAIT TRUE
349#endif
350
351#endif /* _HALCONF_H_ */
352
353/** @} */
diff --git a/keyboards/candybar/info.json b/keyboards/candybar/info.json
new file mode 100644
index 000000000..9e4dfadc8
--- /dev/null
+++ b/keyboards/candybar/info.json
@@ -0,0 +1,207 @@
1{
2 "keyboard_name": "TKC Candybar",
3 "url": "",
4 "maintainer": "terrymathews",
5 "width": 17,
6 "height": 4,
7 "layouts": {
8 "LAYOUT": {
9 "layout": [
10 {"label":"Esc",
11 "x":0,
12 "y":0},
13 {"label":"Q",
14 "x":1,
15 "y":0},
16 {"label":"W",
17 "x":2,
18 "y":0},
19 {"label":"E",
20 "x":3,
21 "y":0},
22 {"label":"R",
23 "x":4,
24 "y":0},
25 {"label":"T",
26 "x":5,
27 "y":0},
28 {"label":"Y",
29 "x":6,
30 "y":0},
31 {"label":"U",
32 "x":7,
33 "y":0},
34 {"label":"I",
35 "x":8,
36 "y":0},
37 {"label":"O",
38 "x":9,
39 "y":0},
40 {"label":"P",
41 "x":10,
42 "y":0},
43 {"label":"Del",
44 "x":11,
45 "y":0},
46 {"label":"BkSp",
47 "x":12,
48 "y":0},
49 {"label":"7",
50 "x":13,
51 "y":0},
52 {"label":"8",
53 "x":14,
54 "y":0},
55 {"label":"9",
56 "x":15,
57 "y":0},
58 {"label":"*",
59 "x":16,
60 "y":0},
61 {"label":"Tab",
62 "x":0,
63 "y":1,
64 "w":1.25},
65 {"label":"A",
66 "x":1.25,
67 "y":1},
68 {"label":"S",
69 "x":2.25,
70 "y":1},
71 {"label":"D",
72 "x":3.25,
73 "y":1},
74 {"label":"F",
75 "x":4.25,
76 "y":1},
77 {"label":"G",
78 "x":5.25,
79 "y":1},
80 {"label":"H",
81 "x":6.25,
82 "y":1},
83 {"label":"J",
84 "x":7.25,
85 "y":1},
86 {"label":"K",
87 "x":8.25,
88 "y":1},
89 {"label":"L",
90 "x":9.25,
91 "y":1},
92 {"label":":",
93 "x":10.25,
94 "y":1},
95 {"label":"Enter",
96 "x":11.25,
97 "y":1,
98 "w":1.75},
99 {"label":"4",
100 "x":13,
101 "y":1},
102 {"label":"5",
103 "x":14,
104 "y":1},
105 {"label":"6",
106 "x":15,
107 "y":1},
108 {"label":"-",
109 "x":16,
110 "y":1},
111 {"label":"Shift",
112 "x":0,
113 "y":2,
114 "w":1.75},
115 {"label":"Z",
116 "x":1.75,
117 "y":2},
118 {"label":"X",
119 "x":2.75,
120 "y":2},
121 {"label":"C",
122 "x":3.75,
123 "y":2},
124 {"label":"V",
125 "x":4.75,
126 "y":2},
127 {"label":"B",
128 "x":5.75,
129 "y":2},
130 {"label":"N",
131 "x":6.75,
132 "y":2},
133 {"label":"M",
134 "x":7.75,
135 "y":2},
136 {"label":"<",
137 "x":8.75,
138 "y":2},
139 {"label":">",
140 "x":9.75,
141 "y":2},
142 {"label":"Shift",
143 "x":10.75,
144 "y":2,
145 "w":1.25},
146 {"label":"&uarr;",
147 "x":12,
148 "y":2},
149 {"label":"1",
150 "x":13,
151 "y":2},
152 {"label":"2",
153 "x":14,
154 "y":2},
155 {"label":"3",
156 "x":15,
157 "y":2},
158 {"label":"+",
159 "x":16,
160 "y":2},
161 {"label":"Ctrl",
162 "x":0,
163 "y":3,
164 "w":1.25},
165 {"label":"GUI",
166 "x":1.25,
167 "y":3,
168 "w":1.25},
169 {"label":"Alt",
170 "x":2.5,
171 "y":3,
172 "w":1.25},
173 {"x":3.75,
174 "y":3,
175 "w":2.75},
176 {"label":"Backspace",
177 "x":6.5,
178 "y":3,
179 "w":2.25},
180 {"label":"Menu",
181 "x":8.75,
182 "y":3,
183 "w":1.25},
184 {"label":"Fn",
185 "x":10,
186 "y":3},
187 {"label":"&larr;",
188 "x":11,
189 "y":3},
190 {"label":"&darr;",
191 "x":12,
192 "y":3},
193 {"label":"&rarr;",
194 "x":13,
195 "y":3},
196 {"label":"0",
197 "x":14,
198 "y":3},
199 {"label":".",
200 "x":15,
201 "y":3},
202 {"label":"Enter",
203 "x":16,
204 "y":3}]
205 }
206 }
207} \ No newline at end of file
diff --git a/keyboards/candybar/keymaps/default/keymap.c b/keyboards/candybar/keymaps/default/keymap.c
new file mode 100644
index 000000000..bf589289a
--- /dev/null
+++ b/keyboards/candybar/keymaps/default/keymap.c
@@ -0,0 +1,38 @@
1/* Copyright 2018 Jack Humbert
2 *
3 * This program is free software: you can redistribute it and/or modify
4 * it under the terms of the GNU General Public License as published by
5 * the Free Software Foundation, either version 2 of the License, or
6 * (at your option) any later version.
7 *
8 * This program is distributed in the hope that it will be useful,
9 * but WITHOUT ANY WARRANTY; without even the implied warranty of
10 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
11 * GNU General Public License for more details.
12 *
13 * You should have received a copy of the GNU General Public License
14 * along with this program. If not, see <http://www.gnu.org/licenses/>.
15 */
16
17#include "candybar.h"
18
19#define _BL 0
20#define _FL 1
21
22const uint16_t PROGMEM keymaps[][MATRIX_ROWS][MATRIX_COLS] = {
23 /* Keymap _BL: Base Layer (Default Layer)
24 */
25[_BL] = LAYOUT(
26 KC_ESC,KC_Q,KC_W,KC_E,KC_R,KC_T,KC_Y,KC_U,KC_I,KC_O,KC_P,KC_DEL,KC_BSPC,KC_P7,KC_P8,KC_P9,KC_PAST, \
27 KC_TAB,KC_A,KC_S,KC_D,KC_F,KC_G,KC_H,KC_J,KC_K,KC_L,KC_SCLN,KC_ENT,KC_P4,KC_P5,KC_P6,KC_PMNS, \
28 KC_LSFT,KC_Z,KC_X,KC_C,KC_V,KC_B,KC_N,KC_M,KC_COMM,KC_DOT,KC_RSFT,KC_UP,KC_P1,KC_P2,KC_P3,KC_PPLS, \
29 KC_LCTL,KC_LGUI,KC_LALT,KC_SPC,KC_SPC,KC_BSPC,KC_APP,MO(_FL),KC_LEFT,KC_DOWN,KC_RGHT,KC_P0,KC_PDOT,KC_PENT),
30
31 /* Keymap _FL: Function Layer
32 */
33[_FL] = LAYOUT(
34 RESET,KC_Q,KC_W,KC_E,KC_R,KC_T,KC_Y,KC_U,KC_I,KC_LBRC,KC_RBRC,KC_INS,KC_BSPC,KC_P7,KC_P8,KC_P9,KC_VOLU, \
35 KC_TAB,KC_A,KC_SLCK,KC_D,KC_F,KC_G,KC_H,KC_J,KC_K,KC_L,KC_QUOT,KC_BSLS,KC_P4,KC_P5,KC_P6,KC_VOLD, \
36 KC_LSFT,KC_Z,KC_X,KC_CAPS,KC_V,KC_B,KC_NLCK,KC_M,KC_COMM,KC_DOT,KC_SLSH,KC_PGUP,KC_P1,KC_P2,KC_P3,KC_PEQL, \
37 KC_LCTL,KC_LGUI,KC_LALT,KC_SPC,KC_SPC,KC_BSPC,KC_APP,MO(_FL),KC_HOME,KC_PGDN,KC_END,KC_P0,KC_PDOT,KC_PENT),
38}; \ No newline at end of file
diff --git a/keyboards/candybar/mcuconf.h b/keyboards/candybar/mcuconf.h
new file mode 100644
index 000000000..faca3defd
--- /dev/null
+++ b/keyboards/candybar/mcuconf.h
@@ -0,0 +1,171 @@
1/*
2 ChibiOS - Copyright (C) 2006..2015 Giovanni Di Sirio
3
4 Licensed under the Apache License, Version 2.0 (the "License");
5 you may not use this file except in compliance with the License.
6 You may obtain a copy of the License at
7
8 http://www.apache.org/licenses/LICENSE-2.0
9
10 Unless required by applicable law or agreed to in writing, software
11 distributed under the License is distributed on an "AS IS" BASIS,
12 WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
13 See the License for the specific language governing permissions and
14 limitations under the License.
15*/
16
17#ifndef _MCUCONF_H_
18#define _MCUCONF_H_
19
20/*
21 * STM32F0xx drivers configuration.
22 * The following settings override the default settings present in
23 * the various device driver implementation headers.
24 * Note that the settings for each driver only have effect if the whole
25 * driver is enabled in halconf.h.
26 *
27 * IRQ priorities:
28 * 3...0 Lowest...Highest.
29 *
30 * DMA priorities:
31 * 0...3 Lowest...Highest.
32 */
33
34#define STM32F0xx_MCUCONF
35
36/*
37 * HAL driver system settings.
38 */
39#define STM32_NO_INIT FALSE
40#define STM32_PVD_ENABLE FALSE
41#define STM32_PLS STM32_PLS_LEV0
42#define STM32_HSI_ENABLED TRUE
43#define STM32_HSI14_ENABLED TRUE
44#define STM32_HSI48_ENABLED FALSE
45#define STM32_LSI_ENABLED TRUE
46#define STM32_HSE_ENABLED FALSE
47#define STM32_LSE_ENABLED FALSE
48#define STM32_SW STM32_SW_PLL
49#define STM32_PLLSRC STM32_PLLSRC_HSI_DIV2
50#define STM32_PREDIV_VALUE 1
51#define STM32_PLLMUL_VALUE 12
52#define STM32_HPRE STM32_HPRE_DIV1
53#define STM32_PPRE STM32_PPRE_DIV1
54#define STM32_ADCSW STM32_ADCSW_HSI14
55#define STM32_ADCPRE STM32_ADCPRE_DIV4
56#define STM32_MCOSEL STM32_MCOSEL_NOCLOCK
57#define STM32_ADCPRE STM32_ADCPRE_DIV4
58#define STM32_ADCSW STM32_ADCSW_HSI14
59#define STM32_USBSW STM32_USBSW_HSI48
60#define STM32_CECSW STM32_CECSW_HSI
61#define STM32_I2C1SW STM32_I2C1SW_HSI
62#define STM32_USART1SW STM32_USART1SW_PCLK
63#define STM32_RTCSEL STM32_RTCSEL_LSI
64
65/*
66 * ADC driver system settings.
67 */
68#define STM32_ADC_USE_ADC1 FALSE
69#define STM32_ADC_ADC1_DMA_PRIORITY 2
70#define STM32_ADC_IRQ_PRIORITY 2
71#define STM32_ADC_ADC1_DMA_IRQ_PRIORITY 2
72
73/*
74 * EXT driver system settings.
75 */
76#define STM32_EXT_EXTI0_1_IRQ_PRIORITY 3
77#define STM32_EXT_EXTI2_3_IRQ_PRIORITY 3
78#define STM32_EXT_EXTI4_15_IRQ_PRIORITY 3
79#define STM32_EXT_EXTI16_IRQ_PRIORITY 3
80#define STM32_EXT_EXTI17_IRQ_PRIORITY 3
81
82/*
83 * GPT driver system settings.
84 */
85#define STM32_GPT_USE_TIM1 FALSE
86#define STM32_GPT_USE_TIM2 FALSE
87#define STM32_GPT_USE_TIM3 FALSE
88#define STM32_GPT_USE_TIM14 FALSE
89#define STM32_GPT_TIM1_IRQ_PRIORITY 2
90#define STM32_GPT_TIM2_IRQ_PRIORITY 2
91#define STM32_GPT_TIM3_IRQ_PRIORITY 2
92#define STM32_GPT_TIM14_IRQ_PRIORITY 2
93
94/*
95 * I2C driver system settings.
96 */
97#define STM32_I2C_USE_I2C1 FALSE
98#define STM32_I2C_USE_I2C2 FALSE
99#define STM32_I2C_BUSY_TIMEOUT 50
100#define STM32_I2C_I2C1_IRQ_PRIORITY 3
101#define STM32_I2C_I2C2_IRQ_PRIORITY 3
102#define STM32_I2C_USE_DMA TRUE
103#define STM32_I2C_I2C1_DMA_PRIORITY 1
104#define STM32_I2C_I2C2_DMA_PRIORITY 1
105#define STM32_I2C_DMA_ERROR_HOOK(i2cp) osalSysHalt("DMA failure")
106
107/*
108 * ICU driver system settings.
109 */
110#define STM32_ICU_USE_TIM1 FALSE
111#define STM32_ICU_USE_TIM2 FALSE
112#define STM32_ICU_USE_TIM3 FALSE
113#define STM32_ICU_TIM1_IRQ_PRIORITY 3
114#define STM32_ICU_TIM2_IRQ_PRIORITY 3
115#define STM32_ICU_TIM3_IRQ_PRIORITY 3
116
117/*
118 * PWM driver system settings.
119 */
120#define STM32_PWM_USE_ADVANCED FALSE
121#define STM32_PWM_USE_TIM1 FALSE
122#define STM32_PWM_USE_TIM2 FALSE
123#define STM32_PWM_USE_TIM3 FALSE
124#define STM32_PWM_TIM1_IRQ_PRIORITY 3
125#define STM32_PWM_TIM2_IRQ_PRIORITY 3
126#define STM32_PWM_TIM3_IRQ_PRIORITY 3
127
128/*
129 * SERIAL driver system settings.
130 */
131#define STM32_SERIAL_USE_USART1 FALSE
132#define STM32_SERIAL_USE_USART2 FALSE
133#define STM32_SERIAL_USART1_PRIORITY 3
134#define STM32_SERIAL_USART2_PRIORITY 3
135
136/*
137 * SPI driver system settings.
138 */
139#define STM32_SPI_USE_SPI1 FALSE
140#define STM32_SPI_USE_SPI2 FALSE
141#define STM32_SPI_SPI1_DMA_PRIORITY 1
142#define STM32_SPI_SPI2_DMA_PRIORITY 1
143#define STM32_SPI_SPI1_IRQ_PRIORITY 2
144#define STM32_SPI_SPI2_IRQ_PRIORITY 2
145#define STM32_SPI_DMA_ERROR_HOOK(spip) osalSysHalt("DMA failure")
146
147/*
148 * ST driver system settings.
149 */
150#define STM32_ST_IRQ_PRIORITY 2
151#define STM32_ST_USE_TIMER 2
152
153/*
154 * UART driver system settings.
155 */
156#define STM32_UART_USE_USART1 FALSE
157#define STM32_UART_USE_USART2 FALSE
158#define STM32_UART_USART1_IRQ_PRIORITY 3
159#define STM32_UART_USART2_IRQ_PRIORITY 3
160#define STM32_UART_USART1_DMA_PRIORITY 0
161#define STM32_UART_USART2_DMA_PRIORITY 0
162#define STM32_UART_DMA_ERROR_HOOK(uartp) osalSysHalt("DMA failure")
163
164/*
165 * USB driver system settings.
166 */
167#define STM32_USB_USE_USB1 TRUE
168#define STM32_USB_LOW_POWER_ON_SUSPEND FALSE
169#define STM32_USB_USB1_LP_IRQ_PRIORITY 3
170
171#endif /* _MCUCONF_H_ */
diff --git a/keyboards/candybar/readme.md b/keyboards/candybar/readme.md
new file mode 100644
index 000000000..6e0fa0285
--- /dev/null
+++ b/keyboards/candybar/readme.md
@@ -0,0 +1,18 @@
1The Key Company Candybar
2===
3
4![Candybar](https://cdn.shopify.com/s/files/1/1679/2319/articles/CandyBar_Promo_400x225_1000x.jpg?v=1538150501)
5
6
7The Key Company Candybar is a staggered 40% board with a numpad utilizing the STM32F072 microcontroller.
8
9Keyboard Maintainer: [Terry Mathews](https://github.com/TerryMathews/)
10Hardware Supported: TKC Candybar
11Hardware Availability: Via GB
12
13
14Make example for this keyboard (after setting up your build environment):
15
16 make candybar:default:dfu-util
17
18See [build environment setup](https://docs.qmk.fm/build_environment_setup.html) then the [make instructions](https://docs.qmk.fm/make_instructions.html) for more information.
diff --git a/keyboards/candybar/rules.mk b/keyboards/candybar/rules.mk
new file mode 100644
index 000000000..d27bbe102
--- /dev/null
+++ b/keyboards/candybar/rules.mk
@@ -0,0 +1,50 @@
1## chip/board settings
2# - the next two should match the directories in
3# <chibios>/os/hal/ports/$(MCU_FAMILY)/$(MCU_SERIES)
4MCU_FAMILY = STM32
5MCU_SERIES = STM32F0xx
6
7# Linker script to use
8# - it should exist either in <chibios>/os/common/ports/ARMCMx/compilers/GCC/ld/
9# or <this_dir>/ld/
10MCU_LDSCRIPT = STM32F072xB
11
12# Startup code to use
13# - it should exist in <chibios>/os/common/startup/ARMCMx/compilers/GCC/mk/
14MCU_STARTUP = stm32f0xx
15
16# Board: it should exist either in <chibios>/os/hal/boards/
17# or <this_dir>/boards
18BOARD = ST_STM32F072B_DISCOVERY
19
20# Cortex version
21MCU = cortex-m0
22
23# ARM version, CORTEX-M0/M1 are 6, CORTEX-M3/M4/M7 are 7
24ARMV = 6
25
26# Vector table for application
27# 0x00000000-0x00001000 area is occupied by bootlaoder.*/
28# The CORTEX_VTOR... is needed only for MCHCK/Infinity KB
29# OPT_DEFS = -DCORTEX_VTOR_INIT=0x08005000
30OPT_DEFS =
31
32# Options to pass to dfu-util when flashing
33DFU_ARGS = -d 0483:df11 -a 0 -s 0x08000000:leave
34
35# Build Options
36# comment out to disable the options.
37#
38EXTRAFLAGS+=-flto
39BACKLIGHT_ENABLE = no
40BOOTMAGIC_ENABLE = yes # Virtual DIP switch configuration
41## (Note that for BOOTMAGIC on Teensy LC you have to use a custom .ld script.)
42MOUSEKEY_ENABLE = yes # Mouse keys
43EXTRAKEY_ENABLE = yes # Audio control and System control
44CONSOLE_ENABLE = yes # Console for debug
45COMMAND_ENABLE = yes # Commands for debug and configuration
46SLEEP_LED_ENABLE = yes # Breathing sleep LED during USB suspend
47NKRO_ENABLE = yes # USB Nkey Rollover
48AUDIO_ENABLE = no
49RGBLIGHT_ENABLE = no
50SERIAL_LINK_ENABLE = no
generated by cgit v1.2.3 (git 2.25.1) at 2025-12-06 12:24:47 +0000