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authorJames Young <xxiinophobia@yahoo.com>2020-02-29 12:00:00 -0800
committerJames Young <xxiinophobia@yahoo.com>2020-02-29 11:59:30 -0800
commit26eef35f07698d23aafae90e1c230b52e100a334 (patch)
treeeb8e43fc58ca55788e6e89430af0db55ea79e324 /drivers
parent85041ff05bf0e5f4ff4535caf6e638491a5614c8 (diff)
downloadqmk_firmware-26eef35f07698d23aafae90e1c230b52e100a334.tar.gz
qmk_firmware-26eef35f07698d23aafae90e1c230b52e100a334.zip
2020 February 29 Breaking Changes Update (#8064)
Diffstat (limited to 'drivers')
-rw-r--r--drivers/arm/i2c_master.c8
-rw-r--r--drivers/arm/ws2812_spi.c2
-rw-r--r--drivers/boards/GENERIC_STM32_F072XB/board.c207
-rw-r--r--drivers/boards/GENERIC_STM32_F072XB/board.h29
-rw-r--r--drivers/boards/GENERIC_STM32_F072XB/board.mk4
-rw-r--r--drivers/boards/GENERIC_STM32_F072XB/cfg/board.chcfg2
-rw-r--r--drivers/boards/GENERIC_STM32_F072XB/cfg/board.fmpp15
-rw-r--r--drivers/boards/GENERIC_STM32_F303XC/board.c178
-rw-r--r--drivers/ugfx/gdisp/is31fl3731c/gdisp_lld_config.h8
-rw-r--r--drivers/ugfx/gdisp/st7565/gdisp_lld_config.h10
10 files changed, 393 insertions, 70 deletions
diff --git a/drivers/arm/i2c_master.c b/drivers/arm/i2c_master.c
index 21aefd497..ede915fa4 100644
--- a/drivers/arm/i2c_master.c
+++ b/drivers/arm/i2c_master.c
@@ -79,14 +79,14 @@ i2c_status_t i2c_start(uint8_t address) {
79i2c_status_t i2c_transmit(uint8_t address, const uint8_t* data, uint16_t length, uint16_t timeout) { 79i2c_status_t i2c_transmit(uint8_t address, const uint8_t* data, uint16_t length, uint16_t timeout) {
80 i2c_address = address; 80 i2c_address = address;
81 i2cStart(&I2C_DRIVER, &i2cconfig); 81 i2cStart(&I2C_DRIVER, &i2cconfig);
82 msg_t status = i2cMasterTransmitTimeout(&I2C_DRIVER, (i2c_address >> 1), data, length, 0, 0, MS2ST(timeout)); 82 msg_t status = i2cMasterTransmitTimeout(&I2C_DRIVER, (i2c_address >> 1), data, length, 0, 0, TIME_MS2I(timeout));
83 return chibios_to_qmk(&status); 83 return chibios_to_qmk(&status);
84} 84}
85 85
86i2c_status_t i2c_receive(uint8_t address, uint8_t* data, uint16_t length, uint16_t timeout) { 86i2c_status_t i2c_receive(uint8_t address, uint8_t* data, uint16_t length, uint16_t timeout) {
87 i2c_address = address; 87 i2c_address = address;
88 i2cStart(&I2C_DRIVER, &i2cconfig); 88 i2cStart(&I2C_DRIVER, &i2cconfig);
89 msg_t status = i2cMasterReceiveTimeout(&I2C_DRIVER, (i2c_address >> 1), data, length, MS2ST(timeout)); 89 msg_t status = i2cMasterReceiveTimeout(&I2C_DRIVER, (i2c_address >> 1), data, length, TIME_MS2I(timeout));
90 return chibios_to_qmk(&status); 90 return chibios_to_qmk(&status);
91} 91}
92 92
@@ -100,14 +100,14 @@ i2c_status_t i2c_writeReg(uint8_t devaddr, uint8_t regaddr, const uint8_t* data,
100 } 100 }
101 complete_packet[0] = regaddr; 101 complete_packet[0] = regaddr;
102 102
103 msg_t status = i2cMasterTransmitTimeout(&I2C_DRIVER, (i2c_address >> 1), complete_packet, length + 1, 0, 0, MS2ST(timeout)); 103 msg_t status = i2cMasterTransmitTimeout(&I2C_DRIVER, (i2c_address >> 1), complete_packet, length + 1, 0, 0, TIME_MS2I(timeout));
104 return chibios_to_qmk(&status); 104 return chibios_to_qmk(&status);
105} 105}
106 106
107i2c_status_t i2c_readReg(uint8_t devaddr, uint8_t regaddr, uint8_t* data, uint16_t length, uint16_t timeout) { 107i2c_status_t i2c_readReg(uint8_t devaddr, uint8_t regaddr, uint8_t* data, uint16_t length, uint16_t timeout) {
108 i2c_address = devaddr; 108 i2c_address = devaddr;
109 i2cStart(&I2C_DRIVER, &i2cconfig); 109 i2cStart(&I2C_DRIVER, &i2cconfig);
110 msg_t status = i2cMasterTransmitTimeout(&I2C_DRIVER, (i2c_address >> 1), &regaddr, 1, data, length, MS2ST(timeout)); 110 msg_t status = i2cMasterTransmitTimeout(&I2C_DRIVER, (i2c_address >> 1), &regaddr, 1, data, length, TIME_MS2I(timeout));
111 return chibios_to_qmk(&status); 111 return chibios_to_qmk(&status);
112} 112}
113 113
diff --git a/drivers/arm/ws2812_spi.c b/drivers/arm/ws2812_spi.c
index 0e954ec50..36e08e39e 100644
--- a/drivers/arm/ws2812_spi.c
+++ b/drivers/arm/ws2812_spi.c
@@ -60,7 +60,7 @@ void ws2812_init(void) {
60 60
61 // TODO: more dynamic baudrate 61 // TODO: more dynamic baudrate
62 static const SPIConfig spicfg = { 62 static const SPIConfig spicfg = {
63 NULL, PAL_PORT(RGB_DI_PIN), PAL_PAD(RGB_DI_PIN), 63 0, NULL, PAL_PORT(RGB_DI_PIN), PAL_PAD(RGB_DI_PIN),
64 SPI_CR1_BR_1 | SPI_CR1_BR_0 // baudrate : fpclk / 8 => 1tick is 0.32us (2.25 MHz) 64 SPI_CR1_BR_1 | SPI_CR1_BR_0 // baudrate : fpclk / 8 => 1tick is 0.32us (2.25 MHz)
65 }; 65 };
66 66
diff --git a/drivers/boards/GENERIC_STM32_F072XB/board.c b/drivers/boards/GENERIC_STM32_F072XB/board.c
index dcbb94310..c91136e8f 100644
--- a/drivers/boards/GENERIC_STM32_F072XB/board.c
+++ b/drivers/boards/GENERIC_STM32_F072XB/board.c
@@ -1,5 +1,5 @@
1/* 1/*
2 ChibiOS - Copyright (C) 2006..2016 Giovanni Di Sirio 2 ChibiOS - Copyright (C) 2006..2018 Giovanni Di Sirio
3 3
4 Licensed under the Apache License, Version 2.0 (the "License"); 4 Licensed under the Apache License, Version 2.0 (the "License");
5 you may not use this file except in compliance with the License. 5 you may not use this file except in compliance with the License.
@@ -20,56 +20,209 @@
20 */ 20 */
21 21
22#include "hal.h" 22#include "hal.h"
23#include "stm32_gpio.h"
24
25/*===========================================================================*/
26/* Driver local definitions. */
27/*===========================================================================*/
28
29/*===========================================================================*/
30/* Driver exported variables. */
31/*===========================================================================*/
32
33/*===========================================================================*/
34/* Driver local variables and types. */
35/*===========================================================================*/
36
37/**
38 * @brief Type of STM32 GPIO port setup.
39 */
40typedef struct {
41 uint32_t moder;
42 uint32_t otyper;
43 uint32_t ospeedr;
44 uint32_t pupdr;
45 uint32_t odr;
46 uint32_t afrl;
47 uint32_t afrh;
48} gpio_setup_t;
23 49
24#if HAL_USE_PAL || defined(__DOXYGEN__)
25/** 50/**
26 * @brief PAL setup. 51 * @brief Type of STM32 GPIO initialization data.
27 * @details Digital I/O ports static configuration as defined in @p board.h.
28 * This variable is used by the HAL when initializing the PAL driver.
29 */ 52 */
30const PALConfig pal_default_config = { 53typedef struct {
31# if STM32_HAS_GPIOA 54#if STM32_HAS_GPIOA || defined(__DOXYGEN__)
55 gpio_setup_t PAData;
56#endif
57#if STM32_HAS_GPIOB || defined(__DOXYGEN__)
58 gpio_setup_t PBData;
59#endif
60#if STM32_HAS_GPIOC || defined(__DOXYGEN__)
61 gpio_setup_t PCData;
62#endif
63#if STM32_HAS_GPIOD || defined(__DOXYGEN__)
64 gpio_setup_t PDData;
65#endif
66#if STM32_HAS_GPIOE || defined(__DOXYGEN__)
67 gpio_setup_t PEData;
68#endif
69#if STM32_HAS_GPIOF || defined(__DOXYGEN__)
70 gpio_setup_t PFData;
71#endif
72#if STM32_HAS_GPIOG || defined(__DOXYGEN__)
73 gpio_setup_t PGData;
74#endif
75#if STM32_HAS_GPIOH || defined(__DOXYGEN__)
76 gpio_setup_t PHData;
77#endif
78#if STM32_HAS_GPIOI || defined(__DOXYGEN__)
79 gpio_setup_t PIData;
80#endif
81#if STM32_HAS_GPIOJ || defined(__DOXYGEN__)
82 gpio_setup_t PJData;
83#endif
84#if STM32_HAS_GPIOK || defined(__DOXYGEN__)
85 gpio_setup_t PKData;
86#endif
87} gpio_config_t;
88
89/**
90 * @brief STM32 GPIO static initialization data.
91 */
92static const gpio_config_t gpio_default_config = {
93#if STM32_HAS_GPIOA
32 {VAL_GPIOA_MODER, VAL_GPIOA_OTYPER, VAL_GPIOA_OSPEEDR, VAL_GPIOA_PUPDR, VAL_GPIOA_ODR, VAL_GPIOA_AFRL, VAL_GPIOA_AFRH}, 94 {VAL_GPIOA_MODER, VAL_GPIOA_OTYPER, VAL_GPIOA_OSPEEDR, VAL_GPIOA_PUPDR, VAL_GPIOA_ODR, VAL_GPIOA_AFRL, VAL_GPIOA_AFRH},
33# endif 95#endif
34# if STM32_HAS_GPIOB 96#if STM32_HAS_GPIOB
35 {VAL_GPIOB_MODER, VAL_GPIOB_OTYPER, VAL_GPIOB_OSPEEDR, VAL_GPIOB_PUPDR, VAL_GPIOB_ODR, VAL_GPIOB_AFRL, VAL_GPIOB_AFRH}, 97 {VAL_GPIOB_MODER, VAL_GPIOB_OTYPER, VAL_GPIOB_OSPEEDR, VAL_GPIOB_PUPDR, VAL_GPIOB_ODR, VAL_GPIOB_AFRL, VAL_GPIOB_AFRH},
36# endif 98#endif
37# if STM32_HAS_GPIOC 99#if STM32_HAS_GPIOC
38 {VAL_GPIOC_MODER, VAL_GPIOC_OTYPER, VAL_GPIOC_OSPEEDR, VAL_GPIOC_PUPDR, VAL_GPIOC_ODR, VAL_GPIOC_AFRL, VAL_GPIOC_AFRH}, 100 {VAL_GPIOC_MODER, VAL_GPIOC_OTYPER, VAL_GPIOC_OSPEEDR, VAL_GPIOC_PUPDR, VAL_GPIOC_ODR, VAL_GPIOC_AFRL, VAL_GPIOC_AFRH},
39# endif 101#endif
40# if STM32_HAS_GPIOD 102#if STM32_HAS_GPIOD
41 {VAL_GPIOD_MODER, VAL_GPIOD_OTYPER, VAL_GPIOD_OSPEEDR, VAL_GPIOD_PUPDR, VAL_GPIOD_ODR, VAL_GPIOD_AFRL, VAL_GPIOD_AFRH}, 103 {VAL_GPIOD_MODER, VAL_GPIOD_OTYPER, VAL_GPIOD_OSPEEDR, VAL_GPIOD_PUPDR, VAL_GPIOD_ODR, VAL_GPIOD_AFRL, VAL_GPIOD_AFRH},
42# endif 104#endif
43# if STM32_HAS_GPIOE 105#if STM32_HAS_GPIOE
44 {VAL_GPIOE_MODER, VAL_GPIOE_OTYPER, VAL_GPIOE_OSPEEDR, VAL_GPIOE_PUPDR, VAL_GPIOE_ODR, VAL_GPIOE_AFRL, VAL_GPIOE_AFRH}, 106 {VAL_GPIOE_MODER, VAL_GPIOE_OTYPER, VAL_GPIOE_OSPEEDR, VAL_GPIOE_PUPDR, VAL_GPIOE_ODR, VAL_GPIOE_AFRL, VAL_GPIOE_AFRH},
45# endif 107#endif
46# if STM32_HAS_GPIOF 108#if STM32_HAS_GPIOF
47 {VAL_GPIOF_MODER, VAL_GPIOF_OTYPER, VAL_GPIOF_OSPEEDR, VAL_GPIOF_PUPDR, VAL_GPIOF_ODR, VAL_GPIOF_AFRL, VAL_GPIOF_AFRH}, 109 {VAL_GPIOF_MODER, VAL_GPIOF_OTYPER, VAL_GPIOF_OSPEEDR, VAL_GPIOF_PUPDR, VAL_GPIOF_ODR, VAL_GPIOF_AFRL, VAL_GPIOF_AFRH},
48# endif 110#endif
49# if STM32_HAS_GPIOG 111#if STM32_HAS_GPIOG
50 {VAL_GPIOG_MODER, VAL_GPIOG_OTYPER, VAL_GPIOG_OSPEEDR, VAL_GPIOG_PUPDR, VAL_GPIOG_ODR, VAL_GPIOG_AFRL, VAL_GPIOG_AFRH}, 112 {VAL_GPIOG_MODER, VAL_GPIOG_OTYPER, VAL_GPIOG_OSPEEDR, VAL_GPIOG_PUPDR, VAL_GPIOG_ODR, VAL_GPIOG_AFRL, VAL_GPIOG_AFRH},
51# endif 113#endif
52# if STM32_HAS_GPIOH 114#if STM32_HAS_GPIOH
53 {VAL_GPIOH_MODER, VAL_GPIOH_OTYPER, VAL_GPIOH_OSPEEDR, VAL_GPIOH_PUPDR, VAL_GPIOH_ODR, VAL_GPIOH_AFRL, VAL_GPIOH_AFRH}, 115 {VAL_GPIOH_MODER, VAL_GPIOH_OTYPER, VAL_GPIOH_OSPEEDR, VAL_GPIOH_PUPDR, VAL_GPIOH_ODR, VAL_GPIOH_AFRL, VAL_GPIOH_AFRH},
54# endif 116#endif
55# if STM32_HAS_GPIOI 117#if STM32_HAS_GPIOI
56 {VAL_GPIOI_MODER, VAL_GPIOI_OTYPER, VAL_GPIOI_OSPEEDR, VAL_GPIOI_PUPDR, VAL_GPIOI_ODR, VAL_GPIOI_AFRL, VAL_GPIOI_AFRH} 118 {VAL_GPIOI_MODER, VAL_GPIOI_OTYPER, VAL_GPIOI_OSPEEDR, VAL_GPIOI_PUPDR, VAL_GPIOI_ODR, VAL_GPIOI_AFRL, VAL_GPIOI_AFRH},
57# endif 119#endif
120#if STM32_HAS_GPIOJ
121 {VAL_GPIOJ_MODER, VAL_GPIOJ_OTYPER, VAL_GPIOJ_OSPEEDR, VAL_GPIOJ_PUPDR, VAL_GPIOJ_ODR, VAL_GPIOJ_AFRL, VAL_GPIOJ_AFRH},
122#endif
123#if STM32_HAS_GPIOK
124 {VAL_GPIOK_MODER, VAL_GPIOK_OTYPER, VAL_GPIOK_OSPEEDR, VAL_GPIOK_PUPDR, VAL_GPIOK_ODR, VAL_GPIOK_AFRL, VAL_GPIOK_AFRH}
125#endif
58}; 126};
127
128/*===========================================================================*/
129/* Driver local functions. */
130/*===========================================================================*/
131
132static void gpio_init(stm32_gpio_t *gpiop, const gpio_setup_t *config) {
133 gpiop->OTYPER = config->otyper;
134 gpiop->OSPEEDR = config->ospeedr;
135 gpiop->PUPDR = config->pupdr;
136 gpiop->ODR = config->odr;
137 gpiop->AFRL = config->afrl;
138 gpiop->AFRH = config->afrh;
139 gpiop->MODER = config->moder;
140}
141
142static void stm32_gpio_init(void) {
143 /* Enabling GPIO-related clocks, the mask comes from the
144 registry header file.*/
145 rccResetAHB(STM32_GPIO_EN_MASK);
146 rccEnableAHB(STM32_GPIO_EN_MASK, true);
147
148 /* Initializing all the defined GPIO ports.*/
149#if STM32_HAS_GPIOA
150 gpio_init(GPIOA, &gpio_default_config.PAData);
151#endif
152#if STM32_HAS_GPIOB
153 gpio_init(GPIOB, &gpio_default_config.PBData);
154#endif
155#if STM32_HAS_GPIOC
156 gpio_init(GPIOC, &gpio_default_config.PCData);
157#endif
158#if STM32_HAS_GPIOD
159 gpio_init(GPIOD, &gpio_default_config.PDData);
59#endif 160#endif
161#if STM32_HAS_GPIOE
162 gpio_init(GPIOE, &gpio_default_config.PEData);
163#endif
164#if STM32_HAS_GPIOF
165 gpio_init(GPIOF, &gpio_default_config.PFData);
166#endif
167#if STM32_HAS_GPIOG
168 gpio_init(GPIOG, &gpio_default_config.PGData);
169#endif
170#if STM32_HAS_GPIOH
171 gpio_init(GPIOH, &gpio_default_config.PHData);
172#endif
173#if STM32_HAS_GPIOI
174 gpio_init(GPIOI, &gpio_default_config.PIData);
175#endif
176#if STM32_HAS_GPIOJ
177 gpio_init(GPIOJ, &gpio_default_config.PJData);
178#endif
179#if STM32_HAS_GPIOK
180 gpio_init(GPIOK, &gpio_default_config.PKData);
181#endif
182}
183
184/*===========================================================================*/
185/* Driver interrupt handlers. */
186/*===========================================================================*/
187
188/*===========================================================================*/
189/* Driver exported functions. */
190/*===========================================================================*/
60 191
61__attribute__((weak)) void enter_bootloader_mode_if_requested(void) {} 192__attribute__((weak)) void enter_bootloader_mode_if_requested(void) {}
62 193
63/** 194/**
64 * @brief Early initialization code. 195 * @brief Early initialization code.
65 * @details This initialization must be performed just after stack setup 196 * @details GPIO ports and system clocks are initialized before everything
66 * and before any other initialization. 197 * else.
67 */ 198 */
68void __early_init(void) { 199void __early_init(void) {
69 enter_bootloader_mode_if_requested(); 200 enter_bootloader_mode_if_requested();
201
202 stm32_gpio_init();
70 stm32_clock_init(); 203 stm32_clock_init();
71} 204}
72 205
206#if HAL_USE_SDC || defined(__DOXYGEN__)
207/**
208 * @brief SDC card detection.
209 */
210bool sdc_lld_is_card_inserted(SDCDriver *sdcp) {
211 (void)sdcp;
212 /* TODO: Fill the implementation.*/
213 return true;
214}
215
216/**
217 * @brief SDC card write protection detection.
218 */
219bool sdc_lld_is_write_protected(SDCDriver *sdcp) {
220 (void)sdcp;
221 /* TODO: Fill the implementation.*/
222 return false;
223}
224#endif /* HAL_USE_SDC */
225
73#if HAL_USE_MMC_SPI || defined(__DOXYGEN__) 226#if HAL_USE_MMC_SPI || defined(__DOXYGEN__)
74/** 227/**
75 * @brief MMC_SPI card detection. 228 * @brief MMC_SPI card detection.
diff --git a/drivers/boards/GENERIC_STM32_F072XB/board.h b/drivers/boards/GENERIC_STM32_F072XB/board.h
index c625a4330..87570e62d 100644
--- a/drivers/boards/GENERIC_STM32_F072XB/board.h
+++ b/drivers/boards/GENERIC_STM32_F072XB/board.h
@@ -1,5 +1,5 @@
1/* 1/*
2 ChibiOS - Copyright (C) 2006..2016 Giovanni Di Sirio 2 ChibiOS - Copyright (C) 2006..2018 Giovanni Di Sirio
3 3
4 Licensed under the Apache License, Version 2.0 (the "License"); 4 Licensed under the Apache License, Version 2.0 (the "License");
5 you may not use this file except in compliance with the License. 5 you may not use this file except in compliance with the License.
@@ -22,6 +22,10 @@
22#ifndef BOARD_H 22#ifndef BOARD_H
23#define BOARD_H 23#define BOARD_H
24 24
25/*===========================================================================*/
26/* Driver constants. */
27/*===========================================================================*/
28
25/* 29/*
26 * Setup for Generic STM32_F072 Board 30 * Setup for Generic STM32_F072 Board
27 */ 31 */
@@ -167,11 +171,9 @@
167#define LINE_USB_DP PAL_LINE(GPIOA, 12U) 171#define LINE_USB_DP PAL_LINE(GPIOA, 12U)
168#define LINE_SWDIO PAL_LINE(GPIOA, 13U) 172#define LINE_SWDIO PAL_LINE(GPIOA, 13U)
169#define LINE_SWCLK PAL_LINE(GPIOA, 14U) 173#define LINE_SWCLK PAL_LINE(GPIOA, 14U)
170
171#define LINE_SPI2_SCK PAL_LINE(GPIOB, 13U) 174#define LINE_SPI2_SCK PAL_LINE(GPIOB, 13U)
172#define LINE_SPI2_MISO PAL_LINE(GPIOB, 14U) 175#define LINE_SPI2_MISO PAL_LINE(GPIOB, 14U)
173#define LINE_SPI2_MOSI PAL_LINE(GPIOB, 15U) 176#define LINE_SPI2_MOSI PAL_LINE(GPIOB, 15U)
174
175#define LINE_MEMS_CS PAL_LINE(GPIOC, 0U) 177#define LINE_MEMS_CS PAL_LINE(GPIOC, 0U)
176#define LINE_LED_RED PAL_LINE(GPIOC, 6U) 178#define LINE_LED_RED PAL_LINE(GPIOC, 6U)
177#define LINE_LED_BLUE PAL_LINE(GPIOC, 7U) 179#define LINE_LED_BLUE PAL_LINE(GPIOC, 7U)
@@ -179,10 +181,25 @@
179#define LINE_LED_GREEN PAL_LINE(GPIOC, 9U) 181#define LINE_LED_GREEN PAL_LINE(GPIOC, 9U)
180#define LINE_OSC32_IN PAL_LINE(GPIOC, 14U) 182#define LINE_OSC32_IN PAL_LINE(GPIOC, 14U)
181#define LINE_OSC32_OUT PAL_LINE(GPIOC, 15U) 183#define LINE_OSC32_OUT PAL_LINE(GPIOC, 15U)
182
183#define LINE_OSC_IN PAL_LINE(GPIOF, 0U) 184#define LINE_OSC_IN PAL_LINE(GPIOF, 0U)
184#define LINE_OSC_OUT PAL_LINE(GPIOF, 1U) 185#define LINE_OSC_OUT PAL_LINE(GPIOF, 1U)
185 186
187/*===========================================================================*/
188/* Driver pre-compile time settings. */
189/*===========================================================================*/
190
191/*===========================================================================*/
192/* Derived constants and error checks. */
193/*===========================================================================*/
194
195/*===========================================================================*/
196/* Driver data structures and types. */
197/*===========================================================================*/
198
199/*===========================================================================*/
200/* Driver macros. */
201/*===========================================================================*/
202
186/* 203/*
187 * I/O ports initial setup, this configuration is established soon after reset 204 * I/O ports initial setup, this configuration is established soon after reset
188 * in the initialization code. 205 * in the initialization code.
@@ -373,6 +390,10 @@
373#define VAL_GPIOF_AFRL (PIN_AFIO_AF(GPIOF_OSC_IN, 0U) | PIN_AFIO_AF(GPIOF_OSC_OUT, 0U) | PIN_AFIO_AF(GPIOF_PIN2, 0U) | PIN_AFIO_AF(GPIOF_PIN3, 0U) | PIN_AFIO_AF(GPIOF_PIN4, 0U) | PIN_AFIO_AF(GPIOF_PIN5, 0U) | PIN_AFIO_AF(GPIOF_PIN6, 0U) | PIN_AFIO_AF(GPIOF_PIN7, 0U)) 390#define VAL_GPIOF_AFRL (PIN_AFIO_AF(GPIOF_OSC_IN, 0U) | PIN_AFIO_AF(GPIOF_OSC_OUT, 0U) | PIN_AFIO_AF(GPIOF_PIN2, 0U) | PIN_AFIO_AF(GPIOF_PIN3, 0U) | PIN_AFIO_AF(GPIOF_PIN4, 0U) | PIN_AFIO_AF(GPIOF_PIN5, 0U) | PIN_AFIO_AF(GPIOF_PIN6, 0U) | PIN_AFIO_AF(GPIOF_PIN7, 0U))
374#define VAL_GPIOF_AFRH (PIN_AFIO_AF(GPIOF_PIN8, 0U) | PIN_AFIO_AF(GPIOF_PIN9, 0U) | PIN_AFIO_AF(GPIOF_PIN10, 0U) | PIN_AFIO_AF(GPIOF_PIN11, 0U) | PIN_AFIO_AF(GPIOF_PIN12, 0U) | PIN_AFIO_AF(GPIOF_PIN13, 0U) | PIN_AFIO_AF(GPIOF_PIN14, 0U) | PIN_AFIO_AF(GPIOF_PIN15, 0U)) 391#define VAL_GPIOF_AFRH (PIN_AFIO_AF(GPIOF_PIN8, 0U) | PIN_AFIO_AF(GPIOF_PIN9, 0U) | PIN_AFIO_AF(GPIOF_PIN10, 0U) | PIN_AFIO_AF(GPIOF_PIN11, 0U) | PIN_AFIO_AF(GPIOF_PIN12, 0U) | PIN_AFIO_AF(GPIOF_PIN13, 0U) | PIN_AFIO_AF(GPIOF_PIN14, 0U) | PIN_AFIO_AF(GPIOF_PIN15, 0U))
375 392
393/*===========================================================================*/
394/* External declarations. */
395/*===========================================================================*/
396
376#if !defined(_FROM_ASM_) 397#if !defined(_FROM_ASM_)
377# ifdef __cplusplus 398# ifdef __cplusplus
378extern "C" { 399extern "C" {
diff --git a/drivers/boards/GENERIC_STM32_F072XB/board.mk b/drivers/boards/GENERIC_STM32_F072XB/board.mk
index c136f705a..bd6f87826 100644
--- a/drivers/boards/GENERIC_STM32_F072XB/board.mk
+++ b/drivers/boards/GENERIC_STM32_F072XB/board.mk
@@ -3,3 +3,7 @@ BOARDSRC = $(BOARD_PATH)/boards/GENERIC_STM32_F072XB/board.c
3 3
4# Required include directories 4# Required include directories
5BOARDINC = $(BOARD_PATH)/boards/GENERIC_STM32_F072XB 5BOARDINC = $(BOARD_PATH)/boards/GENERIC_STM32_F072XB
6
7# Shared variables
8ALLCSRC += $(BOARDSRC)
9ALLINC += $(BOARDINC)
diff --git a/drivers/boards/GENERIC_STM32_F072XB/cfg/board.chcfg b/drivers/boards/GENERIC_STM32_F072XB/cfg/board.chcfg
index 9c7cf4fd7..e6ceecb62 100644
--- a/drivers/boards/GENERIC_STM32_F072XB/cfg/board.chcfg
+++ b/drivers/boards/GENERIC_STM32_F072XB/cfg/board.chcfg
@@ -6,7 +6,7 @@
6 <configuration_settings> 6 <configuration_settings>
7 <templates_path>resources/gencfg/processors/boards/stm32f0xx/templates</templates_path> 7 <templates_path>resources/gencfg/processors/boards/stm32f0xx/templates</templates_path>
8 <output_path>..</output_path> 8 <output_path>..</output_path>
9 <hal_version>3.0.x</hal_version> 9 <hal_version>5.0.x</hal_version>
10 </configuration_settings> 10 </configuration_settings>
11 <board_name>ST STM32F072B-Discovery</board_name> 11 <board_name>ST STM32F072B-Discovery</board_name>
12 <board_id>ST_STM32F072B_DISCOVERY</board_id> 12 <board_id>ST_STM32F072B_DISCOVERY</board_id>
diff --git a/drivers/boards/GENERIC_STM32_F072XB/cfg/board.fmpp b/drivers/boards/GENERIC_STM32_F072XB/cfg/board.fmpp
new file mode 100644
index 000000000..55cd396e4
--- /dev/null
+++ b/drivers/boards/GENERIC_STM32_F072XB/cfg/board.fmpp
@@ -0,0 +1,15 @@
1sourceRoot: ../../../../../tools/ftl/processors/boards/stm32f0xx/templates
2outputRoot: ..
3dataRoot: .
4
5freemarkerLinks: {
6 lib: ../../../../../tools/ftl/libs
7}
8
9data : {
10 doc1:xml (
11 board.chcfg
12 {
13 }
14 )
15}
diff --git a/drivers/boards/GENERIC_STM32_F303XC/board.c b/drivers/boards/GENERIC_STM32_F303XC/board.c
index 60c191d9b..9b0fc1b6b 100644
--- a/drivers/boards/GENERIC_STM32_F303XC/board.c
+++ b/drivers/boards/GENERIC_STM32_F303XC/board.c
@@ -14,44 +14,172 @@
14 limitations under the License. 14 limitations under the License.
15*/ 15*/
16 16
17/*
18 * This file has been automatically generated using ChibiStudio board
19 * generator plugin. Do not edit manually.
20 */
21
17#include "hal.h" 22#include "hal.h"
23#include "stm32_gpio.h"
24
25/*===========================================================================*/
26/* Driver local definitions. */
27/*===========================================================================*/
28
29/*===========================================================================*/
30/* Driver exported variables. */
31/*===========================================================================*/
32
33/*===========================================================================*/
34/* Driver local variables and types. */
35/*===========================================================================*/
36
37/**
38 * @brief Type of STM32 GPIO port setup.
39 */
40typedef struct {
41 uint32_t moder;
42 uint32_t otyper;
43 uint32_t ospeedr;
44 uint32_t pupdr;
45 uint32_t odr;
46 uint32_t afrl;
47 uint32_t afrh;
48} gpio_setup_t;
49
50/**
51 * @brief Type of STM32 GPIO initialization data.
52 */
53typedef struct {
54#if STM32_HAS_GPIOA || defined(__DOXYGEN__)
55 gpio_setup_t PAData;
56#endif
57#if STM32_HAS_GPIOB || defined(__DOXYGEN__)
58 gpio_setup_t PBData;
59#endif
60#if STM32_HAS_GPIOC || defined(__DOXYGEN__)
61 gpio_setup_t PCData;
62#endif
63#if STM32_HAS_GPIOD || defined(__DOXYGEN__)
64 gpio_setup_t PDData;
65#endif
66#if STM32_HAS_GPIOE || defined(__DOXYGEN__)
67 gpio_setup_t PEData;
68#endif
69#if STM32_HAS_GPIOF || defined(__DOXYGEN__)
70 gpio_setup_t PFData;
71#endif
72#if STM32_HAS_GPIOG || defined(__DOXYGEN__)
73 gpio_setup_t PGData;
74#endif
75#if STM32_HAS_GPIOH || defined(__DOXYGEN__)
76 gpio_setup_t PHData;
77#endif
78#if STM32_HAS_GPIOI || defined(__DOXYGEN__)
79 gpio_setup_t PIData;
80#endif
81#if STM32_HAS_GPIOJ || defined(__DOXYGEN__)
82 gpio_setup_t PJData;
83#endif
84#if STM32_HAS_GPIOK || defined(__DOXYGEN__)
85 gpio_setup_t PKData;
86#endif
87} gpio_config_t;
18 88
19#if HAL_USE_PAL || defined(__DOXYGEN__)
20/** 89/**
21 * @brief PAL setup. 90 * @brief STM32 GPIO static initialization data.
22 * @details Digital I/O ports static configuration as defined in @p board.h.
23 * This variable is used by the HAL when initializing the PAL driver.
24 */ 91 */
25const PALConfig pal_default_config = { 92static const gpio_config_t gpio_default_config = {
26# if STM32_HAS_GPIOA 93#if STM32_HAS_GPIOA
27 {VAL_GPIOA_MODER, VAL_GPIOA_OTYPER, VAL_GPIOA_OSPEEDR, VAL_GPIOA_PUPDR, VAL_GPIOA_ODR, VAL_GPIOA_AFRL, VAL_GPIOA_AFRH}, 94 {VAL_GPIOA_MODER, VAL_GPIOA_OTYPER, VAL_GPIOA_OSPEEDR, VAL_GPIOA_PUPDR, VAL_GPIOA_ODR, VAL_GPIOA_AFRL, VAL_GPIOA_AFRH},
28# endif 95#endif
29# if STM32_HAS_GPIOB 96#if STM32_HAS_GPIOB
30 {VAL_GPIOB_MODER, VAL_GPIOB_OTYPER, VAL_GPIOB_OSPEEDR, VAL_GPIOB_PUPDR, VAL_GPIOB_ODR, VAL_GPIOB_AFRL, VAL_GPIOB_AFRH}, 97 {VAL_GPIOB_MODER, VAL_GPIOB_OTYPER, VAL_GPIOB_OSPEEDR, VAL_GPIOB_PUPDR, VAL_GPIOB_ODR, VAL_GPIOB_AFRL, VAL_GPIOB_AFRH},
31# endif 98#endif
32# if STM32_HAS_GPIOC 99#if STM32_HAS_GPIOC
33 {VAL_GPIOC_MODER, VAL_GPIOC_OTYPER, VAL_GPIOC_OSPEEDR, VAL_GPIOC_PUPDR, VAL_GPIOC_ODR, VAL_GPIOC_AFRL, VAL_GPIOC_AFRH}, 100 {VAL_GPIOC_MODER, VAL_GPIOC_OTYPER, VAL_GPIOC_OSPEEDR, VAL_GPIOC_PUPDR, VAL_GPIOC_ODR, VAL_GPIOC_AFRL, VAL_GPIOC_AFRH},
34# endif 101#endif
35# if STM32_HAS_GPIOD 102#if STM32_HAS_GPIOD
36 {VAL_GPIOD_MODER, VAL_GPIOD_OTYPER, VAL_GPIOD_OSPEEDR, VAL_GPIOD_PUPDR, VAL_GPIOD_ODR, VAL_GPIOD_AFRL, VAL_GPIOD_AFRH}, 103 {VAL_GPIOD_MODER, VAL_GPIOD_OTYPER, VAL_GPIOD_OSPEEDR, VAL_GPIOD_PUPDR, VAL_GPIOD_ODR, VAL_GPIOD_AFRL, VAL_GPIOD_AFRH},
37# endif 104#endif
38# if STM32_HAS_GPIOE 105#if STM32_HAS_GPIOE
39 {VAL_GPIOE_MODER, VAL_GPIOE_OTYPER, VAL_GPIOE_OSPEEDR, VAL_GPIOE_PUPDR, VAL_GPIOE_ODR, VAL_GPIOE_AFRL, VAL_GPIOE_AFRH}, 106 {VAL_GPIOE_MODER, VAL_GPIOE_OTYPER, VAL_GPIOE_OSPEEDR, VAL_GPIOE_PUPDR, VAL_GPIOE_ODR, VAL_GPIOE_AFRL, VAL_GPIOE_AFRH},
40# endif 107#endif
41# if STM32_HAS_GPIOF 108#if STM32_HAS_GPIOF
42 {VAL_GPIOF_MODER, VAL_GPIOF_OTYPER, VAL_GPIOF_OSPEEDR, VAL_GPIOF_PUPDR, VAL_GPIOF_ODR, VAL_GPIOF_AFRL, VAL_GPIOF_AFRH}, 109 {VAL_GPIOF_MODER, VAL_GPIOF_OTYPER, VAL_GPIOF_OSPEEDR, VAL_GPIOF_PUPDR, VAL_GPIOF_ODR, VAL_GPIOF_AFRL, VAL_GPIOF_AFRH},
43# endif 110#endif
44# if STM32_HAS_GPIOG 111#if STM32_HAS_GPIOG
45 {VAL_GPIOG_MODER, VAL_GPIOG_OTYPER, VAL_GPIOG_OSPEEDR, VAL_GPIOG_PUPDR, VAL_GPIOG_ODR, VAL_GPIOG_AFRL, VAL_GPIOG_AFRH}, 112 {VAL_GPIOG_MODER, VAL_GPIOG_OTYPER, VAL_GPIOG_OSPEEDR, VAL_GPIOG_PUPDR, VAL_GPIOG_ODR, VAL_GPIOG_AFRL, VAL_GPIOG_AFRH},
46# endif 113#endif
47# if STM32_HAS_GPIOH 114#if STM32_HAS_GPIOH
48 {VAL_GPIOH_MODER, VAL_GPIOH_OTYPER, VAL_GPIOH_OSPEEDR, VAL_GPIOH_PUPDR, VAL_GPIOH_ODR, VAL_GPIOH_AFRL, VAL_GPIOH_AFRH}, 115 {VAL_GPIOH_MODER, VAL_GPIOH_OTYPER, VAL_GPIOH_OSPEEDR, VAL_GPIOH_PUPDR, VAL_GPIOH_ODR, VAL_GPIOH_AFRL, VAL_GPIOH_AFRH},
49# endif 116#endif
50# if STM32_HAS_GPIOI 117#if STM32_HAS_GPIOI
51 {VAL_GPIOI_MODER, VAL_GPIOI_OTYPER, VAL_GPIOI_OSPEEDR, VAL_GPIOI_PUPDR, VAL_GPIOI_ODR, VAL_GPIOI_AFRL, VAL_GPIOI_AFRH} 118 {VAL_GPIOI_MODER, VAL_GPIOI_OTYPER, VAL_GPIOI_OSPEEDR, VAL_GPIOI_PUPDR, VAL_GPIOI_ODR, VAL_GPIOI_AFRL, VAL_GPIOI_AFRH},
52# endif 119#endif
120#if STM32_HAS_GPIOJ
121 {VAL_GPIOJ_MODER, VAL_GPIOJ_OTYPER, VAL_GPIOJ_OSPEEDR, VAL_GPIOJ_PUPDR, VAL_GPIOJ_ODR, VAL_GPIOJ_AFRL, VAL_GPIOJ_AFRH},
122#endif
123#if STM32_HAS_GPIOK
124 {VAL_GPIOK_MODER, VAL_GPIOK_OTYPER, VAL_GPIOK_OSPEEDR, VAL_GPIOK_PUPDR, VAL_GPIOK_ODR, VAL_GPIOK_AFRL, VAL_GPIOK_AFRH}
125#endif
53}; 126};
127
128/*===========================================================================*/
129/* Driver local functions. */
130/*===========================================================================*/
131
132static void gpio_init(stm32_gpio_t *gpiop, const gpio_setup_t *config) {
133 gpiop->OTYPER = config->otyper;
134 gpiop->OSPEEDR = config->ospeedr;
135 gpiop->PUPDR = config->pupdr;
136 gpiop->ODR = config->odr;
137 gpiop->AFRL = config->afrl;
138 gpiop->AFRH = config->afrh;
139 gpiop->MODER = config->moder;
140}
141
142static void stm32_gpio_init(void) {
143 /* Enabling GPIO-related clocks, the mask comes from the
144 registry header file.*/
145 rccResetAHB(STM32_GPIO_EN_MASK);
146 rccEnableAHB(STM32_GPIO_EN_MASK, true);
147
148 /* Initializing all the defined GPIO ports.*/
149#if STM32_HAS_GPIOA
150 gpio_init(GPIOA, &gpio_default_config.PAData);
54#endif 151#endif
152#if STM32_HAS_GPIOB
153 gpio_init(GPIOB, &gpio_default_config.PBData);
154#endif
155#if STM32_HAS_GPIOC
156 gpio_init(GPIOC, &gpio_default_config.PCData);
157#endif
158#if STM32_HAS_GPIOD
159 gpio_init(GPIOD, &gpio_default_config.PDData);
160#endif
161#if STM32_HAS_GPIOE
162 gpio_init(GPIOE, &gpio_default_config.PEData);
163#endif
164#if STM32_HAS_GPIOF
165 gpio_init(GPIOF, &gpio_default_config.PFData);
166#endif
167#if STM32_HAS_GPIOG
168 gpio_init(GPIOG, &gpio_default_config.PGData);
169#endif
170#if STM32_HAS_GPIOH
171 gpio_init(GPIOH, &gpio_default_config.PHData);
172#endif
173#if STM32_HAS_GPIOI
174 gpio_init(GPIOI, &gpio_default_config.PIData);
175#endif
176#if STM32_HAS_GPIOJ
177 gpio_init(GPIOJ, &gpio_default_config.PJData);
178#endif
179#if STM32_HAS_GPIOK
180 gpio_init(GPIOK, &gpio_default_config.PKData);
181#endif
182}
55 183
56void enter_bootloader_mode_if_requested(void); 184void enter_bootloader_mode_if_requested(void);
57 185
@@ -62,6 +190,8 @@ void enter_bootloader_mode_if_requested(void);
62 */ 190 */
63void __early_init(void) { 191void __early_init(void) {
64 enter_bootloader_mode_if_requested(); 192 enter_bootloader_mode_if_requested();
193
194 stm32_gpio_init();
65 stm32_clock_init(); 195 stm32_clock_init();
66} 196}
67 197
diff --git a/drivers/ugfx/gdisp/is31fl3731c/gdisp_lld_config.h b/drivers/ugfx/gdisp/is31fl3731c/gdisp_lld_config.h
index 1b9fadba1..403c6b040 100644
--- a/drivers/ugfx/gdisp/is31fl3731c/gdisp_lld_config.h
+++ b/drivers/ugfx/gdisp/is31fl3731c/gdisp_lld_config.h
@@ -24,10 +24,10 @@ along with this program. If not, see <http://www.gnu.org/licenses/>.
24/* Driver hardware support. */ 24/* Driver hardware support. */
25/*===========================================================================*/ 25/*===========================================================================*/
26 26
27# define GDISP_HARDWARE_FLUSH TRUE // This controller requires flushing 27# define GDISP_HARDWARE_FLUSH GFXON // This controller requires flushing
28# define GDISP_HARDWARE_DRAWPIXEL TRUE 28# define GDISP_HARDWARE_DRAWPIXEL GFXON
29# define GDISP_HARDWARE_PIXELREAD TRUE 29# define GDISP_HARDWARE_PIXELREAD GFXON
30# define GDISP_HARDWARE_CONTROL TRUE 30# define GDISP_HARDWARE_CONTROL GFXON
31 31
32# define GDISP_LLD_PIXELFORMAT GDISP_PIXELFORMAT_GRAY256 32# define GDISP_LLD_PIXELFORMAT GDISP_PIXELFORMAT_GRAY256
33 33
diff --git a/drivers/ugfx/gdisp/st7565/gdisp_lld_config.h b/drivers/ugfx/gdisp/st7565/gdisp_lld_config.h
index 9ab5daac1..6052058ec 100644
--- a/drivers/ugfx/gdisp/st7565/gdisp_lld_config.h
+++ b/drivers/ugfx/gdisp/st7565/gdisp_lld_config.h
@@ -14,11 +14,11 @@
14/* Driver hardware support. */ 14/* Driver hardware support. */
15/*===========================================================================*/ 15/*===========================================================================*/
16 16
17# define GDISP_HARDWARE_FLUSH TRUE // This controller requires flushing 17# define GDISP_HARDWARE_FLUSH GFXON // This controller requires flushing
18# define GDISP_HARDWARE_DRAWPIXEL TRUE 18# define GDISP_HARDWARE_DRAWPIXEL GFXON
19# define GDISP_HARDWARE_PIXELREAD TRUE 19# define GDISP_HARDWARE_PIXELREAD GFXON
20# define GDISP_HARDWARE_CONTROL TRUE 20# define GDISP_HARDWARE_CONTROL GFXON
21# define GDISP_HARDWARE_BITFILLS TRUE 21# define GDISP_HARDWARE_BITFILLS GFXON
22 22
23# define GDISP_LLD_PIXELFORMAT GDISP_PIXELFORMAT_MONO 23# define GDISP_LLD_PIXELFORMAT GDISP_PIXELFORMAT_MONO
24 24
generated by cgit v1.2.3 (git 2.25.1) at 2025-11-28 03:14:35 +0000