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| author | Joel Challis <git@zvecr.com> | 2019-10-12 23:23:36 +0100 |
|---|---|---|
| committer | GitHub <noreply@github.com> | 2019-10-12 23:23:36 +0100 |
| commit | a48468590ab83e808191c0e20c236d7eb6c13f0d (patch) | |
| tree | 8c620e8343384484e37fca03f98093f9d8664978 /drivers | |
| parent | 23178d73fc94d28c10029171f205d4815e516270 (diff) | |
| download | qmk_firmware-a48468590ab83e808191c0e20c236d7eb6c13f0d.tar.gz qmk_firmware-a48468590ab83e808191c0e20c236d7eb6c13f0d.zip | |
Remove i2c logic for STM32F103xB in favour of USE_I2CV1 (#6926)
* Remove i2c logic for STM32F103xB in favour of USE_I2CV1
* Remove i2c logic for STM32F103xB in favour of USE_I2CV1
Diffstat (limited to 'drivers')
| -rw-r--r-- | drivers/arm/i2c_master.c | 14 |
1 files changed, 2 insertions, 12 deletions
diff --git a/drivers/arm/i2c_master.c b/drivers/arm/i2c_master.c index fcfe85b56..2a43ba239 100644 --- a/drivers/arm/i2c_master.c +++ b/drivers/arm/i2c_master.c | |||
| @@ -32,27 +32,17 @@ | |||
| 32 | 32 | ||
| 33 | static uint8_t i2c_address; | 33 | static uint8_t i2c_address; |
| 34 | 34 | ||
| 35 | // ChibiOS uses two initialization structure for v1 and v2/v3 i2c APIs. | ||
| 36 | // The F1 series uses the v1 api, which have to initialized this way. | ||
| 37 | #ifdef STM32F103xB | ||
| 38 | static const I2CConfig i2cconfig = { | ||
| 39 | OPMODE_I2C, | ||
| 40 | 400000, | ||
| 41 | FAST_DUTY_CYCLE_2, | ||
| 42 | }; | ||
| 43 | #else | ||
| 44 | // This configures the I2C clock to 400khz assuming a 72Mhz clock | ||
| 45 | // For more info : https://www.st.com/en/embedded-software/stsw-stm32126.html | ||
| 46 | static const I2CConfig i2cconfig = { | 35 | static const I2CConfig i2cconfig = { |
| 47 | #ifdef USE_I2CV1 | 36 | #ifdef USE_I2CV1 |
| 48 | I2C1_OPMODE, | 37 | I2C1_OPMODE, |
| 49 | I2C1_CLOCK_SPEED, | 38 | I2C1_CLOCK_SPEED, |
| 50 | I2C1_DUTY_CYCLE, | 39 | I2C1_DUTY_CYCLE, |
| 51 | #else | 40 | #else |
| 41 | // This configures the I2C clock to 400khz assuming a 72Mhz clock | ||
| 42 | // For more info : https://www.st.com/en/embedded-software/stsw-stm32126.html | ||
| 52 | STM32_TIMINGR_PRESC(I2C1_TIMINGR_PRESC) | STM32_TIMINGR_SCLDEL(I2C1_TIMINGR_SCLDEL) | STM32_TIMINGR_SDADEL(I2C1_TIMINGR_SDADEL) | STM32_TIMINGR_SCLH(I2C1_TIMINGR_SCLH) | STM32_TIMINGR_SCLL(I2C1_TIMINGR_SCLL), 0, 0 | 43 | STM32_TIMINGR_PRESC(I2C1_TIMINGR_PRESC) | STM32_TIMINGR_SCLDEL(I2C1_TIMINGR_SCLDEL) | STM32_TIMINGR_SDADEL(I2C1_TIMINGR_SDADEL) | STM32_TIMINGR_SCLH(I2C1_TIMINGR_SCLH) | STM32_TIMINGR_SCLL(I2C1_TIMINGR_SCLL), 0, 0 |
| 53 | #endif | 44 | #endif |
| 54 | }; | 45 | }; |
| 55 | #endif | ||
| 56 | 46 | ||
| 57 | static i2c_status_t chibios_to_qmk(const msg_t* status) { | 47 | static i2c_status_t chibios_to_qmk(const msg_t* status) { |
| 58 | switch (*status) { | 48 | switch (*status) { |
