aboutsummaryrefslogtreecommitdiff
path: root/keyboards/nk65
diff options
context:
space:
mode:
authoryiancar <yiangosyiangou@cytanet.com.cy>2019-05-16 05:09:36 +0100
committerMechMerlin <30334081+mechmerlin@users.noreply.github.com>2019-05-15 21:09:36 -0700
commitacd3e79add2d47ab664b831936e5b6e71d3b8e15 (patch)
tree7fede0ba898a56246cbd02d72378d84c03974f8d /keyboards/nk65
parent8680c50d07604836b0fc7c3f97bd77c7830ea083 (diff)
downloadqmk_firmware-acd3e79add2d47ab664b831936e5b6e71d3b8e15.tar.gz
qmk_firmware-acd3e79add2d47ab664b831936e5b6e71d3b8e15.zip
NK65 Addition (#5865)
* Nk65 initial commit * Minor fix for compatibility * Make everything pretty * Update keyboards/nk65/config.h Co-Authored-By: noroadsleft <18669334+noroadsleft@users.noreply.github.com> * Update keyboards/nk65/readme.md Co-Authored-By: noroadsleft <18669334+noroadsleft@users.noreply.github.com> * Chmod Dummy * Update getting_started_introduction.md * Revert "Update getting_started_introduction.md" This reverts commit daf446acf7ae4ae00488b389ce04f2cfca708d44.
Diffstat (limited to 'keyboards/nk65')
-rwxr-xr-xkeyboards/nk65/boards/GENERIC_STM32_F303XC/board.c126
-rwxr-xr-xkeyboards/nk65/boards/GENERIC_STM32_F303XC/board.h1187
-rwxr-xr-xkeyboards/nk65/boards/GENERIC_STM32_F303XC/board.mk5
-rwxr-xr-xkeyboards/nk65/bootloader_defs.h7
-rwxr-xr-xkeyboards/nk65/chconf.h520
-rwxr-xr-xkeyboards/nk65/config.h154
-rwxr-xr-xkeyboards/nk65/halconf.h388
-rwxr-xr-xkeyboards/nk65/info.json12
-rwxr-xr-xkeyboards/nk65/keymaps/default/keymap.c58
-rwxr-xr-xkeyboards/nk65/keymaps/default/readme.md6
-rwxr-xr-xkeyboards/nk65/keymaps/default_via/keymap.c58
-rwxr-xr-xkeyboards/nk65/keymaps/default_via/readme.md6
-rwxr-xr-xkeyboards/nk65/keymaps/default_via/rules.mk67
-rwxr-xr-xkeyboards/nk65/mcuconf.h257
-rwxr-xr-xkeyboards/nk65/nk65.c18
-rwxr-xr-xkeyboards/nk65/nk65.h38
-rwxr-xr-xkeyboards/nk65/readme.md37
-rwxr-xr-xkeyboards/nk65/rules.mk69
18 files changed, 3013 insertions, 0 deletions
diff --git a/keyboards/nk65/boards/GENERIC_STM32_F303XC/board.c b/keyboards/nk65/boards/GENERIC_STM32_F303XC/board.c
new file mode 100755
index 000000000..4331155df
--- /dev/null
+++ b/keyboards/nk65/boards/GENERIC_STM32_F303XC/board.c
@@ -0,0 +1,126 @@
1/*
2 ChibiOS - Copyright (C) 2006..2016 Giovanni Di Sirio
3
4 Licensed under the Apache License, Version 2.0 (the "License");
5 you may not use this file except in compliance with the License.
6 You may obtain a copy of the License at
7
8 http://www.apache.org/licenses/LICENSE-2.0
9
10 Unless required by applicable law or agreed to in writing, software
11 distributed under the License is distributed on an "AS IS" BASIS,
12 WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
13 See the License for the specific language governing permissions and
14 limitations under the License.
15*/
16
17#include "hal.h"
18
19#if HAL_USE_PAL || defined(__DOXYGEN__)
20/**
21 * @brief PAL setup.
22 * @details Digital I/O ports static configuration as defined in @p board.h.
23 * This variable is used by the HAL when initializing the PAL driver.
24 */
25const PALConfig pal_default_config = {
26#if STM32_HAS_GPIOA
27 {VAL_GPIOA_MODER, VAL_GPIOA_OTYPER, VAL_GPIOA_OSPEEDR, VAL_GPIOA_PUPDR,
28 VAL_GPIOA_ODR, VAL_GPIOA_AFRL, VAL_GPIOA_AFRH},
29#endif
30#if STM32_HAS_GPIOB
31 {VAL_GPIOB_MODER, VAL_GPIOB_OTYPER, VAL_GPIOB_OSPEEDR, VAL_GPIOB_PUPDR,
32 VAL_GPIOB_ODR, VAL_GPIOB_AFRL, VAL_GPIOB_AFRH},
33#endif
34#if STM32_HAS_GPIOC
35 {VAL_GPIOC_MODER, VAL_GPIOC_OTYPER, VAL_GPIOC_OSPEEDR, VAL_GPIOC_PUPDR,
36 VAL_GPIOC_ODR, VAL_GPIOC_AFRL, VAL_GPIOC_AFRH},
37#endif
38#if STM32_HAS_GPIOD
39 {VAL_GPIOD_MODER, VAL_GPIOD_OTYPER, VAL_GPIOD_OSPEEDR, VAL_GPIOD_PUPDR,
40 VAL_GPIOD_ODR, VAL_GPIOD_AFRL, VAL_GPIOD_AFRH},
41#endif
42#if STM32_HAS_GPIOE
43 {VAL_GPIOE_MODER, VAL_GPIOE_OTYPER, VAL_GPIOE_OSPEEDR, VAL_GPIOE_PUPDR,
44 VAL_GPIOE_ODR, VAL_GPIOE_AFRL, VAL_GPIOE_AFRH},
45#endif
46#if STM32_HAS_GPIOF
47 {VAL_GPIOF_MODER, VAL_GPIOF_OTYPER, VAL_GPIOF_OSPEEDR, VAL_GPIOF_PUPDR,
48 VAL_GPIOF_ODR, VAL_GPIOF_AFRL, VAL_GPIOF_AFRH},
49#endif
50#if STM32_HAS_GPIOG
51 {VAL_GPIOG_MODER, VAL_GPIOG_OTYPER, VAL_GPIOG_OSPEEDR, VAL_GPIOG_PUPDR,
52 VAL_GPIOG_ODR, VAL_GPIOG_AFRL, VAL_GPIOG_AFRH},
53#endif
54#if STM32_HAS_GPIOH
55 {VAL_GPIOH_MODER, VAL_GPIOH_OTYPER, VAL_GPIOH_OSPEEDR, VAL_GPIOH_PUPDR,
56 VAL_GPIOH_ODR, VAL_GPIOH_AFRL, VAL_GPIOH_AFRH},
57#endif
58#if STM32_HAS_GPIOI
59 {VAL_GPIOI_MODER, VAL_GPIOI_OTYPER, VAL_GPIOI_OSPEEDR, VAL_GPIOI_PUPDR,
60 VAL_GPIOI_ODR, VAL_GPIOI_AFRL, VAL_GPIOI_AFRH}
61#endif
62};
63#endif
64
65void enter_bootloader_mode_if_requested(void);
66
67/**
68 * @brief Early initialization code.
69 * @details This initialization must be performed just after stack setup
70 * and before any other initialization.
71 */
72void __early_init(void) {
73 enter_bootloader_mode_if_requested();
74 stm32_clock_init();
75}
76
77#if HAL_USE_SDC || defined(__DOXYGEN__)
78/**
79 * @brief SDC card detection.
80 */
81bool sdc_lld_is_card_inserted(SDCDriver *sdcp) {
82
83 (void)sdcp;
84 /* TODO: Fill the implementation.*/
85 return true;
86}
87
88/**
89 * @brief SDC card write protection detection.
90 */
91bool sdc_lld_is_write_protected(SDCDriver *sdcp) {
92
93 (void)sdcp;
94 /* TODO: Fill the implementation.*/
95 return false;
96}
97#endif /* HAL_USE_SDC */
98
99#if HAL_USE_MMC_SPI || defined(__DOXYGEN__)
100/**
101 * @brief MMC_SPI card detection.
102 */
103bool mmc_lld_is_card_inserted(MMCDriver *mmcp) {
104
105 (void)mmcp;
106 /* TODO: Fill the implementation.*/
107 return true;
108}
109
110/**
111 * @brief MMC_SPI card write protection detection.
112 */
113bool mmc_lld_is_write_protected(MMCDriver *mmcp) {
114
115 (void)mmcp;
116 /* TODO: Fill the implementation.*/
117 return false;
118}
119#endif
120
121/**
122 * @brief Board-specific initialization code.
123 * @todo Add your board-specific code, if any.
124 */
125void boardInit(void) {
126}
diff --git a/keyboards/nk65/boards/GENERIC_STM32_F303XC/board.h b/keyboards/nk65/boards/GENERIC_STM32_F303XC/board.h
new file mode 100755
index 000000000..54df72ea6
--- /dev/null
+++ b/keyboards/nk65/boards/GENERIC_STM32_F303XC/board.h
@@ -0,0 +1,1187 @@
1/*
2 ChibiOS - Copyright (C) 2006..2016 Giovanni Di Sirio
3
4 Licensed under the Apache License, Version 2.0 (the "License");
5 you may not use this file except in compliance with the License.
6 You may obtain a copy of the License at
7
8 http://www.apache.org/licenses/LICENSE-2.0
9
10 Unless required by applicable law or agreed to in writing, software
11 distributed under the License is distributed on an "AS IS" BASIS,
12 WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
13 See the License for the specific language governing permissions and
14 limitations under the License.
15*/
16
17#ifndef _BOARD_H_
18#define _BOARD_H_
19
20/*
21 * Setup for NK65 Keyboard
22 */
23
24/*
25 * Board identifier.
26 */
27#define BOARD_GENERIC_STM32_F303XC
28#define BOARD_NAME "NK65 PCB"
29
30/*
31 * Board oscillators-related settings.
32 * NOTE: LSE not fitted.
33 */
34#if !defined(STM32_LSECLK)
35#define STM32_LSECLK 0U
36#endif
37
38#define STM32_LSEDRV (3U << 3U)
39
40#if !defined(STM32_HSECLK)
41#define STM32_HSECLK 8000000U
42#endif
43
44// #define STM32_HSE_BYPASS
45
46/*
47 * MCU type as defined in the ST header.
48 */
49#define STM32F303xC
50
51/*
52 * IO pins assignments.
53 */
54#define GPIOA_PIN0 0U
55#define GPIOA_PIN1 1U
56#define GPIOA_PIN2 2U
57#define GPIOA_PIN3 3U
58#define GPIOA_PIN4 4U
59#define GPIOA_PIN5 5U
60#define GPIOA_PIN6 6U
61#define GPIOA_PIN7 7U
62#define GPIOA_PIN8 8U
63#define GPIOA_PIN9 9U
64#define GPIOA_PIN10 10U
65#define GPIOA_USB_DM 11U
66#define GPIOA_USB_DP 12U
67#define GPIOA_SWDIO 13U
68#define GPIOA_SWCLK 14U
69#define GPIOA_PIN15 15U
70
71#define GPIOB_PIN0 0U
72#define GPIOB_PIN1 1U
73#define GPIOB_PIN2 2U
74#define GPIOB_PIN3 3U
75#define GPIOB_PIN4 4U
76#define GPIOB_PIN5 5U
77#define GPIOB_PIN6 6U
78#define GPIOB_PIN7 7U
79#define GPIOB_PIN8 8U
80#define GPIOB_PIN9 9U
81#define GPIOB_PIN10 10U
82#define GPIOB_PIN11 11U
83#define GPIOB_PIN12 12U
84#define GPIOB_PIN13 13U
85#define GPIOB_PIN14 14U
86#define GPIOB_PIN15 15U
87
88#define GPIOC_PIN0 0U
89#define GPIOC_PIN1 1U
90#define GPIOC_PIN2 2U
91#define GPIOC_PIN3 3U
92#define GPIOC_PIN4 4U
93#define GPIOC_PIN5 5U
94#define GPIOC_PIN6 6U
95#define GPIOC_PIN7 7U
96#define GPIOC_PIN8 8U
97#define GPIOC_PIN9 9U
98#define GPIOC_PIN10 10U
99#define GPIOC_PIN11 11U
100#define GPIOC_PIN12 12U
101#define GPIOC_PIN13 13U
102#define GPIOC_PIN14 14U
103#define GPIOC_PIN15 15U
104
105#define GPIOD_PIN0 0U
106#define GPIOD_PIN1 1U
107#define GPIOD_PIN2 2U
108#define GPIOD_PIN3 3U
109#define GPIOD_PIN4 4U
110#define GPIOD_PIN5 5U
111#define GPIOD_PIN6 6U
112#define GPIOD_PIN7 7U
113#define GPIOD_PIN8 8U
114#define GPIOD_PIN9 9U
115#define GPIOD_PIN10 10U
116#define GPIOD_PIN11 11U
117#define GPIOD_PIN12 12U
118#define GPIOD_PIN13 13U
119#define GPIOD_PIN14 14U
120#define GPIOD_PIN15 15U
121
122#define GPIOE_PIN0 0U
123#define GPIOE_PIN1 1U
124#define GPIOE_PIN2 2U
125#define GPIOE_PIN3 3U
126#define GPIOE_PIN4 4U
127#define GPIOE_PIN5 5U
128#define GPIOE_PIN6 6U
129#define GPIOE_PIN7 7U
130#define GPIOE_PIN8 8U
131#define GPIOE_PIN9 9U
132#define GPIOE_PIN10 10U
133#define GPIOE_PIN11 11U
134#define GPIOE_PIN12 12U
135#define GPIOE_PIN13 13U
136#define GPIOE_PIN14 14U
137#define GPIOE_PIN15 15U
138
139#define GPIOF_I2C2_SDA 0U
140#define GPIOF_I2C2_SCL 1U
141#define GPIOF_PIN2 2U
142#define GPIOF_PIN3 3U
143#define GPIOF_PIN4 4U
144#define GPIOF_PIN5 5U
145#define GPIOF_PIN6 6U
146#define GPIOF_PIN7 7U
147#define GPIOF_PIN8 8U
148#define GPIOF_PIN9 9U
149#define GPIOF_PIN10 10U
150#define GPIOF_PIN11 11U
151#define GPIOF_PIN12 12U
152#define GPIOF_PIN13 13U
153#define GPIOF_PIN14 14U
154#define GPIOF_PIN15 15U
155
156#define GPIOG_PIN0 0U
157#define GPIOG_PIN1 1U
158#define GPIOG_PIN2 2U
159#define GPIOG_PIN3 3U
160#define GPIOG_PIN4 4U
161#define GPIOG_PIN5 5U
162#define GPIOG_PIN6 6U
163#define GPIOG_PIN7 7U
164#define GPIOG_PIN8 8U
165#define GPIOG_PIN9 9U
166#define GPIOG_PIN10 10U
167#define GPIOG_PIN11 11U
168#define GPIOG_PIN12 12U
169#define GPIOG_PIN13 13U
170#define GPIOG_PIN14 14U
171#define GPIOG_PIN15 15U
172
173#define GPIOH_PIN0 0U
174#define GPIOH_PIN1 1U
175#define GPIOH_PIN2 2U
176#define GPIOH_PIN3 3U
177#define GPIOH_PIN4 4U
178#define GPIOH_PIN5 5U
179#define GPIOH_PIN6 6U
180#define GPIOH_PIN7 7U
181#define GPIOH_PIN8 8U
182#define GPIOH_PIN9 9U
183#define GPIOH_PIN10 10U
184#define GPIOH_PIN11 11U
185#define GPIOH_PIN12 12U
186#define GPIOH_PIN13 13U
187#define GPIOH_PIN14 14U
188#define GPIOH_PIN15 15U
189
190/*
191 * IO lines assignments.
192 */
193#define LINE_L3GD20_SDI PAL_LINE(GPIOA, 7U)
194#define LINE_USB_DM PAL_LINE(GPIOA, 11U)
195#define LINE_USB_DP PAL_LINE(GPIOA, 12U)
196#define LINE_SWDIO PAL_LINE(GPIOA, 13U)
197#define LINE_SWCLK PAL_LINE(GPIOA, 14U)
198
199#define LINE_PIN6 PAL_LINE(GPIOF, 0U)
200#define LINE_PIN7 PAL_LINE(GPIOF, 1U)
201
202#define LINE_CAPS_LOCK PAL_LINE(GPIOB, 7U)
203
204
205/*
206 * I/O ports initial setup, this configuration is established soon after reset
207 * in the initialization code.
208 * Please refer to the STM32 Reference Manual for details.
209 */
210#define PIN_MODE_INPUT(n) (0U << ((n) * 2U))
211#define PIN_MODE_OUTPUT(n) (1U << ((n) * 2U))
212#define PIN_MODE_ALTERNATE(n) (2U << ((n) * 2U))
213#define PIN_MODE_ANALOG(n) (3U << ((n) * 2U))
214#define PIN_ODR_LOW(n) (0U << (n))
215#define PIN_ODR_HIGH(n) (1U << (n))
216#define PIN_OTYPE_PUSHPULL(n) (0U << (n))
217#define PIN_OTYPE_OPENDRAIN(n) (1U << (n))
218#define PIN_OSPEED_VERYLOW(n) (0U << ((n) * 2U))
219#define PIN_OSPEED_LOW(n) (1U << ((n) * 2U))
220#define PIN_OSPEED_MEDIUM(n) (2U << ((n) * 2U))
221#define PIN_OSPEED_HIGH(n) (3U << ((n) * 2U))
222#define PIN_PUPDR_FLOATING(n) (0U << ((n) * 2U))
223#define PIN_PUPDR_PULLUP(n) (1U << ((n) * 2U))
224#define PIN_PUPDR_PULLDOWN(n) (2U << ((n) * 2U))
225#define PIN_AFIO_AF(n, v) ((v) << (((n) % 8U) * 4U))
226
227/*
228 * GPIOA setup:
229 *
230 * PA0 - NC
231 * PA1 - NC
232 * PA2 - COL1
233 * PA3 - COL2
234 * PA4 - SPEAKER1
235 * PA5 - SPEAKER2
236 * PA6 - COL3
237 * PA7 - COL8
238 * PA8 - COL6
239 * PA9 - COL7
240 * PA10 - ROW5
241 * PA11 - USB_DM (alternate 14).
242 * PA12 - USB_DP (alternate 14).
243 * PA13 - SWDIO (alternate 0).
244 * PA14 - SWCLK (alternate 0).
245 * PA15 - ROW4
246 */
247#define VAL_GPIOA_MODER (PIN_MODE_INPUT(GPIOA_PIN0) | \
248 PIN_MODE_ALTERNATE(GPIOA_PIN1) | \
249 PIN_MODE_INPUT(GPIOA_PIN2) | \
250 PIN_MODE_INPUT(GPIOA_PIN3) | \
251 PIN_MODE_INPUT(GPIOA_PIN4) | \
252 PIN_MODE_INPUT(GPIOA_PIN5) | \
253 PIN_MODE_INPUT(GPIOA_PIN6) | \
254 PIN_MODE_INPUT(GPIOA_PIN7) | \
255 PIN_MODE_INPUT(GPIOA_PIN8) | \
256 PIN_MODE_INPUT(GPIOA_PIN9) | \
257 PIN_MODE_INPUT(GPIOA_PIN10) | \
258 PIN_MODE_ALTERNATE(GPIOA_USB_DM) | \
259 PIN_MODE_ALTERNATE(GPIOA_USB_DP) | \
260 PIN_MODE_ALTERNATE(GPIOA_SWDIO) | \
261 PIN_MODE_ALTERNATE(GPIOA_SWCLK) | \
262 PIN_MODE_INPUT(GPIOA_PIN15))
263#define VAL_GPIOA_OTYPER (PIN_OTYPE_PUSHPULL(GPIOA_PIN0) | \
264 PIN_OTYPE_PUSHPULL(GPIOA_PIN1) | \
265 PIN_OTYPE_PUSHPULL(GPIOA_PIN2) | \
266 PIN_OTYPE_PUSHPULL(GPIOA_PIN3) | \
267 PIN_OTYPE_PUSHPULL(GPIOA_PIN4) | \
268 PIN_OTYPE_PUSHPULL(GPIOA_PIN5) | \
269 PIN_OTYPE_PUSHPULL(GPIOA_PIN6) | \
270 PIN_OTYPE_PUSHPULL(GPIOA_PIN7) | \
271 PIN_OTYPE_PUSHPULL(GPIOA_PIN8) | \
272 PIN_OTYPE_PUSHPULL(GPIOA_PIN9) | \
273 PIN_OTYPE_PUSHPULL(GPIOA_PIN10) | \
274 PIN_OTYPE_PUSHPULL(GPIOA_USB_DM) | \
275 PIN_OTYPE_PUSHPULL(GPIOA_USB_DP) | \
276 PIN_OTYPE_PUSHPULL(GPIOA_SWDIO) | \
277 PIN_OTYPE_PUSHPULL(GPIOA_SWCLK) | \
278 PIN_OTYPE_PUSHPULL(GPIOA_PIN15))
279#define VAL_GPIOA_OSPEEDR (PIN_OSPEED_VERYLOW(GPIOA_PIN0) | \
280 PIN_OSPEED_HIGH(GPIOA_PIN1) | \
281 PIN_OSPEED_VERYLOW(GPIOA_PIN2) | \
282 PIN_OSPEED_VERYLOW(GPIOA_PIN3) | \
283 PIN_OSPEED_VERYLOW(GPIOA_PIN4) | \
284 PIN_OSPEED_VERYLOW(GPIOA_PIN5) | \
285 PIN_OSPEED_VERYLOW(GPIOA_PIN6) | \
286 PIN_OSPEED_VERYLOW(GPIOA_PIN7) | \
287 PIN_OSPEED_VERYLOW(GPIOA_PIN8) | \
288 PIN_OSPEED_VERYLOW(GPIOA_PIN9) | \
289 PIN_OSPEED_VERYLOW(GPIOA_PIN10) | \
290 PIN_OSPEED_HIGH(GPIOA_USB_DM) | \
291 PIN_OSPEED_VERYLOW(GPIOA_USB_DP) | \
292 PIN_OSPEED_HIGH(GPIOA_SWDIO) | \
293 PIN_OSPEED_HIGH(GPIOA_SWCLK) | \
294 PIN_OSPEED_VERYLOW(GPIOA_PIN15))
295#define VAL_GPIOA_PUPDR (PIN_PUPDR_FLOATING(GPIOA_PIN0) | \
296 PIN_PUPDR_FLOATING(GPIOA_PIN1) | \
297 PIN_PUPDR_PULLUP(GPIOA_PIN2) | \
298 PIN_PUPDR_PULLUP(GPIOA_PIN3) | \
299 PIN_PUPDR_PULLUP(GPIOA_PIN4) | \
300 PIN_PUPDR_PULLUP(GPIOA_PIN5) | \
301 PIN_PUPDR_PULLUP(GPIOA_PIN6) | \
302 PIN_PUPDR_FLOATING(GPIOA_PIN7) | \
303 PIN_PUPDR_PULLUP(GPIOA_PIN8) | \
304 PIN_PUPDR_PULLUP(GPIOA_PIN9) | \
305 PIN_PUPDR_PULLUP(GPIOA_PIN10) | \
306 PIN_PUPDR_FLOATING(GPIOA_USB_DM) | \
307 PIN_PUPDR_FLOATING(GPIOA_USB_DP) | \
308 PIN_PUPDR_PULLUP(GPIOA_SWDIO) | \
309 PIN_PUPDR_PULLDOWN(GPIOA_SWCLK) | \
310 PIN_PUPDR_PULLUP(GPIOA_PIN15))
311#define VAL_GPIOA_ODR (PIN_ODR_HIGH(GPIOA_PIN0) | \
312 PIN_ODR_HIGH(GPIOA_PIN1) | \
313 PIN_ODR_HIGH(GPIOA_PIN2) | \
314 PIN_ODR_HIGH(GPIOA_PIN3) | \
315 PIN_ODR_HIGH(GPIOA_PIN4) | \
316 PIN_ODR_HIGH(GPIOA_PIN5) | \
317 PIN_ODR_HIGH(GPIOA_PIN6) | \
318 PIN_ODR_HIGH(GPIOA_PIN7) | \
319 PIN_ODR_HIGH(GPIOA_PIN8) | \
320 PIN_ODR_HIGH(GPIOA_PIN9) | \
321 PIN_ODR_HIGH(GPIOA_PIN10) | \
322 PIN_ODR_HIGH(GPIOA_USB_DM) | \
323 PIN_ODR_HIGH(GPIOA_USB_DP) | \
324 PIN_ODR_HIGH(GPIOA_SWDIO) | \
325 PIN_ODR_HIGH(GPIOA_SWCLK) | \
326 PIN_ODR_HIGH(GPIOA_PIN15))
327#define VAL_GPIOA_AFRL (PIN_AFIO_AF(GPIOA_PIN0, 0) | \
328 PIN_AFIO_AF(GPIOA_PIN1, 1) | \
329 PIN_AFIO_AF(GPIOA_PIN2, 0) | \
330 PIN_AFIO_AF(GPIOA_PIN3, 0) | \
331 PIN_AFIO_AF(GPIOA_PIN4, 0) | \
332 PIN_AFIO_AF(GPIOA_PIN5, 5) | \
333 PIN_AFIO_AF(GPIOA_PIN6, 5) | \
334 PIN_AFIO_AF(GPIOA_PIN7, 5))
335#define VAL_GPIOA_AFRH (PIN_AFIO_AF(GPIOA_PIN8, 0) | \
336 PIN_AFIO_AF(GPIOA_PIN9, 0) | \
337 PIN_AFIO_AF(GPIOA_PIN10, 0) | \
338 PIN_AFIO_AF(GPIOA_USB_DM, 14) | \
339 PIN_AFIO_AF(GPIOA_USB_DP, 14) | \
340 PIN_AFIO_AF(GPIOA_SWDIO, 0) | \
341 PIN_AFIO_AF(GPIOA_SWCLK, 0) | \
342 PIN_AFIO_AF(GPIOA_PIN15, 0))
343
344/*
345 * GPIOB setup:
346 *
347 * PB0 - PIN0 (input pullup).
348 * PB1 - PIN1 (input pullup).
349 * PB2 - PIN2 (input pullup).
350 * PB3 - PIN3 (alternate 0).
351 * PB4 - PIN4 (input pullup).
352 * PB5 - PIN5 (input pullup).
353 * PB6 - PIN6 LSM303DLHC_SCL (alternate 4).
354 * PB7 - PIN7 LSM303DLHC_SDA (alternate 4).
355 * PB8 - PIN8 (input pullup).
356 * PB9 - PIN9 (input pullup).
357 * PB10 - PIN10 (input pullup).
358 * PB11 - PIN11 (input pullup).
359 * PB12 - PIN12 (input pullup).
360 * PB13 - PIN13 (input pullup).
361 * PB14 - PIN14 (input pullup).
362 * PB15 - PIN15 (input pullup).
363 */
364#define VAL_GPIOB_MODER (PIN_MODE_INPUT(GPIOB_PIN0) | \
365 PIN_MODE_INPUT(GPIOB_PIN1) | \
366 PIN_MODE_INPUT(GPIOB_PIN2) | \
367 PIN_MODE_ALTERNATE(GPIOB_PIN3) | \
368 PIN_MODE_INPUT(GPIOB_PIN4) | \
369 PIN_MODE_INPUT(GPIOB_PIN5) | \
370 PIN_MODE_ALTERNATE(GPIOB_PIN6) | \
371 PIN_MODE_OUTPUT(GPIOB_PIN7) | \
372 PIN_MODE_INPUT(GPIOB_PIN8) | \
373 PIN_MODE_INPUT(GPIOB_PIN9) | \
374 PIN_MODE_INPUT(GPIOB_PIN10) | \
375 PIN_MODE_INPUT(GPIOB_PIN11) | \
376 PIN_MODE_INPUT(GPIOB_PIN12) | \
377 PIN_MODE_INPUT(GPIOB_PIN13) | \
378 PIN_MODE_INPUT(GPIOB_PIN14) | \
379 PIN_MODE_INPUT(GPIOB_PIN15))
380#define VAL_GPIOB_OTYPER (PIN_OTYPE_PUSHPULL(GPIOB_PIN0) | \
381 PIN_OTYPE_PUSHPULL(GPIOB_PIN1) | \
382 PIN_OTYPE_PUSHPULL(GPIOB_PIN2) | \
383 PIN_OTYPE_PUSHPULL(GPIOB_PIN3) | \
384 PIN_OTYPE_PUSHPULL(GPIOB_PIN4) | \
385 PIN_OTYPE_PUSHPULL(GPIOB_PIN5) | \
386 PIN_OTYPE_OPENDRAIN(GPIOB_PIN6) | \
387 PIN_OTYPE_PUSHPULL(GPIOB_PIN7) | \
388 PIN_OTYPE_PUSHPULL(GPIOB_PIN8) | \
389 PIN_OTYPE_PUSHPULL(GPIOB_PIN9) | \
390 PIN_OTYPE_PUSHPULL(GPIOB_PIN10) | \
391 PIN_OTYPE_PUSHPULL(GPIOB_PIN11) | \
392 PIN_OTYPE_PUSHPULL(GPIOB_PIN12) | \
393 PIN_OTYPE_PUSHPULL(GPIOB_PIN13) | \
394 PIN_OTYPE_PUSHPULL(GPIOB_PIN14) | \
395 PIN_OTYPE_PUSHPULL(GPIOB_PIN15))
396#define VAL_GPIOB_OSPEEDR (PIN_OSPEED_VERYLOW(GPIOB_PIN0) | \
397 PIN_OSPEED_VERYLOW(GPIOB_PIN1) | \
398 PIN_OSPEED_VERYLOW(GPIOB_PIN2) | \
399 PIN_OSPEED_HIGH(GPIOB_PIN3) | \
400 PIN_OSPEED_VERYLOW(GPIOB_PIN4) | \
401 PIN_OSPEED_VERYLOW(GPIOB_PIN5) | \
402 PIN_OSPEED_HIGH(GPIOB_PIN6) | \
403 PIN_OSPEED_VERYLOW(GPIOB_PIN7) | \
404 PIN_OSPEED_VERYLOW(GPIOB_PIN8) | \
405 PIN_OSPEED_VERYLOW(GPIOB_PIN9) | \
406 PIN_OSPEED_VERYLOW(GPIOB_PIN10) | \
407 PIN_OSPEED_VERYLOW(GPIOB_PIN11) | \
408 PIN_OSPEED_VERYLOW(GPIOB_PIN12) | \
409 PIN_OSPEED_VERYLOW(GPIOB_PIN13) | \
410 PIN_OSPEED_VERYLOW(GPIOB_PIN14) | \
411 PIN_OSPEED_VERYLOW(GPIOB_PIN15))
412#define VAL_GPIOB_PUPDR (PIN_PUPDR_PULLUP(GPIOB_PIN0) | \
413 PIN_PUPDR_PULLUP(GPIOB_PIN1) | \
414 PIN_PUPDR_PULLUP(GPIOB_PIN2) | \
415 PIN_PUPDR_FLOATING(GPIOB_PIN3) | \
416 PIN_PUPDR_PULLUP(GPIOB_PIN4) | \
417 PIN_PUPDR_PULLUP(GPIOB_PIN5) | \
418 PIN_PUPDR_FLOATING(GPIOB_PIN6) | \
419 PIN_PUPDR_PULLDOWN(GPIOB_PIN7) | \
420 PIN_PUPDR_PULLUP(GPIOB_PIN8) | \
421 PIN_PUPDR_PULLUP(GPIOB_PIN9) | \
422 PIN_PUPDR_PULLUP(GPIOB_PIN10) | \
423 PIN_PUPDR_PULLUP(GPIOB_PIN11) | \
424 PIN_PUPDR_PULLUP(GPIOB_PIN12) | \
425 PIN_PUPDR_PULLUP(GPIOB_PIN13) | \
426 PIN_PUPDR_PULLUP(GPIOB_PIN14) | \
427 PIN_PUPDR_PULLUP(GPIOB_PIN15))
428#define VAL_GPIOB_ODR (PIN_ODR_HIGH(GPIOB_PIN0) | \
429 PIN_ODR_HIGH(GPIOB_PIN1) | \
430 PIN_ODR_HIGH(GPIOB_PIN2) | \
431 PIN_ODR_HIGH(GPIOB_PIN3) | \
432 PIN_ODR_HIGH(GPIOB_PIN4) | \
433 PIN_ODR_HIGH(GPIOB_PIN5) | \
434 PIN_ODR_HIGH(GPIOB_PIN6) | \
435 PIN_ODR_LOW(GPIOB_PIN7) | \
436 PIN_ODR_HIGH(GPIOB_PIN8) | \
437 PIN_ODR_HIGH(GPIOB_PIN9) | \
438 PIN_ODR_HIGH(GPIOB_PIN10) | \
439 PIN_ODR_HIGH(GPIOB_PIN11) | \
440 PIN_ODR_HIGH(GPIOB_PIN12) | \
441 PIN_ODR_HIGH(GPIOB_PIN13) | \
442 PIN_ODR_HIGH(GPIOB_PIN14) | \
443 PIN_ODR_HIGH(GPIOB_PIN15))
444#define VAL_GPIOB_AFRL (PIN_AFIO_AF(GPIOB_PIN0, 0) | \
445 PIN_AFIO_AF(GPIOB_PIN1, 0) | \
446 PIN_AFIO_AF(GPIOB_PIN2, 0) | \
447 PIN_AFIO_AF(GPIOB_PIN3, 0) | \
448 PIN_AFIO_AF(GPIOB_PIN4, 0) | \
449 PIN_AFIO_AF(GPIOB_PIN5, 0) | \
450 PIN_AFIO_AF(GPIOB_PIN6, 4) | \
451 PIN_AFIO_AF(GPIOB_PIN7, 0))
452#define VAL_GPIOB_AFRH (PIN_AFIO_AF(GPIOB_PIN8, 0) | \
453 PIN_AFIO_AF(GPIOB_PIN9, 0) | \
454 PIN_AFIO_AF(GPIOB_PIN10, 0) | \
455 PIN_AFIO_AF(GPIOB_PIN11, 0) | \
456 PIN_AFIO_AF(GPIOB_PIN12, 0) | \
457 PIN_AFIO_AF(GPIOB_PIN13, 0) | \
458 PIN_AFIO_AF(GPIOB_PIN14, 0) | \
459 PIN_AFIO_AF(GPIOB_PIN15, 0))
460
461/*
462 * GPIOC setup:
463 *
464 * PC0 - PIN0 (input pullup).
465 * PC1 - PIN1 (input pullup).
466 * PC2 - PIN2 (input pullup).
467 * PC3 - PIN3 (input pullup).
468 * PC4 - PIN4 (input pullup).
469 * PC5 - PIN5 (input pullup).
470 * PC6 - PIN6 (input pullup).
471 * PC7 - PIN7 (input pullup).
472 * PC8 - PIN8 (input pullup).
473 * PC9 - PIN9 (input pullup).
474 * PC10 - PIN10 (input pullup).
475 * PC11 - PIN11 (input pullup).
476 * PC12 - PIN12 (input pullup).
477 * PC13 - PIN13 (input pullup).
478 * PC14 - PIN14 (input floating).
479 * PC15 - PIN15 (input floating).
480 */
481#define VAL_GPIOC_MODER (PIN_MODE_INPUT(GPIOC_PIN0) | \
482 PIN_MODE_INPUT(GPIOC_PIN1) | \
483 PIN_MODE_INPUT(GPIOC_PIN2) | \
484 PIN_MODE_INPUT(GPIOC_PIN3) | \
485 PIN_MODE_INPUT(GPIOC_PIN4) | \
486 PIN_MODE_INPUT(GPIOC_PIN5) | \
487 PIN_MODE_INPUT(GPIOC_PIN6) | \
488 PIN_MODE_INPUT(GPIOC_PIN7) | \
489 PIN_MODE_INPUT(GPIOC_PIN8) | \
490 PIN_MODE_INPUT(GPIOC_PIN9) | \
491 PIN_MODE_INPUT(GPIOC_PIN10) | \
492 PIN_MODE_INPUT(GPIOC_PIN11) | \
493 PIN_MODE_INPUT(GPIOC_PIN12) | \
494 PIN_MODE_INPUT(GPIOC_PIN13) | \
495 PIN_MODE_INPUT(GPIOC_PIN14) | \
496 PIN_MODE_INPUT(GPIOC_PIN15))
497#define VAL_GPIOC_OTYPER (PIN_OTYPE_PUSHPULL(GPIOC_PIN0) | \
498 PIN_OTYPE_PUSHPULL(GPIOC_PIN1) | \
499 PIN_OTYPE_PUSHPULL(GPIOC_PIN2) | \
500 PIN_OTYPE_PUSHPULL(GPIOC_PIN3) | \
501 PIN_OTYPE_PUSHPULL(GPIOC_PIN4) | \
502 PIN_OTYPE_PUSHPULL(GPIOC_PIN5) | \
503 PIN_OTYPE_PUSHPULL(GPIOC_PIN6) | \
504 PIN_OTYPE_PUSHPULL(GPIOC_PIN7) | \
505 PIN_OTYPE_PUSHPULL(GPIOC_PIN8) | \
506 PIN_OTYPE_PUSHPULL(GPIOC_PIN9) | \
507 PIN_OTYPE_PUSHPULL(GPIOC_PIN10) | \
508 PIN_OTYPE_PUSHPULL(GPIOC_PIN11) | \
509 PIN_OTYPE_PUSHPULL(GPIOC_PIN12) | \
510 PIN_OTYPE_PUSHPULL(GPIOC_PIN13) | \
511 PIN_OTYPE_PUSHPULL(GPIOC_PIN14) | \
512 PIN_OTYPE_PUSHPULL(GPIOC_PIN15))
513#define VAL_GPIOC_OSPEEDR (PIN_OSPEED_VERYLOW(GPIOC_PIN0) | \
514 PIN_OSPEED_VERYLOW(GPIOC_PIN1) | \
515 PIN_OSPEED_VERYLOW(GPIOC_PIN2) | \
516 PIN_OSPEED_VERYLOW(GPIOC_PIN3) | \
517 PIN_OSPEED_VERYLOW(GPIOC_PIN4) | \
518 PIN_OSPEED_VERYLOW(GPIOC_PIN5) | \
519 PIN_OSPEED_VERYLOW(GPIOC_PIN6) | \
520 PIN_OSPEED_VERYLOW(GPIOC_PIN7) | \
521 PIN_OSPEED_VERYLOW(GPIOC_PIN8) | \
522 PIN_OSPEED_VERYLOW(GPIOC_PIN9) | \
523 PIN_OSPEED_VERYLOW(GPIOC_PIN10) | \
524 PIN_OSPEED_VERYLOW(GPIOC_PIN11) | \
525 PIN_OSPEED_VERYLOW(GPIOC_PIN12) | \
526 PIN_OSPEED_VERYLOW(GPIOC_PIN13) | \
527 PIN_OSPEED_HIGH(GPIOC_PIN14) | \
528 PIN_OSPEED_HIGH(GPIOC_PIN15))
529#define VAL_GPIOC_PUPDR (PIN_PUPDR_PULLUP(GPIOC_PIN0) | \
530 PIN_PUPDR_PULLUP(GPIOC_PIN1) | \
531 PIN_PUPDR_PULLUP(GPIOC_PIN2) | \
532 PIN_PUPDR_PULLUP(GPIOC_PIN3) | \
533 PIN_PUPDR_PULLUP(GPIOC_PIN4) | \
534 PIN_PUPDR_PULLUP(GPIOC_PIN5) | \
535 PIN_PUPDR_PULLUP(GPIOC_PIN6) | \
536 PIN_PUPDR_PULLUP(GPIOC_PIN7) | \
537 PIN_PUPDR_PULLUP(GPIOC_PIN8) | \
538 PIN_PUPDR_PULLUP(GPIOC_PIN9) | \
539 PIN_PUPDR_PULLUP(GPIOC_PIN10) | \
540 PIN_PUPDR_PULLUP(GPIOC_PIN11) | \
541 PIN_PUPDR_PULLUP(GPIOC_PIN12) | \
542 PIN_PUPDR_PULLUP(GPIOC_PIN13) | \
543 PIN_PUPDR_FLOATING(GPIOC_PIN14) | \
544 PIN_PUPDR_FLOATING(GPIOC_PIN15))
545#define VAL_GPIOC_ODR (PIN_ODR_HIGH(GPIOC_PIN0) | \
546 PIN_ODR_HIGH(GPIOC_PIN1) | \
547 PIN_ODR_HIGH(GPIOC_PIN2) | \
548 PIN_ODR_HIGH(GPIOC_PIN3) | \
549 PIN_ODR_HIGH(GPIOC_PIN4) | \
550 PIN_ODR_HIGH(GPIOC_PIN5) | \
551 PIN_ODR_HIGH(GPIOC_PIN6) | \
552 PIN_ODR_HIGH(GPIOC_PIN7) | \
553 PIN_ODR_HIGH(GPIOC_PIN8) | \
554 PIN_ODR_HIGH(GPIOC_PIN9) | \
555 PIN_ODR_HIGH(GPIOC_PIN10) | \
556 PIN_ODR_HIGH(GPIOC_PIN11) | \
557 PIN_ODR_HIGH(GPIOC_PIN12) | \
558 PIN_ODR_HIGH(GPIOC_PIN13) | \
559 PIN_ODR_HIGH(GPIOC_PIN14) | \
560 PIN_ODR_HIGH(GPIOC_PIN15))
561#define VAL_GPIOC_AFRL (PIN_AFIO_AF(GPIOC_PIN0, 0) | \
562 PIN_AFIO_AF(GPIOC_PIN1, 0) | \
563 PIN_AFIO_AF(GPIOC_PIN2, 0) | \
564 PIN_AFIO_AF(GPIOC_PIN3, 0) | \
565 PIN_AFIO_AF(GPIOC_PIN4, 0) | \
566 PIN_AFIO_AF(GPIOC_PIN5, 0) | \
567 PIN_AFIO_AF(GPIOC_PIN6, 0) | \
568 PIN_AFIO_AF(GPIOC_PIN7, 0))
569#define VAL_GPIOC_AFRH (PIN_AFIO_AF(GPIOC_PIN8, 0) | \
570 PIN_AFIO_AF(GPIOC_PIN9, 0) | \
571 PIN_AFIO_AF(GPIOC_PIN10, 0) | \
572 PIN_AFIO_AF(GPIOC_PIN11, 0) | \
573 PIN_AFIO_AF(GPIOC_PIN12, 0) | \
574 PIN_AFIO_AF(GPIOC_PIN13, 0) | \
575 PIN_AFIO_AF(GPIOC_PIN14, 0) | \
576 PIN_AFIO_AF(GPIOC_PIN15, 0))
577
578/*
579 * GPIOD setup:
580 *
581 * PD0 - PIN0 (input pullup).
582 * PD1 - PIN1 (input pullup).
583 * PD2 - PIN2 (input pullup).
584 * PD3 - PIN3 (input pullup).
585 * PD4 - PIN4 (input pullup).
586 * PD5 - PIN5 (input pullup).
587 * PD6 - PIN6 (input pullup).
588 * PD7 - PIN7 (input pullup).
589 * PD8 - PIN8 (input pullup).
590 * PD9 - PIN9 (input pullup).
591 * PD11 - PIN10 (input pullup).
592 * PD11 - PIN11 (input pullup).
593 * PD12 - PIN12 (input pullup).
594 * PD13 - PIN13 (input pullup).
595 * PD14 - PIN14 (input pullup).
596 * PD15 - PIN15 (input pullup).
597 */
598#define VAL_GPIOD_MODER (PIN_MODE_INPUT(GPIOD_PIN0) | \
599 PIN_MODE_INPUT(GPIOD_PIN1) | \
600 PIN_MODE_INPUT(GPIOD_PIN2) | \
601 PIN_MODE_INPUT(GPIOD_PIN3) | \
602 PIN_MODE_INPUT(GPIOD_PIN4) | \
603 PIN_MODE_INPUT(GPIOD_PIN5) | \
604 PIN_MODE_INPUT(GPIOD_PIN6) | \
605 PIN_MODE_INPUT(GPIOD_PIN7) | \
606 PIN_MODE_INPUT(GPIOD_PIN8) | \
607 PIN_MODE_INPUT(GPIOD_PIN9) | \
608 PIN_MODE_INPUT(GPIOD_PIN10) | \
609 PIN_MODE_INPUT(GPIOD_PIN11) | \
610 PIN_MODE_INPUT(GPIOD_PIN12) | \
611 PIN_MODE_INPUT(GPIOD_PIN13) | \
612 PIN_MODE_INPUT(GPIOD_PIN14) | \
613 PIN_MODE_INPUT(GPIOD_PIN15))
614#define VAL_GPIOD_OTYPER (PIN_OTYPE_PUSHPULL(GPIOD_PIN0) | \
615 PIN_OTYPE_PUSHPULL(GPIOD_PIN1) | \
616 PIN_OTYPE_PUSHPULL(GPIOD_PIN2) | \
617 PIN_OTYPE_PUSHPULL(GPIOD_PIN3) | \
618 PIN_OTYPE_PUSHPULL(GPIOD_PIN4) | \
619 PIN_OTYPE_PUSHPULL(GPIOD_PIN5) | \
620 PIN_OTYPE_PUSHPULL(GPIOD_PIN6) | \
621 PIN_OTYPE_PUSHPULL(GPIOD_PIN7) | \
622 PIN_OTYPE_PUSHPULL(GPIOD_PIN8) | \
623 PIN_OTYPE_PUSHPULL(GPIOD_PIN9) | \
624 PIN_OTYPE_PUSHPULL(GPIOD_PIN10) | \
625 PIN_OTYPE_PUSHPULL(GPIOD_PIN11) | \
626 PIN_OTYPE_PUSHPULL(GPIOD_PIN12) | \
627 PIN_OTYPE_PUSHPULL(GPIOD_PIN13) | \
628 PIN_OTYPE_PUSHPULL(GPIOD_PIN14) | \
629 PIN_OTYPE_PUSHPULL(GPIOD_PIN15))
630#define VAL_GPIOD_OSPEEDR (PIN_OSPEED_VERYLOW(GPIOD_PIN0) | \
631 PIN_OSPEED_VERYLOW(GPIOD_PIN1) | \
632 PIN_OSPEED_VERYLOW(GPIOD_PIN2) | \
633 PIN_OSPEED_VERYLOW(GPIOD_PIN3) | \
634 PIN_OSPEED_VERYLOW(GPIOD_PIN4) | \
635 PIN_OSPEED_VERYLOW(GPIOD_PIN5) | \
636 PIN_OSPEED_VERYLOW(GPIOD_PIN6) | \
637 PIN_OSPEED_VERYLOW(GPIOD_PIN7) | \
638 PIN_OSPEED_VERYLOW(GPIOD_PIN8) | \
639 PIN_OSPEED_VERYLOW(GPIOD_PIN9) | \
640 PIN_OSPEED_VERYLOW(GPIOD_PIN10) | \
641 PIN_OSPEED_VERYLOW(GPIOD_PIN11) | \
642 PIN_OSPEED_VERYLOW(GPIOD_PIN12) | \
643 PIN_OSPEED_VERYLOW(GPIOD_PIN13) | \
644 PIN_OSPEED_VERYLOW(GPIOD_PIN14) | \
645 PIN_OSPEED_VERYLOW(GPIOD_PIN15))
646#define VAL_GPIOD_PUPDR (PIN_PUPDR_PULLUP(GPIOD_PIN0) | \
647 PIN_PUPDR_PULLUP(GPIOD_PIN1) | \
648 PIN_PUPDR_PULLUP(GPIOD_PIN2) | \
649 PIN_PUPDR_PULLUP(GPIOD_PIN3) | \
650 PIN_PUPDR_PULLUP(GPIOD_PIN4) | \
651 PIN_PUPDR_PULLUP(GPIOD_PIN5) | \
652 PIN_PUPDR_PULLUP(GPIOD_PIN6) | \
653 PIN_PUPDR_PULLUP(GPIOD_PIN7) | \
654 PIN_PUPDR_PULLUP(GPIOD_PIN8) | \
655 PIN_PUPDR_PULLUP(GPIOD_PIN9) | \
656 PIN_PUPDR_PULLUP(GPIOD_PIN10) | \
657 PIN_PUPDR_PULLUP(GPIOD_PIN11) | \
658 PIN_PUPDR_PULLUP(GPIOD_PIN12) | \
659 PIN_PUPDR_PULLUP(GPIOD_PIN13) | \
660 PIN_PUPDR_PULLUP(GPIOD_PIN14) | \
661 PIN_PUPDR_PULLUP(GPIOD_PIN15))
662#define VAL_GPIOD_ODR (PIN_ODR_HIGH(GPIOD_PIN0) | \
663 PIN_ODR_HIGH(GPIOD_PIN1) | \
664 PIN_ODR_HIGH(GPIOD_PIN2) | \
665 PIN_ODR_HIGH(GPIOD_PIN3) | \
666 PIN_ODR_HIGH(GPIOD_PIN4) | \
667 PIN_ODR_HIGH(GPIOD_PIN5) | \
668 PIN_ODR_HIGH(GPIOD_PIN6) | \
669 PIN_ODR_HIGH(GPIOD_PIN7) | \
670 PIN_ODR_HIGH(GPIOD_PIN8) | \
671 PIN_ODR_HIGH(GPIOD_PIN9) | \
672 PIN_ODR_HIGH(GPIOD_PIN10) | \
673 PIN_ODR_HIGH(GPIOD_PIN11) | \
674 PIN_ODR_HIGH(GPIOD_PIN12) | \
675 PIN_ODR_HIGH(GPIOD_PIN13) | \
676 PIN_ODR_HIGH(GPIOD_PIN14) | \
677 PIN_ODR_HIGH(GPIOD_PIN15))
678#define VAL_GPIOD_AFRL (PIN_AFIO_AF(GPIOD_PIN0, 0) | \
679 PIN_AFIO_AF(GPIOD_PIN1, 0) | \
680 PIN_AFIO_AF(GPIOD_PIN2, 0) | \
681 PIN_AFIO_AF(GPIOD_PIN3, 0) | \
682 PIN_AFIO_AF(GPIOD_PIN4, 0) | \
683 PIN_AFIO_AF(GPIOD_PIN5, 0) | \
684 PIN_AFIO_AF(GPIOD_PIN6, 0) | \
685 PIN_AFIO_AF(GPIOD_PIN7, 0))
686#define VAL_GPIOD_AFRH (PIN_AFIO_AF(GPIOD_PIN8, 0) | \
687 PIN_AFIO_AF(GPIOD_PIN9, 0) | \
688 PIN_AFIO_AF(GPIOD_PIN10, 0) | \
689 PIN_AFIO_AF(GPIOD_PIN11, 0) | \
690 PIN_AFIO_AF(GPIOD_PIN12, 0) | \
691 PIN_AFIO_AF(GPIOD_PIN13, 0) | \
692 PIN_AFIO_AF(GPIOD_PIN14, 0) | \
693 PIN_AFIO_AF(GPIOD_PIN15, 0))
694
695/*
696 * GPIOE setup:
697 *
698 * PE0 - PIN0 (input pullup).
699 * PE1 - PIN1 (input pullup).
700 * PE2 - PIN2 (input pullup).
701 * PE3 - PIN3 L3GD20_CS (output pushpull maximum).
702 * PE4 - PIN4 (input pullup).
703 * PE5 - PIN5 (input pullup).
704 * PE6 - PIN6 (input pullup).
705 * PE7 - PIN7 (input pullup).
706 * PE8 - PIN8 (output pushpull maximum).
707 * PE9 - PIN9 (output pushpull maximum).
708 * PE10 - PIN10 (output pushpull maximum).
709 * PE11 - PIN11 (output pushpull maximum).
710 * PE12 - PIN12 (output pushpull maximum).
711 * PE13 - PIN13 (output pushpull maximum).
712 * PE14 - PIN14 (output pushpull maximum).
713 * PE15 - PIN15 (output pushpull maximum).
714 */
715#define VAL_GPIOE_MODER (PIN_MODE_INPUT(GPIOE_PIN0) | \
716 PIN_MODE_INPUT(GPIOE_PIN1) | \
717 PIN_MODE_INPUT(GPIOE_PIN2) |\
718 PIN_MODE_OUTPUT(GPIOE_PIN3) | \
719 PIN_MODE_INPUT(GPIOE_PIN4) |\
720 PIN_MODE_INPUT(GPIOE_PIN5) |\
721 PIN_MODE_INPUT(GPIOE_PIN6) | \
722 PIN_MODE_INPUT(GPIOE_PIN7) | \
723 PIN_MODE_OUTPUT(GPIOE_PIN8) | \
724 PIN_MODE_OUTPUT(GPIOE_PIN9) | \
725 PIN_MODE_OUTPUT(GPIOE_PIN10) | \
726 PIN_MODE_OUTPUT(GPIOE_PIN11) | \
727 PIN_MODE_OUTPUT(GPIOE_PIN12) | \
728 PIN_MODE_OUTPUT(GPIOE_PIN13) | \
729 PIN_MODE_OUTPUT(GPIOE_PIN14) | \
730 PIN_MODE_OUTPUT(GPIOE_PIN15))
731#define VAL_GPIOE_OTYPER (PIN_OTYPE_PUSHPULL(GPIOE_PIN0) |\
732 PIN_OTYPE_PUSHPULL(GPIOE_PIN1) |\
733 PIN_OTYPE_PUSHPULL(GPIOE_PIN2) |\
734 PIN_OTYPE_PUSHPULL(GPIOE_PIN3) | \
735 PIN_OTYPE_PUSHPULL(GPIOE_PIN4) |\
736 PIN_OTYPE_PUSHPULL(GPIOE_PIN5) |\
737 PIN_OTYPE_PUSHPULL(GPIOE_PIN6) | \
738 PIN_OTYPE_PUSHPULL(GPIOE_PIN7) | \
739 PIN_OTYPE_PUSHPULL(GPIOE_PIN8) | \
740 PIN_OTYPE_PUSHPULL(GPIOE_PIN9) | \
741 PIN_OTYPE_PUSHPULL(GPIOE_PIN10) |\
742 PIN_OTYPE_PUSHPULL(GPIOE_PIN11) | \
743 PIN_OTYPE_PUSHPULL(GPIOE_PIN12) | \
744 PIN_OTYPE_PUSHPULL(GPIOE_PIN13) | \
745 PIN_OTYPE_PUSHPULL(GPIOE_PIN14) |\
746 PIN_OTYPE_PUSHPULL(GPIOE_PIN15))
747#define VAL_GPIOE_OSPEEDR (PIN_OSPEED_VERYLOW(GPIOE_PIN0) |\
748 PIN_OSPEED_VERYLOW(GPIOE_PIN1) |\
749 PIN_OSPEED_VERYLOW(GPIOE_PIN2) |\
750 PIN_OSPEED_HIGH(GPIOE_PIN3) | \
751 PIN_OSPEED_VERYLOW(GPIOE_PIN4) |\
752 PIN_OSPEED_VERYLOW(GPIOE_PIN5) |\
753 PIN_OSPEED_VERYLOW(GPIOE_PIN6) | \
754 PIN_OSPEED_VERYLOW(GPIOE_PIN7) | \
755 PIN_OSPEED_HIGH(GPIOE_PIN8) | \
756 PIN_OSPEED_HIGH(GPIOE_PIN9) | \
757 PIN_OSPEED_HIGH(GPIOE_PIN10) | \
758 PIN_OSPEED_HIGH(GPIOE_PIN11) | \
759 PIN_OSPEED_HIGH(GPIOE_PIN12) | \
760 PIN_OSPEED_HIGH(GPIOE_PIN13) | \
761 PIN_OSPEED_HIGH(GPIOE_PIN14) | \
762 PIN_OSPEED_HIGH(GPIOE_PIN15))
763#define VAL_GPIOE_PUPDR (PIN_PUPDR_PULLUP(GPIOE_PIN0) | \
764 PIN_PUPDR_PULLUP(GPIOE_PIN1) | \
765 PIN_PUPDR_PULLUP(GPIOE_PIN2) |\
766 PIN_PUPDR_FLOATING(GPIOE_PIN3) | \
767 PIN_PUPDR_PULLUP(GPIOE_PIN4) |\
768 PIN_PUPDR_PULLUP(GPIOE_PIN5) |\
769 PIN_PUPDR_PULLUP(GPIOE_PIN6) | \
770 PIN_PUPDR_PULLUP(GPIOE_PIN7) | \
771 PIN_PUPDR_PULLUP(GPIOE_PIN8) | \
772 PIN_PUPDR_PULLUP(GPIOE_PIN9) | \
773 PIN_PUPDR_PULLUP(GPIOE_PIN10) | \
774 PIN_PUPDR_FLOATING(GPIOE_PIN11) | \
775 PIN_PUPDR_PULLUP(GPIOE_PIN12) | \
776 PIN_PUPDR_FLOATING(GPIOE_PIN13) | \
777 PIN_PUPDR_FLOATING(GPIOE_PIN14) |\
778 PIN_PUPDR_FLOATING(GPIOE_PIN15))
779#define VAL_GPIOE_ODR (PIN_ODR_HIGH(GPIOE_PIN0) | \
780 PIN_ODR_HIGH(GPIOE_PIN1) | \
781 PIN_ODR_HIGH(GPIOE_PIN2) | \
782 PIN_ODR_HIGH(GPIOE_PIN3) | \
783 PIN_ODR_HIGH(GPIOE_PIN4) | \
784 PIN_ODR_HIGH(GPIOE_PIN5) | \
785 PIN_ODR_HIGH(GPIOE_PIN6) | \
786 PIN_ODR_HIGH(GPIOE_PIN7) | \
787 PIN_ODR_LOW(GPIOE_PIN8) | \
788 PIN_ODR_LOW(GPIOE_PIN9) | \
789 PIN_ODR_LOW(GPIOE_PIN10) | \
790 PIN_ODR_LOW(GPIOE_PIN11) | \
791 PIN_ODR_LOW(GPIOE_PIN12) | \
792 PIN_ODR_LOW(GPIOE_PIN13) | \
793 PIN_ODR_LOW(GPIOE_PIN14) | \
794 PIN_ODR_LOW(GPIOE_PIN15))
795#define VAL_GPIOE_AFRL (PIN_AFIO_AF(GPIOE_PIN0, 0) | \
796 PIN_AFIO_AF(GPIOE_PIN1, 0) | \
797 PIN_AFIO_AF(GPIOE_PIN2, 0) |\
798 PIN_AFIO_AF(GPIOE_PIN3, 0) | \
799 PIN_AFIO_AF(GPIOE_PIN4, 0) |\
800 PIN_AFIO_AF(GPIOE_PIN5, 0) |\
801 PIN_AFIO_AF(GPIOE_PIN6, 0) | \
802 PIN_AFIO_AF(GPIOE_PIN7, 0))
803#define VAL_GPIOE_AFRH (PIN_AFIO_AF(GPIOE_PIN8, 0) | \
804 PIN_AFIO_AF(GPIOE_PIN9, 0) | \
805 PIN_AFIO_AF(GPIOE_PIN10, 0) | \
806 PIN_AFIO_AF(GPIOE_PIN11, 0) | \
807 PIN_AFIO_AF(GPIOE_PIN12, 0) | \
808 PIN_AFIO_AF(GPIOE_PIN13, 0) | \
809 PIN_AFIO_AF(GPIOE_PIN14, 0) | \
810 PIN_AFIO_AF(GPIOE_PIN15, 0))
811
812/*
813 * GPIOF setup:
814 *
815 * PF0 - I2C2_SDA (input floating).
816 * PF1 - I2C2_SCL (input floating).
817 * PF2 - PIN2 (input pullup).
818 * PF3 - PIN3 (input pullup).
819 * PF4 - PIN4 (input pullup).
820 * PF5 - PIN5 (input pullup).
821 * PF6 - PIN6 (input pullup).
822 * PF7 - PIN7 (input pullup).
823 * PF8 - PIN8 (input pullup).
824 * PF9 - PIN9 (input pullup).
825 * PF10 - PIN10 (input pullup).
826 * PF11 - PIN11 (input pullup).
827 * PF12 - PIN12 (input pullup).
828 * PF13 - PIN13 (input pullup).
829 * PF14 - PIN14 (input pullup).
830 * PF15 - PIN15 (input pullup).
831 */
832#define VAL_GPIOF_MODER (PIN_MODE_INPUT(GPIOF_I2C2_SDA) | \
833 PIN_MODE_INPUT(GPIOF_I2C2_SCL) | \
834 PIN_MODE_INPUT(GPIOF_PIN2) | \
835 PIN_MODE_INPUT(GPIOF_PIN3) | \
836 PIN_MODE_INPUT(GPIOF_PIN4) | \
837 PIN_MODE_INPUT(GPIOF_PIN5) | \
838 PIN_MODE_INPUT(GPIOF_PIN6) | \
839 PIN_MODE_INPUT(GPIOF_PIN7) | \
840 PIN_MODE_INPUT(GPIOF_PIN8) | \
841 PIN_MODE_INPUT(GPIOF_PIN9) | \
842 PIN_MODE_INPUT(GPIOF_PIN10) | \
843 PIN_MODE_INPUT(GPIOF_PIN11) | \
844 PIN_MODE_INPUT(GPIOF_PIN12) | \
845 PIN_MODE_INPUT(GPIOF_PIN13) | \
846 PIN_MODE_INPUT(GPIOF_PIN14) | \
847 PIN_MODE_INPUT(GPIOF_PIN15))
848#define VAL_GPIOF_OTYPER (PIN_OTYPE_PUSHPULL(GPIOF_I2C2_SDA) | \
849 PIN_OTYPE_PUSHPULL(GPIOF_I2C2_SCL) | \
850 PIN_OTYPE_PUSHPULL(GPIOF_PIN2) | \
851 PIN_OTYPE_PUSHPULL(GPIOF_PIN3) | \
852 PIN_OTYPE_PUSHPULL(GPIOF_PIN4) | \
853 PIN_OTYPE_PUSHPULL(GPIOF_PIN5) | \
854 PIN_OTYPE_PUSHPULL(GPIOF_PIN6) | \
855 PIN_OTYPE_PUSHPULL(GPIOF_PIN7) | \
856 PIN_OTYPE_PUSHPULL(GPIOF_PIN8) | \
857 PIN_OTYPE_PUSHPULL(GPIOF_PIN9) | \
858 PIN_OTYPE_PUSHPULL(GPIOF_PIN10) | \
859 PIN_OTYPE_PUSHPULL(GPIOF_PIN11) | \
860 PIN_OTYPE_PUSHPULL(GPIOF_PIN12) | \
861 PIN_OTYPE_PUSHPULL(GPIOF_PIN13) | \
862 PIN_OTYPE_PUSHPULL(GPIOF_PIN14) | \
863 PIN_OTYPE_PUSHPULL(GPIOF_PIN15))
864#define VAL_GPIOF_OSPEEDR (PIN_OSPEED_HIGH(GPIOF_I2C2_SDA) | \
865 PIN_OSPEED_HIGH(GPIOF_I2C2_SCL) | \
866 PIN_OSPEED_VERYLOW(GPIOF_PIN2) | \
867 PIN_OSPEED_VERYLOW(GPIOF_PIN3) | \
868 PIN_OSPEED_VERYLOW(GPIOF_PIN4) | \
869 PIN_OSPEED_VERYLOW(GPIOF_PIN5) | \
870 PIN_OSPEED_VERYLOW(GPIOF_PIN6) | \
871 PIN_OSPEED_VERYLOW(GPIOF_PIN7) | \
872 PIN_OSPEED_VERYLOW(GPIOF_PIN8) | \
873 PIN_OSPEED_VERYLOW(GPIOF_PIN9) | \
874 PIN_OSPEED_VERYLOW(GPIOF_PIN10) | \
875 PIN_OSPEED_VERYLOW(GPIOF_PIN11) | \
876 PIN_OSPEED_VERYLOW(GPIOF_PIN12) | \
877 PIN_OSPEED_VERYLOW(GPIOF_PIN13) | \
878 PIN_OSPEED_VERYLOW(GPIOF_PIN14) | \
879 PIN_OSPEED_VERYLOW(GPIOF_PIN15))
880#define VAL_GPIOF_PUPDR (PIN_PUPDR_FLOATING(GPIOF_I2C2_SDA) | \
881 PIN_PUPDR_FLOATING(GPIOF_I2C2_SCL) | \
882 PIN_PUPDR_PULLUP(GPIOF_PIN2) | \
883 PIN_PUPDR_PULLUP(GPIOF_PIN3) | \
884 PIN_PUPDR_PULLUP(GPIOF_PIN4) | \
885 PIN_PUPDR_PULLUP(GPIOF_PIN5) | \
886 PIN_PUPDR_PULLUP(GPIOF_PIN6) | \
887 PIN_PUPDR_PULLUP(GPIOF_PIN7) | \
888 PIN_PUPDR_PULLUP(GPIOF_PIN8) | \
889 PIN_PUPDR_PULLUP(GPIOF_PIN9) | \
890 PIN_PUPDR_PULLUP(GPIOF_PIN10) | \
891 PIN_PUPDR_PULLUP(GPIOF_PIN11) | \
892 PIN_PUPDR_PULLUP(GPIOF_PIN12) | \
893 PIN_PUPDR_PULLUP(GPIOF_PIN13) | \
894 PIN_PUPDR_PULLUP(GPIOF_PIN14) | \
895 PIN_PUPDR_PULLUP(GPIOF_PIN15))
896#define VAL_GPIOF_ODR (PIN_ODR_HIGH(GPIOF_I2C2_SDA) | \
897 PIN_ODR_HIGH(GPIOF_I2C2_SCL) | \
898 PIN_ODR_HIGH(GPIOF_PIN2) | \
899 PIN_ODR_HIGH(GPIOF_PIN3) | \
900 PIN_ODR_HIGH(GPIOF_PIN4) | \
901 PIN_ODR_HIGH(GPIOF_PIN5) | \
902 PIN_ODR_HIGH(GPIOF_PIN6) | \
903 PIN_ODR_HIGH(GPIOF_PIN7) | \
904 PIN_ODR_HIGH(GPIOF_PIN8) | \
905 PIN_ODR_HIGH(GPIOF_PIN9) | \
906 PIN_ODR_HIGH(GPIOF_PIN10) | \
907 PIN_ODR_HIGH(GPIOF_PIN11) | \
908 PIN_ODR_HIGH(GPIOF_PIN12) | \
909 PIN_ODR_HIGH(GPIOF_PIN13) | \
910 PIN_ODR_HIGH(GPIOF_PIN14) | \
911 PIN_ODR_HIGH(GPIOF_PIN15))
912#define VAL_GPIOF_AFRL (PIN_AFIO_AF(GPIOF_I2C2_SDA, 0) | \
913 PIN_AFIO_AF(GPIOF_I2C2_SCL, 0) | \
914 PIN_AFIO_AF(GPIOF_PIN2, 0) | \
915 PIN_AFIO_AF(GPIOF_PIN3, 0) | \
916 PIN_AFIO_AF(GPIOF_PIN4, 0) | \
917 PIN_AFIO_AF(GPIOF_PIN5, 0) | \
918 PIN_AFIO_AF(GPIOF_PIN6, 0) | \
919 PIN_AFIO_AF(GPIOF_PIN7, 0))
920#define VAL_GPIOF_AFRH (PIN_AFIO_AF(GPIOF_PIN8, 0) | \
921 PIN_AFIO_AF(GPIOF_PIN9, 0) | \
922 PIN_AFIO_AF(GPIOF_PIN10, 0) | \
923 PIN_AFIO_AF(GPIOF_PIN11, 0) | \
924 PIN_AFIO_AF(GPIOF_PIN12, 0) | \
925 PIN_AFIO_AF(GPIOF_PIN13, 0) | \
926 PIN_AFIO_AF(GPIOF_PIN14, 0) | \
927 PIN_AFIO_AF(GPIOF_PIN15, 0))
928
929/*
930 * GPIOG setup:
931 *
932 * PG0 - PIN0 (input pullup).
933 * PG1 - PIN1 (input pullup).
934 * PG2 - PIN2 (input pullup).
935 * PG3 - PIN3 (input pullup).
936 * PG4 - PIN4 (input pullup).
937 * PG5 - PIN5 (input pullup).
938 * PG6 - PIN6 (input pullup).
939 * PG7 - PIN7 (input pullup).
940 * PG8 - PIN8 (input pullup).
941 * PG9 - PIN9 (input pullup).
942 * PG10 - PIN10 (input pullup).
943 * PG11 - PIN11 (input pullup).
944 * PG12 - PIN12 (input pullup).
945 * PG13 - PIN13 (input pullup).
946 * PG14 - PIN14 (input pullup).
947 * PG15 - PIN15 (input pullup).
948 */
949#define VAL_GPIOG_MODER (PIN_MODE_INPUT(GPIOG_PIN0) | \
950 PIN_MODE_INPUT(GPIOG_PIN1) | \
951 PIN_MODE_INPUT(GPIOG_PIN2) | \
952 PIN_MODE_INPUT(GPIOG_PIN3) | \
953 PIN_MODE_INPUT(GPIOG_PIN4) | \
954 PIN_MODE_INPUT(GPIOG_PIN5) | \
955 PIN_MODE_INPUT(GPIOG_PIN6) | \
956 PIN_MODE_INPUT(GPIOG_PIN7) | \
957 PIN_MODE_INPUT(GPIOG_PIN8) | \
958 PIN_MODE_INPUT(GPIOG_PIN9) | \
959 PIN_MODE_INPUT(GPIOG_PIN10) | \
960 PIN_MODE_INPUT(GPIOG_PIN11) | \
961 PIN_MODE_INPUT(GPIOG_PIN12) | \
962 PIN_MODE_INPUT(GPIOG_PIN13) | \
963 PIN_MODE_INPUT(GPIOG_PIN14) | \
964 PIN_MODE_INPUT(GPIOG_PIN15))
965#define VAL_GPIOG_OTYPER (PIN_OTYPE_PUSHPULL(GPIOG_PIN0) | \
966 PIN_OTYPE_PUSHPULL(GPIOG_PIN1) | \
967 PIN_OTYPE_PUSHPULL(GPIOG_PIN2) | \
968 PIN_OTYPE_PUSHPULL(GPIOG_PIN3) | \
969 PIN_OTYPE_PUSHPULL(GPIOG_PIN4) | \
970 PIN_OTYPE_PUSHPULL(GPIOG_PIN5) | \
971 PIN_OTYPE_PUSHPULL(GPIOG_PIN6) | \
972 PIN_OTYPE_PUSHPULL(GPIOG_PIN7) | \
973 PIN_OTYPE_PUSHPULL(GPIOG_PIN8) | \
974 PIN_OTYPE_PUSHPULL(GPIOG_PIN9) | \
975 PIN_OTYPE_PUSHPULL(GPIOG_PIN10) | \
976 PIN_OTYPE_PUSHPULL(GPIOG_PIN11) | \
977 PIN_OTYPE_PUSHPULL(GPIOG_PIN12) | \
978 PIN_OTYPE_PUSHPULL(GPIOG_PIN13) | \
979 PIN_OTYPE_PUSHPULL(GPIOG_PIN14) | \
980 PIN_OTYPE_PUSHPULL(GPIOG_PIN15))
981#define VAL_GPIOG_OSPEEDR (PIN_OSPEED_VERYLOW(GPIOG_PIN0) | \
982 PIN_OSPEED_VERYLOW(GPIOG_PIN1) | \
983 PIN_OSPEED_VERYLOW(GPIOG_PIN2) | \
984 PIN_OSPEED_VERYLOW(GPIOG_PIN3) | \
985 PIN_OSPEED_VERYLOW(GPIOG_PIN4) | \
986 PIN_OSPEED_VERYLOW(GPIOG_PIN5) | \
987 PIN_OSPEED_VERYLOW(GPIOG_PIN6) | \
988 PIN_OSPEED_VERYLOW(GPIOG_PIN7) | \
989 PIN_OSPEED_VERYLOW(GPIOG_PIN8) | \
990 PIN_OSPEED_VERYLOW(GPIOG_PIN9) | \
991 PIN_OSPEED_VERYLOW(GPIOG_PIN10) | \
992 PIN_OSPEED_VERYLOW(GPIOG_PIN11) | \
993 PIN_OSPEED_VERYLOW(GPIOG_PIN12) | \
994 PIN_OSPEED_VERYLOW(GPIOG_PIN13) | \
995 PIN_OSPEED_VERYLOW(GPIOG_PIN14) | \
996 PIN_OSPEED_VERYLOW(GPIOG_PIN15))
997#define VAL_GPIOG_PUPDR (PIN_PUPDR_PULLUP(GPIOG_PIN0) | \
998 PIN_PUPDR_PULLUP(GPIOG_PIN1) | \
999 PIN_PUPDR_PULLUP(GPIOG_PIN2) | \
1000 PIN_PUPDR_PULLUP(GPIOG_PIN3) | \
1001 PIN_PUPDR_PULLUP(GPIOG_PIN4) | \
1002 PIN_PUPDR_PULLUP(GPIOG_PIN5) | \
1003 PIN_PUPDR_PULLUP(GPIOG_PIN6) | \
1004 PIN_PUPDR_PULLUP(GPIOG_PIN7) | \
1005 PIN_PUPDR_PULLUP(GPIOG_PIN8) | \
1006 PIN_PUPDR_PULLUP(GPIOG_PIN9) | \
1007 PIN_PUPDR_PULLUP(GPIOG_PIN10) | \
1008 PIN_PUPDR_PULLUP(GPIOG_PIN11) | \
1009 PIN_PUPDR_PULLUP(GPIOG_PIN12) | \
1010 PIN_PUPDR_PULLUP(GPIOG_PIN13) | \
1011 PIN_PUPDR_PULLUP(GPIOG_PIN14) | \
1012 PIN_PUPDR_PULLUP(GPIOG_PIN15))
1013#define VAL_GPIOG_ODR (PIN_ODR_HIGH(GPIOG_PIN0) | \
1014 PIN_ODR_HIGH(GPIOG_PIN1) | \
1015 PIN_ODR_HIGH(GPIOG_PIN2) | \
1016 PIN_ODR_HIGH(GPIOG_PIN3) | \
1017 PIN_ODR_HIGH(GPIOG_PIN4) | \
1018 PIN_ODR_HIGH(GPIOG_PIN5) | \
1019 PIN_ODR_HIGH(GPIOG_PIN6) | \
1020 PIN_ODR_HIGH(GPIOG_PIN7) | \
1021 PIN_ODR_HIGH(GPIOG_PIN8) | \
1022 PIN_ODR_HIGH(GPIOG_PIN9) | \
1023 PIN_ODR_HIGH(GPIOG_PIN10) | \
1024 PIN_ODR_HIGH(GPIOG_PIN11) | \
1025 PIN_ODR_HIGH(GPIOG_PIN12) | \
1026 PIN_ODR_HIGH(GPIOG_PIN13) | \
1027 PIN_ODR_HIGH(GPIOG_PIN14) | \
1028 PIN_ODR_HIGH(GPIOG_PIN15))
1029#define VAL_GPIOG_AFRL (PIN_AFIO_AF(GPIOG_PIN0, 0) | \
1030 PIN_AFIO_AF(GPIOG_PIN1, 0) | \
1031 PIN_AFIO_AF(GPIOG_PIN2, 0) | \
1032 PIN_AFIO_AF(GPIOG_PIN3, 0) | \
1033 PIN_AFIO_AF(GPIOG_PIN4, 0) | \
1034 PIN_AFIO_AF(GPIOG_PIN5, 0) | \
1035 PIN_AFIO_AF(GPIOG_PIN6, 0) | \
1036 PIN_AFIO_AF(GPIOG_PIN7, 0))
1037#define VAL_GPIOG_AFRH (PIN_AFIO_AF(GPIOG_PIN8, 0) | \
1038 PIN_AFIO_AF(GPIOG_PIN9, 0) | \
1039 PIN_AFIO_AF(GPIOG_PIN10, 0) | \
1040 PIN_AFIO_AF(GPIOG_PIN11, 0) | \
1041 PIN_AFIO_AF(GPIOG_PIN12, 0) | \
1042 PIN_AFIO_AF(GPIOG_PIN13, 0) | \
1043 PIN_AFIO_AF(GPIOG_PIN14, 0) | \
1044 PIN_AFIO_AF(GPIOG_PIN15, 0))
1045
1046/*
1047 * GPIOH setup:
1048 *
1049 * PH0 - PIN0 (input pullup).
1050 * PH1 - PIN1 (input pullup).
1051 * PH2 - PIN2 (input pullup).
1052 * PH3 - PIN3 (input pullup).
1053 * PH4 - PIN4 (input pullup).
1054 * PH5 - PIN5 (input pullup).
1055 * PH6 - PIN6 (input pullup).
1056 * PH7 - PIN7 (input pullup).
1057 * PH8 - PIN8 (input pullup).
1058 * PH9 - PIN9 (input pullup).
1059 * PH10 - PIN10 (input pullup).
1060 * PH11 - PIN11 (input pullup).
1061 * PH12 - PIN12 (input pullup).
1062 * PH13 - PIN13 (input pullup).
1063 * PH14 - PIN14 (input pullup).
1064 * PH15 - PIN15 (input pullup).
1065 */
1066#define VAL_GPIOH_MODER (PIN_MODE_INPUT(GPIOH_PIN0) | \
1067 PIN_MODE_INPUT(GPIOH_PIN1) | \
1068 PIN_MODE_INPUT(GPIOH_PIN2) | \
1069 PIN_MODE_INPUT(GPIOH_PIN3) | \
1070 PIN_MODE_INPUT(GPIOH_PIN4) | \
1071 PIN_MODE_INPUT(GPIOH_PIN5) | \
1072 PIN_MODE_INPUT(GPIOH_PIN6) | \
1073 PIN_MODE_INPUT(GPIOH_PIN7) | \
1074 PIN_MODE_INPUT(GPIOH_PIN8) | \
1075 PIN_MODE_INPUT(GPIOH_PIN9) | \
1076 PIN_MODE_INPUT(GPIOH_PIN10) | \
1077 PIN_MODE_INPUT(GPIOH_PIN11) | \
1078 PIN_MODE_INPUT(GPIOH_PIN12) | \
1079 PIN_MODE_INPUT(GPIOH_PIN13) | \
1080 PIN_MODE_INPUT(GPIOH_PIN14) | \
1081 PIN_MODE_INPUT(GPIOH_PIN15))
1082#define VAL_GPIOH_OTYPER (PIN_OTYPE_PUSHPULL(GPIOH_PIN0) | \
1083 PIN_OTYPE_PUSHPULL(GPIOH_PIN1) | \
1084 PIN_OTYPE_PUSHPULL(GPIOH_PIN2) | \
1085 PIN_OTYPE_PUSHPULL(GPIOH_PIN3) | \
1086 PIN_OTYPE_PUSHPULL(GPIOH_PIN4) | \
1087 PIN_OTYPE_PUSHPULL(GPIOH_PIN5) | \
1088 PIN_OTYPE_PUSHPULL(GPIOH_PIN6) | \
1089 PIN_OTYPE_PUSHPULL(GPIOH_PIN7) | \
1090 PIN_OTYPE_PUSHPULL(GPIOH_PIN8) | \
1091 PIN_OTYPE_PUSHPULL(GPIOH_PIN9) | \
1092 PIN_OTYPE_PUSHPULL(GPIOH_PIN10) | \
1093 PIN_OTYPE_PUSHPULL(GPIOH_PIN11) | \
1094 PIN_OTYPE_PUSHPULL(GPIOH_PIN12) | \
1095 PIN_OTYPE_PUSHPULL(GPIOH_PIN13) | \
1096 PIN_OTYPE_PUSHPULL(GPIOH_PIN14) | \
1097 PIN_OTYPE_PUSHPULL(GPIOH_PIN15))
1098#define VAL_GPIOH_OSPEEDR (PIN_OSPEED_VERYLOW(GPIOH_PIN0) | \
1099 PIN_OSPEED_VERYLOW(GPIOH_PIN1) | \
1100 PIN_OSPEED_VERYLOW(GPIOH_PIN2) | \
1101 PIN_OSPEED_VERYLOW(GPIOH_PIN3) | \
1102 PIN_OSPEED_VERYLOW(GPIOH_PIN4) | \
1103 PIN_OSPEED_VERYLOW(GPIOH_PIN5) | \
1104 PIN_OSPEED_VERYLOW(GPIOH_PIN6) | \
1105 PIN_OSPEED_VERYLOW(GPIOH_PIN7) | \
1106 PIN_OSPEED_VERYLOW(GPIOH_PIN8) | \
1107 PIN_OSPEED_VERYLOW(GPIOH_PIN9) | \
1108 PIN_OSPEED_VERYLOW(GPIOH_PIN10) | \
1109 PIN_OSPEED_VERYLOW(GPIOH_PIN11) | \
1110 PIN_OSPEED_VERYLOW(GPIOH_PIN12) | \
1111 PIN_OSPEED_VERYLOW(GPIOH_PIN13) | \
1112 PIN_OSPEED_VERYLOW(GPIOH_PIN14) | \
1113 PIN_OSPEED_VERYLOW(GPIOH_PIN15))
1114#define VAL_GPIOH_PUPDR (PIN_PUPDR_PULLUP(GPIOH_PIN0) | \
1115 PIN_PUPDR_PULLUP(GPIOH_PIN1) | \
1116 PIN_PUPDR_PULLUP(GPIOH_PIN2) | \
1117 PIN_PUPDR_PULLUP(GPIOH_PIN3) | \
1118 PIN_PUPDR_PULLUP(GPIOH_PIN4) | \
1119 PIN_PUPDR_PULLUP(GPIOH_PIN5) | \
1120 PIN_PUPDR_PULLUP(GPIOH_PIN6) | \
1121 PIN_PUPDR_PULLUP(GPIOH_PIN7) | \
1122 PIN_PUPDR_PULLUP(GPIOH_PIN8) | \
1123 PIN_PUPDR_PULLUP(GPIOH_PIN9) | \
1124 PIN_PUPDR_PULLUP(GPIOH_PIN10) | \
1125 PIN_PUPDR_PULLUP(GPIOH_PIN11) | \
1126 PIN_PUPDR_PULLUP(GPIOH_PIN12) | \
1127 PIN_PUPDR_PULLUP(GPIOH_PIN13) | \
1128 PIN_PUPDR_PULLUP(GPIOH_PIN14) | \
1129 PIN_PUPDR_PULLUP(GPIOH_PIN15))
1130#define VAL_GPIOH_ODR (PIN_ODR_HIGH(GPIOH_PIN0) | \
1131 PIN_ODR_HIGH(GPIOH_PIN1) | \
1132 PIN_ODR_HIGH(GPIOH_PIN2) | \
1133 PIN_ODR_HIGH(GPIOH_PIN3) | \
1134 PIN_ODR_HIGH(GPIOH_PIN4) | \
1135 PIN_ODR_HIGH(GPIOH_PIN5) | \
1136 PIN_ODR_HIGH(GPIOH_PIN6) | \
1137 PIN_ODR_HIGH(GPIOH_PIN7) | \
1138 PIN_ODR_HIGH(GPIOH_PIN8) | \
1139 PIN_ODR_HIGH(GPIOH_PIN9) | \
1140 PIN_ODR_HIGH(GPIOH_PIN10) | \
1141 PIN_ODR_HIGH(GPIOH_PIN11) | \
1142 PIN_ODR_HIGH(GPIOH_PIN12) | \
1143 PIN_ODR_HIGH(GPIOH_PIN13) | \
1144 PIN_ODR_HIGH(GPIOH_PIN14) | \
1145 PIN_ODR_HIGH(GPIOH_PIN15))
1146#define VAL_GPIOH_AFRL (PIN_AFIO_AF(GPIOH_PIN0, 0) | \
1147 PIN_AFIO_AF(GPIOH_PIN1, 0) | \
1148 PIN_AFIO_AF(GPIOH_PIN2, 0) | \
1149 PIN_AFIO_AF(GPIOH_PIN3, 0) | \
1150 PIN_AFIO_AF(GPIOH_PIN4, 0) | \
1151 PIN_AFIO_AF(GPIOH_PIN5, 0) | \
1152 PIN_AFIO_AF(GPIOH_PIN6, 0) | \
1153 PIN_AFIO_AF(GPIOH_PIN7, 0))
1154#define VAL_GPIOH_AFRH (PIN_AFIO_AF(GPIOH_PIN8, 0) | \
1155 PIN_AFIO_AF(GPIOH_PIN9, 0) | \
1156 PIN_AFIO_AF(GPIOH_PIN10, 0) | \
1157 PIN_AFIO_AF(GPIOH_PIN11, 0) | \
1158 PIN_AFIO_AF(GPIOH_PIN12, 0) | \
1159 PIN_AFIO_AF(GPIOH_PIN13, 0) | \
1160 PIN_AFIO_AF(GPIOH_PIN14, 0) | \
1161 PIN_AFIO_AF(GPIOH_PIN15, 0))
1162
1163
1164/*
1165 * USB bus activation macro, required by the USB driver.
1166 */
1167// #define usb_lld_connect_bus(usbp)
1168#define usb_lld_connect_bus(usbp) (palSetPadMode(GPIOA, GPIOA_USB_DP, PAL_MODE_ALTERNATE(14)))
1169// #define usb_lld_connect_bus(usbp) palSetPadMode(GPIOA, 12, PAL_MODE_INPUT)
1170/*
1171 * USB bus de-activation macro, required by the USB driver.
1172 */
1173// #define usb_lld_disconnect_bus(usbp)
1174#define usb_lld_disconnect_bus(usbp) (palSetPadMode(GPIOA, GPIOA_USB_DP, PAL_MODE_OUTPUT_PUSHPULL)); palClearPad(GPIOA, GPIOA_USB_DP)
1175// #define usb_lld_disconnect_bus(usbp) palSetPadMode(GPIOA, 12, PAL_MODE_OUTPUT_PUSHPULL); palClearPad(GPIOA, 12)
1176
1177#if !defined(_FROM_ASM_)
1178#ifdef __cplusplus
1179extern "C" {
1180#endif
1181 void boardInit(void);
1182#ifdef __cplusplus
1183}
1184#endif
1185#endif /* _FROM_ASM_ */
1186
1187#endif /* _BOARD_H_ */
diff --git a/keyboards/nk65/boards/GENERIC_STM32_F303XC/board.mk b/keyboards/nk65/boards/GENERIC_STM32_F303XC/board.mk
new file mode 100755
index 000000000..43377629a
--- /dev/null
+++ b/keyboards/nk65/boards/GENERIC_STM32_F303XC/board.mk
@@ -0,0 +1,5 @@
1# List of all the board related files.
2BOARDSRC = $(BOARD_PATH)/boards/GENERIC_STM32_F303XC/board.c
3
4# Required include directories
5BOARDINC = $(BOARD_PATH)/boards/GENERIC_STM32_F303XC
diff --git a/keyboards/nk65/bootloader_defs.h b/keyboards/nk65/bootloader_defs.h
new file mode 100755
index 000000000..3b0e9d20a
--- /dev/null
+++ b/keyboards/nk65/bootloader_defs.h
@@ -0,0 +1,7 @@
1/* Address for jumping to bootloader on STM32 chips. */
2/* It is chip dependent, the correct number can be looked up here:
3 * http://www.st.com/web/en/resource/technical/document/application_note/CD00167594.pdf
4 * This also requires a patch to chibios:
5 * <tmk_dir>/tmk_core/tool/chibios/ch-bootloader-jump.patch
6 */
7#define STM32_BOOTLOADER_ADDRESS 0x1FFFD800
diff --git a/keyboards/nk65/chconf.h b/keyboards/nk65/chconf.h
new file mode 100755
index 000000000..1d9f12ff1
--- /dev/null
+++ b/keyboards/nk65/chconf.h
@@ -0,0 +1,520 @@
1/*
2 ChibiOS - Copyright (C) 2006..2016 Giovanni Di Sirio
3
4 Licensed under the Apache License, Version 2.0 (the "License");
5 you may not use this file except in compliance with the License.
6 You may obtain a copy of the License at
7
8 http://www.apache.org/licenses/LICENSE-2.0
9
10 Unless required by applicable law or agreed to in writing, software
11 distributed under the License is distributed on an "AS IS" BASIS,
12 WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
13 See the License for the specific language governing permissions and
14 limitations under the License.
15*/
16
17/**
18 * @file templates/chconf.h
19 * @brief Configuration file template.
20 * @details A copy of this file must be placed in each project directory, it
21 * contains the application specific kernel settings.
22 *
23 * @addtogroup config
24 * @details Kernel related settings and hooks.
25 * @{
26 */
27
28#ifndef CHCONF_H
29#define CHCONF_H
30
31#define _CHIBIOS_RT_CONF_
32
33/*===========================================================================*/
34/**
35 * @name System timers settings
36 * @{
37 */
38/*===========================================================================*/
39
40/**
41 * @brief System time counter resolution.
42 * @note Allowed values are 16 or 32 bits.
43 */
44#define CH_CFG_ST_RESOLUTION 32
45
46/**
47 * @brief System tick frequency.
48 * @details Frequency of the system timer that drives the system ticks. This
49 * setting also defines the system tick time unit.
50 */
51#define CH_CFG_ST_FREQUENCY 100000
52
53/**
54 * @brief Time delta constant for the tick-less mode.
55 * @note If this value is zero then the system uses the classic
56 * periodic tick. This value represents the minimum number
57 * of ticks that is safe to specify in a timeout directive.
58 * The value one is not valid, timeouts are rounded up to
59 * this value.
60 */
61#define CH_CFG_ST_TIMEDELTA 2
62
63/** @} */
64
65/*===========================================================================*/
66/**
67 * @name Kernel parameters and options
68 * @{
69 */
70/*===========================================================================*/
71
72/**
73 * @brief Round robin interval.
74 * @details This constant is the number of system ticks allowed for the
75 * threads before preemption occurs. Setting this value to zero
76 * disables the preemption for threads with equal priority and the
77 * round robin becomes cooperative. Note that higher priority
78 * threads can still preempt, the kernel is always preemptive.
79 * @note Disabling the round robin preemption makes the kernel more compact
80 * and generally faster.
81 * @note The round robin preemption is not supported in tickless mode and
82 * must be set to zero in that case.
83 */
84#define CH_CFG_TIME_QUANTUM 0
85
86/**
87 * @brief Managed RAM size.
88 * @details Size of the RAM area to be managed by the OS. If set to zero
89 * then the whole available RAM is used. The core memory is made
90 * available to the heap allocator and/or can be used directly through
91 * the simplified core memory allocator.
92 *
93 * @note In order to let the OS manage the whole RAM the linker script must
94 * provide the @p __heap_base__ and @p __heap_end__ symbols.
95 * @note Requires @p CH_CFG_USE_MEMCORE.
96 */
97#define CH_CFG_MEMCORE_SIZE 0
98
99/**
100 * @brief Idle thread automatic spawn suppression.
101 * @details When this option is activated the function @p chSysInit()
102 * does not spawn the idle thread. The application @p main()
103 * function becomes the idle thread and must implement an
104 * infinite loop.
105 */
106#define CH_CFG_NO_IDLE_THREAD FALSE
107
108/** @} */
109
110/*===========================================================================*/
111/**
112 * @name Performance options
113 * @{
114 */
115/*===========================================================================*/
116
117/**
118 * @brief OS optimization.
119 * @details If enabled then time efficient rather than space efficient code
120 * is used when two possible implementations exist.
121 *
122 * @note This is not related to the compiler optimization options.
123 * @note The default is @p TRUE.
124 */
125#define CH_CFG_OPTIMIZE_SPEED TRUE
126
127/** @} */
128
129/*===========================================================================*/
130/**
131 * @name Subsystem options
132 * @{
133 */
134/*===========================================================================*/
135
136/**
137 * @brief Time Measurement APIs.
138 * @details If enabled then the time measurement APIs are included in
139 * the kernel.
140 *
141 * @note The default is @p TRUE.
142 */
143#define CH_CFG_USE_TM TRUE
144
145/**
146 * @brief Threads registry APIs.
147 * @details If enabled then the registry APIs are included in the kernel.
148 *
149 * @note The default is @p TRUE.
150 */
151#define CH_CFG_USE_REGISTRY TRUE
152
153/**
154 * @brief Threads synchronization APIs.
155 * @details If enabled then the @p chThdWait() function is included in
156 * the kernel.
157 *
158 * @note The default is @p TRUE.
159 */
160#define CH_CFG_USE_WAITEXIT TRUE
161
162/**
163 * @brief Semaphores APIs.
164 * @details If enabled then the Semaphores APIs are included in the kernel.
165 *
166 * @note The default is @p TRUE.
167 */
168#define CH_CFG_USE_SEMAPHORES TRUE
169
170/**
171 * @brief Semaphores queuing mode.
172 * @details If enabled then the threads are enqueued on semaphores by
173 * priority rather than in FIFO order.
174 *
175 * @note The default is @p FALSE. Enable this if you have special
176 * requirements.
177 * @note Requires @p CH_CFG_USE_SEMAPHORES.
178 */
179#define CH_CFG_USE_SEMAPHORES_PRIORITY FALSE
180
181/**
182 * @brief Mutexes APIs.
183 * @details If enabled then the mutexes APIs are included in the kernel.
184 *
185 * @note The default is @p TRUE.
186 */
187#define CH_CFG_USE_MUTEXES TRUE
188
189/**
190 * @brief Enables recursive behavior on mutexes.
191 * @note Recursive mutexes are heavier and have an increased
192 * memory footprint.
193 *
194 * @note The default is @p FALSE.
195 * @note Requires @p CH_CFG_USE_MUTEXES.
196 */
197#define CH_CFG_USE_MUTEXES_RECURSIVE FALSE
198
199/**
200 * @brief Conditional Variables APIs.
201 * @details If enabled then the conditional variables APIs are included
202 * in the kernel.
203 *
204 * @note The default is @p TRUE.
205 * @note Requires @p CH_CFG_USE_MUTEXES.
206 */
207#define CH_CFG_USE_CONDVARS TRUE
208
209/**
210 * @brief Conditional Variables APIs with timeout.
211 * @details If enabled then the conditional variables APIs with timeout
212 * specification are included in the kernel.
213 *
214 * @note The default is @p TRUE.
215 * @note Requires @p CH_CFG_USE_CONDVARS.
216 */
217#define CH_CFG_USE_CONDVARS_TIMEOUT TRUE
218
219/**
220 * @brief Events Flags APIs.
221 * @details If enabled then the event flags APIs are included in the kernel.
222 *
223 * @note The default is @p TRUE.
224 */
225#define CH_CFG_USE_EVENTS TRUE
226
227/**
228 * @brief Events Flags APIs with timeout.
229 * @details If enabled then the events APIs with timeout specification
230 * are included in the kernel.
231 *
232 * @note The default is @p TRUE.
233 * @note Requires @p CH_CFG_USE_EVENTS.
234 */
235#define CH_CFG_USE_EVENTS_TIMEOUT TRUE
236
237/**
238 * @brief Synchronous Messages APIs.
239 * @details If enabled then the synchronous messages APIs are included
240 * in the kernel.
241 *
242 * @note The default is @p TRUE.
243 */
244#define CH_CFG_USE_MESSAGES TRUE
245
246/**
247 * @brief Synchronous Messages queuing mode.
248 * @details If enabled then messages are served by priority rather than in
249 * FIFO order.
250 *
251 * @note The default is @p FALSE. Enable this if you have special
252 * requirements.
253 * @note Requires @p CH_CFG_USE_MESSAGES.
254 */
255#define CH_CFG_USE_MESSAGES_PRIORITY TRUE
256
257/**
258 * @brief Mailboxes APIs.
259 * @details If enabled then the asynchronous messages (mailboxes) APIs are
260 * included in the kernel.
261 *
262 * @note The default is @p TRUE.
263 * @note Requires @p CH_CFG_USE_SEMAPHORES.
264 */
265#define CH_CFG_USE_MAILBOXES TRUE
266
267/**
268 * @brief Core Memory Manager APIs.
269 * @details If enabled then the core memory manager APIs are included
270 * in the kernel.
271 *
272 * @note The default is @p TRUE.
273 */
274#define CH_CFG_USE_MEMCORE TRUE
275
276/**
277 * @brief Heap Allocator APIs.
278 * @details If enabled then the memory heap allocator APIs are included
279 * in the kernel.
280 *
281 * @note The default is @p TRUE.
282 * @note Requires @p CH_CFG_USE_MEMCORE and either @p CH_CFG_USE_MUTEXES or
283 * @p CH_CFG_USE_SEMAPHORES.
284 * @note Mutexes are recommended.
285 */
286#define CH_CFG_USE_HEAP TRUE
287
288/**
289 * @brief Memory Pools Allocator APIs.
290 * @details If enabled then the memory pools allocator APIs are included
291 * in the kernel.
292 *
293 * @note The default is @p TRUE.
294 */
295#define CH_CFG_USE_MEMPOOLS TRUE
296
297/**
298 * @brief Dynamic Threads APIs.
299 * @details If enabled then the dynamic threads creation APIs are included
300 * in the kernel.
301 *
302 * @note The default is @p TRUE.
303 * @note Requires @p CH_CFG_USE_WAITEXIT.
304 * @note Requires @p CH_CFG_USE_HEAP and/or @p CH_CFG_USE_MEMPOOLS.
305 */
306#define CH_CFG_USE_DYNAMIC TRUE
307
308/** @} */
309
310/*===========================================================================*/
311/**
312 * @name Debug options
313 * @{
314 */
315/*===========================================================================*/
316
317/**
318 * @brief Debug option, kernel statistics.
319 *
320 * @note The default is @p FALSE.
321 */
322#define CH_DBG_STATISTICS FALSE
323
324/**
325 * @brief Debug option, system state check.
326 * @details If enabled the correct call protocol for system APIs is checked
327 * at runtime.
328 *
329 * @note The default is @p FALSE.
330 */
331#define CH_DBG_SYSTEM_STATE_CHECK FALSE
332
333/**
334 * @brief Debug option, parameters checks.
335 * @details If enabled then the checks on the API functions input
336 * parameters are activated.
337 *
338 * @note The default is @p FALSE.
339 */
340#define CH_DBG_ENABLE_CHECKS FALSE
341
342/**
343 * @brief Debug option, consistency checks.
344 * @details If enabled then all the assertions in the kernel code are
345 * activated. This includes consistency checks inside the kernel,
346 * runtime anomalies and port-defined checks.
347 *
348 * @note The default is @p FALSE.
349 */
350#define CH_DBG_ENABLE_ASSERTS FALSE
351
352/**
353 * @brief Debug option, trace buffer.
354 * @details If enabled then the trace buffer is activated.
355 *
356 * @note The default is @p CH_DBG_TRACE_MASK_DISABLED.
357 */
358#define CH_DBG_TRACE_MASK CH_DBG_TRACE_MASK_DISABLED
359
360/**
361 * @brief Trace buffer entries.
362 * @note The trace buffer is only allocated if @p CH_DBG_TRACE_MASK is
363 * different from @p CH_DBG_TRACE_MASK_DISABLED.
364 */
365#define CH_DBG_TRACE_BUFFER_SIZE 128
366
367/**
368 * @brief Debug option, stack checks.
369 * @details If enabled then a runtime stack check is performed.
370 *
371 * @note The default is @p FALSE.
372 * @note The stack check is performed in a architecture/port dependent way.
373 * It may not be implemented or some ports.
374 * @note The default failure mode is to halt the system with the global
375 * @p panic_msg variable set to @p NULL.
376 */
377#define CH_DBG_ENABLE_STACK_CHECK TRUE
378
379/**
380 * @brief Debug option, stacks initialization.
381 * @details If enabled then the threads working area is filled with a byte
382 * value when a thread is created. This can be useful for the
383 * runtime measurement of the used stack.
384 *
385 * @note The default is @p FALSE.
386 */
387#define CH_DBG_FILL_THREADS FALSE
388
389/**
390 * @brief Debug option, threads profiling.
391 * @details If enabled then a field is added to the @p thread_t structure that
392 * counts the system ticks occurred while executing the thread.
393 *
394 * @note The default is @p FALSE.
395 * @note This debug option is not currently compatible with the
396 * tickless mode.
397 */
398#define CH_DBG_THREADS_PROFILING FALSE
399
400/** @} */
401
402/*===========================================================================*/
403/**
404 * @name Kernel hooks
405 * @{
406 */
407/*===========================================================================*/
408
409/**
410 * @brief Threads descriptor structure extension.
411 * @details User fields added to the end of the @p thread_t structure.
412 */
413#define CH_CFG_THREAD_EXTRA_FIELDS \
414 /* Add threads custom fields here.*/
415
416/**
417 * @brief Threads initialization hook.
418 * @details User initialization code added to the @p chThdInit() API.
419 *
420 * @note It is invoked from within @p chThdInit() and implicitly from all
421 * the threads creation APIs.
422 */
423#define CH_CFG_THREAD_INIT_HOOK(tp) { \
424 /* Add threads initialization code here.*/ \
425}
426
427/**
428 * @brief Threads finalization hook.
429 * @details User finalization code added to the @p chThdExit() API.
430 */
431#define CH_CFG_THREAD_EXIT_HOOK(tp) { \
432 /* Add threads finalization code here.*/ \
433}
434
435/**
436 * @brief Context switch hook.
437 * @details This hook is invoked just before switching between threads.
438 */
439#define CH_CFG_CONTEXT_SWITCH_HOOK(ntp, otp) { \
440 /* Context switch code here.*/ \
441}
442
443/**
444 * @brief ISR enter hook.
445 */
446#define CH_CFG_IRQ_PROLOGUE_HOOK() { \
447 /* IRQ prologue code here.*/ \
448}
449
450/**
451 * @brief ISR exit hook.
452 */
453#define CH_CFG_IRQ_EPILOGUE_HOOK() { \
454 /* IRQ epilogue code here.*/ \
455}
456
457/**
458 * @brief Idle thread enter hook.
459 * @note This hook is invoked within a critical zone, no OS functions
460 * should be invoked from here.
461 * @note This macro can be used to activate a power saving mode.
462 */
463#define CH_CFG_IDLE_ENTER_HOOK() { \
464 /* Idle-enter code here.*/ \
465}
466
467/**
468 * @brief Idle thread leave hook.
469 * @note This hook is invoked within a critical zone, no OS functions
470 * should be invoked from here.
471 * @note This macro can be used to deactivate a power saving mode.
472 */
473#define CH_CFG_IDLE_LEAVE_HOOK() { \
474 /* Idle-leave code here.*/ \
475}
476
477/**
478 * @brief Idle Loop hook.
479 * @details This hook is continuously invoked by the idle thread loop.
480 */
481#define CH_CFG_IDLE_LOOP_HOOK() { \
482 /* Idle loop code here.*/ \
483}
484
485/**
486 * @brief System tick event hook.
487 * @details This hook is invoked in the system tick handler immediately
488 * after processing the virtual timers queue.
489 */
490#define CH_CFG_SYSTEM_TICK_HOOK() { \
491 /* System tick event code here.*/ \
492}
493
494/**
495 * @brief System halt hook.
496 * @details This hook is invoked in case to a system halting error before
497 * the system is halted.
498 */
499#define CH_CFG_SYSTEM_HALT_HOOK(reason) { \
500 /* System halt code here.*/ \
501}
502
503/**
504 * @brief Trace hook.
505 * @details This hook is invoked each time a new record is written in the
506 * trace buffer.
507 */
508#define CH_CFG_TRACE_HOOK(tep) { \
509 /* Trace code here.*/ \
510}
511
512/** @} */
513
514/*===========================================================================*/
515/* Port-specific settings (override port settings defaulted in chcore.h). */
516/*===========================================================================*/
517
518#endif /* CHCONF_H */
519
520/** @} */
diff --git a/keyboards/nk65/config.h b/keyboards/nk65/config.h
new file mode 100755
index 000000000..0edb1bb62
--- /dev/null
+++ b/keyboards/nk65/config.h
@@ -0,0 +1,154 @@
1/*
2Copyright 2019 Yiancar
3
4This program is free software: you can redistribute it and/or modify
5it under the terms of the GNU General Public License as published by
6the Free Software Foundation, either version 2 of the License, or
7(at your option) any later version.
8
9This program is distributed in the hope that it will be useful,
10but WITHOUT ANY WARRANTY; without even the implied warranty of
11MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
12GNU General Public License for more details.
13
14You should have received a copy of the GNU General Public License
15along with this program. If not, see <http://www.gnu.org/licenses/>.
16*/
17
18#pragma once
19
20#include "config_common.h"
21
22/* USB Device descriptor parameter */
23#define VENDOR_ID 0x8968
24#define PRODUCT_ID 0x4E4B
25#define DEVICE_VER 0x0001
26#define MANUFACTURER Yiancar-Designs
27#define PRODUCT NK65
28#define DESCRIPTION A 65-percent, tool-free RGB keyboard
29
30/* key matrix size */
31#define MATRIX_ROWS 5
32#define MATRIX_COLS 15
33
34#define MATRIX_ROW_PINS { B3, B4, B5, A8, A4 }
35#define MATRIX_COL_PINS { A13, A10, A9, A14, A15, B8, B9, C13, C14, C15, A0, A1, A2, A3, A5 }
36// To enable debugger set A13 A14 -> A5 A7
37
38/* COL2ROW, ROW2COL*/
39#define DIODE_DIRECTION COL2ROW
40
41/* Debounce reduces chatter (unintended double-presses) - set 0 if debouncing is not needed */
42#define DEBOUNCING_DELAY 5
43
44/* define if matrix has ghost (lacks anti-ghosting diodes) */
45//#define MATRIX_HAS_GHOST
46
47/* If defined, GRAVE_ESC will always act as ESC when CTRL is held.
48 * This is userful for the Windows task manager shortcut (ctrl+shift+esc).
49 */
50// #define GRAVE_ESC_CTRL_OVERRIDE
51
52/*
53 * Force NKRO
54 *
55 * Force NKRO (nKey Rollover) to be enabled by default, regardless of the saved
56 * state in the bootmagic EEPROM settings. (Note that NKRO must be enabled in the
57 * makefile for this to work.)
58 *
59 * If forced on, NKRO can be disabled via magic key (default = LShift+RShift+N)
60 * until the next keyboard reset.
61 *
62 * NKRO may prevent your keystrokes from being detected in the BIOS, but it is
63 * fully operational during normal computer usage.
64 *
65 * For a less heavy-handed approach, enable NKRO via magic key (LShift+RShift+N)
66 * or via bootmagic (hold SPACE+N while plugging in the keyboard). Once set by
67 * bootmagic, NKRO mode will always be enabled until it is toggled again during a
68 * power-up.
69 *
70 */
71//#define FORCE_NKRO
72
73/*
74 * Magic Key Options
75 *
76 * Magic keys are hotkey commands that allow control over firmware functions of
77 * the keyboard. They are best used in combination with the HID Listen program,
78 * found here: https://www.pjrc.com/teensy/hid_listen.html
79 *
80 * The options below allow the magic key functionality to be changed. This is
81 * useful if your keyboard/keypad is missing keys and you want magic key support.
82 *
83 */
84
85/* Backlight options */
86
87#define RGB_BACKLIGHT_ENABLED 1
88
89#define RGB_BACKLIGHT_NK65
90
91// they aren't really used if RGB_BACKLIGHT_HS60 defined
92#define RGB_BACKLIGHT_USE_SPLIT_BACKSPACE 0
93#define RGB_BACKLIGHT_USE_SPLIT_LEFT_SHIFT 0
94#define RGB_BACKLIGHT_USE_SPLIT_RIGHT_SHIFT 0
95#define RGB_BACKLIGHT_USE_7U_SPACEBAR 0
96#define RGB_BACKLIGHT_USE_ISO_ENTER 0
97#define RGB_BACKLIGHT_DISABLE_HHKB_BLOCKER_LEDS 0
98
99// disable backlight when USB suspended (PC sleep/hibernate/shutdown)
100#define RGB_BACKLIGHT_DISABLE_WHEN_USB_SUSPENDED 0
101
102// disable backlight after timeout in minutes, 0 = no timeout
103#define RGB_BACKLIGHT_DISABLE_AFTER_TIMEOUT 0
104
105// the default brightness
106#define RGB_BACKLIGHT_BRIGHTNESS 255
107
108// the default effect (RGB test)
109#define RGB_BACKLIGHT_EFFECT 255
110
111// the default effect speed (0-3)
112#define RGB_BACKLIGHT_EFFECT_SPEED 0
113
114// the default color1 and color2
115#define RGB_BACKLIGHT_COLOR_1 { .h = 0, .s = 255 }
116#define RGB_BACKLIGHT_COLOR_2 { .h = 127, .s = 255 }
117
118#define DRIVER_COUNT 2
119#define DRIVER_LED_TOTAL 128
120
121// These define which keys in the matrix are alphas/mods
122// Used for backlight effects so colors are different for
123// alphas vs. mods
124// Each value is for a row, bit 0 is column 0
125// Alpha=0 Mod=1
126#define RGB_BACKLIGHT_ALPHAS_MODS_ROW_0 0b0110000000000001
127#define RGB_BACKLIGHT_ALPHAS_MODS_ROW_1 0b0100000000000001
128#define RGB_BACKLIGHT_ALPHAS_MODS_ROW_2 0b0110000000000001
129#define RGB_BACKLIGHT_ALPHAS_MODS_ROW_3 0b0111000000000001
130#define RGB_BACKLIGHT_ALPHAS_MODS_ROW_4 0b0111111000000111
131
132#define RGB_BACKLIGHT_CAPS_LOCK_INDICATOR { .color = { .h = 0, .s = 0 }, .index = 255 }
133#define RGB_BACKLIGHT_LAYER_1_INDICATOR { .color = { .h = 0, .s = 0 }, .index = 255 }
134#define RGB_BACKLIGHT_LAYER_2_INDICATOR { .color = { .h = 0, .s = 0 }, .index = 255 }
135#define RGB_BACKLIGHT_LAYER_3_INDICATOR { .color = { .h = 0, .s = 0 }, .index = 255 }
136
137// TODO: refactor with new user EEPROM code (coming soon)
138#define EEPROM_MAGIC 0x451F
139#define EEPROM_MAGIC_ADDR 32
140// Bump this every time we change what we store
141// This will automatically reset the EEPROM with defaults
142// and avoid loading invalid data from the EEPROM
143#define EEPROM_VERSION 0x08
144#define EEPROM_VERSION_ADDR 34
145
146// Backlight config starts after EEPROM version
147#define RGB_BACKLIGHT_CONFIG_EEPROM_ADDR 35
148// Dynamic keymap starts after backlight config (35+32)
149#define DYNAMIC_KEYMAP_EEPROM_ADDR 67
150#define DYNAMIC_KEYMAP_LAYER_COUNT 4
151// Dynamic macro starts after dynamic keymaps (67+(4*5*15*2)) = (67+600)
152#define DYNAMIC_KEYMAP_MACRO_EEPROM_ADDR 667
153#define DYNAMIC_KEYMAP_MACRO_EEPROM_SIZE 398
154#define DYNAMIC_KEYMAP_MACRO_COUNT 16
diff --git a/keyboards/nk65/halconf.h b/keyboards/nk65/halconf.h
new file mode 100755
index 000000000..c3e0cbb72
--- /dev/null
+++ b/keyboards/nk65/halconf.h
@@ -0,0 +1,388 @@
1/*
2 ChibiOS - Copyright (C) 2006..2016 Giovanni Di Sirio
3
4 Licensed under the Apache License, Version 2.0 (the "License");
5 you may not use this file except in compliance with the License.
6 You may obtain a copy of the License at
7
8 http://www.apache.org/licenses/LICENSE-2.0
9
10 Unless required by applicable law or agreed to in writing, software
11 distributed under the License is distributed on an "AS IS" BASIS,
12 WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
13 See the License for the specific language governing permissions and
14 limitations under the License.
15*/
16
17/**
18 * @file templates/halconf.h
19 * @brief HAL configuration header.
20 * @details HAL configuration file, this file allows to enable or disable the
21 * various device drivers from your application. You may also use
22 * this file in order to override the device drivers default settings.
23 *
24 * @addtogroup HAL_CONF
25 * @{
26 */
27
28#ifndef HALCONF_H
29#define HALCONF_H
30
31#include "mcuconf.h"
32
33/**
34 * @brief Enables the PAL subsystem.
35 */
36#if !defined(HAL_USE_PAL) || defined(__DOXYGEN__)
37#define HAL_USE_PAL TRUE
38#endif
39
40/**
41 * @brief Enables the ADC subsystem.
42 */
43#if !defined(HAL_USE_ADC) || defined(__DOXYGEN__)
44#define HAL_USE_ADC FALSE
45#endif
46
47/**
48 * @brief Enables the CAN subsystem.
49 */
50#if !defined(HAL_USE_CAN) || defined(__DOXYGEN__)
51#define HAL_USE_CAN FALSE
52#endif
53
54/**
55 * @brief Enables the DAC subsystem.
56 */
57#if !defined(HAL_USE_DAC) || defined(__DOXYGEN__)
58#define HAL_USE_DAC TRUE
59#endif
60
61/**
62 * @brief Enables the EXT subsystem.
63 */
64#if !defined(HAL_USE_EXT) || defined(__DOXYGEN__)
65#define HAL_USE_EXT FALSE
66#endif
67
68/**
69 * @brief Enables the GPT subsystem.
70 */
71#if !defined(HAL_USE_GPT) || defined(__DOXYGEN__)
72#define HAL_USE_GPT TRUE
73#endif
74
75/**
76 * @brief Enables the I2C subsystem.
77 */
78#if !defined(HAL_USE_I2C) || defined(__DOXYGEN__)
79#define HAL_USE_I2C TRUE
80#endif
81
82/**
83 * @brief Enables the I2S subsystem.
84 */
85#if !defined(HAL_USE_I2S) || defined(__DOXYGEN__)
86#define HAL_USE_I2S FALSE
87#endif
88
89/**
90 * @brief Enables the ICU subsystem.
91 */
92#if !defined(HAL_USE_ICU) || defined(__DOXYGEN__)
93#define HAL_USE_ICU FALSE
94#endif
95
96/**
97 * @brief Enables the MAC subsystem.
98 */
99#if !defined(HAL_USE_MAC) || defined(__DOXYGEN__)
100#define HAL_USE_MAC FALSE
101#endif
102
103/**
104 * @brief Enables the MMC_SPI subsystem.
105 */
106#if !defined(HAL_USE_MMC_SPI) || defined(__DOXYGEN__)
107#define HAL_USE_MMC_SPI FALSE
108#endif
109
110/**
111 * @brief Enables the PWM subsystem.
112 */
113#if !defined(HAL_USE_PWM) || defined(__DOXYGEN__)
114#define HAL_USE_PWM FALSE
115#endif
116
117/**
118 * @brief Enables the QSPI subsystem.
119 */
120#if !defined(HAL_USE_QSPI) || defined(__DOXYGEN__)
121#define HAL_USE_QSPI FALSE
122#endif
123
124/**
125 * @brief Enables the RTC subsystem.
126 */
127#if !defined(HAL_USE_RTC) || defined(__DOXYGEN__)
128#define HAL_USE_RTC FALSE
129#endif
130
131/**
132 * @brief Enables the SDC subsystem.
133 */
134#if !defined(HAL_USE_SDC) || defined(__DOXYGEN__)
135#define HAL_USE_SDC FALSE
136#endif
137
138/**
139 * @brief Enables the SERIAL subsystem.
140 */
141#if !defined(HAL_USE_SERIAL) || defined(__DOXYGEN__)
142#define HAL_USE_SERIAL FALSE
143#endif
144
145/**
146 * @brief Enables the SERIAL over USB subsystem.
147 */
148#if !defined(HAL_USE_SERIAL_USB) || defined(__DOXYGEN__)
149#define HAL_USE_SERIAL_USB TRUE
150#endif
151
152/**
153 * @brief Enables the SPI subsystem.
154 */
155#if !defined(HAL_USE_SPI) || defined(__DOXYGEN__)
156#define HAL_USE_SPI FALSE
157#endif
158
159/**
160 * @brief Enables the UART subsystem.
161 */
162#if !defined(HAL_USE_UART) || defined(__DOXYGEN__)
163#define HAL_USE_UART FALSE
164#endif
165
166/**
167 * @brief Enables the USB subsystem.
168 */
169#if !defined(HAL_USE_USB) || defined(__DOXYGEN__)
170#define HAL_USE_USB TRUE
171#endif
172
173/**
174 * @brief Enables the WDG subsystem.
175 */
176#if !defined(HAL_USE_WDG) || defined(__DOXYGEN__)
177#define HAL_USE_WDG FALSE
178#endif
179
180/*===========================================================================*/
181/* ADC driver related settings. */
182/*===========================================================================*/
183
184/**
185 * @brief Enables synchronous APIs.
186 * @note Disabling this option saves both code and data space.
187 */
188#if !defined(ADC_USE_WAIT) || defined(__DOXYGEN__)
189#define ADC_USE_WAIT TRUE
190#endif
191
192/**
193 * @brief Enables the @p adcAcquireBus() and @p adcReleaseBus() APIs.
194 * @note Disabling this option saves both code and data space.
195 */
196#if !defined(ADC_USE_MUTUAL_EXCLUSION) || defined(__DOXYGEN__)
197#define ADC_USE_MUTUAL_EXCLUSION TRUE
198#endif
199
200/*===========================================================================*/
201/* CAN driver related settings. */
202/*===========================================================================*/
203
204/**
205 * @brief Sleep mode related APIs inclusion switch.
206 */
207#if !defined(CAN_USE_SLEEP_MODE) || defined(__DOXYGEN__)
208#define CAN_USE_SLEEP_MODE TRUE
209#endif
210
211/*===========================================================================*/
212/* I2C driver related settings. */
213/*===========================================================================*/
214
215/**
216 * @brief Enables the mutual exclusion APIs on the I2C bus.
217 */
218#if !defined(I2C_USE_MUTUAL_EXCLUSION) || defined(__DOXYGEN__)
219#define I2C_USE_MUTUAL_EXCLUSION TRUE
220#endif
221
222/*===========================================================================*/
223/* MAC driver related settings. */
224/*===========================================================================*/
225
226/**
227 * @brief Enables an event sources for incoming packets.
228 */
229#if !defined(MAC_USE_ZERO_COPY) || defined(__DOXYGEN__)
230#define MAC_USE_ZERO_COPY FALSE
231#endif
232
233/**
234 * @brief Enables an event sources for incoming packets.
235 */
236#if !defined(MAC_USE_EVENTS) || defined(__DOXYGEN__)
237#define MAC_USE_EVENTS TRUE
238#endif
239
240/*===========================================================================*/
241/* MMC_SPI driver related settings. */
242/*===========================================================================*/
243
244/**
245 * @brief Delays insertions.
246 * @details If enabled this options inserts delays into the MMC waiting
247 * routines releasing some extra CPU time for the threads with
248 * lower priority, this may slow down the driver a bit however.
249 * This option is recommended also if the SPI driver does not
250 * use a DMA channel and heavily loads the CPU.
251 */
252#if !defined(MMC_NICE_WAITING) || defined(__DOXYGEN__)
253#define MMC_NICE_WAITING TRUE
254#endif
255
256/*===========================================================================*/
257/* SDC driver related settings. */
258/*===========================================================================*/
259
260/**
261 * @brief Number of initialization attempts before rejecting the card.
262 * @note Attempts are performed at 10mS intervals.
263 */
264#if !defined(SDC_INIT_RETRY) || defined(__DOXYGEN__)
265#define SDC_INIT_RETRY 100
266#endif
267
268/**
269 * @brief Include support for MMC cards.
270 * @note MMC support is not yet implemented so this option must be kept
271 * at @p FALSE.
272 */
273#if !defined(SDC_MMC_SUPPORT) || defined(__DOXYGEN__)
274#define SDC_MMC_SUPPORT FALSE
275#endif
276
277/**
278 * @brief Delays insertions.
279 * @details If enabled this options inserts delays into the MMC waiting
280 * routines releasing some extra CPU time for the threads with
281 * lower priority, this may slow down the driver a bit however.
282 */
283#if !defined(SDC_NICE_WAITING) || defined(__DOXYGEN__)
284#define SDC_NICE_WAITING TRUE
285#endif
286
287/*===========================================================================*/
288/* SERIAL driver related settings. */
289/*===========================================================================*/
290
291/**
292 * @brief Default bit rate.
293 * @details Configuration parameter, this is the baud rate selected for the
294 * default configuration.
295 */
296#if !defined(SERIAL_DEFAULT_BITRATE) || defined(__DOXYGEN__)
297#define SERIAL_DEFAULT_BITRATE 38400
298#endif
299
300/**
301 * @brief Serial buffers size.
302 * @details Configuration parameter, you can change the depth of the queue
303 * buffers depending on the requirements of your application.
304 * @note The default is 16 bytes for both the transmission and receive
305 * buffers.
306 */
307#if !defined(SERIAL_BUFFERS_SIZE) || defined(__DOXYGEN__)
308#define SERIAL_BUFFERS_SIZE 16
309#endif
310
311/*===========================================================================*/
312/* SERIAL_USB driver related setting. */
313/*===========================================================================*/
314
315/**
316 * @brief Serial over USB buffers size.
317 * @details Configuration parameter, the buffer size must be a multiple of
318 * the USB data endpoint maximum packet size.
319 * @note The default is 256 bytes for both the transmission and receive
320 * buffers.
321 */
322#if !defined(SERIAL_USB_BUFFERS_SIZE) || defined(__DOXYGEN__)
323#define SERIAL_USB_BUFFERS_SIZE 1
324#endif
325
326/**
327 * @brief Serial over USB number of buffers.
328 * @note The default is 2 buffers.
329 */
330#if !defined(SERIAL_USB_BUFFERS_NUMBER) || defined(__DOXYGEN__)
331#define SERIAL_USB_BUFFERS_NUMBER 2
332#endif
333
334/*===========================================================================*/
335/* SPI driver related settings. */
336/*===========================================================================*/
337
338/**
339 * @brief Enables synchronous APIs.
340 * @note Disabling this option saves both code and data space.
341 */
342#if !defined(SPI_USE_WAIT) || defined(__DOXYGEN__)
343#define SPI_USE_WAIT TRUE
344#endif
345
346/**
347 * @brief Enables the @p spiAcquireBus() and @p spiReleaseBus() APIs.
348 * @note Disabling this option saves both code and data space.
349 */
350#if !defined(SPI_USE_MUTUAL_EXCLUSION) || defined(__DOXYGEN__)
351#define SPI_USE_MUTUAL_EXCLUSION TRUE
352#endif
353
354/*===========================================================================*/
355/* UART driver related settings. */
356/*===========================================================================*/
357
358/**
359 * @brief Enables synchronous APIs.
360 * @note Disabling this option saves both code and data space.
361 */
362#if !defined(UART_USE_WAIT) || defined(__DOXYGEN__)
363#define UART_USE_WAIT FALSE
364#endif
365
366/**
367 * @brief Enables the @p uartAcquireBus() and @p uartReleaseBus() APIs.
368 * @note Disabling this option saves both code and data space.
369 */
370#if !defined(UART_USE_MUTUAL_EXCLUSION) || defined(__DOXYGEN__)
371#define UART_USE_MUTUAL_EXCLUSION FALSE
372#endif
373
374/*===========================================================================*/
375/* USB driver related settings. */
376/*===========================================================================*/
377
378/**
379 * @brief Enables synchronous APIs.
380 * @note Disabling this option saves both code and data space.
381 */
382#if !defined(USB_USE_WAIT) || defined(__DOXYGEN__)
383#define USB_USE_WAIT TRUE
384#endif
385
386#endif /* HALCONF_H */
387
388/** @} */
diff --git a/keyboards/nk65/info.json b/keyboards/nk65/info.json
new file mode 100755
index 000000000..ea227f71d
--- /dev/null
+++ b/keyboards/nk65/info.json
@@ -0,0 +1,12 @@
1{
2 "keyboard_name": "NK65",
3 "url": "",
4 "maintainer": "yiancar",
5 "width": 16,
6 "height": 5,
7 "layouts": {
8 "LAYOUT": {
9 "layout": [{"label":"Esc", "x":0, "y":0}, {"label":"!", "x":1, "y":0}, {"label":"@", "x":2, "y":0}, {"label":"#", "x":3, "y":0}, {"label":"$", "x":4, "y":0}, {"label":"%", "x":5, "y":0}, {"label":"^", "x":6, "y":0}, {"label":"&", "x":7, "y":0}, {"label":"*", "x":8, "y":0}, {"label":"(", "x":9, "y":0}, {"label":")", "x":10, "y":0}, {"label":"_", "x":11, "y":0}, {"label":"+", "x":12, "y":0}, {"label":"Backspace", "x":13, "y":0, "w":2}, {"label":"Home", "x":15, "y":0}, {"label":"Tab", "x":0, "y":1, "w":1.5}, {"label":"Q", "x":1.5, "y":1}, {"label":"W", "x":2.5, "y":1}, {"label":"E", "x":3.5, "y":1}, {"label":"R", "x":4.5, "y":1}, {"label":"T", "x":5.5, "y":1}, {"label":"Y", "x":6.5, "y":1}, {"label":"U", "x":7.5, "y":1}, {"label":"I", "x":8.5, "y":1}, {"label":"O", "x":9.5, "y":1}, {"label":"P", "x":10.5, "y":1}, {"label":"{", "x":11.5, "y":1}, {"label":"}", "x":12.5, "y":1}, {"label":"|", "x":13.5, "y":1, "w":1.5}, {"label":"Page Up", "x":15, "y":1}, {"label":"Caps Lock", "x":0, "y":2, "w":1.75}, {"label":"A", "x":1.75, "y":2}, {"label":"S", "x":2.75, "y":2}, {"label":"D", "x":3.75, "y":2}, {"label":"F", "x":4.75, "y":2}, {"label":"G", "x":5.75, "y":2}, {"label":"H", "x":6.75, "y":2}, {"label":"J", "x":7.75, "y":2}, {"label":"K", "x":8.75, "y":2}, {"label":"L", "x":9.75, "y":2}, {"label":":", "x":10.75, "y":2}, {"label":"\"", "x":11.75, "y":2}, {"label":"Enter", "x":12.75, "y":2, "w":2.25}, {"label":"Page Down", "x":15, "y":2}, {"label":"Shift", "x":0, "y":3, "w":2.25}, {"label":"Z", "x":2.25, "y":3}, {"label":"X", "x":3.25, "y":3}, {"label":"C", "x":4.25, "y":3}, {"label":"V", "x":5.25, "y":3}, {"label":"B", "x":6.25, "y":3}, {"label":"N", "x":7.25, "y":3}, {"label":"M", "x":8.25, "y":3}, {"label":"<", "x":9.25, "y":3}, {"label":">", "x":10.25, "y":3}, {"label":"?", "x":11.25, "y":3}, {"label":"Shift", "x":12.25, "y":3, "w":1.75}, {"label":"\u2191", "x":14, "y":3}, {"label":"End", "x":15, "y":3}, {"label":"Ctrl", "x":0, "y":4, "w":1.25}, {"label":"Win", "x":1.25, "y":4, "w":1.25}, {"label":"Alt", "x":2.5, "y":4, "w":1.25}, {"x":3.75, "y":4, "w":6.25}, {"label":"Alt", "x":10, "y":4}, {"label":"Fn", "x":11, "y":4}, {"label":"Ctrl", "x":12, "y":4}, {"label":"\u2190", "x":13, "y":4}, {"label":"\u2193", "x":14, "y":4}, {"label":"\u2192", "x":15, "y":4}]
10 }
11 }
12} \ No newline at end of file
diff --git a/keyboards/nk65/keymaps/default/keymap.c b/keyboards/nk65/keymaps/default/keymap.c
new file mode 100755
index 000000000..a793a8bf4
--- /dev/null
+++ b/keyboards/nk65/keymaps/default/keymap.c
@@ -0,0 +1,58 @@
1/* Copyright 2019 Yiancar
2 *
3 * This program is free software: you can redistribute it and/or modify
4 * it under the terms of the GNU General Public License as published by
5 * the Free Software Foundation, either version 2 of the License, or
6 * (at your option) any later version.
7 *
8 * This program is distributed in the hope that it will be useful,
9 * but WITHOUT ANY WARRANTY; without even the implied warranty of
10 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
11 * GNU General Public License for more details.
12 *
13 * You should have received a copy of the GNU General Public License
14 * along with this program. If not, see <http://www.gnu.org/licenses/>.
15 */
16#include QMK_KEYBOARD_H
17
18const uint16_t PROGMEM keymaps[][MATRIX_ROWS][MATRIX_COLS] = {
19[0] = LAYOUT_65_ansi( /* Base */
20 KC_GESC, KC_1, KC_2, KC_3, KC_4, KC_5, KC_6, KC_7, KC_8, KC_9, KC_0, KC_MINS, KC_EQL, KC_BSPC, KC_HOME,\
21 KC_TAB, KC_Q, KC_W, KC_E, KC_R, KC_T, KC_Y, KC_U, KC_I, KC_O, KC_P, KC_LBRC, KC_RBRC, KC_BSLS, KC_PGUP,\
22 KC_CAPS, KC_A, KC_S, KC_D, KC_F, KC_G, KC_H, KC_J, KC_K, KC_L, KC_SCLN, KC_QUOT, KC_ENT, KC_PGDN,\
23 KC_LSFT, KC_Z, KC_X, KC_C, KC_V, KC_B, KC_N, KC_M, KC_COMM, KC_DOT, KC_SLSH, KC_RSFT, KC_UP, KC_END, \
24 KC_LCTL, KC_LGUI, KC_LALT, KC_SPC, KC_RALT, MO(1), KC_RCTL, KC_LEFT, KC_DOWN, KC_RGHT),
25
26[1] = LAYOUT_65_ansi( /* FN */
27 KC_GRV, KC_F1, KC_F2, KC_F3, KC_F4, KC_F5, KC_F6, KC_F7, KC_F8, KC_F9, KC_F10, KC_F11, KC_F12, KC_DEL, KC_TRNS,\
28 KC_TRNS, KC_TRNS, KC_TRNS, KC_TRNS, KC_TRNS, KC_TRNS, KC_TRNS, KC_TRNS, KC_TRNS, KC_TRNS, KC_TRNS, KC_TRNS, KC_TRNS, RESET, KC_TRNS,\
29 KC_TRNS, KC_TRNS, KC_TRNS, KC_TRNS, S1_DEC, S1_INC, S2_DEC, S2_INC, KC_TRNS, KC_TRNS, KC_TRNS, KC_TRNS, KC_TRNS, KC_TRNS,\
30 KC_TRNS, EF_DEC, EF_INC, H1_DEC, H1_INC, H2_DEC, H2_INC, BR_DEC, BR_INC, ES_DEC, ES_INC, KC_TRNS, KC_TRNS, KC_TRNS,\
31 KC_VOLU, KC_VOLD, KC_MUTE, KC_TRNS, KC_TRNS, KC_TRNS, KC_TRNS, KC_TRNS, KC_TRNS, KC_TRNS),
32
33[2] = LAYOUT_65_ansi( /* Empty for dynamic keymaps */
34 KC_TRNS, KC_TRNS, KC_TRNS, KC_TRNS, KC_TRNS, KC_TRNS, KC_TRNS, KC_TRNS, KC_TRNS, KC_TRNS, KC_TRNS, KC_TRNS, KC_TRNS, KC_TRNS, KC_TRNS,\
35 KC_TRNS, KC_TRNS, KC_TRNS, KC_TRNS, KC_TRNS, KC_TRNS, KC_TRNS, KC_TRNS, KC_TRNS, KC_TRNS, KC_TRNS, KC_TRNS, KC_TRNS, KC_TRNS, KC_TRNS,\
36 KC_TRNS, KC_TRNS, KC_TRNS, KC_TRNS, KC_TRNS, KC_TRNS, KC_TRNS, KC_TRNS, KC_TRNS, KC_TRNS, KC_TRNS, KC_TRNS, KC_TRNS, KC_TRNS,\
37 KC_TRNS, KC_TRNS, KC_TRNS, KC_TRNS, KC_TRNS, KC_TRNS, KC_TRNS, KC_TRNS, KC_TRNS, KC_TRNS, KC_TRNS, KC_TRNS, KC_TRNS, KC_TRNS,\
38 KC_TRNS, KC_TRNS, KC_TRNS, KC_TRNS, KC_TRNS, KC_TRNS, KC_TRNS, KC_TRNS, KC_TRNS, KC_TRNS),
39
40[3] = LAYOUT_65_ansi( /* Empty for dynamic keymaps */
41 KC_TRNS, KC_TRNS, KC_TRNS, KC_TRNS, KC_TRNS, KC_TRNS, KC_TRNS, KC_TRNS, KC_TRNS, KC_TRNS, KC_TRNS, KC_TRNS, KC_TRNS, KC_TRNS, KC_TRNS,\
42 KC_TRNS, KC_TRNS, KC_TRNS, KC_TRNS, KC_TRNS, KC_TRNS, KC_TRNS, KC_TRNS, KC_TRNS, KC_TRNS, KC_TRNS, KC_TRNS, KC_TRNS, KC_TRNS, KC_TRNS,\
43 KC_TRNS, KC_TRNS, KC_TRNS, KC_TRNS, KC_TRNS, KC_TRNS, KC_TRNS, KC_TRNS, KC_TRNS, KC_TRNS, KC_TRNS, KC_TRNS, KC_TRNS, KC_TRNS,\
44 KC_TRNS, KC_TRNS, KC_TRNS, KC_TRNS, KC_TRNS, KC_TRNS, KC_TRNS, KC_TRNS, KC_TRNS, KC_TRNS, KC_TRNS, KC_TRNS, KC_TRNS, KC_TRNS,\
45 KC_TRNS, KC_TRNS, KC_TRNS, KC_TRNS, KC_TRNS, KC_TRNS, KC_TRNS, KC_TRNS, KC_TRNS, KC_TRNS),
46};
47
48void matrix_init_user(void) {
49 //user initialization
50}
51
52void matrix_scan_user(void) {
53 //user matrix
54}
55
56bool process_record_user(uint16_t keycode, keyrecord_t *record) {
57 return true;
58} \ No newline at end of file
diff --git a/keyboards/nk65/keymaps/default/readme.md b/keyboards/nk65/keymaps/default/readme.md
new file mode 100755
index 000000000..27bcd0501
--- /dev/null
+++ b/keyboards/nk65/keymaps/default/readme.md
@@ -0,0 +1,6 @@
1The default keymap for NK65. VIA support disabled.
2=========================================================
3
4![Layout image](https://i.imgur.com/DL0CjJO.png)
5
6Default layer is normal ANSI 65% \ No newline at end of file
diff --git a/keyboards/nk65/keymaps/default_via/keymap.c b/keyboards/nk65/keymaps/default_via/keymap.c
new file mode 100755
index 000000000..a793a8bf4
--- /dev/null
+++ b/keyboards/nk65/keymaps/default_via/keymap.c
@@ -0,0 +1,58 @@
1/* Copyright 2019 Yiancar
2 *
3 * This program is free software: you can redistribute it and/or modify
4 * it under the terms of the GNU General Public License as published by
5 * the Free Software Foundation, either version 2 of the License, or
6 * (at your option) any later version.
7 *
8 * This program is distributed in the hope that it will be useful,
9 * but WITHOUT ANY WARRANTY; without even the implied warranty of
10 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
11 * GNU General Public License for more details.
12 *
13 * You should have received a copy of the GNU General Public License
14 * along with this program. If not, see <http://www.gnu.org/licenses/>.
15 */
16#include QMK_KEYBOARD_H
17
18const uint16_t PROGMEM keymaps[][MATRIX_ROWS][MATRIX_COLS] = {
19[0] = LAYOUT_65_ansi( /* Base */
20 KC_GESC, KC_1, KC_2, KC_3, KC_4, KC_5, KC_6, KC_7, KC_8, KC_9, KC_0, KC_MINS, KC_EQL, KC_BSPC, KC_HOME,\
21 KC_TAB, KC_Q, KC_W, KC_E, KC_R, KC_T, KC_Y, KC_U, KC_I, KC_O, KC_P, KC_LBRC, KC_RBRC, KC_BSLS, KC_PGUP,\
22 KC_CAPS, KC_A, KC_S, KC_D, KC_F, KC_G, KC_H, KC_J, KC_K, KC_L, KC_SCLN, KC_QUOT, KC_ENT, KC_PGDN,\
23 KC_LSFT, KC_Z, KC_X, KC_C, KC_V, KC_B, KC_N, KC_M, KC_COMM, KC_DOT, KC_SLSH, KC_RSFT, KC_UP, KC_END, \
24 KC_LCTL, KC_LGUI, KC_LALT, KC_SPC, KC_RALT, MO(1), KC_RCTL, KC_LEFT, KC_DOWN, KC_RGHT),
25
26[1] = LAYOUT_65_ansi( /* FN */
27 KC_GRV, KC_F1, KC_F2, KC_F3, KC_F4, KC_F5, KC_F6, KC_F7, KC_F8, KC_F9, KC_F10, KC_F11, KC_F12, KC_DEL, KC_TRNS,\
28 KC_TRNS, KC_TRNS, KC_TRNS, KC_TRNS, KC_TRNS, KC_TRNS, KC_TRNS, KC_TRNS, KC_TRNS, KC_TRNS, KC_TRNS, KC_TRNS, KC_TRNS, RESET, KC_TRNS,\
29 KC_TRNS, KC_TRNS, KC_TRNS, KC_TRNS, S1_DEC, S1_INC, S2_DEC, S2_INC, KC_TRNS, KC_TRNS, KC_TRNS, KC_TRNS, KC_TRNS, KC_TRNS,\
30 KC_TRNS, EF_DEC, EF_INC, H1_DEC, H1_INC, H2_DEC, H2_INC, BR_DEC, BR_INC, ES_DEC, ES_INC, KC_TRNS, KC_TRNS, KC_TRNS,\
31 KC_VOLU, KC_VOLD, KC_MUTE, KC_TRNS, KC_TRNS, KC_TRNS, KC_TRNS, KC_TRNS, KC_TRNS, KC_TRNS),
32
33[2] = LAYOUT_65_ansi( /* Empty for dynamic keymaps */
34 KC_TRNS, KC_TRNS, KC_TRNS, KC_TRNS, KC_TRNS, KC_TRNS, KC_TRNS, KC_TRNS, KC_TRNS, KC_TRNS, KC_TRNS, KC_TRNS, KC_TRNS, KC_TRNS, KC_TRNS,\
35 KC_TRNS, KC_TRNS, KC_TRNS, KC_TRNS, KC_TRNS, KC_TRNS, KC_TRNS, KC_TRNS, KC_TRNS, KC_TRNS, KC_TRNS, KC_TRNS, KC_TRNS, KC_TRNS, KC_TRNS,\
36 KC_TRNS, KC_TRNS, KC_TRNS, KC_TRNS, KC_TRNS, KC_TRNS, KC_TRNS, KC_TRNS, KC_TRNS, KC_TRNS, KC_TRNS, KC_TRNS, KC_TRNS, KC_TRNS,\
37 KC_TRNS, KC_TRNS, KC_TRNS, KC_TRNS, KC_TRNS, KC_TRNS, KC_TRNS, KC_TRNS, KC_TRNS, KC_TRNS, KC_TRNS, KC_TRNS, KC_TRNS, KC_TRNS,\
38 KC_TRNS, KC_TRNS, KC_TRNS, KC_TRNS, KC_TRNS, KC_TRNS, KC_TRNS, KC_TRNS, KC_TRNS, KC_TRNS),
39
40[3] = LAYOUT_65_ansi( /* Empty for dynamic keymaps */
41 KC_TRNS, KC_TRNS, KC_TRNS, KC_TRNS, KC_TRNS, KC_TRNS, KC_TRNS, KC_TRNS, KC_TRNS, KC_TRNS, KC_TRNS, KC_TRNS, KC_TRNS, KC_TRNS, KC_TRNS,\
42 KC_TRNS, KC_TRNS, KC_TRNS, KC_TRNS, KC_TRNS, KC_TRNS, KC_TRNS, KC_TRNS, KC_TRNS, KC_TRNS, KC_TRNS, KC_TRNS, KC_TRNS, KC_TRNS, KC_TRNS,\
43 KC_TRNS, KC_TRNS, KC_TRNS, KC_TRNS, KC_TRNS, KC_TRNS, KC_TRNS, KC_TRNS, KC_TRNS, KC_TRNS, KC_TRNS, KC_TRNS, KC_TRNS, KC_TRNS,\
44 KC_TRNS, KC_TRNS, KC_TRNS, KC_TRNS, KC_TRNS, KC_TRNS, KC_TRNS, KC_TRNS, KC_TRNS, KC_TRNS, KC_TRNS, KC_TRNS, KC_TRNS, KC_TRNS,\
45 KC_TRNS, KC_TRNS, KC_TRNS, KC_TRNS, KC_TRNS, KC_TRNS, KC_TRNS, KC_TRNS, KC_TRNS, KC_TRNS),
46};
47
48void matrix_init_user(void) {
49 //user initialization
50}
51
52void matrix_scan_user(void) {
53 //user matrix
54}
55
56bool process_record_user(uint16_t keycode, keyrecord_t *record) {
57 return true;
58} \ No newline at end of file
diff --git a/keyboards/nk65/keymaps/default_via/readme.md b/keyboards/nk65/keymaps/default_via/readme.md
new file mode 100755
index 000000000..6689191e4
--- /dev/null
+++ b/keyboards/nk65/keymaps/default_via/readme.md
@@ -0,0 +1,6 @@
1The default keymap for NK65. VIA support enabled.
2=========================================================
3
4![Layout image](https://i.imgur.com/DL0CjJO.png)
5
6Default layer is normal ANSI 65% \ No newline at end of file
diff --git a/keyboards/nk65/keymaps/default_via/rules.mk b/keyboards/nk65/keymaps/default_via/rules.mk
new file mode 100755
index 000000000..deb4fc889
--- /dev/null
+++ b/keyboards/nk65/keymaps/default_via/rules.mk
@@ -0,0 +1,67 @@
1# project specific files
2SRC = keyboards/zeal60/zeal60.c \
3 keyboards/zeal60/rgb_backlight.c \
4 drivers/issi/is31fl3733.c \
5 quantum/color.c \
6 drivers/arm/i2c_master.c
7
8## chip/board settings
9# the next two should match the directories in
10# <chibios>/os/hal/ports/$(MCU_FAMILY)/$(MCU_SERIES)
11MCU_FAMILY = STM32
12MCU_SERIES = STM32F3xx
13
14# Linker script to use
15# it should exist either in <chibios>/os/common/ports/ARMCMx/compilers/GCC/ld/
16# or <this_dir>/ld/
17MCU_LDSCRIPT = STM32F303xC
18
19# Startup code to use
20# - it should exist in <chibios>/os/common/startup/ARMCMx/compilers/GCC/mk/
21MCU_STARTUP = stm32f3xx
22
23# Board: it should exist either in <chibios>/os/hal/boards/
24# or <this_dir>/boards
25BOARD = GENERIC_STM32_F303XC
26
27# Cortex version
28MCU = cortex-m4
29
30# ARM version, CORTEX-M0/M1 are 6, CORTEX-M3/M4/M7 are 7
31ARMV = 7
32
33USE_FPU = yes
34
35# Vector table for application
36# 0x00000000-0x00001000 area is occupied by bootlaoder.*/
37# The CORTEX_VTOR... is needed only for MCHCK/Infinity KB
38# OPT_DEFS = -DCORTEX_VTOR_INIT=0x08005000
39OPT_DEFS =
40
41# Do not put the microcontroller into power saving mode
42# when we get USB suspend event. We want it to keep updating
43# backlight effects.
44OPT_DEFS += -DNO_SUSPEND_POWER_DOWN
45
46# Options to pass to dfu-util when flashing
47DFU_ARGS = -d 0483:df11 -a 0 -s 0x08000000:leave
48DFU_SUFFIX_ARGS = -p DF11 -v 0483
49
50# Build Options
51# comment out to disable the options.
52#
53BACKLIGHT_ENABLE = no # Enable keyboard backlight functionality
54BOOTMAGIC_ENABLE = no # Virtual DIP switch configuration
55MOUSEKEY_ENABLE = yes # Mouse keys
56EXTRAKEY_ENABLE = yes # Audio control and System control
57CONSOLE_ENABLE = no # Console for debug
58COMMAND_ENABLE = no # Commands for debug and configuration
59SLEEP_LED_ENABLE = no # Breathing sleep LED during USB suspend
60NKRO_ENABLE = yes # USB Nkey Rollover
61AUDIO_ENABLE = no # Audio output on port C6
62NO_USB_STARTUP_CHECK = no # Disable initialization only when usb is plugged in
63#SERIAL_LINK_ENABLE = yes
64
65RAW_ENABLE = yes
66DYNAMIC_KEYMAP_ENABLE = yes
67CIE1931_CURVE = yes
diff --git a/keyboards/nk65/mcuconf.h b/keyboards/nk65/mcuconf.h
new file mode 100755
index 000000000..ce608f904
--- /dev/null
+++ b/keyboards/nk65/mcuconf.h
@@ -0,0 +1,257 @@
1/*
2 ChibiOS - Copyright (C) 2006..2016 Giovanni Di Sirio
3
4 Licensed under the Apache License, Version 2.0 (the "License");
5 you may not use this file except in compliance with the License.
6 You may obtain a copy of the License at
7
8 http://www.apache.org/licenses/LICENSE-2.0
9
10 Unless required by applicable law or agreed to in writing, software
11 distributed under the License is distributed on an "AS IS" BASIS,
12 WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
13 See the License for the specific language governing permissions and
14 limitations under the License.
15*/
16
17#ifndef MCUCONF_H
18#define MCUCONF_H
19
20/*
21 * STM32F3xx drivers configuration.
22 * The following settings override the default settings present in
23 * the various device driver implementation headers.
24 * Note that the settings for each driver only have effect if the whole
25 * driver is enabled in halconf.h.
26 *
27 * IRQ priorities:
28 * 15...0 Lowest...Highest.
29 *
30 * DMA priorities:
31 * 0...3 Lowest...Highest.
32 */
33
34#define STM32F3xx_MCUCONF
35
36/*
37 * HAL driver system settings.
38 */
39#define STM32_NO_INIT FALSE
40#define STM32_PVD_ENABLE FALSE
41#define STM32_PLS STM32_PLS_LEV0
42#define STM32_HSI_ENABLED TRUE
43#define STM32_LSI_ENABLED TRUE
44#define STM32_HSE_ENABLED TRUE
45#define STM32_LSE_ENABLED FALSE
46#define STM32_SW STM32_SW_PLL
47#define STM32_PLLSRC STM32_PLLSRC_HSE
48#define STM32_PREDIV_VALUE 1
49#define STM32_PLLMUL_VALUE 9
50#define STM32_HPRE STM32_HPRE_DIV1
51#define STM32_PPRE1 STM32_PPRE1_DIV2
52#define STM32_PPRE2 STM32_PPRE2_DIV2
53#define STM32_MCOSEL STM32_MCOSEL_NOCLOCK
54#define STM32_ADC12PRES STM32_ADC12PRES_DIV1
55#define STM32_ADC34PRES STM32_ADC34PRES_DIV1
56#define STM32_USART1SW STM32_USART1SW_PCLK
57#define STM32_USART2SW STM32_USART2SW_PCLK
58#define STM32_USART3SW STM32_USART3SW_PCLK
59#define STM32_UART4SW STM32_UART4SW_PCLK
60#define STM32_UART5SW STM32_UART5SW_PCLK
61#define STM32_I2C1SW STM32_I2C1SW_SYSCLK
62#define STM32_I2C2SW STM32_I2C2SW_SYSCLK
63#define STM32_TIM1SW STM32_TIM1SW_PCLK2
64#define STM32_TIM8SW STM32_TIM8SW_PCLK2
65#define STM32_RTCSEL STM32_RTCSEL_LSI
66#define STM32_USB_CLOCK_REQUIRED TRUE
67#define STM32_USBPRE STM32_USBPRE_DIV1P5
68
69#undef STM32_HSE_BYPASS
70// #error "oh no"
71// #endif
72
73/*
74 * ADC driver system settings.
75 */
76#define STM32_ADC_DUAL_MODE FALSE
77#define STM32_ADC_COMPACT_SAMPLES FALSE
78#define STM32_ADC_USE_ADC1 FALSE
79#define STM32_ADC_USE_ADC2 FALSE
80#define STM32_ADC_USE_ADC3 FALSE
81#define STM32_ADC_USE_ADC4 FALSE
82#define STM32_ADC_ADC1_DMA_STREAM STM32_DMA_STREAM_ID(1, 1)
83#define STM32_ADC_ADC2_DMA_STREAM STM32_DMA_STREAM_ID(2, 1)
84#define STM32_ADC_ADC3_DMA_STREAM STM32_DMA_STREAM_ID(2, 5)
85#define STM32_ADC_ADC4_DMA_STREAM STM32_DMA_STREAM_ID(2, 2)
86#define STM32_ADC_ADC1_DMA_PRIORITY 2
87#define STM32_ADC_ADC2_DMA_PRIORITY 2
88#define STM32_ADC_ADC3_DMA_PRIORITY 2
89#define STM32_ADC_ADC4_DMA_PRIORITY 2
90#define STM32_ADC_ADC12_IRQ_PRIORITY 5
91#define STM32_ADC_ADC3_IRQ_PRIORITY 5
92#define STM32_ADC_ADC4_IRQ_PRIORITY 5
93#define STM32_ADC_ADC1_DMA_IRQ_PRIORITY 5
94#define STM32_ADC_ADC2_DMA_IRQ_PRIORITY 5
95#define STM32_ADC_ADC3_DMA_IRQ_PRIORITY 5
96#define STM32_ADC_ADC4_DMA_IRQ_PRIORITY 5
97#define STM32_ADC_ADC12_CLOCK_MODE ADC_CCR_CKMODE_AHB_DIV1
98#define STM32_ADC_ADC34_CLOCK_MODE ADC_CCR_CKMODE_AHB_DIV1
99
100/*
101 * CAN driver system settings.
102 */
103#define STM32_CAN_USE_CAN1 FALSE
104#define STM32_CAN_CAN1_IRQ_PRIORITY 11
105
106/*
107 * DAC driver system settings.
108 */
109#define STM32_DAC_DUAL_MODE FALSE
110#define STM32_DAC_USE_DAC1_CH1 TRUE
111#define STM32_DAC_USE_DAC1_CH2 TRUE
112#define STM32_DAC_DAC1_CH1_IRQ_PRIORITY 10
113#define STM32_DAC_DAC1_CH2_IRQ_PRIORITY 10
114#define STM32_DAC_DAC1_CH1_DMA_PRIORITY 2
115#define STM32_DAC_DAC1_CH2_DMA_PRIORITY 2
116
117/*
118 * EXT driver system settings.
119 */
120#define STM32_EXT_EXTI0_IRQ_PRIORITY 6
121#define STM32_EXT_EXTI1_IRQ_PRIORITY 6
122#define STM32_EXT_EXTI2_IRQ_PRIORITY 6
123#define STM32_EXT_EXTI3_IRQ_PRIORITY 6
124#define STM32_EXT_EXTI4_IRQ_PRIORITY 6
125#define STM32_EXT_EXTI5_9_IRQ_PRIORITY 6
126#define STM32_EXT_EXTI10_15_IRQ_PRIORITY 6
127#define STM32_EXT_EXTI16_IRQ_PRIORITY 6
128#define STM32_EXT_EXTI17_IRQ_PRIORITY 6
129#define STM32_EXT_EXTI18_IRQ_PRIORITY 6
130#define STM32_EXT_EXTI19_IRQ_PRIORITY 6
131#define STM32_EXT_EXTI20_IRQ_PRIORITY 6
132#define STM32_EXT_EXTI21_22_29_IRQ_PRIORITY 6
133#define STM32_EXT_EXTI30_32_IRQ_PRIORITY 6
134#define STM32_EXT_EXTI33_IRQ_PRIORITY 6
135
136/*
137 * GPT driver system settings.
138 */
139#define STM32_GPT_USE_TIM1 FALSE
140#define STM32_GPT_USE_TIM2 FALSE
141#define STM32_GPT_USE_TIM3 FALSE
142#define STM32_GPT_USE_TIM4 TRUE
143#define STM32_GPT_USE_TIM6 TRUE
144#define STM32_GPT_USE_TIM7 TRUE
145#define STM32_GPT_USE_TIM8 TRUE
146#define STM32_GPT_TIM1_IRQ_PRIORITY 7
147#define STM32_GPT_TIM2_IRQ_PRIORITY 7
148#define STM32_GPT_TIM3_IRQ_PRIORITY 7
149#define STM32_GPT_TIM4_IRQ_PRIORITY 7
150#define STM32_GPT_TIM6_IRQ_PRIORITY 7
151#define STM32_GPT_TIM7_IRQ_PRIORITY 7
152#define STM32_GPT_TIM8_IRQ_PRIORITY 7
153
154/*
155 * I2C driver system settings.
156 */
157#define STM32_I2C_USE_I2C1 TRUE
158#define STM32_I2C_USE_I2C2 FALSE
159#define STM32_I2C_BUSY_TIMEOUT 50
160#define STM32_I2C_I2C1_IRQ_PRIORITY 10
161#define STM32_I2C_I2C2_IRQ_PRIORITY 10
162#define STM32_I2C_USE_DMA TRUE
163#define STM32_I2C_I2C1_DMA_PRIORITY 1
164#define STM32_I2C_I2C2_DMA_PRIORITY 1
165#define STM32_I2C_DMA_ERROR_HOOK(i2cp) osalSysHalt("DMA failure")
166
167/*
168 * ICU driver system settings.
169 */
170#define STM32_ICU_USE_TIM1 FALSE
171#define STM32_ICU_USE_TIM2 FALSE
172#define STM32_ICU_USE_TIM3 FALSE
173#define STM32_ICU_USE_TIM4 FALSE
174#define STM32_ICU_USE_TIM8 FALSE
175#define STM32_ICU_TIM1_IRQ_PRIORITY 7
176#define STM32_ICU_TIM2_IRQ_PRIORITY 7
177#define STM32_ICU_TIM3_IRQ_PRIORITY 7
178#define STM32_ICU_TIM4_IRQ_PRIORITY 7
179#define STM32_ICU_TIM8_IRQ_PRIORITY 7
180
181/*
182 * PWM driver system settings.
183 */
184#define STM32_PWM_USE_ADVANCED FALSE
185#define STM32_PWM_USE_TIM1 FALSE
186#define STM32_PWM_USE_TIM2 FALSE
187#define STM32_PWM_USE_TIM3 FALSE
188#define STM32_PWM_USE_TIM4 FALSE
189#define STM32_PWM_USE_TIM8 FALSE
190#define STM32_PWM_TIM1_IRQ_PRIORITY 7
191#define STM32_PWM_TIM2_IRQ_PRIORITY 7
192#define STM32_PWM_TIM3_IRQ_PRIORITY 7
193#define STM32_PWM_TIM4_IRQ_PRIORITY 7
194#define STM32_PWM_TIM8_IRQ_PRIORITY 7
195
196/*
197 * SERIAL driver system settings.
198 */
199#define STM32_SERIAL_USE_USART1 FALSE
200#define STM32_SERIAL_USE_USART2 FALSE
201#define STM32_SERIAL_USE_USART3 FALSE
202#define STM32_SERIAL_USE_UART4 FALSE
203#define STM32_SERIAL_USE_UART5 FALSE
204#define STM32_SERIAL_USART1_PRIORITY 12
205#define STM32_SERIAL_USART2_PRIORITY 12
206#define STM32_SERIAL_USART3_PRIORITY 12
207#define STM32_SERIAL_UART4_PRIORITY 12
208#define STM32_SERIAL_UART5_PRIORITY 12
209
210/*
211 * SPI driver system settings.
212 */
213#define STM32_SPI_USE_SPI1 FALSE
214#define STM32_SPI_USE_SPI2 FALSE
215#define STM32_SPI_USE_SPI3 FALSE
216#define STM32_SPI_SPI1_DMA_PRIORITY 1
217#define STM32_SPI_SPI2_DMA_PRIORITY 1
218#define STM32_SPI_SPI3_DMA_PRIORITY 1
219#define STM32_SPI_SPI1_IRQ_PRIORITY 10
220#define STM32_SPI_SPI2_IRQ_PRIORITY 10
221#define STM32_SPI_SPI3_IRQ_PRIORITY 10
222#define STM32_SPI_DMA_ERROR_HOOK(spip) osalSysHalt("DMA failure")
223
224/*
225 * ST driver system settings.
226 */
227#define STM32_ST_IRQ_PRIORITY 8
228#define STM32_ST_USE_TIMER 2
229
230/*
231 * UART driver system settings.
232 */
233#define STM32_UART_USE_USART1 FALSE
234#define STM32_UART_USE_USART2 FALSE
235#define STM32_UART_USE_USART3 FALSE
236#define STM32_UART_USART1_IRQ_PRIORITY 12
237#define STM32_UART_USART2_IRQ_PRIORITY 12
238#define STM32_UART_USART3_IRQ_PRIORITY 12
239#define STM32_UART_USART1_DMA_PRIORITY 0
240#define STM32_UART_USART2_DMA_PRIORITY 0
241#define STM32_UART_USART3_DMA_PRIORITY 0
242#define STM32_UART_DMA_ERROR_HOOK(uartp) osalSysHalt("DMA failure")
243
244/*
245 * USB driver system settings.
246 */
247#define STM32_USB_USE_USB1 TRUE
248#define STM32_USB_LOW_POWER_ON_SUSPEND FALSE
249#define STM32_USB_USB1_HP_IRQ_PRIORITY 13
250#define STM32_USB_USB1_LP_IRQ_PRIORITY 14
251
252/*
253 * WDG driver system settings.
254 */
255#define STM32_WDG_USE_IWDG FALSE
256
257#endif /* MCUCONF_H */
diff --git a/keyboards/nk65/nk65.c b/keyboards/nk65/nk65.c
new file mode 100755
index 000000000..495246218
--- /dev/null
+++ b/keyboards/nk65/nk65.c
@@ -0,0 +1,18 @@
1/* Copyright 2019 Yiancar
2 *
3 * This program is free software: you can redistribute it and/or modify
4 * it under the terms of the GNU General Public License as published by
5 * the Free Software Foundation, either version 2 of the License, or
6 * (at your option) any later version.
7 *
8 * This program is distributed in the hope that it will be useful,
9 * but WITHOUT ANY WARRANTY; without even the implied warranty of
10 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
11 * GNU General Public License for more details.
12 *
13 * You should have received a copy of the GNU General Public License
14 * along with this program. If not, see <http://www.gnu.org/licenses/>.
15 */
16 #ifndef RGB_BACKLIGHT_NK65
17 #error RGB_BACKLIGHT_NK65 not defined, recheck config.h
18 #endif
diff --git a/keyboards/nk65/nk65.h b/keyboards/nk65/nk65.h
new file mode 100755
index 000000000..e45360541
--- /dev/null
+++ b/keyboards/nk65/nk65.h
@@ -0,0 +1,38 @@
1/* Copyright 2019 Yiancar
2 *
3 * This program is free software: you can redistribute it and/or modify
4 * it under the terms of the GNU General Public License as published by
5 * the Free Software Foundation, either version 2 of the License, or
6 * (at your option) any later version.
7 *
8 * This program is distributed in the hope that it will be useful,
9 * but WITHOUT ANY WARRANTY; without even the implied warranty of
10 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
11 * GNU General Public License for more details.
12 *
13 * You should have received a copy of the GNU General Public License
14 * along with this program. If not, see <http://www.gnu.org/licenses/>.
15 */
16#pragma once
17
18#define XXX KC_NO
19
20#include "quantum.h"
21#include "../zeal60/rgb_backlight_keycodes.h"
22#include "../zeal60/zeal60_keycodes.h"
23
24// This a shortcut to help you visually see your layout.
25
26#define LAYOUT_65_ansi( \
27 K00, K01, K02, K03, K04, K05, K06, K07, K08, K09, K0A, K0B, K0C, K0D, K0E, \
28 K10, K11, K12, K13, K14, K15, K16, K17, K18, K19, K1A, K1B, K1C, K2C, K1E, \
29 K20, K21, K22, K23, K24, K25, K26, K27, K28, K29, K2A, K2B, K2D, K2E, \
30 K30, K32, K33, K34, K35, K36, K37, K38, K39, K3A, K3B, K3C, K3D, K3E, \
31 K40, K41, K42, K46, K49, K4A, K4B, K4C, K4D, K4E \
32) { \
33 { K00, K01, K02, K03, K04, K05, K06, K07, K08, K09, K0A, K0B, K0C, K0D, K0E }, \
34 { K10, K11, K12, K13, K14, K15, K16, K17, K18, K19, K1A, K1B, K1C, XXX, K1E }, \
35 { K20, K21, K22, K23, K24, K25, K26, K27, K28, K29, K2A, K2B, K2C, K2D, K2E }, \
36 { K30, XXX, K32, K33, K34, K35, K36, K37, K38, K39, K3A, K3B, K3C, K3D, K3E }, \
37 { K40, K41, K42, XXX, XXX, XXX, K46, XXX, XXX, K49, K4A, K4B, K4C, K4D, K4E } \
38}
diff --git a/keyboards/nk65/readme.md b/keyboards/nk65/readme.md
new file mode 100755
index 000000000..c893c9782
--- /dev/null
+++ b/keyboards/nk65/readme.md
@@ -0,0 +1,37 @@
1NK65
2=========
3
4[NK65]()
5
6This is a standard fixed layout 65% PCB. It supports VIA and full per-key RGB.
7
8Keyboard Maintainer: [Yiancar](http://yiancar-designs.com/) and on [github](https://github.com/yiancar)
9Hardware Supported: A 65% keyboard with STM32F303CC
10Hardware Availability: https://novelkeys.xyz/
11
12Due to the RGB implementation, the NK65 is currently not compatible with community layouts.
13
14## Instructions
15
16### Build
17
18Make example for this keyboard (after setting up your build environment):
19
20 make nk65:default_via
21
22See the [build environment setup](https://docs.qmk.fm/#/getting_started_build_tools) and the [make instructions](https://docs.qmk.fm/#/getting_started_make_guide) for more information. Brand new to QMK? Start with our [Complete Newbs Guide](https://docs.qmk.fm/#/newbs).
23
24### Reset
25
26- Unplug
27- Hold Escape
28- Plug In
29- Unplug
30- Release Escape
31
32### Flash
33
34- Unplug
35- Hold Escape
36- Plug In
37- Flash using QMK Toolbox or dfu-util (`make nk65:<keymap>:dfu-util`)
diff --git a/keyboards/nk65/rules.mk b/keyboards/nk65/rules.mk
new file mode 100755
index 000000000..946722780
--- /dev/null
+++ b/keyboards/nk65/rules.mk
@@ -0,0 +1,69 @@
1# project specific files
2SRC = keyboards/zeal60/zeal60.c \
3 keyboards/zeal60/rgb_backlight.c \
4 drivers/issi/is31fl3733.c \
5 quantum/color.c \
6 drivers/arm/i2c_master.c
7
8## chip/board settings
9# the next two should match the directories in
10# <chibios>/os/hal/ports/$(MCU_FAMILY)/$(MCU_SERIES)
11MCU_FAMILY = STM32
12MCU_SERIES = STM32F3xx
13
14# Linker script to use
15# it should exist either in <chibios>/os/common/ports/ARMCMx/compilers/GCC/ld/
16# or <this_dir>/ld/
17MCU_LDSCRIPT = STM32F303xC
18
19# Startup code to use
20# - it should exist in <chibios>/os/common/startup/ARMCMx/compilers/GCC/mk/
21MCU_STARTUP = stm32f3xx
22
23# Board: it should exist either in <chibios>/os/hal/boards/
24# or <this_dir>/boards
25BOARD = GENERIC_STM32_F303XC
26
27# Cortex version
28MCU = cortex-m4
29
30# ARM version, CORTEX-M0/M1 are 6, CORTEX-M3/M4/M7 are 7
31ARMV = 7
32
33USE_FPU = yes
34
35# Vector table for application
36# 0x00000000-0x00001000 area is occupied by bootlaoder.*/
37# The CORTEX_VTOR... is needed only for MCHCK/Infinity KB
38# OPT_DEFS = -DCORTEX_VTOR_INIT=0x08005000
39OPT_DEFS =
40
41# Do not put the microcontroller into power saving mode
42# when we get USB suspend event. We want it to keep updating
43# backlight effects.
44OPT_DEFS += -DNO_SUSPEND_POWER_DOWN
45
46# Options to pass to dfu-util when flashing
47DFU_ARGS = -d 0483:df11 -a 0 -s 0x08000000:leave
48DFU_SUFFIX_ARGS = -p DF11 -v 0483
49
50# Build Options
51# comment out to disable the options.
52#
53BACKLIGHT_ENABLE = no # Enable keyboard backlight functionality
54BOOTMAGIC_ENABLE = no # Virtual DIP switch configuration
55MOUSEKEY_ENABLE = yes # Mouse keys
56EXTRAKEY_ENABLE = yes # Audio control and System control
57CONSOLE_ENABLE = no # Console for debug
58COMMAND_ENABLE = no # Commands for debug and configuration
59SLEEP_LED_ENABLE = no # Breathing sleep LED during USB suspend
60NKRO_ENABLE = yes # USB Nkey Rollover
61AUDIO_ENABLE = no # Audio output on port C6
62NO_USB_STARTUP_CHECK = no # Disable initialization only when usb is plugged in
63#SERIAL_LINK_ENABLE = yes
64
65RAW_ENABLE = no
66DYNAMIC_KEYMAP_ENABLE = no
67CIE1931_CURVE = yes
68
69LAYOUTS = 65_ansi
generated by cgit v1.2.3 (git 2.25.1) at 2025-11-19 04:21:09 +0000