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| author | JX <572673807@qq.com> | 2021-08-31 03:34:19 +0800 |
|---|---|---|
| committer | GitHub <noreply@github.com> | 2021-08-30 20:34:19 +0100 |
| commit | 5ed8edae498178c8a3c958d36b5e19150ef2caf2 (patch) | |
| tree | 8f9cf87b7c065ea23f10c2cba5cd1e19a0aa4f9a /platforms/chibios | |
| parent | 2dc07391bd61e266ac2410ba7c0413c19eea5db5 (diff) | |
| download | qmk_firmware-5ed8edae498178c8a3c958d36b5e19150ef2caf2.tar.gz qmk_firmware-5ed8edae498178c8a3c958d36b5e19150ef2caf2.zip | |
Update ws2812_spi.c (#14237)
Diffstat (limited to 'platforms/chibios')
| -rw-r--r-- | platforms/chibios/drivers/ws2812_spi.c | 20 |
1 files changed, 10 insertions, 10 deletions
diff --git a/platforms/chibios/drivers/ws2812_spi.c b/platforms/chibios/drivers/ws2812_spi.c index 377a929b9..fe14b478a 100644 --- a/platforms/chibios/drivers/ws2812_spi.c +++ b/platforms/chibios/drivers/ws2812_spi.c | |||
| @@ -41,23 +41,23 @@ | |||
| 41 | // F072 fpclk = 48MHz | 41 | // F072 fpclk = 48MHz |
| 42 | // 48/16 = 3Mhz | 42 | // 48/16 = 3Mhz |
| 43 | #if WS2812_SPI_DIVISOR == 2 | 43 | #if WS2812_SPI_DIVISOR == 2 |
| 44 | # define WS2812_SPI_DIVISOR (0) | 44 | # define WS2812_SPI_DIVISOR_CR1_BR_X (0) |
| 45 | #elif WS2812_SPI_DIVISOR == 4 | 45 | #elif WS2812_SPI_DIVISOR == 4 |
| 46 | # define WS2812_SPI_DIVISOR (SPI_CR1_BR_0) | 46 | # define WS2812_SPI_DIVISOR_CR1_BR_X (SPI_CR1_BR_0) |
| 47 | #elif WS2812_SPI_DIVISOR == 8 | 47 | #elif WS2812_SPI_DIVISOR == 8 |
| 48 | # define WS2812_SPI_DIVISOR (SPI_CR1_BR_1) | 48 | # define WS2812_SPI_DIVISOR_CR1_BR_X (SPI_CR1_BR_1) |
| 49 | #elif WS2812_SPI_DIVISOR == 16 // same as default | 49 | #elif WS2812_SPI_DIVISOR == 16 // same as default |
| 50 | # define WS2812_SPI_DIVISOR (SPI_CR1_BR_1 | SPI_CR1_BR_0) | 50 | # define WS2812_SPI_DIVISOR_CR1_BR_X (SPI_CR1_BR_1 | SPI_CR1_BR_0) |
| 51 | #elif WS2812_SPI_DIVISOR == 32 | 51 | #elif WS2812_SPI_DIVISOR == 32 |
| 52 | # define WS2812_SPI_DIVISOR (SPI_CR1_BR_2) | 52 | # define WS2812_SPI_DIVISOR_CR1_BR_X (SPI_CR1_BR_2) |
| 53 | #elif WS2812_SPI_DIVISOR == 64 | 53 | #elif WS2812_SPI_DIVISOR == 64 |
| 54 | # define WS2812_SPI_DIVISOR (SPI_CR1_BR_2 | SPI_CR1_BR_0) | 54 | # define WS2812_SPI_DIVISOR_CR1_BR_X (SPI_CR1_BR_2 | SPI_CR1_BR_0) |
| 55 | #elif WS2812_SPI_DIVISOR == 128 | 55 | #elif WS2812_SPI_DIVISOR == 128 |
| 56 | # define WS2812_SPI_DIVISOR (SPI_CR1_BR_2 | SPI_CR1_BR_1) | 56 | # define WS2812_SPI_DIVISOR_CR1_BR_X (SPI_CR1_BR_2 | SPI_CR1_BR_1) |
| 57 | #elif WS2812_SPI_DIVISOR == 256 | 57 | #elif WS2812_SPI_DIVISOR == 256 |
| 58 | # define WS2812_SPI_DIVISOR (SPI_CR1_BR_2 | SPI_CR1_BR_1 | SPI_CR1_BR_0) | 58 | # define WS2812_SPI_DIVISOR_CR1_BR_X (SPI_CR1_BR_2 | SPI_CR1_BR_1 | SPI_CR1_BR_0) |
| 59 | #else | 59 | #else |
| 60 | # define WS2812_SPI_DIVISOR (SPI_CR1_BR_1 | SPI_CR1_BR_0) // default | 60 | # define WS2812_SPI_DIVISOR_CR1_BR_X (SPI_CR1_BR_1 | SPI_CR1_BR_0) // default |
| 61 | #endif | 61 | #endif |
| 62 | 62 | ||
| 63 | // Use SPI circular buffer | 63 | // Use SPI circular buffer |
| @@ -126,7 +126,7 @@ void ws2812_init(void) { | |||
| 126 | #endif // WS2812_SPI_SCK_PIN | 126 | #endif // WS2812_SPI_SCK_PIN |
| 127 | 127 | ||
| 128 | // TODO: more dynamic baudrate | 128 | // TODO: more dynamic baudrate |
| 129 | static const SPIConfig spicfg = {WS2812_SPI_BUFFER_MODE, NULL, PAL_PORT(RGB_DI_PIN), PAL_PAD(RGB_DI_PIN), WS2812_SPI_DIVISOR}; | 129 | static const SPIConfig spicfg = {WS2812_SPI_BUFFER_MODE, NULL, PAL_PORT(RGB_DI_PIN), PAL_PAD(RGB_DI_PIN), WS2812_SPI_DIVISOR_CR1_BR_X}; |
| 130 | 130 | ||
| 131 | spiAcquireBus(&WS2812_SPI); /* Acquire ownership of the bus. */ | 131 | spiAcquireBus(&WS2812_SPI); /* Acquire ownership of the bus. */ |
| 132 | spiStart(&WS2812_SPI, &spicfg); /* Setup transfer parameters. */ | 132 | spiStart(&WS2812_SPI, &spicfg); /* Setup transfer parameters. */ |