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authortmk <nobody@nowhere>2014-02-10 11:05:18 +0900
committertmk <nobody@nowhere>2014-02-10 11:05:18 +0900
commit902afcc509cf5d84b24f71297591cb7cb3d7493d (patch)
tree9e18b65bf2ce218cd7cf722d210ef0257892746a /protocol/ibm4704.c
parent0f827cf94ccd6bef490ba889bc86c61483b1eb80 (diff)
downloadqmk_firmware-902afcc509cf5d84b24f71297591cb7cb3d7493d.tar.gz
qmk_firmware-902afcc509cf5d84b24f71297591cb7cb3d7493d.zip
Add doc 4704.txt and protocol comment
Diffstat (limited to 'protocol/ibm4704.c')
-rw-r--r--protocol/ibm4704.c40
1 files changed, 33 insertions, 7 deletions
diff --git a/protocol/ibm4704.c b/protocol/ibm4704.c
index d3fbcc541..10e229fd1 100644
--- a/protocol/ibm4704.c
+++ b/protocol/ibm4704.c
@@ -23,6 +23,25 @@ void ibm4704_init(void)
23 inhibit(); 23 inhibit();
24} 24}
25 25
26/*
27Host to Keyboard
28----------------
29Data bits are LSB first and Parity is odd. Clock has around 60us high and 30us low part.
30
31 ____ __ __ __ __ __ __ __ __ __ ________
32Clock \______/ \_/ \_/ \_/ \_/ \_/ \_/ \_/ \_/ \_/
33 ^ ____ ____ ____ ____ ____ ____ ____ ____ ____ ____ ___
34Data ____|__/ X____X____X____X____X____X____X____X____X____X \___
35 | Start 0 1 2 3 4 5 6 7 P Stop
36 Request by host
37
38Start bit: can be long as 300-350us.
39Request: Host pulls Clock line down to request to send a command.
40Timing: After Request keyboard pull up Data and down Clock line to low for start bit.
41 After request host release Clock line once Data line becomes hi.
42 Host writes a bit while Clock is hi and Keyboard reads while low.
43Stop bit: Host releases or pulls up Data line to hi after 9th clock and waits for keyboard pull down the line to lo.
44*/
26uint8_t ibm4704_send(uint8_t data) 45uint8_t ibm4704_send(uint8_t data)
27{ 46{
28 bool parity = true; // odd parity 47 bool parity = true; // odd parity
@@ -85,13 +104,20 @@ uint8_t ibm4704_recv_response(void)
85} 104}
86 105
87/* 106/*
88Keyboard to Host: 107Keyboard to Host
89Clock ~~~~___~~_~~_~~_~~_~~_~~_~~_~~_~~_~~~~~~~~ H:60us/L:30us 108----------------
90 109Data bits are LSB first and Parity is odd. Clock has around 60us high and 30us low part.
91Data ____~~X==X==X==X==X==X==X==X==X==X________ 110
92 | 0 1 2 3 4 5 6 7 P(odd) 111 ____ __ __ __ __ __ __ __ __ __ ________
93 | LSB MSB 112Clock \____/ \_/ \_/ \_/ \_/ \_/ \_/ \_/ \_/ \_/
94 Start bit(80us) 113 ____ ____ ____ ____ ____ ____ ____ ____ ____ ____
114Data ____/ X____X____X____X____X____X____X____X____X____X________
115 Start 0 1 2 3 4 5 6 7 P Stop
116
117Start bit: can be long as 300-350us.
118Inhibit: Pull Data line down to inhibit keyboard to send.
119Timing: Host reads bit while Clock is hi.
120Stop bit: Keyboard pulls down Data line to lo after 9th clock.
95*/ 121*/
96uint8_t ibm4704_recv(void) 122uint8_t ibm4704_recv(void)
97{ 123{