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author | walkerstop <walkerstop@gmail.com> | 2018-04-13 00:53:29 -0700 |
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committer | Jack Humbert <jack.humb@gmail.com> | 2018-04-13 03:53:29 -0400 |
commit | 530dd446cb7bbff7b7f9a8075726bfbb4eb9a2a3 (patch) | |
tree | e7e9428ebcd79271453f1ac54e68a4326cddeb66 /quantum/audio | |
parent | 22215a0e920a237faabdfa1b8826cd110ab20c3b (diff) | |
download | qmk_firmware-530dd446cb7bbff7b7f9a8075726bfbb4eb9a2a3.tar.gz qmk_firmware-530dd446cb7bbff7b7f9a8075726bfbb4eb9a2a3.zip |
Fix incorrect port direction setting in my previous pull request for pins B5, B6, B7 (#2739)
* Added support for audio using pins C4, C5, B6, B7
* Fixed bug where port direction wasn't set correctly for B5, B6, B7 audio ports
Diffstat (limited to 'quantum/audio')
-rw-r--r-- | quantum/audio/audio.c | 15 |
1 files changed, 5 insertions, 10 deletions
diff --git a/quantum/audio/audio.c b/quantum/audio/audio.c index 3c6d18c4f..c948a60d6 100644 --- a/quantum/audio/audio.c +++ b/quantum/audio/audio.c | |||
@@ -76,7 +76,7 @@ | |||
76 | 76 | ||
77 | #if defined(B5_AUDIO) | 77 | #if defined(B5_AUDIO) |
78 | #define BPIN_AUDIO | 78 | #define BPIN_AUDIO |
79 | #define BPIN_SET_DIRECTION DDRC |= _BV(PORTB5); | 79 | #define BPIN_SET_DIRECTION DDRB |= _BV(PORTB5); |
80 | #define INIT_AUDIO_COUNTER_1 TCCR1A = (0 << COM1A1) | (0 << COM1A0) | (1 << WGM11) | (0 << WGM10); | 80 | #define INIT_AUDIO_COUNTER_1 TCCR1A = (0 << COM1A1) | (0 << COM1A0) | (1 << WGM11) | (0 << WGM10); |
81 | #define ENABLE_AUDIO_COUNTER_1_ISR TIMSK1 |= _BV(OCIE1A) | 81 | #define ENABLE_AUDIO_COUNTER_1_ISR TIMSK1 |= _BV(OCIE1A) |
82 | #define DISABLE_AUDIO_COUNTER_1_ISR TIMSK1 &= ~_BV(OCIE1A) | 82 | #define DISABLE_AUDIO_COUNTER_1_ISR TIMSK1 &= ~_BV(OCIE1A) |
@@ -88,7 +88,7 @@ | |||
88 | #endif | 88 | #endif |
89 | #if defined(B6_AUDIO) | 89 | #if defined(B6_AUDIO) |
90 | #define BPIN_AUDIO | 90 | #define BPIN_AUDIO |
91 | #define BPIN_SET_DIRECTION DDRC |= _BV(PORTB6); | 91 | #define BPIN_SET_DIRECTION DDRB |= _BV(PORTB6); |
92 | #define INIT_AUDIO_COUNTER_1 TCCR1A = (0 << COM1B1) | (0 << COM1B0) | (1 << WGM11) | (0 << WGM10); | 92 | #define INIT_AUDIO_COUNTER_1 TCCR1A = (0 << COM1B1) | (0 << COM1B0) | (1 << WGM11) | (0 << WGM10); |
93 | #define ENABLE_AUDIO_COUNTER_1_ISR TIMSK1 |= _BV(OCIE1B) | 93 | #define ENABLE_AUDIO_COUNTER_1_ISR TIMSK1 |= _BV(OCIE1B) |
94 | #define DISABLE_AUDIO_COUNTER_1_ISR TIMSK1 &= ~_BV(OCIE1B) | 94 | #define DISABLE_AUDIO_COUNTER_1_ISR TIMSK1 &= ~_BV(OCIE1B) |
@@ -100,7 +100,7 @@ | |||
100 | #endif | 100 | #endif |
101 | #if defined(B7_AUDIO) | 101 | #if defined(B7_AUDIO) |
102 | #define BPIN_AUDIO | 102 | #define BPIN_AUDIO |
103 | #define BPIN_SET_DIRECTION DDRC |= _BV(PORTB7); | 103 | #define BPIN_SET_DIRECTION DDRB |= _BV(PORTB7); |
104 | #define INIT_AUDIO_COUNTER_1 TCCR1A = (0 << COM1C1) | (0 << COM1C0) | (1 << WGM11) | (0 << WGM10); | 104 | #define INIT_AUDIO_COUNTER_1 TCCR1A = (0 << COM1C1) | (0 << COM1C0) | (1 << WGM11) | (0 << WGM10); |
105 | #define ENABLE_AUDIO_COUNTER_1_ISR TIMSK1 |= _BV(OCIE1C) | 105 | #define ENABLE_AUDIO_COUNTER_1_ISR TIMSK1 |= _BV(OCIE1C) |
106 | #define DISABLE_AUDIO_COUNTER_1_ISR TIMSK1 &= ~_BV(OCIE1C) | 106 | #define DISABLE_AUDIO_COUNTER_1_ISR TIMSK1 &= ~_BV(OCIE1C) |
@@ -187,16 +187,11 @@ void audio_init() | |||
187 | // Set audio ports as output | 187 | // Set audio ports as output |
188 | #ifdef CPIN_AUDIO | 188 | #ifdef CPIN_AUDIO |
189 | CPIN_SET_DIRECTION | 189 | CPIN_SET_DIRECTION |
190 | DISABLE_AUDIO_COUNTER_3_ISR; | ||
190 | #endif | 191 | #endif |
191 | #ifdef BPIN_AUDIO | 192 | #ifdef BPIN_AUDIO |
192 | BPIN_SET_DIRECTION | 193 | BPIN_SET_DIRECTION |
193 | #endif | 194 | DISABLE_AUDIO_COUNTER_1_ISR; |
194 | |||
195 | #ifdef CPIN_AUDIO | ||
196 | DISABLE_AUDIO_COUNTER_3_ISR; | ||
197 | #endif | ||
198 | #ifdef BPIN_AUDIO | ||
199 | DISABLE_AUDIO_COUNTER_1_ISR; | ||
200 | #endif | 195 | #endif |
201 | 196 | ||
202 | // TCCR3A / TCCR3B: Timer/Counter #3 Control Registers TCCR3A/TCCR3B, TCCR1A/TCCR1B | 197 | // TCCR3A / TCCR3B: Timer/Counter #3 Control Registers TCCR3A/TCCR3B, TCCR1A/TCCR1B |