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authorJack Humbert <jack.humb@gmail.com>2015-10-26 16:32:37 -0400
committerJack Humbert <jack.humb@gmail.com>2015-10-26 16:32:37 -0400
commit35a81f5b8b081e1607a7c04489b01f551c3213cc (patch)
tree4671909bd5ac7c3ca7afaf60fb6a70106f5090dc /quantum/config_common.h
parent46e7fb2d3ccd699c0a1b1fd9d02860b1f2a44141 (diff)
downloadqmk_firmware-35a81f5b8b081e1607a7c04489b01f551c3213cc.tar.gz
qmk_firmware-35a81f5b8b081e1607a7c04489b01f551c3213cc.zip
added ergodox
Diffstat (limited to 'quantum/config_common.h')
-rw-r--r--quantum/config_common.h116
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diff --git a/quantum/config_common.h b/quantum/config_common.h
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1#ifndef CONFIG_DEFINITIONS_H
2#define CONFIG_DEFINITIONS_H
3
4#define B0 0x20
5#define B1 0x21
6#define B2 0x22
7#define B3 0x23
8#define B4 0x24
9#define B5 0x25
10#define B6 0x26
11#define B7 0x27
12#define C0 0x30
13#define C1 0x31
14#define C2 0x32
15#define C3 0x33
16#define C4 0x34
17#define C5 0x35
18#define C6 0x36
19#define C7 0x37
20#define D0 0x40
21#define D1 0x41
22#define D2 0x42
23#define D3 0x43
24#define D4 0x44
25#define D5 0x45
26#define D6 0x46
27#define D7 0x47
28#define E0 0x50
29#define E1 0x51
30#define E2 0x52
31#define E3 0x53
32#define E4 0x54
33#define E5 0x55
34#define E6 0x56
35#define E7 0x57
36#define F0 0x60
37#define F1 0x61
38#define F2 0x62
39#define F3 0x63
40#define F4 0x64
41#define F5 0x65
42#define F6 0x66
43#define F7 0x67
44
45#define COL2ROW 0x0
46#define ROW2COL 0x1
47
48#ifdef BLUETOOTH_ENABLE
49#ifdef __AVR_ATmega32U4__
50 #define SERIAL_UART_BAUD 9600
51 #define SERIAL_UART_DATA UDR1
52 #define SERIAL_UART_UBRR ((F_CPU/(16UL*SERIAL_UART_BAUD))-1)
53 #define SERIAL_UART_RXD_VECT USART1_RX_vect
54 #define SERIAL_UART_TXD_READY (UCSR1A&(1<<UDRE1))
55 #define SERIAL_UART_INIT() do { \
56 UBRR1L = (uint8_t) SERIAL_UART_UBRR; /* baud rate */ \
57 UBRR1H = (uint8_t) (SERIAL_UART_UBRR>>8); /* baud rate */ \
58 UCSR1B = (1<<TXEN1); /* TX: enable */ \
59 UCSR1C = (0<<UPM11) | (0<<UPM10) | /* parity: none(00), even(01), odd(11) */ \
60 (0<<UCSZ12) | (1<<UCSZ11) | (1<<UCSZ10); /* data-8bit(011) */ \
61 sei(); \
62 } while(0)
63#else
64# error "USART configuration is needed."
65#endif
66
67
68// I'm fairly sure these aren't needed, but oh well - Jack
69
70/*
71 * PS/2 Interrupt configuration
72 */
73#ifdef PS2_USE_INT
74/* uses INT1 for clock line(ATMega32U4) */
75#define PS2_CLOCK_PORT PORTD
76#define PS2_CLOCK_PIN PIND
77#define PS2_CLOCK_DDR DDRD
78#define PS2_CLOCK_BIT 1
79
80#define PS2_DATA_PORT PORTD
81#define PS2_DATA_PIN PIND
82#define PS2_DATA_DDR DDRD
83#define PS2_DATA_BIT 0
84
85#define PS2_INT_INIT() do { \
86 EICRA |= ((1<<ISC11) | \
87 (0<<ISC10)); \
88} while (0)
89#define PS2_INT_ON() do { \
90 EIMSK |= (1<<INT1); \
91} while (0)
92#define PS2_INT_OFF() do { \
93 EIMSK &= ~(1<<INT1); \
94} while (0)
95#define PS2_INT_VECT INT1_vect
96#endif
97
98/*
99 * PS/2 Busywait configuration
100 */
101#ifdef PS2_USE_BUSYWAIT
102#define PS2_CLOCK_PORT PORTD
103#define PS2_CLOCK_PIN PIND
104#define PS2_CLOCK_DDR DDRD
105#define PS2_CLOCK_BIT 1
106
107#define PS2_DATA_PORT PORTD
108#define PS2_DATA_PIN PIND
109#define PS2_DATA_DDR DDRD
110#define PS2_DATA_BIT 0
111#endif
112
113#endif
114
115#endif
116