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author | Joel Challis <git@zvecr.com> | 2021-02-14 00:51:06 +0000 |
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committer | GitHub <noreply@github.com> | 2021-02-14 11:51:06 +1100 |
commit | de8caf708c1a9a80527a04be620ed3969262e50b (patch) | |
tree | 2b0839ed1f1c77c3bab8c1c28fff6f4ba62696eb /tmk_core/common/avr | |
parent | 101990139f3efc0d61491d58f41474f5bc039c66 (diff) | |
download | qmk_firmware-de8caf708c1a9a80527a04be620ed3969262e50b.tar.gz qmk_firmware-de8caf708c1a9a80527a04be620ed3969262e50b.zip |
Split gpio and atomic to platform (#11792)
Diffstat (limited to 'tmk_core/common/avr')
-rw-r--r-- | tmk_core/common/avr/atomic_util.h | 22 | ||||
-rw-r--r-- | tmk_core/common/avr/gpio.h | 34 | ||||
-rw-r--r-- | tmk_core/common/avr/pin_defs.h | 128 |
3 files changed, 184 insertions, 0 deletions
diff --git a/tmk_core/common/avr/atomic_util.h b/tmk_core/common/avr/atomic_util.h new file mode 100644 index 000000000..7c5d2e7dc --- /dev/null +++ b/tmk_core/common/avr/atomic_util.h | |||
@@ -0,0 +1,22 @@ | |||
1 | /* Copyright 2021 QMK | ||
2 | * | ||
3 | * This program is free software: you can redistribute it and/or modify | ||
4 | * it under the terms of the GNU General Public License as published by | ||
5 | * the Free Software Foundation, either version 3 of the License, or | ||
6 | * (at your option) any later version. | ||
7 | * | ||
8 | * This program is distributed in the hope that it will be useful, | ||
9 | * but WITHOUT ANY WARRANTY; without even the implied warranty of | ||
10 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | ||
11 | * GNU General Public License for more details. | ||
12 | * | ||
13 | * You should have received a copy of the GNU General Public License | ||
14 | * along with this program. If not, see <http://www.gnu.org/licenses/>. | ||
15 | */ | ||
16 | #pragma once | ||
17 | |||
18 | /* atomic macro for AVR */ | ||
19 | #include <util/atomic.h> | ||
20 | |||
21 | #define ATOMIC_BLOCK_RESTORESTATE ATOMIC_BLOCK(ATOMIC_RESTORESTATE) | ||
22 | #define ATOMIC_BLOCK_FORCEON ATOMIC_BLOCK(ATOMIC_FORCEON) | ||
diff --git a/tmk_core/common/avr/gpio.h b/tmk_core/common/avr/gpio.h new file mode 100644 index 000000000..231556c29 --- /dev/null +++ b/tmk_core/common/avr/gpio.h | |||
@@ -0,0 +1,34 @@ | |||
1 | /* Copyright 2021 QMK | ||
2 | * | ||
3 | * This program is free software: you can redistribute it and/or modify | ||
4 | * it under the terms of the GNU General Public License as published by | ||
5 | * the Free Software Foundation, either version 3 of the License, or | ||
6 | * (at your option) any later version. | ||
7 | * | ||
8 | * This program is distributed in the hope that it will be useful, | ||
9 | * but WITHOUT ANY WARRANTY; without even the implied warranty of | ||
10 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | ||
11 | * GNU General Public License for more details. | ||
12 | * | ||
13 | * You should have received a copy of the GNU General Public License | ||
14 | * along with this program. If not, see <http://www.gnu.org/licenses/>. | ||
15 | */ | ||
16 | #pragma once | ||
17 | |||
18 | #include <avr/io.h> | ||
19 | #include "pin_defs.h" | ||
20 | |||
21 | typedef uint8_t pin_t; | ||
22 | |||
23 | #define setPinInput(pin) (DDRx_ADDRESS(pin) &= ~_BV((pin)&0xF), PORTx_ADDRESS(pin) &= ~_BV((pin)&0xF)) | ||
24 | #define setPinInputHigh(pin) (DDRx_ADDRESS(pin) &= ~_BV((pin)&0xF), PORTx_ADDRESS(pin) |= _BV((pin)&0xF)) | ||
25 | #define setPinInputLow(pin) _Static_assert(0, "AVR processors cannot implement an input as pull low") | ||
26 | #define setPinOutput(pin) (DDRx_ADDRESS(pin) |= _BV((pin)&0xF)) | ||
27 | |||
28 | #define writePinHigh(pin) (PORTx_ADDRESS(pin) |= _BV((pin)&0xF)) | ||
29 | #define writePinLow(pin) (PORTx_ADDRESS(pin) &= ~_BV((pin)&0xF)) | ||
30 | #define writePin(pin, level) ((level) ? writePinHigh(pin) : writePinLow(pin)) | ||
31 | |||
32 | #define readPin(pin) ((bool)(PINx_ADDRESS(pin) & _BV((pin)&0xF))) | ||
33 | |||
34 | #define togglePin(pin) (PORTx_ADDRESS(pin) ^= _BV((pin)&0xF)) | ||
diff --git a/tmk_core/common/avr/pin_defs.h b/tmk_core/common/avr/pin_defs.h new file mode 100644 index 000000000..dbfed21f4 --- /dev/null +++ b/tmk_core/common/avr/pin_defs.h | |||
@@ -0,0 +1,128 @@ | |||
1 | /* Copyright 2021 QMK | ||
2 | * | ||
3 | * This program is free software: you can redistribute it and/or modify | ||
4 | * it under the terms of the GNU General Public License as published by | ||
5 | * the Free Software Foundation, either version 3 of the License, or | ||
6 | * (at your option) any later version. | ||
7 | * | ||
8 | * This program is distributed in the hope that it will be useful, | ||
9 | * but WITHOUT ANY WARRANTY; without even the implied warranty of | ||
10 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | ||
11 | * GNU General Public License for more details. | ||
12 | * | ||
13 | * You should have received a copy of the GNU General Public License | ||
14 | * along with this program. If not, see <http://www.gnu.org/licenses/>. | ||
15 | */ | ||
16 | #pragma once | ||
17 | |||
18 | #include <avr/io.h> | ||
19 | |||
20 | #define PORT_SHIFTER 4 // this may be 4 for all AVR chips | ||
21 | |||
22 | // If you want to add more to this list, reference the PINx definitions in these header | ||
23 | // files: https://github.com/vancegroup-mirrors/avr-libc/tree/master/avr-libc/include/avr | ||
24 | |||
25 | #if defined(__AVR_ATmega32U4__) || defined(__AVR_ATmega16U4__) | ||
26 | # define ADDRESS_BASE 0x00 | ||
27 | # define PINB_ADDRESS 0x3 | ||
28 | # define PINC_ADDRESS 0x6 | ||
29 | # define PIND_ADDRESS 0x9 | ||
30 | # define PINE_ADDRESS 0xC | ||
31 | # define PINF_ADDRESS 0xF | ||
32 | #elif defined(__AVR_ATmega32U2__) || defined(__AVR_ATmega16U2__) || defined(__AVR_ATmega328P__) || defined(__AVR_ATmega328__) | ||
33 | # define ADDRESS_BASE 0x00 | ||
34 | # define PINB_ADDRESS 0x3 | ||
35 | # define PINC_ADDRESS 0x6 | ||
36 | # define PIND_ADDRESS 0x9 | ||
37 | #elif defined(__AVR_AT90USB646__) || defined(__AVR_AT90USB647__) || defined(__AVR_AT90USB1286__) || defined(__AVR_AT90USB1287__) | ||
38 | # define ADDRESS_BASE 0x00 | ||
39 | # define PINA_ADDRESS 0x0 | ||
40 | # define PINB_ADDRESS 0x3 | ||
41 | # define PINC_ADDRESS 0x6 | ||
42 | # define PIND_ADDRESS 0x9 | ||
43 | # define PINE_ADDRESS 0xC | ||
44 | # define PINF_ADDRESS 0xF | ||
45 | #elif defined(__AVR_ATmega32A__) | ||
46 | # define ADDRESS_BASE 0x10 | ||
47 | # define PIND_ADDRESS 0x0 | ||
48 | # define PINC_ADDRESS 0x3 | ||
49 | # define PINB_ADDRESS 0x6 | ||
50 | # define PINA_ADDRESS 0x9 | ||
51 | #elif defined(__AVR_ATtiny85__) | ||
52 | # define ADDRESS_BASE 0x10 | ||
53 | # define PINB_ADDRESS 0x6 | ||
54 | #else | ||
55 | # error "Pins are not defined" | ||
56 | #endif | ||
57 | |||
58 | #define PINDEF(port, pin) ((PIN##port##_ADDRESS << PORT_SHIFTER) | pin) | ||
59 | |||
60 | #define _PIN_ADDRESS(p, offset) _SFR_IO8(ADDRESS_BASE + ((p) >> PORT_SHIFTER) + (offset)) | ||
61 | // Port X Input Pins Address | ||
62 | #define PINx_ADDRESS(p) _PIN_ADDRESS(p, 0) | ||
63 | // Port X Data Direction Register, 0:input 1:output | ||
64 | #define DDRx_ADDRESS(p) _PIN_ADDRESS(p, 1) | ||
65 | // Port X Data Register | ||
66 | #define PORTx_ADDRESS(p) _PIN_ADDRESS(p, 2) | ||
67 | |||
68 | /* I/O pins */ | ||
69 | #ifdef PORTA | ||
70 | # define A0 PINDEF(A, 0) | ||
71 | # define A1 PINDEF(A, 1) | ||
72 | # define A2 PINDEF(A, 2) | ||
73 | # define A3 PINDEF(A, 3) | ||
74 | # define A4 PINDEF(A, 4) | ||
75 | # define A5 PINDEF(A, 5) | ||
76 | # define A6 PINDEF(A, 6) | ||
77 | # define A7 PINDEF(A, 7) | ||
78 | #endif | ||
79 | #ifdef PORTB | ||
80 | # define B0 PINDEF(B, 0) | ||
81 | # define B1 PINDEF(B, 1) | ||
82 | # define B2 PINDEF(B, 2) | ||
83 | # define B3 PINDEF(B, 3) | ||
84 | # define B4 PINDEF(B, 4) | ||
85 | # define B5 PINDEF(B, 5) | ||
86 | # define B6 PINDEF(B, 6) | ||
87 | # define B7 PINDEF(B, 7) | ||
88 | #endif | ||
89 | #ifdef PORTC | ||
90 | # define C0 PINDEF(C, 0) | ||
91 | # define C1 PINDEF(C, 1) | ||
92 | # define C2 PINDEF(C, 2) | ||
93 | # define C3 PINDEF(C, 3) | ||
94 | # define C4 PINDEF(C, 4) | ||
95 | # define C5 PINDEF(C, 5) | ||
96 | # define C6 PINDEF(C, 6) | ||
97 | # define C7 PINDEF(C, 7) | ||
98 | #endif | ||
99 | #ifdef PORTD | ||
100 | # define D0 PINDEF(D, 0) | ||
101 | # define D1 PINDEF(D, 1) | ||
102 | # define D2 PINDEF(D, 2) | ||
103 | # define D3 PINDEF(D, 3) | ||
104 | # define D4 PINDEF(D, 4) | ||
105 | # define D5 PINDEF(D, 5) | ||
106 | # define D6 PINDEF(D, 6) | ||
107 | # define D7 PINDEF(D, 7) | ||
108 | #endif | ||
109 | #ifdef PORTE | ||
110 | # define E0 PINDEF(E, 0) | ||
111 | # define E1 PINDEF(E, 1) | ||
112 | # define E2 PINDEF(E, 2) | ||
113 | # define E3 PINDEF(E, 3) | ||
114 | # define E4 PINDEF(E, 4) | ||
115 | # define E5 PINDEF(E, 5) | ||
116 | # define E6 PINDEF(E, 6) | ||
117 | # define E7 PINDEF(E, 7) | ||
118 | #endif | ||
119 | #ifdef PORTF | ||
120 | # define F0 PINDEF(F, 0) | ||
121 | # define F1 PINDEF(F, 1) | ||
122 | # define F2 PINDEF(F, 2) | ||
123 | # define F3 PINDEF(F, 3) | ||
124 | # define F4 PINDEF(F, 4) | ||
125 | # define F5 PINDEF(F, 5) | ||
126 | # define F6 PINDEF(F, 6) | ||
127 | # define F7 PINDEF(F, 7) | ||
128 | #endif \ No newline at end of file | ||