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| author | tmk <hasu@tmk-kbd.com> | 2015-05-19 00:32:58 +0900 |
|---|---|---|
| committer | tmk <hasu@tmk-kbd.com> | 2015-05-19 00:39:44 +0900 |
| commit | 80fd3b0b240a8840fbca1cc3cc70e76f5b52b888 (patch) | |
| tree | 92cbbfe97ca83ab5646c8cd48758207cdeceb615 /tmk_core/protocol/ibm4704.c | |
| parent | 6b588eb7f7893500e18686e673dbf12b511dc975 (diff) | |
| download | qmk_firmware-80fd3b0b240a8840fbca1cc3cc70e76f5b52b888.tar.gz qmk_firmware-80fd3b0b240a8840fbca1cc3cc70e76f5b52b888.zip | |
ibm4704_usb: Fix protocol handling
Diffstat (limited to 'tmk_core/protocol/ibm4704.c')
| -rw-r--r-- | tmk_core/protocol/ibm4704.c | 20 |
1 files changed, 11 insertions, 9 deletions
diff --git a/tmk_core/protocol/ibm4704.c b/tmk_core/protocol/ibm4704.c index a2c670047..6a03cd441 100644 --- a/tmk_core/protocol/ibm4704.c +++ b/tmk_core/protocol/ibm4704.c | |||
| @@ -21,9 +21,10 @@ uint8_t ibm4704_error = 0; | |||
| 21 | 21 | ||
| 22 | void ibm4704_init(void) | 22 | void ibm4704_init(void) |
| 23 | { | 23 | { |
| 24 | inhibit(); // keep keyboard from sending | ||
| 24 | IBM4704_INT_INIT(); | 25 | IBM4704_INT_INIT(); |
| 25 | IBM4704_INT_ON(); | 26 | IBM4704_INT_ON(); |
| 26 | idle(); | 27 | idle(); // allow keyboard sending |
| 27 | } | 28 | } |
| 28 | 29 | ||
| 29 | /* | 30 | /* |
| @@ -132,8 +133,8 @@ Stop bit: Keyboard pulls down Data line to lo after 9th clock. | |||
| 132 | ISR(IBM4704_INT_VECT) | 133 | ISR(IBM4704_INT_VECT) |
| 133 | { | 134 | { |
| 134 | static enum { | 135 | static enum { |
| 135 | STOP, BIT0, BIT1, BIT2, BIT3, BIT4, BIT5, BIT6, BIT7, PARITY | 136 | BIT0, BIT1, BIT2, BIT3, BIT4, BIT5, BIT6, BIT7, PARITY, STOP |
| 136 | } state = STOP; | 137 | } state = BIT0; |
| 137 | // LSB first | 138 | // LSB first |
| 138 | static uint8_t data = 0; | 139 | static uint8_t data = 0; |
| 139 | // Odd parity | 140 | // Odd parity |
| @@ -141,11 +142,7 @@ ISR(IBM4704_INT_VECT) | |||
| 141 | 142 | ||
| 142 | ibm4704_error = 0; | 143 | ibm4704_error = 0; |
| 143 | 144 | ||
| 144 | switch (state++) { | 145 | switch (state) { |
| 145 | case STOP: | ||
| 146 | // Data:Low | ||
| 147 | WAIT(data_lo, 10, state); | ||
| 148 | break; | ||
| 149 | case BIT0: | 146 | case BIT0: |
| 150 | case BIT1: | 147 | case BIT1: |
| 151 | case BIT2: | 148 | case BIT2: |
| @@ -166,6 +163,10 @@ ISR(IBM4704_INT_VECT) | |||
| 166 | } | 163 | } |
| 167 | if (!parity) | 164 | if (!parity) |
| 168 | goto ERROR; | 165 | goto ERROR; |
| 166 | break; | ||
| 167 | case STOP: | ||
| 168 | // Data:Low | ||
| 169 | WAIT(data_lo, 100, state); | ||
| 169 | rbuf_enqueue(data); | 170 | rbuf_enqueue(data); |
| 170 | ibm4704_error = IBM4704_ERR_NONE; | 171 | ibm4704_error = IBM4704_ERR_NONE; |
| 171 | goto DONE; | 172 | goto DONE; |
| @@ -173,13 +174,14 @@ ISR(IBM4704_INT_VECT) | |||
| 173 | default: | 174 | default: |
| 174 | goto ERROR; | 175 | goto ERROR; |
| 175 | } | 176 | } |
| 177 | state++; | ||
| 176 | goto RETURN; | 178 | goto RETURN; |
| 177 | ERROR: | 179 | ERROR: |
| 178 | ibm4704_error = state; | 180 | ibm4704_error = state; |
| 179 | while (ibm4704_send(0xFE)) _delay_ms(1); // resend | 181 | while (ibm4704_send(0xFE)) _delay_ms(1); // resend |
| 180 | xprintf("R:%02X%02X\n", state, data); | 182 | xprintf("R:%02X%02X\n", state, data); |
| 181 | DONE: | 183 | DONE: |
| 182 | state = STOP; | 184 | state = BIT0; |
| 183 | data = 0; | 185 | data = 0; |
| 184 | parity = false; | 186 | parity = false; |
| 185 | RETURN: | 187 | RETURN: |
