aboutsummaryrefslogtreecommitdiff
path: root/tmk_core/protocol
diff options
context:
space:
mode:
authorpatrickmt <40182064+patrickmt@users.noreply.github.com>2018-12-10 14:28:06 -0500
committerDrashna Jaelre <drashna@live.com>2018-12-10 11:28:06 -0800
commit4a5e68f4f29b0c4c75a68b5958dff197f4ac0f53 (patch)
tree28f1743798df9f2af66d938c578dc991d70019d9 /tmk_core/protocol
parente99615b2acb473fc4a23886b87abe61c80faa1bc (diff)
downloadqmk_firmware-4a5e68f4f29b0c4c75a68b5958dff197f4ac0f53.tar.gz
qmk_firmware-4a5e68f4f29b0c4c75a68b5958dff197f4ac0f53.zip
Bringing Massdrop keyboard hardware configuration to keyboard level (#4593)
MCU Pins for debugging, LED, boot tracing, and shift registers are now configurable at keyboard level. Macros led_* replaced by DBG_LED_* Macros m15_* replaced by DBG_1_* Macros m27_* replaced by DBG_2_* Macros m28_* replaced by DBG_3_* For CTRL and ALT keyboards, debug boot tracing pin default now set to pad M27 instead of M28 since although M28 is not being used, it is technically a signal for USB port detection. m15_print(...) renamed to dbg_print(...) to get away from hard coded port names. dbg_print function now follows similar pattern to debug led output.
Diffstat (limited to 'tmk_core/protocol')
-rw-r--r--tmk_core/protocol/arm_atsam/d51_util.c124
-rw-r--r--tmk_core/protocol/arm_atsam/d51_util.h80
-rw-r--r--tmk_core/protocol/arm_atsam/i2c_master.c10
-rw-r--r--tmk_core/protocol/arm_atsam/led_matrix.c4
-rw-r--r--tmk_core/protocol/arm_atsam/main_arm_atsam.c14
-rw-r--r--tmk_core/protocol/arm_atsam/spi.c105
-rw-r--r--tmk_core/protocol/arm_atsam/spi.h39
-rw-r--r--tmk_core/protocol/arm_atsam/usb/usb2422.c85
8 files changed, 278 insertions, 183 deletions
diff --git a/tmk_core/protocol/arm_atsam/d51_util.c b/tmk_core/protocol/arm_atsam/d51_util.c
index bb63a9481..ea4225857 100644
--- a/tmk_core/protocol/arm_atsam/d51_util.c
+++ b/tmk_core/protocol/arm_atsam/d51_util.c
@@ -1,8 +1,11 @@
1#include "d51_util.h" 1#include "d51_util.h"
2 2
3//Display unsigned 32-bit number through m15 3static volatile uint32_t w;
4//Read as follows: 1230 = || ||| |||| | (note always ending toggle) 4
5void m15_print(uint32_t x) 5//Display unsigned 32-bit number by port toggling DBG_1 (to view on a scope)
6//Read as follows: 1230 = | | | | | | || (note zero is fast double toggle)
7#define DBG_PAUSE 5
8void dbg_print(uint32_t x)
6{ 9{
7 int8_t t; 10 int8_t t;
8 uint32_t n; 11 uint32_t n;
@@ -26,24 +29,34 @@ void m15_print(uint32_t x)
26 while (p2--) p *= 10; 29 while (p2--) p *= 10;
27 n = x / p; 30 n = x / p;
28 x -= n * p; 31 x -= n * p;
29 while (n > 0) 32 if (!n)
30 { 33 {
31 m15_on; 34 DBG_1_ON;
35 DBG_1_OFF;
36 DBG_1_ON;
37 DBG_1_OFF;
32 n--; 38 n--;
33 m15_off;
34 } 39 }
35 //Will always end with an extra toggle 40 else
36 m15_on; 41 {
42 while (n > 0)
43 {
44 DBG_1_ON;
45 DBG_1_OFF;
46 n--;
47 }
48 }
49
37 t--; 50 t--;
38 m15_off;
39 } 51 }
52
53 for (w = DBG_PAUSE; w; w--); //Long pause after number is complete
40} 54}
41 55
42//Display unsigned 32-bit number through debug led 56//Display unsigned 32-bit number through debug led
43//Read as follows: 1230 = [*] [* *] [* * *] [**] (note zero is fast double flash) 57//Read as follows: 1230 = [*] [* *] [* * *] [**] (note zero is fast double flash)
44#define DLED_ONTIME 1000000 58#define DLED_ONTIME 1000000
45#define DLED_PAUSE 1500000 59#define DLED_PAUSE 1500000
46volatile uint32_t w;
47void dled_print(uint32_t x, uint8_t long_pause) 60void dled_print(uint32_t x, uint8_t long_pause)
48{ 61{
49 int8_t t; 62 int8_t t;
@@ -70,13 +83,13 @@ void dled_print(uint32_t x, uint8_t long_pause)
70 x -= n * p; 83 x -= n * p;
71 if (!n) 84 if (!n)
72 { 85 {
73 led_on; 86 DBG_LED_ON;
74 for (w = DLED_ONTIME / 4; w; w--); 87 for (w = DLED_ONTIME / 4; w; w--);
75 led_off; 88 DBG_LED_OFF;
76 for (w = DLED_ONTIME / 4; w; w--); 89 for (w = DLED_ONTIME / 4; w; w--);
77 led_on; 90 DBG_LED_ON;
78 for (w = DLED_ONTIME / 4; w; w--); 91 for (w = DLED_ONTIME / 4; w; w--);
79 led_off; 92 DBG_LED_OFF;
80 for (w = DLED_ONTIME / 4; w; w--); 93 for (w = DLED_ONTIME / 4; w; w--);
81 n--; 94 n--;
82 } 95 }
@@ -84,9 +97,9 @@ void dled_print(uint32_t x, uint8_t long_pause)
84 { 97 {
85 while (n > 0) 98 while (n > 0)
86 { 99 {
87 led_on; 100 DBG_LED_ON;
88 for (w = DLED_ONTIME; w; w--); 101 for (w = DLED_ONTIME; w; w--);
89 led_off; 102 DBG_LED_OFF;
90 for (w = DLED_ONTIME / 2; w; w--); 103 for (w = DLED_ONTIME / 2; w; w--);
91 n--; 104 n--;
92 } 105 }
@@ -102,11 +115,52 @@ void dled_print(uint32_t x, uint8_t long_pause)
102 } 115 }
103} 116}
104 117
105#ifdef DEBUG_BOOT_TRACING 118#ifdef DEBUG_BOOT_TRACING_ENABLE
106 119
107volatile uint32_t debug_code; 120volatile uint32_t debug_code;
108 121
109void EIC_15_Handler() 122//These macros are for compile time substitution
123#define DEBUG_BOOT_TRACING_EXTINTn (DEBUG_BOOT_TRACING_PIN % _U_(0x10))
124#define DEBUG_BOOT_TRACING_EXTINTb (_U_(0x1) << DEBUG_BOOT_TRACING_EXTINTn)
125#define DEBUG_BOOT_TRACING_CONFIG_INDn (DEBUG_BOOT_TRACING_EXTINTn / _U_(0x8))
126#define DEBUG_BOOT_TRACING_CONFIG_SENSEn (DEBUG_BOOT_TRACING_EXTINTn % _U_(0x8))
127#define DEBUG_BOOT_TRACING_CONFIG_SENSEb (DEBUG_BOOT_TRACING_CONFIG_SENSEn * _U_(0x4))
128#define DEBUG_BOOT_TRACING_IRQn (EIC_0_IRQn + DEBUG_BOOT_TRACING_EXTINTn)
129
130//These macros perform PORT+PIN definition translation to IRQn in the preprocessor
131#define PORTPIN_TO_IRQn_EXPAND(def) def
132#define PORTPIN_TO_IRQn_DEF(def) PORTPIN_TO_IRQn_EXPAND(def)
133#if DEBUG_BOOT_TRACING_PIN < 10
134#define PORTPIN_TO_IRQn_TODEF(port, pin) PORTPIN_TO_IRQn_DEF(PIN_ ## port ## 0 ## pin ## A_EIC_EXTINT_NUM)
135#else
136#define PORTPIN_TO_IRQn_TODEF(port, pin) PORTPIN_TO_IRQn_DEF(PIN_ ## port ## pin ## A_EIC_EXTINT_NUM)
137#endif
138#define PORTPIN_TO_IRQn(port, pin) PORTPIN_TO_IRQn_TODEF(port, pin)
139
140//These macros perform function name output in the preprocessor
141#define DEBUG_BOOT_TRACING_HANDLER_CONCAT(irq) void EIC_ ## irq ## _Handler(void)
142#define DEBUG_BOOT_TRACING_HANDLER(irq) DEBUG_BOOT_TRACING_HANDLER_CONCAT(irq)
143
144//To generate the function name of the IRQ handler catching boot tracing,
145// certain macros must be undefined, so save their current values to macro stack
146#pragma push_macro("PA")
147#pragma push_macro("PB")
148#pragma push_macro("_L_")
149
150//Undefine / redefine pushed macros
151#undef PA
152#undef PB
153#undef _L_
154#define _L_(x) x
155
156//Perform the work and output
157//Ex: PORT PB, PIN 31 = void EIC_15_Handler(void)
158DEBUG_BOOT_TRACING_HANDLER(PORTPIN_TO_IRQn(DEBUG_BOOT_TRACING_PORT, DEBUG_BOOT_TRACING_PIN))
159
160//Restore macros
161#pragma pop_macro("PA")
162#pragma pop_macro("PB")
163#pragma pop_macro("_L_")
110{ 164{
111 //This is only for non-functional keyboard troubleshooting and should be disabled after boot 165 //This is only for non-functional keyboard troubleshooting and should be disabled after boot
112 //Intention is to lock up the keyboard here with repeating debug led code 166 //Intention is to lock up the keyboard here with repeating debug led code
@@ -120,13 +174,13 @@ void debug_code_init(void)
120{ 174{
121 DBGC(DC_UNSET); 175 DBGC(DC_UNSET);
122 176
123 //Configure Ports for EIC on PB31 177 //Configure Ports for EIC
124 PORT->Group[1].DIRCLR.reg = 1 << 31; //Input 178 PORT->Group[DEBUG_BOOT_TRACING_PORT].DIRCLR.reg = 1 << DEBUG_BOOT_TRACING_PIN; //Input
125 PORT->Group[1].OUTSET.reg = 1 << 31; //High 179 PORT->Group[DEBUG_BOOT_TRACING_PORT].OUTSET.reg = 1 << DEBUG_BOOT_TRACING_PIN; //High
126 PORT->Group[1].PINCFG[31].bit.INEN = 1; //Input Enable 180 PORT->Group[DEBUG_BOOT_TRACING_PORT].PINCFG[DEBUG_BOOT_TRACING_PIN].bit.INEN = 1; //Input Enable
127 PORT->Group[1].PINCFG[31].bit.PULLEN = 1; //Pull Enable 181 PORT->Group[DEBUG_BOOT_TRACING_PORT].PINCFG[DEBUG_BOOT_TRACING_PIN].bit.PULLEN = 1; //Pull Enable
128 PORT->Group[1].PINCFG[31].bit.PMUXEN = 1; //Mux Enable 182 PORT->Group[DEBUG_BOOT_TRACING_PORT].PINCFG[DEBUG_BOOT_TRACING_PIN].bit.PMUXEN = 1; //Mux Enable
129 PORT->Group[1].PMUX[15].bit.PMUXO = 0; //Mux A 183 PORT->Group[DEBUG_BOOT_TRACING_PORT].PMUX[DEBUG_BOOT_TRACING_PIN / 2].bit.PMUXO = 0; //Mux A
130 184
131 //Enable CLK_EIC_APB 185 //Enable CLK_EIC_APB
132 MCLK->APBAMASK.bit.EIC_ = 1; 186 MCLK->APBAMASK.bit.EIC_ = 1;
@@ -134,25 +188,33 @@ void debug_code_init(void)
134 //Configure EIC 188 //Configure EIC
135 EIC->CTRLA.bit.SWRST = 1; 189 EIC->CTRLA.bit.SWRST = 1;
136 while (EIC->SYNCBUSY.bit.SWRST) {} 190 while (EIC->SYNCBUSY.bit.SWRST) {}
137 EIC->ASYNCH.reg = 1 << 15; 191 EIC->ASYNCH.reg = DEBUG_BOOT_TRACING_EXTINTb;
138 EIC->INTENSET.reg = 1 << 15; 192 EIC->INTENSET.reg = DEBUG_BOOT_TRACING_EXTINTb;
139 EIC->CONFIG[1].bit.SENSE7 = 2; 193 EIC->CONFIG[DEBUG_BOOT_TRACING_CONFIG_INDn].reg |= (EIC_CONFIG_SENSE0_FALL_Val << DEBUG_BOOT_TRACING_CONFIG_SENSEb);
140 EIC->CTRLA.bit.ENABLE = 1; 194 EIC->CTRLA.bit.ENABLE = 1;
141 while (EIC->SYNCBUSY.bit.ENABLE) {} 195 while (EIC->SYNCBUSY.bit.ENABLE) {}
142 196
143 //Enable EIC IRQ 197 //Enable EIC IRQ
144 NVIC_EnableIRQ(EIC_15_IRQn); 198 NVIC_EnableIRQ(DEBUG_BOOT_TRACING_IRQn);
145} 199}
146 200
147void debug_code_disable(void) 201void debug_code_disable(void)
148{ 202{
149 //Disable EIC IRQ 203 //Disable EIC IRQ
150 NVIC_DisableIRQ(EIC_15_IRQn); 204 NVIC_DisableIRQ(DEBUG_BOOT_TRACING_IRQn);
151 205
152 //Disable EIC 206 //Disable EIC
153 EIC->CTRLA.bit.ENABLE = 0; 207 EIC->CTRLA.bit.ENABLE = 0;
154 while (EIC->SYNCBUSY.bit.ENABLE) {} 208 while (EIC->SYNCBUSY.bit.ENABLE) {}
155 209
210 //Default port configuration
211 PORT->Group[DEBUG_BOOT_TRACING_PORT].DIRCLR.reg = 1 << DEBUG_BOOT_TRACING_PIN; //Input
212 PORT->Group[DEBUG_BOOT_TRACING_PORT].OUTCLR.reg = 1 << DEBUG_BOOT_TRACING_PIN; //Low
213 PORT->Group[DEBUG_BOOT_TRACING_PORT].PINCFG[DEBUG_BOOT_TRACING_PIN].bit.INEN = 0; //Input Disable
214 PORT->Group[DEBUG_BOOT_TRACING_PORT].PINCFG[DEBUG_BOOT_TRACING_PIN].bit.PULLEN = 0; //Pull Disable
215 PORT->Group[DEBUG_BOOT_TRACING_PORT].PINCFG[DEBUG_BOOT_TRACING_PIN].bit.PMUXEN = 0; //Mux Disable
216 PORT->Group[DEBUG_BOOT_TRACING_PORT].PMUX[DEBUG_BOOT_TRACING_PIN / 2].bit.PMUXO = 0; //Mux A
217
156 //Disable CLK_EIC_APB 218 //Disable CLK_EIC_APB
157 MCLK->APBAMASK.bit.EIC_ = 0; 219 MCLK->APBAMASK.bit.EIC_ = 0;
158} 220}
@@ -162,4 +224,4 @@ void debug_code_disable(void)
162void debug_code_init(void) {} 224void debug_code_init(void) {}
163void debug_code_disable(void) {} 225void debug_code_disable(void) {}
164 226
165#endif //DEBUG_BOOT_TRACING 227#endif //DEBUG_BOOT_TRACING_ENABLE
diff --git a/tmk_core/protocol/arm_atsam/d51_util.h b/tmk_core/protocol/arm_atsam/d51_util.h
index 7a35f7989..71431942c 100644
--- a/tmk_core/protocol/arm_atsam/d51_util.h
+++ b/tmk_core/protocol/arm_atsam/d51_util.h
@@ -20,37 +20,65 @@ along with this program. If not, see <http://www.gnu.org/licenses/>.
20 20
21#include "samd51j18a.h" 21#include "samd51j18a.h"
22 22
23//TODO: PS: Should bring these ports out to keyboard level configuration 23/* Debug LED */
24 24#if DEBUG_LED_ENABLE == 1
25//Debug LED PA27 25#define DBG_LED_ENA PORT->Group[DEBUG_LED_PORT].DIRSET.reg = (1 << DEBUG_LED_PIN)
26#define led_ena REG_PORT_DIRSET0 = 0x08000000 //PA27 Output 26#define DBG_LED_DIS PORT->Group[DEBUG_LED_PORT].DIRCLR.reg = (1 << DEBUG_LED_PIN)
27#define led_on REG_PORT_OUTSET0 = 0x08000000 //PA27 High 27#define DBG_LED_ON PORT->Group[DEBUG_LED_PORT].OUTSET.reg = (1 << DEBUG_LED_PIN)
28#define led_off REG_PORT_OUTCLR0 = 0x08000000 //PA27 Low 28#define DBG_LED_OFF PORT->Group[DEBUG_LED_PORT].OUTCLR.reg = (1 << DEBUG_LED_PIN)
29 29#else
30//Debug Port PB30 30#define DBG_LED_ENA
31#define m15_ena REG_PORT_DIRSET1 = 0x40000000 //PB30 Output 31#define DBG_LED_DIS
32#define m15_on REG_PORT_OUTSET1 = 0x40000000 //PB30 High 32#define DBG_LED_ON
33#define m15_off REG_PORT_OUTCLR1 = 0x40000000 //PB30 Low 33#define DBG_LED_OFF
34 34#endif
35//Debug Port PB23 35
36#define m27_ena REG_PORT_DIRSET1 = 0x800000 //PB23 Output 36/* Debug Port 1 */
37#define m27_on REG_PORT_OUTSET1 = 0x800000 //PB23 High 37#if DEBUG_PORT1_ENABLE == 1
38#define m27_off REG_PORT_OUTCLR1 = 0x800000 //PB23 Low 38#define DBG_1_ENA PORT->Group[DEBUG_PORT1_PORT].DIRSET.reg = (1 << DEBUG_PORT1_PIN)
39 39#define DBG_1_DIS PORT->Group[DEBUG_PORT1_PORT].DIRCLR.reg = (1 << DEBUG_PORT1_PIN)
40//Debug Port PB31 40#define DBG_1_ON PORT->Group[DEBUG_PORT1_PORT].OUTSET.reg = (1 << DEBUG_PORT1_PIN)
41#define m28_ena REG_PORT_DIRSET1 = 0x80000000 //PB31 Output 41#define DBG_1_OFF PORT->Group[DEBUG_PORT1_PORT].OUTCLR.reg = (1 << DEBUG_PORT1_PIN)
42#define m28_on REG_PORT_OUTSET1 = 0x80000000 //PB31 High 42#else
43#define m28_off REG_PORT_OUTCLR1 = 0x80000000 //PB31 Low 43#define DBG_1_ENA
44 44#define DBG_1_DIS
45#define m15_loop(M15X) {uint8_t M15L=M15X; while(M15L--){m15_on;CLK_delay_us(1);m15_off;}} 45#define DBG_1_ON
46#define DBG_1_OFF
47#endif
48
49/* Debug Port 2 */
50#if DEBUG_PORT2_ENABLE == 1
51#define DBG_2_ENA PORT->Group[DEBUG_PORT2_PORT].DIRSET.reg = (1 << DEBUG_PORT2_PIN)
52#define DBG_2_DIS PORT->Group[DEBUG_PORT2_PORT].DIRCLR.reg = (1 << DEBUG_PORT2_PIN)
53#define DBG_2_ON PORT->Group[DEBUG_PORT2_PORT].OUTSET.reg = (1 << DEBUG_PORT2_PIN)
54#define DBG_2_OFF PORT->Group[DEBUG_PORT2_PORT].OUTCLR.reg = (1 << DEBUG_PORT2_PIN)
55#else
56#define DBG_2_ENA
57#define DBG_2_DIS
58#define DBG_2_ON
59#define DBG_2_OFF
60#endif
61
62/* Debug Port 3 */
63#if DEBUG_PORT3_ENABLE == 1
64#define DBG_3_ENA PORT->Group[DEBUG_PORT3_PORT].DIRSET.reg = (1 << DEBUG_PORT3_PIN)
65#define DBG_3_DIS PORT->Group[DEBUG_PORT3_PORT].DIRCLR.reg = (1 << DEBUG_PORT3_PIN)
66#define DBG_3_ON PORT->Group[DEBUG_PORT3_PORT].OUTSET.reg = (1 << DEBUG_PORT3_PIN)
67#define DBG_3_OFF PORT->Group[DEBUG_PORT3_PORT].OUTCLR.reg = (1 << DEBUG_PORT3_PIN)
68#else
69#define DBG_3_ENA
70#define DBG_3_DIS
71#define DBG_3_ON
72#define DBG_3_OFF
73#endif
46 74
47void m15_print(uint32_t x); 75void dbg_print(uint32_t x);
48void dled_print(uint32_t x, uint8_t long_pause); 76void dled_print(uint32_t x, uint8_t long_pause);
49 77
50void debug_code_init(void); 78void debug_code_init(void);
51void debug_code_disable(void); 79void debug_code_disable(void);
52 80
53#ifdef DEBUG_BOOT_TRACING 81#ifdef DEBUG_BOOT_TRACING_ENABLE
54 82
55#define DBGC(n) debug_code = n 83#define DBGC(n) debug_code = n
56 84
@@ -190,6 +218,6 @@ enum debug_code_list {
190 218
191#define DBGC(n) {} 219#define DBGC(n) {}
192 220
193#endif //DEBUG_BOOT_TRACING 221#endif //DEBUG_BOOT_TRACING_ENABLE
194 222
195#endif //_D51_UTIL_H_ 223#endif //_D51_UTIL_H_
diff --git a/tmk_core/protocol/arm_atsam/i2c_master.c b/tmk_core/protocol/arm_atsam/i2c_master.c
index ece9ee5db..f608a79cc 100644
--- a/tmk_core/protocol/arm_atsam/i2c_master.c
+++ b/tmk_core/protocol/arm_atsam/i2c_master.c
@@ -267,8 +267,8 @@ uint8_t I2C3733_Init_Control(void)
267 267
268 CLK_delay_ms(1); 268 CLK_delay_ms(1);
269 269
270 srdata.bit.IRST = 0; 270 sr_exp_data.bit.IRST = 0;
271 SPI_WriteSRData(); 271 SR_EXP_WriteData();
272 272
273 CLK_delay_ms(1); 273 CLK_delay_ms(1);
274 274
@@ -357,8 +357,8 @@ void I2C3733_Control_Set(uint8_t state)
357{ 357{
358 DBGC(DC_I2C3733_CONTROL_SET_BEGIN); 358 DBGC(DC_I2C3733_CONTROL_SET_BEGIN);
359 359
360 srdata.bit.SDB_N = (state == 1 ? 1 : 0); 360 sr_exp_data.bit.SDB_N = (state == 1 ? 1 : 0);
361 SPI_WriteSRData(); 361 SR_EXP_WriteData();
362 362
363 DBGC(DC_I2C3733_CONTROL_SET_COMPLETE); 363 DBGC(DC_I2C3733_CONTROL_SET_COMPLETE);
364} 364}
@@ -489,7 +489,7 @@ uint8_t i2c_led_q_request_room(uint8_t request_size)
489 489
490 if (i2c_led_q_full >= 100) //Give the queue a chance to clear up 490 if (i2c_led_q_full >= 100) //Give the queue a chance to clear up
491 { 491 {
492 led_on; 492 DBG_LED_ON;
493 I2C_DMAC_LED_Init(); 493 I2C_DMAC_LED_Init();
494 i2c_led_q_init(); 494 i2c_led_q_init();
495 return 1; 495 return 1;
diff --git a/tmk_core/protocol/arm_atsam/led_matrix.c b/tmk_core/protocol/arm_atsam/led_matrix.c
index 729e042a6..e914fc80e 100644
--- a/tmk_core/protocol/arm_atsam/led_matrix.c
+++ b/tmk_core/protocol/arm_atsam/led_matrix.c
@@ -520,9 +520,9 @@ void led_matrix_task(void)
520 //Process more data if not finished 520 //Process more data if not finished
521 if (led_cur != lede) 521 if (led_cur != lede)
522 { 522 {
523 //m15_off; //debug profiling 523 //DBG_1_OFF; //debug profiling
524 led_matrix_run(); 524 led_matrix_run();
525 //m15_on; //debug profiling 525 //DBG_1_ON; //debug profiling
526 } 526 }
527} 527}
528 528
diff --git a/tmk_core/protocol/arm_atsam/main_arm_atsam.c b/tmk_core/protocol/arm_atsam/main_arm_atsam.c
index 13034a05d..2bda7d7c7 100644
--- a/tmk_core/protocol/arm_atsam/main_arm_atsam.c
+++ b/tmk_core/protocol/arm_atsam/main_arm_atsam.c
@@ -247,8 +247,13 @@ void main_subtasks(void)
247 247
248int main(void) 248int main(void)
249{ 249{
250 led_ena; 250 DBG_LED_ENA;
251 m15_ena; 251 DBG_1_ENA;
252 DBG_1_OFF;
253 DBG_2_ENA;
254 DBG_2_OFF;
255 DBG_3_ENA;
256 DBG_3_OFF;
252 257
253 debug_code_init(); 258 debug_code_init();
254 259
@@ -256,7 +261,7 @@ int main(void)
256 261
257 ADC0_init(); 262 ADC0_init();
258 263
259 SPI_Init(); 264 SR_EXP_Init();
260 265
261 i2c1_init(); 266 i2c1_init();
262 267
@@ -274,8 +279,7 @@ int main(void)
274 279
275 while (USB2422_Port_Detect_Init() == 0) {} 280 while (USB2422_Port_Detect_Init() == 0) {}
276 281
277 led_off; 282 DBG_LED_OFF;
278 m15_off;
279 283
280 led_matrix_init(); 284 led_matrix_init();
281 285
diff --git a/tmk_core/protocol/arm_atsam/spi.c b/tmk_core/protocol/arm_atsam/spi.c
index 6036a9220..e275ba13f 100644
--- a/tmk_core/protocol/arm_atsam/spi.c
+++ b/tmk_core/protocol/arm_atsam/spi.c
@@ -17,73 +17,70 @@ along with this program. If not, see <http://www.gnu.org/licenses/>.
17 17
18#include "arm_atsam_protocol.h" 18#include "arm_atsam_protocol.h"
19 19
20Srdata_t srdata; 20sr_exp_t sr_exp_data;
21 21
22void SPI_WriteSRData(void) 22void SR_EXP_WriteData(void)
23{ 23{
24 uint16_t timeout; 24 SR_EXP_RCLK_LO;
25 25
26 SC2_RCLCK_LO; 26 while (!(SR_EXP_SERCOM->SPI.INTFLAG.bit.DRE)) { DBGC(DC_SPI_WRITE_DRE); }
27 27
28 timeout = 50000; 28 SR_EXP_SERCOM->SPI.DATA.bit.DATA = sr_exp_data.reg & 0xFF; //Shift in bits 7-0
29 while (!(SCSPI->SPI.INTFLAG.bit.DRE) && --timeout) { DBGC(DC_SPI_WRITE_DRE); } 29 while (!(SR_EXP_SERCOM->SPI.INTFLAG.bit.TXC)) { DBGC(DC_SPI_WRITE_TXC_1); }
30 30
31 SCSPI->SPI.DATA.bit.DATA = srdata.reg & 0xFF; //Shift in bits 7-0 31 SR_EXP_SERCOM->SPI.DATA.bit.DATA = (sr_exp_data.reg >> 8) & 0xFF; //Shift in bits 15-8
32 timeout = 50000; 32 while (!(SR_EXP_SERCOM->SPI.INTFLAG.bit.TXC)) { DBGC(DC_SPI_WRITE_TXC_2); }
33 while (!(SCSPI->SPI.INTFLAG.bit.TXC) && --timeout) { DBGC(DC_SPI_WRITE_TXC_1); }
34 33
35 SCSPI->SPI.DATA.bit.DATA = (srdata.reg >> 8) & 0xFF; //Shift in bits 15-8 34 SR_EXP_RCLK_HI;
36 timeout = 50000;
37 while (!(SCSPI->SPI.INTFLAG.bit.TXC) && --timeout) { DBGC(DC_SPI_WRITE_TXC_2); }
38
39 SC2_RCLCK_HI;
40} 35}
41 36
42void SPI_Init(void) 37void SR_EXP_Init(void)
43{ 38{
44 uint32_t timeout;
45
46 DBGC(DC_SPI_INIT_BEGIN); 39 DBGC(DC_SPI_INIT_BEGIN);
47 40
48 CLK_set_spi_freq(CHAN_SERCOM_SPI, FREQ_SPI_DEFAULT); 41 CLK_set_spi_freq(CHAN_SERCOM_SPI, FREQ_SPI_DEFAULT);
49 42
50 PORT->Group[0].PMUX[6].bit.PMUXE = 2; 43 //Set up MCU Shift Register pins
51 PORT->Group[0].PMUX[6].bit.PMUXO = 2; 44 PORT->Group[SR_EXP_RCLK_PORT].DIRSET.reg = (1 << SR_EXP_RCLK_PIN);
52 PORT->Group[0].PINCFG[12].bit.PMUXEN = 1; 45 PORT->Group[SR_EXP_OE_N_PORT].DIRSET.reg = (1 << SR_EXP_OE_N_PIN);
53 PORT->Group[0].PINCFG[13].bit.PMUXEN = 1; 46
54 47 //Set up MCU SPI pins
55 //Configure Shift Registers 48 PORT->Group[SR_EXP_DATAOUT_PORT].PMUX[SR_EXP_DATAOUT_PIN / 2].bit.SR_EXP_DATAOUT_MUX_SEL = SR_EXP_DATAOUT_MUX; //MUX select for sercom
56 SC2_DIRSET; 49 PORT->Group[SR_EXP_SCLK_PORT].PMUX[SR_EXP_SCLK_PIN / 2].bit.SR_EXP_SCLK_MUX_SEL = SR_EXP_SCLK_MUX; //MUX select for sercom
57 SC2_RCLCK_HI; 50 PORT->Group[SR_EXP_DATAOUT_PORT].PINCFG[SR_EXP_DATAOUT_PIN].bit.PMUXEN = 1; //MUX Enable
58 SC2_OE_DIS; 51 PORT->Group[SR_EXP_SCLK_PORT].PINCFG[SR_EXP_SCLK_PIN].bit.PMUXEN = 1; //MUX Enable
59 52
60 SCSPI->SPI.CTRLA.bit.DORD = 1; 53 //Initialize Shift Register
61 SCSPI->SPI.CTRLA.bit.CPOL = 1; 54 SR_EXP_OE_N_DIS;
62 SCSPI->SPI.CTRLA.bit.CPHA = 1; 55 SR_EXP_RCLK_HI;
63 SCSPI->SPI.CTRLA.bit.DIPO = 3; 56
64 SCSPI->SPI.CTRLA.bit.MODE = 3; //master 57 SR_EXP_SERCOM->SPI.CTRLA.bit.DORD = 1; //Data Order - LSB is transferred first
65 58 SR_EXP_SERCOM->SPI.CTRLA.bit.CPOL = 1; //Clock Polarity - SCK high when idle. Leading edge of cycle is falling. Trailing rising.
66 SCSPI->SPI.CTRLA.bit.ENABLE = 1; 59 SR_EXP_SERCOM->SPI.CTRLA.bit.CPHA = 1; //Clock Phase - Leading Edge Falling, change, Trailing Edge - Rising, sample
67 timeout = 50000; 60 SR_EXP_SERCOM->SPI.CTRLA.bit.DIPO = 3; //Data In Pinout - SERCOM PAD[3] is used as data input (Configure away from DOPO. Not using input.)
68 while (SCSPI->SPI.SYNCBUSY.bit.ENABLE && timeout--) { DBGC(DC_SPI_SYNC_ENABLING); } 61 SR_EXP_SERCOM->SPI.CTRLA.bit.DOPO = 0; //Data Output PAD[0], Serial Clock PAD[1]
69 62 SR_EXP_SERCOM->SPI.CTRLA.bit.MODE = 3; //Operating Mode - Master operation
70 srdata.reg = 0; 63
71 srdata.bit.HUB_CONNECT = 0; 64 SR_EXP_SERCOM->SPI.CTRLA.bit.ENABLE = 1; //Enable - Peripheral is enabled or being enabled
72 srdata.bit.HUB_RESET_N = 0; 65 while (SR_EXP_SERCOM->SPI.SYNCBUSY.bit.ENABLE) { DBGC(DC_SPI_SYNC_ENABLING); }
73 srdata.bit.S_UP = 0; 66
74 srdata.bit.E_UP_N = 1; 67 sr_exp_data.reg = 0;
75 srdata.bit.S_DN1 = 1; 68 sr_exp_data.bit.HUB_CONNECT = 0;
76 srdata.bit.E_DN1_N = 1; 69 sr_exp_data.bit.HUB_RESET_N = 0;
77 srdata.bit.E_VBUS_1 = 0; 70 sr_exp_data.bit.S_UP = 0;
78 srdata.bit.E_VBUS_2 = 0; 71 sr_exp_data.bit.E_UP_N = 1;
79 srdata.bit.SRC_1 = 1; 72 sr_exp_data.bit.S_DN1 = 1;
80 srdata.bit.SRC_2 = 1; 73 sr_exp_data.bit.E_DN1_N = 1;
81 srdata.bit.IRST = 1; 74 sr_exp_data.bit.E_VBUS_1 = 0;
82 srdata.bit.SDB_N = 0; 75 sr_exp_data.bit.E_VBUS_2 = 0;
83 SPI_WriteSRData(); 76 sr_exp_data.bit.SRC_1 = 1;
84 77 sr_exp_data.bit.SRC_2 = 1;
85 //Enable register output 78 sr_exp_data.bit.IRST = 1;
86 SC2_OE_ENA; 79 sr_exp_data.bit.SDB_N = 0;
80 SR_EXP_WriteData();
81
82 //Enable Shift Register output
83 SR_EXP_OE_N_ENA;
87 84
88 DBGC(DC_SPI_INIT_COMPLETE); 85 DBGC(DC_SPI_INIT_COMPLETE);
89} 86}
diff --git a/tmk_core/protocol/arm_atsam/spi.h b/tmk_core/protocol/arm_atsam/spi.h
index 3412dfc36..4739b775d 100644
--- a/tmk_core/protocol/arm_atsam/spi.h
+++ b/tmk_core/protocol/arm_atsam/spi.h
@@ -18,21 +18,28 @@ along with this program. If not, see <http://www.gnu.org/licenses/>.
18#ifndef _SPI_H_ 18#ifndef _SPI_H_
19#define _SPI_H_ 19#define _SPI_H_
20 20
21//TODO: PS: Should bring ports to keyboard configuration 21/* Macros for Shift Register control */
22#define SR_EXP_RCLK_LO PORT->Group[SR_EXP_RCLK_PORT].OUTCLR.reg = (1 << SR_EXP_RCLK_PIN)
23#define SR_EXP_RCLK_HI PORT->Group[SR_EXP_RCLK_PORT].OUTSET.reg = (1 << SR_EXP_RCLK_PIN)
24#define SR_EXP_OE_N_ENA PORT->Group[SR_EXP_OE_N_PORT].OUTCLR.reg = (1 << SR_EXP_OE_N_PIN)
25#define SR_EXP_OE_N_DIS PORT->Group[SR_EXP_OE_N_PORT].OUTSET.reg = (1 << SR_EXP_OE_N_PIN)
22 26
23#define SCSPI SERCOM2 27/* Determine bits to set for mux selection */
28#if SR_EXP_DATAOUT_PIN % 2 == 0
29#define SR_EXP_DATAOUT_MUX_SEL PMUXE
30#else
31#define SR_EXP_DATAOUT_MUX_SEL PMUXO
32#endif
24 33
25#define P14_DIR 0x00004000 /* PIN14 DIR Bit */ 34/* Determine bits to set for mux selection */
26#define P14_OUT 0x00004000 /* PIN14 OUT Bit */ 35#if SR_EXP_SCLK_PIN % 2 == 0
27#define P15_DIR 0x00008000 /* PIN15 DIR Bit */ 36#define SR_EXP_SCLK_MUX_SEL PMUXE
28#define P15_OUT 0x00008000 /* PIN15 OUT Bit */ 37#else
29 38#define SR_EXP_SCLK_MUX_SEL PMUXO
30#define SC2_RCLCK_LO REG_PORT_OUTCLR1 = P14_OUT /* PB14 Low, SC2_RCLCK Low */ 39#endif
31#define SC2_RCLCK_HI REG_PORT_OUTSET1 = P14_OUT /* PB14 High, SC2_RCLCK High */
32#define SC2_OE_ENA REG_PORT_OUTCLR1 = P15_OUT /* PB15 Low, SC2_OE_N Low (Shift register enabled) */
33#define SC2_OE_DIS REG_PORT_OUTSET1 = P15_OUT /* PB15 High, SC2_OE_N High (Shift register disabled) */
34#define SC2_DIRSET REG_PORT_DIRSET1 = P14_DIR | P15_DIR; /* PB14 PB15 OUT */
35 40
41/* Data structure to define Shift Register output expander hardware */
42/* This structure gets shifted into registers LSB first */
36typedef union { 43typedef union {
37 struct { 44 struct {
38 uint16_t RSVD4:1; /*!< bit: 0 */ 45 uint16_t RSVD4:1; /*!< bit: 0 */
@@ -53,11 +60,11 @@ typedef union {
53 uint16_t HUB_CONNECT:1; /*!< bit: 15 SIGNAL VBUS CONNECT TO USB HUB WHEN 1 */ 60 uint16_t HUB_CONNECT:1; /*!< bit: 15 SIGNAL VBUS CONNECT TO USB HUB WHEN 1 */
54 } bit; /*!< Structure used for bit access */ 61 } bit; /*!< Structure used for bit access */
55 uint16_t reg; /*!< Type used for register access */ 62 uint16_t reg; /*!< Type used for register access */
56} Srdata_t; 63} sr_exp_t;
57 64
58extern Srdata_t srdata; 65extern sr_exp_t sr_exp_data;
59 66
60void SPI_WriteSRData(void); 67void SR_EXP_WriteData(void);
61void SPI_Init(void); 68void SR_EXP_Init(void);
62 69
63#endif //_SPI_H_ 70#endif //_SPI_H_
diff --git a/tmk_core/protocol/arm_atsam/usb/usb2422.c b/tmk_core/protocol/arm_atsam/usb/usb2422.c
index 7c78e41d4..ac19bf4ea 100644
--- a/tmk_core/protocol/arm_atsam/usb/usb2422.c
+++ b/tmk_core/protocol/arm_atsam/usb/usb2422.c
@@ -77,7 +77,6 @@ void USB2422_init(void)
77 Port *pport = PORT; 77 Port *pport = PORT;
78 Oscctrl *posc = OSCCTRL; 78 Oscctrl *posc = OSCCTRL;
79 Usb *pusb = USB; 79 Usb *pusb = USB;
80 Srdata_t *pspi = &srdata;
81 80
82 DBGC(DC_USB2422_INIT_BEGIN); 81 DBGC(DC_USB2422_INIT_BEGIN);
83 82
@@ -132,9 +131,9 @@ void USB2422_init(void)
132 131
133 i2c0_init(); //IC2 clk must be high at USB2422 reset release time to signal SMB configuration 132 i2c0_init(); //IC2 clk must be high at USB2422 reset release time to signal SMB configuration
134 133
135 pspi->bit.HUB_CONNECT = 1; //connect signal 134 sr_exp_data.bit.HUB_CONNECT = 1; //connect signal
136 pspi->bit.HUB_RESET_N = 1; //reset high 135 sr_exp_data.bit.HUB_RESET_N = 1; //reset high
137 SPI_WriteSRData(); 136 SR_EXP_WriteData();
138 137
139 CLK_delay_us(100); 138 CLK_delay_us(100);
140 139
@@ -150,16 +149,14 @@ void USB2422_init(void)
150 149
151void USB_reset(void) 150void USB_reset(void)
152{ 151{
153 Srdata_t *pspi = &srdata;
154
155 DBGC(DC_USB_RESET_BEGIN); 152 DBGC(DC_USB_RESET_BEGIN);
156 153
157 //pulse reset for at least 1 usec 154 //pulse reset for at least 1 usec
158 pspi->bit.HUB_RESET_N = 0; //reset low 155 sr_exp_data.bit.HUB_RESET_N = 0; //reset low
159 SPI_WriteSRData(); 156 SR_EXP_WriteData();
160 CLK_delay_us(1); 157 CLK_delay_us(1);
161 pspi->bit.HUB_RESET_N = 1; //reset high to run 158 sr_exp_data.bit.HUB_RESET_N = 1; //reset high to run
162 SPI_WriteSRData(); 159 SR_EXP_WriteData();
163 CLK_delay_us(1); 160 CLK_delay_us(1);
164 161
165 DBGC(DC_USB_RESET_COMPLETE); 162 DBGC(DC_USB_RESET_COMPLETE);
@@ -241,14 +238,14 @@ void USB_set_host_by_voltage(void)
241#ifndef MD_BOOTLOADER 238#ifndef MD_BOOTLOADER
242 usb_extra_state = USB_EXTRA_STATE_UNKNOWN; 239 usb_extra_state = USB_EXTRA_STATE_UNKNOWN;
243#endif //MD_BOOTLOADER 240#endif //MD_BOOTLOADER
244 srdata.bit.SRC_1 = 1; //USBC-1 available for test 241 sr_exp_data.bit.SRC_1 = 1; //USBC-1 available for test
245 srdata.bit.SRC_2 = 1; //USBC-2 available for test 242 sr_exp_data.bit.SRC_2 = 1; //USBC-2 available for test
246 srdata.bit.E_UP_N = 1; //HOST disable 243 sr_exp_data.bit.E_UP_N = 1; //HOST disable
247 srdata.bit.E_DN1_N = 1; //EXTRA disable 244 sr_exp_data.bit.E_DN1_N = 1; //EXTRA disable
248 srdata.bit.E_VBUS_1 = 0; //USBC-1 disable full power I/O 245 sr_exp_data.bit.E_VBUS_1 = 0; //USBC-1 disable full power I/O
249 srdata.bit.E_VBUS_2 = 0; //USBC-2 disable full power I/O 246 sr_exp_data.bit.E_VBUS_2 = 0; //USBC-2 disable full power I/O
250 247
251 SPI_WriteSRData(); 248 SR_EXP_WriteData();
252 249
253 CLK_delay_ms(250); 250 CLK_delay_ms(250);
254 251
@@ -262,37 +259,37 @@ void USB_set_host_by_voltage(void)
262 259
263 if (v_con_1 > v_con_2) 260 if (v_con_1 > v_con_2)
264 { 261 {
265 srdata.bit.S_UP = 0; //HOST to USBC-1 262 sr_exp_data.bit.S_UP = 0; //HOST to USBC-1
266 srdata.bit.S_DN1 = 1; //EXTRA to USBC-2 263 sr_exp_data.bit.S_DN1 = 1; //EXTRA to USBC-2
267 srdata.bit.SRC_1 = 1; //HOST on USBC-1 264 sr_exp_data.bit.SRC_1 = 1; //HOST on USBC-1
268 srdata.bit.SRC_2 = 0; //EXTRA available on USBC-2 265 sr_exp_data.bit.SRC_2 = 0; //EXTRA available on USBC-2
269 266
270 srdata.bit.E_VBUS_1 = 1; //USBC-1 enable full power I/O 267 sr_exp_data.bit.E_VBUS_1 = 1; //USBC-1 enable full power I/O
271 srdata.bit.E_VBUS_2 = 0; //USBC-2 disable full power I/O 268 sr_exp_data.bit.E_VBUS_2 = 0; //USBC-2 disable full power I/O
272 269
273 SPI_WriteSRData(); 270 SR_EXP_WriteData();
274 271
275 srdata.bit.E_UP_N = 0; //HOST enable 272 sr_exp_data.bit.E_UP_N = 0; //HOST enable
276 273
277 SPI_WriteSRData(); 274 SR_EXP_WriteData();
278 275
279 usb_host_port = USB_HOST_PORT_1; 276 usb_host_port = USB_HOST_PORT_1;
280 } 277 }
281 else 278 else
282 { 279 {
283 srdata.bit.S_UP = 1; //EXTRA to USBC-1 280 sr_exp_data.bit.S_UP = 1; //EXTRA to USBC-1
284 srdata.bit.S_DN1 = 0; //HOST to USBC-2 281 sr_exp_data.bit.S_DN1 = 0; //HOST to USBC-2
285 srdata.bit.SRC_1 = 0; //EXTRA available on USBC-1 282 sr_exp_data.bit.SRC_1 = 0; //EXTRA available on USBC-1
286 srdata.bit.SRC_2 = 1; //HOST on USBC-2 283 sr_exp_data.bit.SRC_2 = 1; //HOST on USBC-2
287 284
288 srdata.bit.E_VBUS_1 = 0; //USBC-1 disable full power I/O 285 sr_exp_data.bit.E_VBUS_1 = 0; //USBC-1 disable full power I/O
289 srdata.bit.E_VBUS_2 = 1; //USBC-2 enable full power I/O 286 sr_exp_data.bit.E_VBUS_2 = 1; //USBC-2 enable full power I/O
290 287
291 SPI_WriteSRData(); 288 SR_EXP_WriteData();
292 289
293 srdata.bit.E_UP_N = 0; //HOST enable 290 sr_exp_data.bit.E_UP_N = 0; //HOST enable
294 291
295 SPI_WriteSRData(); 292 SR_EXP_WriteData();
296 293
297 usb_host_port = USB_HOST_PORT_2; 294 usb_host_port = USB_HOST_PORT_2;
298 } 295 }
@@ -325,15 +322,15 @@ uint8_t USB2422_Port_Detect_Init(void)
325 if (v_con_1 > v_con_2) //Values updated from USB_set_host_by_voltage(); 322 if (v_con_1 > v_con_2) //Values updated from USB_set_host_by_voltage();
326 { 323 {
327 //1 flash for port 1 detected 324 //1 flash for port 1 detected
328 if (tmod > 500 && tmod < 600) { led_on; } 325 if (tmod > 500 && tmod < 600) { DBG_LED_ON; }
329 else { led_off; } 326 else { DBG_LED_OFF; }
330 } 327 }
331 else if (v_con_2 > v_con_1) //Values updated from USB_set_host_by_voltage(); 328 else if (v_con_2 > v_con_1) //Values updated from USB_set_host_by_voltage();
332 { 329 {
333 //2 flash for port 2 detected 330 //2 flash for port 2 detected
334 if (tmod > 500 && tmod < 600) { led_on; } 331 if (tmod > 500 && tmod < 600) { DBG_LED_ON; }
335 else if (tmod > 700 && tmod < 800) { led_on; } 332 else if (tmod > 700 && tmod < 800) { DBG_LED_ON; }
336 else { led_off; } 333 else { DBG_LED_OFF; }
337 } 334 }
338 335
339 if (CLK_get_ms() > port_detect_retry_ms) 336 if (CLK_get_ms() > port_detect_retry_ms)
@@ -357,12 +354,12 @@ void USB_ExtraSetState(uint8_t state)
357 if (state == USB_EXTRA_STATE_DISABLED_UNTIL_REPLUG) 354 if (state == USB_EXTRA_STATE_DISABLED_UNTIL_REPLUG)
358 state = USB_EXTRA_STATE_DISABLED; 355 state = USB_EXTRA_STATE_DISABLED;
359 356
360 if (usb_host_port == USB_HOST_PORT_1) srdata.bit.E_VBUS_2 = state; 357 if (usb_host_port == USB_HOST_PORT_1) sr_exp_data.bit.E_VBUS_2 = state;
361 else if (usb_host_port == USB_HOST_PORT_2) srdata.bit.E_VBUS_1 = state; 358 else if (usb_host_port == USB_HOST_PORT_2) sr_exp_data.bit.E_VBUS_1 = state;
362 else return; 359 else return;
363 360
364 srdata.bit.E_DN1_N = !state; 361 sr_exp_data.bit.E_DN1_N = !state;
365 SPI_WriteSRData(); 362 SR_EXP_WriteData();
366 363
367 usb_extra_state = state_save; 364 usb_extra_state = state_save;
368 365