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authorJames Young <18669334+noroadsleft@users.noreply.github.com>2020-05-30 13:14:59 -0700
committerGitHub <noreply@github.com>2020-05-30 13:14:59 -0700
commitfced377ac007d27f2650ccffbe0b18abcdcfe23d (patch)
treebd5b141987394a5a16cfc416bfe2b9efdb14d067 /tmk_core
parent7b8a013826ad90714a05ea522de53adf964ab3b9 (diff)
downloadqmk_firmware-fced377ac007d27f2650ccffbe0b18abcdcfe23d.tar.gz
qmk_firmware-fced377ac007d27f2650ccffbe0b18abcdcfe23d.zip
2020 May 30 Breaking Changes Update (#9215)
* Branch point for 2020 May 30 Breaking Change * Migrate `ACTION_LAYER_TOGGLE` to `TG()` (#8954) * Migrate `ACTION_MODS_ONESHOT` to `OSM()` (#8957) * Migrate `ACTION_DEFAULT_LAYER_SET` to `DF()` (#8958) * Migrate `ACTION_LAYER_MODS` to `LM()` (#8959) * Migrate `ACTION_MODS_TAP_KEY` to `MT()` (#8968) * Convert V-USB usbdrv to a submodule (#8321) * Unify Tap Hold functions and documentation (#8348) * Changing board names to prevent confusion (#8412) * Move the Keyboardio Model01 to a keyboardio/ subdir (#8499) * Move spaceman keyboards (#8830) * Migrate miscellaneous `fn_actions` entries (#8977) * Migrate `ACTION_MODS_KEY` to chained mod keycodes (#8979) * Organizing my keyboards (plaid, tartan, ergoinu) (#8537) * Refactor Lily58 to use split_common (#6260) * Refactor zinc to use split_common (#7114) * Add a message if bin/qmk doesn't work (#9000) * Fix conflicting types for 'tfp_printf' (#8269) * Fixed RGB_DISABLE_AFTER_TIMEOUT to be seconds based & small internals cleanup (#6480) * Refactor and updates to TKC1800 code (#8472) * Switch to qmk forks for everything (#9019) * audio refactor: replace deprecated PLAY_NOTE_ARRAY (#8484) * Audio enable corrections (2/3) (#8903) * Split HHKB to ANSI and JP layouts and Add VIA support for each (#8582) * Audio enable corrections (Part 4) (#8974) * Fix typo from PR7114 (#9171) * Augment future branch Changelogs (#8978) * Revert "Branch point for 2020 May 30 Breaking Change"
Diffstat (limited to 'tmk_core')
-rw-r--r--tmk_core/common.mk9
-rw-r--r--tmk_core/common/action.c4
-rw-r--r--tmk_core/common/action_tapping.c6
-rw-r--r--tmk_core/common/action_tapping.h2
-rw-r--r--tmk_core/common/chibios/printf.c233
-rw-r--r--tmk_core/common/chibios/printf.h110
-rw-r--r--tmk_core/common/command.c4
-rw-r--r--tmk_core/common/print.h5
-rw-r--r--tmk_core/protocol/arm_atsam/led_matrix.c2
-rw-r--r--tmk_core/protocol/chibios/main.c3
-rw-r--r--tmk_core/protocol/chibios/usb_main.c5
-rw-r--r--tmk_core/protocol/chibios/usb_main.h2
-rw-r--r--tmk_core/protocol/iwrap.mk18
-rw-r--r--tmk_core/protocol/iwrap/main.c2
-rw-r--r--tmk_core/protocol/vusb.mk16
-rw-r--r--tmk_core/protocol/vusb/main.c4
-rw-r--r--tmk_core/protocol/vusb/sendchar_usart.c2
-rw-r--r--tmk_core/protocol/vusb/usbdrv/Changelog.txt308
-rw-r--r--tmk_core/protocol/vusb/usbdrv/CommercialLicense.txt166
-rw-r--r--tmk_core/protocol/vusb/usbdrv/License.txt361
-rw-r--r--tmk_core/protocol/vusb/usbdrv/Readme.txt172
-rw-r--r--tmk_core/protocol/vusb/usbdrv/USB-ID-FAQ.txt149
-rw-r--r--tmk_core/protocol/vusb/usbdrv/USB-IDs-for-free.txt148
-rw-r--r--tmk_core/protocol/vusb/usbdrv/asmcommon.inc188
-rw-r--r--tmk_core/protocol/vusb/usbdrv/oddebug.c46
-rw-r--r--tmk_core/protocol/vusb/usbdrv/oddebug.h121
-rw-r--r--tmk_core/protocol/vusb/usbdrv/usbconfig-prototype.h376
-rw-r--r--tmk_core/protocol/vusb/usbdrv/usbdrv.c622
-rw-r--r--tmk_core/protocol/vusb/usbdrv/usbdrv.h730
-rw-r--r--tmk_core/protocol/vusb/usbdrv/usbdrvasm.S393
-rw-r--r--tmk_core/protocol/vusb/usbdrv/usbdrvasm.asm21
-rw-r--r--tmk_core/protocol/vusb/usbdrv/usbdrvasm12.inc393
-rw-r--r--tmk_core/protocol/vusb/usbdrv/usbdrvasm128.inc750
-rw-r--r--tmk_core/protocol/vusb/usbdrv/usbdrvasm15.inc423
-rw-r--r--tmk_core/protocol/vusb/usbdrv/usbdrvasm16.inc346
-rw-r--r--tmk_core/protocol/vusb/usbdrv/usbdrvasm165.inc453
-rw-r--r--tmk_core/protocol/vusb/usbdrv/usbdrvasm18-crc.inc707
-rw-r--r--tmk_core/protocol/vusb/usbdrv/usbdrvasm20.inc360
-rw-r--r--tmk_core/protocol/vusb/usbdrv/usbportability.h146
-rw-r--r--tmk_core/protocol/vusb/vusb.c34
40 files changed, 60 insertions, 7780 deletions
diff --git a/tmk_core/common.mk b/tmk_core/common.mk
index aa8a0eb7a..63de7c7ed 100644
--- a/tmk_core/common.mk
+++ b/tmk_core/common.mk
@@ -1,3 +1,5 @@
1PRINTF_PATH = $(LIB_PATH)/printf
2
1COMMON_DIR = common 3COMMON_DIR = common
2PLATFORM_COMMON_DIR = $(COMMON_DIR)/$(PLATFORM_KEY) 4PLATFORM_COMMON_DIR = $(COMMON_DIR)/$(PLATFORM_KEY)
3 5
@@ -21,7 +23,12 @@ TMK_COMMON_SRC += $(COMMON_DIR)/host.c \
21ifeq ($(PLATFORM),AVR) 23ifeq ($(PLATFORM),AVR)
22 TMK_COMMON_SRC += $(PLATFORM_COMMON_DIR)/xprintf.S 24 TMK_COMMON_SRC += $(PLATFORM_COMMON_DIR)/xprintf.S
23else ifeq ($(PLATFORM),CHIBIOS) 25else ifeq ($(PLATFORM),CHIBIOS)
24 TMK_COMMON_SRC += $(PLATFORM_COMMON_DIR)/printf.c 26 TMK_COMMON_SRC += $(PRINTF_PATH)/printf.c
27 TMK_COMMON_DEFS += -DPRINTF_DISABLE_SUPPORT_FLOAT
28 TMK_COMMON_DEFS += -DPRINTF_DISABLE_SUPPORT_EXPONENTIAL
29 TMK_COMMON_DEFS += -DPRINTF_DISABLE_SUPPORT_LONG_LONG
30 TMK_COMMON_DEFS += -DPRINTF_DISABLE_SUPPORT_PTRDIFF_T
31 VPATH += $(PRINTF_PATH)
25else ifeq ($(PLATFORM),ARM_ATSAM) 32else ifeq ($(PLATFORM),ARM_ATSAM)
26 TMK_COMMON_SRC += $(PLATFORM_COMMON_DIR)/printf.c 33 TMK_COMMON_SRC += $(PLATFORM_COMMON_DIR)/printf.c
27endif 34endif
diff --git a/tmk_core/common/action.c b/tmk_core/common/action.c
index 3b1268dc9..7a53e08ed 100644
--- a/tmk_core/common/action.c
+++ b/tmk_core/common/action.c
@@ -48,7 +48,7 @@ int retro_tapping_counter = 0;
48#endif 48#endif
49 49
50#ifdef IGNORE_MOD_TAP_INTERRUPT_PER_KEY 50#ifdef IGNORE_MOD_TAP_INTERRUPT_PER_KEY
51__attribute__((weak)) bool get_ignore_mod_tap_interrupt(uint16_t keycode) { return false; } 51__attribute__((weak)) bool get_ignore_mod_tap_interrupt(uint16_t keycode, keyrecord_t *record) { return false; }
52#endif 52#endif
53 53
54#ifndef TAP_CODE_DELAY 54#ifndef TAP_CODE_DELAY
@@ -335,7 +335,7 @@ void process_action(keyrecord_t *record, action_t action) {
335# if !defined(IGNORE_MOD_TAP_INTERRUPT) || defined(IGNORE_MOD_TAP_INTERRUPT_PER_KEY) 335# if !defined(IGNORE_MOD_TAP_INTERRUPT) || defined(IGNORE_MOD_TAP_INTERRUPT_PER_KEY)
336 if ( 336 if (
337# ifdef IGNORE_MOD_TAP_INTERRUPT_PER_KEY 337# ifdef IGNORE_MOD_TAP_INTERRUPT_PER_KEY
338 !get_ignore_mod_tap_interrupt(get_event_keycode(record->event, false)) && 338 !get_ignore_mod_tap_interrupt(get_event_keycode(record->event, false), &record) &&
339# endif 339# endif
340 record->tap.interrupted) { 340 record->tap.interrupted) {
341 dprint("mods_tap: tap: cancel: add_mods\n"); 341 dprint("mods_tap: tap: cancel: add_mods\n");
diff --git a/tmk_core/common/action_tapping.c b/tmk_core/common/action_tapping.c
index 34f08d890..fe545c79a 100644
--- a/tmk_core/common/action_tapping.c
+++ b/tmk_core/common/action_tapping.c
@@ -19,10 +19,10 @@
19# define IS_TAPPING_RELEASED() (IS_TAPPING() && !tapping_key.event.pressed) 19# define IS_TAPPING_RELEASED() (IS_TAPPING() && !tapping_key.event.pressed)
20# define IS_TAPPING_KEY(k) (IS_TAPPING() && KEYEQ(tapping_key.event.key, (k))) 20# define IS_TAPPING_KEY(k) (IS_TAPPING() && KEYEQ(tapping_key.event.key, (k)))
21 21
22__attribute__((weak)) uint16_t get_tapping_term(uint16_t keycode) { return TAPPING_TERM; } 22__attribute__((weak)) uint16_t get_tapping_term(uint16_t keycode, keyrecord_t *record) { return TAPPING_TERM; }
23 23
24# ifdef TAPPING_TERM_PER_KEY 24# ifdef TAPPING_TERM_PER_KEY
25# define WITHIN_TAPPING_TERM(e) (TIMER_DIFF_16(e.time, tapping_key.event.time) < get_tapping_term(get_event_keycode(tapping_key.event, false))) 25# define WITHIN_TAPPING_TERM(e) (TIMER_DIFF_16(e.time, tapping_key.event.time) < get_tapping_term(get_event_keycode(tapping_key.event, false), &tapping_key))
26# else 26# else
27# define WITHIN_TAPPING_TERM(e) (TIMER_DIFF_16(e.time, tapping_key.event.time) < TAPPING_TERM) 27# define WITHIN_TAPPING_TERM(e) (TIMER_DIFF_16(e.time, tapping_key.event.time) < TAPPING_TERM)
28# endif 28# endif
@@ -122,7 +122,7 @@ bool process_tapping(keyrecord_t *keyp) {
122# if defined(TAPPING_TERM_PER_KEY) || (TAPPING_TERM >= 500) || defined(PERMISSIVE_HOLD) || defined(PERMISSIVE_HOLD_PER_KEY) 122# if defined(TAPPING_TERM_PER_KEY) || (TAPPING_TERM >= 500) || defined(PERMISSIVE_HOLD) || defined(PERMISSIVE_HOLD_PER_KEY)
123 else if ( 123 else if (
124# ifdef TAPPING_TERM_PER_KEY 124# ifdef TAPPING_TERM_PER_KEY
125 (get_tapping_term(get_event_keycode(tapping_key.event, false)) >= 500) && 125 (get_tapping_term(get_event_keycode(tapping_key.event, false), keyp) >= 500) &&
126# endif 126# endif
127# ifdef PERMISSIVE_HOLD_PER_KEY 127# ifdef PERMISSIVE_HOLD_PER_KEY
128 !get_permissive_hold(get_event_keycode(tapping_key.event, false), keyp) && 128 !get_permissive_hold(get_event_keycode(tapping_key.event, false), keyp) &&
diff --git a/tmk_core/common/action_tapping.h b/tmk_core/common/action_tapping.h
index 5eaef1c5f..7015ce761 100644
--- a/tmk_core/common/action_tapping.h
+++ b/tmk_core/common/action_tapping.h
@@ -33,7 +33,7 @@ along with this program. If not, see <http://www.gnu.org/licenses/>.
33 33
34#ifndef NO_ACTION_TAPPING 34#ifndef NO_ACTION_TAPPING
35uint16_t get_event_keycode(keyevent_t event, bool update_layer_cache); 35uint16_t get_event_keycode(keyevent_t event, bool update_layer_cache);
36uint16_t get_tapping_term(uint16_t keycode); 36uint16_t get_tapping_term(uint16_t keycode, keyrecord_t *record);
37void action_tapping_process(keyrecord_t record); 37void action_tapping_process(keyrecord_t record);
38#endif 38#endif
39 39
diff --git a/tmk_core/common/chibios/printf.c b/tmk_core/common/chibios/printf.c
deleted file mode 100644
index a99752bb3..000000000
--- a/tmk_core/common/chibios/printf.c
+++ /dev/null
@@ -1,233 +0,0 @@
1/*
2 * found at: http://www.sparetimelabs.com/tinyprintf/tinyprintf.php
3 * and: http://www.sparetimelabs.com/printfrevisited/printfrevisited.php
4 */
5
6/*
7File: printf.c
8
9Copyright (C) 2004 Kustaa Nyholm
10
11This library is free software; you can redistribute it and/or
12modify it under the terms of the GNU Lesser General Public
13License as published by the Free Software Foundation; either
14version 2.1 of the License, or (at your option) any later version.
15
16This library is distributed in the hope that it will be useful,
17but WITHOUT ANY WARRANTY; without even the implied warranty of
18MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
19Lesser General Public License for more details.
20
21You should have received a copy of the GNU Lesser General Public
22License along with this library; if not, write to the Free Software
23Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
24
25*/
26
27#include "printf.h"
28
29typedef void (*putcf)(void*, char);
30static putcf stdout_putf;
31static void* stdout_putp;
32
33// this adds cca 400 bytes
34#define PRINTF_LONG_SUPPORT
35
36#ifdef PRINTF_LONG_SUPPORT
37
38static void uli2a(unsigned long int num, unsigned int base, int uc, char* bf) {
39 int n = 0;
40 unsigned int d = 1;
41 while (num / d >= base) d *= base;
42 while (d != 0) {
43 int dgt = num / d;
44 num %= d;
45 d /= base;
46 if (n || dgt > 0 || d == 0) {
47 *bf++ = dgt + (dgt < 10 ? '0' : (uc ? 'A' : 'a') - 10);
48 ++n;
49 }
50 }
51 *bf = 0;
52}
53
54static void li2a(long num, char* bf) {
55 if (num < 0) {
56 num = -num;
57 *bf++ = '-';
58 }
59 uli2a(num, 10, 0, bf);
60}
61
62#endif
63
64static void ui2a(unsigned int num, unsigned int base, int uc, char* bf) {
65 int n = 0;
66 unsigned int d = 1;
67 while (num / d >= base) d *= base;
68 while (d != 0) {
69 int dgt = num / d;
70 num %= d;
71 d /= base;
72 if (n || dgt > 0 || d == 0) {
73 *bf++ = dgt + (dgt < 10 ? '0' : (uc ? 'A' : 'a') - 10);
74 ++n;
75 }
76 }
77 *bf = 0;
78}
79
80static void i2a(int num, char* bf) {
81 if (num < 0) {
82 num = -num;
83 *bf++ = '-';
84 }
85 ui2a(num, 10, 0, bf);
86}
87
88static int a2d(char ch) {
89 if (ch >= '0' && ch <= '9')
90 return ch - '0';
91 else if (ch >= 'a' && ch <= 'f')
92 return ch - 'a' + 10;
93 else if (ch >= 'A' && ch <= 'F')
94 return ch - 'A' + 10;
95 else
96 return -1;
97}
98
99static char a2i(char ch, const char** src, int base, int* nump) {
100 const char* p = *src;
101 int num = 0;
102 int digit;
103 while ((digit = a2d(ch)) >= 0) {
104 if (digit > base) break;
105 num = num * base + digit;
106 ch = *p++;
107 }
108 *src = p;
109 *nump = num;
110 return ch;
111}
112
113static void putchw(void* putp, putcf putf, int n, char z, char* bf) {
114 char fc = z ? '0' : ' ';
115 char ch;
116 char* p = bf;
117 while (*p++ && n > 0) n--;
118 while (n-- > 0) putf(putp, fc);
119 while ((ch = *bf++)) putf(putp, ch);
120}
121
122void tfp_format(void* putp, putcf putf, const char* fmt, va_list va) {
123 // This used to handle max of 12, but binary support jumps this to at least 32
124 char bf[36];
125
126 char ch;
127
128 while ((ch = *(fmt++))) {
129 if (ch != '%')
130 putf(putp, ch);
131 else {
132 char lz = 0;
133#ifdef PRINTF_LONG_SUPPORT
134 char lng = 0;
135#endif
136 int w = 0;
137 ch = *(fmt++);
138 if (ch == '0') {
139 ch = *(fmt++);
140 lz = 1;
141 }
142 if (ch >= '0' && ch <= '9') {
143 ch = a2i(ch, &fmt, 10, &w);
144 }
145#ifdef PRINTF_LONG_SUPPORT
146 if (ch == 'l') {
147 ch = *(fmt++);
148 lng = 1;
149 }
150#endif
151 switch (ch) {
152 case 0:
153 goto abort;
154 case 'u': {
155#ifdef PRINTF_LONG_SUPPORT
156 if (lng)
157 uli2a(va_arg(va, unsigned long int), 10, 0, bf);
158 else
159#endif
160 ui2a(va_arg(va, unsigned int), 10, 0, bf);
161 putchw(putp, putf, w, lz, bf);
162 break;
163 }
164 case 'd': {
165#ifdef PRINTF_LONG_SUPPORT
166 if (lng)
167 li2a(va_arg(va, unsigned long int), bf);
168 else
169#endif
170 i2a(va_arg(va, int), bf);
171 putchw(putp, putf, w, lz, bf);
172 break;
173 }
174 case 'x':
175 case 'X':
176#ifdef PRINTF_LONG_SUPPORT
177 if (lng)
178 uli2a(va_arg(va, unsigned long int), 16, (ch == 'X'), bf);
179 else
180#endif
181 ui2a(va_arg(va, unsigned int), 16, (ch == 'X'), bf);
182 putchw(putp, putf, w, lz, bf);
183 break;
184 case 'c':
185 putf(putp, (char)(va_arg(va, int)));
186 break;
187 case 's':
188 putchw(putp, putf, w, 0, va_arg(va, char*));
189 break;
190 case 'b':
191#ifdef PRINTF_LONG_SUPPORT
192 if (lng)
193 uli2a(va_arg(va, unsigned long int), 2, 0, bf);
194 else
195#endif
196 ui2a(va_arg(va, unsigned int), 2, 0, bf);
197 putchw(putp, putf, w, lz, bf);
198 break;
199 case '%':
200 putf(putp, ch);
201 default:
202 break;
203 }
204 }
205 }
206abort:;
207}
208
209void init_printf(void* putp, void (*putf)(void*, char)) {
210 stdout_putf = putf;
211 stdout_putp = putp;
212}
213
214int tfp_printf(const char* fmt, ...) {
215 va_list va;
216 va_start(va, fmt);
217 tfp_format(stdout_putp, stdout_putf, fmt, va);
218 va_end(va);
219
220 return 1;
221}
222
223static void putcp(void* p, char c) { *(*((char**)p))++ = c; }
224
225int tfp_sprintf(char* s, const char* fmt, ...) {
226 va_list va;
227 va_start(va, fmt);
228 tfp_format(&s, putcp, fmt, va);
229 putcp(&s, 0);
230 va_end(va);
231
232 return 1;
233}
diff --git a/tmk_core/common/chibios/printf.h b/tmk_core/common/chibios/printf.h
deleted file mode 100644
index 775459e1e..000000000
--- a/tmk_core/common/chibios/printf.h
+++ /dev/null
@@ -1,110 +0,0 @@
1/*
2 * found at: http://www.sparetimelabs.com/tinyprintf/tinyprintf.php
3 * and: http://www.sparetimelabs.com/printfrevisited/printfrevisited.php
4 */
5
6/*
7File: printf.h
8
9Copyright (C) 2004 Kustaa Nyholm
10
11This library is free software; you can redistribute it and/or
12modify it under the terms of the GNU Lesser General Public
13License as published by the Free Software Foundation; either
14version 2.1 of the License, or (at your option) any later version.
15
16This library is distributed in the hope that it will be useful,
17but WITHOUT ANY WARRANTY; without even the implied warranty of
18MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.
19See the GNU Lesser General Public License for more details.
20
21You should have received a copy of the GNU Lesser General Public
22License along with this library; if not, write to the Free Software
23Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
24
25This library is realy just two files: 'printf.h' and 'printf.c'.
26
27They provide a simple and small (+200 loc) printf functionality to
28be used in embedded systems.
29
30I've found them so usefull in debugging that I do not bother with a
31debugger at all.
32
33They are distributed in source form, so to use them, just compile them
34into your project.
35
36Two printf variants are provided: printf and sprintf.
37
38The formats supported by this implementation are: 'd' 'u' 'c' 's' 'x' 'X'.
39
40Zero padding and field width are also supported.
41
42If the library is compiled with 'PRINTF_SUPPORT_LONG' defined then the
43long specifier is also
44supported. Note that this will pull in some long math routines (pun intended!)
45and thus make your executable noticably longer.
46
47The memory foot print of course depends on the target cpu, compiler and
48compiler options, but a rough guestimate (based on a H8S target) is about
491.4 kB for code and some twenty 'int's and 'char's, say 60 bytes of stack space.
50Not too bad. Your milage may vary. By hacking the source code you can
51get rid of some hunred bytes, I'm sure, but personally I feel the balance of
52functionality and flexibility versus code size is close to optimal for
53many embedded systems.
54
55To use the printf you need to supply your own character output function,
56something like :
57
58 void putc ( void* p, char c)
59 {
60 while (!SERIAL_PORT_EMPTY) ;
61 SERIAL_PORT_TX_REGISTER = c;
62 }
63
64Before you can call printf you need to initialize it to use your
65character output function with something like:
66
67 init_printf(NULL,putc);
68
69Notice the 'NULL' in 'init_printf' and the parameter 'void* p' in 'putc',
70the NULL (or any pointer) you pass into the 'init_printf' will eventually be
71passed to your 'putc' routine. This allows you to pass some storage space (or
72anything realy) to the character output function, if necessary.
73This is not often needed but it was implemented like that because it made
74implementing the sprintf function so neat (look at the source code).
75
76The code is re-entrant, except for the 'init_printf' function, so it
77is safe to call it from interupts too, although this may result in mixed output.
78If you rely on re-entrancy, take care that your 'putc' function is re-entrant!
79
80The printf and sprintf functions are actually macros that translate to
81'tfp_printf' and 'tfp_sprintf'. This makes it possible
82to use them along with 'stdio.h' printf's in a single source file.
83You just need to undef the names before you include the 'stdio.h'.
84Note that these are not function like macros, so if you have variables
85or struct members with these names, things will explode in your face.
86Without variadic macros this is the best we can do to wrap these
87fucnction. If it is a problem just give up the macros and use the
88functions directly or rename them.
89
90For further details see source code.
91
92regs Kusti, 23.10.2004
93*/
94
95#ifndef __TFP_PRINTF__
96#define __TFP_PRINTF__
97
98#include <stdarg.h>
99
100void init_printf(void* putp, void (*putf)(void*, char));
101
102int tfp_printf(const char* fmt, ...);
103int tfp_sprintf(char* s, const char* fmt, ...);
104
105void tfp_format(void* putp, void (*putf)(void*, char), const char* fmt, va_list va);
106
107#define printf tfp_printf
108#define sprintf tfp_sprintf
109
110#endif
diff --git a/tmk_core/common/command.c b/tmk_core/common/command.c
index ee3188646..3cfcba305 100644
--- a/tmk_core/common/command.c
+++ b/tmk_core/common/command.c
@@ -43,10 +43,6 @@ along with this program. If not, see <http://www.gnu.org/licenses/>.
43# include "mousekey.h" 43# include "mousekey.h"
44#endif 44#endif
45 45
46#ifdef PROTOCOL_VUSB
47# include "usbdrv.h"
48#endif
49
50#ifdef AUDIO_ENABLE 46#ifdef AUDIO_ENABLE
51# include "audio.h" 47# include "audio.h"
52#endif /* AUDIO_ENABLE */ 48#endif /* AUDIO_ENABLE */
diff --git a/tmk_core/common/print.h b/tmk_core/common/print.h
index 04ca55810..1c7723621 100644
--- a/tmk_core/common/print.h
+++ b/tmk_core/common/print.h
@@ -72,9 +72,7 @@ extern "C"
72 72
73# elif defined(PROTOCOL_CHIBIOS) /* PROTOCOL_CHIBIOS */ 73# elif defined(PROTOCOL_CHIBIOS) /* PROTOCOL_CHIBIOS */
74 74
75# ifndef TERMINAL_ENABLE 75# include "printf.h" // lib/printf/printf.h
76# include "chibios/printf.h"
77# endif
78 76
79# ifdef USER_PRINT /* USER_PRINT */ 77# ifdef USER_PRINT /* USER_PRINT */
80 78
@@ -89,7 +87,6 @@ extern "C"
89# define uprintf printf 87# define uprintf printf
90 88
91# else /* NORMAL PRINT */ 89# else /* NORMAL PRINT */
92
93// Create user & normal print defines 90// Create user & normal print defines
94# define print(s) printf(s) 91# define print(s) printf(s)
95# define println(s) printf(s "\r\n") 92# define println(s) printf(s "\r\n")
diff --git a/tmk_core/protocol/arm_atsam/led_matrix.c b/tmk_core/protocol/arm_atsam/led_matrix.c
index 24eab2506..4b8cc7c5e 100644
--- a/tmk_core/protocol/arm_atsam/led_matrix.c
+++ b/tmk_core/protocol/arm_atsam/led_matrix.c
@@ -270,7 +270,7 @@ void flush(void) {
270 } 270 }
271 271
272 // This should only be performed once per frame 272 // This should only be performed once per frame
273 pomod = (float)((g_rgb_counters.tick / 10) % (uint32_t)(1000.0f / led_animation_speed)) / 10.0f * led_animation_speed; 273 pomod = (float)((g_rgb_timer / 10) % (uint32_t)(1000.0f / led_animation_speed)) / 10.0f * led_animation_speed;
274 pomod *= 100.0f; 274 pomod *= 100.0f;
275 pomod = (uint32_t)pomod % 10000; 275 pomod = (uint32_t)pomod % 10000;
276 pomod /= 100.0f; 276 pomod /= 100.0f;
diff --git a/tmk_core/protocol/chibios/main.c b/tmk_core/protocol/chibios/main.c
index 61665eb6f..7d32c16ed 100644
--- a/tmk_core/protocol/chibios/main.c
+++ b/tmk_core/protocol/chibios/main.c
@@ -158,9 +158,6 @@ int main(void) {
158 /* Init USB */ 158 /* Init USB */
159 init_usb_driver(&USB_DRIVER); 159 init_usb_driver(&USB_DRIVER);
160 160
161 /* init printf */
162 init_printf(NULL, sendchar_pf);
163
164#ifdef MIDI_ENABLE 161#ifdef MIDI_ENABLE
165 setup_midi(); 162 setup_midi();
166#endif 163#endif
diff --git a/tmk_core/protocol/chibios/usb_main.c b/tmk_core/protocol/chibios/usb_main.c
index ecc83d9ec..65bd291be 100644
--- a/tmk_core/protocol/chibios/usb_main.c
+++ b/tmk_core/protocol/chibios/usb_main.c
@@ -796,9 +796,8 @@ int8_t sendchar(uint8_t c) {
796} 796}
797#endif /* CONSOLE_ENABLE */ 797#endif /* CONSOLE_ENABLE */
798 798
799void sendchar_pf(void *p, char c) { 799void _putchar(char character) {
800 (void)p; 800 sendchar(character);
801 sendchar((uint8_t)c);
802} 801}
803 802
804#ifdef RAW_ENABLE 803#ifdef RAW_ENABLE
diff --git a/tmk_core/protocol/chibios/usb_main.h b/tmk_core/protocol/chibios/usb_main.h
index 17041b4f2..94baf9b35 100644
--- a/tmk_core/protocol/chibios/usb_main.h
+++ b/tmk_core/protocol/chibios/usb_main.h
@@ -87,6 +87,4 @@ void console_flush_output(void);
87 87
88#endif /* CONSOLE_ENABLE */ 88#endif /* CONSOLE_ENABLE */
89 89
90void sendchar_pf(void *p, char c);
91
92#endif /* _USB_MAIN_H_ */ 90#endif /* _USB_MAIN_H_ */
diff --git a/tmk_core/protocol/iwrap.mk b/tmk_core/protocol/iwrap.mk
index eeedd83af..934235bd8 100644
--- a/tmk_core/protocol/iwrap.mk
+++ b/tmk_core/protocol/iwrap.mk
@@ -16,11 +16,17 @@ VPATH += $(TMK_DIR)/protocol/iwrap
16# V-USB 16# V-USB
17# 17#
18VUSB_DIR = protocol/vusb 18VUSB_DIR = protocol/vusb
19OPT_DEFS += -DPROTOCOL_VUSB
20SRC += $(VUSB_DIR)/vusb.c \
21 $(VUSB_DIR)/usbdrv/usbdrv.c \
22 $(VUSB_DIR)/usbdrv/usbdrvasm.S \
23 $(VUSB_DIR)/usbdrv/oddebug.c
24VPATH += $(TMK_DIR)/protocol/vusb:$(TMK_DIR)/protocol/vusb/usbdrv
25 19
20# Path to the V-USB library
21VUSB_PATH = $(LIB_PATH)/vusb
22
23SRC += $(VUSB_DIR)/vusb.c \
24 $(VUSB_PATH)/usbdrv/usbdrv.c \
25 $(VUSB_PATH)/usbdrv/usbdrvasm.S \
26 $(VUSB_PATH)/usbdrv/oddebug.c
26 27
28# Search Path
29VPATH += $(TMK_PATH)/$(VUSB_DIR)
30VPATH += $(VUSB_PATH)
31
32OPT_DEFS += -DPROTOCOL_VUSB
diff --git a/tmk_core/protocol/iwrap/main.c b/tmk_core/protocol/iwrap/main.c
index 6e9b5455b..4048a9791 100644
--- a/tmk_core/protocol/iwrap/main.c
+++ b/tmk_core/protocol/iwrap/main.c
@@ -29,7 +29,7 @@ along with this program. If not, see <http://www.gnu.org/licenses/>.
29#include "iwrap.h" 29#include "iwrap.h"
30#ifdef PROTOCOL_VUSB 30#ifdef PROTOCOL_VUSB
31# include "vusb.h" 31# include "vusb.h"
32# include "usbdrv.h" 32# include <usbdrv/usbdrv.h>
33#endif 33#endif
34#include "uart.h" 34#include "uart.h"
35#include "suart.h" 35#include "suart.h"
diff --git a/tmk_core/protocol/vusb.mk b/tmk_core/protocol/vusb.mk
index 6df0d0d33..5e564f748 100644
--- a/tmk_core/protocol/vusb.mk
+++ b/tmk_core/protocol/vusb.mk
@@ -1,13 +1,13 @@
1VUSB_DIR = protocol/vusb 1VUSB_DIR = protocol/vusb
2 2
3OPT_DEFS += -DPROTOCOL_VUSB 3# Path to the V-USB library
4VUSB_PATH = $(LIB_PATH)/vusb
4 5
5SRC += $(VUSB_DIR)/main.c \ 6SRC += $(VUSB_DIR)/main.c \
6 $(VUSB_DIR)/vusb.c \ 7 $(VUSB_DIR)/vusb.c \
7 $(VUSB_DIR)/usbdrv/usbdrv.c \ 8 $(VUSB_PATH)/usbdrv/usbdrv.c \
8 $(VUSB_DIR)/usbdrv/usbdrvasm.S \ 9 $(VUSB_PATH)/usbdrv/usbdrvasm.S \
9 $(VUSB_DIR)/usbdrv/oddebug.c 10 $(VUSB_PATH)/usbdrv/oddebug.c
10
11 11
12ifneq ($(strip $(CONSOLE_ENABLE)), yes) 12ifneq ($(strip $(CONSOLE_ENABLE)), yes)
13ifndef NO_UART 13ifndef NO_UART
@@ -18,4 +18,6 @@ endif
18 18
19# Search Path 19# Search Path
20VPATH += $(TMK_PATH)/$(VUSB_DIR) 20VPATH += $(TMK_PATH)/$(VUSB_DIR)
21VPATH += $(TMK_PATH)/$(VUSB_DIR)/usbdrv 21VPATH += $(VUSB_PATH)
22
23OPT_DEFS += -DPROTOCOL_VUSB
diff --git a/tmk_core/protocol/vusb/main.c b/tmk_core/protocol/vusb/main.c
index 7dc16926d..b4063273d 100644
--- a/tmk_core/protocol/vusb/main.c
+++ b/tmk_core/protocol/vusb/main.c
@@ -12,8 +12,8 @@
12#include <avr/wdt.h> 12#include <avr/wdt.h>
13#include <avr/sleep.h> 13#include <avr/sleep.h>
14#include <util/delay.h> 14#include <util/delay.h>
15#include "usbdrv.h" 15#include <usbdrv/usbdrv.h>
16#include "oddebug.h" 16#include <usbdrv/oddebug.h>
17#include "vusb.h" 17#include "vusb.h"
18#include "keyboard.h" 18#include "keyboard.h"
19#include "host.h" 19#include "host.h"
diff --git a/tmk_core/protocol/vusb/sendchar_usart.c b/tmk_core/protocol/vusb/sendchar_usart.c
index 42bd9ee36..a920a9a53 100644
--- a/tmk_core/protocol/vusb/sendchar_usart.c
+++ b/tmk_core/protocol/vusb/sendchar_usart.c
@@ -3,7 +3,7 @@
3 * License: GNU GPL v2 (see License.txt), GNU GPL v3 or proprietary (CommercialLicense.txt) 3 * License: GNU GPL v2 (see License.txt), GNU GPL v3 or proprietary (CommercialLicense.txt)
4 */ 4 */
5#include <stdint.h> 5#include <stdint.h>
6#include "oddebug.h" 6#include <usbdrv/oddebug.h>
7#include "sendchar.h" 7#include "sendchar.h"
8 8
9#if DEBUG_LEVEL > 0 9#if DEBUG_LEVEL > 0
diff --git a/tmk_core/protocol/vusb/usbdrv/Changelog.txt b/tmk_core/protocol/vusb/usbdrv/Changelog.txt
deleted file mode 100644
index 1e74180a9..000000000
--- a/tmk_core/protocol/vusb/usbdrv/Changelog.txt
+++ /dev/null
@@ -1,308 +0,0 @@
1This file documents changes in the firmware-only USB driver for atmel's AVR
2microcontrollers. New entries are always appended to the end of the file.
3Scroll down to the bottom to see the most recent changes.
4
52005-04-01:
6 - Implemented endpoint 1 as interrupt-in endpoint.
7 - Moved all configuration options to usbconfig.h which is not part of the
8 driver.
9 - Changed interface for usbVendorSetup().
10 - Fixed compatibility with ATMega8 device.
11 - Various minor optimizations.
12
132005-04-11:
14 - Changed interface to application: Use usbFunctionSetup(), usbFunctionRead()
15 and usbFunctionWrite() now. Added configuration options to choose which
16 of these functions to compile in.
17 - Assembler module delivers receive data non-inverted now.
18 - Made register and bit names compatible with more AVR devices.
19
202005-05-03:
21 - Allow address of usbRxBuf on any memory page as long as the buffer does
22 not cross 256 byte page boundaries.
23 - Better device compatibility: works with Mega88 now.
24 - Code optimization in debugging module.
25 - Documentation updates.
26
272006-01-02:
28 - Added (free) default Vendor- and Product-IDs bought from voti.nl.
29 - Added USBID-License.txt file which defines the rules for using the free
30 shared VID/PID pair.
31 - Added readme.txt to the usbdrv directory which clarifies administrative
32 issues.
33
342006-01-25:
35 - Added "configured state" to become more standards compliant.
36 - Added "HALT" state for interrupt endpoint.
37 - Driver passes the "USB Command Verifier" test from usb.org now.
38 - Made "serial number" a configuration option.
39 - Minor optimizations, we now recommend compiler option "-Os" for best
40 results.
41 - Added a version number to usbdrv.h
42
432006-02-03:
44 - New configuration variable USB_BUFFER_SECTION for the memory section where
45 the USB rx buffer will go. This defaults to ".bss" if not defined. Since
46 this buffer MUST NOT cross 256 byte pages (not even touch a page at the
47 end), the user may want to pass a linker option similar to
48 "-Wl,--section-start=.mybuffer=0x800060".
49 - Provide structure for usbRequest_t.
50 - New defines for USB constants.
51 - Prepared for HID implementations.
52 - Increased data size limit for interrupt transfers to 8 bytes.
53 - New macro usbInterruptIsReady() to query interrupt buffer state.
54
552006-02-18:
56 - Ensure that the data token which is sent as an ack to an OUT transfer is
57 always zero sized. This fixes a bug where the host reports an error after
58 sending an out transfer to the device, although all data arrived at the
59 device.
60 - Updated docs in usbdrv.h to reflect changed API in usbFunctionWrite().
61
62* Release 2006-02-20
63
64 - Give a compiler warning when compiling with debugging turned on.
65 - Added Oleg Semyonov's changes for IAR-cc compatibility.
66 - Added new (optional) functions usbDeviceConnect() and usbDeviceDisconnect()
67 (also thanks to Oleg!).
68 - Rearranged tests in usbPoll() to save a couple of instructions in the most
69 likely case that no actions are pending.
70 - We need a delay between the SET ADDRESS request until the new address
71 becomes active. This delay was handled in usbPoll() until now. Since the
72 spec says that the delay must not exceed 2ms, previous versions required
73 aggressive polling during the enumeration phase. We have now moved the
74 handling of the delay into the interrupt routine.
75 - We must not reply with NAK to a SETUP transaction. We can only achieve this
76 by making sure that the rx buffer is empty when SETUP tokens are expected.
77 We therefore don't pass zero sized data packets from the status phase of
78 a transfer to usbPoll(). This change MAY cause troubles if you rely on
79 receiving a less than 8 bytes long packet in usbFunctionWrite() to
80 identify the end of a transfer. usbFunctionWrite() will NEVER be called
81 with a zero length.
82
83* Release 2006-03-14
84
85 - Improved IAR C support: tiny memory model, more devices
86 - Added template usbconfig.h file under the name usbconfig-prototype.h
87
88* Release 2006-03-26
89
90 - Added provision for one more interrupt-in endpoint (endpoint 3).
91 - Added provision for one interrupt-out endpoint (endpoint 1).
92 - Added flowcontrol macros for USB.
93 - Added provision for custom configuration descriptor.
94 - Allow ANY two port bits for D+ and D-.
95 - Merged (optional) receive endpoint number into global usbRxToken variable.
96 - Use USB_CFG_IOPORTNAME instead of USB_CFG_IOPORT. We now construct the
97 variable name from the single port letter instead of computing the address
98 of related ports from the output-port address.
99
100* Release 2006-06-26
101
102 - Updated documentation in usbdrv.h and usbconfig-prototype.h to reflect the
103 new features.
104 - Removed "#warning" directives because IAR does not understand them. Use
105 unused static variables instead to generate a warning.
106 - Do not include <avr/io.h> when compiling with IAR.
107 - Introduced USB_CFG_DESCR_PROPS_* in usbconfig.h to configure how each
108 USB descriptor should be handled. It is now possible to provide descriptor
109 data in Flash, RAM or dynamically at runtime.
110 - STALL is now a status in usbTxLen* instead of a message. We can now conform
111 to the spec and leave the stall status pending until it is cleared.
112 - Made usbTxPacketCnt1 and usbTxPacketCnt3 public. This allows the
113 application code to reset data toggling on interrupt pipes.
114
115* Release 2006-07-18
116
117 - Added an #if !defined __ASSEMBLER__ to the warning in usbdrv.h. This fixes
118 an assembler error.
119 - usbDeviceDisconnect() takes pull-up resistor to high impedance now.
120
121* Release 2007-02-01
122
123 - Merged in some code size improvements from usbtiny (thanks to Dick
124 Streefland for these optimizations!)
125 - Special alignment requirement for usbRxBuf not required any more. Thanks
126 again to Dick Streefland for this hint!
127 - Reverted to "#warning" instead of unused static variables -- new versions
128 of IAR CC should handle this directive.
129 - Changed Open Source license to GNU GPL v2 in order to make linking against
130 other free libraries easier. We no longer require publication of the
131 circuit diagrams, but we STRONGLY encourage it. If you improve the driver
132 itself, PLEASE grant us a royalty free license to your changes for our
133 commercial license.
134
135* Release 2007-03-29
136
137 - New configuration option "USB_PUBLIC" in usbconfig.h.
138 - Set USB version number to 1.10 instead of 1.01.
139 - Code used USB_CFG_DESCR_PROPS_STRING_DEVICE and
140 USB_CFG_DESCR_PROPS_STRING_PRODUCT inconsistently. Changed all occurrences
141 to USB_CFG_DESCR_PROPS_STRING_PRODUCT.
142 - New assembler module for 16.5 MHz RC oscillator clock with PLL in receiver
143 code.
144 - New assembler module for 16 MHz crystal.
145 - usbdrvasm.S contains common code only, clock-specific parts have been moved
146 to usbdrvasm12.S, usbdrvasm16.S and usbdrvasm165.S respectively.
147
148* Release 2007-06-25
149
150 - 16 MHz module: Do SE0 check in stuffed bits as well.
151
152* Release 2007-07-07
153
154 - Define hi8(x) for IAR compiler to limit result to 8 bits. This is necessary
155 for negative values.
156 - Added 15 MHz module contributed by V. Bosch.
157 - Interrupt vector name can now be configured. This is useful if somebody
158 wants to use a different hardware interrupt than INT0.
159
160* Release 2007-08-07
161
162 - Moved handleIn3 routine in usbdrvasm16.S so that relative jump range is
163 not exceeded.
164 - More config options: USB_RX_USER_HOOK(), USB_INITIAL_DATATOKEN,
165 USB_COUNT_SOF
166 - USB_INTR_PENDING can now be a memory address, not just I/O
167
168* Release 2007-09-19
169
170 - Split out common parts of assembler modules into separate include file
171 - Made endpoint numbers configurable so that given interface definitions
172 can be matched. See USB_CFG_EP3_NUMBER in usbconfig-prototype.h.
173 - Store endpoint number for interrupt/bulk-out so that usbFunctionWriteOut()
174 can handle any number of endpoints.
175 - Define usbDeviceConnect() and usbDeviceDisconnect() even if no
176 USB_CFG_PULLUP_IOPORTNAME is defined. Directly set D+ and D- to 0 in this
177 case.
178
179* Release 2007-12-01
180
181 - Optimize usbDeviceConnect() and usbDeviceDisconnect() for less code size
182 when USB_CFG_PULLUP_IOPORTNAME is not defined.
183
184* Release 2007-12-13
185
186 - Renamed all include-only assembler modules from *.S to *.inc so that
187 people don't add them to their project sources.
188 - Distribute leap bits in tx loop more evenly for 16 MHz module.
189 - Use "macro" and "endm" instead of ".macro" and ".endm" for IAR
190 - Avoid compiler warnings for constant expr range by casting some values in
191 USB descriptors.
192
193* Release 2008-01-21
194
195 - Fixed bug in 15 and 16 MHz module where the new address set with
196 SET_ADDRESS was already accepted at the next NAK or ACK we send, not at
197 the next data packet we send. This caused problems when the host polled
198 too fast. Thanks to Alexander Neumann for his help and patience debugging
199 this issue!
200
201* Release 2008-02-05
202
203 - Fixed bug in 16.5 MHz module where a register was used in the interrupt
204 handler before it was pushed. This bug was introduced with version
205 2007-09-19 when common parts were moved to a separate file.
206 - Optimized CRC routine (thanks to Reimar Doeffinger).
207
208* Release 2008-02-16
209
210 - Removed outdated IAR compatibility stuff (code sections).
211 - Added hook macros for USB_RESET_HOOK() and USB_SET_ADDRESS_HOOK().
212 - Added optional routine usbMeasureFrameLength() for calibration of the
213 internal RC oscillator.
214
215* Release 2008-02-28
216
217 - USB_INITIAL_DATATOKEN defaults to USBPID_DATA1 now, which means that we
218 start with sending USBPID_DATA0.
219 - Changed defaults in usbconfig-prototype.h
220 - Added free USB VID/PID pair for MIDI class devices
221 - Restructured AVR-USB as separate package, not part of PowerSwitch any more.
222
223* Release 2008-04-18
224
225 - Restructured usbdrv.c so that it is easier to read and understand.
226 - Better code optimization with gcc 4.
227 - If a second interrupt in endpoint is enabled, also add it to config
228 descriptor.
229 - Added config option for long transfers (above 254 bytes), see
230 USB_CFG_LONG_TRANSFERS in usbconfig.h.
231 - Added 20 MHz module contributed by Jeroen Benschop.
232
233* Release 2008-05-13
234
235 - Fixed bug in libs-host/hiddata.c function usbhidGetReport(): length
236 was not incremented, pointer to length was incremented instead.
237 - Added code to command line tool(s) which claims an interface. This code
238 is disabled by default, but may be necessary on newer Linux kernels.
239 - Added usbconfig.h option "USB_CFG_CHECK_DATA_TOGGLING".
240 - New header "usbportability.h" prepares ports to other development
241 environments.
242 - Long transfers (above 254 bytes) did not work when usbFunctionRead() was
243 used to supply the data. Fixed this bug. [Thanks to Alexander Neumann!]
244 - In hiddata.c (example code for sending/receiving data over HID), use
245 USB_RECIP_DEVICE instead of USB_RECIP_INTERFACE for control transfers so
246 that we need not claim the interface.
247 - in usbPoll() loop 20 times polling for RESET state instead of 10 times.
248 This accounts for the higher clock rates we now support.
249 - Added a module for 12.8 MHz RC oscillator with PLL in receiver loop.
250 - Added hook to SOF code so that oscillator can be tuned to USB frame clock.
251 - Added timeout to waitForJ loop. Helps preventing unexpected hangs.
252 - Added example code for oscillator tuning to libs-device (thanks to
253 Henrik Haftmann for the idea to this routine).
254 - Implemented option USB_CFG_SUPPRESS_INTR_CODE.
255
256* Release 2008-10-22
257
258 - Fixed libs-device/osctune.h: OSCCAL is memory address on ATMega88 and
259 similar, not offset of 0x20 needs to be added.
260 - Allow distribution under GPLv3 for those who have to link against other
261 code distributed under GPLv3.
262
263* Release 2008-11-26
264
265 - Removed libusb-win32 dependency for hid-data example in Makefile.windows.
266 It was never required and confused many people.
267 - Added extern uchar usbRxToken to usbdrv.h.
268 - Integrated a module with CRC checks at 18 MHz by Lukas Schrittwieser.
269
270* Release 2009-03-23
271
272 - Hid-mouse example used settings from hid-data example, fixed that.
273 - Renamed project to V-USB due to a trademark issue with Atmel(r).
274 - Changed CommercialLicense.txt and USBID-License.txt to make the
275 background of USB ID registration clearer.
276
277* Release 2009-04-15
278
279 - Changed CommercialLicense.txt to reflect the new range of PIDs from
280 Jason Kotzin.
281 - Removed USBID-License.txt in favor of USB-IDs-for-free.txt and
282 USB-ID-FAQ.txt
283 - Fixed a bug in the 12.8 MHz module: End Of Packet decection was made in
284 the center between bit 0 and 1 of each byte. This is where the data lines
285 are expected to change and the sampled data may therefore be nonsense.
286 We therefore check EOP ONLY if bits 0 AND 1 have both been read as 0 on D-.
287 - Fixed a bitstuffing problem in the 16 MHz module: If bit 6 was stuffed,
288 the unstuffing code in the receiver routine was 1 cycle too long. If
289 multiple bytes had the unstuffing in bit 6, the error summed up until the
290 receiver was out of sync.
291 - Included option for faster CRC routine.
292 Thanks to Slawomir Fras (BoskiDialer) for this code!
293 - Updated bits in Configuration Descriptor's bmAttributes according to
294 USB 1.1 (in particular bit 7, it is a must-be-set bit now).
295
296* Release 2009-08-22
297
298 - Moved first DBG1() after odDebugInit() in all examples.
299 - Use vector INT0_vect instead of SIG_INTERRUPT0 if defined. This makes
300 V-USB compatible with the new "p" suffix devices (e.g. ATMega328p).
301 - USB_CFG_CLOCK_KHZ setting is now required in usbconfig.h (no default any
302 more).
303 - New option USB_CFG_DRIVER_FLASH_PAGE allows boot loaders on devices with
304 more than 64 kB flash.
305 - Built-in configuration descriptor allows custom definition for second
306 endpoint now.
307
308* Release 2010-07-15
diff --git a/tmk_core/protocol/vusb/usbdrv/CommercialLicense.txt b/tmk_core/protocol/vusb/usbdrv/CommercialLicense.txt
deleted file mode 100644
index 11d07d9df..000000000
--- a/tmk_core/protocol/vusb/usbdrv/CommercialLicense.txt
+++ /dev/null
@@ -1,166 +0,0 @@
1V-USB Driver Software License Agreement
2Version 2009-08-03
3
4THIS LICENSE AGREEMENT GRANTS YOU CERTAIN RIGHTS IN A SOFTWARE. YOU CAN
5ENTER INTO THIS AGREEMENT AND ACQUIRE THE RIGHTS OUTLINED BELOW BY PAYING
6THE AMOUNT ACCORDING TO SECTION 4 ("PAYMENT") TO OBJECTIVE DEVELOPMENT.
7
8
91 DEFINITIONS
10
111.1 "OBJECTIVE DEVELOPMENT" shall mean OBJECTIVE DEVELOPMENT Software GmbH,
12Grosse Schiffgasse 1A/7, 1020 Wien, AUSTRIA.
13
141.2 "You" shall mean the Licensee.
15
161.3 "V-USB" shall mean all files included in the package distributed under
17the name "vusb" by OBJECTIVE DEVELOPMENT (http://www.obdev.at/vusb/)
18unless otherwise noted. This includes the firmware-only USB device
19implementation for Atmel AVR microcontrollers, some simple device examples
20and host side software examples and libraries.
21
22
232 LICENSE GRANTS
24
252.1 Source Code. OBJECTIVE DEVELOPMENT shall furnish you with the source
26code of V-USB.
27
282.2 Distribution and Use. OBJECTIVE DEVELOPMENT grants you the
29non-exclusive right to use, copy and distribute V-USB with your hardware
30product(s), restricted by the limitations in section 3 below.
31
322.3 Modifications. OBJECTIVE DEVELOPMENT grants you the right to modify
33the source code and your copy of V-USB according to your needs.
34
352.4 USB IDs. OBJECTIVE DEVELOPMENT furnishes you with one or two USB
36Product ID(s), sent to you in e-mail. These Product IDs are reserved
37exclusively for you. OBJECTIVE DEVELOPMENT has obtained USB Product ID
38ranges under the Vendor ID 5824 from Wouter van Ooijen (Van Ooijen
39Technische Informatica, www.voti.nl) and under the Vendor ID 8352 from
40Jason Kotzin (Clay Logic, www.claylogic.com). Both owners of the Vendor IDs
41have obtained these IDs from the USB Implementers Forum, Inc.
42(www.usb.org). OBJECTIVE DEVELOPMENT disclaims all liability which might
43arise from the assignment of USB IDs.
44
452.5 USB Certification. Although not part of this agreement, we want to make
46it clear that you cannot become USB certified when you use V-USB or a USB
47Product ID assigned by OBJECTIVE DEVELOPMENT. AVR microcontrollers don't
48meet the electrical specifications required by the USB specification and
49the USB Implementers Forum certifies only members who bought a Vendor ID of
50their own.
51
52
533 LICENSE RESTRICTIONS
54
553.1 Number of Units. Only one of the following three definitions is
56applicable. Which one is determined by the amount you pay to OBJECTIVE
57DEVELOPMENT, see section 4 ("Payment") below.
58
59Hobby License: You may use V-USB according to section 2 above in no more
60than 5 hardware units. These units must not be sold for profit.
61
62Entry Level License: You may use V-USB according to section 2 above in no
63more than 150 hardware units.
64
65Professional License: You may use V-USB according to section 2 above in
66any number of hardware units, except for large scale production ("unlimited
67fair use"). Quantities below 10,000 units are not considered large scale
68production. If your reach quantities which are obviously large scale
69production, you must pay a license fee of 0.10 EUR per unit for all units
70above 10,000.
71
723.2 Rental. You may not rent, lease, or lend V-USB or otherwise encumber
73any copy of V-USB, or any of the rights granted herein.
74
753.3 Transfer. You may not transfer your rights under this Agreement to
76another party without OBJECTIVE DEVELOPMENT's prior written consent. If
77such consent is obtained, you may permanently transfer this License to
78another party. The recipient of such transfer must agree to all terms and
79conditions of this Agreement.
80
813.4 Reservation of Rights. OBJECTIVE DEVELOPMENT retains all rights not
82expressly granted.
83
843.5 Non-Exclusive Rights. Your license rights under this Agreement are
85non-exclusive.
86
873.6 Third Party Rights. This Agreement cannot grant you rights controlled
88by third parties. In particular, you are not allowed to use the USB logo or
89other trademarks owned by the USB Implementers Forum, Inc. without their
90consent. Since such consent depends on USB certification, it should be
91noted that V-USB will not pass certification because it does not
92implement checksum verification and the microcontroller ports do not meet
93the electrical specifications.
94
95
964 PAYMENT
97
98The payment amount depends on the variation of this agreement (according to
99section 3.1) into which you want to enter. Concrete prices are listed on
100OBJECTIVE DEVELOPMENT's web site, usually at
101http://www.obdev.at/vusb/license.html. You agree to pay the amount listed
102there to OBJECTIVE DEVELOPMENT or OBJECTIVE DEVELOPMENT's payment processor
103or reseller.
104
105
1065 COPYRIGHT AND OWNERSHIP
107
108V-USB is protected by copyright laws and international copyright
109treaties, as well as other intellectual property laws and treaties. V-USB
110is licensed, not sold.
111
112
1136 TERM AND TERMINATION
114
1156.1 Term. This Agreement shall continue indefinitely. However, OBJECTIVE
116DEVELOPMENT may terminate this Agreement and revoke the granted license and
117USB-IDs if you fail to comply with any of its terms and conditions.
118
1196.2 Survival of Terms. All provisions regarding secrecy, confidentiality
120and limitation of liability shall survive termination of this agreement.
121
122
1237 DISCLAIMER OF WARRANTY AND LIABILITY
124
125LIMITED WARRANTY. V-USB IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY
126KIND. TO THE MAXIMUM EXTENT PERMITTED BY APPLICABLE LAW, OBJECTIVE
127DEVELOPMENT AND ITS SUPPLIERS HEREBY DISCLAIM ALL WARRANTIES, EITHER
128EXPRESSED OR IMPLIED, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
129OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, TITLE, AND
130NON-INFRINGEMENT, WITH REGARD TO V-USB, AND THE PROVISION OF OR FAILURE
131TO PROVIDE SUPPORT SERVICES. THIS LIMITED WARRANTY GIVES YOU SPECIFIC LEGAL
132RIGHTS. YOU MAY HAVE OTHERS, WHICH VARY FROM STATE/JURISDICTION TO
133STATE/JURISDICTION.
134
135LIMITATION OF LIABILITY. TO THE MAXIMUM EXTENT PERMITTED BY APPLICABLE LAW,
136IN NO EVENT SHALL OBJECTIVE DEVELOPMENT OR ITS SUPPLIERS BE LIABLE FOR ANY
137SPECIAL, INCIDENTAL, INDIRECT, OR CONSEQUENTIAL DAMAGES WHATSOEVER
138(INCLUDING, WITHOUT LIMITATION, DAMAGES FOR LOSS OF BUSINESS PROFITS,
139BUSINESS INTERRUPTION, LOSS OF BUSINESS INFORMATION, OR ANY OTHER PECUNIARY
140LOSS) ARISING OUT OF THE USE OF OR INABILITY TO USE V-USB OR THE
141PROVISION OF OR FAILURE TO PROVIDE SUPPORT SERVICES, EVEN IF OBJECTIVE
142DEVELOPMENT HAS BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGES. IN ANY
143CASE, OBJECTIVE DEVELOPMENT'S ENTIRE LIABILITY UNDER ANY PROVISION OF THIS
144AGREEMENT SHALL BE LIMITED TO THE AMOUNT ACTUALLY PAID BY YOU FOR V-USB.
145
146
1478 MISCELLANEOUS TERMS
148
1498.1 Marketing. OBJECTIVE DEVELOPMENT has the right to mention for marketing
150purposes that you entered into this agreement.
151
1528.2 Entire Agreement. This document represents the entire agreement between
153OBJECTIVE DEVELOPMENT and you. It may only be modified in writing signed by
154an authorized representative of both, OBJECTIVE DEVELOPMENT and you.
155
1568.3 Severability. In case a provision of these terms and conditions should
157be or become partly or entirely invalid, ineffective, or not executable,
158the validity of all other provisions shall not be affected.
159
1608.4 Applicable Law. This agreement is governed by the laws of the Republic
161of Austria.
162
1638.5 Responsible Courts. The responsible courts in Vienna/Austria will have
164exclusive jurisdiction regarding all disputes in connection with this
165agreement.
166
diff --git a/tmk_core/protocol/vusb/usbdrv/License.txt b/tmk_core/protocol/vusb/usbdrv/License.txt
deleted file mode 100644
index ce4c3aed4..000000000
--- a/tmk_core/protocol/vusb/usbdrv/License.txt
+++ /dev/null
@@ -1,361 +0,0 @@
1OBJECTIVE DEVELOPMENT GmbH's V-USB driver software is distributed under the
2terms and conditions of the GNU GPL version 2 or the GNU GPL version 3. It is
3your choice whether you apply the terms of version 2 or version 3. The full
4text of GPLv2 is included below. In addition to the requirements in the GPL,
5we STRONGLY ENCOURAGE you to do the following:
6
7(1) Publish your entire project on a web site and drop us a note with the URL.
8Use the form at http://www.obdev.at/vusb/feedback.html for your submission.
9
10(2) Adhere to minimum publication standards. Please include AT LEAST:
11 - a circuit diagram in PDF, PNG or GIF format
12 - full source code for the host software
13 - a readme.txt file in ASCII format which describes the purpose of the
14 project and what can be found in which directories and which files
15 - a reference to http://www.obdev.at/vusb/
16
17(3) If you improve the driver firmware itself, please give us a free license
18to your modifications for our commercial license offerings.
19
20
21
22 GNU GENERAL PUBLIC LICENSE
23 Version 2, June 1991
24
25 Copyright (C) 1989, 1991 Free Software Foundation, Inc.
26 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
27 Everyone is permitted to copy and distribute verbatim copies
28 of this license document, but changing it is not allowed.
29
30 Preamble
31
32 The licenses for most software are designed to take away your
33freedom to share and change it. By contrast, the GNU General Public
34License is intended to guarantee your freedom to share and change free
35software--to make sure the software is free for all its users. This
36General Public License applies to most of the Free Software
37Foundation's software and to any other program whose authors commit to
38using it. (Some other Free Software Foundation software is covered by
39the GNU Library General Public License instead.) You can apply it to
40your programs, too.
41
42 When we speak of free software, we are referring to freedom, not
43price. Our General Public Licenses are designed to make sure that you
44have the freedom to distribute copies of free software (and charge for
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46if you want it, that you can change the software or use pieces of it
47in new free programs; and that you know you can do these things.
48
49 To protect your rights, we need to make restrictions that forbid
50anyone to deny you these rights or to ask you to surrender the rights.
51These restrictions translate to certain responsibilities for you if you
52distribute copies of the software, or if you modify it.
53
54 For example, if you distribute copies of such a program, whether
55gratis or for a fee, you must give the recipients all the rights that
56you have. You must make sure that they, too, receive or can get the
57source code. And you must show them these terms so they know their
58rights.
59
60 We protect your rights with two steps: (1) copyright the software, and
61(2) offer you this license which gives you legal permission to copy,
62distribute and/or modify the software.
63
64 Also, for each author's protection and ours, we want to make certain
65that everyone understands that there is no warranty for this free
66software. If the software is modified by someone else and passed on, we
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70
71 Finally, any free program is threatened constantly by software
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77 The precise terms and conditions for copying, distribution and
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80 GNU GENERAL PUBLIC LICENSE
81 TERMS AND CONDITIONS FOR COPYING, DISTRIBUTION AND MODIFICATION
82
83 0. This License applies to any program or other work which contains
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85under the terms of this General Public License. The "Program", below,
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93Activities other than copying, distribution and modification are not
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100 1. You may copy and distribute verbatim copies of the Program's
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150In addition, mere aggregation of another work not based on the Program
151with the Program (or with a work based on the Program) on a volume of
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247This section is intended to make thoroughly clear what is believed to
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250 8. If the distribution and/or use of the Program is restricted in
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258 9. The Free Software Foundation may publish revised and/or new versions
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260be similar in spirit to the present version, but may differ in detail to
261address new problems or concerns.
262
263Each version is given a distinguishing version number. If the Program
264specifies a version number of this License which applies to it and "any
265later version", you have the option of following the terms and conditions
266either of that version or of any later version published by the Free
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271 10. If you wish to incorporate parts of the Program into other free
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279 NO WARRANTY
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281 11. BECAUSE THE PROGRAM IS LICENSED FREE OF CHARGE, THERE IS NO WARRANTY
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298PROGRAMS), EVEN IF SUCH HOLDER OR OTHER PARTY HAS BEEN ADVISED OF THE
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301 END OF TERMS AND CONDITIONS
302
303 How to Apply These Terms to Your New Programs
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305 If you develop a new program, and you want it to be of the greatest
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309 To do so, attach the following notices to the program. It is safest
310to attach them to the start of each source file to most effectively
311convey the exclusion of warranty; and each file should have at least
312the "copyright" line and a pointer to where the full notice is found.
313
314 <one line to give the program's name and a brief idea of what it does.>
315 Copyright (C) <year> <name of author>
316
317 This program is free software; you can redistribute it and/or modify
318 it under the terms of the GNU General Public License as published by
319 the Free Software Foundation; either version 2 of the License, or
320 (at your option) any later version.
321
322 This program is distributed in the hope that it will be useful,
323 but WITHOUT ANY WARRANTY; without even the implied warranty of
324 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
325 GNU General Public License for more details.
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330
331
332Also add information on how to contact you by electronic and paper mail.
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334If the program is interactive, make it output a short notice like this
335when it starts in an interactive mode:
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337 Gnomovision version 69, Copyright (C) year name of author
338 Gnomovision comes with ABSOLUTELY NO WARRANTY; for details type `show w'.
339 This is free software, and you are welcome to redistribute it
340 under certain conditions; type `show c' for details.
341
342The hypothetical commands `show w' and `show c' should show the appropriate
343parts of the General Public License. Of course, the commands you use may
344be called something other than `show w' and `show c'; they could even be
345mouse-clicks or menu items--whatever suits your program.
346
347You should also get your employer (if you work as a programmer) or your
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349necessary. Here is a sample; alter the names:
350
351 Yoyodyne, Inc., hereby disclaims all copyright interest in the program
352 `Gnomovision' (which makes passes at compilers) written by James Hacker.
353
354 <signature of Ty Coon>, 1 April 1989
355 Ty Coon, President of Vice
356
357This General Public License does not permit incorporating your program into
358proprietary programs. If your program is a subroutine library, you may
359consider it more useful to permit linking proprietary applications with the
360library. If this is what you want to do, use the GNU Library General
361Public License instead of this License.
diff --git a/tmk_core/protocol/vusb/usbdrv/Readme.txt b/tmk_core/protocol/vusb/usbdrv/Readme.txt
deleted file mode 100644
index 3cff49f6f..000000000
--- a/tmk_core/protocol/vusb/usbdrv/Readme.txt
+++ /dev/null
@@ -1,172 +0,0 @@
1This is the readme file to Objective Development's firmware-only USB driver
2for Atmel AVR microcontrollers. For more information please visit
3http://www.obdev.at/vusb/
4
5This directory contains the USB firmware only. Copy it as-is to your own
6project and add all .c and .S files to your project (these files are marked
7with an asterisk in the list below). Then copy usbconfig-prototype.h as
8usbconfig.h to your project and edit it according to your configuration.
9
10
11TECHNICAL DOCUMENTATION
12=======================
13The technical documentation (API) for the firmware driver is contained in the
14file "usbdrv.h". Please read all of it carefully! Configuration options are
15documented in "usbconfig-prototype.h".
16
17The driver consists of the following files:
18 readme.txt ............. The file you are currently reading.
19 Changelog.txt .......... Release notes for all versions of the driver.
20 usbdrv.h ............... Driver interface definitions and technical docs.
21* usbdrv.c ............... High level language part of the driver. Link this
22 module to your code!
23* usbdrvasm.S ............ Assembler part of the driver. This module is mostly
24 a stub and includes one of the usbdrvasm*.S files
25 depending on processor clock. Link this module to
26 your code!
27 usbdrvasm*.inc ......... Assembler routines for particular clock frequencies.
28 Included by usbdrvasm.S, don't link it directly!
29 asmcommon.inc .......... Common assembler routines. Included by
30 usbdrvasm*.inc, don't link it directly!
31 usbconfig-prototype.h .. Prototype for your own usbdrv.h file.
32* oddebug.c .............. Debug functions. Only used when DEBUG_LEVEL is
33 defined to a value greater than 0. Link this module
34 to your code!
35 oddebug.h .............. Interface definitions of the debug module.
36 usbportability.h ....... Header with compiler-dependent stuff.
37 usbdrvasm.asm .......... Compatibility stub for IAR-C-compiler. Use this
38 module instead of usbdrvasm.S when you assembler
39 with IAR's tools.
40 License.txt ............ Open Source license for this driver.
41 CommercialLicense.txt .. Optional commercial license for this driver.
42 USB-ID-FAQ.txt ......... General infos about USB Product- and Vendor-IDs.
43 USB-IDs-for-free.txt ... List and terms of use for free shared PIDs.
44
45(*) ... These files should be linked to your project.
46
47
48CPU CORE CLOCK FREQUENCY
49========================
50We supply assembler modules for clock frequencies of 12 MHz, 12.8 MHz, 15 MHz,
5116 MHz, 16.5 MHz 18 MHz and 20 MHz. Other clock rates are not supported. The
52actual clock rate must be configured in usbconfig.h.
53
5412 MHz Clock
55This is the traditional clock rate of V-USB because it's the lowest clock
56rate where the timing constraints of the USB spec can be met.
57
5815 MHz Clock
59Similar to 12 MHz, but some NOPs inserted. On the other hand, the higher clock
60rate allows for some loops which make the resulting code size somewhat smaller
61than the 12 MHz version.
62
6316 MHz Clock
64This clock rate has been added for users of the Arduino board and other
65ready-made boards which come with a fixed 16 MHz crystal. It's also an option
66if you need the slightly higher clock rate for performance reasons. Since
6716 MHz is not divisible by the USB low speed bit clock of 1.5 MHz, the code
68is somewhat tricky and has to insert a leap cycle every third byte.
69
7012.8 MHz and 16.5 MHz Clock
71The assembler modules for these clock rates differ from the other modules
72because they have been built for an RC oscillator with only 1% precision. The
73receiver code inserts leap cycles to compensate for clock deviations. 1% is
74also the precision which can be achieved by calibrating the internal RC
75oscillator of the AVR. Please note that only AVRs with internal 64 MHz PLL
76oscillator can reach 16.5 MHz with the RC oscillator. This includes the very
77popular ATTiny25, ATTiny45, ATTiny85 series as well as the ATTiny26. Almost
78all AVRs can reach 12.8 MHz, although this is outside the specified range.
79
80See the EasyLogger example at http://www.obdev.at/vusb/easylogger.html for
81code which calibrates the RC oscillator based on the USB frame clock.
82
8318 MHz Clock
84This module is closer to the USB specification because it performs an on the
85fly CRC check for incoming packets. Packets with invalid checksum are
86discarded as required by the spec. If you also implement checks for data
87PID toggling on application level (see option USB_CFG_CHECK_DATA_TOGGLING
88in usbconfig.h for more info), this ensures data integrity. Due to the CRC
89tables and alignment requirements, this code is bigger than modules for other
90clock rates. To activate this module, you must define USB_CFG_CHECK_CRC to 1
91and USB_CFG_CLOCK_KHZ to 18000 in usbconfig.h.
92
9320 MHz Clock
94This module is for people who won't do it with less than the maximum. Since
9520 MHz is not divisible by the USB low speed bit clock of 1.5 MHz, the code
96uses similar tricks as the 16 MHz module to insert leap cycles.
97
98
99USB IDENTIFIERS
100===============
101Every USB device needs a vendor- and a product-identifier (VID and PID). VIDs
102are obtained from usb.org for a price of 1,500 USD. Once you have a VID, you
103can assign PIDs at will.
104
105Since an entry level cost of 1,500 USD is too high for most small companies
106and hobbyists, we provide some VID/PID pairs for free. See the file
107USB-IDs-for-free.txt for details.
108
109Objective Development also has some license offerings which include product
110IDs. See http://www.obdev.at/vusb/ for details.
111
112
113DEVELOPMENT SYSTEM
114==================
115This driver has been developed and optimized for the GNU compiler version 3
116and 4. We recommend that you use the GNU compiler suite because it is freely
117available. V-USB has also been ported to the IAR compiler and assembler. It
118has been tested with IAR 4.10B/W32 and 4.12A/W32 on an ATmega8 with the
119"small" and "tiny" memory model. Not every release is tested with IAR CC and
120the driver may therefore fail to compile with IAR. Please note that gcc is
121more efficient for usbdrv.c because this module has been deliberately
122optimized for gcc.
123
124Gcc version 3 produces smaller code than version 4 due to new optimizing
125capabilities which don't always improve things on 8 bit CPUs. The code size
126generated by gcc 4 can be reduced with the compiler options
127-fno-move-loop-invariants, -fno-tree-scev-cprop and
128-fno-inline-small-functions in addition to -Os. On devices with more than
1298k of flash memory, we also recommend the linker option --relax (written as
130-Wl,--relax for gcc) to convert absolute calls into relative where possible.
131
132For more information about optimizing options see:
133
134 http://www.tty1.net/blog/2008-04-29-avr-gcc-optimisations_en.html
135
136These optimizations are good for gcc 4.x. Version 3.x of gcc does not support
137most of these options and produces good code anyway.
138
139
140USING V-USB FOR FREE
141====================
142The AVR firmware driver is published under the GNU General Public License
143Version 2 (GPL2) and the GNU General Public License Version 3 (GPL3). It is
144your choice whether you apply the terms of version 2 or version 3.
145
146If you decide for the free GPL2 or GPL3, we STRONGLY ENCOURAGE you to do the
147following things IN ADDITION to the obligations from the GPL:
148
149(1) Publish your entire project on a web site and drop us a note with the URL.
150Use the form at http://www.obdev.at/vusb/feedback.html for your submission.
151If you don't have a web site, you can publish the project in obdev's
152documentation wiki at
153http://www.obdev.at/goto.php?t=vusb-wiki&p=hosted-projects.
154
155(2) Adhere to minimum publication standards. Please include AT LEAST:
156 - a circuit diagram in PDF, PNG or GIF format
157 - full source code for the host software
158 - a readme.txt file in ASCII format which describes the purpose of the
159 project and what can be found in which directories and which files
160 - a reference to http://www.obdev.at/vusb/
161
162(3) If you improve the driver firmware itself, please give us a free license
163to your modifications for our commercial license offerings.
164
165
166COMMERCIAL LICENSES FOR V-USB
167=============================
168If you don't want to publish your source code under the terms of the GPL,
169you can simply pay money for V-USB. As an additional benefit you get
170USB PIDs for free, reserved exclusively to you. See the file
171"CommercialLicense.txt" for details.
172
diff --git a/tmk_core/protocol/vusb/usbdrv/USB-ID-FAQ.txt b/tmk_core/protocol/vusb/usbdrv/USB-ID-FAQ.txt
deleted file mode 100644
index d1de8fb61..000000000
--- a/tmk_core/protocol/vusb/usbdrv/USB-ID-FAQ.txt
+++ /dev/null
@@ -1,149 +0,0 @@
1Version 2009-08-22
2
3==========================
4WHY DO WE NEED THESE IDs?
5==========================
6
7USB is more than a low level protocol for data transport. It also defines a
8common set of requests which must be understood by all devices. And as part
9of these common requests, the specification defines data structures, the
10USB Descriptors, which are used to describe the properties of the device.
11
12From the perspective of an operating system, it is therefore possible to find
13out basic properties of a device (such as e.g. the manufacturer and the name
14of the device) without a device-specific driver. This is essential because
15the operating system can choose a driver to load based on this information
16(Plug-And-Play).
17
18Among the most important properties in the Device Descriptor are the USB
19Vendor- and Product-ID. Both are 16 bit integers. The most simple form of
20driver matching is based on these IDs. The driver announces the Vendor- and
21Product-IDs of the devices it can handle and the operating system loads the
22appropriate driver when the device is connected.
23
24It is obvious that this technique only works if the pair Vendor- plus
25Product-ID is unique: Only devices which require the same driver can have the
26same pair of IDs.
27
28
29=====================================================
30HOW DOES THE USB STANDARD ENSURE THAT IDs ARE UNIQUE?
31=====================================================
32
33Since it is so important that USB IDs are unique, the USB Implementers Forum,
34Inc. (usb.org) needs a way to enforce this legally. It is not forbidden by
35law to build a device and assign it any random numbers as IDs. Usb.org
36therefore needs an agreement to regulate the use of USB IDs. The agreement
37binds only parties who agreed to it, of course. Everybody else is free to use
38any numbers for their IDs.
39
40So how can usb.org ensure that every manufacturer of USB devices enters into
41an agreement with them? They do it via trademark licensing. Usb.org has
42registered the trademark "USB", all associated logos and related terms. If
43you want to put an USB logo on your product or claim that it is USB
44compliant, you must license these trademarks from usb.org. And this is where
45you enter into an agreement. See the "USB-IF Trademark License Agreement and
46Usage Guidelines for the USB-IF Logo" at
47http://www.usb.org/developers/logo_license/.
48
49Licensing the USB trademarks requires that you buy a USB Vendor-ID from
50usb.org (one-time fee of ca. 2,000 USD), that you become a member of usb.org
51(yearly fee of ca. 4,000 USD) and that you meet all the technical
52specifications from the USB spec.
53
54This means that most hobbyists and small companies will never be able to
55become USB compliant, just because membership is so expensive. And you can't
56be compliant with a driver based on V-USB anyway, because the AVR's port pins
57don't meet the electrical specifications for USB. So, in principle, all
58hobbyists and small companies are free to choose any random numbers for their
59IDs. They have nothing to lose...
60
61There is one exception worth noting, though: If you use a sub-component which
62implements USB, the vendor of the sub-components may guarantee USB
63compliance. This might apply to some or all of FTDI's solutions.
64
65
66=======================================================================
67WHY SHOULD YOU OBTAIN USB IDs EVEN IF YOU DON'T LICENSE USB TRADEMARKS?
68=======================================================================
69
70You have learned in the previous section that you are free to choose any
71numbers for your IDs anyway. So why not do exactly this? There is still the
72technical issue. If you choose IDs which are already in use by somebody else,
73operating systems will load the wrong drivers and your device won't work.
74Even if you choose IDs which are not currently in use, they may be in use in
75the next version of the operating system or even after an automatic update.
76
77So what you need is a pair of Vendor- and Product-IDs for which you have the
78guarantee that no USB compliant product uses them. This implies that no
79operating system will ever ship with drivers responsible for these IDs.
80
81
82==============================================
83HOW DOES OBJECTIVE DEVELOPMENT HANDLE USB IDs?
84==============================================
85
86Objective Development gives away pairs of USB-IDs with their V-USB licenses.
87In order to ensure that these IDs are unique, Objective Development has an
88agreement with the company/person who has bought the USB Vendor-ID from
89usb.org. This agreement ensures that a range of USB Product-IDs is reserved
90for assignment by Objective Development and that the owner of the Vendor-ID
91won't give it to anybody else.
92
93This means that you have to trust three parties to ensure uniqueness of
94your IDs:
95
96 - Objective Development, that they don't give the same PID to more than
97 one person.
98 - The owner of the Vendor-ID that they don't assign PIDs from the range
99 assigned to Objective Development to anybody else.
100 - Usb.org that they don't assign the same Vendor-ID a second time.
101
102
103==================================
104WHO IS THE OWNER OF THE VENDOR-ID?
105==================================
106
107Objective Development has obtained ranges of USB Product-IDs under two
108Vendor-IDs: Under Vendor-ID 5824 from Wouter van Ooijen (Van Ooijen
109Technische Informatica, www.voti.nl) and under Vendor-ID 8352 from Jason
110Kotzin (Clay Logic, www.claylogic.com). Both VID owners have received their
111Vendor-ID directly from usb.org.
112
113
114=========================================================================
115CAN I USE USB-IDs FROM OBJECTIVE DEVELOPMENT WITH OTHER DRIVERS/HARDWARE?
116=========================================================================
117
118The short answer is: Yes. All you get is a guarantee that the IDs are never
119assigned to anybody else. What more do you need?
120
121
122============================
123WHAT ABOUT SHARED ID PAIRS?
124============================
125
126Objective Development has reserved some PID/VID pairs for shared use. You
127have no guarantee of uniqueness for them, except that no USB compliant device
128uses them. In order to avoid technical problems, we must ensure that all
129devices with the same pair of IDs use the same driver on kernel level. For
130details, see the file USB-IDs-for-free.txt.
131
132
133======================================================
134I HAVE HEARD THAT SUB-LICENSING OF USB-IDs IS ILLEGAL?
135======================================================
136
137A 16 bit integer number cannot be protected by copyright laws. It is not
138sufficiently complex. And since none of the parties involved entered into the
139USB-IF Trademark License Agreement, we are not bound by this agreement. So
140there is no reason why it should be illegal to sub-license USB-IDs.
141
142
143=============================================
144WHO IS LIABLE IF THERE ARE INCOMPATIBILITIES?
145=============================================
146
147Objective Development disclaims all liabilities which might arise from the
148assignment of IDs. If you guarantee product features to your customers
149without proper disclaimer, YOU are liable for that.
diff --git a/tmk_core/protocol/vusb/usbdrv/USB-IDs-for-free.txt b/tmk_core/protocol/vusb/usbdrv/USB-IDs-for-free.txt
deleted file mode 100644
index 2f4d59ad1..000000000
--- a/tmk_core/protocol/vusb/usbdrv/USB-IDs-for-free.txt
+++ /dev/null
@@ -1,148 +0,0 @@
1Version 2009-08-22
2
3===========================
4FREE USB-IDs FOR SHARED USE
5===========================
6
7Objective Development has reserved a set of USB Product-IDs for use according
8to the guidelines outlined below. For more information about the concept of
9USB IDs please see the file USB-ID-FAQ.txt. Objective Development guarantees
10that the IDs listed below are not used by any USB compliant devices.
11
12
13====================
14MECHANISM OF SHARING
15====================
16
17From a technical point of view, two different devices can share the same USB
18Vendor- and Product-ID if they require the same driver on operating system
19level. We make use of this fact by assigning separate IDs for various device
20classes. On application layer, devices must be distinguished by their textual
21name or serial number. We offer separate sets of IDs for discrimination by
22textual name and for serial number.
23
24Examples for shared use of USB IDs are included with V-USB in the "examples"
25subdirectory.
26
27
28======================================
29IDs FOR DISCRIMINATION BY TEXTUAL NAME
30======================================
31
32If you use one of the IDs listed below, your device and host-side software
33must conform to these rules:
34
35(1) The USB device MUST provide a textual representation of the manufacturer
36and product identification. The manufacturer identification MUST be available
37at least in USB language 0x0409 (English/US).
38
39(2) The textual manufacturer identification MUST contain either an Internet
40domain name (e.g. "mycompany.com") registered and owned by you, or an e-mail
41address under your control (e.g. "myname@gmx.net"). You can embed the domain
42name or e-mail address in any string you like, e.g. "Objective Development
43http://www.obdev.at/vusb/".
44
45(3) You are responsible for retaining ownership of the domain or e-mail
46address for as long as any of your products are in use.
47
48(4) You may choose any string for the textual product identification, as long
49as this string is unique within the scope of your textual manufacturer
50identification.
51
52(5) Application side device look-up MUST be based on the textual manufacturer
53and product identification in addition to VID/PID matching. The driver
54matching MUST be a comparison of the entire strings, NOT a sub-string match.
55
56(6) For devices which implement a particular USB device class (e.g. HID), the
57operating system's default class driver MUST be used. If an operating system
58driver for Vendor Class devices is needed, this driver must be libusb or
59libusb-win32 (see http://libusb.org/ and
60http://libusb-win32.sourceforge.net/).
61
62Table if IDs for discrimination by textual name:
63
64PID dec (hex) | VID dec (hex) | Description of use
65==============+===============+============================================
661500 (0x05dc) | 5824 (0x16c0) | For Vendor Class devices with libusb
67--------------+---------------+--------------------------------------------
681503 (0x05df) | 5824 (0x16c0) | For generic HID class devices (which are
69 | | NOT mice, keyboards or joysticks)
70--------------+---------------+--------------------------------------------
711505 (0x05e1) | 5824 (0x16c0) | For CDC-ACM class devices (modems)
72--------------+---------------+--------------------------------------------
731508 (0x05e4) | 5824 (0x16c0) | For MIDI class devices
74--------------+---------------+--------------------------------------------
75
76Note that Windows caches the textual product- and vendor-description for
77mice, keyboards and joysticks. Name-bsed discrimination is therefore not
78recommended for these device classes.
79
80
81=======================================
82IDs FOR DISCRIMINATION BY SERIAL NUMBER
83=======================================
84
85If you use one of the IDs listed below, your device and host-side software
86must conform to these rules:
87
88(1) The USB device MUST provide a textual representation of the serial
89number. The serial number string MUST be available at least in USB language
900x0409 (English/US).
91
92(2) The serial number MUST start with either an Internet domain name (e.g.
93"mycompany.com") registered and owned by you, or an e-mail address under your
94control (e.g. "myname@gmx.net"), both terminated with a colon (":") character.
95You MAY append any string you like for further discrimination of your devices.
96
97(3) You are responsible for retaining ownership of the domain or e-mail
98address for as long as any of your products are in use.
99
100(5) Application side device look-up MUST be based on the serial number string
101in addition to VID/PID matching. The matching must start at the first
102character of the serial number string and include the colon character
103terminating your domain or e-mail address. It MAY stop anywhere after that.
104
105(6) For devices which implement a particular USB device class (e.g. HID), the
106operating system's default class driver MUST be used. If an operating system
107driver for Vendor Class devices is needed, this driver must be libusb or
108libusb-win32 (see http://libusb.org/ and
109http://libusb-win32.sourceforge.net/).
110
111Table if IDs for discrimination by serial number string:
112
113PID dec (hex) | VID dec (hex) | Description of use
114===============+===============+===========================================
11510200 (0x27d8) | 5824 (0x16c0) | For Vendor Class devices with libusb
116---------------+---------------+-------------------------------------------
11710201 (0x27d9) | 5824 (0x16c0) | For generic HID class devices (which are
118 | | NOT mice, keyboards or joysticks)
119---------------+---------------+-------------------------------------------
12010202 (0x27da) | 5824 (0x16c0) | For USB Mice
121---------------+---------------+-------------------------------------------
12210203 (0x27db) | 5824 (0x16c0) | For USB Keyboards
123---------------+---------------+-------------------------------------------
12410204 (0x27db) | 5824 (0x16c0) | For USB Joysticks
125---------------+---------------+-------------------------------------------
12610205 (0x27dc) | 5824 (0x16c0) | For CDC-ACM class devices (modems)
127---------------+---------------+-------------------------------------------
12810206 (0x27dd) | 5824 (0x16c0) | For MIDI class devices
129---------------+---------------+-------------------------------------------
130
131
132=================
133ORIGIN OF USB-IDs
134=================
135
136OBJECTIVE DEVELOPMENT Software GmbH has obtained all VID/PID pairs listed
137here from Wouter van Ooijen (see www.voti.nl) for exclusive disposition.
138Wouter van Ooijen has obtained the VID from the USB Implementers Forum, Inc.
139(see www.usb.org). The VID is registered for the company name "Van Ooijen
140Technische Informatica".
141
142
143==========
144DISCLAIMER
145==========
146
147OBJECTIVE DEVELOPMENT Software GmbH disclaims all liability for any
148problems which are caused by the shared use of these VID/PID pairs.
diff --git a/tmk_core/protocol/vusb/usbdrv/asmcommon.inc b/tmk_core/protocol/vusb/usbdrv/asmcommon.inc
deleted file mode 100644
index 07d692be3..000000000
--- a/tmk_core/protocol/vusb/usbdrv/asmcommon.inc
+++ /dev/null
@@ -1,188 +0,0 @@
1/* Name: asmcommon.inc
2 * Project: V-USB, virtual USB port for Atmel's(r) AVR(r) microcontrollers
3 * Author: Christian Starkjohann
4 * Creation Date: 2007-11-05
5 * Tabsize: 4
6 * Copyright: (c) 2007 by OBJECTIVE DEVELOPMENT Software GmbH
7 * License: GNU GPL v2 (see License.txt), GNU GPL v3 or proprietary (CommercialLicense.txt)
8 * Revision: $Id$
9 */
10
11/* Do not link this file! Link usbdrvasm.S instead, which includes the
12 * appropriate implementation!
13 */
14
15/*
16General Description:
17This file contains assembler code which is shared among the USB driver
18implementations for different CPU cocks. Since the code must be inserted
19in the middle of the module, it's split out into this file and #included.
20
21Jump destinations called from outside:
22 sofError: Called when no start sequence was found.
23 se0: Called when a package has been successfully received.
24 overflow: Called when receive buffer overflows.
25 doReturn: Called after sending data.
26
27Outside jump destinations used by this module:
28 waitForJ: Called to receive an already arriving packet.
29 sendAckAndReti:
30 sendNakAndReti:
31 sendCntAndReti:
32 usbSendAndReti:
33
34The following macros must be defined before this file is included:
35 .macro POP_STANDARD
36 .endm
37 .macro POP_RETI
38 .endm
39*/
40
41#define token x1
42
43overflow:
44 ldi x2, 1<<USB_INTR_PENDING_BIT
45 USB_STORE_PENDING(x2) ; clear any pending interrupts
46ignorePacket:
47 clr token
48 rjmp storeTokenAndReturn
49
50;----------------------------------------------------------------------------
51; Processing of received packet (numbers in brackets are cycles after center of SE0)
52;----------------------------------------------------------------------------
53;This is the only non-error exit point for the software receiver loop
54;we don't check any CRCs here because there is no time left.
55se0:
56 subi cnt, USB_BUFSIZE ;[5]
57 neg cnt ;[6]
58 sub YL, cnt ;[7]
59 sbci YH, 0 ;[8]
60 ldi x2, 1<<USB_INTR_PENDING_BIT ;[9]
61 USB_STORE_PENDING(x2) ;[10] clear pending intr and check flag later. SE0 should be over.
62 ld token, y ;[11]
63 cpi token, USBPID_DATA0 ;[13]
64 breq handleData ;[14]
65 cpi token, USBPID_DATA1 ;[15]
66 breq handleData ;[16]
67 lds shift, usbDeviceAddr;[17]
68 ldd x2, y+1 ;[19] ADDR and 1 bit endpoint number
69 lsl x2 ;[21] shift out 1 bit endpoint number
70 cpse x2, shift ;[22]
71 rjmp ignorePacket ;[23]
72/* only compute endpoint number in x3 if required later */
73#if USB_CFG_HAVE_INTRIN_ENDPOINT || USB_CFG_IMPLEMENT_FN_WRITEOUT
74 ldd x3, y+2 ;[24] endpoint number + crc
75 rol x3 ;[26] shift in LSB of endpoint
76#endif
77 cpi token, USBPID_IN ;[27]
78 breq handleIn ;[28]
79 cpi token, USBPID_SETUP ;[29]
80 breq handleSetupOrOut ;[30]
81 cpi token, USBPID_OUT ;[31]
82 brne ignorePacket ;[32] must be ack, nak or whatever
83; rjmp handleSetupOrOut ; fallthrough
84
85;Setup and Out are followed by a data packet two bit times (16 cycles) after
86;the end of SE0. The sync code allows up to 40 cycles delay from the start of
87;the sync pattern until the first bit is sampled. That's a total of 56 cycles.
88handleSetupOrOut: ;[32]
89#if USB_CFG_IMPLEMENT_FN_WRITEOUT /* if we have data for endpoint != 0, set usbCurrentTok to address */
90 andi x3, 0xf ;[32]
91 breq storeTokenAndReturn ;[33]
92 mov token, x3 ;[34] indicate that this is endpoint x OUT
93#endif
94storeTokenAndReturn:
95 sts usbCurrentTok, token;[35]
96doReturn:
97 POP_STANDARD ;[37] 12...16 cycles
98 USB_LOAD_PENDING(YL) ;[49]
99 sbrc YL, USB_INTR_PENDING_BIT;[50] check whether data is already arriving
100 rjmp waitForJ ;[51] save the pops and pushes -- a new interrupt is already pending
101sofError:
102 POP_RETI ;macro call
103 reti
104
105handleData:
106#if USB_CFG_CHECK_CRC
107 CRC_CLEANUP_AND_CHECK ; jumps to ignorePacket if CRC error
108#endif
109 lds shift, usbCurrentTok;[18]
110 tst shift ;[20]
111 breq doReturn ;[21]
112 lds x2, usbRxLen ;[22]
113 tst x2 ;[24]
114 brne sendNakAndReti ;[25]
115; 2006-03-11: The following two lines fix a problem where the device was not
116; recognized if usbPoll() was called less frequently than once every 4 ms.
117 cpi cnt, 4 ;[26] zero sized data packets are status phase only -- ignore and ack
118 brmi sendAckAndReti ;[27] keep rx buffer clean -- we must not NAK next SETUP
119#if USB_CFG_CHECK_DATA_TOGGLING
120 sts usbCurrentDataToken, token ; store for checking by C code
121#endif
122 sts usbRxLen, cnt ;[28] store received data, swap buffers
123 sts usbRxToken, shift ;[30]
124 lds x2, usbInputBufOffset;[32] swap buffers
125 ldi cnt, USB_BUFSIZE ;[34]
126 sub cnt, x2 ;[35]
127 sts usbInputBufOffset, cnt;[36] buffers now swapped
128 rjmp sendAckAndReti ;[38] 40 + 17 = 57 until SOP
129
130handleIn:
131;We don't send any data as long as the C code has not processed the current
132;input data and potentially updated the output data. That's more efficient
133;in terms of code size than clearing the tx buffers when a packet is received.
134 lds x1, usbRxLen ;[30]
135 cpi x1, 1 ;[32] negative values are flow control, 0 means "buffer free"
136 brge sendNakAndReti ;[33] unprocessed input packet?
137 ldi x1, USBPID_NAK ;[34] prepare value for usbTxLen
138#if USB_CFG_HAVE_INTRIN_ENDPOINT
139 andi x3, 0xf ;[35] x3 contains endpoint
140#if USB_CFG_SUPPRESS_INTR_CODE
141 brne sendNakAndReti ;[36]
142#else
143 brne handleIn1 ;[36]
144#endif
145#endif
146 lds cnt, usbTxLen ;[37]
147 sbrc cnt, 4 ;[39] all handshake tokens have bit 4 set
148 rjmp sendCntAndReti ;[40] 42 + 16 = 58 until SOP
149 sts usbTxLen, x1 ;[41] x1 == USBPID_NAK from above
150 ldi YL, lo8(usbTxBuf) ;[43]
151 ldi YH, hi8(usbTxBuf) ;[44]
152 rjmp usbSendAndReti ;[45] 57 + 12 = 59 until SOP
153
154; Comment about when to set usbTxLen to USBPID_NAK:
155; We should set it back when we receive the ACK from the host. This would
156; be simple to implement: One static variable which stores whether the last
157; tx was for endpoint 0 or 1 and a compare in the receiver to distinguish the
158; ACK. However, we set it back immediately when we send the package,
159; assuming that no error occurs and the host sends an ACK. We save one byte
160; RAM this way and avoid potential problems with endless retries. The rest of
161; the driver assumes error-free transfers anyway.
162
163#if !USB_CFG_SUPPRESS_INTR_CODE && USB_CFG_HAVE_INTRIN_ENDPOINT /* placed here due to relative jump range */
164handleIn1: ;[38]
165#if USB_CFG_HAVE_INTRIN_ENDPOINT3
166; 2006-06-10 as suggested by O.Tamura: support second INTR IN / BULK IN endpoint
167 cpi x3, USB_CFG_EP3_NUMBER;[38]
168 breq handleIn3 ;[39]
169#endif
170 lds cnt, usbTxLen1 ;[40]
171 sbrc cnt, 4 ;[42] all handshake tokens have bit 4 set
172 rjmp sendCntAndReti ;[43] 47 + 16 = 63 until SOP
173 sts usbTxLen1, x1 ;[44] x1 == USBPID_NAK from above
174 ldi YL, lo8(usbTxBuf1) ;[46]
175 ldi YH, hi8(usbTxBuf1) ;[47]
176 rjmp usbSendAndReti ;[48] 50 + 12 = 62 until SOP
177
178#if USB_CFG_HAVE_INTRIN_ENDPOINT3
179handleIn3:
180 lds cnt, usbTxLen3 ;[41]
181 sbrc cnt, 4 ;[43]
182 rjmp sendCntAndReti ;[44] 49 + 16 = 65 until SOP
183 sts usbTxLen3, x1 ;[45] x1 == USBPID_NAK from above
184 ldi YL, lo8(usbTxBuf3) ;[47]
185 ldi YH, hi8(usbTxBuf3) ;[48]
186 rjmp usbSendAndReti ;[49] 51 + 12 = 63 until SOP
187#endif
188#endif
diff --git a/tmk_core/protocol/vusb/usbdrv/oddebug.c b/tmk_core/protocol/vusb/usbdrv/oddebug.c
deleted file mode 100644
index bcd28ff01..000000000
--- a/tmk_core/protocol/vusb/usbdrv/oddebug.c
+++ /dev/null
@@ -1,46 +0,0 @@
1/* Name: oddebug.c
2 * Project: AVR library
3 * Author: Christian Starkjohann
4 * Creation Date: 2005-01-16
5 * Tabsize: 4
6 * Copyright: (c) 2005 by OBJECTIVE DEVELOPMENT Software GmbH
7 * License: GNU GPL v2 (see License.txt), GNU GPL v3 or proprietary (CommercialLicense.txt)
8 * This Revision: $Id: oddebug.c 692 2008-11-07 15:07:40Z cs $
9 */
10
11#include "oddebug.h"
12
13#if DEBUG_LEVEL > 0
14
15# warning "Never compile production devices with debugging enabled"
16
17static void uartPutc(char c) {
18 while (!(ODDBG_USR & (1 << ODDBG_UDRE)))
19 ; /* wait for data register empty */
20 ODDBG_UDR = c;
21}
22
23static uchar hexAscii(uchar h) {
24 h &= 0xf;
25 if (h >= 10) h += 'a' - (uchar)10 - '0';
26 h += '0';
27 return h;
28}
29
30static void printHex(uchar c) {
31 uartPutc(hexAscii(c >> 4));
32 uartPutc(hexAscii(c));
33}
34
35void odDebug(uchar prefix, uchar *data, uchar len) {
36 printHex(prefix);
37 uartPutc(':');
38 while (len--) {
39 uartPutc(' ');
40 printHex(*data++);
41 }
42 uartPutc('\r');
43 uartPutc('\n');
44}
45
46#endif
diff --git a/tmk_core/protocol/vusb/usbdrv/oddebug.h b/tmk_core/protocol/vusb/usbdrv/oddebug.h
deleted file mode 100644
index f93f33879..000000000
--- a/tmk_core/protocol/vusb/usbdrv/oddebug.h
+++ /dev/null
@@ -1,121 +0,0 @@
1/* Name: oddebug.h
2 * Project: AVR library
3 * Author: Christian Starkjohann
4 * Creation Date: 2005-01-16
5 * Tabsize: 4
6 * Copyright: (c) 2005 by OBJECTIVE DEVELOPMENT Software GmbH
7 * License: GNU GPL v2 (see License.txt), GNU GPL v3 or proprietary (CommercialLicense.txt)
8 * This Revision: $Id: oddebug.h 692 2008-11-07 15:07:40Z cs $
9 */
10
11#ifndef __oddebug_h_included__
12#define __oddebug_h_included__
13
14/*
15General Description:
16This module implements a function for debug logs on the serial line of the
17AVR microcontroller. Debugging can be configured with the define
18'DEBUG_LEVEL'. If this macro is not defined or defined to 0, all debugging
19calls are no-ops. If it is 1, DBG1 logs will appear, but not DBG2. If it is
202, DBG1 and DBG2 logs will be printed.
21
22A debug log consists of a label ('prefix') to indicate which debug log created
23the output and a memory block to dump in hex ('data' and 'len').
24*/
25
26#ifndef F_CPU
27# define F_CPU 12000000 /* 12 MHz */
28#endif
29
30/* make sure we have the UART defines: */
31#include "usbportability.h"
32
33#ifndef uchar
34# define uchar unsigned char
35#endif
36
37#if DEBUG_LEVEL > 0 && !(defined TXEN || defined TXEN0) /* no UART in device */
38# warning "Debugging disabled because device has no UART"
39# undef DEBUG_LEVEL
40#endif
41
42#ifndef DEBUG_LEVEL
43# define DEBUG_LEVEL 0
44#endif
45
46/* ------------------------------------------------------------------------- */
47
48#if DEBUG_LEVEL > 0
49# define DBG1(prefix, data, len) odDebug(prefix, data, len)
50#else
51# define DBG1(prefix, data, len)
52#endif
53
54#if DEBUG_LEVEL > 1
55# define DBG2(prefix, data, len) odDebug(prefix, data, len)
56#else
57# define DBG2(prefix, data, len)
58#endif
59
60/* ------------------------------------------------------------------------- */
61
62#if DEBUG_LEVEL > 0
63extern void odDebug(uchar prefix, uchar *data, uchar len);
64
65/* Try to find our control registers; ATMEL likes to rename these */
66
67# if defined UBRR
68# define ODDBG_UBRR UBRR
69# elif defined UBRRL
70# define ODDBG_UBRR UBRRL
71# elif defined UBRR0
72# define ODDBG_UBRR UBRR0
73# elif defined UBRR0L
74# define ODDBG_UBRR UBRR0L
75# endif
76
77# if defined UCR
78# define ODDBG_UCR UCR
79# elif defined UCSRB
80# define ODDBG_UCR UCSRB
81# elif defined UCSR0B
82# define ODDBG_UCR UCSR0B
83# endif
84
85# if defined TXEN
86# define ODDBG_TXEN TXEN
87# else
88# define ODDBG_TXEN TXEN0
89# endif
90
91# if defined USR
92# define ODDBG_USR USR
93# elif defined UCSRA
94# define ODDBG_USR UCSRA
95# elif defined UCSR0A
96# define ODDBG_USR UCSR0A
97# endif
98
99# if defined UDRE
100# define ODDBG_UDRE UDRE
101# else
102# define ODDBG_UDRE UDRE0
103# endif
104
105# if defined UDR
106# define ODDBG_UDR UDR
107# elif defined UDR0
108# define ODDBG_UDR UDR0
109# endif
110
111static inline void odDebugInit(void) {
112 ODDBG_UCR |= (1 << ODDBG_TXEN);
113 ODDBG_UBRR = F_CPU / (19200 * 16L) - 1;
114}
115#else
116# define odDebugInit()
117#endif
118
119/* ------------------------------------------------------------------------- */
120
121#endif /* __oddebug_h_included__ */
diff --git a/tmk_core/protocol/vusb/usbdrv/usbconfig-prototype.h b/tmk_core/protocol/vusb/usbdrv/usbconfig-prototype.h
deleted file mode 100644
index 020ea5147..000000000
--- a/tmk_core/protocol/vusb/usbdrv/usbconfig-prototype.h
+++ /dev/null
@@ -1,376 +0,0 @@
1/* Name: usbconfig.h
2 * Project: V-USB, virtual USB port for Atmel's(r) AVR(r) microcontrollers
3 * Author: Christian Starkjohann
4 * Creation Date: 2005-04-01
5 * Tabsize: 4
6 * Copyright: (c) 2005 by OBJECTIVE DEVELOPMENT Software GmbH
7 * License: GNU GPL v2 (see License.txt), GNU GPL v3 or proprietary (CommercialLicense.txt)
8 * This Revision: $Id: usbconfig-prototype.h 785 2010-05-30 17:57:07Z cs $
9 */
10
11#ifndef __usbconfig_h_included__
12#define __usbconfig_h_included__
13
14/*
15General Description:
16This file is an example configuration (with inline documentation) for the USB
17driver. It configures V-USB for USB D+ connected to Port D bit 2 (which is
18also hardware interrupt 0 on many devices) and USB D- to Port D bit 4. You may
19wire the lines to any other port, as long as D+ is also wired to INT0 (or any
20other hardware interrupt, as long as it is the highest level interrupt, see
21section at the end of this file).
22+ To create your own usbconfig.h file, copy this file to your project's
23+ firmware source directory) and rename it to "usbconfig.h".
24+ Then edit it accordingly.
25*/
26
27/* ---------------------------- Hardware Config ---------------------------- */
28
29#define USB_CFG_IOPORTNAME D
30/* This is the port where the USB bus is connected. When you configure it to
31 * "B", the registers PORTB, PINB and DDRB will be used.
32 */
33#define USB_CFG_DMINUS_BIT 4
34/* This is the bit number in USB_CFG_IOPORT where the USB D- line is connected.
35 * This may be any bit in the port.
36 */
37#define USB_CFG_DPLUS_BIT 2
38/* This is the bit number in USB_CFG_IOPORT where the USB D+ line is connected.
39 * This may be any bit in the port. Please note that D+ must also be connected
40 * to interrupt pin INT0! [You can also use other interrupts, see section
41 * "Optional MCU Description" below, or you can connect D- to the interrupt, as
42 * it is required if you use the USB_COUNT_SOF feature. If you use D- for the
43 * interrupt, the USB interrupt will also be triggered at Start-Of-Frame
44 * markers every millisecond.]
45 */
46#define USB_CFG_CLOCK_KHZ (F_CPU / 1000)
47/* Clock rate of the AVR in kHz. Legal values are 12000, 12800, 15000, 16000,
48 * 16500, 18000 and 20000. The 12.8 MHz and 16.5 MHz versions of the code
49 * require no crystal, they tolerate +/- 1% deviation from the nominal
50 * frequency. All other rates require a precision of 2000 ppm and thus a
51 * crystal!
52 * Since F_CPU should be defined to your actual clock rate anyway, you should
53 * not need to modify this setting.
54 */
55#define USB_CFG_CHECK_CRC 0
56/* Define this to 1 if you want that the driver checks integrity of incoming
57 * data packets (CRC checks). CRC checks cost quite a bit of code size and are
58 * currently only available for 18 MHz crystal clock. You must choose
59 * USB_CFG_CLOCK_KHZ = 18000 if you enable this option.
60 */
61
62/* ----------------------- Optional Hardware Config ------------------------ */
63
64/* #define USB_CFG_PULLUP_IOPORTNAME D */
65/* If you connect the 1.5k pullup resistor from D- to a port pin instead of
66 * V+, you can connect and disconnect the device from firmware by calling
67 * the macros usbDeviceConnect() and usbDeviceDisconnect() (see usbdrv.h).
68 * This constant defines the port on which the pullup resistor is connected.
69 */
70/* #define USB_CFG_PULLUP_BIT 4 */
71/* This constant defines the bit number in USB_CFG_PULLUP_IOPORT (defined
72 * above) where the 1.5k pullup resistor is connected. See description
73 * above for details.
74 */
75
76/* --------------------------- Functional Range ---------------------------- */
77
78#define USB_CFG_HAVE_INTRIN_ENDPOINT 0
79/* Define this to 1 if you want to compile a version with two endpoints: The
80 * default control endpoint 0 and an interrupt-in endpoint (any other endpoint
81 * number).
82 */
83#define USB_CFG_HAVE_INTRIN_ENDPOINT3 0
84/* Define this to 1 if you want to compile a version with three endpoints: The
85 * default control endpoint 0, an interrupt-in endpoint 3 (or the number
86 * configured below) and a catch-all default interrupt-in endpoint as above.
87 * You must also define USB_CFG_HAVE_INTRIN_ENDPOINT to 1 for this feature.
88 */
89#define USB_CFG_EP3_NUMBER 3
90/* If the so-called endpoint 3 is used, it can now be configured to any other
91 * endpoint number (except 0) with this macro. Default if undefined is 3.
92 */
93/* #define USB_INITIAL_DATATOKEN USBPID_DATA1 */
94/* The above macro defines the startup condition for data toggling on the
95 * interrupt/bulk endpoints 1 and 3. Defaults to USBPID_DATA1.
96 * Since the token is toggled BEFORE sending any data, the first packet is
97 * sent with the oposite value of this configuration!
98 */
99#define USB_CFG_IMPLEMENT_HALT 0
100/* Define this to 1 if you also want to implement the ENDPOINT_HALT feature
101 * for endpoint 1 (interrupt endpoint). Although you may not need this feature,
102 * it is required by the standard. We have made it a config option because it
103 * bloats the code considerably.
104 */
105#define USB_CFG_SUPPRESS_INTR_CODE 0
106/* Define this to 1 if you want to declare interrupt-in endpoints, but don't
107 * want to send any data over them. If this macro is defined to 1, functions
108 * usbSetInterrupt() and usbSetInterrupt3() are omitted. This is useful if
109 * you need the interrupt-in endpoints in order to comply to an interface
110 * (e.g. HID), but never want to send any data. This option saves a couple
111 * of bytes in flash memory and the transmit buffers in RAM.
112 */
113#define USB_CFG_INTR_POLL_INTERVAL 10
114/* If you compile a version with endpoint 1 (interrupt-in), this is the poll
115 * interval. The value is in milliseconds and must not be less than 10 ms for
116 * low speed devices.
117 */
118#define USB_CFG_IS_SELF_POWERED 0
119/* Define this to 1 if the device has its own power supply. Set it to 0 if the
120 * device is powered from the USB bus.
121 */
122#define USB_CFG_MAX_BUS_POWER 100
123/* Set this variable to the maximum USB bus power consumption of your device.
124 * The value is in milliamperes. [It will be divided by two since USB
125 * communicates power requirements in units of 2 mA.]
126 */
127#define USB_CFG_IMPLEMENT_FN_WRITE 0
128/* Set this to 1 if you want usbFunctionWrite() to be called for control-out
129 * transfers. Set it to 0 if you don't need it and want to save a couple of
130 * bytes.
131 */
132#define USB_CFG_IMPLEMENT_FN_READ 0
133/* Set this to 1 if you need to send control replies which are generated
134 * "on the fly" when usbFunctionRead() is called. If you only want to send
135 * data from a static buffer, set it to 0 and return the data from
136 * usbFunctionSetup(). This saves a couple of bytes.
137 */
138#define USB_CFG_IMPLEMENT_FN_WRITEOUT 0
139/* Define this to 1 if you want to use interrupt-out (or bulk out) endpoints.
140 * You must implement the function usbFunctionWriteOut() which receives all
141 * interrupt/bulk data sent to any endpoint other than 0. The endpoint number
142 * can be found in 'usbRxToken'.
143 */
144#define USB_CFG_HAVE_FLOWCONTROL 0
145/* Define this to 1 if you want flowcontrol over USB data. See the definition
146 * of the macros usbDisableAllRequests() and usbEnableAllRequests() in
147 * usbdrv.h.
148 */
149#define USB_CFG_DRIVER_FLASH_PAGE 0
150/* If the device has more than 64 kBytes of flash, define this to the 64 k page
151 * where the driver's constants (descriptors) are located. Or in other words:
152 * Define this to 1 for boot loaders on the ATMega128.
153 */
154#define USB_CFG_LONG_TRANSFERS 0
155/* Define this to 1 if you want to send/receive blocks of more than 254 bytes
156 * in a single control-in or control-out transfer. Note that the capability
157 * for long transfers increases the driver size.
158 */
159/* #define USB_RX_USER_HOOK(data, len) if(usbRxToken == (uchar)USBPID_SETUP) blinkLED(); */
160/* This macro is a hook if you want to do unconventional things. If it is
161 * defined, it's inserted at the beginning of received message processing.
162 * If you eat the received message and don't want default processing to
163 * proceed, do a return after doing your things. One possible application
164 * (besides debugging) is to flash a status LED on each packet.
165 */
166/* #define USB_RESET_HOOK(resetStarts) if(!resetStarts){hadUsbReset();} */
167/* This macro is a hook if you need to know when an USB RESET occurs. It has
168 * one parameter which distinguishes between the start of RESET state and its
169 * end.
170 */
171/* #define USB_SET_ADDRESS_HOOK() hadAddressAssigned(); */
172/* This macro (if defined) is executed when a USB SET_ADDRESS request was
173 * received.
174 */
175#define USB_COUNT_SOF 0
176/* define this macro to 1 if you need the global variable "usbSofCount" which
177 * counts SOF packets. This feature requires that the hardware interrupt is
178 * connected to D- instead of D+.
179 */
180/* #ifdef __ASSEMBLER__
181 * macro myAssemblerMacro
182 * in YL, TCNT0
183 * sts timer0Snapshot, YL
184 * endm
185 * #endif
186 * #define USB_SOF_HOOK myAssemblerMacro
187 * This macro (if defined) is executed in the assembler module when a
188 * Start Of Frame condition is detected. It is recommended to define it to
189 * the name of an assembler macro which is defined here as well so that more
190 * than one assembler instruction can be used. The macro may use the register
191 * YL and modify SREG. If it lasts longer than a couple of cycles, USB messages
192 * immediately after an SOF pulse may be lost and must be retried by the host.
193 * What can you do with this hook? Since the SOF signal occurs exactly every
194 * 1 ms (unless the host is in sleep mode), you can use it to tune OSCCAL in
195 * designs running on the internal RC oscillator.
196 * Please note that Start Of Frame detection works only if D- is wired to the
197 * interrupt, not D+. THIS IS DIFFERENT THAN MOST EXAMPLES!
198 */
199#define USB_CFG_CHECK_DATA_TOGGLING 0
200/* define this macro to 1 if you want to filter out duplicate data packets
201 * sent by the host. Duplicates occur only as a consequence of communication
202 * errors, when the host does not receive an ACK. Please note that you need to
203 * implement the filtering yourself in usbFunctionWriteOut() and
204 * usbFunctionWrite(). Use the global usbCurrentDataToken and a static variable
205 * for each control- and out-endpoint to check for duplicate packets.
206 */
207#define USB_CFG_HAVE_MEASURE_FRAME_LENGTH 0
208/* define this macro to 1 if you want the function usbMeasureFrameLength()
209 * compiled in. This function can be used to calibrate the AVR's RC oscillator.
210 */
211#define USB_USE_FAST_CRC 0
212/* The assembler module has two implementations for the CRC algorithm. One is
213 * faster, the other is smaller. This CRC routine is only used for transmitted
214 * messages where timing is not critical. The faster routine needs 31 cycles
215 * per byte while the smaller one needs 61 to 69 cycles. The faster routine
216 * may be worth the 32 bytes bigger code size if you transmit lots of data and
217 * run the AVR close to its limit.
218 */
219
220/* -------------------------- Device Description --------------------------- */
221
222#define USB_CFG_VENDOR_ID 0xc0, 0x16 /* = 0x16c0 = 5824 = voti.nl */
223/* USB vendor ID for the device, low byte first. If you have registered your
224 * own Vendor ID, define it here. Otherwise you may use one of obdev's free
225 * shared VID/PID pairs. Be sure to read USB-IDs-for-free.txt for rules!
226 * *** IMPORTANT NOTE ***
227 * This template uses obdev's shared VID/PID pair for Vendor Class devices
228 * with libusb: 0x16c0/0x5dc. Use this VID/PID pair ONLY if you understand
229 * the implications!
230 */
231#define USB_CFG_DEVICE_ID 0xdc, 0x05 /* = 0x05dc = 1500 */
232/* This is the ID of the product, low byte first. It is interpreted in the
233 * scope of the vendor ID. If you have registered your own VID with usb.org
234 * or if you have licensed a PID from somebody else, define it here. Otherwise
235 * you may use one of obdev's free shared VID/PID pairs. See the file
236 * USB-IDs-for-free.txt for details!
237 * *** IMPORTANT NOTE ***
238 * This template uses obdev's shared VID/PID pair for Vendor Class devices
239 * with libusb: 0x16c0/0x5dc. Use this VID/PID pair ONLY if you understand
240 * the implications!
241 */
242#define USB_CFG_DEVICE_VERSION 0x00, 0x01
243/* Version number of the device: Minor number first, then major number.
244 */
245#define USB_CFG_VENDOR_NAME 'o', 'b', 'd', 'e', 'v', '.', 'a', 't'
246#define USB_CFG_VENDOR_NAME_LEN 8
247/* These two values define the vendor name returned by the USB device. The name
248 * must be given as a list of characters under single quotes. The characters
249 * are interpreted as Unicode (UTF-16) entities.
250 * If you don't want a vendor name string, undefine these macros.
251 * ALWAYS define a vendor name containing your Internet domain name if you use
252 * obdev's free shared VID/PID pair. See the file USB-IDs-for-free.txt for
253 * details.
254 */
255#define USB_CFG_DEVICE_NAME 'T', 'e', 'm', 'p', 'l', 'a', 't', 'e'
256#define USB_CFG_DEVICE_NAME_LEN 8
257/* Same as above for the device name. If you don't want a device name, undefine
258 * the macros. See the file USB-IDs-for-free.txt before you assign a name if
259 * you use a shared VID/PID.
260 */
261/*#define USB_CFG_SERIAL_NUMBER 'N', 'o', 'n', 'e' */
262/*#define USB_CFG_SERIAL_NUMBER_LEN 0 */
263/* Same as above for the serial number. If you don't want a serial number,
264 * undefine the macros.
265 * It may be useful to provide the serial number through other means than at
266 * compile time. See the section about descriptor properties below for how
267 * to fine tune control over USB descriptors such as the string descriptor
268 * for the serial number.
269 */
270#define USB_CFG_DEVICE_CLASS 0xff /* set to 0 if deferred to interface */
271#define USB_CFG_DEVICE_SUBCLASS 0
272/* See USB specification if you want to conform to an existing device class.
273 * Class 0xff is "vendor specific".
274 */
275#define USB_CFG_INTERFACE_CLASS 0 /* define class here if not at device level */
276#define USB_CFG_INTERFACE_SUBCLASS 0
277#define USB_CFG_INTERFACE_PROTOCOL 0
278/* See USB specification if you want to conform to an existing device class or
279 * protocol. The following classes must be set at interface level:
280 * HID class is 3, no subclass and protocol required (but may be useful!)
281 * CDC class is 2, use subclass 2 and protocol 1 for ACM
282 */
283/* #define USB_CFG_HID_REPORT_DESCRIPTOR_LENGTH 42 */
284/* Define this to the length of the HID report descriptor, if you implement
285 * an HID device. Otherwise don't define it or define it to 0.
286 * If you use this define, you must add a PROGMEM character array named
287 * "usbHidReportDescriptor" to your code which contains the report descriptor.
288 * Don't forget to keep the array and this define in sync!
289 */
290
291/* #define USB_PUBLIC static */
292/* Use the define above if you #include usbdrv.c instead of linking against it.
293 * This technique saves a couple of bytes in flash memory.
294 */
295
296/* ------------------- Fine Control over USB Descriptors ------------------- */
297/* If you don't want to use the driver's default USB descriptors, you can
298 * provide our own. These can be provided as (1) fixed length static data in
299 * flash memory, (2) fixed length static data in RAM or (3) dynamically at
300 * runtime in the function usbFunctionDescriptor(). See usbdrv.h for more
301 * information about this function.
302 * Descriptor handling is configured through the descriptor's properties. If
303 * no properties are defined or if they are 0, the default descriptor is used.
304 * Possible properties are:
305 * + USB_PROP_IS_DYNAMIC: The data for the descriptor should be fetched
306 * at runtime via usbFunctionDescriptor(). If the usbMsgPtr mechanism is
307 * used, the data is in FLASH by default. Add property USB_PROP_IS_RAM if
308 * you want RAM pointers.
309 * + USB_PROP_IS_RAM: The data returned by usbFunctionDescriptor() or found
310 * in static memory is in RAM, not in flash memory.
311 * + USB_PROP_LENGTH(len): If the data is in static memory (RAM or flash),
312 * the driver must know the descriptor's length. The descriptor itself is
313 * found at the address of a well known identifier (see below).
314 * List of static descriptor names (must be declared PROGMEM if in flash):
315 * char usbDescriptorDevice[];
316 * char usbDescriptorConfiguration[];
317 * char usbDescriptorHidReport[];
318 * char usbDescriptorString0[];
319 * int usbDescriptorStringVendor[];
320 * int usbDescriptorStringDevice[];
321 * int usbDescriptorStringSerialNumber[];
322 * Other descriptors can't be provided statically, they must be provided
323 * dynamically at runtime.
324 *
325 * Descriptor properties are or-ed or added together, e.g.:
326 * #define USB_CFG_DESCR_PROPS_DEVICE (USB_PROP_IS_RAM | USB_PROP_LENGTH(18))
327 *
328 * The following descriptors are defined:
329 * USB_CFG_DESCR_PROPS_DEVICE
330 * USB_CFG_DESCR_PROPS_CONFIGURATION
331 * USB_CFG_DESCR_PROPS_STRINGS
332 * USB_CFG_DESCR_PROPS_STRING_0
333 * USB_CFG_DESCR_PROPS_STRING_VENDOR
334 * USB_CFG_DESCR_PROPS_STRING_PRODUCT
335 * USB_CFG_DESCR_PROPS_STRING_SERIAL_NUMBER
336 * USB_CFG_DESCR_PROPS_HID
337 * USB_CFG_DESCR_PROPS_HID_REPORT
338 * USB_CFG_DESCR_PROPS_UNKNOWN (for all descriptors not handled by the driver)
339 *
340 * Note about string descriptors: String descriptors are not just strings, they
341 * are Unicode strings prefixed with a 2 byte header. Example:
342 * int serialNumberDescriptor[] = {
343 * USB_STRING_DESCRIPTOR_HEADER(6),
344 * 'S', 'e', 'r', 'i', 'a', 'l'
345 * };
346 */
347
348#define USB_CFG_DESCR_PROPS_DEVICE 0
349#define USB_CFG_DESCR_PROPS_CONFIGURATION 0
350#define USB_CFG_DESCR_PROPS_STRINGS 0
351#define USB_CFG_DESCR_PROPS_STRING_0 0
352#define USB_CFG_DESCR_PROPS_STRING_VENDOR 0
353#define USB_CFG_DESCR_PROPS_STRING_PRODUCT 0
354#define USB_CFG_DESCR_PROPS_STRING_SERIAL_NUMBER 0
355#define USB_CFG_DESCR_PROPS_HID 0
356#define USB_CFG_DESCR_PROPS_HID_REPORT 0
357#define USB_CFG_DESCR_PROPS_UNKNOWN 0
358
359/* ----------------------- Optional MCU Description ------------------------ */
360
361/* The following configurations have working defaults in usbdrv.h. You
362 * usually don't need to set them explicitly. Only if you want to run
363 * the driver on a device which is not yet supported or with a compiler
364 * which is not fully supported (such as IAR C) or if you use a differnt
365 * interrupt than INT0, you may have to define some of these.
366 */
367/* #define USB_INTR_CFG MCUCR */
368/* #define USB_INTR_CFG_SET ((1 << ISC00) | (1 << ISC01)) */
369/* #define USB_INTR_CFG_CLR 0 */
370/* #define USB_INTR_ENABLE GIMSK */
371/* #define USB_INTR_ENABLE_BIT INT0 */
372/* #define USB_INTR_PENDING GIFR */
373/* #define USB_INTR_PENDING_BIT INTF0 */
374/* #define USB_INTR_VECTOR INT0_vect */
375
376#endif /* __usbconfig_h_included__ */
diff --git a/tmk_core/protocol/vusb/usbdrv/usbdrv.c b/tmk_core/protocol/vusb/usbdrv/usbdrv.c
deleted file mode 100644
index f69198b1b..000000000
--- a/tmk_core/protocol/vusb/usbdrv/usbdrv.c
+++ /dev/null
@@ -1,622 +0,0 @@
1/* Name: usbdrv.c
2 * Project: V-USB, virtual USB port for Atmel's(r) AVR(r) microcontrollers
3 * Author: Christian Starkjohann
4 * Creation Date: 2004-12-29
5 * Tabsize: 4
6 * Copyright: (c) 2005 by OBJECTIVE DEVELOPMENT Software GmbH
7 * License: GNU GPL v2 (see License.txt), GNU GPL v3 or proprietary (CommercialLicense.txt)
8 * This Revision: $Id: usbdrv.c 791 2010-07-15 15:56:13Z cs $
9 */
10
11#include "usbportability.h"
12#include "usbdrv.h"
13#include "oddebug.h"
14
15/*
16General Description:
17This module implements the C-part of the USB driver. See usbdrv.h for a
18documentation of the entire driver.
19*/
20
21/* ------------------------------------------------------------------------- */
22
23/* raw USB registers / interface to assembler code: */
24uchar usbRxBuf[2 * USB_BUFSIZE]; /* raw RX buffer: PID, 8 bytes data, 2 bytes CRC */
25uchar usbInputBufOffset; /* offset in usbRxBuf used for low level receiving */
26uchar usbDeviceAddr; /* assigned during enumeration, defaults to 0 */
27uchar usbNewDeviceAddr; /* device ID which should be set after status phase */
28uchar usbConfiguration; /* currently selected configuration. Administered by driver, but not used */
29volatile schar usbRxLen; /* = 0; number of bytes in usbRxBuf; 0 means free, -1 for flow control */
30uchar usbCurrentTok; /* last token received or endpoint number for last OUT token if != 0 */
31uchar usbRxToken; /* token for data we received; or endpont number for last OUT */
32volatile uchar usbTxLen = USBPID_NAK; /* number of bytes to transmit with next IN token or handshake token */
33uchar usbTxBuf[USB_BUFSIZE]; /* data to transmit with next IN, free if usbTxLen contains handshake token */
34#if USB_COUNT_SOF
35volatile uchar usbSofCount; /* incremented by assembler module every SOF */
36#endif
37#if USB_CFG_HAVE_INTRIN_ENDPOINT && !USB_CFG_SUPPRESS_INTR_CODE
38usbTxStatus_t usbTxStatus1;
39# if USB_CFG_HAVE_INTRIN_ENDPOINT3
40usbTxStatus_t usbTxStatus3;
41# endif
42#endif
43#if USB_CFG_CHECK_DATA_TOGGLING
44uchar usbCurrentDataToken; /* when we check data toggling to ignore duplicate packets */
45#endif
46
47/* USB status registers / not shared with asm code */
48uchar * usbMsgPtr; /* data to transmit next -- ROM or RAM address */
49static usbMsgLen_t usbMsgLen = USB_NO_MSG; /* remaining number of bytes */
50static uchar usbMsgFlags; /* flag values see below */
51
52#define USB_FLG_MSGPTR_IS_ROM (1 << 6)
53#define USB_FLG_USE_USER_RW (1 << 7)
54
55/*
56optimizing hints:
57- do not post/pre inc/dec integer values in operations
58- assign value of USB_READ_FLASH() to register variables and don't use side effects in arg
59- use narrow scope for variables which should be in X/Y/Z register
60- assign char sized expressions to variables to force 8 bit arithmetics
61*/
62
63/* -------------------------- String Descriptors --------------------------- */
64
65#if USB_CFG_DESCR_PROPS_STRINGS == 0
66
67# if USB_CFG_DESCR_PROPS_STRING_0 == 0
68# undef USB_CFG_DESCR_PROPS_STRING_0
69# define USB_CFG_DESCR_PROPS_STRING_0 sizeof(usbDescriptorString0)
70const PROGMEM char usbDescriptorString0[] = {
71 /* language descriptor */
72 4, /* sizeof(usbDescriptorString0): length of descriptor in bytes */
73 3, /* descriptor type */
74 0x09, 0x04, /* language index (0x0409 = US-English) */
75};
76# endif
77
78# if USB_CFG_DESCR_PROPS_STRING_VENDOR == 0 && USB_CFG_VENDOR_NAME_LEN
79# undef USB_CFG_DESCR_PROPS_STRING_VENDOR
80# define USB_CFG_DESCR_PROPS_STRING_VENDOR sizeof(usbDescriptorStringVendor)
81const PROGMEM int usbDescriptorStringVendor[] = {USB_STRING_DESCRIPTOR_HEADER(USB_CFG_VENDOR_NAME_LEN), USB_CFG_VENDOR_NAME};
82# endif
83
84# if USB_CFG_DESCR_PROPS_STRING_PRODUCT == 0 && USB_CFG_DEVICE_NAME_LEN
85# undef USB_CFG_DESCR_PROPS_STRING_PRODUCT
86# define USB_CFG_DESCR_PROPS_STRING_PRODUCT sizeof(usbDescriptorStringDevice)
87const PROGMEM int usbDescriptorStringDevice[] = {USB_STRING_DESCRIPTOR_HEADER(USB_CFG_DEVICE_NAME_LEN), USB_CFG_DEVICE_NAME};
88# endif
89
90# if USB_CFG_DESCR_PROPS_STRING_SERIAL_NUMBER == 0 && USB_CFG_SERIAL_NUMBER_LEN
91# undef USB_CFG_DESCR_PROPS_STRING_SERIAL_NUMBER
92# define USB_CFG_DESCR_PROPS_STRING_SERIAL_NUMBER sizeof(usbDescriptorStringSerialNumber)
93const PROGMEM int usbDescriptorStringSerialNumber[] = {USB_STRING_DESCRIPTOR_HEADER(USB_CFG_SERIAL_NUMBER_LEN), USB_CFG_SERIAL_NUMBER};
94# endif
95
96#endif /* USB_CFG_DESCR_PROPS_STRINGS == 0 */
97
98/* --------------------------- Device Descriptor --------------------------- */
99
100#if USB_CFG_DESCR_PROPS_DEVICE == 0
101# undef USB_CFG_DESCR_PROPS_DEVICE
102# define USB_CFG_DESCR_PROPS_DEVICE sizeof(usbDescriptorDevice)
103const PROGMEM char usbDescriptorDevice[] = {
104 /* USB device descriptor */
105 18, /* sizeof(usbDescriptorDevice): length of descriptor in bytes */
106 USBDESCR_DEVICE, /* descriptor type */
107 0x10, 0x01, /* USB version supported */
108 USB_CFG_DEVICE_CLASS, USB_CFG_DEVICE_SUBCLASS, 0, /* protocol */
109 8, /* max packet size */
110 /* the following two casts affect the first byte of the constant only, but
111 * that's sufficient to avoid a warning with the default values.
112 */
113 (char)USB_CFG_VENDOR_ID, /* 2 bytes */
114 (char)USB_CFG_DEVICE_ID, /* 2 bytes */
115 USB_CFG_DEVICE_VERSION, /* 2 bytes */
116 USB_CFG_DESCR_PROPS_STRING_VENDOR != 0 ? 1 : 0, /* manufacturer string index */
117 USB_CFG_DESCR_PROPS_STRING_PRODUCT != 0 ? 2 : 0, /* product string index */
118 USB_CFG_DESCR_PROPS_STRING_SERIAL_NUMBER != 0 ? 3 : 0, /* serial number string index */
119 1, /* number of configurations */
120};
121#endif
122
123/* ----------------------- Configuration Descriptor ------------------------ */
124
125#if USB_CFG_DESCR_PROPS_HID_REPORT != 0 && USB_CFG_DESCR_PROPS_HID == 0
126# undef USB_CFG_DESCR_PROPS_HID
127# define USB_CFG_DESCR_PROPS_HID 9 /* length of HID descriptor in config descriptor below */
128#endif
129
130#if USB_CFG_DESCR_PROPS_CONFIGURATION == 0
131# undef USB_CFG_DESCR_PROPS_CONFIGURATION
132# define USB_CFG_DESCR_PROPS_CONFIGURATION sizeof(usbDescriptorConfiguration)
133PROGMEM char usbDescriptorConfiguration[] = {
134 /* USB configuration descriptor */
135 9, /* sizeof(usbDescriptorConfiguration): length of descriptor in bytes */
136 USBDESCR_CONFIG, /* descriptor type */
137 18 + 7 * USB_CFG_HAVE_INTRIN_ENDPOINT + 7 * USB_CFG_HAVE_INTRIN_ENDPOINT3 + (USB_CFG_DESCR_PROPS_HID & 0xff), 0,
138 /* total length of data returned (including inlined descriptors) */
139 1, /* number of interfaces in this configuration */
140 1, /* index of this configuration */
141 0, /* configuration name string index */
142# if USB_CFG_IS_SELF_POWERED
143 (1 << 7) | USBATTR_SELFPOWER, /* attributes */
144# else
145 (1 << 7), /* attributes */
146# endif
147 USB_CFG_MAX_BUS_POWER / 2, /* max USB current in 2mA units */
148 /* interface descriptor follows inline: */
149 9, /* sizeof(usbDescrInterface): length of descriptor in bytes */
150 USBDESCR_INTERFACE, /* descriptor type */
151 0, /* index of this interface */
152 0, /* alternate setting for this interface */
153 USB_CFG_HAVE_INTRIN_ENDPOINT + USB_CFG_HAVE_INTRIN_ENDPOINT3, /* endpoints excl 0: number of endpoint descriptors to follow */
154 USB_CFG_INTERFACE_CLASS, USB_CFG_INTERFACE_SUBCLASS, USB_CFG_INTERFACE_PROTOCOL, 0, /* string index for interface */
155# if (USB_CFG_DESCR_PROPS_HID & 0xff) /* HID descriptor */
156 9, /* sizeof(usbDescrHID): length of descriptor in bytes */
157 USBDESCR_HID, /* descriptor type: HID */
158 0x01, 0x01, /* BCD representation of HID version */
159 0x00, /* target country code */
160 0x01, /* number of HID Report (or other HID class) Descriptor infos to follow */
161 0x22, /* descriptor type: report */
162 USB_CFG_HID_REPORT_DESCRIPTOR_LENGTH, 0, /* total length of report descriptor */
163# endif
164# if USB_CFG_HAVE_INTRIN_ENDPOINT /* endpoint descriptor for endpoint 1 */
165 7, /* sizeof(usbDescrEndpoint) */
166 USBDESCR_ENDPOINT, /* descriptor type = endpoint */
167 (char)0x81, /* IN endpoint number 1 */
168 0x03, /* attrib: Interrupt endpoint */
169 8, 0, /* maximum packet size */
170 USB_CFG_INTR_POLL_INTERVAL, /* in ms */
171# endif
172# if USB_CFG_HAVE_INTRIN_ENDPOINT3 /* endpoint descriptor for endpoint 3 */
173 7, /* sizeof(usbDescrEndpoint) */
174 USBDESCR_ENDPOINT, /* descriptor type = endpoint */
175 (char)(0x80 | USB_CFG_EP3_NUMBER), /* IN endpoint number 3 */
176 0x03, /* attrib: Interrupt endpoint */
177 8, 0, /* maximum packet size */
178 USB_CFG_INTR_POLL_INTERVAL, /* in ms */
179# endif
180};
181#endif
182
183/* ------------------------------------------------------------------------- */
184
185static inline void usbResetDataToggling(void) {
186#if USB_CFG_HAVE_INTRIN_ENDPOINT && !USB_CFG_SUPPRESS_INTR_CODE
187 USB_SET_DATATOKEN1(USB_INITIAL_DATATOKEN); /* reset data toggling for interrupt endpoint */
188# if USB_CFG_HAVE_INTRIN_ENDPOINT3
189 USB_SET_DATATOKEN3(USB_INITIAL_DATATOKEN); /* reset data toggling for interrupt endpoint */
190# endif
191#endif
192}
193
194static inline void usbResetStall(void) {
195#if USB_CFG_IMPLEMENT_HALT && USB_CFG_HAVE_INTRIN_ENDPOINT
196 usbTxLen1 = USBPID_NAK;
197# if USB_CFG_HAVE_INTRIN_ENDPOINT3
198 usbTxLen3 = USBPID_NAK;
199# endif
200#endif
201}
202
203/* ------------------------------------------------------------------------- */
204
205#if !USB_CFG_SUPPRESS_INTR_CODE
206# if USB_CFG_HAVE_INTRIN_ENDPOINT
207static void usbGenericSetInterrupt(uchar *data, uchar len, usbTxStatus_t *txStatus) {
208 uchar *p;
209 char i;
210
211# if USB_CFG_IMPLEMENT_HALT
212 if (usbTxLen1 == USBPID_STALL) return;
213# endif
214 if (txStatus->len & 0x10) { /* packet buffer was empty */
215 txStatus->buffer[0] ^= USBPID_DATA0 ^ USBPID_DATA1; /* toggle token */
216 } else {
217 txStatus->len = USBPID_NAK; /* avoid sending outdated (overwritten) interrupt data */
218 }
219 p = txStatus->buffer + 1;
220 i = len;
221 do { /* if len == 0, we still copy 1 byte, but that's no problem */
222 *p++ = *data++;
223 } while (--i > 0); /* loop control at the end is 2 bytes shorter than at beginning */
224 usbCrc16Append(&txStatus->buffer[1], len);
225 txStatus->len = len + 4; /* len must be given including sync byte */
226 DBG2(0x21 + (((int)txStatus >> 3) & 3), txStatus->buffer, len + 3);
227}
228
229USB_PUBLIC void usbSetInterrupt(uchar *data, uchar len) { usbGenericSetInterrupt(data, len, &usbTxStatus1); }
230# endif
231
232# if USB_CFG_HAVE_INTRIN_ENDPOINT3
233USB_PUBLIC void usbSetInterrupt3(uchar *data, uchar len) { usbGenericSetInterrupt(data, len, &usbTxStatus3); }
234# endif
235#endif /* USB_CFG_SUPPRESS_INTR_CODE */
236
237/* ------------------ utilities for code following below ------------------- */
238
239/* Use defines for the switch statement so that we can choose between an
240 * if()else if() and a switch/case based implementation. switch() is more
241 * efficient for a LARGE set of sequential choices, if() is better in all other
242 * cases.
243 */
244#if USB_CFG_USE_SWITCH_STATEMENT
245# define SWITCH_START(cmd) \
246 switch (cmd) { \
247 {
248# define SWITCH_CASE(value) \
249 } \
250 break; \
251 case (value): {
252# define SWITCH_CASE2(v1, v2) \
253 } \
254 break; \
255 case (v1): \
256 case (v2): {
257# define SWITCH_CASE3(v1, v2, v3) \
258 } \
259 break; \
260 case (v1): \
261 case (v2): \
262 case (v3): {
263# define SWITCH_DEFAULT \
264 } \
265 break; \
266 default: {
267# define SWITCH_END \
268 } \
269 }
270#else
271# define SWITCH_START(cmd) \
272 { \
273 uchar _cmd = cmd; \
274 if (0) {
275# define SWITCH_CASE(value) \
276 } \
277 else if (_cmd == (value)) {
278# define SWITCH_CASE2(v1, v2) \
279 } \
280 else if (_cmd == (v1) || _cmd == (v2)) {
281# define SWITCH_CASE3(v1, v2, v3) \
282 } \
283 else if (_cmd == (v1) || _cmd == (v2) || (_cmd == v3)) {
284# define SWITCH_DEFAULT \
285 } \
286 else {
287# define SWITCH_END \
288 } \
289 }
290#endif
291
292#ifndef USB_RX_USER_HOOK
293# define USB_RX_USER_HOOK(data, len)
294#endif
295#ifndef USB_SET_ADDRESS_HOOK
296# define USB_SET_ADDRESS_HOOK()
297#endif
298
299/* ------------------------------------------------------------------------- */
300
301/* We use if() instead of #if in the macro below because #if can't be used
302 * in macros and the compiler optimizes constant conditions anyway.
303 * This may cause problems with undefined symbols if compiled without
304 * optimizing!
305 */
306#define GET_DESCRIPTOR(cfgProp, staticName) \
307 if (cfgProp) { \
308 if ((cfgProp)&USB_PROP_IS_RAM) flags = 0; \
309 if ((cfgProp)&USB_PROP_IS_DYNAMIC) { \
310 len = usbFunctionDescriptor(rq); \
311 } else { \
312 len = USB_PROP_LENGTH(cfgProp); \
313 usbMsgPtr = (uchar *)(staticName); \
314 } \
315 }
316
317/* usbDriverDescriptor() is similar to usbFunctionDescriptor(), but used
318 * internally for all types of descriptors.
319 */
320static inline usbMsgLen_t usbDriverDescriptor(usbRequest_t *rq) {
321 usbMsgLen_t len = 0;
322 uchar flags = USB_FLG_MSGPTR_IS_ROM;
323
324 SWITCH_START(rq->wValue.bytes[1])
325 SWITCH_CASE(USBDESCR_DEVICE) /* 1 */
326 GET_DESCRIPTOR(USB_CFG_DESCR_PROPS_DEVICE, usbDescriptorDevice)
327 SWITCH_CASE(USBDESCR_CONFIG) /* 2 */
328 GET_DESCRIPTOR(USB_CFG_DESCR_PROPS_CONFIGURATION, usbDescriptorConfiguration)
329 SWITCH_CASE(USBDESCR_STRING) /* 3 */
330#if USB_CFG_DESCR_PROPS_STRINGS & USB_PROP_IS_DYNAMIC
331 if (USB_CFG_DESCR_PROPS_STRINGS & USB_PROP_IS_RAM) flags = 0;
332 len = usbFunctionDescriptor(rq);
333#else /* USB_CFG_DESCR_PROPS_STRINGS & USB_PROP_IS_DYNAMIC */
334 SWITCH_START(rq->wValue.bytes[0])
335 SWITCH_CASE(0)
336 GET_DESCRIPTOR(USB_CFG_DESCR_PROPS_STRING_0, usbDescriptorString0)
337 SWITCH_CASE(1)
338 GET_DESCRIPTOR(USB_CFG_DESCR_PROPS_STRING_VENDOR, usbDescriptorStringVendor)
339 SWITCH_CASE(2)
340 GET_DESCRIPTOR(USB_CFG_DESCR_PROPS_STRING_PRODUCT, usbDescriptorStringDevice)
341 SWITCH_CASE(3)
342 GET_DESCRIPTOR(USB_CFG_DESCR_PROPS_STRING_SERIAL_NUMBER, usbDescriptorStringSerialNumber)
343 SWITCH_DEFAULT
344 if (USB_CFG_DESCR_PROPS_UNKNOWN & USB_PROP_IS_DYNAMIC) {
345 len = usbFunctionDescriptor(rq);
346 }
347 SWITCH_END
348#endif /* USB_CFG_DESCR_PROPS_STRINGS & USB_PROP_IS_DYNAMIC */
349#if USB_CFG_DESCR_PROPS_HID_REPORT /* only support HID descriptors if enabled */
350 SWITCH_CASE(USBDESCR_HID) /* 0x21 */
351 GET_DESCRIPTOR(USB_CFG_DESCR_PROPS_HID, usbDescriptorConfiguration + 18)
352 SWITCH_CASE(USBDESCR_HID_REPORT) /* 0x22 */
353 GET_DESCRIPTOR(USB_CFG_DESCR_PROPS_HID_REPORT, usbDescriptorHidReport)
354#endif
355 SWITCH_DEFAULT
356 if (USB_CFG_DESCR_PROPS_UNKNOWN & USB_PROP_IS_DYNAMIC) {
357 len = usbFunctionDescriptor(rq);
358 }
359 SWITCH_END
360 usbMsgFlags = flags;
361 return len;
362}
363
364/* ------------------------------------------------------------------------- */
365
366/* usbDriverSetup() is similar to usbFunctionSetup(), but it's used for
367 * standard requests instead of class and custom requests.
368 */
369static inline usbMsgLen_t usbDriverSetup(usbRequest_t *rq) {
370 uchar len = 0, *dataPtr = usbTxBuf + 9; /* there are 2 bytes free space at the end of the buffer */
371 uchar value = rq->wValue.bytes[0];
372#if USB_CFG_IMPLEMENT_HALT
373 uchar index = rq->wIndex.bytes[0];
374#endif
375
376 dataPtr[0] = 0; /* default reply common to USBRQ_GET_STATUS and USBRQ_GET_INTERFACE */
377 SWITCH_START(rq->bRequest)
378 SWITCH_CASE(USBRQ_GET_STATUS) /* 0 */
379 uchar recipient = rq->bmRequestType & USBRQ_RCPT_MASK; /* assign arith ops to variables to enforce byte size */
380 if (USB_CFG_IS_SELF_POWERED && recipient == USBRQ_RCPT_DEVICE) dataPtr[0] = USB_CFG_IS_SELF_POWERED;
381#if USB_CFG_IMPLEMENT_HALT
382 if (recipient == USBRQ_RCPT_ENDPOINT && index == 0x81) /* request status for endpoint 1 */
383 dataPtr[0] = usbTxLen1 == USBPID_STALL;
384#endif
385 dataPtr[1] = 0;
386 len = 2;
387#if USB_CFG_IMPLEMENT_HALT
388 SWITCH_CASE2(USBRQ_CLEAR_FEATURE, USBRQ_SET_FEATURE) /* 1, 3 */
389 if (value == 0 && index == 0x81) { /* feature 0 == HALT for endpoint == 1 */
390 usbTxLen1 = rq->bRequest == USBRQ_CLEAR_FEATURE ? USBPID_NAK : USBPID_STALL;
391 usbResetDataToggling();
392 }
393#endif
394 SWITCH_CASE(USBRQ_SET_ADDRESS) /* 5 */
395 usbNewDeviceAddr = value;
396 USB_SET_ADDRESS_HOOK();
397 SWITCH_CASE(USBRQ_GET_DESCRIPTOR) /* 6 */
398 len = usbDriverDescriptor(rq);
399 goto skipMsgPtrAssignment;
400 SWITCH_CASE(USBRQ_GET_CONFIGURATION) /* 8 */
401 dataPtr = &usbConfiguration; /* send current configuration value */
402 len = 1;
403 SWITCH_CASE(USBRQ_SET_CONFIGURATION) /* 9 */
404 usbConfiguration = value;
405 usbResetStall();
406 SWITCH_CASE(USBRQ_GET_INTERFACE) /* 10 */
407 len = 1;
408#if USB_CFG_HAVE_INTRIN_ENDPOINT && !USB_CFG_SUPPRESS_INTR_CODE
409 SWITCH_CASE(USBRQ_SET_INTERFACE) /* 11 */
410 usbResetDataToggling();
411 usbResetStall();
412#endif
413 SWITCH_DEFAULT /* 7=SET_DESCRIPTOR, 12=SYNC_FRAME */
414 /* Should we add an optional hook here? */
415 SWITCH_END usbMsgPtr = dataPtr;
416skipMsgPtrAssignment:
417 return len;
418}
419
420/* ------------------------------------------------------------------------- */
421
422/* usbProcessRx() is called for every message received by the interrupt
423 * routine. It distinguishes between SETUP and DATA packets and processes
424 * them accordingly.
425 */
426static inline void usbProcessRx(uchar *data, uchar len) {
427 usbRequest_t *rq = (void *)data;
428
429 /* usbRxToken can be:
430 * 0x2d 00101101 (USBPID_SETUP for setup data)
431 * 0xe1 11100001 (USBPID_OUT: data phase of setup transfer)
432 * 0...0x0f for OUT on endpoint X
433 */
434 DBG2(0x10 + (usbRxToken & 0xf), data, len + 2); /* SETUP=1d, SETUP-DATA=11, OUTx=1x */
435 USB_RX_USER_HOOK(data, len)
436#if USB_CFG_IMPLEMENT_FN_WRITEOUT
437 if (usbRxToken < 0x10) { /* OUT to endpoint != 0: endpoint number in usbRxToken */
438 usbFunctionWriteOut(data, len);
439 return;
440 }
441#endif
442 if (usbRxToken == (uchar)USBPID_SETUP) {
443 if (len != 8) /* Setup size must be always 8 bytes. Ignore otherwise. */
444 return;
445 usbMsgLen_t replyLen;
446 usbTxBuf[0] = USBPID_DATA0; /* initialize data toggling */
447 usbTxLen = USBPID_NAK; /* abort pending transmit */
448 usbMsgFlags = 0;
449 uchar type = rq->bmRequestType & USBRQ_TYPE_MASK;
450 if (type != USBRQ_TYPE_STANDARD) { /* standard requests are handled by driver */
451 replyLen = usbFunctionSetup(data);
452 } else {
453 replyLen = usbDriverSetup(rq);
454 }
455#if USB_CFG_IMPLEMENT_FN_READ || USB_CFG_IMPLEMENT_FN_WRITE
456 if (replyLen == USB_NO_MSG) { /* use user-supplied read/write function */
457 /* do some conditioning on replyLen, but on IN transfers only */
458 if ((rq->bmRequestType & USBRQ_DIR_MASK) != USBRQ_DIR_HOST_TO_DEVICE) {
459 if (sizeof(replyLen) < sizeof(rq->wLength.word)) { /* help compiler with optimizing */
460 replyLen = rq->wLength.bytes[0];
461 } else {
462 replyLen = rq->wLength.word;
463 }
464 }
465 usbMsgFlags = USB_FLG_USE_USER_RW;
466 } else /* The 'else' prevents that we limit a replyLen of USB_NO_MSG to the maximum transfer len. */
467#endif
468 if (sizeof(replyLen) < sizeof(rq->wLength.word)) { /* help compiler with optimizing */
469 if (!rq->wLength.bytes[1] && replyLen > rq->wLength.bytes[0]) /* limit length to max */
470 replyLen = rq->wLength.bytes[0];
471 } else {
472 if (replyLen > rq->wLength.word) /* limit length to max */
473 replyLen = rq->wLength.word;
474 }
475 usbMsgLen = replyLen;
476 } else { /* usbRxToken must be USBPID_OUT, which means data phase of setup (control-out) */
477#if USB_CFG_IMPLEMENT_FN_WRITE
478 if (usbMsgFlags & USB_FLG_USE_USER_RW) {
479 uchar rval = usbFunctionWrite(data, len);
480 if (rval == 0xff) { /* an error occurred */
481 usbTxLen = USBPID_STALL;
482 } else if (rval != 0) { /* This was the final package */
483 usbMsgLen = 0; /* answer with a zero-sized data packet */
484 }
485 }
486#endif
487 }
488}
489
490/* ------------------------------------------------------------------------- */
491
492/* This function is similar to usbFunctionRead(), but it's also called for
493 * data handled automatically by the driver (e.g. descriptor reads).
494 */
495static uchar usbDeviceRead(uchar *data, uchar len) {
496 if (len > 0) { /* don't bother app with 0 sized reads */
497#if USB_CFG_IMPLEMENT_FN_READ
498 if (usbMsgFlags & USB_FLG_USE_USER_RW) {
499 len = usbFunctionRead(data, len);
500 } else
501#endif
502 {
503 uchar i = len, *r = usbMsgPtr;
504 if (usbMsgFlags & USB_FLG_MSGPTR_IS_ROM) { /* ROM data */
505 do {
506 uchar c = USB_READ_FLASH(r); /* assign to char size variable to enforce byte ops */
507 *data++ = c;
508 r++;
509 } while (--i);
510 } else { /* RAM data */
511 do {
512 *data++ = *r++;
513 } while (--i);
514 }
515 usbMsgPtr = r;
516 }
517 }
518 return len;
519}
520
521/* ------------------------------------------------------------------------- */
522
523/* usbBuildTxBlock() is called when we have data to transmit and the
524 * interrupt routine's transmit buffer is empty.
525 */
526static inline void usbBuildTxBlock(void) {
527 usbMsgLen_t wantLen;
528 uchar len;
529
530 wantLen = usbMsgLen;
531 if (wantLen > 8) wantLen = 8;
532 usbMsgLen -= wantLen;
533 usbTxBuf[0] ^= USBPID_DATA0 ^ USBPID_DATA1; /* DATA toggling */
534 len = usbDeviceRead(usbTxBuf + 1, wantLen);
535 if (len <= 8) { /* valid data packet */
536 usbCrc16Append(&usbTxBuf[1], len);
537 len += 4; /* length including sync byte */
538 if (len < 12) /* a partial package identifies end of message */
539 usbMsgLen = USB_NO_MSG;
540 } else {
541 len = USBPID_STALL; /* stall the endpoint */
542 usbMsgLen = USB_NO_MSG;
543 }
544 usbTxLen = len;
545 DBG2(0x20, usbTxBuf, len - 1);
546}
547
548/* ------------------------------------------------------------------------- */
549
550static inline void usbHandleResetHook(uchar notResetState) {
551#ifdef USB_RESET_HOOK
552 static uchar wasReset;
553 uchar isReset = !notResetState;
554
555 if (wasReset != isReset) {
556 USB_RESET_HOOK(isReset);
557 wasReset = isReset;
558 }
559#endif
560}
561
562/* ------------------------------------------------------------------------- */
563
564USB_PUBLIC void usbPoll(void) {
565 schar len;
566 uchar i;
567
568 len = usbRxLen - 3;
569 if (len >= 0) {
570 /* We could check CRC16 here -- but ACK has already been sent anyway. If you
571 * need data integrity checks with this driver, check the CRC in your app
572 * code and report errors back to the host. Since the ACK was already sent,
573 * retries must be handled on application level.
574 * unsigned crc = usbCrc16(buffer + 1, usbRxLen - 3);
575 */
576 usbProcessRx(usbRxBuf + USB_BUFSIZE + 1 - usbInputBufOffset, len);
577#if USB_CFG_HAVE_FLOWCONTROL
578 if (usbRxLen > 0) /* only mark as available if not inactivated */
579 usbRxLen = 0;
580#else
581 usbRxLen = 0; /* mark rx buffer as available */
582#endif
583 }
584 if (usbTxLen & 0x10) { /* transmit system idle */
585 if (usbMsgLen != USB_NO_MSG) { /* transmit data pending? */
586 usbBuildTxBlock();
587 }
588 }
589 for (i = 20; i > 0; i--) {
590 uchar usbLineStatus = USBIN & USBMASK;
591 if (usbLineStatus != 0) /* SE0 has ended */
592 goto isNotReset;
593 }
594 /* RESET condition, called multiple times during reset */
595 usbNewDeviceAddr = 0;
596 usbDeviceAddr = 0;
597 usbResetStall();
598 DBG1(0xff, 0, 0);
599isNotReset:
600 usbHandleResetHook(i);
601}
602
603/* ------------------------------------------------------------------------- */
604
605USB_PUBLIC void usbInit(void) {
606#if USB_INTR_CFG_SET != 0
607 USB_INTR_CFG |= USB_INTR_CFG_SET;
608#endif
609#if USB_INTR_CFG_CLR != 0
610 USB_INTR_CFG &= ~(USB_INTR_CFG_CLR);
611#endif
612 USB_INTR_ENABLE |= (1 << USB_INTR_ENABLE_BIT);
613 usbResetDataToggling();
614#if USB_CFG_HAVE_INTRIN_ENDPOINT && !USB_CFG_SUPPRESS_INTR_CODE
615 usbTxLen1 = USBPID_NAK;
616# if USB_CFG_HAVE_INTRIN_ENDPOINT3
617 usbTxLen3 = USBPID_NAK;
618# endif
619#endif
620}
621
622/* ------------------------------------------------------------------------- */
diff --git a/tmk_core/protocol/vusb/usbdrv/usbdrv.h b/tmk_core/protocol/vusb/usbdrv/usbdrv.h
deleted file mode 100644
index 88a1bce76..000000000
--- a/tmk_core/protocol/vusb/usbdrv/usbdrv.h
+++ /dev/null
@@ -1,730 +0,0 @@
1/* Name: usbdrv.h
2 * Project: V-USB, virtual USB port for Atmel's(r) AVR(r) microcontrollers
3 * Author: Christian Starkjohann
4 * Creation Date: 2004-12-29
5 * Tabsize: 4
6 * Copyright: (c) 2005 by OBJECTIVE DEVELOPMENT Software GmbH
7 * License: GNU GPL v2 (see License.txt), GNU GPL v3 or proprietary (CommercialLicense.txt)
8 * This Revision: $Id: usbdrv.h 793 2010-07-15 15:58:11Z cs $
9 */
10
11#ifndef __usbdrv_h_included__
12#define __usbdrv_h_included__
13#include "usbconfig.h"
14#include "usbportability.h"
15
16/*
17Hardware Prerequisites:
18=======================
19USB lines D+ and D- MUST be wired to the same I/O port. We recommend that D+
20triggers the interrupt (best achieved by using INT0 for D+), but it is also
21possible to trigger the interrupt from D-. If D- is used, interrupts are also
22triggered by SOF packets. D- requires a pull-up of 1.5k to +3.5V (and the
23device must be powered at 3.5V) to identify as low-speed USB device. A
24pull-down or pull-up of 1M SHOULD be connected from D+ to +3.5V to prevent
25interference when no USB master is connected. If you use Zener diodes to limit
26the voltage on D+ and D-, you MUST use a pull-down resistor, not a pull-up.
27We use D+ as interrupt source and not D- because it does not trigger on
28keep-alive and RESET states. If you want to count keep-alive events with
29USB_COUNT_SOF, you MUST use D- as an interrupt source.
30
31As a compile time option, the 1.5k pull-up resistor on D- can be made
32switchable to allow the device to disconnect at will. See the definition of
33usbDeviceConnect() and usbDeviceDisconnect() further down in this file.
34
35Please adapt the values in usbconfig.h according to your hardware!
36
37The device MUST be clocked at exactly 12 MHz, 15 MHz, 16 MHz or 20 MHz
38or at 12.8 MHz resp. 16.5 MHz +/- 1%. See usbconfig-prototype.h for details.
39
40
41Limitations:
42============
43Robustness with respect to communication errors:
44The driver assumes error-free communication. It DOES check for errors in
45the PID, but does NOT check bit stuffing errors, SE0 in middle of a byte,
46token CRC (5 bit) and data CRC (16 bit). CRC checks can not be performed due
47to timing constraints: We must start sending a reply within 7 bit times.
48Bit stuffing and misplaced SE0 would have to be checked in real-time, but CPU
49performance does not permit that. The driver does not check Data0/Data1
50toggling, but application software can implement the check.
51
52Input characteristics:
53Since no differential receiver circuit is used, electrical interference
54robustness may suffer. The driver samples only one of the data lines with
55an ordinary I/O pin's input characteristics. However, since this is only a
56low speed USB implementation and the specification allows for 8 times the
57bit rate over the same hardware, we should be on the safe side. Even the spec
58requires detection of asymmetric states at high bit rate for SE0 detection.
59
60Number of endpoints:
61The driver supports the following endpoints:
62
63- Endpoint 0, the default control endpoint.
64- Any number of interrupt- or bulk-out endpoints. The data is sent to
65 usbFunctionWriteOut() and USB_CFG_IMPLEMENT_FN_WRITEOUT must be defined
66 to 1 to activate this feature. The endpoint number can be found in the
67 global variable 'usbRxToken'.
68- One default interrupt- or bulk-in endpoint. This endpoint is used for
69 interrupt- or bulk-in transfers which are not handled by any other endpoint.
70 You must define USB_CFG_HAVE_INTRIN_ENDPOINT in order to activate this
71 feature and call usbSetInterrupt() to send interrupt/bulk data.
72- One additional interrupt- or bulk-in endpoint. This was endpoint 3 in
73 previous versions of this driver but can now be configured to any endpoint
74 number. You must define USB_CFG_HAVE_INTRIN_ENDPOINT3 in order to activate
75 this feature and call usbSetInterrupt3() to send interrupt/bulk data. The
76 endpoint number can be set with USB_CFG_EP3_NUMBER.
77
78Please note that the USB standard forbids bulk endpoints for low speed devices!
79Most operating systems allow them anyway, but the AVR will spend 90% of the CPU
80time in the USB interrupt polling for bulk data.
81
82Maximum data payload:
83Data payload of control in and out transfers may be up to 254 bytes. In order
84to accept payload data of out transfers, you need to implement
85'usbFunctionWrite()'.
86
87USB Suspend Mode supply current:
88The USB standard limits power consumption to 500uA when the bus is in suspend
89mode. This is not a problem for self-powered devices since they don't need
90bus power anyway. Bus-powered devices can achieve this only by putting the
91CPU in sleep mode. The driver does not implement suspend handling by itself.
92However, the application may implement activity monitoring and wakeup from
93sleep. The host sends regular SE0 states on the bus to keep it active. These
94SE0 states can be detected by using D- as the interrupt source. Define
95USB_COUNT_SOF to 1 and use the global variable usbSofCount to check for bus
96activity.
97
98Operation without an USB master:
99The driver behaves neutral without connection to an USB master if D- reads
100as 1. To avoid spurious interrupts, we recommend a high impedance (e.g. 1M)
101pull-down or pull-up resistor on D+ (interrupt). If Zener diodes are used,
102use a pull-down. If D- becomes statically 0, the driver may block in the
103interrupt routine.
104
105Interrupt latency:
106The application must ensure that the USB interrupt is not disabled for more
107than 25 cycles (this is for 12 MHz, faster clocks allow longer latency).
108This implies that all interrupt routines must either have the "ISR_NOBLOCK"
109attribute set (see "avr/interrupt.h") or be written in assembler with "sei"
110as the first instruction.
111
112Maximum interrupt duration / CPU cycle consumption:
113The driver handles all USB communication during the interrupt service
114routine. The routine will not return before an entire USB message is received
115and the reply is sent. This may be up to ca. 1200 cycles @ 12 MHz (= 100us) if
116the host conforms to the standard. The driver will consume CPU cycles for all
117USB messages, even if they address another (low-speed) device on the same bus.
118
119*/
120
121/* ------------------------------------------------------------------------- */
122/* --------------------------- Module Interface ---------------------------- */
123/* ------------------------------------------------------------------------- */
124
125#define USBDRV_VERSION 20100715
126/* This define uniquely identifies a driver version. It is a decimal number
127 * constructed from the driver's release date in the form YYYYMMDD. If the
128 * driver's behavior or interface changes, you can use this constant to
129 * distinguish versions. If it is not defined, the driver's release date is
130 * older than 2006-01-25.
131 */
132
133#ifndef USB_PUBLIC
134# define USB_PUBLIC
135#endif
136/* USB_PUBLIC is used as declaration attribute for all functions exported by
137 * the USB driver. The default is no attribute (see above). You may define it
138 * to static either in usbconfig.h or from the command line if you include
139 * usbdrv.c instead of linking against it. Including the C module of the driver
140 * directly in your code saves a couple of bytes in flash memory.
141 */
142
143#ifndef __ASSEMBLER__
144# ifndef uchar
145# define uchar unsigned char
146# endif
147# ifndef schar
148# define schar signed char
149# endif
150/* shortcuts for well defined 8 bit integer types */
151
152# if USB_CFG_LONG_TRANSFERS /* if more than 254 bytes transfer size required */
153# define usbMsgLen_t unsigned
154# else
155# define usbMsgLen_t uchar
156# endif
157/* usbMsgLen_t is the data type used for transfer lengths. By default, it is
158 * defined to uchar, allowing a maximum of 254 bytes (255 is reserved for
159 * USB_NO_MSG below). If the usbconfig.h defines USB_CFG_LONG_TRANSFERS to 1,
160 * a 16 bit data type is used, allowing up to 16384 bytes (the rest is used
161 * for flags in the descriptor configuration).
162 */
163# define USB_NO_MSG ((usbMsgLen_t)-1) /* constant meaning "no message" */
164
165struct usbRequest; /* forward declaration */
166
167USB_PUBLIC void usbInit(void);
168/* This function must be called before interrupts are enabled and the main
169 * loop is entered. We exepct that the PORT and DDR bits for D+ and D- have
170 * not been changed from their default status (which is 0). If you have changed
171 * them, set both back to 0 (configure them as input with no internal pull-up).
172 */
173USB_PUBLIC void usbPoll(void);
174/* This function must be called at regular intervals from the main loop.
175 * Maximum delay between calls is somewhat less than 50ms (USB timeout for
176 * accepting a Setup message). Otherwise the device will not be recognized.
177 * Please note that debug outputs through the UART take ~ 0.5ms per byte
178 * at 19200 bps.
179 */
180extern uchar *usbMsgPtr;
181/* This variable may be used to pass transmit data to the driver from the
182 * implementation of usbFunctionWrite(). It is also used internally by the
183 * driver for standard control requests.
184 */
185USB_PUBLIC usbMsgLen_t usbFunctionSetup(uchar data[8]);
186/* This function is called when the driver receives a SETUP transaction from
187 * the host which is not answered by the driver itself (in practice: class and
188 * vendor requests). All control transfers start with a SETUP transaction where
189 * the host communicates the parameters of the following (optional) data
190 * transfer. The SETUP data is available in the 'data' parameter which can
191 * (and should) be casted to 'usbRequest_t *' for a more user-friendly access
192 * to parameters.
193 *
194 * If the SETUP indicates a control-in transfer, you should provide the
195 * requested data to the driver. There are two ways to transfer this data:
196 * (1) Set the global pointer 'usbMsgPtr' to the base of the static RAM data
197 * block and return the length of the data in 'usbFunctionSetup()'. The driver
198 * will handle the rest. Or (2) return USB_NO_MSG in 'usbFunctionSetup()'. The
199 * driver will then call 'usbFunctionRead()' when data is needed. See the
200 * documentation for usbFunctionRead() for details.
201 *
202 * If the SETUP indicates a control-out transfer, the only way to receive the
203 * data from the host is through the 'usbFunctionWrite()' call. If you
204 * implement this function, you must return USB_NO_MSG in 'usbFunctionSetup()'
205 * to indicate that 'usbFunctionWrite()' should be used. See the documentation
206 * of this function for more information. If you just want to ignore the data
207 * sent by the host, return 0 in 'usbFunctionSetup()'.
208 *
209 * Note that calls to the functions usbFunctionRead() and usbFunctionWrite()
210 * are only done if enabled by the configuration in usbconfig.h.
211 */
212USB_PUBLIC usbMsgLen_t usbFunctionDescriptor(struct usbRequest *rq);
213/* You need to implement this function ONLY if you provide USB descriptors at
214 * runtime (which is an expert feature). It is very similar to
215 * usbFunctionSetup() above, but it is called only to request USB descriptor
216 * data. See the documentation of usbFunctionSetup() above for more info.
217 */
218# if USB_CFG_HAVE_INTRIN_ENDPOINT
219USB_PUBLIC void usbSetInterrupt(uchar *data, uchar len);
220/* This function sets the message which will be sent during the next interrupt
221 * IN transfer. The message is copied to an internal buffer and must not exceed
222 * a length of 8 bytes. The message may be 0 bytes long just to indicate the
223 * interrupt status to the host.
224 * If you need to transfer more bytes, use a control read after the interrupt.
225 */
226# define usbInterruptIsReady() (usbTxLen1 & 0x10)
227/* This macro indicates whether the last interrupt message has already been
228 * sent. If you set a new interrupt message before the old was sent, the
229 * message already buffered will be lost.
230 */
231# if USB_CFG_HAVE_INTRIN_ENDPOINT3
232USB_PUBLIC void usbSetInterrupt3(uchar *data, uchar len);
233# define usbInterruptIsReady3() (usbTxLen3 & 0x10)
234/* Same as above for endpoint 3 */
235# endif
236# endif /* USB_CFG_HAVE_INTRIN_ENDPOINT */
237# if USB_CFG_HID_REPORT_DESCRIPTOR_LENGTH /* simplified interface for backward compatibility */
238# define usbHidReportDescriptor usbDescriptorHidReport
239/* should be declared as: PROGMEM char usbHidReportDescriptor[]; */
240/* If you implement an HID device, you need to provide a report descriptor.
241 * The HID report descriptor syntax is a bit complex. If you understand how
242 * report descriptors are constructed, we recommend that you use the HID
243 * Descriptor Tool from usb.org, see http://www.usb.org/developers/hidpage/.
244 * Otherwise you should probably start with a working example.
245 */
246# endif /* USB_CFG_HID_REPORT_DESCRIPTOR_LENGTH */
247# if USB_CFG_IMPLEMENT_FN_WRITE
248USB_PUBLIC uchar usbFunctionWrite(uchar *data, uchar len);
249/* This function is called by the driver to provide a control transfer's
250 * payload data (control-out). It is called in chunks of up to 8 bytes. The
251 * total count provided in the current control transfer can be obtained from
252 * the 'length' property in the setup data. If an error occurred during
253 * processing, return 0xff (== -1). The driver will answer the entire transfer
254 * with a STALL token in this case. If you have received the entire payload
255 * successfully, return 1. If you expect more data, return 0. If you don't
256 * know whether the host will send more data (you should know, the total is
257 * provided in the usbFunctionSetup() call!), return 1.
258 * NOTE: If you return 0xff for STALL, 'usbFunctionWrite()' may still be called
259 * for the remaining data. You must continue to return 0xff for STALL in these
260 * calls.
261 * In order to get usbFunctionWrite() called, define USB_CFG_IMPLEMENT_FN_WRITE
262 * to 1 in usbconfig.h and return 0xff in usbFunctionSetup()..
263 */
264# endif /* USB_CFG_IMPLEMENT_FN_WRITE */
265# if USB_CFG_IMPLEMENT_FN_READ
266USB_PUBLIC uchar usbFunctionRead(uchar *data, uchar len);
267/* This function is called by the driver to ask the application for a control
268 * transfer's payload data (control-in). It is called in chunks of up to 8
269 * bytes each. You should copy the data to the location given by 'data' and
270 * return the actual number of bytes copied. If you return less than requested,
271 * the control-in transfer is terminated. If you return 0xff, the driver aborts
272 * the transfer with a STALL token.
273 * In order to get usbFunctionRead() called, define USB_CFG_IMPLEMENT_FN_READ
274 * to 1 in usbconfig.h and return 0xff in usbFunctionSetup()..
275 */
276# endif /* USB_CFG_IMPLEMENT_FN_READ */
277
278extern uchar usbRxToken; /* may be used in usbFunctionWriteOut() below */
279# if USB_CFG_IMPLEMENT_FN_WRITEOUT
280USB_PUBLIC void usbFunctionWriteOut(uchar *data, uchar len);
281/* This function is called by the driver when data is received on an interrupt-
282 * or bulk-out endpoint. The endpoint number can be found in the global
283 * variable usbRxToken. You must define USB_CFG_IMPLEMENT_FN_WRITEOUT to 1 in
284 * usbconfig.h to get this function called.
285 */
286# endif /* USB_CFG_IMPLEMENT_FN_WRITEOUT */
287# ifdef USB_CFG_PULLUP_IOPORTNAME
288# define usbDeviceConnect() ((USB_PULLUP_DDR |= (1 << USB_CFG_PULLUP_BIT)), (USB_PULLUP_OUT |= (1 << USB_CFG_PULLUP_BIT)))
289# define usbDeviceDisconnect() ((USB_PULLUP_DDR &= ~(1 << USB_CFG_PULLUP_BIT)), (USB_PULLUP_OUT &= ~(1 << USB_CFG_PULLUP_BIT)))
290# else /* USB_CFG_PULLUP_IOPORTNAME */
291# define usbDeviceConnect() (USBDDR &= ~(1 << USBMINUS))
292# define usbDeviceDisconnect() (USBDDR |= (1 << USBMINUS))
293# endif /* USB_CFG_PULLUP_IOPORTNAME */
294/* The macros usbDeviceConnect() and usbDeviceDisconnect() (intended to look
295 * like a function) connect resp. disconnect the device from the host's USB.
296 * If the constants USB_CFG_PULLUP_IOPORT and USB_CFG_PULLUP_BIT are defined
297 * in usbconfig.h, a disconnect consists of removing the pull-up resisitor
298 * from D-, otherwise the disconnect is done by brute-force pulling D- to GND.
299 * This does not conform to the spec, but it works.
300 * Please note that the USB interrupt must be disabled while the device is
301 * in disconnected state, or the interrupt handler will hang! You can either
302 * turn off the USB interrupt selectively with
303 * USB_INTR_ENABLE &= ~(1 << USB_INTR_ENABLE_BIT)
304 * or use cli() to disable interrupts globally.
305 */
306extern unsigned usbCrc16(unsigned data, uchar len);
307# define usbCrc16(data, len) usbCrc16((unsigned)(data), len)
308/* This function calculates the binary complement of the data CRC used in
309 * USB data packets. The value is used to build raw transmit packets.
310 * You may want to use this function for data checksums or to verify received
311 * data. We enforce 16 bit calling conventions for compatibility with IAR's
312 * tiny memory model.
313 */
314extern unsigned usbCrc16Append(unsigned data, uchar len);
315# define usbCrc16Append(data, len) usbCrc16Append((unsigned)(data), len)
316/* This function is equivalent to usbCrc16() above, except that it appends
317 * the 2 bytes CRC (lowbyte first) in the 'data' buffer after reading 'len'
318 * bytes.
319 */
320# if USB_CFG_HAVE_MEASURE_FRAME_LENGTH
321extern unsigned usbMeasureFrameLength(void);
322/* This function MUST be called IMMEDIATELY AFTER USB reset and measures 1/7 of
323 * the number of CPU cycles during one USB frame minus one low speed bit
324 * length. In other words: return value = 1499 * (F_CPU / 10.5 MHz)
325 * Since this is a busy wait, you MUST disable all interrupts with cli() before
326 * calling this function.
327 * This can be used to calibrate the AVR's RC oscillator.
328 */
329# endif
330extern uchar usbConfiguration;
331/* This value contains the current configuration set by the host. The driver
332 * allows setting and querying of this variable with the USB SET_CONFIGURATION
333 * and GET_CONFIGURATION requests, but does not use it otherwise.
334 * You may want to reflect the "configured" status with a LED on the device or
335 * switch on high power parts of the circuit only if the device is configured.
336 */
337# if USB_COUNT_SOF
338extern volatile uchar usbSofCount;
339/* This variable is incremented on every SOF packet. It is only available if
340 * the macro USB_COUNT_SOF is defined to a value != 0.
341 */
342# endif
343# if USB_CFG_CHECK_DATA_TOGGLING
344extern uchar usbCurrentDataToken;
345/* This variable can be checked in usbFunctionWrite() and usbFunctionWriteOut()
346 * to ignore duplicate packets.
347 */
348# endif
349
350# define USB_STRING_DESCRIPTOR_HEADER(stringLength) ((2 * (stringLength) + 2) | (3 << 8))
351/* This macro builds a descriptor header for a string descriptor given the
352 * string's length. See usbdrv.c for an example how to use it.
353 */
354# if USB_CFG_HAVE_FLOWCONTROL
355extern volatile schar usbRxLen;
356# define usbDisableAllRequests() usbRxLen = -1
357/* Must be called from usbFunctionWrite(). This macro disables all data input
358 * from the USB interface. Requests from the host are answered with a NAK
359 * while they are disabled.
360 */
361# define usbEnableAllRequests() usbRxLen = 0
362/* May only be called if requests are disabled. This macro enables input from
363 * the USB interface after it has been disabled with usbDisableAllRequests().
364 */
365# define usbAllRequestsAreDisabled() (usbRxLen < 0)
366/* Use this macro to find out whether requests are disabled. It may be needed
367 * to ensure that usbEnableAllRequests() is never called when requests are
368 * enabled.
369 */
370# endif
371
372# define USB_SET_DATATOKEN1(token) usbTxBuf1[0] = token
373# define USB_SET_DATATOKEN3(token) usbTxBuf3[0] = token
374/* These two macros can be used by application software to reset data toggling
375 * for interrupt-in endpoints 1 and 3. Since the token is toggled BEFORE
376 * sending data, you must set the opposite value of the token which should come
377 * first.
378 */
379
380#endif /* __ASSEMBLER__ */
381
382/* ------------------------------------------------------------------------- */
383/* ----------------- Definitions for Descriptor Properties ----------------- */
384/* ------------------------------------------------------------------------- */
385/* This is advanced stuff. See usbconfig-prototype.h for more information
386 * about the various methods to define USB descriptors. If you do nothing,
387 * the default descriptors will be used.
388 */
389#define USB_PROP_IS_DYNAMIC (1 << 14)
390/* If this property is set for a descriptor, usbFunctionDescriptor() will be
391 * used to obtain the particular descriptor. Data directly returned via
392 * usbMsgPtr are FLASH data by default, combine (OR) with USB_PROP_IS_RAM to
393 * return RAM data.
394 */
395#define USB_PROP_IS_RAM (1 << 15)
396/* If this property is set for a descriptor, the data is read from RAM
397 * memory instead of Flash. The property is used for all methods to provide
398 * external descriptors.
399 */
400#define USB_PROP_LENGTH(len) ((len)&0x3fff)
401/* If a static external descriptor is used, this is the total length of the
402 * descriptor in bytes.
403 */
404
405/* all descriptors which may have properties: */
406#ifndef USB_CFG_DESCR_PROPS_DEVICE
407# define USB_CFG_DESCR_PROPS_DEVICE 0
408#endif
409#ifndef USB_CFG_DESCR_PROPS_CONFIGURATION
410# define USB_CFG_DESCR_PROPS_CONFIGURATION 0
411#endif
412#ifndef USB_CFG_DESCR_PROPS_STRINGS
413# define USB_CFG_DESCR_PROPS_STRINGS 0
414#endif
415#ifndef USB_CFG_DESCR_PROPS_STRING_0
416# define USB_CFG_DESCR_PROPS_STRING_0 0
417#endif
418#ifndef USB_CFG_DESCR_PROPS_STRING_VENDOR
419# define USB_CFG_DESCR_PROPS_STRING_VENDOR 0
420#endif
421#ifndef USB_CFG_DESCR_PROPS_STRING_PRODUCT
422# define USB_CFG_DESCR_PROPS_STRING_PRODUCT 0
423#endif
424#ifndef USB_CFG_DESCR_PROPS_STRING_SERIAL_NUMBER
425# define USB_CFG_DESCR_PROPS_STRING_SERIAL_NUMBER 0
426#endif
427#ifndef USB_CFG_DESCR_PROPS_HID
428# define USB_CFG_DESCR_PROPS_HID 0
429#endif
430#if !(USB_CFG_DESCR_PROPS_HID_REPORT)
431# undef USB_CFG_DESCR_PROPS_HID_REPORT
432# if USB_CFG_HID_REPORT_DESCRIPTOR_LENGTH /* do some backward compatibility tricks */
433# define USB_CFG_DESCR_PROPS_HID_REPORT USB_CFG_HID_REPORT_DESCRIPTOR_LENGTH
434# else
435# define USB_CFG_DESCR_PROPS_HID_REPORT 0
436# endif
437#endif
438#ifndef USB_CFG_DESCR_PROPS_UNKNOWN
439# define USB_CFG_DESCR_PROPS_UNKNOWN 0
440#endif
441
442/* ------------------ forward declaration of descriptors ------------------- */
443/* If you use external static descriptors, they must be stored in global
444 * arrays as declared below:
445 */
446#ifndef __ASSEMBLER__
447extern
448# if !(USB_CFG_DESCR_PROPS_DEVICE & USB_PROP_IS_RAM)
449 PROGMEM
450# endif
451 const char usbDescriptorDevice[];
452
453extern
454# if !(USB_CFG_DESCR_PROPS_CONFIGURATION & USB_PROP_IS_RAM)
455 PROGMEM
456# endif
457 const char usbDescriptorConfiguration[];
458
459extern
460# if !(USB_CFG_DESCR_PROPS_HID_REPORT & USB_PROP_IS_RAM)
461 PROGMEM
462# endif
463 const char usbDescriptorHidReport[];
464
465extern
466# if !(USB_CFG_DESCR_PROPS_STRING_0 & USB_PROP_IS_RAM)
467 PROGMEM
468# endif
469 const char usbDescriptorString0[];
470
471extern
472# if !(USB_CFG_DESCR_PROPS_STRING_VENDOR & USB_PROP_IS_RAM)
473 PROGMEM
474# endif
475 const int usbDescriptorStringVendor[];
476
477extern
478# if !(USB_CFG_DESCR_PROPS_STRING_PRODUCT & USB_PROP_IS_RAM)
479 PROGMEM
480# endif
481 const int usbDescriptorStringDevice[];
482
483extern
484# if !(USB_CFG_DESCR_PROPS_STRING_SERIAL_NUMBER & USB_PROP_IS_RAM)
485 PROGMEM
486# endif
487 const int usbDescriptorStringSerialNumber[];
488
489#endif /* __ASSEMBLER__ */
490
491/* ------------------------------------------------------------------------- */
492/* ------------------------ General Purpose Macros ------------------------- */
493/* ------------------------------------------------------------------------- */
494
495#define USB_CONCAT(a, b) a##b
496#define USB_CONCAT_EXPANDED(a, b) USB_CONCAT(a, b)
497
498#define USB_OUTPORT(name) USB_CONCAT(PORT, name)
499#define USB_INPORT(name) USB_CONCAT(PIN, name)
500#define USB_DDRPORT(name) USB_CONCAT(DDR, name)
501/* The double-define trick above lets us concatenate strings which are
502 * defined by macros.
503 */
504
505/* ------------------------------------------------------------------------- */
506/* ------------------------- Constant definitions -------------------------- */
507/* ------------------------------------------------------------------------- */
508
509#if !defined __ASSEMBLER__ && (!defined USB_CFG_VENDOR_ID || !defined USB_CFG_DEVICE_ID)
510# warning "You should define USB_CFG_VENDOR_ID and USB_CFG_DEVICE_ID in usbconfig.h"
511/* If the user has not defined IDs, we default to obdev's free IDs.
512 * See USB-IDs-for-free.txt for details.
513 */
514#endif
515
516/* make sure we have a VID and PID defined, byte order is lowbyte, highbyte */
517#ifndef USB_CFG_VENDOR_ID
518# define USB_CFG_VENDOR_ID 0xc0, 0x16 /* = 0x16c0 = 5824 = voti.nl */
519#endif
520
521#ifndef USB_CFG_DEVICE_ID
522# if USB_CFG_HID_REPORT_DESCRIPTOR_LENGTH
523# define USB_CFG_DEVICE_ID 0xdf, 0x05 /* = 0x5df = 1503, shared PID for HIDs */
524# elif USB_CFG_INTERFACE_CLASS == 2
525# define USB_CFG_DEVICE_ID 0xe1, 0x05 /* = 0x5e1 = 1505, shared PID for CDC Modems */
526# else
527# define USB_CFG_DEVICE_ID 0xdc, 0x05 /* = 0x5dc = 1500, obdev's free PID */
528# endif
529#endif
530
531/* Derive Output, Input and DataDirection ports from port names */
532#ifndef USB_CFG_IOPORTNAME
533# error "You must define USB_CFG_IOPORTNAME in usbconfig.h, see usbconfig-prototype.h"
534#endif
535
536#define USBOUT USB_OUTPORT(USB_CFG_IOPORTNAME)
537#define USB_PULLUP_OUT USB_OUTPORT(USB_CFG_PULLUP_IOPORTNAME)
538#define USBIN USB_INPORT(USB_CFG_IOPORTNAME)
539#define USBDDR USB_DDRPORT(USB_CFG_IOPORTNAME)
540#define USB_PULLUP_DDR USB_DDRPORT(USB_CFG_PULLUP_IOPORTNAME)
541
542#define USBMINUS USB_CFG_DMINUS_BIT
543#define USBPLUS USB_CFG_DPLUS_BIT
544#define USBIDLE (1 << USB_CFG_DMINUS_BIT) /* value representing J state */
545#define USBMASK ((1 << USB_CFG_DPLUS_BIT) | (1 << USB_CFG_DMINUS_BIT)) /* mask for USB I/O bits */
546
547/* defines for backward compatibility with older driver versions: */
548#define USB_CFG_IOPORT USB_OUTPORT(USB_CFG_IOPORTNAME)
549#ifdef USB_CFG_PULLUP_IOPORTNAME
550# define USB_CFG_PULLUP_IOPORT USB_OUTPORT(USB_CFG_PULLUP_IOPORTNAME)
551#endif
552
553#ifndef USB_CFG_EP3_NUMBER /* if not defined in usbconfig.h */
554# define USB_CFG_EP3_NUMBER 3
555#endif
556
557#ifndef USB_CFG_HAVE_INTRIN_ENDPOINT3
558# define USB_CFG_HAVE_INTRIN_ENDPOINT3 0
559#endif
560
561#define USB_BUFSIZE 11 /* PID, 8 bytes data, 2 bytes CRC */
562
563/* ----- Try to find registers and bits responsible for ext interrupt 0 ----- */
564
565#ifndef USB_INTR_CFG /* allow user to override our default */
566# if defined EICRA
567# define USB_INTR_CFG EICRA
568# else
569# define USB_INTR_CFG MCUCR
570# endif
571#endif
572#ifndef USB_INTR_CFG_SET /* allow user to override our default */
573# if defined(USB_COUNT_SOF) || defined(USB_SOF_HOOK)
574# define USB_INTR_CFG_SET (1 << ISC01) /* cfg for falling edge */
575 /* If any SOF logic is used, the interrupt must be wired to D- where
576 * we better trigger on falling edge
577 */
578# else
579# define USB_INTR_CFG_SET ((1 << ISC00) | (1 << ISC01)) /* cfg for rising edge */
580# endif
581#endif
582#ifndef USB_INTR_CFG_CLR /* allow user to override our default */
583# define USB_INTR_CFG_CLR 0 /* no bits to clear */
584#endif
585
586#ifndef USB_INTR_ENABLE /* allow user to override our default */
587# if defined GIMSK
588# define USB_INTR_ENABLE GIMSK
589# elif defined EIMSK
590# define USB_INTR_ENABLE EIMSK
591# else
592# define USB_INTR_ENABLE GICR
593# endif
594#endif
595#ifndef USB_INTR_ENABLE_BIT /* allow user to override our default */
596# define USB_INTR_ENABLE_BIT INT0
597#endif
598
599#ifndef USB_INTR_PENDING /* allow user to override our default */
600# if defined EIFR
601# define USB_INTR_PENDING EIFR
602# else
603# define USB_INTR_PENDING GIFR
604# endif
605#endif
606#ifndef USB_INTR_PENDING_BIT /* allow user to override our default */
607# define USB_INTR_PENDING_BIT INTF0
608#endif
609
610/*
611The defines above don't work for the following chips
612at90c8534: no ISC0?, no PORTB, can't find a data sheet
613at86rf401: no PORTB, no MCUCR etc, low clock rate
614atmega103: no ISC0? (maybe omission in header, can't find data sheet)
615atmega603: not defined in avr-libc
616at43usb320, at43usb355, at76c711: have USB anyway
617at94k: is different...
618
619at90s1200, attiny11, attiny12, attiny15, attiny28: these have no RAM
620*/
621
622/* ------------------------------------------------------------------------- */
623/* ----------------- USB Specification Constants and Types ----------------- */
624/* ------------------------------------------------------------------------- */
625
626/* USB Token values */
627#define USBPID_SETUP 0x2d
628#define USBPID_OUT 0xe1
629#define USBPID_IN 0x69
630#define USBPID_DATA0 0xc3
631#define USBPID_DATA1 0x4b
632
633#define USBPID_ACK 0xd2
634#define USBPID_NAK 0x5a
635#define USBPID_STALL 0x1e
636
637#ifndef USB_INITIAL_DATATOKEN
638# define USB_INITIAL_DATATOKEN USBPID_DATA1
639#endif
640
641#ifndef __ASSEMBLER__
642
643typedef struct usbTxStatus {
644 volatile uchar len;
645 uchar buffer[USB_BUFSIZE];
646} usbTxStatus_t;
647
648extern usbTxStatus_t usbTxStatus1, usbTxStatus3;
649# define usbTxLen1 usbTxStatus1.len
650# define usbTxBuf1 usbTxStatus1.buffer
651# define usbTxLen3 usbTxStatus3.len
652# define usbTxBuf3 usbTxStatus3.buffer
653
654typedef union usbWord {
655 unsigned word;
656 uchar bytes[2];
657} usbWord_t;
658
659typedef struct usbRequest {
660 uchar bmRequestType;
661 uchar bRequest;
662 usbWord_t wValue;
663 usbWord_t wIndex;
664 usbWord_t wLength;
665} usbRequest_t;
666/* This structure matches the 8 byte setup request */
667#endif
668
669/* bmRequestType field in USB setup:
670 * d t t r r r r r, where
671 * d ..... direction: 0=host->device, 1=device->host
672 * t ..... type: 0=standard, 1=class, 2=vendor, 3=reserved
673 * r ..... recipient: 0=device, 1=interface, 2=endpoint, 3=other
674 */
675
676/* USB setup recipient values */
677#define USBRQ_RCPT_MASK 0x1f
678#define USBRQ_RCPT_DEVICE 0
679#define USBRQ_RCPT_INTERFACE 1
680#define USBRQ_RCPT_ENDPOINT 2
681
682/* USB request type values */
683#define USBRQ_TYPE_MASK 0x60
684#define USBRQ_TYPE_STANDARD (0 << 5)
685#define USBRQ_TYPE_CLASS (1 << 5)
686#define USBRQ_TYPE_VENDOR (2 << 5)
687
688/* USB direction values: */
689#define USBRQ_DIR_MASK 0x80
690#define USBRQ_DIR_HOST_TO_DEVICE (0 << 7)
691#define USBRQ_DIR_DEVICE_TO_HOST (1 << 7)
692
693/* USB Standard Requests */
694#define USBRQ_GET_STATUS 0
695#define USBRQ_CLEAR_FEATURE 1
696#define USBRQ_SET_FEATURE 3
697#define USBRQ_SET_ADDRESS 5
698#define USBRQ_GET_DESCRIPTOR 6
699#define USBRQ_SET_DESCRIPTOR 7
700#define USBRQ_GET_CONFIGURATION 8
701#define USBRQ_SET_CONFIGURATION 9
702#define USBRQ_GET_INTERFACE 10
703#define USBRQ_SET_INTERFACE 11
704#define USBRQ_SYNCH_FRAME 12
705
706/* USB descriptor constants */
707#define USBDESCR_DEVICE 1
708#define USBDESCR_CONFIG 2
709#define USBDESCR_STRING 3
710#define USBDESCR_INTERFACE 4
711#define USBDESCR_ENDPOINT 5
712#define USBDESCR_HID 0x21
713#define USBDESCR_HID_REPORT 0x22
714#define USBDESCR_HID_PHYS 0x23
715
716//#define USBATTR_BUSPOWER 0x80 // USB 1.1 does not define this value any more
717#define USBATTR_SELFPOWER 0x40
718#define USBATTR_REMOTEWAKE 0x20
719
720/* USB HID Requests */
721#define USBRQ_HID_GET_REPORT 0x01
722#define USBRQ_HID_GET_IDLE 0x02
723#define USBRQ_HID_GET_PROTOCOL 0x03
724#define USBRQ_HID_SET_REPORT 0x09
725#define USBRQ_HID_SET_IDLE 0x0a
726#define USBRQ_HID_SET_PROTOCOL 0x0b
727
728/* ------------------------------------------------------------------------- */
729
730#endif /* __usbdrv_h_included__ */
diff --git a/tmk_core/protocol/vusb/usbdrv/usbdrvasm.S b/tmk_core/protocol/vusb/usbdrv/usbdrvasm.S
deleted file mode 100644
index 2e8097da9..000000000
--- a/tmk_core/protocol/vusb/usbdrv/usbdrvasm.S
+++ /dev/null
@@ -1,393 +0,0 @@
1/* Name: usbdrvasm.S
2 * Project: V-USB, virtual USB port for Atmel's(r) AVR(r) microcontrollers
3 * Author: Christian Starkjohann
4 * Creation Date: 2007-06-13
5 * Tabsize: 4
6 * Copyright: (c) 2007 by OBJECTIVE DEVELOPMENT Software GmbH
7 * License: GNU GPL v2 (see License.txt), GNU GPL v3 or proprietary (CommercialLicense.txt)
8 * Revision: $Id: usbdrvasm.S 785 2010-05-30 17:57:07Z cs $
9 */
10
11/*
12General Description:
13This module is the assembler part of the USB driver. This file contains
14general code (preprocessor acrobatics and CRC computation) and then includes
15the file appropriate for the given clock rate.
16*/
17
18#define __SFR_OFFSET 0 /* used by avr-libc's register definitions */
19#include "usbportability.h"
20#include "usbdrv.h" /* for common defs */
21
22/* register names */
23#define x1 r16
24#define x2 r17
25#define shift r18
26#define cnt r19
27#define x3 r20
28#define x4 r21
29#define x5 r22
30#define bitcnt x5
31#define phase x4
32#define leap x4
33
34/* Some assembler dependent definitions and declarations: */
35
36#ifdef __IAR_SYSTEMS_ASM__
37 extern usbRxBuf, usbDeviceAddr, usbNewDeviceAddr, usbInputBufOffset
38 extern usbCurrentTok, usbRxLen, usbRxToken, usbTxLen
39 extern usbTxBuf, usbTxStatus1, usbTxStatus3
40# if USB_COUNT_SOF
41 extern usbSofCount
42# endif
43 public usbCrc16
44 public usbCrc16Append
45
46 COMMON INTVEC
47# ifndef USB_INTR_VECTOR
48 ORG INT0_vect
49# else /* USB_INTR_VECTOR */
50 ORG USB_INTR_VECTOR
51# undef USB_INTR_VECTOR
52# endif /* USB_INTR_VECTOR */
53# define USB_INTR_VECTOR usbInterruptHandler
54 rjmp USB_INTR_VECTOR
55 RSEG CODE
56
57#else /* __IAR_SYSTEMS_ASM__ */
58
59# ifndef USB_INTR_VECTOR /* default to hardware interrupt INT0 */
60# ifdef INT0_vect
61# define USB_INTR_VECTOR INT0_vect // this is the "new" define for the vector
62# else
63# define USB_INTR_VECTOR SIG_INTERRUPT0 // this is the "old" vector
64# endif
65# endif
66 .text
67 .global USB_INTR_VECTOR
68 .type USB_INTR_VECTOR, @function
69 .global usbCrc16
70 .global usbCrc16Append
71#endif /* __IAR_SYSTEMS_ASM__ */
72
73
74#if USB_INTR_PENDING < 0x40 /* This is an I/O address, use in and out */
75# define USB_LOAD_PENDING(reg) in reg, USB_INTR_PENDING
76# define USB_STORE_PENDING(reg) out USB_INTR_PENDING, reg
77#else /* It's a memory address, use lds and sts */
78# define USB_LOAD_PENDING(reg) lds reg, USB_INTR_PENDING
79# define USB_STORE_PENDING(reg) sts USB_INTR_PENDING, reg
80#endif
81
82#define usbTxLen1 usbTxStatus1
83#define usbTxBuf1 (usbTxStatus1 + 1)
84#define usbTxLen3 usbTxStatus3
85#define usbTxBuf3 (usbTxStatus3 + 1)
86
87
88;----------------------------------------------------------------------------
89; Utility functions
90;----------------------------------------------------------------------------
91
92#ifdef __IAR_SYSTEMS_ASM__
93/* Register assignments for usbCrc16 on IAR cc */
94/* Calling conventions on IAR:
95 * First parameter passed in r16/r17, second in r18/r19 and so on.
96 * Callee must preserve r4-r15, r24-r29 (r28/r29 is frame pointer)
97 * Result is passed in r16/r17
98 * In case of the "tiny" memory model, pointers are only 8 bit with no
99 * padding. We therefore pass argument 1 as "16 bit unsigned".
100 */
101RTMODEL "__rt_version", "3"
102/* The line above will generate an error if cc calling conventions change.
103 * The value "3" above is valid for IAR 4.10B/W32
104 */
105# define argLen r18 /* argument 2 */
106# define argPtrL r16 /* argument 1 */
107# define argPtrH r17 /* argument 1 */
108
109# define resCrcL r16 /* result */
110# define resCrcH r17 /* result */
111
112# define ptrL ZL
113# define ptrH ZH
114# define ptr Z
115# define byte r22
116# define bitCnt r19
117# define polyL r20
118# define polyH r21
119# define scratch r23
120
121#else /* __IAR_SYSTEMS_ASM__ */
122/* Register assignments for usbCrc16 on gcc */
123/* Calling conventions on gcc:
124 * First parameter passed in r24/r25, second in r22/23 and so on.
125 * Callee must preserve r1-r17, r28/r29
126 * Result is passed in r24/r25
127 */
128# define argLen r22 /* argument 2 */
129# define argPtrL r24 /* argument 1 */
130# define argPtrH r25 /* argument 1 */
131
132# define resCrcL r24 /* result */
133# define resCrcH r25 /* result */
134
135# define ptrL XL
136# define ptrH XH
137# define ptr x
138# define byte r18
139# define bitCnt r19
140# define polyL r20
141# define polyH r21
142# define scratch r23
143
144#endif
145
146#if USB_USE_FAST_CRC
147
148; This implementation is faster, but has bigger code size
149; Thanks to Slawomir Fras (BoskiDialer) for this code!
150; It implements the following C pseudo-code:
151; unsigned table(unsigned char x)
152; {
153; unsigned value;
154;
155; value = (unsigned)x << 6;
156; value ^= (unsigned)x << 7;
157; if(parity(x))
158; value ^= 0xc001;
159; return value;
160; }
161; unsigned usbCrc16(unsigned char *argPtr, unsigned char argLen)
162; {
163; unsigned crc = 0xffff;
164;
165; while(argLen--)
166; crc = table(lo8(crc) ^ *argPtr++) ^ hi8(crc);
167; return ~crc;
168; }
169
170; extern unsigned usbCrc16(unsigned char *argPtr, unsigned char argLen);
171; argPtr r24+25 / r16+r17
172; argLen r22 / r18
173; temp variables:
174; byte r18 / r22
175; scratch r23
176; resCrc r24+r25 / r16+r17
177; ptr X / Z
178usbCrc16:
179 mov ptrL, argPtrL
180 mov ptrH, argPtrH
181 ldi resCrcL, 0xFF
182 ldi resCrcH, 0xFF
183 rjmp usbCrc16LoopTest
184usbCrc16ByteLoop:
185 ld byte, ptr+
186 eor resCrcL, byte ; resCrcL is now 'x' in table()
187 mov byte, resCrcL ; compute parity of 'x'
188 swap byte
189 eor byte, resCrcL
190 mov scratch, byte
191 lsr byte
192 lsr byte
193 eor byte, scratch
194 inc byte
195 lsr byte
196 andi byte, 1 ; byte is now parity(x)
197 mov scratch, resCrcL
198 mov resCrcL, resCrcH
199 eor resCrcL, byte ; low byte of if(parity(x)) value ^= 0xc001;
200 neg byte
201 andi byte, 0xc0
202 mov resCrcH, byte ; high byte of if(parity(x)) value ^= 0xc001;
203 clr byte
204 lsr scratch
205 ror byte
206 eor resCrcH, scratch
207 eor resCrcL, byte
208 lsr scratch
209 ror byte
210 eor resCrcH, scratch
211 eor resCrcL, byte
212usbCrc16LoopTest:
213 subi argLen, 1
214 brsh usbCrc16ByteLoop
215 com resCrcL
216 com resCrcH
217 ret
218
219#else /* USB_USE_FAST_CRC */
220
221; This implementation is slower, but has less code size
222;
223; extern unsigned usbCrc16(unsigned char *argPtr, unsigned char argLen);
224; argPtr r24+25 / r16+r17
225; argLen r22 / r18
226; temp variables:
227; byte r18 / r22
228; bitCnt r19
229; poly r20+r21
230; scratch r23
231; resCrc r24+r25 / r16+r17
232; ptr X / Z
233usbCrc16:
234 mov ptrL, argPtrL
235 mov ptrH, argPtrH
236 ldi resCrcL, 0
237 ldi resCrcH, 0
238 ldi polyL, lo8(0xa001)
239 ldi polyH, hi8(0xa001)
240 com argLen ; argLen = -argLen - 1: modified loop to ensure that carry is set
241 ldi bitCnt, 0 ; loop counter with starnd condition = end condition
242 rjmp usbCrcLoopEntry
243usbCrcByteLoop:
244 ld byte, ptr+
245 eor resCrcL, byte
246usbCrcBitLoop:
247 ror resCrcH ; carry is always set here (see brcs jumps to here)
248 ror resCrcL
249 brcs usbCrcNoXor
250 eor resCrcL, polyL
251 eor resCrcH, polyH
252usbCrcNoXor:
253 subi bitCnt, 224 ; (8 * 224) % 256 = 0; this loop iterates 8 times
254 brcs usbCrcBitLoop
255usbCrcLoopEntry:
256 subi argLen, -1
257 brcs usbCrcByteLoop
258usbCrcReady:
259 ret
260; Thanks to Reimar Doeffinger for optimizing this CRC routine!
261
262#endif /* USB_USE_FAST_CRC */
263
264; extern unsigned usbCrc16Append(unsigned char *data, unsigned char len);
265usbCrc16Append:
266 rcall usbCrc16
267 st ptr+, resCrcL
268 st ptr+, resCrcH
269 ret
270
271#undef argLen
272#undef argPtrL
273#undef argPtrH
274#undef resCrcL
275#undef resCrcH
276#undef ptrL
277#undef ptrH
278#undef ptr
279#undef byte
280#undef bitCnt
281#undef polyL
282#undef polyH
283#undef scratch
284
285
286#if USB_CFG_HAVE_MEASURE_FRAME_LENGTH
287#ifdef __IAR_SYSTEMS_ASM__
288/* Register assignments for usbMeasureFrameLength on IAR cc */
289/* Calling conventions on IAR:
290 * First parameter passed in r16/r17, second in r18/r19 and so on.
291 * Callee must preserve r4-r15, r24-r29 (r28/r29 is frame pointer)
292 * Result is passed in r16/r17
293 * In case of the "tiny" memory model, pointers are only 8 bit with no
294 * padding. We therefore pass argument 1 as "16 bit unsigned".
295 */
296# define resL r16
297# define resH r17
298# define cnt16L r30
299# define cnt16H r31
300# define cntH r18
301
302#else /* __IAR_SYSTEMS_ASM__ */
303/* Register assignments for usbMeasureFrameLength on gcc */
304/* Calling conventions on gcc:
305 * First parameter passed in r24/r25, second in r22/23 and so on.
306 * Callee must preserve r1-r17, r28/r29
307 * Result is passed in r24/r25
308 */
309# define resL r24
310# define resH r25
311# define cnt16L r24
312# define cnt16H r25
313# define cntH r26
314#endif
315# define cnt16 cnt16L
316
317; extern unsigned usbMeasurePacketLength(void);
318; returns time between two idle strobes in multiples of 7 CPU clocks
319.global usbMeasureFrameLength
320usbMeasureFrameLength:
321 ldi cntH, 6 ; wait ~ 10 ms for D- == 0
322 clr cnt16L
323 clr cnt16H
324usbMFTime16:
325 dec cntH
326 breq usbMFTimeout
327usbMFWaitStrobe: ; first wait for D- == 0 (idle strobe)
328 sbiw cnt16, 1 ;[0] [6]
329 breq usbMFTime16 ;[2]
330 sbic USBIN, USBMINUS ;[3]
331 rjmp usbMFWaitStrobe ;[4]
332usbMFWaitIdle: ; then wait until idle again
333 sbis USBIN, USBMINUS ;1 wait for D- == 1
334 rjmp usbMFWaitIdle ;2
335 ldi cnt16L, 1 ;1 represents cycles so far
336 clr cnt16H ;1
337usbMFWaitLoop:
338 in cntH, USBIN ;[0] [7]
339 adiw cnt16, 1 ;[1]
340 breq usbMFTimeout ;[3]
341 andi cntH, USBMASK ;[4]
342 brne usbMFWaitLoop ;[5]
343usbMFTimeout:
344#if resL != cnt16L
345 mov resL, cnt16L
346 mov resH, cnt16H
347#endif
348 ret
349
350#undef resL
351#undef resH
352#undef cnt16
353#undef cnt16L
354#undef cnt16H
355#undef cntH
356
357#endif /* USB_CFG_HAVE_MEASURE_FRAME_LENGTH */
358
359;----------------------------------------------------------------------------
360; Now include the clock rate specific code
361;----------------------------------------------------------------------------
362
363#ifndef USB_CFG_CLOCK_KHZ
364# ifdef F_CPU
365# define USB_CFG_CLOCK_KHZ (F_CPU/1000)
366# else
367# error "USB_CFG_CLOCK_KHZ not defined in usbconfig.h and no F_CPU set!"
368# endif
369#endif
370
371#if USB_CFG_CHECK_CRC /* separate dispatcher for CRC type modules */
372# if USB_CFG_CLOCK_KHZ == 18000
373# include "usbdrvasm18-crc.inc"
374# else
375# error "USB_CFG_CLOCK_KHZ is not one of the supported crc-rates!"
376# endif
377#else /* USB_CFG_CHECK_CRC */
378# if USB_CFG_CLOCK_KHZ == 12000
379# include "usbdrvasm12.inc"
380# elif USB_CFG_CLOCK_KHZ == 12800
381# include "usbdrvasm128.inc"
382# elif USB_CFG_CLOCK_KHZ == 15000
383# include "usbdrvasm15.inc"
384# elif USB_CFG_CLOCK_KHZ == 16000
385# include "usbdrvasm16.inc"
386# elif USB_CFG_CLOCK_KHZ == 16500
387# include "usbdrvasm165.inc"
388# elif USB_CFG_CLOCK_KHZ == 20000
389# include "usbdrvasm20.inc"
390# else
391# error "USB_CFG_CLOCK_KHZ is not one of the supported non-crc-rates!"
392# endif
393#endif /* USB_CFG_CHECK_CRC */
diff --git a/tmk_core/protocol/vusb/usbdrv/usbdrvasm.asm b/tmk_core/protocol/vusb/usbdrv/usbdrvasm.asm
deleted file mode 100644
index 9cc4e4d73..000000000
--- a/tmk_core/protocol/vusb/usbdrv/usbdrvasm.asm
+++ /dev/null
@@ -1,21 +0,0 @@
1/* Name: usbdrvasm.asm
2 * Project: V-USB, virtual USB port for Atmel's(r) AVR(r) microcontrollers
3 * Author: Christian Starkjohann
4 * Creation Date: 2006-03-01
5 * Tabsize: 4
6 * Copyright: (c) 2006 by OBJECTIVE DEVELOPMENT Software GmbH
7 * License: GNU GPL v2 (see License.txt), GNU GPL v3 or proprietary (CommercialLicense.txt)
8 * This Revision: $Id$
9 */
10
11/*
12General Description:
13The IAR compiler/assembler system prefers assembler files with file extension
14".asm". We simply provide this file as an alias for usbdrvasm.S.
15
16Thanks to Oleg Semyonov for his help with the IAR tools port!
17*/
18
19#include "usbdrvasm.S"
20
21end
diff --git a/tmk_core/protocol/vusb/usbdrv/usbdrvasm12.inc b/tmk_core/protocol/vusb/usbdrv/usbdrvasm12.inc
deleted file mode 100644
index c1167584c..000000000
--- a/tmk_core/protocol/vusb/usbdrv/usbdrvasm12.inc
+++ /dev/null
@@ -1,393 +0,0 @@
1/* Name: usbdrvasm12.inc
2 * Project: V-USB, virtual USB port for Atmel's(r) AVR(r) microcontrollers
3 * Author: Christian Starkjohann
4 * Creation Date: 2004-12-29
5 * Tabsize: 4
6 * Copyright: (c) 2007 by OBJECTIVE DEVELOPMENT Software GmbH
7 * License: GNU GPL v2 (see License.txt), GNU GPL v3 or proprietary (CommercialLicense.txt)
8 * This Revision: $Id: usbdrvasm12.inc 740 2009-04-13 18:23:31Z cs $
9 */
10
11/* Do not link this file! Link usbdrvasm.S instead, which includes the
12 * appropriate implementation!
13 */
14
15/*
16General Description:
17This file is the 12 MHz version of the asssembler part of the USB driver. It
18requires a 12 MHz crystal (not a ceramic resonator and not a calibrated RC
19oscillator).
20
21See usbdrv.h for a description of the entire driver.
22
23Since almost all of this code is timing critical, don't change unless you
24really know what you are doing! Many parts require not only a maximum number
25of CPU cycles, but even an exact number of cycles!
26
27
28Timing constraints according to spec (in bit times):
29timing subject min max CPUcycles
30---------------------------------------------------------------------------
31EOP of OUT/SETUP to sync pattern of DATA0 (both rx) 2 16 16-128
32EOP of IN to sync pattern of DATA0 (rx, then tx) 2 7.5 16-60
33DATAx (rx) to ACK/NAK/STALL (tx) 2 7.5 16-60
34*/
35
36;Software-receiver engine. Strict timing! Don't change unless you can preserve timing!
37;interrupt response time: 4 cycles + insn running = 7 max if interrupts always enabled
38;max allowable interrupt latency: 34 cycles -> max 25 cycles interrupt disable
39;max stack usage: [ret(2), YL, SREG, YH, shift, x1, x2, x3, cnt, x4] = 11 bytes
40;Numbers in brackets are maximum cycles since SOF.
41USB_INTR_VECTOR:
42;order of registers pushed: YL, SREG [sofError], YH, shift, x1, x2, x3, cnt
43 push YL ;2 [35] push only what is necessary to sync with edge ASAP
44 in YL, SREG ;1 [37]
45 push YL ;2 [39]
46;----------------------------------------------------------------------------
47; Synchronize with sync pattern:
48;----------------------------------------------------------------------------
49;sync byte (D-) pattern LSb to MSb: 01010100 [1 = idle = J, 0 = K]
50;sync up with J to K edge during sync pattern -- use fastest possible loops
51;The first part waits at most 1 bit long since we must be in sync pattern.
52;YL is guarenteed to be < 0x80 because I flag is clear. When we jump to
53;waitForJ, ensure that this prerequisite is met.
54waitForJ:
55 inc YL
56 sbis USBIN, USBMINUS
57 brne waitForJ ; just make sure we have ANY timeout
58waitForK:
59;The following code results in a sampling window of 1/4 bit which meets the spec.
60 sbis USBIN, USBMINUS
61 rjmp foundK
62 sbis USBIN, USBMINUS
63 rjmp foundK
64 sbis USBIN, USBMINUS
65 rjmp foundK
66 sbis USBIN, USBMINUS
67 rjmp foundK
68 sbis USBIN, USBMINUS
69 rjmp foundK
70#if USB_COUNT_SOF
71 lds YL, usbSofCount
72 inc YL
73 sts usbSofCount, YL
74#endif /* USB_COUNT_SOF */
75#ifdef USB_SOF_HOOK
76 USB_SOF_HOOK
77#endif
78 rjmp sofError
79foundK:
80;{3, 5} after falling D- edge, average delay: 4 cycles [we want 4 for center sampling]
81;we have 1 bit time for setup purposes, then sample again. Numbers in brackets
82;are cycles from center of first sync (double K) bit after the instruction
83 push YH ;2 [2]
84 lds YL, usbInputBufOffset;2 [4]
85 clr YH ;1 [5]
86 subi YL, lo8(-(usbRxBuf));1 [6]
87 sbci YH, hi8(-(usbRxBuf));1 [7]
88
89 sbis USBIN, USBMINUS ;1 [8] we want two bits K [sample 1 cycle too early]
90 rjmp haveTwoBitsK ;2 [10]
91 pop YH ;2 [11] undo the push from before
92 rjmp waitForK ;2 [13] this was not the end of sync, retry
93haveTwoBitsK:
94;----------------------------------------------------------------------------
95; push more registers and initialize values while we sample the first bits:
96;----------------------------------------------------------------------------
97 push shift ;2 [16]
98 push x1 ;2 [12]
99 push x2 ;2 [14]
100
101 in x1, USBIN ;1 [17] <-- sample bit 0
102 ldi shift, 0xff ;1 [18]
103 bst x1, USBMINUS ;1 [19]
104 bld shift, 0 ;1 [20]
105 push x3 ;2 [22]
106 push cnt ;2 [24]
107
108 in x2, USBIN ;1 [25] <-- sample bit 1
109 ser x3 ;1 [26] [inserted init instruction]
110 eor x1, x2 ;1 [27]
111 bst x1, USBMINUS ;1 [28]
112 bld shift, 1 ;1 [29]
113 ldi cnt, USB_BUFSIZE;1 [30] [inserted init instruction]
114 rjmp rxbit2 ;2 [32]
115
116;----------------------------------------------------------------------------
117; Receiver loop (numbers in brackets are cycles within byte after instr)
118;----------------------------------------------------------------------------
119
120unstuff0: ;1 (branch taken)
121 andi x3, ~0x01 ;1 [15]
122 mov x1, x2 ;1 [16] x2 contains last sampled (stuffed) bit
123 in x2, USBIN ;1 [17] <-- sample bit 1 again
124 ori shift, 0x01 ;1 [18]
125 rjmp didUnstuff0 ;2 [20]
126
127unstuff1: ;1 (branch taken)
128 mov x2, x1 ;1 [21] x1 contains last sampled (stuffed) bit
129 andi x3, ~0x02 ;1 [22]
130 ori shift, 0x02 ;1 [23]
131 nop ;1 [24]
132 in x1, USBIN ;1 [25] <-- sample bit 2 again
133 rjmp didUnstuff1 ;2 [27]
134
135unstuff2: ;1 (branch taken)
136 andi x3, ~0x04 ;1 [29]
137 ori shift, 0x04 ;1 [30]
138 mov x1, x2 ;1 [31] x2 contains last sampled (stuffed) bit
139 nop ;1 [32]
140 in x2, USBIN ;1 [33] <-- sample bit 3
141 rjmp didUnstuff2 ;2 [35]
142
143unstuff3: ;1 (branch taken)
144 in x2, USBIN ;1 [34] <-- sample stuffed bit 3 [one cycle too late]
145 andi x3, ~0x08 ;1 [35]
146 ori shift, 0x08 ;1 [36]
147 rjmp didUnstuff3 ;2 [38]
148
149unstuff4: ;1 (branch taken)
150 andi x3, ~0x10 ;1 [40]
151 in x1, USBIN ;1 [41] <-- sample stuffed bit 4
152 ori shift, 0x10 ;1 [42]
153 rjmp didUnstuff4 ;2 [44]
154
155unstuff5: ;1 (branch taken)
156 andi x3, ~0x20 ;1 [48]
157 in x2, USBIN ;1 [49] <-- sample stuffed bit 5
158 ori shift, 0x20 ;1 [50]
159 rjmp didUnstuff5 ;2 [52]
160
161unstuff6: ;1 (branch taken)
162 andi x3, ~0x40 ;1 [56]
163 in x1, USBIN ;1 [57] <-- sample stuffed bit 6
164 ori shift, 0x40 ;1 [58]
165 rjmp didUnstuff6 ;2 [60]
166
167; extra jobs done during bit interval:
168; bit 0: store, clear [SE0 is unreliable here due to bit dribbling in hubs]
169; bit 1: se0 check
170; bit 2: overflow check
171; bit 3: recovery from delay [bit 0 tasks took too long]
172; bit 4: none
173; bit 5: none
174; bit 6: none
175; bit 7: jump, eor
176rxLoop:
177 eor x3, shift ;1 [0] reconstruct: x3 is 0 at bit locations we changed, 1 at others
178 in x1, USBIN ;1 [1] <-- sample bit 0
179 st y+, x3 ;2 [3] store data
180 ser x3 ;1 [4]
181 nop ;1 [5]
182 eor x2, x1 ;1 [6]
183 bst x2, USBMINUS;1 [7]
184 bld shift, 0 ;1 [8]
185 in x2, USBIN ;1 [9] <-- sample bit 1 (or possibly bit 0 stuffed)
186 andi x2, USBMASK ;1 [10]
187 breq se0 ;1 [11] SE0 check for bit 1
188 andi shift, 0xf9 ;1 [12]
189didUnstuff0:
190 breq unstuff0 ;1 [13]
191 eor x1, x2 ;1 [14]
192 bst x1, USBMINUS;1 [15]
193 bld shift, 1 ;1 [16]
194rxbit2:
195 in x1, USBIN ;1 [17] <-- sample bit 2 (or possibly bit 1 stuffed)
196 andi shift, 0xf3 ;1 [18]
197 breq unstuff1 ;1 [19] do remaining work for bit 1
198didUnstuff1:
199 subi cnt, 1 ;1 [20]
200 brcs overflow ;1 [21] loop control
201 eor x2, x1 ;1 [22]
202 bst x2, USBMINUS;1 [23]
203 bld shift, 2 ;1 [24]
204 in x2, USBIN ;1 [25] <-- sample bit 3 (or possibly bit 2 stuffed)
205 andi shift, 0xe7 ;1 [26]
206 breq unstuff2 ;1 [27]
207didUnstuff2:
208 eor x1, x2 ;1 [28]
209 bst x1, USBMINUS;1 [29]
210 bld shift, 3 ;1 [30]
211didUnstuff3:
212 andi shift, 0xcf ;1 [31]
213 breq unstuff3 ;1 [32]
214 in x1, USBIN ;1 [33] <-- sample bit 4
215 eor x2, x1 ;1 [34]
216 bst x2, USBMINUS;1 [35]
217 bld shift, 4 ;1 [36]
218didUnstuff4:
219 andi shift, 0x9f ;1 [37]
220 breq unstuff4 ;1 [38]
221 nop2 ;2 [40]
222 in x2, USBIN ;1 [41] <-- sample bit 5
223 eor x1, x2 ;1 [42]
224 bst x1, USBMINUS;1 [43]
225 bld shift, 5 ;1 [44]
226didUnstuff5:
227 andi shift, 0x3f ;1 [45]
228 breq unstuff5 ;1 [46]
229 nop2 ;2 [48]
230 in x1, USBIN ;1 [49] <-- sample bit 6
231 eor x2, x1 ;1 [50]
232 bst x2, USBMINUS;1 [51]
233 bld shift, 6 ;1 [52]
234didUnstuff6:
235 cpi shift, 0x02 ;1 [53]
236 brlo unstuff6 ;1 [54]
237 nop2 ;2 [56]
238 in x2, USBIN ;1 [57] <-- sample bit 7
239 eor x1, x2 ;1 [58]
240 bst x1, USBMINUS;1 [59]
241 bld shift, 7 ;1 [60]
242didUnstuff7:
243 cpi shift, 0x04 ;1 [61]
244 brsh rxLoop ;2 [63] loop control
245unstuff7:
246 andi x3, ~0x80 ;1 [63]
247 ori shift, 0x80 ;1 [64]
248 in x2, USBIN ;1 [65] <-- sample stuffed bit 7
249 nop ;1 [66]
250 rjmp didUnstuff7 ;2 [68]
251
252macro POP_STANDARD ; 12 cycles
253 pop cnt
254 pop x3
255 pop x2
256 pop x1
257 pop shift
258 pop YH
259 endm
260macro POP_RETI ; 5 cycles
261 pop YL
262 out SREG, YL
263 pop YL
264 endm
265
266#include "asmcommon.inc"
267
268;----------------------------------------------------------------------------
269; Transmitting data
270;----------------------------------------------------------------------------
271
272txByteLoop:
273txBitloop:
274stuffN1Delay: ; [03]
275 ror shift ;[-5] [11] [59]
276 brcc doExorN1 ;[-4] [60]
277 subi x4, 1 ;[-3]
278 brne commonN1 ;[-2]
279 lsl shift ;[-1] compensate ror after rjmp stuffDelay
280 nop ;[00] stuffing consists of just waiting 8 cycles
281 rjmp stuffN1Delay ;[01] after ror, C bit is reliably clear
282
283sendNakAndReti: ;0 [-19] 19 cycles until SOP
284 ldi x3, USBPID_NAK ;1 [-18]
285 rjmp usbSendX3 ;2 [-16]
286sendAckAndReti: ;0 [-19] 19 cycles until SOP
287 ldi x3, USBPID_ACK ;1 [-18]
288 rjmp usbSendX3 ;2 [-16]
289sendCntAndReti: ;0 [-17] 17 cycles until SOP
290 mov x3, cnt ;1 [-16]
291usbSendX3: ;0 [-16]
292 ldi YL, 20 ;1 [-15] 'x3' is R20
293 ldi YH, 0 ;1 [-14]
294 ldi cnt, 2 ;1 [-13]
295; rjmp usbSendAndReti fallthrough
296
297; USB spec says:
298; idle = J
299; J = (D+ = 0), (D- = 1) or USBOUT = 0x01
300; K = (D+ = 1), (D- = 0) or USBOUT = 0x02
301; Spec allows 7.5 bit times from EOP to SOP for replies (= 60 cycles)
302
303;usbSend:
304;pointer to data in 'Y'
305;number of bytes in 'cnt' -- including sync byte
306;uses: x1...x2, x4, shift, cnt, Y [x1 = mirror USBOUT, x2 = USBMASK, x4 = bitstuff cnt]
307;Numbers in brackets are time since first bit of sync pattern is sent (start of instruction)
308usbSendAndReti:
309 in x2, USBDDR ;[-12] 12 cycles until SOP
310 ori x2, USBMASK ;[-11]
311 sbi USBOUT, USBMINUS ;[-10] prepare idle state; D+ and D- must have been 0 (no pullups)
312 out USBDDR, x2 ;[-8] <--- acquire bus
313 in x1, USBOUT ;[-7] port mirror for tx loop
314 ldi shift, 0x40 ;[-6] sync byte is first byte sent (we enter loop after ror)
315 ldi x2, USBMASK ;[-5]
316 push x4 ;[-4]
317doExorN1:
318 eor x1, x2 ;[-2] [06] [62]
319 ldi x4, 6 ;[-1] [07] [63]
320commonN1:
321stuffN2Delay:
322 out USBOUT, x1 ;[00] [08] [64] <--- set bit
323 ror shift ;[01]
324 brcc doExorN2 ;[02]
325 subi x4, 1 ;[03]
326 brne commonN2 ;[04]
327 lsl shift ;[05] compensate ror after rjmp stuffDelay
328 rjmp stuffN2Delay ;[06] after ror, C bit is reliably clear
329doExorN2:
330 eor x1, x2 ;[04] [12]
331 ldi x4, 6 ;[05] [13]
332commonN2:
333 nop ;[06] [14]
334 subi cnt, 171 ;[07] [15] trick: (3 * 171) & 0xff = 1
335 out USBOUT, x1 ;[08] [16] <--- set bit
336 brcs txBitloop ;[09] [25] [41]
337
338stuff6Delay:
339 ror shift ;[42] [50]
340 brcc doExor6 ;[43]
341 subi x4, 1 ;[44]
342 brne common6 ;[45]
343 lsl shift ;[46] compensate ror after rjmp stuffDelay
344 nop ;[47] stuffing consists of just waiting 8 cycles
345 rjmp stuff6Delay ;[48] after ror, C bit is reliably clear
346doExor6:
347 eor x1, x2 ;[45] [53]
348 ldi x4, 6 ;[46]
349common6:
350stuff7Delay:
351 ror shift ;[47] [55]
352 out USBOUT, x1 ;[48] <--- set bit
353 brcc doExor7 ;[49]
354 subi x4, 1 ;[50]
355 brne common7 ;[51]
356 lsl shift ;[52] compensate ror after rjmp stuffDelay
357 rjmp stuff7Delay ;[53] after ror, C bit is reliably clear
358doExor7:
359 eor x1, x2 ;[51] [59]
360 ldi x4, 6 ;[52]
361common7:
362 ld shift, y+ ;[53]
363 tst cnt ;[55]
364 out USBOUT, x1 ;[56] <--- set bit
365 brne txByteLoop ;[57]
366
367;make SE0:
368 cbr x1, USBMASK ;[58] prepare SE0 [spec says EOP may be 15 to 18 cycles]
369 lds x2, usbNewDeviceAddr;[59]
370 lsl x2 ;[61] we compare with left shifted address
371 subi YL, 2 + 20 ;[62] Only assign address on data packets, not ACK/NAK in x3
372 sbci YH, 0 ;[63]
373 out USBOUT, x1 ;[00] <-- out SE0 -- from now 2 bits = 16 cycles until bus idle
374;2006-03-06: moved transfer of new address to usbDeviceAddr from C-Code to asm:
375;set address only after data packet was sent, not after handshake
376 breq skipAddrAssign ;[01]
377 sts usbDeviceAddr, x2 ; if not skipped: SE0 is one cycle longer
378skipAddrAssign:
379;end of usbDeviceAddress transfer
380 ldi x2, 1<<USB_INTR_PENDING_BIT;[03] int0 occurred during TX -- clear pending flag
381 USB_STORE_PENDING(x2) ;[04]
382 ori x1, USBIDLE ;[05]
383 in x2, USBDDR ;[06]
384 cbr x2, USBMASK ;[07] set both pins to input
385 mov x3, x1 ;[08]
386 cbr x3, USBMASK ;[09] configure no pullup on both pins
387 pop x4 ;[10]
388 nop2 ;[12]
389 nop2 ;[14]
390 out USBOUT, x1 ;[16] <-- out J (idle) -- end of SE0 (EOP signal)
391 out USBDDR, x2 ;[17] <-- release bus now
392 out USBOUT, x3 ;[18] <-- ensure no pull-up resistors are active
393 rjmp doReturn
diff --git a/tmk_core/protocol/vusb/usbdrv/usbdrvasm128.inc b/tmk_core/protocol/vusb/usbdrv/usbdrvasm128.inc
deleted file mode 100644
index bcd6621cc..000000000
--- a/tmk_core/protocol/vusb/usbdrv/usbdrvasm128.inc
+++ /dev/null
@@ -1,750 +0,0 @@
1/* Name: usbdrvasm128.inc
2 * Project: V-USB, virtual USB port for Atmel's(r) AVR(r) microcontrollers
3 * Author: Christian Starkjohann
4 * Creation Date: 2008-10-11
5 * Tabsize: 4
6 * Copyright: (c) 2008 by OBJECTIVE DEVELOPMENT Software GmbH
7 * License: GNU GPL v2 (see License.txt), GNU GPL v3 or proprietary (CommercialLicense.txt)
8 * This Revision: $Id: usbdrvasm128.inc 758 2009-08-06 10:12:54Z cs $
9 */
10
11/* Do not link this file! Link usbdrvasm.S instead, which includes the
12 * appropriate implementation!
13 */
14
15/*
16General Description:
17This file is the 12.8 MHz version of the USB driver. It is intended for use
18with the internal RC oscillator. Although 12.8 MHz is outside the guaranteed
19calibration range of the oscillator, almost all AVRs can reach this frequency.
20This version contains a phase locked loop in the receiver routine to cope with
21slight clock rate deviations of up to +/- 1%.
22
23See usbdrv.h for a description of the entire driver.
24
25LIMITATIONS
26===========
27Although it may seem very handy to save the crystal and use the internal
28RC oscillator of the CPU, this method (and this module) has some serious
29limitations:
30(1) The guaranteed calibration range of the oscillator is only 8.1 MHz.
31They typical range is 14.5 MHz and most AVRs can actually reach this rate.
32(2) Writing EEPROM and Flash may be unreliable (short data lifetime) since
33the write procedure is timed from the RC oscillator.
34(3) End Of Packet detection (SE0) should be in bit 1, bit it is only checked
35if bits 0 and 1 both read as 0 on D- and D+ read as 0 in the middle. This may
36cause problems with old hubs which delay SE0 by up to one cycle.
37(4) Code size is much larger than that of the other modules.
38
39Since almost all of this code is timing critical, don't change unless you
40really know what you are doing! Many parts require not only a maximum number
41of CPU cycles, but even an exact number of cycles!
42
43Implementation notes:
44======================
45min frequency: 67 cycles for 8 bit -> 12.5625 MHz
46max frequency: 69.286 cycles for 8 bit -> 12.99 MHz
47nominal frequency: 12.77 MHz ( = sqrt(min * max))
48
49sampling positions: (next even number in range [+/- 0.5])
50cycle index range: 0 ... 66
51bits:
52.5, 8.875, 17.25, 25.625, 34, 42.375, 50.75, 59.125
53[0/1], [9], [17], [25/+26], [34], [+42/43], [51], [59]
54
55bit number: 0 1 2 3 4 5 6 7
56spare cycles 1 2 1 2 1 1 1 0
57
58operations to perform: duration cycle
59 ----------------
60 eor fix, shift 1 -> 00
61 andi phase, USBMASK 1 -> 08
62 breq se0 1 -> 16 (moved to 11)
63 st y+, data 2 -> 24, 25
64 mov data, fix 1 -> 33
65 ser data 1 -> 41
66 subi cnt, 1 1 -> 49
67 brcs overflow 1 -> 50
68
69layout of samples and operations:
70[##] = sample bit
71<##> = sample phase
72*##* = operation
73
740: *00* [01] 02 03 04 <05> 06 07
751: *08* [09] 10 11 12 <13> 14 15 *16*
762: [17] 18 19 20 <21> 22 23
773: *24* *25* [26] 27 28 29 <30> 31 32
784: *33* [34] 35 36 37 <38> 39 40
795: *41* [42] 43 44 45 <46> 47 48
806: *49* *50* [51] 52 53 54 <55> 56 57 58
817: [59] 60 61 62 <63> 64 65 66
82*****************************************************************************/
83
84/* we prefer positive expressions (do if condition) instead of negative
85 * (skip if condition), therefore use defines for skip instructions:
86 */
87#define ifioclr sbis
88#define ifioset sbic
89#define ifrclr sbrs
90#define ifrset sbrc
91
92/* The registers "fix" and "data" swap their meaning during the loop. Use
93 * defines to keep their name constant.
94 */
95#define fix x2
96#define data x1
97#undef phase /* phase has a default definition to x4 */
98#define phase x3
99
100
101USB_INTR_VECTOR:
102;order of registers pushed: YL, SREG [sofError], YH, shift, x1, x2, x3, cnt, r0
103 push YL ;2 push only what is necessary to sync with edge ASAP
104 in YL, SREG ;1
105 push YL ;2
106;----------------------------------------------------------------------------
107; Synchronize with sync pattern:
108;----------------------------------------------------------------------------
109;sync byte (D-) pattern LSb to MSb: 01010100 [1 = idle = J, 0 = K]
110;sync up with J to K edge during sync pattern -- use fastest possible loops
111;The first part waits at most 1 bit long since we must be in sync pattern.
112;YL is guarenteed to be < 0x80 because I flag is clear. When we jump to
113;waitForJ, ensure that this prerequisite is met.
114waitForJ:
115 inc YL
116 sbis USBIN, USBMINUS
117 brne waitForJ ; just make sure we have ANY timeout
118waitForK:
119;The following code results in a sampling window of 1/4 bit which meets the spec.
120 sbis USBIN, USBMINUS
121 rjmp foundK
122 sbis USBIN, USBMINUS
123 rjmp foundK
124 sbis USBIN, USBMINUS
125 rjmp foundK
126 sbis USBIN, USBMINUS
127 rjmp foundK
128 sbis USBIN, USBMINUS ;[0]
129 rjmp foundK ;[1]
130#if USB_COUNT_SOF
131 lds YL, usbSofCount
132 inc YL
133 sts usbSofCount, YL
134#endif /* USB_COUNT_SOF */
135#ifdef USB_SOF_HOOK
136 USB_SOF_HOOK
137#endif
138 rjmp sofError
139
140foundK:
141;{3, 5} after falling D- edge, average delay: 4 cycles [we want 4 for center sampling]
142;we have 1 bit time for setup purposes, then sample again. Numbers in brackets
143;are cycles from center of first sync (double K) bit after the instruction
144 push YH ;[2]
145 lds YL, usbInputBufOffset;[4]
146 clr YH ;[6]
147 subi YL, lo8(-(usbRxBuf));[7]
148 sbci YH, hi8(-(usbRxBuf));[8]
149
150 sbis USBIN, USBMINUS ;[9] we want two bits K [we want to sample at 8 + 4 - 1.5 = 10.5]
151 rjmp haveTwoBitsK ;[10]
152 pop YH ;[11] undo the push from before
153 rjmp waitForK ;[13] this was not the end of sync, retry
154haveTwoBitsK:
155;----------------------------------------------------------------------------
156; push more registers and initialize values while we sample the first bits:
157;----------------------------------------------------------------------------
158#define fix x2
159#define data x1
160
161 push shift ;[12]
162 push x1 ;[14]
163 push x2 ;[16]
164 ldi shift, 0x80 ;[18] prevent bit-unstuffing but init low bits to 0
165 ifioset USBIN, USBMINUS ;[19] [01] <--- bit 0 [10.5 + 8 = 18.5]
166 ori shift, 1<<0 ;[02]
167 push x3 ;[03]
168 push cnt ;[05]
169 push r0 ;[07]
170 ifioset USBIN, USBMINUS ;[09] <--- bit 1
171 ori shift, 1<<1 ;[10]
172 ser fix ;[11]
173 ldi cnt, USB_BUFSIZE ;[12]
174 mov data, shift ;[13]
175 lsl shift ;[14]
176 nop2 ;[15]
177 ifioset USBIN, USBMINUS ;[17] <--- bit 2
178 ori data, 3<<2 ;[18] store in bit 2 AND bit 3
179 eor shift, data ;[19] do nrzi decoding
180 andi data, 1<<3 ;[20]
181 in phase, USBIN ;[21] <- phase
182 brne jumpToEntryAfterSet ;[22] if USBMINS at bit 3 was 1
183 nop ;[23]
184 rjmp entryAfterClr ;[24]
185jumpToEntryAfterSet:
186 rjmp entryAfterSet ;[24]
187
188;----------------------------------------------------------------------------
189; Receiver loop (numbers in brackets are cycles within byte after instr)
190;----------------------------------------------------------------------------
191#undef fix
192#define fix x1
193#undef data
194#define data x2
195
196bit7IsSet:
197 ifrclr phase, USBMINUS ;[62] check phase only if D- changed
198 lpm ;[63]
199 in phase, USBIN ;[64] <- phase (one cycle too late)
200 ori shift, 1 << 7 ;[65]
201 nop ;[66]
202;;;;rjmp bit0AfterSet ; -> [00] == [67] moved block up to save jump
203bit0AfterSet:
204 eor fix, shift ;[00]
205#undef fix
206#define fix x2
207#undef data
208#define data x1 /* we now have result in data, fix is reset to 0xff */
209 ifioclr USBIN, USBMINUS ;[01] <--- sample 0
210 rjmp bit0IsClr ;[02]
211 andi shift, ~(7 << 0) ;[03]
212 breq unstuff0s ;[04]
213 in phase, USBIN ;[05] <- phase
214 rjmp bit1AfterSet ;[06]
215unstuff0s:
216 in phase, USBIN ;[06] <- phase (one cycle too late)
217 andi fix, ~(1 << 0) ;[07]
218 ifioclr USBIN, USBMINUS ;[00]
219 ifioset USBIN, USBPLUS ;[01]
220 rjmp bit0IsClr ;[02] executed if first expr false or second true
221se0AndStore: ; executed only if both bits 0
222 st y+, x1 ;[15/17] cycles after start of byte
223 rjmp se0 ;[17/19]
224
225bit0IsClr:
226 ifrset phase, USBMINUS ;[04] check phase only if D- changed
227 lpm ;[05]
228 in phase, USBIN ;[06] <- phase (one cycle too late)
229 ori shift, 1 << 0 ;[07]
230bit1AfterClr:
231 andi phase, USBMASK ;[08]
232 ifioset USBIN, USBMINUS ;[09] <--- sample 1
233 rjmp bit1IsSet ;[10]
234 breq se0AndStore ;[11] if D- was 0 in bits 0 AND 1 and D+ was 0 in between, we have SE0
235 andi shift, ~(7 << 1) ;[12]
236 in phase, USBIN ;[13] <- phase
237 breq unstuff1c ;[14]
238 rjmp bit2AfterClr ;[15]
239unstuff1c:
240 andi fix, ~(1 << 1) ;[16]
241 nop2 ;[08]
242 nop2 ;[10]
243bit1IsSet:
244 ifrclr phase, USBMINUS ;[12] check phase only if D- changed
245 lpm ;[13]
246 in phase, USBIN ;[14] <- phase (one cycle too late)
247 ori shift, 1 << 1 ;[15]
248 nop ;[16]
249bit2AfterSet:
250 ifioclr USBIN, USBMINUS ;[17] <--- sample 2
251 rjmp bit2IsClr ;[18]
252 andi shift, ~(7 << 2) ;[19]
253 breq unstuff2s ;[20]
254 in phase, USBIN ;[21] <- phase
255 rjmp bit3AfterSet ;[22]
256unstuff2s:
257 in phase, USBIN ;[22] <- phase (one cycle too late)
258 andi fix, ~(1 << 2) ;[23]
259 nop2 ;[16]
260 nop2 ;[18]
261bit2IsClr:
262 ifrset phase, USBMINUS ;[20] check phase only if D- changed
263 lpm ;[21]
264 in phase, USBIN ;[22] <- phase (one cycle too late)
265 ori shift, 1 << 2 ;[23]
266bit3AfterClr:
267 st y+, data ;[24]
268entryAfterClr:
269 ifioset USBIN, USBMINUS ;[26] <--- sample 3
270 rjmp bit3IsSet ;[27]
271 andi shift, ~(7 << 3) ;[28]
272 breq unstuff3c ;[29]
273 in phase, USBIN ;[30] <- phase
274 rjmp bit4AfterClr ;[31]
275unstuff3c:
276 in phase, USBIN ;[31] <- phase (one cycle too late)
277 andi fix, ~(1 << 3) ;[32]
278 nop2 ;[25]
279 nop2 ;[27]
280bit3IsSet:
281 ifrclr phase, USBMINUS ;[29] check phase only if D- changed
282 lpm ;[30]
283 in phase, USBIN ;[31] <- phase (one cycle too late)
284 ori shift, 1 << 3 ;[32]
285bit4AfterSet:
286 mov data, fix ;[33] undo this move by swapping defines
287#undef fix
288#define fix x1
289#undef data
290#define data x2
291 ifioclr USBIN, USBMINUS ;[34] <--- sample 4
292 rjmp bit4IsClr ;[35]
293 andi shift, ~(7 << 4) ;[36]
294 breq unstuff4s ;[37]
295 in phase, USBIN ;[38] <- phase
296 rjmp bit5AfterSet ;[39]
297unstuff4s:
298 in phase, USBIN ;[39] <- phase (one cycle too late)
299 andi fix, ~(1 << 4) ;[40]
300 nop2 ;[33]
301 nop2 ;[35]
302bit4IsClr:
303 ifrset phase, USBMINUS ;[37] check phase only if D- changed
304 lpm ;[38]
305 in phase, USBIN ;[39] <- phase (one cycle too late)
306 ori shift, 1 << 4 ;[40]
307bit5AfterClr:
308 ser data ;[41]
309 ifioset USBIN, USBMINUS ;[42] <--- sample 5
310 rjmp bit5IsSet ;[43]
311 andi shift, ~(7 << 5) ;[44]
312 breq unstuff5c ;[45]
313 in phase, USBIN ;[46] <- phase
314 rjmp bit6AfterClr ;[47]
315unstuff5c:
316 in phase, USBIN ;[47] <- phase (one cycle too late)
317 andi fix, ~(1 << 5) ;[48]
318 nop2 ;[41]
319 nop2 ;[43]
320bit5IsSet:
321 ifrclr phase, USBMINUS ;[45] check phase only if D- changed
322 lpm ;[46]
323 in phase, USBIN ;[47] <- phase (one cycle too late)
324 ori shift, 1 << 5 ;[48]
325bit6AfterSet:
326 subi cnt, 1 ;[49]
327 brcs jumpToOverflow ;[50]
328 ifioclr USBIN, USBMINUS ;[51] <--- sample 6
329 rjmp bit6IsClr ;[52]
330 andi shift, ~(3 << 6) ;[53]
331 cpi shift, 2 ;[54]
332 in phase, USBIN ;[55] <- phase
333 brlt unstuff6s ;[56]
334 rjmp bit7AfterSet ;[57]
335
336jumpToOverflow:
337 rjmp overflow
338
339unstuff6s:
340 andi fix, ~(1 << 6) ;[50]
341 lpm ;[51]
342bit6IsClr:
343 ifrset phase, USBMINUS ;[54] check phase only if D- changed
344 lpm ;[55]
345 in phase, USBIN ;[56] <- phase (one cycle too late)
346 ori shift, 1 << 6 ;[57]
347 nop ;[58]
348bit7AfterClr:
349 ifioset USBIN, USBMINUS ;[59] <--- sample 7
350 rjmp bit7IsSet ;[60]
351 andi shift, ~(1 << 7) ;[61]
352 cpi shift, 4 ;[62]
353 in phase, USBIN ;[63] <- phase
354 brlt unstuff7c ;[64]
355 rjmp bit0AfterClr ;[65] -> [00] == [67]
356unstuff7c:
357 andi fix, ~(1 << 7) ;[58]
358 nop ;[59]
359 rjmp bit7IsSet ;[60]
360
361bit7IsClr:
362 ifrset phase, USBMINUS ;[62] check phase only if D- changed
363 lpm ;[63]
364 in phase, USBIN ;[64] <- phase (one cycle too late)
365 ori shift, 1 << 7 ;[65]
366 nop ;[66]
367;;;;rjmp bit0AfterClr ; -> [00] == [67] moved block up to save jump
368bit0AfterClr:
369 eor fix, shift ;[00]
370#undef fix
371#define fix x2
372#undef data
373#define data x1 /* we now have result in data, fix is reset to 0xff */
374 ifioset USBIN, USBMINUS ;[01] <--- sample 0
375 rjmp bit0IsSet ;[02]
376 andi shift, ~(7 << 0) ;[03]
377 breq unstuff0c ;[04]
378 in phase, USBIN ;[05] <- phase
379 rjmp bit1AfterClr ;[06]
380unstuff0c:
381 in phase, USBIN ;[06] <- phase (one cycle too late)
382 andi fix, ~(1 << 0) ;[07]
383 ifioclr USBIN, USBMINUS ;[00]
384 ifioset USBIN, USBPLUS ;[01]
385 rjmp bit0IsSet ;[02] executed if first expr false or second true
386 rjmp se0AndStore ;[03] executed only if both bits 0
387bit0IsSet:
388 ifrclr phase, USBMINUS ;[04] check phase only if D- changed
389 lpm ;[05]
390 in phase, USBIN ;[06] <- phase (one cycle too late)
391 ori shift, 1 << 0 ;[07]
392bit1AfterSet:
393 andi shift, ~(7 << 1) ;[08] compensated by "ori shift, 1<<1" if bit1IsClr
394 ifioclr USBIN, USBMINUS ;[09] <--- sample 1
395 rjmp bit1IsClr ;[10]
396 breq unstuff1s ;[11]
397 nop2 ;[12] do not check for SE0 if bit 0 was 1
398 in phase, USBIN ;[14] <- phase (one cycle too late)
399 rjmp bit2AfterSet ;[15]
400unstuff1s:
401 in phase, USBIN ;[13] <- phase
402 andi fix, ~(1 << 1) ;[14]
403 lpm ;[07]
404 nop2 ;[10]
405bit1IsClr:
406 ifrset phase, USBMINUS ;[12] check phase only if D- changed
407 lpm ;[13]
408 in phase, USBIN ;[14] <- phase (one cycle too late)
409 ori shift, 1 << 1 ;[15]
410 nop ;[16]
411bit2AfterClr:
412 ifioset USBIN, USBMINUS ;[17] <--- sample 2
413 rjmp bit2IsSet ;[18]
414 andi shift, ~(7 << 2) ;[19]
415 breq unstuff2c ;[20]
416 in phase, USBIN ;[21] <- phase
417 rjmp bit3AfterClr ;[22]
418unstuff2c:
419 in phase, USBIN ;[22] <- phase (one cycle too late)
420 andi fix, ~(1 << 2) ;[23]
421 nop2 ;[16]
422 nop2 ;[18]
423bit2IsSet:
424 ifrclr phase, USBMINUS ;[20] check phase only if D- changed
425 lpm ;[21]
426 in phase, USBIN ;[22] <- phase (one cycle too late)
427 ori shift, 1 << 2 ;[23]
428bit3AfterSet:
429 st y+, data ;[24]
430entryAfterSet:
431 ifioclr USBIN, USBMINUS ;[26] <--- sample 3
432 rjmp bit3IsClr ;[27]
433 andi shift, ~(7 << 3) ;[28]
434 breq unstuff3s ;[29]
435 in phase, USBIN ;[30] <- phase
436 rjmp bit4AfterSet ;[31]
437unstuff3s:
438 in phase, USBIN ;[31] <- phase (one cycle too late)
439 andi fix, ~(1 << 3) ;[32]
440 nop2 ;[25]
441 nop2 ;[27]
442bit3IsClr:
443 ifrset phase, USBMINUS ;[29] check phase only if D- changed
444 lpm ;[30]
445 in phase, USBIN ;[31] <- phase (one cycle too late)
446 ori shift, 1 << 3 ;[32]
447bit4AfterClr:
448 mov data, fix ;[33] undo this move by swapping defines
449#undef fix
450#define fix x1
451#undef data
452#define data x2
453 ifioset USBIN, USBMINUS ;[34] <--- sample 4
454 rjmp bit4IsSet ;[35]
455 andi shift, ~(7 << 4) ;[36]
456 breq unstuff4c ;[37]
457 in phase, USBIN ;[38] <- phase
458 rjmp bit5AfterClr ;[39]
459unstuff4c:
460 in phase, USBIN ;[39] <- phase (one cycle too late)
461 andi fix, ~(1 << 4) ;[40]
462 nop2 ;[33]
463 nop2 ;[35]
464bit4IsSet:
465 ifrclr phase, USBMINUS ;[37] check phase only if D- changed
466 lpm ;[38]
467 in phase, USBIN ;[39] <- phase (one cycle too late)
468 ori shift, 1 << 4 ;[40]
469bit5AfterSet:
470 ser data ;[41]
471 ifioclr USBIN, USBMINUS ;[42] <--- sample 5
472 rjmp bit5IsClr ;[43]
473 andi shift, ~(7 << 5) ;[44]
474 breq unstuff5s ;[45]
475 in phase, USBIN ;[46] <- phase
476 rjmp bit6AfterSet ;[47]
477unstuff5s:
478 in phase, USBIN ;[47] <- phase (one cycle too late)
479 andi fix, ~(1 << 5) ;[48]
480 nop2 ;[41]
481 nop2 ;[43]
482bit5IsClr:
483 ifrset phase, USBMINUS ;[45] check phase only if D- changed
484 lpm ;[46]
485 in phase, USBIN ;[47] <- phase (one cycle too late)
486 ori shift, 1 << 5 ;[48]
487bit6AfterClr:
488 subi cnt, 1 ;[49]
489 brcs overflow ;[50]
490 ifioset USBIN, USBMINUS ;[51] <--- sample 6
491 rjmp bit6IsSet ;[52]
492 andi shift, ~(3 << 6) ;[53]
493 cpi shift, 2 ;[54]
494 in phase, USBIN ;[55] <- phase
495 brlt unstuff6c ;[56]
496 rjmp bit7AfterClr ;[57]
497unstuff6c:
498 andi fix, ~(1 << 6) ;[50]
499 lpm ;[51]
500bit6IsSet:
501 ifrclr phase, USBMINUS ;[54] check phase only if D- changed
502 lpm ;[55]
503 in phase, USBIN ;[56] <- phase (one cycle too late)
504 ori shift, 1 << 6 ;[57]
505bit7AfterSet:
506 ifioclr USBIN, USBMINUS ;[59] <--- sample 7
507 rjmp bit7IsClr ;[60]
508 andi shift, ~(1 << 7) ;[61]
509 cpi shift, 4 ;[62]
510 in phase, USBIN ;[63] <- phase
511 brlt unstuff7s ;[64]
512 rjmp bit0AfterSet ;[65] -> [00] == [67]
513unstuff7s:
514 andi fix, ~(1 << 7) ;[58]
515 nop ;[59]
516 rjmp bit7IsClr ;[60]
517
518macro POP_STANDARD ; 14 cycles
519 pop r0
520 pop cnt
521 pop x3
522 pop x2
523 pop x1
524 pop shift
525 pop YH
526 endm
527macro POP_RETI ; 5 cycles
528 pop YL
529 out SREG, YL
530 pop YL
531 endm
532
533#include "asmcommon.inc"
534
535;----------------------------------------------------------------------------
536; Transmitting data
537;----------------------------------------------------------------------------
538
539txByteLoop:
540txBitloop:
541stuffN1Delay: ; [03]
542 ror shift ;[-5] [11] [63]
543 brcc doExorN1 ;[-4] [64]
544 subi x3, 1 ;[-3]
545 brne commonN1 ;[-2]
546 lsl shift ;[-1] compensate ror after rjmp stuffDelay
547 nop ;[00] stuffing consists of just waiting 8 cycles
548 rjmp stuffN1Delay ;[01] after ror, C bit is reliably clear
549
550sendNakAndReti:
551 ldi cnt, USBPID_NAK ;[-19]
552 rjmp sendCntAndReti ;[-18]
553sendAckAndReti:
554 ldi cnt, USBPID_ACK ;[-17]
555sendCntAndReti:
556 mov r0, cnt ;[-16]
557 ldi YL, 0 ;[-15] R0 address is 0
558 ldi YH, 0 ;[-14]
559 ldi cnt, 2 ;[-13]
560; rjmp usbSendAndReti fallthrough
561
562; USB spec says:
563; idle = J
564; J = (D+ = 0), (D- = 1) or USBOUT = 0x01
565; K = (D+ = 1), (D- = 0) or USBOUT = 0x02
566; Spec allows 7.5 bit times from EOP to SOP for replies (= 60 cycles)
567
568;usbSend:
569;pointer to data in 'Y'
570;number of bytes in 'cnt' -- including sync byte
571;uses: x1...x3, shift, cnt, Y [x1 = mirror USBOUT, x2 = USBMASK, x3 = bitstuff cnt]
572;Numbers in brackets are time since first bit of sync pattern is sent (start of instruction)
573usbSendAndReti:
574 in x2, USBDDR ;[-10] 10 cycles until SOP
575 ori x2, USBMASK ;[-9]
576 sbi USBOUT, USBMINUS ;[-8] prepare idle state; D+ and D- must have been 0 (no pullups)
577 out USBDDR, x2 ;[-6] <--- acquire bus
578 in x1, USBOUT ;[-5] port mirror for tx loop
579 ldi shift, 0x40 ;[-4] sync byte is first byte sent (we enter loop after ror)
580 ldi x2, USBMASK ;[-3]
581doExorN1:
582 eor x1, x2 ;[-2] [06] [62]
583 ldi x3, 6 ;[-1] [07] [63]
584commonN1:
585stuffN2Delay:
586 out USBOUT, x1 ;[00] [08] [64] <--- set bit
587 ror shift ;[01]
588 brcc doExorN2 ;[02]
589 subi x3, 1 ;[03]
590 brne commonN2 ;[04]
591 lsl shift ;[05] compensate ror after rjmp stuffDelay
592 rjmp stuffN2Delay ;[06] after ror, C bit is reliably clear
593doExorN2:
594 eor x1, x2 ;[04] [12]
595 ldi x3, 6 ;[05] [13]
596commonN2:
597 nop2 ;[06] [14]
598 subi cnt, 171 ;[08] [16] trick: (3 * 171) & 0xff = 1
599 out USBOUT, x1 ;[09] [17] <--- set bit
600 brcs txBitloop ;[10] [27] [44]
601
602stuff6Delay:
603 ror shift ;[45] [53]
604 brcc doExor6 ;[46]
605 subi x3, 1 ;[47]
606 brne common6 ;[48]
607 lsl shift ;[49] compensate ror after rjmp stuffDelay
608 nop ;[50] stuffing consists of just waiting 8 cycles
609 rjmp stuff6Delay ;[51] after ror, C bit is reliably clear
610doExor6:
611 eor x1, x2 ;[48] [56]
612 ldi x3, 6 ;[49]
613common6:
614stuff7Delay:
615 ror shift ;[50] [58]
616 out USBOUT, x1 ;[51] <--- set bit
617 brcc doExor7 ;[52]
618 subi x3, 1 ;[53]
619 brne common7 ;[54]
620 lsl shift ;[55] compensate ror after rjmp stuffDelay
621 rjmp stuff7Delay ;[56] after ror, C bit is reliably clear
622doExor7:
623 eor x1, x2 ;[54] [62]
624 ldi x3, 6 ;[55]
625common7:
626 ld shift, y+ ;[56]
627 nop ;[58]
628 tst cnt ;[59]
629 out USBOUT, x1 ;[60] [00]<--- set bit
630 brne txByteLoop ;[61] [01]
631;make SE0:
632 cbr x1, USBMASK ;[02] prepare SE0 [spec says EOP may be 15 to 18 cycles]
633 lds x2, usbNewDeviceAddr;[03]
634 lsl x2 ;[05] we compare with left shifted address
635 subi YL, 2 + 0 ;[06] Only assign address on data packets, not ACK/NAK in r0
636 sbci YH, 0 ;[07]
637 out USBOUT, x1 ;[00] <-- out SE0 -- from now 2 bits = 16 cycles until bus idle
638;2006-03-06: moved transfer of new address to usbDeviceAddr from C-Code to asm:
639;set address only after data packet was sent, not after handshake
640 breq skipAddrAssign ;[01]
641 sts usbDeviceAddr, x2 ; if not skipped: SE0 is one cycle longer
642skipAddrAssign:
643;end of usbDeviceAddress transfer
644 ldi x2, 1<<USB_INTR_PENDING_BIT;[03] int0 occurred during TX -- clear pending flag
645 USB_STORE_PENDING(x2) ;[04]
646 ori x1, USBIDLE ;[05]
647 in x2, USBDDR ;[06]
648 cbr x2, USBMASK ;[07] set both pins to input
649 mov x3, x1 ;[08]
650 cbr x3, USBMASK ;[09] configure no pullup on both pins
651 lpm ;[10]
652 lpm ;[13]
653 out USBOUT, x1 ;[16] <-- out J (idle) -- end of SE0 (EOP signal)
654 out USBDDR, x2 ;[17] <-- release bus now
655 out USBOUT, x3 ;[18] <-- ensure no pull-up resistors are active
656 rjmp doReturn
657
658
659
660/*****************************************************************************
661The following PHP script generates a code skeleton for the receiver routine:
662
663<?php
664
665function printCmdBuffer($thisBit)
666{
667global $cycle;
668
669 $nextBit = ($thisBit + 1) % 8;
670 $s = ob_get_contents();
671 ob_end_clean();
672 $s = str_replace("#", $thisBit, $s);
673 $s = str_replace("@", $nextBit, $s);
674 $lines = explode("\n", $s);
675 for($i = 0; $i < count($lines); $i++){
676 $s = $lines[$i];
677 if(ereg("\\[([0-9-][0-9])\\]", $s, $regs)){
678 $c = $cycle + (int)$regs[1];
679 $s = ereg_replace("\\[[0-9-][0-9]\\]", sprintf("[%02d]", $c), $s);
680 }
681 if(strlen($s) > 0)
682 echo "$s\n";
683 }
684}
685
686function printBit($isAfterSet, $bitNum)
687{
688 ob_start();
689 if($isAfterSet){
690?>
691 ifioclr USBIN, USBMINUS ;[00] <--- sample
692 rjmp bit#IsClr ;[01]
693 andi shift, ~(7 << #) ;[02]
694 breq unstuff#s ;[03]
695 in phase, USBIN ;[04] <- phase
696 rjmp bit@AfterSet ;[05]
697unstuff#s:
698 in phase, USBIN ;[05] <- phase (one cycle too late)
699 andi fix, ~(1 << #) ;[06]
700 nop2 ;[-1]
701 nop2 ;[01]
702bit#IsClr:
703 ifrset phase, USBMINUS ;[03] check phase only if D- changed
704 lpm ;[04]
705 in phase, USBIN ;[05] <- phase (one cycle too late)
706 ori shift, 1 << # ;[06]
707<?php
708 }else{
709?>
710 ifioset USBIN, USBMINUS ;[00] <--- sample
711 rjmp bit#IsSet ;[01]
712 andi shift, ~(7 << #) ;[02]
713 breq unstuff#c ;[03]
714 in phase, USBIN ;[04] <- phase
715 rjmp bit@AfterClr ;[05]
716unstuff#c:
717 in phase, USBIN ;[05] <- phase (one cycle too late)
718 andi fix, ~(1 << #) ;[06]
719 nop2 ;[-1]
720 nop2 ;[01]
721bit#IsSet:
722 ifrclr phase, USBMINUS ;[03] check phase only if D- changed
723 lpm ;[04]
724 in phase, USBIN ;[05] <- phase (one cycle too late)
725 ori shift, 1 << # ;[06]
726<?php
727 }
728 printCmdBuffer($bitNum);
729}
730
731$bitStartCycles = array(1, 9, 17, 26, 34, 42, 51, 59);
732for($i = 0; $i < 16; $i++){
733 $bit = $i % 8;
734 $emitClrCode = ($i + (int)($i / 8)) % 2;
735 $cycle = $bitStartCycles[$bit];
736 if($emitClrCode){
737 printf("bit%dAfterClr:\n", $bit);
738 }else{
739 printf("bit%dAfterSet:\n", $bit);
740 }
741 ob_start();
742 echo " ***** ;[-1]\n";
743 printCmdBuffer($bit);
744 printBit(!$emitClrCode, $bit);
745 if($i == 7)
746 echo "\n";
747}
748
749?>
750*****************************************************************************/
diff --git a/tmk_core/protocol/vusb/usbdrv/usbdrvasm15.inc b/tmk_core/protocol/vusb/usbdrv/usbdrvasm15.inc
deleted file mode 100644
index 401b7f8ff..000000000
--- a/tmk_core/protocol/vusb/usbdrv/usbdrvasm15.inc
+++ /dev/null
@@ -1,423 +0,0 @@
1/* Name: usbdrvasm15.inc
2 * Project: V-USB, virtual USB port for Atmel's(r) AVR(r) microcontrollers
3 * Author: contributed by V. Bosch
4 * Creation Date: 2007-08-06
5 * Tabsize: 4
6 * Copyright: (c) 2007 by OBJECTIVE DEVELOPMENT Software GmbH
7 * License: GNU GPL v2 (see License.txt), GNU GPL v3 or proprietary (CommercialLicense.txt)
8 * Revision: $Id: usbdrvasm15.inc 740 2009-04-13 18:23:31Z cs $
9 */
10
11/* Do not link this file! Link usbdrvasm.S instead, which includes the
12 * appropriate implementation!
13 */
14
15/*
16General Description:
17This file is the 15 MHz version of the asssembler part of the USB driver. It
18requires a 15 MHz crystal (not a ceramic resonator and not a calibrated RC
19oscillator).
20
21See usbdrv.h for a description of the entire driver.
22
23Since almost all of this code is timing critical, don't change unless you
24really know what you are doing! Many parts require not only a maximum number
25of CPU cycles, but even an exact number of cycles!
26*/
27
28;max stack usage: [ret(2), YL, SREG, YH, bitcnt, shift, x1, x2, x3, x4, cnt] = 12 bytes
29;nominal frequency: 15 MHz -> 10.0 cycles per bit, 80.0 cycles per byte
30; Numbers in brackets are clocks counted from center of last sync bit
31; when instruction starts
32
33;----------------------------------------------------------------------------
34; order of registers pushed:
35; YL, SREG [sofError] YH, shift, x1, x2, x3, bitcnt, cnt, x4
36;----------------------------------------------------------------------------
37USB_INTR_VECTOR:
38 push YL ;2 push only what is necessary to sync with edge ASAP
39 in YL, SREG ;1
40 push YL ;2
41;----------------------------------------------------------------------------
42; Synchronize with sync pattern:
43;
44; sync byte (D-) pattern LSb to MSb: 01010100 [1 = idle = J, 0 = K]
45; sync up with J to K edge during sync pattern -- use fastest possible loops
46;The first part waits at most 1 bit long since we must be in sync pattern.
47;YL is guarenteed to be < 0x80 because I flag is clear. When we jump to
48;waitForJ, ensure that this prerequisite is met.
49waitForJ:
50 inc YL
51 sbis USBIN, USBMINUS
52 brne waitForJ ; just make sure we have ANY timeout
53;-------------------------------------------------------------------------------
54; The following code results in a sampling window of < 1/4 bit
55; which meets the spec.
56;-------------------------------------------------------------------------------
57waitForK: ;-
58 sbis USBIN, USBMINUS ;1 [00] <-- sample
59 rjmp foundK ;2 [01]
60 sbis USBIN, USBMINUS ; <-- sample
61 rjmp foundK
62 sbis USBIN, USBMINUS ; <-- sample
63 rjmp foundK
64 sbis USBIN, USBMINUS ; <-- sample
65 rjmp foundK
66 sbis USBIN, USBMINUS ; <-- sample
67 rjmp foundK
68 sbis USBIN, USBMINUS ; <-- sample
69 rjmp foundK
70#if USB_COUNT_SOF
71 lds YL, usbSofCount
72 inc YL
73 sts usbSofCount, YL
74#endif /* USB_COUNT_SOF */
75#ifdef USB_SOF_HOOK
76 USB_SOF_HOOK
77#endif
78 rjmp sofError
79;------------------------------------------------------------------------------
80; {3, 5} after falling D- edge, average delay: 4 cycles [we want 5 for
81; center sampling]
82; we have 1 bit time for setup purposes, then sample again.
83; Numbers in brackets are cycles from center of first sync (double K)
84; bit after the instruction
85;------------------------------------------------------------------------------
86foundK: ;- [02]
87 lds YL, usbInputBufOffset;2 [03+04] tx loop
88 push YH ;2 [05+06]
89 clr YH ;1 [07]
90 subi YL, lo8(-(usbRxBuf)) ;1 [08] [rx loop init]
91 sbci YH, hi8(-(usbRxBuf)) ;1 [09] [rx loop init]
92 push shift ;2 [10+11]
93 ser shift ;1 [12]
94 sbis USBIN, USBMINUS ;1 [-1] [13] <--sample:we want two bits K (sample 1 cycle too early)
95 rjmp haveTwoBitsK ;2 [00] [14]
96 pop shift ;2 [15+16] undo the push from before
97 pop YH ;2 [17+18] undo the push from before
98 rjmp waitForK ;2 [19+20] this was not the end of sync, retry
99; The entire loop from waitForK until rjmp waitForK above must not exceed two
100; bit times (= 20 cycles).
101
102;----------------------------------------------------------------------------
103; push more registers and initialize values while we sample the first bits:
104;----------------------------------------------------------------------------
105haveTwoBitsK: ;- [01]
106 push x1 ;2 [02+03]
107 push x2 ;2 [04+05]
108 push x3 ;2 [06+07]
109 push bitcnt ;2 [08+09]
110 in x1, USBIN ;1 [00] [10] <-- sample bit 0
111 bst x1, USBMINUS ;1 [01]
112 bld shift, 0 ;1 [02]
113 push cnt ;2 [03+04]
114 ldi cnt, USB_BUFSIZE ;1 [05]
115 push x4 ;2 [06+07] tx loop
116 rjmp rxLoop ;2 [08]
117;----------------------------------------------------------------------------
118; Receiver loop (numbers in brackets are cycles within byte after instr)
119;----------------------------------------------------------------------------
120unstuff0: ;- [07] (branch taken)
121 andi x3, ~0x01 ;1 [08]
122 mov x1, x2 ;1 [09] x2 contains last sampled (stuffed) bit
123 in x2, USBIN ;1 [00] [10] <-- sample bit 1 again
124 andi x2, USBMASK ;1 [01]
125 breq se0Hop ;1 [02] SE0 check for bit 1
126 ori shift, 0x01 ;1 [03] 0b00000001
127 nop ;1 [04]
128 rjmp didUnstuff0 ;2 [05]
129;-----------------------------------------------------
130unstuff1: ;- [05] (branch taken)
131 mov x2, x1 ;1 [06] x1 contains last sampled (stuffed) bit
132 andi x3, ~0x02 ;1 [07]
133 ori shift, 0x02 ;1 [08] 0b00000010
134 nop ;1 [09]
135 in x1, USBIN ;1 [00] [10] <-- sample bit 2 again
136 andi x1, USBMASK ;1 [01]
137 breq se0Hop ;1 [02] SE0 check for bit 2
138 rjmp didUnstuff1 ;2 [03]
139;-----------------------------------------------------
140unstuff2: ;- [05] (branch taken)
141 andi x3, ~0x04 ;1 [06]
142 ori shift, 0x04 ;1 [07] 0b00000100
143 mov x1, x2 ;1 [08] x2 contains last sampled (stuffed) bit
144 nop ;1 [09]
145 in x2, USBIN ;1 [00] [10] <-- sample bit 3
146 andi x2, USBMASK ;1 [01]
147 breq se0Hop ;1 [02] SE0 check for bit 3
148 rjmp didUnstuff2 ;2 [03]
149;-----------------------------------------------------
150unstuff3: ;- [00] [10] (branch taken)
151 in x2, USBIN ;1 [01] [11] <-- sample stuffed bit 3 one cycle too late
152 andi x2, USBMASK ;1 [02]
153 breq se0Hop ;1 [03] SE0 check for stuffed bit 3
154 andi x3, ~0x08 ;1 [04]
155 ori shift, 0x08 ;1 [05] 0b00001000
156 rjmp didUnstuff3 ;2 [06]
157;----------------------------------------------------------------------------
158; extra jobs done during bit interval:
159;
160; bit 0: store, clear [SE0 is unreliable here due to bit dribbling in hubs],
161; overflow check, jump to the head of rxLoop
162; bit 1: SE0 check
163; bit 2: SE0 check, recovery from delay [bit 0 tasks took too long]
164; bit 3: SE0 check, recovery from delay [bit 0 tasks took too long]
165; bit 4: SE0 check, none
166; bit 5: SE0 check, none
167; bit 6: SE0 check, none
168; bit 7: SE0 check, reconstruct: x3 is 0 at bit locations we changed, 1 at others
169;----------------------------------------------------------------------------
170rxLoop: ;- [09]
171 in x2, USBIN ;1 [00] [10] <-- sample bit 1 (or possibly bit 0 stuffed)
172 andi x2, USBMASK ;1 [01]
173 brne SkipSe0Hop ;1 [02]
174se0Hop: ;- [02]
175 rjmp se0 ;2 [03] SE0 check for bit 1
176SkipSe0Hop: ;- [03]
177 ser x3 ;1 [04]
178 andi shift, 0xf9 ;1 [05] 0b11111001
179 breq unstuff0 ;1 [06]
180didUnstuff0: ;- [06]
181 eor x1, x2 ;1 [07]
182 bst x1, USBMINUS ;1 [08]
183 bld shift, 1 ;1 [09]
184 in x1, USBIN ;1 [00] [10] <-- sample bit 2 (or possibly bit 1 stuffed)
185 andi x1, USBMASK ;1 [01]
186 breq se0Hop ;1 [02] SE0 check for bit 2
187 andi shift, 0xf3 ;1 [03] 0b11110011
188 breq unstuff1 ;1 [04] do remaining work for bit 1
189didUnstuff1: ;- [04]
190 eor x2, x1 ;1 [05]
191 bst x2, USBMINUS ;1 [06]
192 bld shift, 2 ;1 [07]
193 nop2 ;2 [08+09]
194 in x2, USBIN ;1 [00] [10] <-- sample bit 3 (or possibly bit 2 stuffed)
195 andi x2, USBMASK ;1 [01]
196 breq se0Hop ;1 [02] SE0 check for bit 3
197 andi shift, 0xe7 ;1 [03] 0b11100111
198 breq unstuff2 ;1 [04]
199didUnstuff2: ;- [04]
200 eor x1, x2 ;1 [05]
201 bst x1, USBMINUS ;1 [06]
202 bld shift, 3 ;1 [07]
203didUnstuff3: ;- [07]
204 andi shift, 0xcf ;1 [08] 0b11001111
205 breq unstuff3 ;1 [09]
206 in x1, USBIN ;1 [00] [10] <-- sample bit 4
207 andi x1, USBMASK ;1 [01]
208 breq se0Hop ;1 [02] SE0 check for bit 4
209 eor x2, x1 ;1 [03]
210 bst x2, USBMINUS ;1 [04]
211 bld shift, 4 ;1 [05]
212didUnstuff4: ;- [05]
213 andi shift, 0x9f ;1 [06] 0b10011111
214 breq unstuff4 ;1 [07]
215 nop2 ;2 [08+09]
216 in x2, USBIN ;1 [00] [10] <-- sample bit 5
217 andi x2, USBMASK ;1 [01]
218 breq se0 ;1 [02] SE0 check for bit 5
219 eor x1, x2 ;1 [03]
220 bst x1, USBMINUS ;1 [04]
221 bld shift, 5 ;1 [05]
222didUnstuff5: ;- [05]
223 andi shift, 0x3f ;1 [06] 0b00111111
224 breq unstuff5 ;1 [07]
225 nop2 ;2 [08+09]
226 in x1, USBIN ;1 [00] [10] <-- sample bit 6
227 andi x1, USBMASK ;1 [01]
228 breq se0 ;1 [02] SE0 check for bit 6
229 eor x2, x1 ;1 [03]
230 bst x2, USBMINUS ;1 [04]
231 bld shift, 6 ;1 [05]
232didUnstuff6: ;- [05]
233 cpi shift, 0x02 ;1 [06] 0b00000010
234 brlo unstuff6 ;1 [07]
235 nop2 ;2 [08+09]
236 in x2, USBIN ;1 [00] [10] <-- sample bit 7
237 andi x2, USBMASK ;1 [01]
238 breq se0 ;1 [02] SE0 check for bit 7
239 eor x1, x2 ;1 [03]
240 bst x1, USBMINUS ;1 [04]
241 bld shift, 7 ;1 [05]
242didUnstuff7: ;- [05]
243 cpi shift, 0x04 ;1 [06] 0b00000100
244 brlo unstuff7 ;1 [07]
245 eor x3, shift ;1 [08] reconstruct: x3 is 0 at bit locations we changed, 1 at others
246 nop ;1 [09]
247 in x1, USBIN ;1 [00] [10] <-- sample bit 0
248 st y+, x3 ;2 [01+02] store data
249 eor x2, x1 ;1 [03]
250 bst x2, USBMINUS ;1 [04]
251 bld shift, 0 ;1 [05]
252 subi cnt, 1 ;1 [06]
253 brcs overflow ;1 [07]
254 rjmp rxLoop ;2 [08]
255;-----------------------------------------------------
256unstuff4: ;- [08]
257 andi x3, ~0x10 ;1 [09]
258 in x1, USBIN ;1 [00] [10] <-- sample stuffed bit 4
259 andi x1, USBMASK ;1 [01]
260 breq se0 ;1 [02] SE0 check for stuffed bit 4
261 ori shift, 0x10 ;1 [03]
262 rjmp didUnstuff4 ;2 [04]
263;-----------------------------------------------------
264unstuff5: ;- [08]
265 ori shift, 0x20 ;1 [09]
266 in x2, USBIN ;1 [00] [10] <-- sample stuffed bit 5
267 andi x2, USBMASK ;1 [01]
268 breq se0 ;1 [02] SE0 check for stuffed bit 5
269 andi x3, ~0x20 ;1 [03]
270 rjmp didUnstuff5 ;2 [04]
271;-----------------------------------------------------
272unstuff6: ;- [08]
273 andi x3, ~0x40 ;1 [09]
274 in x1, USBIN ;1 [00] [10] <-- sample stuffed bit 6
275 andi x1, USBMASK ;1 [01]
276 breq se0 ;1 [02] SE0 check for stuffed bit 6
277 ori shift, 0x40 ;1 [03]
278 rjmp didUnstuff6 ;2 [04]
279;-----------------------------------------------------
280unstuff7: ;- [08]
281 andi x3, ~0x80 ;1 [09]
282 in x2, USBIN ;1 [00] [10] <-- sample stuffed bit 7
283 andi x2, USBMASK ;1 [01]
284 breq se0 ;1 [02] SE0 check for stuffed bit 7
285 ori shift, 0x80 ;1 [03]
286 rjmp didUnstuff7 ;2 [04]
287
288macro POP_STANDARD ; 16 cycles
289 pop x4
290 pop cnt
291 pop bitcnt
292 pop x3
293 pop x2
294 pop x1
295 pop shift
296 pop YH
297 endm
298macro POP_RETI ; 5 cycles
299 pop YL
300 out SREG, YL
301 pop YL
302 endm
303
304#include "asmcommon.inc"
305
306;---------------------------------------------------------------------------
307; USB spec says:
308; idle = J
309; J = (D+ = 0), (D- = 1)
310; K = (D+ = 1), (D- = 0)
311; Spec allows 7.5 bit times from EOP to SOP for replies
312;---------------------------------------------------------------------------
313bitstuffN: ;- [04]
314 eor x1, x4 ;1 [05]
315 clr x2 ;1 [06]
316 nop ;1 [07]
317 rjmp didStuffN ;1 [08]
318;---------------------------------------------------------------------------
319bitstuff6: ;- [04]
320 eor x1, x4 ;1 [05]
321 clr x2 ;1 [06]
322 rjmp didStuff6 ;1 [07]
323;---------------------------------------------------------------------------
324bitstuff7: ;- [02]
325 eor x1, x4 ;1 [03]
326 clr x2 ;1 [06]
327 nop ;1 [05]
328 rjmp didStuff7 ;1 [06]
329;---------------------------------------------------------------------------
330sendNakAndReti: ;- [-19]
331 ldi x3, USBPID_NAK ;1 [-18]
332 rjmp sendX3AndReti ;1 [-17]
333;---------------------------------------------------------------------------
334sendAckAndReti: ;- [-17]
335 ldi cnt, USBPID_ACK ;1 [-16]
336sendCntAndReti: ;- [-16]
337 mov x3, cnt ;1 [-15]
338sendX3AndReti: ;- [-15]
339 ldi YL, 20 ;1 [-14] x3==r20 address is 20
340 ldi YH, 0 ;1 [-13]
341 ldi cnt, 2 ;1 [-12]
342; rjmp usbSendAndReti fallthrough
343;---------------------------------------------------------------------------
344;usbSend:
345;pointer to data in 'Y'
346;number of bytes in 'cnt' -- including sync byte [range 2 ... 12]
347;uses: x1...x4, btcnt, shift, cnt, Y
348;Numbers in brackets are time since first bit of sync pattern is sent
349;We need not to match the transfer rate exactly because the spec demands
350;only 1.5% precision anyway.
351usbSendAndReti: ;- [-13] 13 cycles until SOP
352 in x2, USBDDR ;1 [-12]
353 ori x2, USBMASK ;1 [-11]
354 sbi USBOUT, USBMINUS ;2 [-09-10] prepare idle state; D+ and D- must have been 0 (no pullups)
355 in x1, USBOUT ;1 [-08] port mirror for tx loop
356 out USBDDR, x2 ;1 [-07] <- acquire bus
357 ; need not init x2 (bitstuff history) because sync starts with 0
358 ldi x4, USBMASK ;1 [-06] exor mask
359 ldi shift, 0x80 ;1 [-05] sync byte is first byte sent
360 ldi bitcnt, 6 ;1 [-04]
361txBitLoop: ;- [-04] [06]
362 sbrs shift, 0 ;1 [-03] [07]
363 eor x1, x4 ;1 [-02] [08]
364 ror shift ;1 [-01] [09]
365didStuffN: ;- [09]
366 out USBOUT, x1 ;1 [00] [10] <-- out N
367 ror x2 ;1 [01]
368 cpi x2, 0xfc ;1 [02]
369 brcc bitstuffN ;1 [03]
370 dec bitcnt ;1 [04]
371 brne txBitLoop ;1 [05]
372 sbrs shift, 0 ;1 [06]
373 eor x1, x4 ;1 [07]
374 ror shift ;1 [08]
375didStuff6: ;- [08]
376 nop ;1 [09]
377 out USBOUT, x1 ;1 [00] [10] <-- out 6
378 ror x2 ;1 [01]
379 cpi x2, 0xfc ;1 [02]
380 brcc bitstuff6 ;1 [03]
381 sbrs shift, 0 ;1 [04]
382 eor x1, x4 ;1 [05]
383 ror shift ;1 [06]
384 ror x2 ;1 [07]
385didStuff7: ;- [07]
386 ldi bitcnt, 6 ;1 [08]
387 cpi x2, 0xfc ;1 [09]
388 out USBOUT, x1 ;1 [00] [10] <-- out 7
389 brcc bitstuff7 ;1 [01]
390 ld shift, y+ ;2 [02+03]
391 dec cnt ;1 [04]
392 brne txBitLoop ;1 [05]
393makeSE0:
394 cbr x1, USBMASK ;1 [06] prepare SE0 [spec says EOP may be 19 to 23 cycles]
395 lds x2, usbNewDeviceAddr;2 [07+08]
396 lsl x2 ;1 [09] we compare with left shifted address
397;2006-03-06: moved transfer of new address to usbDeviceAddr from C-Code to asm:
398;set address only after data packet was sent, not after handshake
399 out USBOUT, x1 ;1 [00] [10] <-- out SE0-- from now 2 bits==20 cycl. until bus idle
400 subi YL, 20 + 2 ;1 [01] Only assign address on data packets, not ACK/NAK in x3
401 sbci YH, 0 ;1 [02]
402 breq skipAddrAssign ;1 [03]
403 sts usbDeviceAddr, x2 ;2 [04+05] if not skipped: SE0 is one cycle longer
404;----------------------------------------------------------------------------
405;end of usbDeviceAddress transfer
406skipAddrAssign: ;- [03/04]
407 ldi x2, 1<<USB_INTR_PENDING_BIT ;1 [05] int0 occurred during TX -- clear pending flag
408 USB_STORE_PENDING(x2) ;1 [06]
409 ori x1, USBIDLE ;1 [07]
410 in x2, USBDDR ;1 [08]
411 cbr x2, USBMASK ;1 [09] set both pins to input
412 mov x3, x1 ;1 [10]
413 cbr x3, USBMASK ;1 [11] configure no pullup on both pins
414 ldi x4, 3 ;1 [12]
415se0Delay: ;- [12] [15]
416 dec x4 ;1 [13] [16]
417 brne se0Delay ;1 [14] [17]
418 nop2 ;2 [18+19]
419 out USBOUT, x1 ;1 [20] <--out J (idle) -- end of SE0 (EOP sig.)
420 out USBDDR, x2 ;1 [21] <--release bus now
421 out USBOUT, x3 ;1 [22] <--ensure no pull-up resistors are active
422 rjmp doReturn ;1 [23]
423;---------------------------------------------------------------------------
diff --git a/tmk_core/protocol/vusb/usbdrv/usbdrvasm16.inc b/tmk_core/protocol/vusb/usbdrv/usbdrvasm16.inc
deleted file mode 100644
index 207b6e48a..000000000
--- a/tmk_core/protocol/vusb/usbdrv/usbdrvasm16.inc
+++ /dev/null
@@ -1,346 +0,0 @@
1/* Name: usbdrvasm16.inc
2 * Project: V-USB, virtual USB port for Atmel's(r) AVR(r) microcontrollers
3 * Author: Christian Starkjohann
4 * Creation Date: 2007-06-15
5 * Tabsize: 4
6 * Copyright: (c) 2007 by OBJECTIVE DEVELOPMENT Software GmbH
7 * License: GNU GPL v2 (see License.txt), GNU GPL v3 or proprietary (CommercialLicense.txt)
8 * Revision: $Id: usbdrvasm16.inc 760 2009-08-09 18:59:43Z cs $
9 */
10
11/* Do not link this file! Link usbdrvasm.S instead, which includes the
12 * appropriate implementation!
13 */
14
15/*
16General Description:
17This file is the 16 MHz version of the asssembler part of the USB driver. It
18requires a 16 MHz crystal (not a ceramic resonator and not a calibrated RC
19oscillator).
20
21See usbdrv.h for a description of the entire driver.
22
23Since almost all of this code is timing critical, don't change unless you
24really know what you are doing! Many parts require not only a maximum number
25of CPU cycles, but even an exact number of cycles!
26*/
27
28;max stack usage: [ret(2), YL, SREG, YH, bitcnt, shift, x1, x2, x3, x4, cnt] = 12 bytes
29;nominal frequency: 16 MHz -> 10.6666666 cycles per bit, 85.333333333 cycles per byte
30; Numbers in brackets are clocks counted from center of last sync bit
31; when instruction starts
32
33USB_INTR_VECTOR:
34;order of registers pushed: YL, SREG YH, [sofError], bitcnt, shift, x1, x2, x3, x4, cnt
35 push YL ;[-25] push only what is necessary to sync with edge ASAP
36 in YL, SREG ;[-23]
37 push YL ;[-22]
38 push YH ;[-20]
39;----------------------------------------------------------------------------
40; Synchronize with sync pattern:
41;----------------------------------------------------------------------------
42;sync byte (D-) pattern LSb to MSb: 01010100 [1 = idle = J, 0 = K]
43;sync up with J to K edge during sync pattern -- use fastest possible loops
44;The first part waits at most 1 bit long since we must be in sync pattern.
45;YL is guarenteed to be < 0x80 because I flag is clear. When we jump to
46;waitForJ, ensure that this prerequisite is met.
47waitForJ:
48 inc YL
49 sbis USBIN, USBMINUS
50 brne waitForJ ; just make sure we have ANY timeout
51waitForK:
52;The following code results in a sampling window of < 1/4 bit which meets the spec.
53 sbis USBIN, USBMINUS ;[-15]
54 rjmp foundK ;[-14]
55 sbis USBIN, USBMINUS
56 rjmp foundK
57 sbis USBIN, USBMINUS
58 rjmp foundK
59 sbis USBIN, USBMINUS
60 rjmp foundK
61 sbis USBIN, USBMINUS
62 rjmp foundK
63 sbis USBIN, USBMINUS
64 rjmp foundK
65#if USB_COUNT_SOF
66 lds YL, usbSofCount
67 inc YL
68 sts usbSofCount, YL
69#endif /* USB_COUNT_SOF */
70#ifdef USB_SOF_HOOK
71 USB_SOF_HOOK
72#endif
73 rjmp sofError
74foundK: ;[-12]
75;{3, 5} after falling D- edge, average delay: 4 cycles [we want 5 for center sampling]
76;we have 1 bit time for setup purposes, then sample again. Numbers in brackets
77;are cycles from center of first sync (double K) bit after the instruction
78 push bitcnt ;[-12]
79; [---] ;[-11]
80 lds YL, usbInputBufOffset;[-10]
81; [---] ;[-9]
82 clr YH ;[-8]
83 subi YL, lo8(-(usbRxBuf));[-7] [rx loop init]
84 sbci YH, hi8(-(usbRxBuf));[-6] [rx loop init]
85 push shift ;[-5]
86; [---] ;[-4]
87 ldi bitcnt, 0x55 ;[-3] [rx loop init]
88 sbis USBIN, USBMINUS ;[-2] we want two bits K (sample 2 cycles too early)
89 rjmp haveTwoBitsK ;[-1]
90 pop shift ;[0] undo the push from before
91 pop bitcnt ;[2] undo the push from before
92 rjmp waitForK ;[4] this was not the end of sync, retry
93; The entire loop from waitForK until rjmp waitForK above must not exceed two
94; bit times (= 21 cycles).
95
96;----------------------------------------------------------------------------
97; push more registers and initialize values while we sample the first bits:
98;----------------------------------------------------------------------------
99haveTwoBitsK:
100 push x1 ;[1]
101 push x2 ;[3]
102 push x3 ;[5]
103 ldi shift, 0 ;[7]
104 ldi x3, 1<<4 ;[8] [rx loop init] first sample is inverse bit, compensate that
105 push x4 ;[9] == leap
106
107 in x1, USBIN ;[11] <-- sample bit 0
108 andi x1, USBMASK ;[12]
109 bst x1, USBMINUS ;[13]
110 bld shift, 7 ;[14]
111 push cnt ;[15]
112 ldi leap, 0 ;[17] [rx loop init]
113 ldi cnt, USB_BUFSIZE;[18] [rx loop init]
114 rjmp rxbit1 ;[19] arrives at [21]
115
116;----------------------------------------------------------------------------
117; Receiver loop (numbers in brackets are cycles within byte after instr)
118;----------------------------------------------------------------------------
119
120; duration of unstuffing code should be 10.66666667 cycles. We adjust "leap"
121; accordingly to approximate this value in the long run.
122
123unstuff6:
124 andi x2, USBMASK ;[03]
125 ori x3, 1<<6 ;[04] will not be shifted any more
126 andi shift, ~0x80;[05]
127 mov x1, x2 ;[06] sampled bit 7 is actually re-sampled bit 6
128 subi leap, -1 ;[07] total duration = 11 bits -> subtract 1/3
129 rjmp didUnstuff6 ;[08]
130
131unstuff7:
132 ori x3, 1<<7 ;[09] will not be shifted any more
133 in x2, USBIN ;[00] [10] re-sample bit 7
134 andi x2, USBMASK ;[01]
135 andi shift, ~0x80;[02]
136 subi leap, 2 ;[03] total duration = 10 bits -> add 1/3
137 rjmp didUnstuff7 ;[04]
138
139unstuffEven:
140 ori x3, 1<<6 ;[09] will be shifted right 6 times for bit 0
141 in x1, USBIN ;[00] [10]
142 andi shift, ~0x80;[01]
143 andi x1, USBMASK ;[02]
144 breq se0 ;[03]
145 subi leap, -1 ;[04] total duration = 11 bits -> subtract 1/3
146 nop2 ;[05]
147 rjmp didUnstuffE ;[06]
148
149unstuffOdd:
150 ori x3, 1<<5 ;[09] will be shifted right 4 times for bit 1
151 in x2, USBIN ;[00] [10]
152 andi shift, ~0x80;[01]
153 andi x2, USBMASK ;[02]
154 breq se0 ;[03]
155 subi leap, -1 ;[04] total duration = 11 bits -> subtract 1/3
156 nop2 ;[05]
157 rjmp didUnstuffO ;[06]
158
159rxByteLoop:
160 andi x1, USBMASK ;[03]
161 eor x2, x1 ;[04]
162 subi leap, 1 ;[05]
163 brpl skipLeap ;[06]
164 subi leap, -3 ;1 one leap cycle every 3rd byte -> 85 + 1/3 cycles per byte
165 nop ;1
166skipLeap:
167 subi x2, 1 ;[08]
168 ror shift ;[09]
169didUnstuff6:
170 cpi shift, 0xfc ;[10]
171 in x2, USBIN ;[00] [11] <-- sample bit 7
172 brcc unstuff6 ;[01]
173 andi x2, USBMASK ;[02]
174 eor x1, x2 ;[03]
175 subi x1, 1 ;[04]
176 ror shift ;[05]
177didUnstuff7:
178 cpi shift, 0xfc ;[06]
179 brcc unstuff7 ;[07]
180 eor x3, shift ;[08] reconstruct: x3 is 1 at bit locations we changed, 0 at others
181 st y+, x3 ;[09] store data
182rxBitLoop:
183 in x1, USBIN ;[00] [11] <-- sample bit 0/2/4
184 andi x1, USBMASK ;[01]
185 eor x2, x1 ;[02]
186 andi x3, 0x3f ;[03] topmost two bits reserved for 6 and 7
187 subi x2, 1 ;[04]
188 ror shift ;[05]
189 cpi shift, 0xfc ;[06]
190 brcc unstuffEven ;[07]
191didUnstuffE:
192 lsr x3 ;[08]
193 lsr x3 ;[09]
194rxbit1:
195 in x2, USBIN ;[00] [10] <-- sample bit 1/3/5
196 andi x2, USBMASK ;[01]
197 breq se0 ;[02]
198 eor x1, x2 ;[03]
199 subi x1, 1 ;[04]
200 ror shift ;[05]
201 cpi shift, 0xfc ;[06]
202 brcc unstuffOdd ;[07]
203didUnstuffO:
204 subi bitcnt, 0xab;[08] == addi 0x55, 0x55 = 0x100/3
205 brcs rxBitLoop ;[09]
206
207 subi cnt, 1 ;[10]
208 in x1, USBIN ;[00] [11] <-- sample bit 6
209 brcc rxByteLoop ;[01]
210 rjmp overflow
211
212macro POP_STANDARD ; 14 cycles
213 pop cnt
214 pop x4
215 pop x3
216 pop x2
217 pop x1
218 pop shift
219 pop bitcnt
220 endm
221macro POP_RETI ; 7 cycles
222 pop YH
223 pop YL
224 out SREG, YL
225 pop YL
226 endm
227
228#include "asmcommon.inc"
229
230; USB spec says:
231; idle = J
232; J = (D+ = 0), (D- = 1)
233; K = (D+ = 1), (D- = 0)
234; Spec allows 7.5 bit times from EOP to SOP for replies
235
236bitstuffN:
237 eor x1, x4 ;[5]
238 ldi x2, 0 ;[6]
239 nop2 ;[7]
240 nop ;[9]
241 out USBOUT, x1 ;[10] <-- out
242 rjmp didStuffN ;[0]
243
244bitstuff6:
245 eor x1, x4 ;[5]
246 ldi x2, 0 ;[6] Carry is zero due to brcc
247 rol shift ;[7] compensate for ror shift at branch destination
248 rjmp didStuff6 ;[8]
249
250bitstuff7:
251 ldi x2, 0 ;[2] Carry is zero due to brcc
252 rjmp didStuff7 ;[3]
253
254
255sendNakAndReti:
256 ldi x3, USBPID_NAK ;[-18]
257 rjmp sendX3AndReti ;[-17]
258sendAckAndReti:
259 ldi cnt, USBPID_ACK ;[-17]
260sendCntAndReti:
261 mov x3, cnt ;[-16]
262sendX3AndReti:
263 ldi YL, 20 ;[-15] x3==r20 address is 20
264 ldi YH, 0 ;[-14]
265 ldi cnt, 2 ;[-13]
266; rjmp usbSendAndReti fallthrough
267
268;usbSend:
269;pointer to data in 'Y'
270;number of bytes in 'cnt' -- including sync byte [range 2 ... 12]
271;uses: x1...x4, btcnt, shift, cnt, Y
272;Numbers in brackets are time since first bit of sync pattern is sent
273;We don't match the transfer rate exactly (don't insert leap cycles every third
274;byte) because the spec demands only 1.5% precision anyway.
275usbSendAndReti: ; 12 cycles until SOP
276 in x2, USBDDR ;[-12]
277 ori x2, USBMASK ;[-11]
278 sbi USBOUT, USBMINUS;[-10] prepare idle state; D+ and D- must have been 0 (no pullups)
279 in x1, USBOUT ;[-8] port mirror for tx loop
280 out USBDDR, x2 ;[-7] <- acquire bus
281; need not init x2 (bitstuff history) because sync starts with 0
282 ldi x4, USBMASK ;[-6] exor mask
283 ldi shift, 0x80 ;[-5] sync byte is first byte sent
284txByteLoop:
285 ldi bitcnt, 0x35 ;[-4] [6] binary 0011 0101
286txBitLoop:
287 sbrs shift, 0 ;[-3] [7]
288 eor x1, x4 ;[-2] [8]
289 out USBOUT, x1 ;[-1] [9] <-- out N
290 ror shift ;[0] [10]
291 ror x2 ;[1]
292didStuffN:
293 cpi x2, 0xfc ;[2]
294 brcc bitstuffN ;[3]
295 lsr bitcnt ;[4]
296 brcc txBitLoop ;[5]
297 brne txBitLoop ;[6]
298
299 sbrs shift, 0 ;[7]
300 eor x1, x4 ;[8]
301didStuff6:
302 out USBOUT, x1 ;[-1] [9] <-- out 6
303 ror shift ;[0] [10]
304 ror x2 ;[1]
305 cpi x2, 0xfc ;[2]
306 brcc bitstuff6 ;[3]
307 ror shift ;[4]
308didStuff7:
309 ror x2 ;[5]
310 sbrs x2, 7 ;[6]
311 eor x1, x4 ;[7]
312 nop ;[8]
313 cpi x2, 0xfc ;[9]
314 out USBOUT, x1 ;[-1][10] <-- out 7
315 brcc bitstuff7 ;[0] [11]
316 ld shift, y+ ;[1]
317 dec cnt ;[3]
318 brne txByteLoop ;[4]
319;make SE0:
320 cbr x1, USBMASK ;[5] prepare SE0 [spec says EOP may be 21 to 25 cycles]
321 lds x2, usbNewDeviceAddr;[6]
322 lsl x2 ;[8] we compare with left shifted address
323 subi YL, 20 + 2 ;[9] Only assign address on data packets, not ACK/NAK in x3
324 sbci YH, 0 ;[10]
325 out USBOUT, x1 ;[11] <-- out SE0 -- from now 2 bits = 22 cycles until bus idle
326;2006-03-06: moved transfer of new address to usbDeviceAddr from C-Code to asm:
327;set address only after data packet was sent, not after handshake
328 breq skipAddrAssign ;[0]
329 sts usbDeviceAddr, x2; if not skipped: SE0 is one cycle longer
330skipAddrAssign:
331;end of usbDeviceAddress transfer
332 ldi x2, 1<<USB_INTR_PENDING_BIT;[2] int0 occurred during TX -- clear pending flag
333 USB_STORE_PENDING(x2) ;[3]
334 ori x1, USBIDLE ;[4]
335 in x2, USBDDR ;[5]
336 cbr x2, USBMASK ;[6] set both pins to input
337 mov x3, x1 ;[7]
338 cbr x3, USBMASK ;[8] configure no pullup on both pins
339 ldi x4, 4 ;[9]
340se0Delay:
341 dec x4 ;[10] [13] [16] [19]
342 brne se0Delay ;[11] [14] [17] [20]
343 out USBOUT, x1 ;[21] <-- out J (idle) -- end of SE0 (EOP signal)
344 out USBDDR, x2 ;[22] <-- release bus now
345 out USBOUT, x3 ;[23] <-- ensure no pull-up resistors are active
346 rjmp doReturn
diff --git a/tmk_core/protocol/vusb/usbdrv/usbdrvasm165.inc b/tmk_core/protocol/vusb/usbdrv/usbdrvasm165.inc
deleted file mode 100644
index 79b3c61cf..000000000
--- a/tmk_core/protocol/vusb/usbdrv/usbdrvasm165.inc
+++ /dev/null
@@ -1,453 +0,0 @@
1/* Name: usbdrvasm165.inc
2 * Project: V-USB, virtual USB port for Atmel's(r) AVR(r) microcontrollers
3 * Author: Christian Starkjohann
4 * Creation Date: 2007-04-22
5 * Tabsize: 4
6 * Copyright: (c) 2007 by OBJECTIVE DEVELOPMENT Software GmbH
7 * License: GNU GPL v2 (see License.txt), GNU GPL v3 or proprietary (CommercialLicense.txt)
8 * Revision: $Id: usbdrvasm165.inc 740 2009-04-13 18:23:31Z cs $
9 */
10
11/* Do not link this file! Link usbdrvasm.S instead, which includes the
12 * appropriate implementation!
13 */
14
15/*
16General Description:
17This file is the 16.5 MHz version of the USB driver. It is intended for the
18ATTiny45 and similar controllers running on 16.5 MHz internal RC oscillator.
19This version contains a phase locked loop in the receiver routine to cope with
20slight clock rate deviations of up to +/- 1%.
21
22See usbdrv.h for a description of the entire driver.
23
24Since almost all of this code is timing critical, don't change unless you
25really know what you are doing! Many parts require not only a maximum number
26of CPU cycles, but even an exact number of cycles!
27*/
28
29;Software-receiver engine. Strict timing! Don't change unless you can preserve timing!
30;interrupt response time: 4 cycles + insn running = 7 max if interrupts always enabled
31;max allowable interrupt latency: 59 cycles -> max 52 cycles interrupt disable
32;max stack usage: [ret(2), r0, SREG, YL, YH, shift, x1, x2, x3, x4, cnt] = 12 bytes
33;nominal frequency: 16.5 MHz -> 11 cycles per bit
34; 16.3125 MHz < F_CPU < 16.6875 MHz (+/- 1.1%)
35; Numbers in brackets are clocks counted from center of last sync bit
36; when instruction starts
37
38
39USB_INTR_VECTOR:
40;order of registers pushed: YL, SREG [sofError], r0, YH, shift, x1, x2, x3, x4, cnt
41 push YL ;[-23] push only what is necessary to sync with edge ASAP
42 in YL, SREG ;[-21]
43 push YL ;[-20]
44;----------------------------------------------------------------------------
45; Synchronize with sync pattern:
46;----------------------------------------------------------------------------
47;sync byte (D-) pattern LSb to MSb: 01010100 [1 = idle = J, 0 = K]
48;sync up with J to K edge during sync pattern -- use fastest possible loops
49;The first part waits at most 1 bit long since we must be in sync pattern.
50;YL is guarenteed to be < 0x80 because I flag is clear. When we jump to
51;waitForJ, ensure that this prerequisite is met.
52waitForJ:
53 inc YL
54 sbis USBIN, USBMINUS
55 brne waitForJ ; just make sure we have ANY timeout
56waitForK:
57;The following code results in a sampling window of < 1/4 bit which meets the spec.
58 sbis USBIN, USBMINUS ;[-15]
59 rjmp foundK ;[-14]
60 sbis USBIN, USBMINUS
61 rjmp foundK
62 sbis USBIN, USBMINUS
63 rjmp foundK
64 sbis USBIN, USBMINUS
65 rjmp foundK
66 sbis USBIN, USBMINUS
67 rjmp foundK
68 sbis USBIN, USBMINUS
69 rjmp foundK
70#if USB_COUNT_SOF
71 lds YL, usbSofCount
72 inc YL
73 sts usbSofCount, YL
74#endif /* USB_COUNT_SOF */
75#ifdef USB_SOF_HOOK
76 USB_SOF_HOOK
77#endif
78 rjmp sofError
79foundK: ;[-12]
80;{3, 5} after falling D- edge, average delay: 4 cycles [we want 5 for center sampling]
81;we have 1 bit time for setup purposes, then sample again. Numbers in brackets
82;are cycles from center of first sync (double K) bit after the instruction
83 push r0 ;[-12]
84; [---] ;[-11]
85 push YH ;[-10]
86; [---] ;[-9]
87 lds YL, usbInputBufOffset;[-8]
88; [---] ;[-7]
89 clr YH ;[-6]
90 subi YL, lo8(-(usbRxBuf));[-5] [rx loop init]
91 sbci YH, hi8(-(usbRxBuf));[-4] [rx loop init]
92 mov r0, x2 ;[-3] [rx loop init]
93 sbis USBIN, USBMINUS ;[-2] we want two bits K (sample 2 cycles too early)
94 rjmp haveTwoBitsK ;[-1]
95 pop YH ;[0] undo the pushes from before
96 pop r0 ;[2]
97 rjmp waitForK ;[4] this was not the end of sync, retry
98; The entire loop from waitForK until rjmp waitForK above must not exceed two
99; bit times (= 22 cycles).
100
101;----------------------------------------------------------------------------
102; push more registers and initialize values while we sample the first bits:
103;----------------------------------------------------------------------------
104haveTwoBitsK: ;[1]
105 push shift ;[1]
106 push x1 ;[3]
107 push x2 ;[5]
108 push x3 ;[7]
109 ldi shift, 0xff ;[9] [rx loop init]
110 ori x3, 0xff ;[10] [rx loop init] == ser x3, clear zero flag
111
112 in x1, USBIN ;[11] <-- sample bit 0
113 bst x1, USBMINUS ;[12]
114 bld shift, 0 ;[13]
115 push x4 ;[14] == phase
116; [---] ;[15]
117 push cnt ;[16]
118; [---] ;[17]
119 ldi phase, 0 ;[18] [rx loop init]
120 ldi cnt, USB_BUFSIZE;[19] [rx loop init]
121 rjmp rxbit1 ;[20]
122; [---] ;[21]
123
124;----------------------------------------------------------------------------
125; Receiver loop (numbers in brackets are cycles within byte after instr)
126;----------------------------------------------------------------------------
127/*
128byte oriented operations done during loop:
129bit 0: store data
130bit 1: SE0 check
131bit 2: overflow check
132bit 3: catch up
133bit 4: rjmp to achieve conditional jump range
134bit 5: PLL
135bit 6: catch up
136bit 7: jump, fixup bitstuff
137; 87 [+ 2] cycles
138------------------------------------------------------------------
139*/
140continueWithBit5:
141 in x2, USBIN ;[055] <-- bit 5
142 eor r0, x2 ;[056]
143 or phase, r0 ;[057]
144 sbrc phase, USBMINUS ;[058]
145 lpm ;[059] optional nop3; modifies r0
146 in phase, USBIN ;[060] <-- phase
147 eor x1, x2 ;[061]
148 bst x1, USBMINUS ;[062]
149 bld shift, 5 ;[063]
150 andi shift, 0x3f ;[064]
151 in x1, USBIN ;[065] <-- bit 6
152 breq unstuff5 ;[066] *** unstuff escape
153 eor phase, x1 ;[067]
154 eor x2, x1 ;[068]
155 bst x2, USBMINUS ;[069]
156 bld shift, 6 ;[070]
157didUnstuff6: ;[ ]
158 in r0, USBIN ;[071] <-- phase
159 cpi shift, 0x02 ;[072]
160 brlo unstuff6 ;[073] *** unstuff escape
161didUnstuff5: ;[ ]
162 nop2 ;[074]
163; [---] ;[075]
164 in x2, USBIN ;[076] <-- bit 7
165 eor x1, x2 ;[077]
166 bst x1, USBMINUS ;[078]
167 bld shift, 7 ;[079]
168didUnstuff7: ;[ ]
169 eor r0, x2 ;[080]
170 or phase, r0 ;[081]
171 in r0, USBIN ;[082] <-- phase
172 cpi shift, 0x04 ;[083]
173 brsh rxLoop ;[084]
174; [---] ;[085]
175unstuff7: ;[ ]
176 andi x3, ~0x80 ;[085]
177 ori shift, 0x80 ;[086]
178 in x2, USBIN ;[087] <-- sample stuffed bit 7
179 nop ;[088]
180 rjmp didUnstuff7 ;[089]
181; [---] ;[090]
182 ;[080]
183
184unstuff5: ;[067]
185 eor phase, x1 ;[068]
186 andi x3, ~0x20 ;[069]
187 ori shift, 0x20 ;[070]
188 in r0, USBIN ;[071] <-- phase
189 mov x2, x1 ;[072]
190 nop ;[073]
191 nop2 ;[074]
192; [---] ;[075]
193 in x1, USBIN ;[076] <-- bit 6
194 eor r0, x1 ;[077]
195 or phase, r0 ;[078]
196 eor x2, x1 ;[079]
197 bst x2, USBMINUS ;[080]
198 bld shift, 6 ;[081] no need to check bitstuffing, we just had one
199 in r0, USBIN ;[082] <-- phase
200 rjmp didUnstuff5 ;[083]
201; [---] ;[084]
202 ;[074]
203
204unstuff6: ;[074]
205 andi x3, ~0x40 ;[075]
206 in x1, USBIN ;[076] <-- bit 6 again
207 ori shift, 0x40 ;[077]
208 nop2 ;[078]
209; [---] ;[079]
210 rjmp didUnstuff6 ;[080]
211; [---] ;[081]
212 ;[071]
213
214unstuff0: ;[013]
215 eor r0, x2 ;[014]
216 or phase, r0 ;[015]
217 andi x2, USBMASK ;[016] check for SE0
218 in r0, USBIN ;[017] <-- phase
219 breq didUnstuff0 ;[018] direct jump to se0 would be too long
220 andi x3, ~0x01 ;[019]
221 ori shift, 0x01 ;[020]
222 mov x1, x2 ;[021] mov existing sample
223 in x2, USBIN ;[022] <-- bit 1 again
224 rjmp didUnstuff0 ;[023]
225; [---] ;[024]
226 ;[014]
227
228unstuff1: ;[024]
229 eor r0, x1 ;[025]
230 or phase, r0 ;[026]
231 andi x3, ~0x02 ;[027]
232 in r0, USBIN ;[028] <-- phase
233 ori shift, 0x02 ;[029]
234 mov x2, x1 ;[030]
235 rjmp didUnstuff1 ;[031]
236; [---] ;[032]
237 ;[022]
238
239unstuff2: ;[035]
240 eor r0, x2 ;[036]
241 or phase, r0 ;[037]
242 andi x3, ~0x04 ;[038]
243 in r0, USBIN ;[039] <-- phase
244 ori shift, 0x04 ;[040]
245 mov x1, x2 ;[041]
246 rjmp didUnstuff2 ;[042]
247; [---] ;[043]
248 ;[033]
249
250unstuff3: ;[043]
251 in x2, USBIN ;[044] <-- bit 3 again
252 eor r0, x2 ;[045]
253 or phase, r0 ;[046]
254 andi x3, ~0x08 ;[047]
255 ori shift, 0x08 ;[048]
256 nop ;[049]
257 in r0, USBIN ;[050] <-- phase
258 rjmp didUnstuff3 ;[051]
259; [---] ;[052]
260 ;[042]
261
262unstuff4: ;[053]
263 andi x3, ~0x10 ;[054]
264 in x1, USBIN ;[055] <-- bit 4 again
265 ori shift, 0x10 ;[056]
266 rjmp didUnstuff4 ;[057]
267; [---] ;[058]
268 ;[048]
269
270rxLoop: ;[085]
271 eor x3, shift ;[086] reconstruct: x3 is 0 at bit locations we changed, 1 at others
272 in x1, USBIN ;[000] <-- bit 0
273 st y+, x3 ;[001]
274; [---] ;[002]
275 eor r0, x1 ;[003]
276 or phase, r0 ;[004]
277 eor x2, x1 ;[005]
278 in r0, USBIN ;[006] <-- phase
279 ser x3 ;[007]
280 bst x2, USBMINUS ;[008]
281 bld shift, 0 ;[009]
282 andi shift, 0xf9 ;[010]
283rxbit1: ;[ ]
284 in x2, USBIN ;[011] <-- bit 1
285 breq unstuff0 ;[012] *** unstuff escape
286 andi x2, USBMASK ;[013] SE0 check for bit 1
287didUnstuff0: ;[ ] Z only set if we detected SE0 in bitstuff
288 breq se0 ;[014]
289 eor r0, x2 ;[015]
290 or phase, r0 ;[016]
291 in r0, USBIN ;[017] <-- phase
292 eor x1, x2 ;[018]
293 bst x1, USBMINUS ;[019]
294 bld shift, 1 ;[020]
295 andi shift, 0xf3 ;[021]
296didUnstuff1: ;[ ]
297 in x1, USBIN ;[022] <-- bit 2
298 breq unstuff1 ;[023] *** unstuff escape
299 eor r0, x1 ;[024]
300 or phase, r0 ;[025]
301 subi cnt, 1 ;[026] overflow check
302 brcs overflow ;[027]
303 in r0, USBIN ;[028] <-- phase
304 eor x2, x1 ;[029]
305 bst x2, USBMINUS ;[030]
306 bld shift, 2 ;[031]
307 andi shift, 0xe7 ;[032]
308didUnstuff2: ;[ ]
309 in x2, USBIN ;[033] <-- bit 3
310 breq unstuff2 ;[034] *** unstuff escape
311 eor r0, x2 ;[035]
312 or phase, r0 ;[036]
313 eor x1, x2 ;[037]
314 bst x1, USBMINUS ;[038]
315 in r0, USBIN ;[039] <-- phase
316 bld shift, 3 ;[040]
317 andi shift, 0xcf ;[041]
318didUnstuff3: ;[ ]
319 breq unstuff3 ;[042] *** unstuff escape
320 nop ;[043]
321 in x1, USBIN ;[044] <-- bit 4
322 eor x2, x1 ;[045]
323 bst x2, USBMINUS ;[046]
324 bld shift, 4 ;[047]
325didUnstuff4: ;[ ]
326 eor r0, x1 ;[048]
327 or phase, r0 ;[049]
328 in r0, USBIN ;[050] <-- phase
329 andi shift, 0x9f ;[051]
330 breq unstuff4 ;[052] *** unstuff escape
331 rjmp continueWithBit5;[053]
332; [---] ;[054]
333
334macro POP_STANDARD ; 16 cycles
335 pop cnt
336 pop x4
337 pop x3
338 pop x2
339 pop x1
340 pop shift
341 pop YH
342 pop r0
343 endm
344macro POP_RETI ; 5 cycles
345 pop YL
346 out SREG, YL
347 pop YL
348 endm
349
350#include "asmcommon.inc"
351
352
353; USB spec says:
354; idle = J
355; J = (D+ = 0), (D- = 1)
356; K = (D+ = 1), (D- = 0)
357; Spec allows 7.5 bit times from EOP to SOP for replies
358
359bitstuff7:
360 eor x1, x4 ;[4]
361 ldi x2, 0 ;[5]
362 nop2 ;[6] C is zero (brcc)
363 rjmp didStuff7 ;[8]
364
365bitstuffN:
366 eor x1, x4 ;[5]
367 ldi x2, 0 ;[6]
368 lpm ;[7] 3 cycle NOP, modifies r0
369 out USBOUT, x1 ;[10] <-- out
370 rjmp didStuffN ;[0]
371
372#define bitStatus x3
373
374sendNakAndReti:
375 ldi cnt, USBPID_NAK ;[-19]
376 rjmp sendCntAndReti ;[-18]
377sendAckAndReti:
378 ldi cnt, USBPID_ACK ;[-17]
379sendCntAndReti:
380 mov r0, cnt ;[-16]
381 ldi YL, 0 ;[-15] R0 address is 0
382 ldi YH, 0 ;[-14]
383 ldi cnt, 2 ;[-13]
384; rjmp usbSendAndReti fallthrough
385
386;usbSend:
387;pointer to data in 'Y'
388;number of bytes in 'cnt' -- including sync byte [range 2 ... 12]
389;uses: x1...x4, shift, cnt, Y
390;Numbers in brackets are time since first bit of sync pattern is sent
391usbSendAndReti: ; 12 cycles until SOP
392 in x2, USBDDR ;[-12]
393 ori x2, USBMASK ;[-11]
394 sbi USBOUT, USBMINUS;[-10] prepare idle state; D+ and D- must have been 0 (no pullups)
395 in x1, USBOUT ;[-8] port mirror for tx loop
396 out USBDDR, x2 ;[-7] <- acquire bus
397; need not init x2 (bitstuff history) because sync starts with 0
398 ldi x4, USBMASK ;[-6] exor mask
399 ldi shift, 0x80 ;[-5] sync byte is first byte sent
400 ldi bitStatus, 0xff ;[-4] init bit loop counter, works for up to 12 bytes
401byteloop:
402bitloop:
403 sbrs shift, 0 ;[8] [-3]
404 eor x1, x4 ;[9] [-2]
405 out USBOUT, x1 ;[10] [-1] <-- out
406 ror shift ;[0]
407 ror x2 ;[1]
408didStuffN:
409 cpi x2, 0xfc ;[2]
410 brcc bitstuffN ;[3]
411 nop ;[4]
412 subi bitStatus, 37 ;[5] 256 / 7 ~=~ 37
413 brcc bitloop ;[6] when we leave the loop, bitStatus has almost the initial value
414 sbrs shift, 0 ;[7]
415 eor x1, x4 ;[8]
416 ror shift ;[9]
417didStuff7:
418 out USBOUT, x1 ;[10] <-- out
419 ror x2 ;[0]
420 cpi x2, 0xfc ;[1]
421 brcc bitstuff7 ;[2]
422 ld shift, y+ ;[3]
423 dec cnt ;[5]
424 brne byteloop ;[6]
425;make SE0:
426 cbr x1, USBMASK ;[7] prepare SE0 [spec says EOP may be 21 to 25 cycles]
427 lds x2, usbNewDeviceAddr;[8]
428 lsl x2 ;[10] we compare with left shifted address
429 out USBOUT, x1 ;[11] <-- out SE0 -- from now 2 bits = 22 cycles until bus idle
430;2006-03-06: moved transfer of new address to usbDeviceAddr from C-Code to asm:
431;set address only after data packet was sent, not after handshake
432 subi YL, 2 ;[0] Only assign address on data packets, not ACK/NAK in r0
433 sbci YH, 0 ;[1]
434 breq skipAddrAssign ;[2]
435 sts usbDeviceAddr, x2; if not skipped: SE0 is one cycle longer
436skipAddrAssign:
437;end of usbDeviceAddress transfer
438 ldi x2, 1<<USB_INTR_PENDING_BIT;[4] int0 occurred during TX -- clear pending flag
439 USB_STORE_PENDING(x2) ;[5]
440 ori x1, USBIDLE ;[6]
441 in x2, USBDDR ;[7]
442 cbr x2, USBMASK ;[8] set both pins to input
443 mov x3, x1 ;[9]
444 cbr x3, USBMASK ;[10] configure no pullup on both pins
445 ldi x4, 4 ;[11]
446se0Delay:
447 dec x4 ;[12] [15] [18] [21]
448 brne se0Delay ;[13] [16] [19] [22]
449 out USBOUT, x1 ;[23] <-- out J (idle) -- end of SE0 (EOP signal)
450 out USBDDR, x2 ;[24] <-- release bus now
451 out USBOUT, x3 ;[25] <-- ensure no pull-up resistors are active
452 rjmp doReturn
453
diff --git a/tmk_core/protocol/vusb/usbdrv/usbdrvasm18-crc.inc b/tmk_core/protocol/vusb/usbdrv/usbdrvasm18-crc.inc
deleted file mode 100644
index f83347df7..000000000
--- a/tmk_core/protocol/vusb/usbdrv/usbdrvasm18-crc.inc
+++ /dev/null
@@ -1,707 +0,0 @@
1/* Name: usbdrvasm18.inc
2 * Project: V-USB, virtual USB port for Atmel's(r) AVR(r) microcontrollers
3 * Author: Lukas Schrittwieser (based on 20 MHz usbdrvasm20.inc by Jeroen Benschop)
4 * Creation Date: 2009-01-20
5 * Tabsize: 4
6 * Copyright: (c) 2008 by Lukas Schrittwieser and OBJECTIVE DEVELOPMENT Software GmbH
7 * License: GNU GPL v2 (see License.txt), GNU GPL v3 or proprietary (CommercialLicense.txt)
8 * Revision: $Id: usbdrvasm18-crc.inc 740 2009-04-13 18:23:31Z cs $
9 */
10
11/* Do not link this file! Link usbdrvasm.S instead, which includes the
12 * appropriate implementation!
13 */
14
15/*
16General Description:
17This file is the 18 MHz version of the asssembler part of the USB driver. It
18requires a 18 MHz crystal (not a ceramic resonator and not a calibrated RC
19oscillator).
20
21See usbdrv.h for a description of the entire driver.
22
23Since almost all of this code is timing critical, don't change unless you
24really know what you are doing! Many parts require not only a maximum number
25of CPU cycles, but even an exact number of cycles!
26*/
27
28
29;max stack usage: [ret(2), YL, SREG, YH, [sofError], bitcnt(x5), shift, x1, x2, x3, x4, cnt, ZL, ZH] = 14 bytes
30;nominal frequency: 18 MHz -> 12 cycles per bit
31; Numbers in brackets are clocks counted from center of last sync bit
32; when instruction starts
33;register use in receive loop to receive the data bytes:
34; shift assembles the byte currently being received
35; x1 holds the D+ and D- line state
36; x2 holds the previous line state
37; cnt holds the number of bytes left in the receive buffer
38; x3 holds the higher crc byte (see algorithm below)
39; x4 is used as temporary register for the crc algorithm
40; x5 is used for unstuffing: when unstuffing the last received bit is inverted in shift (to prevent further
41; unstuffing calls. In the same time the corresponding bit in x5 is cleared to mark the bit as beening iverted
42; zl lower crc value and crc table index
43; zh used for crc table accesses
44
45;--------------------------------------------------------------------------------------------------------------
46; CRC mods:
47; table driven crc checker, Z points to table in prog space
48; ZL is the lower crc byte, x3 is the higher crc byte
49; x4 is used as temp register to store different results
50; the initialization of the crc register is not 0xFFFF but 0xFE54. This is because during the receipt of the
51; first data byte an virtual zero data byte is added to the crc register, this results in the correct initial
52; value of 0xFFFF at beginning of the second data byte before the first data byte is added to the crc.
53; The magic number 0xFE54 results form the crc table: At tabH[0x54] = 0xFF = crcH (required) and
54; tabL[0x54] = 0x01 -> crcL = 0x01 xor 0xFE = 0xFF
55; bitcnt is renamed to x5 and is used for unstuffing purposes, the unstuffing works like in the 12MHz version
56;--------------------------------------------------------------------------------------------------------------
57; CRC algorithm:
58; The crc register is formed by x3 (higher byte) and ZL (lower byte). The algorithm uses a 'reversed' form
59; i.e. that it takes the least significant bit first and shifts to the right. So in fact the highest order
60; bit seen from the polynomial devision point of view is the lsb of ZL. (If this sounds strange to you i
61; propose a research on CRC :-) )
62; Each data byte received is xored to ZL, the lower crc byte. This byte now builds the crc
63; table index. Next the new high byte is loaded from the table and stored in x4 until we have space in x3
64; (its destination).
65; Afterwards the lower table is loaded from the table and stored in ZL (the old index is overwritten as
66; we don't need it anymore. In fact this is a right shift by 8 bits.) Now the old crc high value is xored
67; to ZL, this is the second shift of the old crc value. Now x4 (the temp reg) is moved to x3 and the crc
68; calculation is done.
69; Prior to the first byte the two CRC register have to be initialized to 0xFFFF (as defined in usb spec)
70; however the crc engine also runs during the receipt of the first byte, therefore x3 and zl are initialized
71; to a magic number which results in a crc value of 0xFFFF after the first complete byte.
72;
73; This algorithm is split into the extra cycles of the different bits:
74; bit7: XOR the received byte to ZL
75; bit5: load the new high byte to x4
76; bit6: load the lower xor byte from the table, xor zl and x3, store result in zl (=the new crc low value)
77; move x4 (the new high byte) to x3, the crc value is ready
78;
79
80
81macro POP_STANDARD ; 18 cycles
82 pop ZH
83 pop ZL
84 pop cnt
85 pop x5
86 pop x3
87 pop x2
88 pop x1
89 pop shift
90 pop x4
91 endm
92macro POP_RETI ; 7 cycles
93 pop YH
94 pop YL
95 out SREG, YL
96 pop YL
97 endm
98
99macro CRC_CLEANUP_AND_CHECK
100 ; the last byte has already been xored with the lower crc byte, we have to do the table lookup and xor
101 ; x3 is the higher crc byte, zl the lower one
102 ldi ZH, hi8(usbCrcTableHigh);[+1] get the new high byte from the table
103 lpm x2, Z ;[+2][+3][+4]
104 ldi ZH, hi8(usbCrcTableLow);[+5] get the new low xor byte from the table
105 lpm ZL, Z ;[+6][+7][+8]
106 eor ZL, x3 ;[+7] xor the old high byte with the value from the table, x2:ZL now holds the crc value
107 cpi ZL, 0x01 ;[+8] if the crc is ok we have a fixed remainder value of 0xb001 in x2:ZL (see usb spec)
108 brne ignorePacket ;[+9] detected a crc fault -> paket is ignored and retransmitted by the host
109 cpi x2, 0xb0 ;[+10]
110 brne ignorePacket ;[+11] detected a crc fault -> paket is ignored and retransmitted by the host
111 endm
112
113
114USB_INTR_VECTOR:
115;order of registers pushed: YL, SREG, YH, [sofError], x4, shift, x1, x2, x3, x5, cnt, ZL, ZH
116 push YL ;[-28] push only what is necessary to sync with edge ASAP
117 in YL, SREG ;[-26]
118 push YL ;[-25]
119 push YH ;[-23]
120;----------------------------------------------------------------------------
121; Synchronize with sync pattern:
122;----------------------------------------------------------------------------
123;sync byte (D-) pattern LSb to MSb: 01010100 [1 = idle = J, 0 = K]
124;sync up with J to K edge during sync pattern -- use fastest possible loops
125;The first part waits at most 1 bit long since we must be in sync pattern.
126;YL is guarenteed to be < 0x80 because I flag is clear. When we jump to
127;waitForJ, ensure that this prerequisite is met.
128waitForJ:
129 inc YL
130 sbis USBIN, USBMINUS
131 brne waitForJ ; just make sure we have ANY timeout
132waitForK:
133;The following code results in a sampling window of < 1/4 bit which meets the spec.
134 sbis USBIN, USBMINUS ;[-17]
135 rjmp foundK ;[-16]
136 sbis USBIN, USBMINUS
137 rjmp foundK
138 sbis USBIN, USBMINUS
139 rjmp foundK
140 sbis USBIN, USBMINUS
141 rjmp foundK
142 sbis USBIN, USBMINUS
143 rjmp foundK
144 sbis USBIN, USBMINUS
145 rjmp foundK
146 sbis USBIN, USBMINUS
147 rjmp foundK
148 sbis USBIN, USBMINUS
149 rjmp foundK
150 sbis USBIN, USBMINUS
151 rjmp foundK
152#if USB_COUNT_SOF
153 lds YL, usbSofCount
154 inc YL
155 sts usbSofCount, YL
156#endif /* USB_COUNT_SOF */
157#ifdef USB_SOF_HOOK
158 USB_SOF_HOOK
159#endif
160 rjmp sofError
161foundK: ;[-15]
162;{3, 5} after falling D- edge, average delay: 4 cycles
163;bit0 should be at 30 (2.5 bits) for center sampling. Currently at 4 so 26 cylces till bit 0 sample
164;use 1 bit time for setup purposes, then sample again. Numbers in brackets
165;are cycles from center of first sync (double K) bit after the instruction
166 push x4 ;[-14]
167; [---] ;[-13]
168 lds YL, usbInputBufOffset;[-12] used to toggle the two usb receive buffers
169; [---] ;[-11]
170 clr YH ;[-10]
171 subi YL, lo8(-(usbRxBuf));[-9] [rx loop init]
172 sbci YH, hi8(-(usbRxBuf));[-8] [rx loop init]
173 push shift ;[-7]
174; [---] ;[-6]
175 ldi shift, 0x80 ;[-5] the last bit is the end of byte marker for the pid receiver loop
176 clc ;[-4] the carry has to be clear for receipt of pid bit 0
177 sbis USBIN, USBMINUS ;[-3] we want two bits K (sample 3 cycles too early)
178 rjmp haveTwoBitsK ;[-2]
179 pop shift ;[-1] undo the push from before
180 pop x4 ;[1]
181 rjmp waitForK ;[3] this was not the end of sync, retry
182; The entire loop from waitForK until rjmp waitForK above must not exceed two
183; bit times (= 24 cycles).
184
185;----------------------------------------------------------------------------
186; push more registers and initialize values while we sample the first bits:
187;----------------------------------------------------------------------------
188haveTwoBitsK:
189 push x1 ;[0]
190 push x2 ;[2]
191 push x3 ;[4] crc high byte
192 ldi x2, 1<<USBPLUS ;[6] [rx loop init] current line state is K state. D+=="1", D-=="0"
193 push x5 ;[7]
194 push cnt ;[9]
195 ldi cnt, USB_BUFSIZE ;[11]
196
197
198;--------------------------------------------------------------------------------------------------------------
199; receives the pid byte
200; there is no real unstuffing algorithm implemented here as a stuffing bit is impossible in the pid byte.
201; That's because the last four bits of the byte are the inverted of the first four bits. If we detect a
202; unstuffing condition something went wrong and abort
203; shift has to be initialized to 0x80
204;--------------------------------------------------------------------------------------------------------------
205
206; pid bit 0 - used for even more register saving (we need the z pointer)
207 in x1, USBIN ;[0] sample line state
208 andi x1, USBMASK ;[1] filter only D+ and D- bits
209 eor x2, x1 ;[2] generate inverted of actual bit
210 sbrc x2, USBMINUS ;[3] if the bit is set we received a zero
211 sec ;[4]
212 ror shift ;[5] we perform no unstuffing check here as this is the first bit
213 mov x2, x1 ;[6]
214 push ZL ;[7]
215 ;[8]
216 push ZH ;[9]
217 ;[10]
218 ldi x3, 0xFE ;[11] x3 is the high order crc value
219
220
221bitloopPid:
222 in x1, USBIN ;[0] sample line state
223 andi x1, USBMASK ;[1] filter only D+ and D- bits
224 breq nse0 ;[2] both lines are low so handle se0
225 eor x2, x1 ;[3] generate inverted of actual bit
226 sbrc x2, USBMINUS ;[4] set the carry if we received a zero
227 sec ;[5]
228 ror shift ;[6]
229 ldi ZL, 0x54 ;[7] ZL is the low order crc value
230 ser x4 ;[8] the is no bit stuffing check here as the pid bit can't be stuffed. if so
231 ; some error occured. In this case the paket is discarded later on anyway.
232 mov x2, x1 ;[9] prepare for the next cycle
233 brcc bitloopPid ;[10] while 0s drop out of shift we get the next bit
234 eor x4, shift ;[11] invert all bits in shift and store result in x4
235
236;--------------------------------------------------------------------------------------------------------------
237; receives data bytes and calculates the crc
238; the last USBIN state has to be in x2
239; this is only the first half, due to branch distanc limitations the second half of the loop is near the end
240; of this asm file
241;--------------------------------------------------------------------------------------------------------------
242
243rxDataStart:
244 in x1, USBIN ;[0] sample line state (note: a se0 check is not useful due to bit dribbling)
245 ser x5 ;[1] prepare the unstuff marker register
246 eor x2, x1 ;[2] generates the inverted of the actual bit
247 bst x2, USBMINUS ;[3] copy the bit from x2
248 bld shift, 0 ;[4] and store it in shift
249 mov x2, shift ;[5] make a copy of shift for unstuffing check
250 andi x2, 0xF9 ;[6] mask the last six bits, if we got six zeros (which are six ones in fact)
251 breq unstuff0 ;[7] then Z is set now and we branch to the unstuffing handler
252didunstuff0:
253 subi cnt, 1 ;[8] cannot use dec because it doesn't affect the carry flag
254 brcs nOverflow ;[9] Too many bytes received. Ignore packet
255 st Y+, x4 ;[10] store the last received byte
256 ;[11] st needs two cycles
257
258; bit1
259 in x2, USBIN ;[0] sample line state
260 andi x1, USBMASK ;[1] check for se0 during bit 0
261 breq nse0 ;[2]
262 andi x2, USBMASK ;[3] check se0 during bit 1
263 breq nse0 ;[4]
264 eor x1, x2 ;[5]
265 bst x1, USBMINUS ;[6]
266 bld shift, 1 ;[7]
267 mov x1, shift ;[8]
268 andi x1, 0xF3 ;[9]
269 breq unstuff1 ;[10]
270didunstuff1:
271 nop ;[11]
272
273; bit2
274 in x1, USBIN ;[0] sample line state
275 andi x1, USBMASK ;[1] check for se0 (as there is nothing else to do here
276 breq nOverflow ;[2]
277 eor x2, x1 ;[3] generates the inverted of the actual bit
278 bst x2, USBMINUS ;[4]
279 bld shift, 2 ;[5] store the bit
280 mov x2, shift ;[6]
281 andi x2, 0xE7 ;[7] if we have six zeros here (which means six 1 in the stream)
282 breq unstuff2 ;[8] the next bit is a stuffing bit
283didunstuff2:
284 nop2 ;[9]
285 ;[10]
286 nop ;[11]
287
288; bit3
289 in x2, USBIN ;[0] sample line state
290 andi x2, USBMASK ;[1] check for se0
291 breq nOverflow ;[2]
292 eor x1, x2 ;[3]
293 bst x1, USBMINUS ;[4]
294 bld shift, 3 ;[5]
295 mov x1, shift ;[6]
296 andi x1, 0xCF ;[7]
297 breq unstuff3 ;[8]
298didunstuff3:
299 nop ;[9]
300 rjmp rxDataBit4 ;[10]
301 ;[11]
302
303; the avr branch instructions allow an offset of +63 insturction only, so we need this
304; 'local copy' of se0
305nse0:
306 rjmp se0 ;[4]
307 ;[5]
308; the same same as for se0 is needed for overflow and StuffErr
309nOverflow:
310stuffErr:
311 rjmp overflow
312
313
314unstuff0: ;[8] this is the branch delay of breq unstuffX
315 andi x1, USBMASK ;[9] do an se0 check here (if the last crc byte ends with 5 one's we might end up here
316 breq didunstuff0 ;[10] event tough the message is complete -> jump back and store the byte
317 ori shift, 0x01 ;[11] invert the last received bit to prevent furhter unstuffing
318 in x2, USBIN ;[0] we have some free cycles so we could check for bit stuffing errors
319 andi x5, 0xFE ;[1] mark this bit as inverted (will be corrected before storing shift)
320 eor x1, x2 ;[2] x1 and x2 have to be different because the stuff bit is always a zero
321 andi x1, USBMASK ;[3] mask the interesting bits
322 breq stuffErr ;[4] if the stuff bit is a 1-bit something went wrong
323 mov x1, x2 ;[5] the next bit expects the last state to be in x1
324 rjmp didunstuff0 ;[6]
325 ;[7] jump delay of rjmp didunstuffX
326
327unstuff1: ;[11] this is the jump delay of breq unstuffX
328 in x1, USBIN ;[0] we have some free cycles so we could check for bit stuffing errors
329 ori shift, 0x02 ;[1] invert the last received bit to prevent furhter unstuffing
330 andi x5, 0xFD ;[2] mark this bit as inverted (will be corrected before storing shift)
331 eor x2, x1 ;[3] x1 and x2 have to be different because the stuff bit is always a zero
332 andi x2, USBMASK ;[4] mask the interesting bits
333 breq stuffErr ;[5] if the stuff bit is a 1-bit something went wrong
334 mov x2, x1 ;[6] the next bit expects the last state to be in x2
335 nop2 ;[7]
336 ;[8]
337 rjmp didunstuff1 ;[9]
338 ;[10] jump delay of rjmp didunstuffX
339
340unstuff2: ;[9] this is the jump delay of breq unstuffX
341 ori shift, 0x04 ;[10] invert the last received bit to prevent furhter unstuffing
342 andi x5, 0xFB ;[11] mark this bit as inverted (will be corrected before storing shift)
343 in x2, USBIN ;[0] we have some free cycles so we could check for bit stuffing errors
344 eor x1, x2 ;[1] x1 and x2 have to be different because the stuff bit is always a zero
345 andi x1, USBMASK ;[2] mask the interesting bits
346 breq stuffErr ;[3] if the stuff bit is a 1-bit something went wrong
347 mov x1, x2 ;[4] the next bit expects the last state to be in x1
348 nop2 ;[5]
349 ;[6]
350 rjmp didunstuff2 ;[7]
351 ;[8] jump delay of rjmp didunstuffX
352
353unstuff3: ;[9] this is the jump delay of breq unstuffX
354 ori shift, 0x08 ;[10] invert the last received bit to prevent furhter unstuffing
355 andi x5, 0xF7 ;[11] mark this bit as inverted (will be corrected before storing shift)
356 in x1, USBIN ;[0] we have some free cycles so we could check for bit stuffing errors
357 eor x2, x1 ;[1] x1 and x2 have to be different because the stuff bit is always a zero
358 andi x2, USBMASK ;[2] mask the interesting bits
359 breq stuffErr ;[3] if the stuff bit is a 1-bit something went wrong
360 mov x2, x1 ;[4] the next bit expects the last state to be in x2
361 nop2 ;[5]
362 ;[6]
363 rjmp didunstuff3 ;[7]
364 ;[8] jump delay of rjmp didunstuffX
365
366
367
368; the include has to be here due to branch distance restirctions
369#define __USE_CRC__
370#include "asmcommon.inc"
371
372
373
374; USB spec says:
375; idle = J
376; J = (D+ = 0), (D- = 1)
377; K = (D+ = 1), (D- = 0)
378; Spec allows 7.5 bit times from EOP to SOP for replies
379; 7.5 bit times is 90 cycles. ...there is plenty of time
380
381
382sendNakAndReti:
383 ldi x3, USBPID_NAK ;[-18]
384 rjmp sendX3AndReti ;[-17]
385sendAckAndReti:
386 ldi cnt, USBPID_ACK ;[-17]
387sendCntAndReti:
388 mov x3, cnt ;[-16]
389sendX3AndReti:
390 ldi YL, 20 ;[-15] x3==r20 address is 20
391 ldi YH, 0 ;[-14]
392 ldi cnt, 2 ;[-13]
393; rjmp usbSendAndReti fallthrough
394
395;usbSend:
396;pointer to data in 'Y'
397;number of bytes in 'cnt' -- including sync byte [range 2 ... 12]
398;uses: x1...x4, btcnt, shift, cnt, Y
399;Numbers in brackets are time since first bit of sync pattern is sent
400
401usbSendAndReti: ; 12 cycles until SOP
402 in x2, USBDDR ;[-12]
403 ori x2, USBMASK ;[-11]
404 sbi USBOUT, USBMINUS;[-10] prepare idle state; D+ and D- must have been 0 (no pullups)
405 in x1, USBOUT ;[-8] port mirror for tx loop
406 out USBDDR, x2 ;[-6] <- acquire bus
407 ldi x2, 0 ;[-6] init x2 (bitstuff history) because sync starts with 0
408 ldi x4, USBMASK ;[-5] exor mask
409 ldi shift, 0x80 ;[-4] sync byte is first byte sent
410txByteLoop:
411 ldi bitcnt, 0x40 ;[-3]=[9] binary 01000000
412txBitLoop: ; the loop sends the first 7 bits of the byte
413 sbrs shift, 0 ;[-2]=[10] if we have to send a 1 don't change the line state
414 eor x1, x4 ;[-1]=[11]
415 out USBOUT, x1 ;[0]
416 ror shift ;[1]
417 ror x2 ;[2] transfers the last sent bit to the stuffing history
418didStuffN:
419 nop ;[3]
420 nop ;[4]
421 cpi x2, 0xfc ;[5] if we sent six consecutive ones
422 brcc bitstuffN ;[6]
423 lsr bitcnt ;[7]
424 brne txBitLoop ;[8] restart the loop while the 1 is still in the bitcount
425
426; transmit bit 7
427 sbrs shift, 0 ;[9]
428 eor x1, x4 ;[10]
429didStuff7:
430 ror shift ;[11]
431 out USBOUT, x1 ;[0] transfer bit 7 to the pins
432 ror x2 ;[1] move the bit into the stuffing history
433 cpi x2, 0xfc ;[2]
434 brcc bitstuff7 ;[3]
435 ld shift, y+ ;[4] get next byte to transmit
436 dec cnt ;[5] decrement byte counter
437 brne txByteLoop ;[7] if we have more bytes start next one
438 ;[8] branch delay
439
440;make SE0:
441 cbr x1, USBMASK ;[8] prepare SE0 [spec says EOP may be 25 to 30 cycles]
442 lds x2, usbNewDeviceAddr;[9]
443 lsl x2 ;[11] we compare with left shifted address
444 out USBOUT, x1 ;[0] <-- out SE0 -- from now 2 bits = 24 cycles until bus idle
445 subi YL, 20 + 2 ;[1] Only assign address on data packets, not ACK/NAK in x3
446 sbci YH, 0 ;[2]
447;2006-03-06: moved transfer of new address to usbDeviceAddr from C-Code to asm:
448;set address only after data packet was sent, not after handshake
449 breq skipAddrAssign ;[3]
450 sts usbDeviceAddr, x2 ; if not skipped: SE0 is one cycle longer
451skipAddrAssign:
452;end of usbDeviceAddress transfer
453 ldi x2, 1<<USB_INTR_PENDING_BIT;[5] int0 occurred during TX -- clear pending flag
454 USB_STORE_PENDING(x2) ;[6]
455 ori x1, USBIDLE ;[7]
456 in x2, USBDDR ;[8]
457 cbr x2, USBMASK ;[9] set both pins to input
458 mov x3, x1 ;[10]
459 cbr x3, USBMASK ;[11] configure no pullup on both pins
460 ldi x4, 4 ;[12]
461se0Delay:
462 dec x4 ;[13] [16] [19] [22]
463 brne se0Delay ;[14] [17] [20] [23]
464 out USBOUT, x1 ;[24] <-- out J (idle) -- end of SE0 (EOP signal)
465 out USBDDR, x2 ;[25] <-- release bus now
466 out USBOUT, x3 ;[26] <-- ensure no pull-up resistors are active
467 rjmp doReturn
468
469bitstuffN:
470 eor x1, x4 ;[8] generate a zero
471 ldi x2, 0 ;[9] reset the bit stuffing history
472 nop2 ;[10]
473 out USBOUT, x1 ;[0] <-- send the stuffing bit
474 rjmp didStuffN ;[1]
475
476bitstuff7:
477 eor x1, x4 ;[5]
478 ldi x2, 0 ;[6] reset bit stuffing history
479 clc ;[7] fill a zero into the shift register
480 rol shift ;[8] compensate for ror shift at branch destination
481 rjmp didStuff7 ;[9]
482 ;[10] jump delay
483
484;--------------------------------------------------------------------------------------------------------------
485; receives data bytes and calculates the crc
486; second half of the data byte receiver loop
487; most parts of the crc algorithm are here
488;--------------------------------------------------------------------------------------------------------------
489
490nOverflow2:
491 rjmp overflow
492
493rxDataBit4:
494 in x1, USBIN ;[0] sample line state
495 andi x1, USBMASK ;[1] check for se0
496 breq nOverflow2 ;[2]
497 eor x2, x1 ;[3]
498 bst x2, USBMINUS ;[4]
499 bld shift, 4 ;[5]
500 mov x2, shift ;[6]
501 andi x2, 0x9F ;[7]
502 breq unstuff4 ;[8]
503didunstuff4:
504 nop2 ;[9][10]
505 nop ;[11]
506
507; bit5
508 in x2, USBIN ;[0] sample line state
509 ldi ZH, hi8(usbCrcTableHigh);[1] use the table for the higher byte
510 eor x1, x2 ;[2]
511 bst x1, USBMINUS ;[3]
512 bld shift, 5 ;[4]
513 mov x1, shift ;[5]
514 andi x1, 0x3F ;[6]
515 breq unstuff5 ;[7]
516didunstuff5:
517 lpm x4, Z ;[8] load the higher crc xor-byte and store it for later use
518 ;[9] lpm needs 3 cycles
519 ;[10]
520 ldi ZH, hi8(usbCrcTableLow);[11] load the lower crc xor byte adress
521
522; bit6
523 in x1, USBIN ;[0] sample line state
524 eor x2, x1 ;[1]
525 bst x2, USBMINUS ;[2]
526 bld shift, 6 ;[3]
527 mov x2, shift ;[4]
528 andi x2, 0x7E ;[5]
529 breq unstuff6 ;[6]
530didunstuff6:
531 lpm ZL, Z ;[7] load the lower xor crc byte
532 ;[8] lpm needs 3 cycles
533 ;[9]
534 eor ZL, x3 ;[10] xor the old high crc byte with the low xor-byte
535 mov x3, x4 ;[11] move the new high order crc value from temp to its destination
536
537; bit7
538 in x2, USBIN ;[0] sample line state
539 eor x1, x2 ;[1]
540 bst x1, USBMINUS ;[2]
541 bld shift, 7 ;[3] now shift holds the complete but inverted data byte
542 mov x1, shift ;[4]
543 andi x1, 0xFC ;[5]
544 breq unstuff7 ;[6]
545didunstuff7:
546 eor x5, shift ;[7] x5 marks all bits which have not been inverted by the unstuffing subs
547 mov x4, x5 ;[8] keep a copy of the data byte it will be stored during next bit0
548 eor ZL, x4 ;[9] feed the actual byte into the crc algorithm
549 rjmp rxDataStart ;[10] next byte
550 ;[11] during the reception of the next byte this one will be fed int the crc algorithm
551
552unstuff4: ;[9] this is the jump delay of rjmp unstuffX
553 ori shift, 0x10 ;[10] invert the last received bit to prevent furhter unstuffing
554 andi x5, 0xEF ;[11] mark this bit as inverted (will be corrected before storing shift)
555 in x2, USBIN ;[0] we have some free cycles so we could check for bit stuffing errors
556 eor x1, x2 ;[1] x1 and x2 have to be different because the stuff bit is always a zero
557 andi x1, USBMASK ;[2] mask the interesting bits
558 breq stuffErr2 ;[3] if the stuff bit is a 1-bit something went wrong
559 mov x1, x2 ;[4] the next bit expects the last state to be in x1
560 nop2 ;[5]
561 ;[6]
562 rjmp didunstuff4 ;[7]
563 ;[8] jump delay of rjmp didunstuffX
564
565unstuff5: ;[8] this is the jump delay of rjmp unstuffX
566 nop ;[9]
567 ori shift, 0x20 ;[10] invert the last received bit to prevent furhter unstuffing
568 andi x5, 0xDF ;[11] mark this bit as inverted (will be corrected before storing shift)
569 in x1, USBIN ;[0] we have some free cycles so we could check for bit stuffing errors
570 eor x2, x1 ;[1] x1 and x2 have to be different because the stuff bit is always a zero
571 andi x2, USBMASK ;[2] mask the interesting bits
572 breq stuffErr2 ;[3] if the stuff bit is a 1-bit something went wrong
573 mov x2, x1 ;[4] the next bit expects the last state to be in x2
574 nop ;[5]
575 rjmp didunstuff5 ;[6]
576 ;[7] jump delay of rjmp didunstuffX
577
578unstuff6: ;[7] this is the jump delay of rjmp unstuffX
579 nop2 ;[8]
580 ;[9]
581 ori shift, 0x40 ;[10] invert the last received bit to prevent furhter unstuffing
582 andi x5, 0xBF ;[11] mark this bit as inverted (will be corrected before storing shift)
583 in x2, USBIN ;[0] we have some free cycles so we could check for bit stuffing errors
584 eor x1, x2 ;[1] x1 and x2 have to be different because the stuff bit is always a zero
585 andi x1, USBMASK ;[2] mask the interesting bits
586 breq stuffErr2 ;[3] if the stuff bit is a 1-bit something went wrong
587 mov x1, x2 ;[4] the next bit expects the last state to be in x1
588 rjmp didunstuff6 ;[5]
589 ;[6] jump delay of rjmp didunstuffX
590
591unstuff7: ;[7] this is the jump delay of rjmp unstuffX
592 nop ;[8]
593 nop ;[9]
594 ori shift, 0x80 ;[10] invert the last received bit to prevent furhter unstuffing
595 andi x5, 0x7F ;[11] mark this bit as inverted (will be corrected before storing shift)
596 in x1, USBIN ;[0] we have some free cycles so we could check for bit stuffing errors
597 eor x2, x1 ;[1] x1 and x2 have to be different because the stuff bit is always a zero
598 andi x2, USBMASK ;[2] mask the interesting bits
599 breq stuffErr2 ;[3] if the stuff bit is a 1-bit something went wrong
600 mov x2, x1 ;[4] the next bit expects the last state to be in x2
601 rjmp didunstuff7 ;[5]
602 ;[6] jump delay of rjmp didunstuff7
603
604; local copy of the stuffErr desitnation for the second half of the receiver loop
605stuffErr2:
606 rjmp stuffErr
607
608;--------------------------------------------------------------------------------------------------------------
609; The crc table follows. It has to be aligned to enable a fast loading of the needed bytes.
610; There are two tables of 256 entries each, the low and the high byte table.
611; Table values were generated with the following C code:
612/*
613#include <stdio.h>
614int main (int argc, char **argv)
615{
616 int i, j;
617 for (i=0; i<512; i++){
618 unsigned short crc = i & 0xff;
619 for(j=0; j<8; j++) crc = (crc >> 1) ^ ((crc & 1) ? 0xa001 : 0);
620 if((i & 7) == 0) printf("\n.byte ");
621 printf("0x%02x, ", (i > 0xff ? (crc >> 8) : crc) & 0xff);
622 if(i == 255) printf("\n");
623 }
624 return 0;
625}
626
627// Use the following algorithm to compute CRC values:
628ushort computeCrc(uchar *msg, uchar msgLen)
629{
630 uchar i;
631 ushort crc = 0xffff;
632 for(i = 0; i < msgLen; i++)
633 crc = usbCrcTable16[lo8(crc) ^ msg[i]] ^ hi8(crc);
634 return crc;
635}
636*/
637
638.balign 256
639usbCrcTableLow:
640.byte 0x00, 0xC1, 0x81, 0x40, 0x01, 0xC0, 0x80, 0x41
641.byte 0x01, 0xC0, 0x80, 0x41, 0x00, 0xC1, 0x81, 0x40
642.byte 0x01, 0xC0, 0x80, 0x41, 0x00, 0xC1, 0x81, 0x40
643.byte 0x00, 0xC1, 0x81, 0x40, 0x01, 0xC0, 0x80, 0x41
644.byte 0x01, 0xC0, 0x80, 0x41, 0x00, 0xC1, 0x81, 0x40
645.byte 0x00, 0xC1, 0x81, 0x40, 0x01, 0xC0, 0x80, 0x41
646.byte 0x00, 0xC1, 0x81, 0x40, 0x01, 0xC0, 0x80, 0x41
647.byte 0x01, 0xC0, 0x80, 0x41, 0x00, 0xC1, 0x81, 0x40
648.byte 0x01, 0xC0, 0x80, 0x41, 0x00, 0xC1, 0x81, 0x40
649.byte 0x00, 0xC1, 0x81, 0x40, 0x01, 0xC0, 0x80, 0x41
650.byte 0x00, 0xC1, 0x81, 0x40, 0x01, 0xC0, 0x80, 0x41
651.byte 0x01, 0xC0, 0x80, 0x41, 0x00, 0xC1, 0x81, 0x40
652.byte 0x00, 0xC1, 0x81, 0x40, 0x01, 0xC0, 0x80, 0x41
653.byte 0x01, 0xC0, 0x80, 0x41, 0x00, 0xC1, 0x81, 0x40
654.byte 0x01, 0xC0, 0x80, 0x41, 0x00, 0xC1, 0x81, 0x40
655.byte 0x00, 0xC1, 0x81, 0x40, 0x01, 0xC0, 0x80, 0x41
656.byte 0x01, 0xC0, 0x80, 0x41, 0x00, 0xC1, 0x81, 0x40
657.byte 0x00, 0xC1, 0x81, 0x40, 0x01, 0xC0, 0x80, 0x41
658.byte 0x00, 0xC1, 0x81, 0x40, 0x01, 0xC0, 0x80, 0x41
659.byte 0x01, 0xC0, 0x80, 0x41, 0x00, 0xC1, 0x81, 0x40
660.byte 0x00, 0xC1, 0x81, 0x40, 0x01, 0xC0, 0x80, 0x41
661.byte 0x01, 0xC0, 0x80, 0x41, 0x00, 0xC1, 0x81, 0x40
662.byte 0x01, 0xC0, 0x80, 0x41, 0x00, 0xC1, 0x81, 0x40
663.byte 0x00, 0xC1, 0x81, 0x40, 0x01, 0xC0, 0x80, 0x41
664.byte 0x00, 0xC1, 0x81, 0x40, 0x01, 0xC0, 0x80, 0x41
665.byte 0x01, 0xC0, 0x80, 0x41, 0x00, 0xC1, 0x81, 0x40
666.byte 0x01, 0xC0, 0x80, 0x41, 0x00, 0xC1, 0x81, 0x40
667.byte 0x00, 0xC1, 0x81, 0x40, 0x01, 0xC0, 0x80, 0x41
668.byte 0x01, 0xC0, 0x80, 0x41, 0x00, 0xC1, 0x81, 0x40
669.byte 0x00, 0xC1, 0x81, 0x40, 0x01, 0xC0, 0x80, 0x41
670.byte 0x00, 0xC1, 0x81, 0x40, 0x01, 0xC0, 0x80, 0x41
671.byte 0x01, 0xC0, 0x80, 0x41, 0x00, 0xC1, 0x81, 0x40
672
673; .balign 256
674usbCrcTableHigh:
675.byte 0x00, 0xC0, 0xC1, 0x01, 0xC3, 0x03, 0x02, 0xC2
676.byte 0xC6, 0x06, 0x07, 0xC7, 0x05, 0xC5, 0xC4, 0x04
677.byte 0xCC, 0x0C, 0x0D, 0xCD, 0x0F, 0xCF, 0xCE, 0x0E
678.byte 0x0A, 0xCA, 0xCB, 0x0B, 0xC9, 0x09, 0x08, 0xC8
679.byte 0xD8, 0x18, 0x19, 0xD9, 0x1B, 0xDB, 0xDA, 0x1A
680.byte 0x1E, 0xDE, 0xDF, 0x1F, 0xDD, 0x1D, 0x1C, 0xDC
681.byte 0x14, 0xD4, 0xD5, 0x15, 0xD7, 0x17, 0x16, 0xD6
682.byte 0xD2, 0x12, 0x13, 0xD3, 0x11, 0xD1, 0xD0, 0x10
683.byte 0xF0, 0x30, 0x31, 0xF1, 0x33, 0xF3, 0xF2, 0x32
684.byte 0x36, 0xF6, 0xF7, 0x37, 0xF5, 0x35, 0x34, 0xF4
685.byte 0x3C, 0xFC, 0xFD, 0x3D, 0xFF, 0x3F, 0x3E, 0xFE
686.byte 0xFA, 0x3A, 0x3B, 0xFB, 0x39, 0xF9, 0xF8, 0x38
687.byte 0x28, 0xE8, 0xE9, 0x29, 0xEB, 0x2B, 0x2A, 0xEA
688.byte 0xEE, 0x2E, 0x2F, 0xEF, 0x2D, 0xED, 0xEC, 0x2C
689.byte 0xE4, 0x24, 0x25, 0xE5, 0x27, 0xE7, 0xE6, 0x26
690.byte 0x22, 0xE2, 0xE3, 0x23, 0xE1, 0x21, 0x20, 0xE0
691.byte 0xA0, 0x60, 0x61, 0xA1, 0x63, 0xA3, 0xA2, 0x62
692.byte 0x66, 0xA6, 0xA7, 0x67, 0xA5, 0x65, 0x64, 0xA4
693.byte 0x6C, 0xAC, 0xAD, 0x6D, 0xAF, 0x6F, 0x6E, 0xAE
694.byte 0xAA, 0x6A, 0x6B, 0xAB, 0x69, 0xA9, 0xA8, 0x68
695.byte 0x78, 0xB8, 0xB9, 0x79, 0xBB, 0x7B, 0x7A, 0xBA
696.byte 0xBE, 0x7E, 0x7F, 0xBF, 0x7D, 0xBD, 0xBC, 0x7C
697.byte 0xB4, 0x74, 0x75, 0xB5, 0x77, 0xB7, 0xB6, 0x76
698.byte 0x72, 0xB2, 0xB3, 0x73, 0xB1, 0x71, 0x70, 0xB0
699.byte 0x50, 0x90, 0x91, 0x51, 0x93, 0x53, 0x52, 0x92
700.byte 0x96, 0x56, 0x57, 0x97, 0x55, 0x95, 0x94, 0x54
701.byte 0x9C, 0x5C, 0x5D, 0x9D, 0x5F, 0x9F, 0x9E, 0x5E
702.byte 0x5A, 0x9A, 0x9B, 0x5B, 0x99, 0x59, 0x58, 0x98
703.byte 0x88, 0x48, 0x49, 0x89, 0x4B, 0x8B, 0x8A, 0x4A
704.byte 0x4E, 0x8E, 0x8F, 0x4F, 0x8D, 0x4D, 0x4C, 0x8C
705.byte 0x44, 0x84, 0x85, 0x45, 0x87, 0x47, 0x46, 0x86
706.byte 0x82, 0x42, 0x43, 0x83, 0x41, 0x81, 0x80, 0x40
707
diff --git a/tmk_core/protocol/vusb/usbdrv/usbdrvasm20.inc b/tmk_core/protocol/vusb/usbdrv/usbdrvasm20.inc
deleted file mode 100644
index 303abaf64..000000000
--- a/tmk_core/protocol/vusb/usbdrv/usbdrvasm20.inc
+++ /dev/null
@@ -1,360 +0,0 @@
1/* Name: usbdrvasm20.inc
2 * Project: V-USB, virtual USB port for Atmel's(r) AVR(r) microcontrollers
3 * Author: Jeroen Benschop
4 * Based on usbdrvasm16.inc from Christian Starkjohann
5 * Creation Date: 2008-03-05
6 * Tabsize: 4
7 * Copyright: (c) 2008 by Jeroen Benschop and OBJECTIVE DEVELOPMENT Software GmbH
8 * License: GNU GPL v2 (see License.txt), GNU GPL v3 or proprietary (CommercialLicense.txt)
9 * Revision: $Id: usbdrvasm20.inc 740 2009-04-13 18:23:31Z cs $
10 */
11
12/* Do not link this file! Link usbdrvasm.S instead, which includes the
13 * appropriate implementation!
14 */
15
16/*
17General Description:
18This file is the 20 MHz version of the asssembler part of the USB driver. It
19requires a 20 MHz crystal (not a ceramic resonator and not a calibrated RC
20oscillator).
21
22See usbdrv.h for a description of the entire driver.
23
24Since almost all of this code is timing critical, don't change unless you
25really know what you are doing! Many parts require not only a maximum number
26of CPU cycles, but even an exact number of cycles!
27*/
28
29#define leap2 x3
30#ifdef __IAR_SYSTEMS_ASM__
31#define nextInst $+2
32#else
33#define nextInst .+0
34#endif
35
36;max stack usage: [ret(2), YL, SREG, YH, bitcnt, shift, x1, x2, x3, x4, cnt] = 12 bytes
37;nominal frequency: 20 MHz -> 13.333333 cycles per bit, 106.666667 cycles per byte
38; Numbers in brackets are clocks counted from center of last sync bit
39; when instruction starts
40;register use in receive loop:
41; shift assembles the byte currently being received
42; x1 holds the D+ and D- line state
43; x2 holds the previous line state
44; x4 (leap) is used to add a leap cycle once every three bytes received
45; X3 (leap2) is used to add a leap cycle once every three stuff bits received
46; bitcnt is used to determine when a stuff bit is due
47; cnt holds the number of bytes left in the receive buffer
48
49USB_INTR_VECTOR:
50;order of registers pushed: YL, SREG YH, [sofError], bitcnt, shift, x1, x2, x3, x4, cnt
51 push YL ;[-28] push only what is necessary to sync with edge ASAP
52 in YL, SREG ;[-26]
53 push YL ;[-25]
54 push YH ;[-23]
55;----------------------------------------------------------------------------
56; Synchronize with sync pattern:
57;----------------------------------------------------------------------------
58;sync byte (D-) pattern LSb to MSb: 01010100 [1 = idle = J, 0 = K]
59;sync up with J to K edge during sync pattern -- use fastest possible loops
60;The first part waits at most 1 bit long since we must be in sync pattern.
61;YL is guarenteed to be < 0x80 because I flag is clear. When we jump to
62;waitForJ, ensure that this prerequisite is met.
63waitForJ:
64 inc YL
65 sbis USBIN, USBMINUS
66 brne waitForJ ; just make sure we have ANY timeout
67waitForK:
68;The following code results in a sampling window of < 1/4 bit which meets the spec.
69 sbis USBIN, USBMINUS ;[-19]
70 rjmp foundK ;[-18]
71 sbis USBIN, USBMINUS
72 rjmp foundK
73 sbis USBIN, USBMINUS
74 rjmp foundK
75 sbis USBIN, USBMINUS
76 rjmp foundK
77 sbis USBIN, USBMINUS
78 rjmp foundK
79 sbis USBIN, USBMINUS
80 rjmp foundK
81 sbis USBIN, USBMINUS
82 rjmp foundK
83 sbis USBIN, USBMINUS
84 rjmp foundK
85 sbis USBIN, USBMINUS
86 rjmp foundK
87#if USB_COUNT_SOF
88 lds YL, usbSofCount
89 inc YL
90 sts usbSofCount, YL
91#endif /* USB_COUNT_SOF */
92#ifdef USB_SOF_HOOK
93 USB_SOF_HOOK
94#endif
95 rjmp sofError
96foundK: ;[-16]
97;{3, 5} after falling D- edge, average delay: 4 cycles
98;bit0 should be at 34 for center sampling. Currently at 4 so 30 cylces till bit 0 sample
99;use 1 bit time for setup purposes, then sample again. Numbers in brackets
100;are cycles from center of first sync (double K) bit after the instruction
101 push bitcnt ;[-16]
102; [---] ;[-15]
103 lds YL, usbInputBufOffset;[-14]
104; [---] ;[-13]
105 clr YH ;[-12]
106 subi YL, lo8(-(usbRxBuf));[-11] [rx loop init]
107 sbci YH, hi8(-(usbRxBuf));[-10] [rx loop init]
108 push shift ;[-9]
109; [---] ;[-8]
110 ldi shift,0x40 ;[-7] set msb to "1" so processing bit7 can be detected
111 nop2 ;[-6]
112; [---] ;[-5]
113 ldi bitcnt, 5 ;[-4] [rx loop init]
114 sbis USBIN, USBMINUS ;[-3] we want two bits K (sample 3 cycles too early)
115 rjmp haveTwoBitsK ;[-2]
116 pop shift ;[-1] undo the push from before
117 pop bitcnt ;[1]
118 rjmp waitForK ;[3] this was not the end of sync, retry
119; The entire loop from waitForK until rjmp waitForK above must not exceed two
120; bit times (= 27 cycles).
121
122;----------------------------------------------------------------------------
123; push more registers and initialize values while we sample the first bits:
124;----------------------------------------------------------------------------
125haveTwoBitsK:
126 push x1 ;[0]
127 push x2 ;[2]
128 push x3 ;[4] (leap2)
129 ldi leap2, 0x55 ;[6] add leap cycle on 2nd,5th,8th,... stuff bit
130 push x4 ;[7] == leap
131 ldi leap, 0x55 ;[9] skip leap cycle on 2nd,5th,8th,... byte received
132 push cnt ;[10]
133 ldi cnt, USB_BUFSIZE ;[12] [rx loop init]
134 ldi x2, 1<<USBPLUS ;[13] current line state is K state. D+=="1", D-=="0"
135bit0:
136 in x1, USBIN ;[0] sample line state
137 andi x1, USBMASK ;[1] filter only D+ and D- bits
138 rjmp handleBit ;[2] make bit0 14 cycles long
139
140;----------------------------------------------------------------------------
141; Process bit7. However, bit 6 still may need unstuffing.
142;----------------------------------------------------------------------------
143
144b6checkUnstuff:
145 dec bitcnt ;[9]
146 breq unstuff6 ;[10]
147bit7:
148 subi cnt, 1 ;[11] cannot use dec becaus it does not affect the carry flag
149 brcs overflow ;[12] Too many bytes received. Ignore packet
150 in x1, USBIN ;[0] sample line state
151 andi x1, USBMASK ;[1] filter only D+ and D- bits
152 cpse x1, x2 ;[2] when previous line state equals current line state, handle "1"
153 rjmp b7handle0 ;[3] when line state differs, handle "0"
154 sec ;[4]
155 ror shift ;[5] shift "1" into the data
156 st y+, shift ;[6] store the data into the buffer
157 ldi shift, 0x40 ;[7] reset data for receiving the next byte
158 subi leap, 0x55 ;[9] trick to introduce a leap cycle every 3 bytes
159 brcc nextInst ;[10 or 11] it will fail after 85 bytes. However low speed can only receive 11
160 dec bitcnt ;[11 or 12]
161 brne bit0 ;[12 or 13]
162 ldi x1, 1 ;[13 or 14] unstuffing bit 7
163 in bitcnt, USBIN ;[0] sample stuff bit
164 rjmp unstuff ;[1]
165
166b7handle0:
167 mov x2,x1 ;[5] Set x2 to current line state
168 ldi bitcnt, 6 ;[6]
169 lsr shift ;[7] shift "0" into the data
170 st y+, shift ;[8] store data into the buffer
171 ldi shift, 0x40 ;[10] reset data for receiving the next byte
172 subi leap, 0x55 ;[11] trick to introduce a leap cycle every 3 bytes
173 brcs bit0 ;[12] it will fail after 85 bytes. However low speed can only receive 11
174 rjmp bit0 ;[13]
175
176
177;----------------------------------------------------------------------------
178; Handle unstuff
179; x1==0xFF indicate unstuffing bit6
180;----------------------------------------------------------------------------
181
182unstuff6:
183 ldi x1,0xFF ;[12] indicate unstuffing bit 6
184 in bitcnt, USBIN ;[0] sample stuff bit
185 nop ;[1] fix timing
186unstuff: ;b0-5 b6 b7
187 mov x2,bitcnt ;[3] [2] [3] Set x2 to match line state
188 subi leap2, 0x55 ;[4] [3] [4] delay loop
189 brcs nextInst ;[5] [4] [5] add one cycle every three stuff bits
190 sbci leap2,0 ;[6] [5] [6]
191 ldi bitcnt,6 ;[7] [6] [7] reset bit stuff counter
192 andi x2, USBMASK ;[8] [7] [8] only keep D+ and D-
193 cpi x1,0 ;[9] [8] [9]
194 brmi bit7 ;[10] [9] [10] finished unstuffing bit6 When x1<0
195 breq bitloop ;[11] --- [11] finished unstuffing bit0-5 when x1=0
196 nop ;--- --- [12]
197 in x1, USBIN ;--- --- [0] sample line state for bit0
198 andi x1, USBMASK ;--- --- [1] filter only D+ and D- bits
199 rjmp handleBit ;--- --- [2] make bit0 14 cycles long
200
201;----------------------------------------------------------------------------
202; Receiver loop (numbers in brackets are cycles within byte after instr)
203;----------------------------------------------------------------------------
204bitloop:
205 in x1, USBIN ;[0] sample line state
206 andi x1, USBMASK ;[1] filter only D+ and D- bits
207 breq se0 ;[2] both lines are low so handle se0
208handleBit:
209 cpse x1, x2 ;[3] when previous line state equals current line state, handle "1"
210 rjmp handle0 ;[4] when line state differs, handle "0"
211 sec ;[5]
212 ror shift ;[6] shift "1" into the data
213 brcs b6checkUnstuff ;[7] When after shift C is set, next bit is bit7
214 nop2 ;[8]
215 dec bitcnt ;[10]
216 brne bitloop ;[11]
217 ldi x1,0 ;[12] indicate unstuff for bit other than bit6 or bit7
218 in bitcnt, USBIN ;[0] sample stuff bit
219 rjmp unstuff ;[1]
220
221handle0:
222 mov x2, x1 ;[6] Set x2 to current line state
223 ldi bitcnt, 6 ;[7] reset unstuff counter.
224 lsr shift ;[8] shift "0" into the data
225 brcs bit7 ;[9] When after shift C is set, next bit is bit7
226 nop ;[10]
227 rjmp bitloop ;[11]
228
229;----------------------------------------------------------------------------
230; End of receive loop. Now start handling EOP
231;----------------------------------------------------------------------------
232
233macro POP_STANDARD ; 14 cycles
234 pop cnt
235 pop x4
236 pop x3
237 pop x2
238 pop x1
239 pop shift
240 pop bitcnt
241 endm
242macro POP_RETI ; 7 cycles
243 pop YH
244 pop YL
245 out SREG, YL
246 pop YL
247 endm
248
249
250
251#include "asmcommon.inc"
252
253; USB spec says:
254; idle = J
255; J = (D+ = 0), (D- = 1)
256; K = (D+ = 1), (D- = 0)
257; Spec allows 7.5 bit times from EOP to SOP for replies
258; 7.5 bit times is 100 cycles. This implementation arrives a bit later at se0
259; then specified in the include file but there is plenty of time
260
261bitstuffN:
262 eor x1, x4 ;[8]
263 ldi x2, 0 ;[9]
264 nop2 ;[10]
265 out USBOUT, x1 ;[12] <-- out
266 rjmp didStuffN ;[0]
267
268bitstuff7:
269 eor x1, x4 ;[6]
270 ldi x2, 0 ;[7] Carry is zero due to brcc
271 rol shift ;[8] compensate for ror shift at branch destination
272 nop2 ;[9]
273 rjmp didStuff7 ;[11]
274
275sendNakAndReti:
276 ldi x3, USBPID_NAK ;[-18]
277 rjmp sendX3AndReti ;[-17]
278sendAckAndReti:
279 ldi cnt, USBPID_ACK ;[-17]
280sendCntAndReti:
281 mov x3, cnt ;[-16]
282sendX3AndReti:
283 ldi YL, 20 ;[-15] x3==r20 address is 20
284 ldi YH, 0 ;[-14]
285 ldi cnt, 2 ;[-13]
286; rjmp usbSendAndReti fallthrough
287
288;usbSend:
289;pointer to data in 'Y'
290;number of bytes in 'cnt' -- including sync byte [range 2 ... 12]
291;uses: x1...x4, btcnt, shift, cnt, Y
292;Numbers in brackets are time since first bit of sync pattern is sent
293;We don't match the transfer rate exactly (don't insert leap cycles every third
294;byte) because the spec demands only 1.5% precision anyway.
295usbSendAndReti: ; 12 cycles until SOP
296 in x2, USBDDR ;[-12]
297 ori x2, USBMASK ;[-11]
298 sbi USBOUT, USBMINUS;[-10] prepare idle state; D+ and D- must have been 0 (no pullups)
299 in x1, USBOUT ;[-8] port mirror for tx loop
300 out USBDDR, x2 ;[-7] <- acquire bus
301; need not init x2 (bitstuff history) because sync starts with 0
302 ldi x4, USBMASK ;[-6] exor mask
303 ldi shift, 0x80 ;[-5] sync byte is first byte sent
304txByteLoop:
305 ldi bitcnt, 0x49 ;[-4] [10] binary 01001001
306txBitLoop:
307 sbrs shift, 0 ;[-3] [10] [11]
308 eor x1, x4 ;[-2] [11] [12]
309 out USBOUT, x1 ;[-1] [12] [13] <-- out N
310 ror shift ;[0] [13] [14]
311 ror x2 ;[1]
312didStuffN:
313 nop2 ;[2]
314 nop ;[4]
315 cpi x2, 0xfc ;[5]
316 brcc bitstuffN ;[6]
317 lsr bitcnt ;[7]
318 brcc txBitLoop ;[8]
319 brne txBitLoop ;[9]
320
321 sbrs shift, 0 ;[10]
322 eor x1, x4 ;[11]
323didStuff7:
324 out USBOUT, x1 ;[-1] [13] <-- out 7
325 ror shift ;[0] [14]
326 ror x2 ;[1]
327 nop ;[2]
328 cpi x2, 0xfc ;[3]
329 brcc bitstuff7 ;[4]
330 ld shift, y+ ;[5]
331 dec cnt ;[7]
332 brne txByteLoop ;[8]
333;make SE0:
334 cbr x1, USBMASK ;[9] prepare SE0 [spec says EOP may be 25 to 30 cycles]
335 lds x2, usbNewDeviceAddr;[10]
336 lsl x2 ;[12] we compare with left shifted address
337 out USBOUT, x1 ;[13] <-- out SE0 -- from now 2 bits = 22 cycles until bus idle
338 subi YL, 20 + 2 ;[0] Only assign address on data packets, not ACK/NAK in x3
339 sbci YH, 0 ;[1]
340;2006-03-06: moved transfer of new address to usbDeviceAddr from C-Code to asm:
341;set address only after data packet was sent, not after handshake
342 breq skipAddrAssign ;[2]
343 sts usbDeviceAddr, x2; if not skipped: SE0 is one cycle longer
344skipAddrAssign:
345;end of usbDeviceAddress transfer
346 ldi x2, 1<<USB_INTR_PENDING_BIT;[4] int0 occurred during TX -- clear pending flag
347 USB_STORE_PENDING(x2) ;[5]
348 ori x1, USBIDLE ;[6]
349 in x2, USBDDR ;[7]
350 cbr x2, USBMASK ;[8] set both pins to input
351 mov x3, x1 ;[9]
352 cbr x3, USBMASK ;[10] configure no pullup on both pins
353 ldi x4, 5 ;[11]
354se0Delay:
355 dec x4 ;[12] [15] [18] [21] [24]
356 brne se0Delay ;[13] [16] [19] [22] [25]
357 out USBOUT, x1 ;[26] <-- out J (idle) -- end of SE0 (EOP signal)
358 out USBDDR, x2 ;[27] <-- release bus now
359 out USBOUT, x3 ;[28] <-- ensure no pull-up resistors are active
360 rjmp doReturn
diff --git a/tmk_core/protocol/vusb/usbdrv/usbportability.h b/tmk_core/protocol/vusb/usbdrv/usbportability.h
deleted file mode 100644
index 206041097..000000000
--- a/tmk_core/protocol/vusb/usbdrv/usbportability.h
+++ /dev/null
@@ -1,146 +0,0 @@
1/* Name: usbportability.h
2 * Project: V-USB, virtual USB port for Atmel's(r) AVR(r) microcontrollers
3 * Author: Christian Starkjohann
4 * Creation Date: 2008-06-17
5 * Tabsize: 4
6 * Copyright: (c) 2008 by OBJECTIVE DEVELOPMENT Software GmbH
7 * License: GNU GPL v2 (see License.txt), GNU GPL v3 or proprietary (CommercialLicense.txt)
8 * This Revision: $Id: usbportability.h 785 2010-05-30 17:57:07Z cs $
9 */
10
11// clang-format off
12
13/*
14General Description:
15This header is intended to contain all (or at least most of) the compiler
16and library dependent stuff. The C code is written for avr-gcc and avr-libc.
17The API of other development environments is converted to gcc's and avr-libc's
18API by means of defines.
19
20This header also contains all system includes since they depend on the
21development environment.
22
23Thanks to Oleg Semyonov for his help with the IAR tools port!
24*/
25
26#ifndef __usbportability_h_INCLUDED__
27#define __usbportability_h_INCLUDED__
28
29/* We check explicitly for IAR and CodeVision. Default is avr-gcc/avr-libc. */
30
31/* ------------------------------------------------------------------------- */
32#if defined __IAR_SYSTEMS_ICC__ || defined __IAR_SYSTEMS_ASM__ /* check for IAR */
33/* ------------------------------------------------------------------------- */
34
35#ifndef ENABLE_BIT_DEFINITIONS
36# define ENABLE_BIT_DEFINITIONS 1 /* Enable bit definitions */
37#endif
38
39/* Include IAR headers */
40#include <ioavr.h>
41#ifndef __IAR_SYSTEMS_ASM__
42# include <inavr.h>
43#endif
44
45#define __attribute__(arg) /* not supported on IAR */
46
47#ifdef __IAR_SYSTEMS_ASM__
48# define __ASSEMBLER__ /* IAR does not define standard macro for asm */
49#endif
50
51#ifdef __HAS_ELPM__
52# define PROGMEM __farflash
53#else
54# define PROGMEM __flash
55#endif
56
57#define USB_READ_FLASH(addr) (*(PROGMEM char *)(addr))
58
59/* The following definitions are not needed by the driver, but may be of some
60 * help if you port a gcc based project to IAR.
61 */
62#define cli() __disable_interrupt()
63#define sei() __enable_interrupt()
64#define wdt_reset() __watchdog_reset()
65#define _BV(x) (1 << (x))
66
67/* assembler compatibility macros */
68#define nop2 rjmp $+2 /* jump to next instruction */
69#define XL r26
70#define XH r27
71#define YL r28
72#define YH r29
73#define ZL r30
74#define ZH r31
75#define lo8(x) LOW(x)
76#define hi8(x) (((x)>>8) & 0xff) /* not HIGH to allow XLINK to make a proper range check */
77
78/* Depending on the device you use, you may get problems with the way usbdrv.h
79 * handles the differences between devices. Since IAR does not use #defines
80 * for MCU registers, we can't check for the existence of a particular
81 * register with an #ifdef. If the autodetection mechanism fails, include
82 * definitions for the required USB_INTR_* macros in your usbconfig.h. See
83 * usbconfig-prototype.h and usbdrv.h for details.
84 */
85
86/* ------------------------------------------------------------------------- */
87#elif __CODEVISIONAVR__ /* check for CodeVision AVR */
88/* ------------------------------------------------------------------------- */
89/* This port is not working (yet) */
90
91/* #define F_CPU _MCU_CLOCK_FREQUENCY_ seems to be defined automatically */
92
93#include <io.h>
94#include <delay.h>
95
96#define __attribute__(arg) /* not supported on IAR */
97
98#define PROGMEM __flash
99#define USB_READ_FLASH(addr) (*(PROGMEM char *)(addr))
100
101#ifndef __ASSEMBLER__
102static inline void cli(void)
103{
104 #asm("cli");
105}
106static inline void sei(void)
107{
108 #asm("sei");
109}
110#endif
111#define _delay_ms(t) delay_ms(t)
112#define _BV(x) (1 << (x))
113#define USB_CFG_USE_SWITCH_STATEMENT 1 /* macro for if() cascase fails for unknown reason */
114
115#define macro .macro
116#define endm .endmacro
117#define nop2 rjmp .+0 /* jump to next instruction */
118
119/* ------------------------------------------------------------------------- */
120#else /* default development environment is avr-gcc/avr-libc */
121/* ------------------------------------------------------------------------- */
122
123#include <avr/io.h>
124#ifdef __ASSEMBLER__
125# define _VECTOR(N) __vector_ ## N /* io.h does not define this for asm */
126#else
127# include <avr/pgmspace.h>
128#endif
129
130#if USB_CFG_DRIVER_FLASH_PAGE
131# define USB_READ_FLASH(addr) pgm_read_byte_far(((long)USB_CFG_DRIVER_FLASH_PAGE << 16) | (long)(addr))
132#else
133# define USB_READ_FLASH(addr) pgm_read_byte(addr)
134#endif
135
136#define macro .macro
137#define endm .endm
138#define nop2 rjmp .+0 /* jump to next instruction */
139
140#endif /* development environment */
141
142/* for conveniecne, ensure that PRG_RDB exists */
143#ifndef PRG_RDB
144# define PRG_RDB(addr) USB_READ_FLASH(addr)
145#endif
146#endif /* __usbportability_h_INCLUDED__ */
diff --git a/tmk_core/protocol/vusb/vusb.c b/tmk_core/protocol/vusb/vusb.c
index 4c8e6003f..5feff889a 100644
--- a/tmk_core/protocol/vusb/vusb.c
+++ b/tmk_core/protocol/vusb/vusb.c
@@ -18,7 +18,7 @@ along with this program. If not, see <http://www.gnu.org/licenses/>.
18#include <avr/wdt.h> 18#include <avr/wdt.h>
19#include <util/delay.h> 19#include <util/delay.h>
20#include <stdint.h> 20#include <stdint.h>
21#include "usbdrv.h" 21#include <usbdrv/usbdrv.h>
22#include "usbconfig.h" 22#include "usbconfig.h"
23#include "host.h" 23#include "host.h"
24#include "report.h" 24#include "report.h"
@@ -290,12 +290,12 @@ usbMsgLen_t usbFunctionSetup(uchar data[8]) {
290 if (rq->bRequest == USBRQ_HID_GET_REPORT) { 290 if (rq->bRequest == USBRQ_HID_GET_REPORT) {
291 debug("GET_REPORT:"); 291 debug("GET_REPORT:");
292 /* we only have one report type, so don't look at wValue */ 292 /* we only have one report type, so don't look at wValue */
293 usbMsgPtr = (void *)&keyboard_report; 293 usbMsgPtr = (usbMsgPtr_t)&keyboard_report;
294 return sizeof(keyboard_report); 294 return sizeof(keyboard_report);
295 } else if (rq->bRequest == USBRQ_HID_GET_IDLE) { 295 } else if (rq->bRequest == USBRQ_HID_GET_IDLE) {
296 debug("GET_IDLE: "); 296 debug("GET_IDLE: ");
297 // debug_hex(vusb_idle_rate); 297 // debug_hex(vusb_idle_rate);
298 usbMsgPtr = &vusb_idle_rate; 298 usbMsgPtr = (usbMsgPtr_t)&vusb_idle_rate;
299 return 1; 299 return 1;
300 } else if (rq->bRequest == USBRQ_HID_SET_IDLE) { 300 } else if (rq->bRequest == USBRQ_HID_SET_IDLE) {
301 vusb_idle_rate = rq->wValue.bytes[1]; 301 vusb_idle_rate = rq->wValue.bytes[1];
@@ -815,29 +815,29 @@ USB_PUBLIC usbMsgLen_t usbFunctionDescriptor(struct usbRequest *rq) {
815 */ 815 */
816 switch (rq->wValue.bytes[1]) { 816 switch (rq->wValue.bytes[1]) {
817 case USBDESCR_DEVICE: 817 case USBDESCR_DEVICE:
818 usbMsgPtr = (unsigned char *)&usbDeviceDescriptor; 818 usbMsgPtr = (usbMsgPtr_t)&usbDeviceDescriptor;
819 len = sizeof(usbDeviceDescriptor_t); 819 len = sizeof(usbDeviceDescriptor_t);
820 break; 820 break;
821 case USBDESCR_CONFIG: 821 case USBDESCR_CONFIG:
822 usbMsgPtr = (unsigned char *)&usbConfigurationDescriptor; 822 usbMsgPtr = (usbMsgPtr_t)&usbConfigurationDescriptor;
823 len = sizeof(usbConfigurationDescriptor_t); 823 len = sizeof(usbConfigurationDescriptor_t);
824 break; 824 break;
825 case USBDESCR_STRING: 825 case USBDESCR_STRING:
826 switch (rq->wValue.bytes[0]) { 826 switch (rq->wValue.bytes[0]) {
827 case 0: 827 case 0:
828 usbMsgPtr = (unsigned char *)&usbStringDescriptorZero; 828 usbMsgPtr = (usbMsgPtr_t)&usbStringDescriptorZero;
829 len = usbStringDescriptorZero.header.bLength; 829 len = usbStringDescriptorZero.header.bLength;
830 break; 830 break;
831 case 1: // iManufacturer 831 case 1: // iManufacturer
832 usbMsgPtr = (unsigned char *)&usbStringDescriptorManufacturer; 832 usbMsgPtr = (usbMsgPtr_t)&usbStringDescriptorManufacturer;
833 len = usbStringDescriptorManufacturer.header.bLength; 833 len = usbStringDescriptorManufacturer.header.bLength;
834 break; 834 break;
835 case 2: // iProduct 835 case 2: // iProduct
836 usbMsgPtr = (unsigned char *)&usbStringDescriptorProduct; 836 usbMsgPtr = (usbMsgPtr_t)&usbStringDescriptorProduct;
837 len = usbStringDescriptorProduct.header.bLength; 837 len = usbStringDescriptorProduct.header.bLength;
838 break; 838 break;
839 case 3: // iSerialNumber 839 case 3: // iSerialNumber
840 usbMsgPtr = (unsigned char *)&usbStringDescriptorSerial; 840 usbMsgPtr = (usbMsgPtr_t)&usbStringDescriptorSerial;
841 len = usbStringDescriptorSerial.header.bLength; 841 len = usbStringDescriptorSerial.header.bLength;
842 break; 842 break;
843 } 843 }
@@ -845,24 +845,24 @@ USB_PUBLIC usbMsgLen_t usbFunctionDescriptor(struct usbRequest *rq) {
845 case USBDESCR_HID: 845 case USBDESCR_HID:
846 switch (rq->wValue.bytes[0]) { 846 switch (rq->wValue.bytes[0]) {
847 case KEYBOARD_INTERFACE: 847 case KEYBOARD_INTERFACE:
848 usbMsgPtr = (unsigned char *)&usbConfigurationDescriptor.keyboardHID; 848 usbMsgPtr = (usbMsgPtr_t)&usbConfigurationDescriptor.keyboardHID;
849 len = sizeof(usbHIDDescriptor_t); 849 len = sizeof(usbHIDDescriptor_t);
850 break; 850 break;
851#if defined(RAW_ENABLE) 851#if defined(RAW_ENABLE)
852 case RAW_INTERFACE: 852 case RAW_INTERFACE:
853 usbMsgPtr = (unsigned char *)&usbConfigurationDescriptor.rawHID; 853 usbMsgPtr = (usbMsgPtr_t)&usbConfigurationDescriptor.rawHID;
854 len = sizeof(usbHIDDescriptor_t); 854 len = sizeof(usbHIDDescriptor_t);
855 break; 855 break;
856#endif 856#endif
857#if defined(MOUSE_ENABLE) || defined(EXTRAKEY_ENABLE) 857#if defined(MOUSE_ENABLE) || defined(EXTRAKEY_ENABLE)
858 case MOUSE_EXTRA_INTERFACE: 858 case MOUSE_EXTRA_INTERFACE:
859 usbMsgPtr = (unsigned char *)&usbConfigurationDescriptor.mouseExtraHID; 859 usbMsgPtr = (usbMsgPtr_t)&usbConfigurationDescriptor.mouseExtraHID;
860 len = sizeof(usbHIDDescriptor_t); 860 len = sizeof(usbHIDDescriptor_t);
861 break; 861 break;
862#endif 862#endif
863#if defined(CONSOLE_ENABLE) 863#if defined(CONSOLE_ENABLE)
864 case CONSOLE_INTERFACE: 864 case CONSOLE_INTERFACE:
865 usbMsgPtr = (unsigned char *)&usbConfigurationDescriptor.consoleHID; 865 usbMsgPtr = (usbMsgPtr_t)&usbConfigurationDescriptor.consoleHID;
866 len = sizeof(usbHIDDescriptor_t); 866 len = sizeof(usbHIDDescriptor_t);
867 break; 867 break;
868#endif 868#endif
@@ -872,24 +872,24 @@ USB_PUBLIC usbMsgLen_t usbFunctionDescriptor(struct usbRequest *rq) {
872 /* interface index */ 872 /* interface index */
873 switch (rq->wIndex.word) { 873 switch (rq->wIndex.word) {
874 case KEYBOARD_INTERFACE: 874 case KEYBOARD_INTERFACE:
875 usbMsgPtr = (unsigned char *)keyboard_hid_report; 875 usbMsgPtr = (usbMsgPtr_t)keyboard_hid_report;
876 len = sizeof(keyboard_hid_report); 876 len = sizeof(keyboard_hid_report);
877 break; 877 break;
878#if defined(RAW_ENABLE) 878#if defined(RAW_ENABLE)
879 case RAW_INTERFACE: 879 case RAW_INTERFACE:
880 usbMsgPtr = (unsigned char *)raw_hid_report; 880 usbMsgPtr = (usbMsgPtr_t)raw_hid_report;
881 len = sizeof(raw_hid_report); 881 len = sizeof(raw_hid_report);
882 break; 882 break;
883#endif 883#endif
884#if defined(MOUSE_ENABLE) || defined(EXTRAKEY_ENABLE) 884#if defined(MOUSE_ENABLE) || defined(EXTRAKEY_ENABLE)
885 case MOUSE_EXTRA_INTERFACE: 885 case MOUSE_EXTRA_INTERFACE:
886 usbMsgPtr = (unsigned char *)mouse_extra_hid_report; 886 usbMsgPtr = (usbMsgPtr_t)mouse_extra_hid_report;
887 len = sizeof(mouse_extra_hid_report); 887 len = sizeof(mouse_extra_hid_report);
888 break; 888 break;
889#endif 889#endif
890#if defined(CONSOLE_ENABLE) 890#if defined(CONSOLE_ENABLE)
891 case CONSOLE_INTERFACE: 891 case CONSOLE_INTERFACE:
892 usbMsgPtr = (unsigned char *)console_hid_report; 892 usbMsgPtr = (usbMsgPtr_t)console_hid_report;
893 len = sizeof(console_hid_report); 893 len = sizeof(console_hid_report);
894 break; 894 break;
895#endif 895#endif