diff options
69 files changed, 2563 insertions, 8236 deletions
diff --git a/build_keyboard.mk b/build_keyboard.mk index 410870487..b4e1efd9e 100644 --- a/build_keyboard.mk +++ b/build_keyboard.mk | |||
| @@ -16,7 +16,6 @@ include common.mk | |||
| 16 | KEYBOARD_FILESAFE := $(subst /,_,$(KEYBOARD)) | 16 | KEYBOARD_FILESAFE := $(subst /,_,$(KEYBOARD)) |
| 17 | TARGET ?= $(KEYBOARD_FILESAFE)_$(KEYMAP) | 17 | TARGET ?= $(KEYBOARD_FILESAFE)_$(KEYMAP) |
| 18 | KEYBOARD_OUTPUT := $(BUILD_DIR)/obj_$(KEYBOARD_FILESAFE) | 18 | KEYBOARD_OUTPUT := $(BUILD_DIR)/obj_$(KEYBOARD_FILESAFE) |
| 19 | STM32_PATH := quantum/stm32 | ||
| 20 | 19 | ||
| 21 | # Force expansion | 20 | # Force expansion |
| 22 | TARGET := $(TARGET) | 21 | TARGET := $(TARGET) |
| @@ -138,7 +137,7 @@ endif | |||
| 138 | 137 | ||
| 139 | ifeq ($(strip $(CONVERT_TO_PROTON_C)), yes) | 138 | ifeq ($(strip $(CONVERT_TO_PROTON_C)), yes) |
| 140 | TARGET := $(TARGET)_proton_c | 139 | TARGET := $(TARGET)_proton_c |
| 141 | include $(STM32_PATH)/proton_c.mk | 140 | include platforms/chibios/GENERIC_STM32_F303XC/configs/proton_c.mk |
| 142 | OPT_DEFS += -DCONVERT_TO_PROTON_C | 141 | OPT_DEFS += -DCONVERT_TO_PROTON_C |
| 143 | endif | 142 | endif |
| 144 | 143 | ||
| @@ -148,12 +147,6 @@ endif | |||
| 148 | 147 | ||
| 149 | include quantum/mcu_selection.mk | 148 | include quantum/mcu_selection.mk |
| 150 | 149 | ||
| 151 | ifdef MCU_FAMILY | ||
| 152 | OPT_DEFS += -DQMK_STM32 | ||
| 153 | KEYBOARD_PATHS += $(STM32_PATH) | ||
| 154 | endif | ||
| 155 | |||
| 156 | |||
| 157 | # Find all the C source files to be compiled in subfolders. | 150 | # Find all the C source files to be compiled in subfolders. |
| 158 | KEYBOARD_SRC := | 151 | KEYBOARD_SRC := |
| 159 | 152 | ||
diff --git a/drivers/boards/BLACKPILL_STM32_F401/board.c b/drivers/boards/BLACKPILL_STM32_F401/board.c deleted file mode 100644 index 330e06c8a..000000000 --- a/drivers/boards/BLACKPILL_STM32_F401/board.c +++ /dev/null | |||
| @@ -1,250 +0,0 @@ | |||
| 1 | /* | ||
| 2 | ChibiOS - Copyright (C) 2006..2018 Giovanni Di Sirio | ||
| 3 | |||
| 4 | Licensed under the Apache License, Version 2.0 (the "License"); | ||
| 5 | you may not use this file except in compliance with the License. | ||
| 6 | You may obtain a copy of the License at | ||
| 7 | |||
| 8 | http://www.apache.org/licenses/LICENSE-2.0 | ||
| 9 | |||
| 10 | Unless required by applicable law or agreed to in writing, software | ||
| 11 | distributed under the License is distributed on an "AS IS" BASIS, | ||
| 12 | WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. | ||
| 13 | See the License for the specific language governing permissions and | ||
| 14 | limitations under the License. | ||
| 15 | */ | ||
| 16 | |||
| 17 | /* | ||
| 18 | * This file has been automatically generated using ChibiStudio board | ||
| 19 | * generator plugin. Do not edit manually. | ||
| 20 | */ | ||
| 21 | |||
| 22 | #include "hal.h" | ||
| 23 | #include "stm32_gpio.h" | ||
| 24 | |||
| 25 | /*===========================================================================*/ | ||
| 26 | /* Driver local definitions. */ | ||
| 27 | /*===========================================================================*/ | ||
| 28 | |||
| 29 | /*===========================================================================*/ | ||
| 30 | /* Driver exported variables. */ | ||
| 31 | /*===========================================================================*/ | ||
| 32 | |||
| 33 | /*===========================================================================*/ | ||
| 34 | /* Driver local variables and types. */ | ||
| 35 | /*===========================================================================*/ | ||
| 36 | |||
| 37 | /** | ||
| 38 | * @brief Type of STM32 GPIO port setup. | ||
| 39 | */ | ||
| 40 | typedef struct { | ||
| 41 | uint32_t moder; | ||
| 42 | uint32_t otyper; | ||
| 43 | uint32_t ospeedr; | ||
| 44 | uint32_t pupdr; | ||
| 45 | uint32_t odr; | ||
| 46 | uint32_t afrl; | ||
| 47 | uint32_t afrh; | ||
| 48 | } gpio_setup_t; | ||
| 49 | |||
| 50 | /** | ||
| 51 | * @brief Type of STM32 GPIO initialization data. | ||
| 52 | */ | ||
| 53 | typedef struct { | ||
| 54 | #if STM32_HAS_GPIOA || defined(__DOXYGEN__) | ||
| 55 | gpio_setup_t PAData; | ||
| 56 | #endif | ||
| 57 | #if STM32_HAS_GPIOB || defined(__DOXYGEN__) | ||
| 58 | gpio_setup_t PBData; | ||
| 59 | #endif | ||
| 60 | #if STM32_HAS_GPIOC || defined(__DOXYGEN__) | ||
| 61 | gpio_setup_t PCData; | ||
| 62 | #endif | ||
| 63 | #if STM32_HAS_GPIOD || defined(__DOXYGEN__) | ||
| 64 | gpio_setup_t PDData; | ||
| 65 | #endif | ||
| 66 | #if STM32_HAS_GPIOE || defined(__DOXYGEN__) | ||
| 67 | gpio_setup_t PEData; | ||
| 68 | #endif | ||
| 69 | #if STM32_HAS_GPIOF || defined(__DOXYGEN__) | ||
| 70 | gpio_setup_t PFData; | ||
| 71 | #endif | ||
| 72 | #if STM32_HAS_GPIOG || defined(__DOXYGEN__) | ||
| 73 | gpio_setup_t PGData; | ||
| 74 | #endif | ||
| 75 | #if STM32_HAS_GPIOH || defined(__DOXYGEN__) | ||
| 76 | gpio_setup_t PHData; | ||
| 77 | #endif | ||
| 78 | #if STM32_HAS_GPIOI || defined(__DOXYGEN__) | ||
| 79 | gpio_setup_t PIData; | ||
| 80 | #endif | ||
| 81 | #if STM32_HAS_GPIOJ || defined(__DOXYGEN__) | ||
| 82 | gpio_setup_t PJData; | ||
| 83 | #endif | ||
| 84 | #if STM32_HAS_GPIOK || defined(__DOXYGEN__) | ||
| 85 | gpio_setup_t PKData; | ||
| 86 | #endif | ||
| 87 | } gpio_config_t; | ||
| 88 | |||
| 89 | /** | ||
| 90 | * @brief STM32 GPIO static initialization data. | ||
| 91 | */ | ||
| 92 | static const gpio_config_t gpio_default_config = { | ||
| 93 | #if STM32_HAS_GPIOA | ||
| 94 | {VAL_GPIOA_MODER, VAL_GPIOA_OTYPER, VAL_GPIOA_OSPEEDR, VAL_GPIOA_PUPDR, VAL_GPIOA_ODR, VAL_GPIOA_AFRL, VAL_GPIOA_AFRH}, | ||
| 95 | #endif | ||
| 96 | #if STM32_HAS_GPIOB | ||
| 97 | {VAL_GPIOB_MODER, VAL_GPIOB_OTYPER, VAL_GPIOB_OSPEEDR, VAL_GPIOB_PUPDR, VAL_GPIOB_ODR, VAL_GPIOB_AFRL, VAL_GPIOB_AFRH}, | ||
| 98 | #endif | ||
| 99 | #if STM32_HAS_GPIOC | ||
| 100 | {VAL_GPIOC_MODER, VAL_GPIOC_OTYPER, VAL_GPIOC_OSPEEDR, VAL_GPIOC_PUPDR, VAL_GPIOC_ODR, VAL_GPIOC_AFRL, VAL_GPIOC_AFRH}, | ||
| 101 | #endif | ||
| 102 | #if STM32_HAS_GPIOD | ||
| 103 | {VAL_GPIOD_MODER, VAL_GPIOD_OTYPER, VAL_GPIOD_OSPEEDR, VAL_GPIOD_PUPDR, VAL_GPIOD_ODR, VAL_GPIOD_AFRL, VAL_GPIOD_AFRH}, | ||
| 104 | #endif | ||
| 105 | #if STM32_HAS_GPIOE | ||
| 106 | {VAL_GPIOE_MODER, VAL_GPIOE_OTYPER, VAL_GPIOE_OSPEEDR, VAL_GPIOE_PUPDR, VAL_GPIOE_ODR, VAL_GPIOE_AFRL, VAL_GPIOE_AFRH}, | ||
| 107 | #endif | ||
| 108 | #if STM32_HAS_GPIOF | ||
| 109 | {VAL_GPIOF_MODER, VAL_GPIOF_OTYPER, VAL_GPIOF_OSPEEDR, VAL_GPIOF_PUPDR, VAL_GPIOF_ODR, VAL_GPIOF_AFRL, VAL_GPIOF_AFRH}, | ||
| 110 | #endif | ||
| 111 | #if STM32_HAS_GPIOG | ||
| 112 | {VAL_GPIOG_MODER, VAL_GPIOG_OTYPER, VAL_GPIOG_OSPEEDR, VAL_GPIOG_PUPDR, VAL_GPIOG_ODR, VAL_GPIOG_AFRL, VAL_GPIOG_AFRH}, | ||
| 113 | #endif | ||
| 114 | #if STM32_HAS_GPIOH | ||
| 115 | {VAL_GPIOH_MODER, VAL_GPIOH_OTYPER, VAL_GPIOH_OSPEEDR, VAL_GPIOH_PUPDR, VAL_GPIOH_ODR, VAL_GPIOH_AFRL, VAL_GPIOH_AFRH}, | ||
| 116 | #endif | ||
| 117 | #if STM32_HAS_GPIOI | ||
| 118 | {VAL_GPIOI_MODER, VAL_GPIOI_OTYPER, VAL_GPIOI_OSPEEDR, VAL_GPIOI_PUPDR, VAL_GPIOI_ODR, VAL_GPIOI_AFRL, VAL_GPIOI_AFRH}, | ||
| 119 | #endif | ||
| 120 | #if STM32_HAS_GPIOJ | ||
| 121 | {VAL_GPIOJ_MODER, VAL_GPIOJ_OTYPER, VAL_GPIOJ_OSPEEDR, VAL_GPIOJ_PUPDR, VAL_GPIOJ_ODR, VAL_GPIOJ_AFRL, VAL_GPIOJ_AFRH}, | ||
| 122 | #endif | ||
| 123 | #if STM32_HAS_GPIOK | ||
| 124 | {VAL_GPIOK_MODER, VAL_GPIOK_OTYPER, VAL_GPIOK_OSPEEDR, VAL_GPIOK_PUPDR, VAL_GPIOK_ODR, VAL_GPIOK_AFRL, VAL_GPIOK_AFRH} | ||
| 125 | #endif | ||
| 126 | }; | ||
| 127 | |||
| 128 | /*===========================================================================*/ | ||
| 129 | /* Driver local functions. */ | ||
| 130 | /*===========================================================================*/ | ||
| 131 | |||
| 132 | static void gpio_init(stm32_gpio_t *gpiop, const gpio_setup_t *config) { | ||
| 133 | gpiop->OTYPER = config->otyper; | ||
| 134 | gpiop->OSPEEDR = config->ospeedr; | ||
| 135 | gpiop->PUPDR = config->pupdr; | ||
| 136 | gpiop->ODR = config->odr; | ||
| 137 | gpiop->AFRL = config->afrl; | ||
| 138 | gpiop->AFRH = config->afrh; | ||
| 139 | gpiop->MODER = config->moder; | ||
| 140 | } | ||
| 141 | |||
| 142 | static void stm32_gpio_init(void) { | ||
| 143 | /* Enabling GPIO-related clocks, the mask comes from the | ||
| 144 | registry header file.*/ | ||
| 145 | rccResetAHB1(STM32_GPIO_EN_MASK); | ||
| 146 | rccEnableAHB1(STM32_GPIO_EN_MASK, true); | ||
| 147 | |||
| 148 | /* Initializing all the defined GPIO ports.*/ | ||
| 149 | #if STM32_HAS_GPIOA | ||
| 150 | gpio_init(GPIOA, &gpio_default_config.PAData); | ||
| 151 | #endif | ||
| 152 | #if STM32_HAS_GPIOB | ||
| 153 | gpio_init(GPIOB, &gpio_default_config.PBData); | ||
| 154 | #endif | ||
| 155 | #if STM32_HAS_GPIOC | ||
| 156 | gpio_init(GPIOC, &gpio_default_config.PCData); | ||
| 157 | #endif | ||
| 158 | #if STM32_HAS_GPIOD | ||
| 159 | gpio_init(GPIOD, &gpio_default_config.PDData); | ||
| 160 | #endif | ||
| 161 | #if STM32_HAS_GPIOE | ||
| 162 | gpio_init(GPIOE, &gpio_default_config.PEData); | ||
| 163 | #endif | ||
| 164 | #if STM32_HAS_GPIOF | ||
| 165 | gpio_init(GPIOF, &gpio_default_config.PFData); | ||
| 166 | #endif | ||
| 167 | #if STM32_HAS_GPIOG | ||
| 168 | gpio_init(GPIOG, &gpio_default_config.PGData); | ||
| 169 | #endif | ||
| 170 | #if STM32_HAS_GPIOH | ||
| 171 | gpio_init(GPIOH, &gpio_default_config.PHData); | ||
| 172 | #endif | ||
| 173 | #if STM32_HAS_GPIOI | ||
| 174 | gpio_init(GPIOI, &gpio_default_config.PIData); | ||
| 175 | #endif | ||
| 176 | #if STM32_HAS_GPIOJ | ||
| 177 | gpio_init(GPIOJ, &gpio_default_config.PJData); | ||
| 178 | #endif | ||
| 179 | #if STM32_HAS_GPIOK | ||
| 180 | gpio_init(GPIOK, &gpio_default_config.PKData); | ||
| 181 | #endif | ||
| 182 | } | ||
| 183 | |||
| 184 | /*===========================================================================*/ | ||
| 185 | /* Driver interrupt handlers. */ | ||
| 186 | /*===========================================================================*/ | ||
| 187 | |||
| 188 | /*===========================================================================*/ | ||
| 189 | /* Driver exported functions. */ | ||
| 190 | /*===========================================================================*/ | ||
| 191 | |||
| 192 | __attribute__((weak)) void enter_bootloader_mode_if_requested(void) {} | ||
| 193 | |||
| 194 | /** | ||
| 195 | * @brief Early initialization code. | ||
| 196 | * @details GPIO ports and system clocks are initialized before everything | ||
| 197 | * else. | ||
| 198 | */ | ||
| 199 | void __early_init(void) { | ||
| 200 | enter_bootloader_mode_if_requested(); | ||
| 201 | |||
| 202 | stm32_gpio_init(); | ||
| 203 | stm32_clock_init(); | ||
| 204 | } | ||
| 205 | |||
| 206 | #if HAL_USE_SDC || defined(__DOXYGEN__) | ||
| 207 | /** | ||
| 208 | * @brief SDC card detection. | ||
| 209 | */ | ||
| 210 | bool sdc_lld_is_card_inserted(SDCDriver *sdcp) { | ||
| 211 | (void)sdcp; | ||
| 212 | /* TODO: Fill the implementation.*/ | ||
| 213 | return true; | ||
| 214 | } | ||
| 215 | |||
| 216 | /** | ||
| 217 | * @brief SDC card write protection detection. | ||
| 218 | */ | ||
| 219 | bool sdc_lld_is_write_protected(SDCDriver *sdcp) { | ||
| 220 | (void)sdcp; | ||
| 221 | /* TODO: Fill the implementation.*/ | ||
| 222 | return false; | ||
| 223 | } | ||
| 224 | #endif /* HAL_USE_SDC */ | ||
| 225 | |||
| 226 | #if HAL_USE_MMC_SPI || defined(__DOXYGEN__) | ||
| 227 | /** | ||
| 228 | * @brief MMC_SPI card detection. | ||
| 229 | */ | ||
| 230 | bool mmc_lld_is_card_inserted(MMCDriver *mmcp) { | ||
| 231 | (void)mmcp; | ||
| 232 | /* TODO: Fill the implementation.*/ | ||
| 233 | return true; | ||
| 234 | } | ||
| 235 | |||
| 236 | /** | ||
| 237 | * @brief MMC_SPI card write protection detection. | ||
| 238 | */ | ||
| 239 | bool mmc_lld_is_write_protected(MMCDriver *mmcp) { | ||
| 240 | (void)mmcp; | ||
| 241 | /* TODO: Fill the implementation.*/ | ||
| 242 | return false; | ||
| 243 | } | ||
| 244 | #endif | ||
| 245 | |||
| 246 | /** | ||
| 247 | * @brief Board-specific initialization code. | ||
| 248 | * @todo Add your board-specific code, if any. | ||
| 249 | */ | ||
| 250 | void boardInit(void) {} | ||
diff --git a/drivers/boards/BLACKPILL_STM32_F401/board.h b/drivers/boards/BLACKPILL_STM32_F401/board.h deleted file mode 100644 index 2d1cd9ff7..000000000 --- a/drivers/boards/BLACKPILL_STM32_F401/board.h +++ /dev/null | |||
| @@ -1,568 +0,0 @@ | |||
| 1 | /* | ||
| 2 | ChibiOS - Copyright (C) 2006..2018 Giovanni Di Sirio | ||
| 3 | |||
| 4 | Licensed under the Apache License, Version 2.0 (the "License"); | ||
| 5 | you may not use this file except in compliance with the License. | ||
| 6 | You may obtain a copy of the License at | ||
| 7 | |||
| 8 | http://www.apache.org/licenses/LICENSE-2.0 | ||
| 9 | |||
| 10 | Unless required by applicable law or agreed to in writing, software | ||
| 11 | distributed under the License is distributed on an "AS IS" BASIS, | ||
| 12 | WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. | ||
| 13 | See the License for the specific language governing permissions and | ||
| 14 | limitations under the License. | ||
| 15 | */ | ||
| 16 | |||
| 17 | /* | ||
| 18 | * This file has been automatically generated using ChibiStudio board | ||
| 19 | * generator plugin. Do not edit manually. | ||
| 20 | */ | ||
| 21 | |||
| 22 | #ifndef BOARD_H | ||
| 23 | #define BOARD_H | ||
| 24 | |||
| 25 | /*===========================================================================*/ | ||
| 26 | /* Driver constants. */ | ||
| 27 | /*===========================================================================*/ | ||
| 28 | |||
| 29 | /* | ||
| 30 | * Setup for STM32F401CCU6 black pill board. | ||
| 31 | */ | ||
| 32 | |||
| 33 | /* | ||
| 34 | * Board identifier. | ||
| 35 | */ | ||
| 36 | #define BOARD_BLACKPILL_STM32_F401 | ||
| 37 | #define BOARD_NAME "STM32F401CCU6 blackpill" | ||
| 38 | |||
| 39 | /* | ||
| 40 | * Allow Board to boot USB without extra A9 hardware/software config | ||
| 41 | */ | ||
| 42 | #define BOARD_OTG_NOVBUSSENS 1 | ||
| 43 | |||
| 44 | /* | ||
| 45 | * Board oscillators-related settings. | ||
| 46 | */ | ||
| 47 | #if !defined(STM32_LSECLK) | ||
| 48 | # define STM32_LSECLK 32768U | ||
| 49 | #endif | ||
| 50 | |||
| 51 | #if !defined(STM32_HSECLK) | ||
| 52 | # define STM32_HSECLK 25000000U | ||
| 53 | #endif | ||
| 54 | |||
| 55 | /* | ||
| 56 | * Board voltages. | ||
| 57 | * Required for performance limits calculation. | ||
| 58 | */ | ||
| 59 | #define STM32_VDD 300U | ||
| 60 | |||
| 61 | /* | ||
| 62 | * MCU type as defined in the ST header. | ||
| 63 | */ | ||
| 64 | #define STM32F401xC | ||
| 65 | |||
| 66 | /* | ||
| 67 | * IO pins assignments. | ||
| 68 | */ | ||
| 69 | #define GPIOA_BUTTON 0U | ||
| 70 | #define GPIOA_PIN1 1U | ||
| 71 | #define GPIOA_PIN2 2U | ||
| 72 | #define GPIOA_PIN3 3U | ||
| 73 | #define GPIOA_CS43L22_LRCK 4U | ||
| 74 | #define GPIOA_L3GD20_SCL 5U | ||
| 75 | #define GPIOA_L3GD20_SD0 6U | ||
| 76 | #define GPIOA_L3GD20_SDI 7U | ||
| 77 | #define GPIOA_PIN8 8U | ||
| 78 | #define GPIOA_VBUS_FS 9U | ||
| 79 | #define GPIOA_OTG_FS_ID 10U | ||
| 80 | #define GPIOA_OTG_FS_DM 11U | ||
| 81 | #define GPIOA_OTG_FS_DP 12U | ||
| 82 | #define GPIOA_SWDIO 13U | ||
| 83 | #define GPIOA_SWCLK 14U | ||
| 84 | #define GPIOA_PIN15 15U | ||
| 85 | |||
| 86 | #define GPIOB_PIN0 0U | ||
| 87 | #define GPIOB_PIN1 1U | ||
| 88 | #define GPIOB_PIN2 2U | ||
| 89 | #define GPIOB_SWO 3U | ||
| 90 | #define GPIOB_PIN4 4U | ||
| 91 | #define GPIOB_PIN5 5U | ||
| 92 | #define GPIOB_LSM303DLHC_SCL 6U | ||
| 93 | #define GPIOB_PIN7 7U | ||
| 94 | #define GPIOB_PIN8 8U | ||
| 95 | #define GPIOB_LSM303DLHC_SDA 9U | ||
| 96 | #define GPIOB_MP45DT02_CLK_IN 10U | ||
| 97 | #define GPIOB_PIN11 11U | ||
| 98 | #define GPIOB_PIN12 12U | ||
| 99 | #define GPIOB_PIN13 13U | ||
| 100 | #define GPIOB_PIN14 14U | ||
| 101 | #define GPIOB_PIN15 15U | ||
| 102 | |||
| 103 | #define GPIOC_OTG_FS_POWER_ON 0U | ||
| 104 | #define GPIOC_PIN1 1U | ||
| 105 | #define GPIOC_PIN2 2U | ||
| 106 | #define GPIOC_CS43L22_AIN4x 3U | ||
| 107 | #define GPIOC_MP45DT02_PDM_OUT 3U | ||
| 108 | #define GPIOC_PIN4 4U | ||
| 109 | #define GPIOC_PIN5 5U | ||
| 110 | #define GPIOC_PIN6 6U | ||
| 111 | #define GPIOC_CS43L22_MCLK 7U | ||
| 112 | #define GPIOC_PIN8 8U | ||
| 113 | #define GPIOC_PIN9 9U | ||
| 114 | #define GPIOC_CS43L22_SCLK 10U | ||
| 115 | #define GPIOC_PIN11 11U | ||
| 116 | #define GPIOC_CS43L22_SDIN 12U | ||
| 117 | #define GPIOC_PIN13 13U | ||
| 118 | #define GPIOC_OSC32_IN 14U | ||
| 119 | #define GPIOC_OSC32_OUT 15U | ||
| 120 | |||
| 121 | #define GPIOD_PIN0 0U | ||
| 122 | #define GPIOD_PIN1 1U | ||
| 123 | #define GPIOD_PIN2 2U | ||
| 124 | #define GPIOD_PIN3 3U | ||
| 125 | #define GPIOD_CS43L22_RESET 4U | ||
| 126 | #define GPIOD_OverCurrent 5U | ||
| 127 | #define GPIOD_PIN6 6U | ||
| 128 | #define GPIOD_PIN7 7U | ||
| 129 | #define GPIOD_PIN8 8U | ||
| 130 | #define GPIOD_PIN9 9U | ||
| 131 | #define GPIOD_PIN10 10U | ||
| 132 | #define GPIOD_PIN11 11U | ||
| 133 | #define GPIOD_LED4 12U | ||
| 134 | #define GPIOD_LED3 13U | ||
| 135 | #define GPIOD_LED5 14U | ||
| 136 | #define GPIOD_LED6 15U | ||
| 137 | |||
| 138 | #define GPIOE_L3GD20_INT1 0U | ||
| 139 | #define GPIOE_L3GD20_INT2 1U | ||
| 140 | #define GPIOE_LSM303DLHC_DRDY 2U | ||
| 141 | #define GPIOE_L3GD20_CS 3U | ||
| 142 | #define GPIOE_LSM303DLHC_INT1 4U | ||
| 143 | #define GPIOE_LSM303DLHC_INT2 5U | ||
| 144 | #define GPIOE_PIN6 6U | ||
| 145 | #define GPIOE_PIN7 7U | ||
| 146 | #define GPIOE_PIN8 8U | ||
| 147 | #define GPIOE_PIN9 9U | ||
| 148 | #define GPIOE_PIN10 10U | ||
| 149 | #define GPIOE_PIN11 11U | ||
| 150 | #define GPIOE_PIN12 12U | ||
| 151 | #define GPIOE_PIN13 13U | ||
| 152 | #define GPIOE_PIN14 14U | ||
| 153 | #define GPIOE_PIN15 15U | ||
| 154 | |||
| 155 | #define GPIOF_PIN0 0U | ||
| 156 | #define GPIOF_PIN1 1U | ||
| 157 | #define GPIOF_PIN2 2U | ||
| 158 | #define GPIOF_PIN3 3U | ||
| 159 | #define GPIOF_PIN4 4U | ||
| 160 | #define GPIOF_PIN5 5U | ||
| 161 | #define GPIOF_PIN6 6U | ||
| 162 | #define GPIOF_PIN7 7U | ||
| 163 | #define GPIOF_PIN8 8U | ||
| 164 | #define GPIOF_PIN9 9U | ||
| 165 | #define GPIOF_PIN10 10U | ||
| 166 | #define GPIOF_PIN11 11U | ||
| 167 | #define GPIOF_PIN12 12U | ||
| 168 | #define GPIOF_PIN13 13U | ||
| 169 | #define GPIOF_PIN14 14U | ||
| 170 | #define GPIOF_PIN15 15U | ||
| 171 | |||
| 172 | #define GPIOG_PIN0 0U | ||
| 173 | #define GPIOG_PIN1 1U | ||
| 174 | #define GPIOG_PIN2 2U | ||
| 175 | #define GPIOG_PIN3 3U | ||
| 176 | #define GPIOG_PIN4 4U | ||
| 177 | #define GPIOG_PIN5 5U | ||
| 178 | #define GPIOG_PIN6 6U | ||
| 179 | #define GPIOG_PIN7 7U | ||
| 180 | #define GPIOG_PIN8 8U | ||
| 181 | #define GPIOG_PIN9 9U | ||
| 182 | #define GPIOG_PIN10 10U | ||
| 183 | #define GPIOG_PIN11 11U | ||
| 184 | #define GPIOG_PIN12 12U | ||
| 185 | #define GPIOG_PIN13 13U | ||
| 186 | #define GPIOG_PIN14 14U | ||
| 187 | #define GPIOG_PIN15 15U | ||
| 188 | |||
| 189 | #define GPIOH_OSC_IN 0U | ||
| 190 | #define GPIOH_OSC_OUT 1U | ||
| 191 | #define GPIOH_PIN2 2U | ||
| 192 | #define GPIOH_PIN3 3U | ||
| 193 | #define GPIOH_PIN4 4U | ||
| 194 | #define GPIOH_PIN5 5U | ||
| 195 | #define GPIOH_PIN6 6U | ||
| 196 | #define GPIOH_PIN7 7U | ||
| 197 | #define GPIOH_PIN8 8U | ||
| 198 | #define GPIOH_PIN9 9U | ||
| 199 | #define GPIOH_PIN10 10U | ||
| 200 | #define GPIOH_PIN11 11U | ||
| 201 | #define GPIOH_PIN12 12U | ||
| 202 | #define GPIOH_PIN13 13U | ||
| 203 | #define GPIOH_PIN14 14U | ||
| 204 | #define GPIOH_PIN15 15U | ||
| 205 | |||
| 206 | #define GPIOI_PIN0 0U | ||
| 207 | #define GPIOI_PIN1 1U | ||
| 208 | #define GPIOI_PIN2 2U | ||
| 209 | #define GPIOI_PIN3 3U | ||
| 210 | #define GPIOI_PIN4 4U | ||
| 211 | #define GPIOI_PIN5 5U | ||
| 212 | #define GPIOI_PIN6 6U | ||
| 213 | #define GPIOI_PIN7 7U | ||
| 214 | #define GPIOI_PIN8 8U | ||
| 215 | #define GPIOI_PIN9 9U | ||
| 216 | #define GPIOI_PIN10 10U | ||
| 217 | #define GPIOI_PIN11 11U | ||
| 218 | #define GPIOI_PIN12 12U | ||
| 219 | #define GPIOI_PIN13 13U | ||
| 220 | #define GPIOI_PIN14 14U | ||
| 221 | #define GPIOI_PIN15 15U | ||
| 222 | |||
| 223 | /* | ||
| 224 | * IO lines assignments. | ||
| 225 | */ | ||
| 226 | #define LINE_BUTTON PAL_LINE(GPIOA, 0U) | ||
| 227 | #define LINE_CS43L22_LRCK PAL_LINE(GPIOA, 4U) | ||
| 228 | #define LINE_L3GD20_SCL PAL_LINE(GPIOA, 5U) | ||
| 229 | #define LINE_L3GD20_SD0 PAL_LINE(GPIOA, 6U) | ||
| 230 | #define LINE_L3GD20_SDI PAL_LINE(GPIOA, 7U) | ||
| 231 | #define LINE_VBUS_FS PAL_LINE(GPIOA, 9U) | ||
| 232 | #define LINE_OTG_FS_ID PAL_LINE(GPIOA, 10U) | ||
| 233 | #define LINE_OTG_FS_DM PAL_LINE(GPIOA, 11U) | ||
| 234 | #define LINE_OTG_FS_DP PAL_LINE(GPIOA, 12U) | ||
| 235 | #define LINE_SWDIO PAL_LINE(GPIOA, 13U) | ||
| 236 | #define LINE_SWCLK PAL_LINE(GPIOA, 14U) | ||
| 237 | #define LINE_SWO PAL_LINE(GPIOB, 3U) | ||
| 238 | #define LINE_LSM303DLHC_SCL PAL_LINE(GPIOB, 6U) | ||
| 239 | #define LINE_LSM303DLHC_SDA PAL_LINE(GPIOB, 9U) | ||
| 240 | #define LINE_MP45DT02_CLK_IN PAL_LINE(GPIOB, 10U) | ||
| 241 | #define LINE_OTG_FS_POWER_ON PAL_LINE(GPIOC, 0U) | ||
| 242 | #define LINE_CS43L22_AIN4x PAL_LINE(GPIOC, 3U) | ||
| 243 | #define LINE_MP45DT02_PDM_OUT PAL_LINE(GPIOC, 3U) | ||
| 244 | #define LINE_CS43L22_MCLK PAL_LINE(GPIOC, 7U) | ||
| 245 | #define LINE_CS43L22_SCLK PAL_LINE(GPIOC, 10U) | ||
| 246 | #define LINE_CS43L22_SDIN PAL_LINE(GPIOC, 12U) | ||
| 247 | #define LINE_OSC32_IN PAL_LINE(GPIOC, 14U) | ||
| 248 | #define LINE_OSC32_OUT PAL_LINE(GPIOC, 15U) | ||
| 249 | #define LINE_CS43L22_RESET PAL_LINE(GPIOD, 4U) | ||
| 250 | #define LINE_OverCurrent PAL_LINE(GPIOD, 5U) | ||
| 251 | #define LINE_LED4 PAL_LINE(GPIOD, 12U) | ||
| 252 | #define LINE_LED3 PAL_LINE(GPIOD, 13U) | ||
| 253 | #define LINE_LED5 PAL_LINE(GPIOD, 14U) | ||
| 254 | #define LINE_LED6 PAL_LINE(GPIOD, 15U) | ||
| 255 | #define LINE_L3GD20_INT1 PAL_LINE(GPIOE, 0U) | ||
| 256 | #define LINE_L3GD20_INT2 PAL_LINE(GPIOE, 1U) | ||
| 257 | #define LINE_LSM303DLHC_DRDY PAL_LINE(GPIOE, 2U) | ||
| 258 | #define LINE_L3GD20_CS PAL_LINE(GPIOE, 3U) | ||
| 259 | #define LINE_LSM303DLHC_INT1 PAL_LINE(GPIOE, 4U) | ||
| 260 | #define LINE_LSM303DLHC_INT2 PAL_LINE(GPIOE, 5U) | ||
| 261 | #define LINE_OSC_IN PAL_LINE(GPIOH, 0U) | ||
| 262 | #define LINE_OSC_OUT PAL_LINE(GPIOH, 1U) | ||
| 263 | |||
| 264 | /*===========================================================================*/ | ||
| 265 | /* Driver pre-compile time settings. */ | ||
| 266 | /*===========================================================================*/ | ||
| 267 | |||
| 268 | /*===========================================================================*/ | ||
| 269 | /* Derived constants and error checks. */ | ||
| 270 | /*===========================================================================*/ | ||
| 271 | |||
| 272 | /*===========================================================================*/ | ||
| 273 | /* Driver data structures and types. */ | ||
| 274 | /*===========================================================================*/ | ||
| 275 | |||
| 276 | /*===========================================================================*/ | ||
| 277 | /* Driver macros. */ | ||
| 278 | /*===========================================================================*/ | ||
| 279 | |||
| 280 | /* | ||
| 281 | * I/O ports initial setup, this configuration is established soon after reset | ||
| 282 | * in the initialization code. | ||
| 283 | * Please refer to the STM32 Reference Manual for details. | ||
| 284 | */ | ||
| 285 | #define PIN_MODE_INPUT(n) (0U << ((n)*2U)) | ||
| 286 | #define PIN_MODE_OUTPUT(n) (1U << ((n)*2U)) | ||
| 287 | #define PIN_MODE_ALTERNATE(n) (2U << ((n)*2U)) | ||
| 288 | #define PIN_MODE_ANALOG(n) (3U << ((n)*2U)) | ||
| 289 | #define PIN_ODR_LOW(n) (0U << (n)) | ||
| 290 | #define PIN_ODR_HIGH(n) (1U << (n)) | ||
| 291 | #define PIN_OTYPE_PUSHPULL(n) (0U << (n)) | ||
| 292 | #define PIN_OTYPE_OPENDRAIN(n) (1U << (n)) | ||
| 293 | #define PIN_OSPEED_VERYLOW(n) (0U << ((n)*2U)) | ||
| 294 | #define PIN_OSPEED_LOW(n) (1U << ((n)*2U)) | ||
| 295 | #define PIN_OSPEED_MEDIUM(n) (2U << ((n)*2U)) | ||
| 296 | #define PIN_OSPEED_HIGH(n) (3U << ((n)*2U)) | ||
| 297 | #define PIN_PUPDR_FLOATING(n) (0U << ((n)*2U)) | ||
| 298 | #define PIN_PUPDR_PULLUP(n) (1U << ((n)*2U)) | ||
| 299 | #define PIN_PUPDR_PULLDOWN(n) (2U << ((n)*2U)) | ||
| 300 | #define PIN_AFIO_AF(n, v) ((v) << (((n) % 8U) * 4U)) | ||
| 301 | |||
| 302 | /* | ||
| 303 | * GPIOA setup: | ||
| 304 | * | ||
| 305 | * PA0 - BUTTON (input floating). | ||
| 306 | * PA1 - PIN1 (input pullup). | ||
| 307 | * PA2 - PIN2 (input pullup). | ||
| 308 | * PA3 - PIN3 (input pullup). | ||
| 309 | * PA4 - CS43L22_LRCK (alternate 6). | ||
| 310 | * PA5 - L3GD20_SCL (alternate 5). | ||
| 311 | * PA6 - L3GD20_SD0 (alternate 5). | ||
| 312 | * PA7 - L3GD20_SDI (alternate 5). | ||
| 313 | * PA8 - PIN8 (input pullup). | ||
| 314 | * PA9 - VBUS_FS (input floating). | ||
| 315 | * PA10 - OTG_FS_ID (alternate 10). | ||
| 316 | * PA11 - OTG_FS_DM (alternate 10). | ||
| 317 | * PA12 - OTG_FS_DP (alternate 10). | ||
| 318 | * PA13 - SWDIO (alternate 0). | ||
| 319 | * PA14 - SWCLK (alternate 0). | ||
| 320 | * PA15 - PIN15 (input pullup). | ||
| 321 | */ | ||
| 322 | #define VAL_GPIOA_MODER (PIN_MODE_INPUT(GPIOA_BUTTON) | PIN_MODE_INPUT(GPIOA_PIN1) | PIN_MODE_INPUT(GPIOA_PIN2) | PIN_MODE_INPUT(GPIOA_PIN3) | PIN_MODE_ALTERNATE(GPIOA_CS43L22_LRCK) | PIN_MODE_ALTERNATE(GPIOA_L3GD20_SCL) | PIN_MODE_ALTERNATE(GPIOA_L3GD20_SD0) | PIN_MODE_ALTERNATE(GPIOA_L3GD20_SDI) | PIN_MODE_INPUT(GPIOA_PIN8) | PIN_MODE_INPUT(GPIOA_VBUS_FS) | PIN_MODE_ALTERNATE(GPIOA_OTG_FS_ID) | PIN_MODE_ALTERNATE(GPIOA_OTG_FS_DM) | PIN_MODE_ALTERNATE(GPIOA_OTG_FS_DP) | PIN_MODE_ALTERNATE(GPIOA_SWDIO) | PIN_MODE_ALTERNATE(GPIOA_SWCLK) | PIN_MODE_INPUT(GPIOA_PIN15)) | ||
| 323 | #define VAL_GPIOA_OTYPER (PIN_OTYPE_PUSHPULL(GPIOA_BUTTON) | PIN_OTYPE_PUSHPULL(GPIOA_PIN1) | PIN_OTYPE_PUSHPULL(GPIOA_PIN2) | PIN_OTYPE_PUSHPULL(GPIOA_PIN3) | PIN_OTYPE_PUSHPULL(GPIOA_CS43L22_LRCK) | PIN_OTYPE_PUSHPULL(GPIOA_L3GD20_SCL) | PIN_OTYPE_PUSHPULL(GPIOA_L3GD20_SD0) | PIN_OTYPE_PUSHPULL(GPIOA_L3GD20_SDI) | PIN_OTYPE_PUSHPULL(GPIOA_PIN8) | PIN_OTYPE_PUSHPULL(GPIOA_VBUS_FS) | PIN_OTYPE_PUSHPULL(GPIOA_OTG_FS_ID) | PIN_OTYPE_PUSHPULL(GPIOA_OTG_FS_DM) | PIN_OTYPE_PUSHPULL(GPIOA_OTG_FS_DP) | PIN_OTYPE_PUSHPULL(GPIOA_SWDIO) | PIN_OTYPE_PUSHPULL(GPIOA_SWCLK) | PIN_OTYPE_PUSHPULL(GPIOA_PIN15)) | ||
| 324 | #define VAL_GPIOA_OSPEEDR (PIN_OSPEED_HIGH(GPIOA_BUTTON) | PIN_OSPEED_HIGH(GPIOA_PIN1) | PIN_OSPEED_HIGH(GPIOA_PIN2) | PIN_OSPEED_HIGH(GPIOA_PIN3) | PIN_OSPEED_HIGH(GPIOA_CS43L22_LRCK) | PIN_OSPEED_HIGH(GPIOA_L3GD20_SCL) | PIN_OSPEED_HIGH(GPIOA_L3GD20_SD0) | PIN_OSPEED_HIGH(GPIOA_L3GD20_SDI) | PIN_OSPEED_HIGH(GPIOA_PIN8) | PIN_OSPEED_HIGH(GPIOA_VBUS_FS) | PIN_OSPEED_HIGH(GPIOA_OTG_FS_ID) | PIN_OSPEED_HIGH(GPIOA_OTG_FS_DM) | PIN_OSPEED_HIGH(GPIOA_OTG_FS_DP) | PIN_OSPEED_HIGH(GPIOA_SWDIO) | PIN_OSPEED_HIGH(GPIOA_SWCLK) | PIN_OSPEED_HIGH(GPIOA_PIN15)) | ||
| 325 | #define VAL_GPIOA_PUPDR (PIN_PUPDR_FLOATING(GPIOA_BUTTON) | PIN_PUPDR_PULLUP(GPIOA_PIN1) | PIN_PUPDR_PULLUP(GPIOA_PIN2) | PIN_PUPDR_PULLUP(GPIOA_PIN3) | PIN_PUPDR_FLOATING(GPIOA_CS43L22_LRCK) | PIN_PUPDR_FLOATING(GPIOA_L3GD20_SCL) | PIN_PUPDR_PULLUP(GPIOA_L3GD20_SD0) | PIN_PUPDR_PULLUP(GPIOA_L3GD20_SDI) | PIN_PUPDR_PULLUP(GPIOA_PIN8) | PIN_PUPDR_FLOATING(GPIOA_VBUS_FS) | PIN_PUPDR_FLOATING(GPIOA_OTG_FS_ID) | PIN_PUPDR_FLOATING(GPIOA_OTG_FS_DM) | PIN_PUPDR_FLOATING(GPIOA_OTG_FS_DP) | PIN_PUPDR_FLOATING(GPIOA_SWDIO) | PIN_PUPDR_FLOATING(GPIOA_SWCLK) | PIN_PUPDR_PULLUP(GPIOA_PIN15)) | ||
| 326 | #define VAL_GPIOA_ODR (PIN_ODR_HIGH(GPIOA_BUTTON) | PIN_ODR_HIGH(GPIOA_PIN1) | PIN_ODR_HIGH(GPIOA_PIN2) | PIN_ODR_HIGH(GPIOA_PIN3) | PIN_ODR_HIGH(GPIOA_CS43L22_LRCK) | PIN_ODR_HIGH(GPIOA_L3GD20_SCL) | PIN_ODR_HIGH(GPIOA_L3GD20_SD0) | PIN_ODR_HIGH(GPIOA_L3GD20_SDI) | PIN_ODR_HIGH(GPIOA_PIN8) | PIN_ODR_HIGH(GPIOA_VBUS_FS) | PIN_ODR_HIGH(GPIOA_OTG_FS_ID) | PIN_ODR_HIGH(GPIOA_OTG_FS_DM) | PIN_ODR_HIGH(GPIOA_OTG_FS_DP) | PIN_ODR_HIGH(GPIOA_SWDIO) | PIN_ODR_HIGH(GPIOA_SWCLK) | PIN_ODR_HIGH(GPIOA_PIN15)) | ||
| 327 | #define VAL_GPIOA_AFRL (PIN_AFIO_AF(GPIOA_BUTTON, 0U) | PIN_AFIO_AF(GPIOA_PIN1, 0U) | PIN_AFIO_AF(GPIOA_PIN2, 0U) | PIN_AFIO_AF(GPIOA_PIN3, 0U) | PIN_AFIO_AF(GPIOA_CS43L22_LRCK, 6U) | PIN_AFIO_AF(GPIOA_L3GD20_SCL, 5U) | PIN_AFIO_AF(GPIOA_L3GD20_SD0, 5U) | PIN_AFIO_AF(GPIOA_L3GD20_SDI, 5U)) | ||
| 328 | #define VAL_GPIOA_AFRH (PIN_AFIO_AF(GPIOA_PIN8, 0U) | PIN_AFIO_AF(GPIOA_VBUS_FS, 0U) | PIN_AFIO_AF(GPIOA_OTG_FS_ID, 10U) | PIN_AFIO_AF(GPIOA_OTG_FS_DM, 10U) | PIN_AFIO_AF(GPIOA_OTG_FS_DP, 10U) | PIN_AFIO_AF(GPIOA_SWDIO, 0U) | PIN_AFIO_AF(GPIOA_SWCLK, 0U) | PIN_AFIO_AF(GPIOA_PIN15, 0U)) | ||
| 329 | |||
| 330 | /* | ||
| 331 | * GPIOB setup: | ||
| 332 | * | ||
| 333 | * PB0 - PIN0 (input pullup). | ||
| 334 | * PB1 - PIN1 (input pullup). | ||
| 335 | * PB2 - PIN2 (input pullup). | ||
| 336 | * PB3 - SWO (alternate 0). | ||
| 337 | * PB4 - PIN4 (input pullup). | ||
| 338 | * PB5 - PIN5 (input pullup). | ||
| 339 | * PB6 - LSM303DLHC_SCL (alternate 4). | ||
| 340 | * PB7 - PIN7 (input pullup). | ||
| 341 | * PB8 - PIN8 (input pullup). | ||
| 342 | * PB9 - LSM303DLHC_SDA (alternate 4). | ||
| 343 | * PB10 - MP45DT02_CLK_IN (alternate 5). | ||
| 344 | * PB11 - PIN11 (input pullup). | ||
| 345 | * PB12 - PIN12 (input pullup). | ||
| 346 | * PB13 - PIN13 (input pullup). | ||
| 347 | * PB14 - PIN14 (input pullup). | ||
| 348 | * PB15 - PIN15 (input pullup). | ||
| 349 | */ | ||
| 350 | #define VAL_GPIOB_MODER (PIN_MODE_INPUT(GPIOB_PIN0) | PIN_MODE_INPUT(GPIOB_PIN1) | PIN_MODE_INPUT(GPIOB_PIN2) | PIN_MODE_ALTERNATE(GPIOB_SWO) | PIN_MODE_INPUT(GPIOB_PIN4) | PIN_MODE_INPUT(GPIOB_PIN5) | PIN_MODE_ALTERNATE(GPIOB_LSM303DLHC_SCL) | PIN_MODE_INPUT(GPIOB_PIN7) | PIN_MODE_INPUT(GPIOB_PIN8) | PIN_MODE_ALTERNATE(GPIOB_LSM303DLHC_SDA) | PIN_MODE_ALTERNATE(GPIOB_MP45DT02_CLK_IN) | PIN_MODE_INPUT(GPIOB_PIN11) | PIN_MODE_INPUT(GPIOB_PIN12) | PIN_MODE_INPUT(GPIOB_PIN13) | PIN_MODE_INPUT(GPIOB_PIN14) | PIN_MODE_INPUT(GPIOB_PIN15)) | ||
| 351 | #define VAL_GPIOB_OTYPER (PIN_OTYPE_PUSHPULL(GPIOB_PIN0) | PIN_OTYPE_PUSHPULL(GPIOB_PIN1) | PIN_OTYPE_PUSHPULL(GPIOB_PIN2) | PIN_OTYPE_PUSHPULL(GPIOB_SWO) | PIN_OTYPE_PUSHPULL(GPIOB_PIN4) | PIN_OTYPE_PUSHPULL(GPIOB_PIN5) | PIN_OTYPE_PUSHPULL(GPIOB_LSM303DLHC_SCL) | PIN_OTYPE_PUSHPULL(GPIOB_PIN7) | PIN_OTYPE_PUSHPULL(GPIOB_PIN8) | PIN_OTYPE_PUSHPULL(GPIOB_LSM303DLHC_SDA) | PIN_OTYPE_PUSHPULL(GPIOB_MP45DT02_CLK_IN) | PIN_OTYPE_PUSHPULL(GPIOB_PIN11) | PIN_OTYPE_PUSHPULL(GPIOB_PIN12) | PIN_OTYPE_PUSHPULL(GPIOB_PIN13) | PIN_OTYPE_PUSHPULL(GPIOB_PIN14) | PIN_OTYPE_PUSHPULL(GPIOB_PIN15)) | ||
| 352 | #define VAL_GPIOB_OSPEEDR (PIN_OSPEED_HIGH(GPIOB_PIN0) | PIN_OSPEED_HIGH(GPIOB_PIN1) | PIN_OSPEED_HIGH(GPIOB_PIN2) | PIN_OSPEED_HIGH(GPIOB_SWO) | PIN_OSPEED_HIGH(GPIOB_PIN4) | PIN_OSPEED_HIGH(GPIOB_PIN5) | PIN_OSPEED_HIGH(GPIOB_LSM303DLHC_SCL) | PIN_OSPEED_HIGH(GPIOB_PIN7) | PIN_OSPEED_HIGH(GPIOB_PIN8) | PIN_OSPEED_HIGH(GPIOB_LSM303DLHC_SDA) | PIN_OSPEED_HIGH(GPIOB_MP45DT02_CLK_IN) | PIN_OSPEED_HIGH(GPIOB_PIN11) | PIN_OSPEED_HIGH(GPIOB_PIN12) | PIN_OSPEED_HIGH(GPIOB_PIN13) | PIN_OSPEED_HIGH(GPIOB_PIN14) | PIN_OSPEED_HIGH(GPIOB_PIN15)) | ||
| 353 | #define VAL_GPIOB_PUPDR (PIN_PUPDR_PULLUP(GPIOB_PIN0) | PIN_PUPDR_PULLUP(GPIOB_PIN1) | PIN_PUPDR_PULLUP(GPIOB_PIN2) | PIN_PUPDR_PULLUP(GPIOB_SWO) | PIN_PUPDR_PULLUP(GPIOB_PIN4) | PIN_PUPDR_PULLUP(GPIOB_PIN5) | PIN_PUPDR_FLOATING(GPIOB_LSM303DLHC_SCL) | PIN_PUPDR_PULLUP(GPIOB_PIN7) | PIN_PUPDR_PULLUP(GPIOB_PIN8) | PIN_PUPDR_FLOATING(GPIOB_LSM303DLHC_SDA) | PIN_PUPDR_FLOATING(GPIOB_MP45DT02_CLK_IN) | PIN_PUPDR_PULLUP(GPIOB_PIN11) | PIN_PUPDR_PULLUP(GPIOB_PIN12) | PIN_PUPDR_PULLUP(GPIOB_PIN13) | PIN_PUPDR_PULLUP(GPIOB_PIN14) | PIN_PUPDR_PULLUP(GPIOB_PIN15)) | ||
| 354 | #define VAL_GPIOB_ODR (PIN_ODR_HIGH(GPIOB_PIN0) | PIN_ODR_HIGH(GPIOB_PIN1) | PIN_ODR_HIGH(GPIOB_PIN2) | PIN_ODR_HIGH(GPIOB_SWO) | PIN_ODR_HIGH(GPIOB_PIN4) | PIN_ODR_HIGH(GPIOB_PIN5) | PIN_ODR_HIGH(GPIOB_LSM303DLHC_SCL) | PIN_ODR_HIGH(GPIOB_PIN7) | PIN_ODR_HIGH(GPIOB_PIN8) | PIN_ODR_HIGH(GPIOB_LSM303DLHC_SDA) | PIN_ODR_HIGH(GPIOB_MP45DT02_CLK_IN) | PIN_ODR_HIGH(GPIOB_PIN11) | PIN_ODR_HIGH(GPIOB_PIN12) | PIN_ODR_HIGH(GPIOB_PIN13) | PIN_ODR_HIGH(GPIOB_PIN14) | PIN_ODR_HIGH(GPIOB_PIN15)) | ||
| 355 | #define VAL_GPIOB_AFRL (PIN_AFIO_AF(GPIOB_PIN0, 0U) | PIN_AFIO_AF(GPIOB_PIN1, 0U) | PIN_AFIO_AF(GPIOB_PIN2, 0U) | PIN_AFIO_AF(GPIOB_SWO, 0U) | PIN_AFIO_AF(GPIOB_PIN4, 0U) | PIN_AFIO_AF(GPIOB_PIN5, 0U) | PIN_AFIO_AF(GPIOB_LSM303DLHC_SCL, 4U) | PIN_AFIO_AF(GPIOB_PIN7, 0U)) | ||
| 356 | #define VAL_GPIOB_AFRH (PIN_AFIO_AF(GPIOB_PIN8, 0U) | PIN_AFIO_AF(GPIOB_LSM303DLHC_SDA, 4U) | PIN_AFIO_AF(GPIOB_MP45DT02_CLK_IN, 5U) | PIN_AFIO_AF(GPIOB_PIN11, 0U) | PIN_AFIO_AF(GPIOB_PIN12, 0U) | PIN_AFIO_AF(GPIOB_PIN13, 0U) | PIN_AFIO_AF(GPIOB_PIN14, 0U) | PIN_AFIO_AF(GPIOB_PIN15, 0U)) | ||
| 357 | |||
| 358 | /* | ||
| 359 | * GPIOC setup: | ||
| 360 | * | ||
| 361 | * PC0 - OTG_FS_POWER_ON (output pushpull maximum). | ||
| 362 | * PC1 - PIN1 (input pullup). | ||
| 363 | * PC2 - PIN2 (input pullup). | ||
| 364 | * PC3 - CS43L22_AIN4x MP45DT02_PDM_OUT(alternate 5). | ||
| 365 | * PC4 - PIN4 (input pullup). | ||
| 366 | * PC5 - PIN5 (input pullup). | ||
| 367 | * PC6 - PIN6 (input pullup). | ||
| 368 | * PC7 - CS43L22_MCLK (alternate 6). | ||
| 369 | * PC8 - PIN8 (input pullup). | ||
| 370 | * PC9 - PIN9 (input pullup). | ||
| 371 | * PC10 - CS43L22_SCLK (alternate 6). | ||
| 372 | * PC11 - PIN11 (input pullup). | ||
| 373 | * PC12 - CS43L22_SDIN (alternate 6). | ||
| 374 | * PC13 - PIN13 (input pullup). | ||
| 375 | * PC14 - OSC32_IN (input floating). | ||
| 376 | * PC15 - OSC32_OUT (input floating). | ||
| 377 | */ | ||
| 378 | #define VAL_GPIOC_MODER (PIN_MODE_OUTPUT(GPIOC_OTG_FS_POWER_ON) | PIN_MODE_INPUT(GPIOC_PIN1) | PIN_MODE_INPUT(GPIOC_PIN2) | PIN_MODE_ALTERNATE(GPIOC_CS43L22_AIN4x) | PIN_MODE_INPUT(GPIOC_PIN4) | PIN_MODE_INPUT(GPIOC_PIN5) | PIN_MODE_INPUT(GPIOC_PIN6) | PIN_MODE_ALTERNATE(GPIOC_CS43L22_MCLK) | PIN_MODE_INPUT(GPIOC_PIN8) | PIN_MODE_INPUT(GPIOC_PIN9) | PIN_MODE_ALTERNATE(GPIOC_CS43L22_SCLK) | PIN_MODE_INPUT(GPIOC_PIN11) | PIN_MODE_ALTERNATE(GPIOC_CS43L22_SDIN) | PIN_MODE_INPUT(GPIOC_PIN13) | PIN_MODE_INPUT(GPIOC_OSC32_IN) | PIN_MODE_INPUT(GPIOC_OSC32_OUT)) | ||
| 379 | #define VAL_GPIOC_OTYPER (PIN_OTYPE_PUSHPULL(GPIOC_OTG_FS_POWER_ON) | PIN_OTYPE_PUSHPULL(GPIOC_PIN1) | PIN_OTYPE_PUSHPULL(GPIOC_PIN2) | PIN_OTYPE_PUSHPULL(GPIOC_CS43L22_AIN4x) | PIN_OTYPE_PUSHPULL(GPIOC_PIN4) | PIN_OTYPE_PUSHPULL(GPIOC_PIN5) | PIN_OTYPE_PUSHPULL(GPIOC_PIN6) | PIN_OTYPE_PUSHPULL(GPIOC_CS43L22_MCLK) | PIN_OTYPE_PUSHPULL(GPIOC_PIN8) | PIN_OTYPE_PUSHPULL(GPIOC_PIN9) | PIN_OTYPE_PUSHPULL(GPIOC_CS43L22_SCLK) | PIN_OTYPE_PUSHPULL(GPIOC_PIN11) | PIN_OTYPE_PUSHPULL(GPIOC_CS43L22_SDIN) | PIN_OTYPE_PUSHPULL(GPIOC_PIN13) | PIN_OTYPE_PUSHPULL(GPIOC_OSC32_IN) | PIN_OTYPE_PUSHPULL(GPIOC_OSC32_OUT)) | ||
| 380 | #define VAL_GPIOC_OSPEEDR (PIN_OSPEED_HIGH(GPIOC_OTG_FS_POWER_ON) | PIN_OSPEED_HIGH(GPIOC_PIN1) | PIN_OSPEED_HIGH(GPIOC_PIN2) | PIN_OSPEED_HIGH(GPIOC_CS43L22_AIN4x) | PIN_OSPEED_HIGH(GPIOC_PIN4) | PIN_OSPEED_HIGH(GPIOC_PIN5) | PIN_OSPEED_HIGH(GPIOC_PIN6) | PIN_OSPEED_HIGH(GPIOC_CS43L22_MCLK) | PIN_OSPEED_HIGH(GPIOC_PIN8) | PIN_OSPEED_HIGH(GPIOC_PIN9) | PIN_OSPEED_HIGH(GPIOC_CS43L22_SCLK) | PIN_OSPEED_HIGH(GPIOC_PIN11) | PIN_OSPEED_HIGH(GPIOC_CS43L22_SDIN) | PIN_OSPEED_HIGH(GPIOC_PIN13) | PIN_OSPEED_HIGH(GPIOC_OSC32_IN) | PIN_OSPEED_HIGH(GPIOC_OSC32_OUT)) | ||
| 381 | #define VAL_GPIOC_PUPDR (PIN_PUPDR_PULLUP(GPIOC_OTG_FS_POWER_ON) | PIN_PUPDR_PULLUP(GPIOC_PIN1) | PIN_PUPDR_PULLUP(GPIOC_PIN2) | PIN_PUPDR_FLOATING(GPIOC_CS43L22_AIN4x) | PIN_PUPDR_PULLUP(GPIOC_PIN4) | PIN_PUPDR_PULLUP(GPIOC_PIN5) | PIN_PUPDR_PULLUP(GPIOC_PIN6) | PIN_PUPDR_PULLUP(GPIOC_CS43L22_MCLK) | PIN_PUPDR_PULLUP(GPIOC_PIN8) | PIN_PUPDR_PULLUP(GPIOC_PIN9) | PIN_PUPDR_PULLUP(GPIOC_CS43L22_SCLK) | PIN_PUPDR_PULLUP(GPIOC_PIN11) | PIN_PUPDR_PULLUP(GPIOC_CS43L22_SDIN) | PIN_PUPDR_PULLUP(GPIOC_PIN13) | PIN_PUPDR_FLOATING(GPIOC_OSC32_IN) | PIN_PUPDR_FLOATING(GPIOC_OSC32_OUT)) | ||
| 382 | #define VAL_GPIOC_ODR (PIN_ODR_HIGH(GPIOC_OTG_FS_POWER_ON) | PIN_ODR_HIGH(GPIOC_PIN1) | PIN_ODR_HIGH(GPIOC_PIN2) | PIN_ODR_HIGH(GPIOC_CS43L22_AIN4x) | PIN_ODR_HIGH(GPIOC_PIN4) | PIN_ODR_HIGH(GPIOC_PIN5) | PIN_ODR_HIGH(GPIOC_PIN6) | PIN_ODR_HIGH(GPIOC_CS43L22_MCLK) | PIN_ODR_HIGH(GPIOC_PIN8) | PIN_ODR_HIGH(GPIOC_PIN9) | PIN_ODR_HIGH(GPIOC_CS43L22_SCLK) | PIN_ODR_HIGH(GPIOC_PIN11) | PIN_ODR_HIGH(GPIOC_CS43L22_SDIN) | PIN_ODR_HIGH(GPIOC_PIN13) | PIN_ODR_HIGH(GPIOC_OSC32_IN) | PIN_ODR_HIGH(GPIOC_OSC32_OUT)) | ||
| 383 | #define VAL_GPIOC_AFRL (PIN_AFIO_AF(GPIOC_OTG_FS_POWER_ON, 0U) | PIN_AFIO_AF(GPIOC_PIN1, 0U) | PIN_AFIO_AF(GPIOC_PIN2, 0U) | PIN_AFIO_AF(GPIOC_CS43L22_AIN4x, 5U) | PIN_AFIO_AF(GPIOC_PIN4, 0U) | PIN_AFIO_AF(GPIOC_PIN5, 0U) | PIN_AFIO_AF(GPIOC_PIN6, 0U) | PIN_AFIO_AF(GPIOC_CS43L22_MCLK, 6U)) | ||
| 384 | #define VAL_GPIOC_AFRH (PIN_AFIO_AF(GPIOC_PIN8, 0U) | PIN_AFIO_AF(GPIOC_PIN9, 0U) | PIN_AFIO_AF(GPIOC_CS43L22_SCLK, 6U) | PIN_AFIO_AF(GPIOC_PIN11, 0U) | PIN_AFIO_AF(GPIOC_CS43L22_SDIN, 6U) | PIN_AFIO_AF(GPIOC_PIN13, 0U) | PIN_AFIO_AF(GPIOC_OSC32_IN, 0U) | PIN_AFIO_AF(GPIOC_OSC32_OUT, 0U)) | ||
| 385 | |||
| 386 | /* | ||
| 387 | * GPIOD setup: | ||
| 388 | * | ||
| 389 | * PD0 - PIN0 (input pullup). | ||
| 390 | * PD1 - PIN1 (input pullup). | ||
| 391 | * PD2 - PIN2 (input pullup). | ||
| 392 | * PD3 - PIN3 (input pullup). | ||
| 393 | * PD4 - CS43L22_RESET (output pushpull maximum). | ||
| 394 | * PD5 - OverCurrent (input floating). | ||
| 395 | * PD6 - PIN6 (input pullup). | ||
| 396 | * PD7 - PIN7 (input pullup). | ||
| 397 | * PD8 - PIN8 (input pullup). | ||
| 398 | * PD9 - PIN9 (input pullup). | ||
| 399 | * PD10 - PIN10 (input pullup). | ||
| 400 | * PD11 - PIN11 (input pullup). | ||
| 401 | * PD12 - LED4 (output pushpull maximum). | ||
| 402 | * PD13 - LED3 (output pushpull maximum). | ||
| 403 | * PD14 - LED5 (output pushpull maximum). | ||
| 404 | * PD15 - LED6 (output pushpull maximum). | ||
| 405 | */ | ||
| 406 | #define VAL_GPIOD_MODER (PIN_MODE_INPUT(GPIOD_PIN0) | PIN_MODE_INPUT(GPIOD_PIN1) | PIN_MODE_INPUT(GPIOD_PIN2) | PIN_MODE_INPUT(GPIOD_PIN3) | PIN_MODE_OUTPUT(GPIOD_CS43L22_RESET) | PIN_MODE_INPUT(GPIOD_OverCurrent) | PIN_MODE_INPUT(GPIOD_PIN6) | PIN_MODE_INPUT(GPIOD_PIN7) | PIN_MODE_INPUT(GPIOD_PIN8) | PIN_MODE_INPUT(GPIOD_PIN9) | PIN_MODE_INPUT(GPIOD_PIN10) | PIN_MODE_INPUT(GPIOD_PIN11) | PIN_MODE_OUTPUT(GPIOD_LED4) | PIN_MODE_OUTPUT(GPIOD_LED3) | PIN_MODE_OUTPUT(GPIOD_LED5) | PIN_MODE_OUTPUT(GPIOD_LED6)) | ||
| 407 | #define VAL_GPIOD_OTYPER (PIN_OTYPE_PUSHPULL(GPIOD_PIN0) | PIN_OTYPE_PUSHPULL(GPIOD_PIN1) | PIN_OTYPE_PUSHPULL(GPIOD_PIN2) | PIN_OTYPE_PUSHPULL(GPIOD_PIN3) | PIN_OTYPE_PUSHPULL(GPIOD_CS43L22_RESET) | PIN_OTYPE_PUSHPULL(GPIOD_OverCurrent) | PIN_OTYPE_PUSHPULL(GPIOD_PIN6) | PIN_OTYPE_PUSHPULL(GPIOD_PIN7) | PIN_OTYPE_PUSHPULL(GPIOD_PIN8) | PIN_OTYPE_PUSHPULL(GPIOD_PIN9) | PIN_OTYPE_PUSHPULL(GPIOD_PIN10) | PIN_OTYPE_PUSHPULL(GPIOD_PIN11) | PIN_OTYPE_PUSHPULL(GPIOD_LED4) | PIN_OTYPE_PUSHPULL(GPIOD_LED3) | PIN_OTYPE_PUSHPULL(GPIOD_LED5) | PIN_OTYPE_PUSHPULL(GPIOD_LED6)) | ||
| 408 | #define VAL_GPIOD_OSPEEDR (PIN_OSPEED_HIGH(GPIOD_PIN0) | PIN_OSPEED_HIGH(GPIOD_PIN1) | PIN_OSPEED_HIGH(GPIOD_PIN2) | PIN_OSPEED_HIGH(GPIOD_PIN3) | PIN_OSPEED_HIGH(GPIOD_CS43L22_RESET) | PIN_OSPEED_HIGH(GPIOD_OverCurrent) | PIN_OSPEED_HIGH(GPIOD_PIN6) | PIN_OSPEED_HIGH(GPIOD_PIN7) | PIN_OSPEED_HIGH(GPIOD_PIN8) | PIN_OSPEED_HIGH(GPIOD_PIN9) | PIN_OSPEED_HIGH(GPIOD_PIN10) | PIN_OSPEED_HIGH(GPIOD_PIN11) | PIN_OSPEED_HIGH(GPIOD_LED4) | PIN_OSPEED_HIGH(GPIOD_LED3) | PIN_OSPEED_HIGH(GPIOD_LED5) | PIN_OSPEED_HIGH(GPIOD_LED6)) | ||
| 409 | #define VAL_GPIOD_PUPDR (PIN_PUPDR_PULLUP(GPIOD_PIN0) | PIN_PUPDR_PULLUP(GPIOD_PIN1) | PIN_PUPDR_PULLUP(GPIOD_PIN2) | PIN_PUPDR_PULLUP(GPIOD_PIN3) | PIN_PUPDR_PULLUP(GPIOD_CS43L22_RESET) | PIN_PUPDR_FLOATING(GPIOD_OverCurrent) | PIN_PUPDR_PULLUP(GPIOD_PIN6) | PIN_PUPDR_PULLUP(GPIOD_PIN7) | PIN_PUPDR_PULLUP(GPIOD_PIN8) | PIN_PUPDR_PULLUP(GPIOD_PIN9) | PIN_PUPDR_PULLUP(GPIOD_PIN10) | PIN_PUPDR_PULLUP(GPIOD_PIN11) | PIN_PUPDR_FLOATING(GPIOD_LED4) | PIN_PUPDR_FLOATING(GPIOD_LED3) | PIN_PUPDR_FLOATING(GPIOD_LED5) | PIN_PUPDR_FLOATING(GPIOD_LED6)) | ||
| 410 | #define VAL_GPIOD_ODR (PIN_ODR_HIGH(GPIOD_PIN0) | PIN_ODR_HIGH(GPIOD_PIN1) | PIN_ODR_HIGH(GPIOD_PIN2) | PIN_ODR_HIGH(GPIOD_PIN3) | PIN_ODR_HIGH(GPIOD_CS43L22_RESET) | PIN_ODR_HIGH(GPIOD_OverCurrent) | PIN_ODR_HIGH(GPIOD_PIN6) | PIN_ODR_HIGH(GPIOD_PIN7) | PIN_ODR_HIGH(GPIOD_PIN8) | PIN_ODR_HIGH(GPIOD_PIN9) | PIN_ODR_HIGH(GPIOD_PIN10) | PIN_ODR_HIGH(GPIOD_PIN11) | PIN_ODR_LOW(GPIOD_LED4) | PIN_ODR_LOW(GPIOD_LED3) | PIN_ODR_LOW(GPIOD_LED5) | PIN_ODR_LOW(GPIOD_LED6)) | ||
| 411 | #define VAL_GPIOD_AFRL (PIN_AFIO_AF(GPIOD_PIN0, 0U) | PIN_AFIO_AF(GPIOD_PIN1, 0U) | PIN_AFIO_AF(GPIOD_PIN2, 0U) | PIN_AFIO_AF(GPIOD_PIN3, 0U) | PIN_AFIO_AF(GPIOD_CS43L22_RESET, 0U) | PIN_AFIO_AF(GPIOD_OverCurrent, 0U) | PIN_AFIO_AF(GPIOD_PIN6, 0U) | PIN_AFIO_AF(GPIOD_PIN7, 0U)) | ||
| 412 | #define VAL_GPIOD_AFRH (PIN_AFIO_AF(GPIOD_PIN8, 0U) | PIN_AFIO_AF(GPIOD_PIN9, 0U) | PIN_AFIO_AF(GPIOD_PIN10, 0U) | PIN_AFIO_AF(GPIOD_PIN11, 0U) | PIN_AFIO_AF(GPIOD_LED4, 0U) | PIN_AFIO_AF(GPIOD_LED3, 0U) | PIN_AFIO_AF(GPIOD_LED5, 0U) | PIN_AFIO_AF(GPIOD_LED6, 0U)) | ||
| 413 | |||
| 414 | /* | ||
| 415 | * GPIOE setup: | ||
| 416 | * | ||
| 417 | * PE0 - L3GD20_INT1 (input pullup). | ||
| 418 | * PE1 - L3GD20_INT2 (input pullup). | ||
| 419 | * PE2 - LSM303DLHC_DRDY (input floating). | ||
| 420 | * PE3 - L3GD20_CS (output pushpull maximum). | ||
| 421 | * PE4 - LSM303DLHC_INT1 (output pushpull maximum). | ||
| 422 | * PE5 - LSM303DLHC_INT2 (output pushpull maximum). | ||
| 423 | * PE6 - PIN6 (input pullup). | ||
| 424 | * PE7 - PIN7 (input pullup). | ||
| 425 | * PE8 - PIN8 (input pullup). | ||
| 426 | * PE9 - PIN9 (input pullup). | ||
| 427 | * PE10 - PIN10 (input pullup). | ||
| 428 | * PE11 - PIN11 (input pullup). | ||
| 429 | * PE12 - PIN12 (input pullup). | ||
| 430 | * PE13 - PIN13 (input pullup). | ||
| 431 | * PE14 - PIN14 (input pullup). | ||
| 432 | * PE15 - PIN15 (input pullup). | ||
| 433 | */ | ||
| 434 | #define VAL_GPIOE_MODER (PIN_MODE_INPUT(GPIOE_L3GD20_INT1) | PIN_MODE_INPUT(GPIOE_L3GD20_INT2) | PIN_MODE_INPUT(GPIOE_LSM303DLHC_DRDY) | PIN_MODE_OUTPUT(GPIOE_L3GD20_CS) | PIN_MODE_OUTPUT(GPIOE_LSM303DLHC_INT1) | PIN_MODE_OUTPUT(GPIOE_LSM303DLHC_INT2) | PIN_MODE_INPUT(GPIOE_PIN6) | PIN_MODE_INPUT(GPIOE_PIN7) | PIN_MODE_INPUT(GPIOE_PIN8) | PIN_MODE_INPUT(GPIOE_PIN9) | PIN_MODE_INPUT(GPIOE_PIN10) | PIN_MODE_INPUT(GPIOE_PIN11) | PIN_MODE_INPUT(GPIOE_PIN12) | PIN_MODE_INPUT(GPIOE_PIN13) | PIN_MODE_INPUT(GPIOE_PIN14) | PIN_MODE_INPUT(GPIOE_PIN15)) | ||
| 435 | #define VAL_GPIOE_OTYPER (PIN_OTYPE_PUSHPULL(GPIOE_L3GD20_INT1) | PIN_OTYPE_PUSHPULL(GPIOE_L3GD20_INT2) | PIN_OTYPE_PUSHPULL(GPIOE_LSM303DLHC_DRDY) | PIN_OTYPE_PUSHPULL(GPIOE_L3GD20_CS) | PIN_OTYPE_PUSHPULL(GPIOE_LSM303DLHC_INT1) | PIN_OTYPE_PUSHPULL(GPIOE_LSM303DLHC_INT2) | PIN_OTYPE_PUSHPULL(GPIOE_PIN6) | PIN_OTYPE_PUSHPULL(GPIOE_PIN7) | PIN_OTYPE_PUSHPULL(GPIOE_PIN8) | PIN_OTYPE_PUSHPULL(GPIOE_PIN9) | PIN_OTYPE_PUSHPULL(GPIOE_PIN10) | PIN_OTYPE_PUSHPULL(GPIOE_PIN11) | PIN_OTYPE_PUSHPULL(GPIOE_PIN12) | PIN_OTYPE_PUSHPULL(GPIOE_PIN13) | PIN_OTYPE_PUSHPULL(GPIOE_PIN14) | PIN_OTYPE_PUSHPULL(GPIOE_PIN15)) | ||
| 436 | #define VAL_GPIOE_OSPEEDR (PIN_OSPEED_HIGH(GPIOE_L3GD20_INT1) | PIN_OSPEED_HIGH(GPIOE_L3GD20_INT2) | PIN_OSPEED_HIGH(GPIOE_LSM303DLHC_DRDY) | PIN_OSPEED_HIGH(GPIOE_L3GD20_CS) | PIN_OSPEED_HIGH(GPIOE_LSM303DLHC_INT1) | PIN_OSPEED_HIGH(GPIOE_LSM303DLHC_INT2) | PIN_OSPEED_HIGH(GPIOE_PIN6) | PIN_OSPEED_HIGH(GPIOE_PIN7) | PIN_OSPEED_HIGH(GPIOE_PIN8) | PIN_OSPEED_HIGH(GPIOE_PIN9) | PIN_OSPEED_HIGH(GPIOE_PIN10) | PIN_OSPEED_HIGH(GPIOE_PIN11) | PIN_OSPEED_HIGH(GPIOE_PIN12) | PIN_OSPEED_HIGH(GPIOE_PIN13) | PIN_OSPEED_HIGH(GPIOE_PIN14) | PIN_OSPEED_HIGH(GPIOE_PIN15)) | ||
| 437 | #define VAL_GPIOE_PUPDR (PIN_PUPDR_PULLUP(GPIOE_L3GD20_INT1) | PIN_PUPDR_PULLUP(GPIOE_L3GD20_INT2) | PIN_PUPDR_FLOATING(GPIOE_LSM303DLHC_DRDY) | PIN_PUPDR_PULLUP(GPIOE_L3GD20_CS) | PIN_PUPDR_PULLUP(GPIOE_LSM303DLHC_INT1) | PIN_PUPDR_PULLUP(GPIOE_LSM303DLHC_INT2) | PIN_PUPDR_PULLUP(GPIOE_PIN6) | PIN_PUPDR_PULLUP(GPIOE_PIN7) | PIN_PUPDR_PULLUP(GPIOE_PIN8) | PIN_PUPDR_PULLUP(GPIOE_PIN9) | PIN_PUPDR_PULLUP(GPIOE_PIN10) | PIN_PUPDR_PULLUP(GPIOE_PIN11) | PIN_PUPDR_PULLUP(GPIOE_PIN12) | PIN_PUPDR_PULLUP(GPIOE_PIN13) | PIN_PUPDR_PULLUP(GPIOE_PIN14) | PIN_PUPDR_PULLUP(GPIOE_PIN15)) | ||
| 438 | #define VAL_GPIOE_ODR (PIN_ODR_HIGH(GPIOE_L3GD20_INT1) | PIN_ODR_HIGH(GPIOE_L3GD20_INT2) | PIN_ODR_HIGH(GPIOE_LSM303DLHC_DRDY) | PIN_ODR_HIGH(GPIOE_L3GD20_CS) | PIN_ODR_HIGH(GPIOE_LSM303DLHC_INT1) | PIN_ODR_HIGH(GPIOE_LSM303DLHC_INT2) | PIN_ODR_HIGH(GPIOE_PIN6) | PIN_ODR_HIGH(GPIOE_PIN7) | PIN_ODR_HIGH(GPIOE_PIN8) | PIN_ODR_HIGH(GPIOE_PIN9) | PIN_ODR_HIGH(GPIOE_PIN10) | PIN_ODR_HIGH(GPIOE_PIN11) | PIN_ODR_HIGH(GPIOE_PIN12) | PIN_ODR_HIGH(GPIOE_PIN13) | PIN_ODR_HIGH(GPIOE_PIN14) | PIN_ODR_HIGH(GPIOE_PIN15)) | ||
| 439 | #define VAL_GPIOE_AFRL (PIN_AFIO_AF(GPIOE_L3GD20_INT1, 0U) | PIN_AFIO_AF(GPIOE_L3GD20_INT2, 0U) | PIN_AFIO_AF(GPIOE_LSM303DLHC_DRDY, 0U) | PIN_AFIO_AF(GPIOE_L3GD20_CS, 0U) | PIN_AFIO_AF(GPIOE_LSM303DLHC_INT1, 0U) | PIN_AFIO_AF(GPIOE_LSM303DLHC_INT2, 0U) | PIN_AFIO_AF(GPIOE_PIN6, 0U) | PIN_AFIO_AF(GPIOE_PIN7, 0U)) | ||
| 440 | #define VAL_GPIOE_AFRH (PIN_AFIO_AF(GPIOE_PIN8, 0U) | PIN_AFIO_AF(GPIOE_PIN9, 0U) | PIN_AFIO_AF(GPIOE_PIN10, 0U) | PIN_AFIO_AF(GPIOE_PIN11, 0U) | PIN_AFIO_AF(GPIOE_PIN12, 0U) | PIN_AFIO_AF(GPIOE_PIN13, 0U) | PIN_AFIO_AF(GPIOE_PIN14, 0U) | PIN_AFIO_AF(GPIOE_PIN15, 0U)) | ||
| 441 | |||
| 442 | /* | ||
| 443 | * GPIOF setup: | ||
| 444 | * | ||
| 445 | * PF0 - PIN0 (input pullup). | ||
| 446 | * PF1 - PIN1 (input pullup). | ||
| 447 | * PF2 - PIN2 (input pullup). | ||
| 448 | * PF3 - PIN3 (input pullup). | ||
| 449 | * PF4 - PIN4 (input pullup). | ||
| 450 | * PF5 - PIN5 (input pullup). | ||
| 451 | * PF6 - PIN6 (input pullup). | ||
| 452 | * PF7 - PIN7 (input pullup). | ||
| 453 | * PF8 - PIN8 (input pullup). | ||
| 454 | * PF9 - PIN9 (input pullup). | ||
| 455 | * PF10 - PIN10 (input pullup). | ||
| 456 | * PF11 - PIN11 (input pullup). | ||
| 457 | * PF12 - PIN12 (input pullup). | ||
| 458 | * PF13 - PIN13 (input pullup). | ||
| 459 | * PF14 - PIN14 (input pullup). | ||
| 460 | * PF15 - PIN15 (input pullup). | ||
| 461 | */ | ||
| 462 | #define VAL_GPIOF_MODER (PIN_MODE_INPUT(GPIOF_PIN0) | PIN_MODE_INPUT(GPIOF_PIN1) | PIN_MODE_INPUT(GPIOF_PIN2) | PIN_MODE_INPUT(GPIOF_PIN3) | PIN_MODE_INPUT(GPIOF_PIN4) | PIN_MODE_INPUT(GPIOF_PIN5) | PIN_MODE_INPUT(GPIOF_PIN6) | PIN_MODE_INPUT(GPIOF_PIN7) | PIN_MODE_INPUT(GPIOF_PIN8) | PIN_MODE_INPUT(GPIOF_PIN9) | PIN_MODE_INPUT(GPIOF_PIN10) | PIN_MODE_INPUT(GPIOF_PIN11) | PIN_MODE_INPUT(GPIOF_PIN12) | PIN_MODE_INPUT(GPIOF_PIN13) | PIN_MODE_INPUT(GPIOF_PIN14) | PIN_MODE_INPUT(GPIOF_PIN15)) | ||
| 463 | #define VAL_GPIOF_OTYPER (PIN_OTYPE_PUSHPULL(GPIOF_PIN0) | PIN_OTYPE_PUSHPULL(GPIOF_PIN1) | PIN_OTYPE_PUSHPULL(GPIOF_PIN2) | PIN_OTYPE_PUSHPULL(GPIOF_PIN3) | PIN_OTYPE_PUSHPULL(GPIOF_PIN4) | PIN_OTYPE_PUSHPULL(GPIOF_PIN5) | PIN_OTYPE_PUSHPULL(GPIOF_PIN6) | PIN_OTYPE_PUSHPULL(GPIOF_PIN7) | PIN_OTYPE_PUSHPULL(GPIOF_PIN8) | PIN_OTYPE_PUSHPULL(GPIOF_PIN9) | PIN_OTYPE_PUSHPULL(GPIOF_PIN10) | PIN_OTYPE_PUSHPULL(GPIOF_PIN11) | PIN_OTYPE_PUSHPULL(GPIOF_PIN12) | PIN_OTYPE_PUSHPULL(GPIOF_PIN13) | PIN_OTYPE_PUSHPULL(GPIOF_PIN14) | PIN_OTYPE_PUSHPULL(GPIOF_PIN15)) | ||
| 464 | #define VAL_GPIOF_OSPEEDR (PIN_OSPEED_HIGH(GPIOF_PIN0) | PIN_OSPEED_HIGH(GPIOF_PIN1) | PIN_OSPEED_HIGH(GPIOF_PIN2) | PIN_OSPEED_HIGH(GPIOF_PIN3) | PIN_OSPEED_HIGH(GPIOF_PIN4) | PIN_OSPEED_HIGH(GPIOF_PIN5) | PIN_OSPEED_HIGH(GPIOF_PIN6) | PIN_OSPEED_HIGH(GPIOF_PIN7) | PIN_OSPEED_HIGH(GPIOF_PIN8) | PIN_OSPEED_HIGH(GPIOF_PIN9) | PIN_OSPEED_HIGH(GPIOF_PIN10) | PIN_OSPEED_HIGH(GPIOF_PIN11) | PIN_OSPEED_HIGH(GPIOF_PIN12) | PIN_OSPEED_HIGH(GPIOF_PIN13) | PIN_OSPEED_HIGH(GPIOF_PIN14) | PIN_OSPEED_HIGH(GPIOF_PIN15)) | ||
| 465 | #define VAL_GPIOF_PUPDR (PIN_PUPDR_PULLUP(GPIOF_PIN0) | PIN_PUPDR_PULLUP(GPIOF_PIN1) | PIN_PUPDR_PULLUP(GPIOF_PIN2) | PIN_PUPDR_PULLUP(GPIOF_PIN3) | PIN_PUPDR_PULLUP(GPIOF_PIN4) | PIN_PUPDR_PULLUP(GPIOF_PIN5) | PIN_PUPDR_PULLUP(GPIOF_PIN6) | PIN_PUPDR_PULLUP(GPIOF_PIN7) | PIN_PUPDR_PULLUP(GPIOF_PIN8) | PIN_PUPDR_PULLUP(GPIOF_PIN9) | PIN_PUPDR_PULLUP(GPIOF_PIN10) | PIN_PUPDR_PULLUP(GPIOF_PIN11) | PIN_PUPDR_PULLUP(GPIOF_PIN12) | PIN_PUPDR_PULLUP(GPIOF_PIN13) | PIN_PUPDR_PULLUP(GPIOF_PIN14) | PIN_PUPDR_PULLUP(GPIOF_PIN15)) | ||
| 466 | #define VAL_GPIOF_ODR (PIN_ODR_HIGH(GPIOF_PIN0) | PIN_ODR_HIGH(GPIOF_PIN1) | PIN_ODR_HIGH(GPIOF_PIN2) | PIN_ODR_HIGH(GPIOF_PIN3) | PIN_ODR_HIGH(GPIOF_PIN4) | PIN_ODR_HIGH(GPIOF_PIN5) | PIN_ODR_HIGH(GPIOF_PIN6) | PIN_ODR_HIGH(GPIOF_PIN7) | PIN_ODR_HIGH(GPIOF_PIN8) | PIN_ODR_HIGH(GPIOF_PIN9) | PIN_ODR_HIGH(GPIOF_PIN10) | PIN_ODR_HIGH(GPIOF_PIN11) | PIN_ODR_HIGH(GPIOF_PIN12) | PIN_ODR_HIGH(GPIOF_PIN13) | PIN_ODR_HIGH(GPIOF_PIN14) | PIN_ODR_HIGH(GPIOF_PIN15)) | ||
| 467 | #define VAL_GPIOF_AFRL (PIN_AFIO_AF(GPIOF_PIN0, 0U) | PIN_AFIO_AF(GPIOF_PIN1, 0U) | PIN_AFIO_AF(GPIOF_PIN2, 0U) | PIN_AFIO_AF(GPIOF_PIN3, 0U) | PIN_AFIO_AF(GPIOF_PIN4, 0U) | PIN_AFIO_AF(GPIOF_PIN5, 0U) | PIN_AFIO_AF(GPIOF_PIN6, 0U) | PIN_AFIO_AF(GPIOF_PIN7, 0U)) | ||
| 468 | #define VAL_GPIOF_AFRH (PIN_AFIO_AF(GPIOF_PIN8, 0U) | PIN_AFIO_AF(GPIOF_PIN9, 0U) | PIN_AFIO_AF(GPIOF_PIN10, 0U) | PIN_AFIO_AF(GPIOF_PIN11, 0U) | PIN_AFIO_AF(GPIOF_PIN12, 0U) | PIN_AFIO_AF(GPIOF_PIN13, 0U) | PIN_AFIO_AF(GPIOF_PIN14, 0U) | PIN_AFIO_AF(GPIOF_PIN15, 0U)) | ||
| 469 | |||
| 470 | /* | ||
| 471 | * GPIOG setup: | ||
| 472 | * | ||
| 473 | * PG0 - PIN0 (input pullup). | ||
| 474 | * PG1 - PIN1 (input pullup). | ||
| 475 | * PG2 - PIN2 (input pullup). | ||
| 476 | * PG3 - PIN3 (input pullup). | ||
| 477 | * PG4 - PIN4 (input pullup). | ||
| 478 | * PG5 - PIN5 (input pullup). | ||
| 479 | * PG6 - PIN6 (input pullup). | ||
| 480 | * PG7 - PIN7 (input pullup). | ||
| 481 | * PG8 - PIN8 (input pullup). | ||
| 482 | * PG9 - PIN9 (input pullup). | ||
| 483 | * PG10 - PIN10 (input pullup). | ||
| 484 | * PG11 - PIN11 (input pullup). | ||
| 485 | * PG12 - PIN12 (input pullup). | ||
| 486 | * PG13 - PIN13 (input pullup). | ||
| 487 | * PG14 - PIN14 (input pullup). | ||
| 488 | * PG15 - PIN15 (input pullup). | ||
| 489 | */ | ||
| 490 | #define VAL_GPIOG_MODER (PIN_MODE_INPUT(GPIOG_PIN0) | PIN_MODE_INPUT(GPIOG_PIN1) | PIN_MODE_INPUT(GPIOG_PIN2) | PIN_MODE_INPUT(GPIOG_PIN3) | PIN_MODE_INPUT(GPIOG_PIN4) | PIN_MODE_INPUT(GPIOG_PIN5) | PIN_MODE_INPUT(GPIOG_PIN6) | PIN_MODE_INPUT(GPIOG_PIN7) | PIN_MODE_INPUT(GPIOG_PIN8) | PIN_MODE_INPUT(GPIOG_PIN9) | PIN_MODE_INPUT(GPIOG_PIN10) | PIN_MODE_INPUT(GPIOG_PIN11) | PIN_MODE_INPUT(GPIOG_PIN12) | PIN_MODE_INPUT(GPIOG_PIN13) | PIN_MODE_INPUT(GPIOG_PIN14) | PIN_MODE_INPUT(GPIOG_PIN15)) | ||
| 491 | #define VAL_GPIOG_OTYPER (PIN_OTYPE_PUSHPULL(GPIOG_PIN0) | PIN_OTYPE_PUSHPULL(GPIOG_PIN1) | PIN_OTYPE_PUSHPULL(GPIOG_PIN2) | PIN_OTYPE_PUSHPULL(GPIOG_PIN3) | PIN_OTYPE_PUSHPULL(GPIOG_PIN4) | PIN_OTYPE_PUSHPULL(GPIOG_PIN5) | PIN_OTYPE_PUSHPULL(GPIOG_PIN6) | PIN_OTYPE_PUSHPULL(GPIOG_PIN7) | PIN_OTYPE_PUSHPULL(GPIOG_PIN8) | PIN_OTYPE_PUSHPULL(GPIOG_PIN9) | PIN_OTYPE_PUSHPULL(GPIOG_PIN10) | PIN_OTYPE_PUSHPULL(GPIOG_PIN11) | PIN_OTYPE_PUSHPULL(GPIOG_PIN12) | PIN_OTYPE_PUSHPULL(GPIOG_PIN13) | PIN_OTYPE_PUSHPULL(GPIOG_PIN14) | PIN_OTYPE_PUSHPULL(GPIOG_PIN15)) | ||
| 492 | #define VAL_GPIOG_OSPEEDR (PIN_OSPEED_HIGH(GPIOG_PIN0) | PIN_OSPEED_HIGH(GPIOG_PIN1) | PIN_OSPEED_HIGH(GPIOG_PIN2) | PIN_OSPEED_HIGH(GPIOG_PIN3) | PIN_OSPEED_HIGH(GPIOG_PIN4) | PIN_OSPEED_HIGH(GPIOG_PIN5) | PIN_OSPEED_HIGH(GPIOG_PIN6) | PIN_OSPEED_HIGH(GPIOG_PIN7) | PIN_OSPEED_HIGH(GPIOG_PIN8) | PIN_OSPEED_HIGH(GPIOG_PIN9) | PIN_OSPEED_HIGH(GPIOG_PIN10) | PIN_OSPEED_HIGH(GPIOG_PIN11) | PIN_OSPEED_HIGH(GPIOG_PIN12) | PIN_OSPEED_HIGH(GPIOG_PIN13) | PIN_OSPEED_HIGH(GPIOG_PIN14) | PIN_OSPEED_HIGH(GPIOG_PIN15)) | ||
| 493 | #define VAL_GPIOG_PUPDR (PIN_PUPDR_PULLUP(GPIOG_PIN0) | PIN_PUPDR_PULLUP(GPIOG_PIN1) | PIN_PUPDR_PULLUP(GPIOG_PIN2) | PIN_PUPDR_PULLUP(GPIOG_PIN3) | PIN_PUPDR_PULLUP(GPIOG_PIN4) | PIN_PUPDR_PULLUP(GPIOG_PIN5) | PIN_PUPDR_PULLUP(GPIOG_PIN6) | PIN_PUPDR_PULLUP(GPIOG_PIN7) | PIN_PUPDR_PULLUP(GPIOG_PIN8) | PIN_PUPDR_PULLUP(GPIOG_PIN9) | PIN_PUPDR_PULLUP(GPIOG_PIN10) | PIN_PUPDR_PULLUP(GPIOG_PIN11) | PIN_PUPDR_PULLUP(GPIOG_PIN12) | PIN_PUPDR_PULLUP(GPIOG_PIN13) | PIN_PUPDR_PULLUP(GPIOG_PIN14) | PIN_PUPDR_PULLUP(GPIOG_PIN15)) | ||
| 494 | #define VAL_GPIOG_ODR (PIN_ODR_HIGH(GPIOG_PIN0) | PIN_ODR_HIGH(GPIOG_PIN1) | PIN_ODR_HIGH(GPIOG_PIN2) | PIN_ODR_HIGH(GPIOG_PIN3) | PIN_ODR_HIGH(GPIOG_PIN4) | PIN_ODR_HIGH(GPIOG_PIN5) | PIN_ODR_HIGH(GPIOG_PIN6) | PIN_ODR_HIGH(GPIOG_PIN7) | PIN_ODR_HIGH(GPIOG_PIN8) | PIN_ODR_HIGH(GPIOG_PIN9) | PIN_ODR_HIGH(GPIOG_PIN10) | PIN_ODR_HIGH(GPIOG_PIN11) | PIN_ODR_HIGH(GPIOG_PIN12) | PIN_ODR_HIGH(GPIOG_PIN13) | PIN_ODR_HIGH(GPIOG_PIN14) | PIN_ODR_HIGH(GPIOG_PIN15)) | ||
| 495 | #define VAL_GPIOG_AFRL (PIN_AFIO_AF(GPIOG_PIN0, 0U) | PIN_AFIO_AF(GPIOG_PIN1, 0U) | PIN_AFIO_AF(GPIOG_PIN2, 0U) | PIN_AFIO_AF(GPIOG_PIN3, 0U) | PIN_AFIO_AF(GPIOG_PIN4, 0U) | PIN_AFIO_AF(GPIOG_PIN5, 0U) | PIN_AFIO_AF(GPIOG_PIN6, 0U) | PIN_AFIO_AF(GPIOG_PIN7, 0U)) | ||
| 496 | #define VAL_GPIOG_AFRH (PIN_AFIO_AF(GPIOG_PIN8, 0U) | PIN_AFIO_AF(GPIOG_PIN9, 0U) | PIN_AFIO_AF(GPIOG_PIN10, 0U) | PIN_AFIO_AF(GPIOG_PIN11, 0U) | PIN_AFIO_AF(GPIOG_PIN12, 0U) | PIN_AFIO_AF(GPIOG_PIN13, 0U) | PIN_AFIO_AF(GPIOG_PIN14, 0U) | PIN_AFIO_AF(GPIOG_PIN15, 0U)) | ||
| 497 | |||
| 498 | /* | ||
| 499 | * GPIOH setup: | ||
| 500 | * | ||
| 501 | * PH0 - OSC_IN (input floating). | ||
| 502 | * PH1 - OSC_OUT (input floating). | ||
| 503 | * PH2 - PIN2 (input pullup). | ||
| 504 | * PH3 - PIN3 (input pullup). | ||
| 505 | * PH4 - PIN4 (input pullup). | ||
| 506 | * PH5 - PIN5 (input pullup). | ||
| 507 | * PH6 - PIN6 (input pullup). | ||
| 508 | * PH7 - PIN7 (input pullup). | ||
| 509 | * PH8 - PIN8 (input pullup). | ||
| 510 | * PH9 - PIN9 (input pullup). | ||
| 511 | * PH10 - PIN10 (input pullup). | ||
| 512 | * PH11 - PIN11 (input pullup). | ||
| 513 | * PH12 - PIN12 (input pullup). | ||
| 514 | * PH13 - PIN13 (input pullup). | ||
| 515 | * PH14 - PIN14 (input pullup). | ||
| 516 | * PH15 - PIN15 (input pullup). | ||
| 517 | */ | ||
| 518 | #define VAL_GPIOH_MODER (PIN_MODE_INPUT(GPIOH_OSC_IN) | PIN_MODE_INPUT(GPIOH_OSC_OUT) | PIN_MODE_INPUT(GPIOH_PIN2) | PIN_MODE_INPUT(GPIOH_PIN3) | PIN_MODE_INPUT(GPIOH_PIN4) | PIN_MODE_INPUT(GPIOH_PIN5) | PIN_MODE_INPUT(GPIOH_PIN6) | PIN_MODE_INPUT(GPIOH_PIN7) | PIN_MODE_INPUT(GPIOH_PIN8) | PIN_MODE_INPUT(GPIOH_PIN9) | PIN_MODE_INPUT(GPIOH_PIN10) | PIN_MODE_INPUT(GPIOH_PIN11) | PIN_MODE_INPUT(GPIOH_PIN12) | PIN_MODE_INPUT(GPIOH_PIN13) | PIN_MODE_INPUT(GPIOH_PIN14) | PIN_MODE_INPUT(GPIOH_PIN15)) | ||
| 519 | #define VAL_GPIOH_OTYPER (PIN_OTYPE_PUSHPULL(GPIOH_OSC_IN) | PIN_OTYPE_PUSHPULL(GPIOH_OSC_OUT) | PIN_OTYPE_PUSHPULL(GPIOH_PIN2) | PIN_OTYPE_PUSHPULL(GPIOH_PIN3) | PIN_OTYPE_PUSHPULL(GPIOH_PIN4) | PIN_OTYPE_PUSHPULL(GPIOH_PIN5) | PIN_OTYPE_PUSHPULL(GPIOH_PIN6) | PIN_OTYPE_PUSHPULL(GPIOH_PIN7) | PIN_OTYPE_PUSHPULL(GPIOH_PIN8) | PIN_OTYPE_PUSHPULL(GPIOH_PIN9) | PIN_OTYPE_PUSHPULL(GPIOH_PIN10) | PIN_OTYPE_PUSHPULL(GPIOH_PIN11) | PIN_OTYPE_PUSHPULL(GPIOH_PIN12) | PIN_OTYPE_PUSHPULL(GPIOH_PIN13) | PIN_OTYPE_PUSHPULL(GPIOH_PIN14) | PIN_OTYPE_PUSHPULL(GPIOH_PIN15)) | ||
| 520 | #define VAL_GPIOH_OSPEEDR (PIN_OSPEED_HIGH(GPIOH_OSC_IN) | PIN_OSPEED_HIGH(GPIOH_OSC_OUT) | PIN_OSPEED_HIGH(GPIOH_PIN2) | PIN_OSPEED_HIGH(GPIOH_PIN3) | PIN_OSPEED_HIGH(GPIOH_PIN4) | PIN_OSPEED_HIGH(GPIOH_PIN5) | PIN_OSPEED_HIGH(GPIOH_PIN6) | PIN_OSPEED_HIGH(GPIOH_PIN7) | PIN_OSPEED_HIGH(GPIOH_PIN8) | PIN_OSPEED_HIGH(GPIOH_PIN9) | PIN_OSPEED_HIGH(GPIOH_PIN10) | PIN_OSPEED_HIGH(GPIOH_PIN11) | PIN_OSPEED_HIGH(GPIOH_PIN12) | PIN_OSPEED_HIGH(GPIOH_PIN13) | PIN_OSPEED_HIGH(GPIOH_PIN14) | PIN_OSPEED_HIGH(GPIOH_PIN15)) | ||
| 521 | #define VAL_GPIOH_PUPDR (PIN_PUPDR_FLOATING(GPIOH_OSC_IN) | PIN_PUPDR_FLOATING(GPIOH_OSC_OUT) | PIN_PUPDR_PULLUP(GPIOH_PIN2) | PIN_PUPDR_PULLUP(GPIOH_PIN3) | PIN_PUPDR_PULLUP(GPIOH_PIN4) | PIN_PUPDR_PULLUP(GPIOH_PIN5) | PIN_PUPDR_PULLUP(GPIOH_PIN6) | PIN_PUPDR_PULLUP(GPIOH_PIN7) | PIN_PUPDR_PULLUP(GPIOH_PIN8) | PIN_PUPDR_PULLUP(GPIOH_PIN9) | PIN_PUPDR_PULLUP(GPIOH_PIN10) | PIN_PUPDR_PULLUP(GPIOH_PIN11) | PIN_PUPDR_PULLUP(GPIOH_PIN12) | PIN_PUPDR_PULLUP(GPIOH_PIN13) | PIN_PUPDR_PULLUP(GPIOH_PIN14) | PIN_PUPDR_PULLUP(GPIOH_PIN15)) | ||
| 522 | #define VAL_GPIOH_ODR (PIN_ODR_HIGH(GPIOH_OSC_IN) | PIN_ODR_HIGH(GPIOH_OSC_OUT) | PIN_ODR_HIGH(GPIOH_PIN2) | PIN_ODR_HIGH(GPIOH_PIN3) | PIN_ODR_HIGH(GPIOH_PIN4) | PIN_ODR_HIGH(GPIOH_PIN5) | PIN_ODR_HIGH(GPIOH_PIN6) | PIN_ODR_HIGH(GPIOH_PIN7) | PIN_ODR_HIGH(GPIOH_PIN8) | PIN_ODR_HIGH(GPIOH_PIN9) | PIN_ODR_HIGH(GPIOH_PIN10) | PIN_ODR_HIGH(GPIOH_PIN11) | PIN_ODR_HIGH(GPIOH_PIN12) | PIN_ODR_HIGH(GPIOH_PIN13) | PIN_ODR_HIGH(GPIOH_PIN14) | PIN_ODR_HIGH(GPIOH_PIN15)) | ||
| 523 | #define VAL_GPIOH_AFRL (PIN_AFIO_AF(GPIOH_OSC_IN, 0U) | PIN_AFIO_AF(GPIOH_OSC_OUT, 0U) | PIN_AFIO_AF(GPIOH_PIN2, 0U) | PIN_AFIO_AF(GPIOH_PIN3, 0U) | PIN_AFIO_AF(GPIOH_PIN4, 0U) | PIN_AFIO_AF(GPIOH_PIN5, 0U) | PIN_AFIO_AF(GPIOH_PIN6, 0U) | PIN_AFIO_AF(GPIOH_PIN7, 0U)) | ||
| 524 | #define VAL_GPIOH_AFRH (PIN_AFIO_AF(GPIOH_PIN8, 0U) | PIN_AFIO_AF(GPIOH_PIN9, 0U) | PIN_AFIO_AF(GPIOH_PIN10, 0U) | PIN_AFIO_AF(GPIOH_PIN11, 0U) | PIN_AFIO_AF(GPIOH_PIN12, 0U) | PIN_AFIO_AF(GPIOH_PIN13, 0U) | PIN_AFIO_AF(GPIOH_PIN14, 0U) | PIN_AFIO_AF(GPIOH_PIN15, 0U)) | ||
| 525 | |||
| 526 | /* | ||
| 527 | * GPIOI setup: | ||
| 528 | * | ||
| 529 | * PI0 - PIN0 (input pullup). | ||
| 530 | * PI1 - PIN1 (input pullup). | ||
| 531 | * PI2 - PIN2 (input pullup). | ||
| 532 | * PI3 - PIN3 (input pullup). | ||
| 533 | * PI4 - PIN4 (input pullup). | ||
| 534 | * PI5 - PIN5 (input pullup). | ||
| 535 | * PI6 - PIN6 (input pullup). | ||
| 536 | * PI7 - PIN7 (input pullup). | ||
| 537 | * PI8 - PIN8 (input pullup). | ||
| 538 | * PI9 - PIN9 (input pullup). | ||
| 539 | * PI10 - PIN10 (input pullup). | ||
| 540 | * PI11 - PIN11 (input pullup). | ||
| 541 | * PI12 - PIN12 (input pullup). | ||
| 542 | * PI13 - PIN13 (input pullup). | ||
| 543 | * PI14 - PIN14 (input pullup). | ||
| 544 | * PI15 - PIN15 (input pullup). | ||
| 545 | */ | ||
| 546 | #define VAL_GPIOI_MODER (PIN_MODE_INPUT(GPIOI_PIN0) | PIN_MODE_INPUT(GPIOI_PIN1) | PIN_MODE_INPUT(GPIOI_PIN2) | PIN_MODE_INPUT(GPIOI_PIN3) | PIN_MODE_INPUT(GPIOI_PIN4) | PIN_MODE_INPUT(GPIOI_PIN5) | PIN_MODE_INPUT(GPIOI_PIN6) | PIN_MODE_INPUT(GPIOI_PIN7) | PIN_MODE_INPUT(GPIOI_PIN8) | PIN_MODE_INPUT(GPIOI_PIN9) | PIN_MODE_INPUT(GPIOI_PIN10) | PIN_MODE_INPUT(GPIOI_PIN11) | PIN_MODE_INPUT(GPIOI_PIN12) | PIN_MODE_INPUT(GPIOI_PIN13) | PIN_MODE_INPUT(GPIOI_PIN14) | PIN_MODE_INPUT(GPIOI_PIN15)) | ||
| 547 | #define VAL_GPIOI_OTYPER (PIN_OTYPE_PUSHPULL(GPIOI_PIN0) | PIN_OTYPE_PUSHPULL(GPIOI_PIN1) | PIN_OTYPE_PUSHPULL(GPIOI_PIN2) | PIN_OTYPE_PUSHPULL(GPIOI_PIN3) | PIN_OTYPE_PUSHPULL(GPIOI_PIN4) | PIN_OTYPE_PUSHPULL(GPIOI_PIN5) | PIN_OTYPE_PUSHPULL(GPIOI_PIN6) | PIN_OTYPE_PUSHPULL(GPIOI_PIN7) | PIN_OTYPE_PUSHPULL(GPIOI_PIN8) | PIN_OTYPE_PUSHPULL(GPIOI_PIN9) | PIN_OTYPE_PUSHPULL(GPIOI_PIN10) | PIN_OTYPE_PUSHPULL(GPIOI_PIN11) | PIN_OTYPE_PUSHPULL(GPIOI_PIN12) | PIN_OTYPE_PUSHPULL(GPIOI_PIN13) | PIN_OTYPE_PUSHPULL(GPIOI_PIN14) | PIN_OTYPE_PUSHPULL(GPIOI_PIN15)) | ||
| 548 | #define VAL_GPIOI_OSPEEDR (PIN_OSPEED_HIGH(GPIOI_PIN0) | PIN_OSPEED_HIGH(GPIOI_PIN1) | PIN_OSPEED_HIGH(GPIOI_PIN2) | PIN_OSPEED_HIGH(GPIOI_PIN3) | PIN_OSPEED_HIGH(GPIOI_PIN4) | PIN_OSPEED_HIGH(GPIOI_PIN5) | PIN_OSPEED_HIGH(GPIOI_PIN6) | PIN_OSPEED_HIGH(GPIOI_PIN7) | PIN_OSPEED_HIGH(GPIOI_PIN8) | PIN_OSPEED_HIGH(GPIOI_PIN9) | PIN_OSPEED_HIGH(GPIOI_PIN10) | PIN_OSPEED_HIGH(GPIOI_PIN11) | PIN_OSPEED_HIGH(GPIOI_PIN12) | PIN_OSPEED_HIGH(GPIOI_PIN13) | PIN_OSPEED_HIGH(GPIOI_PIN14) | PIN_OSPEED_HIGH(GPIOI_PIN15)) | ||
| 549 | #define VAL_GPIOI_PUPDR (PIN_PUPDR_PULLUP(GPIOI_PIN0) | PIN_PUPDR_PULLUP(GPIOI_PIN1) | PIN_PUPDR_PULLUP(GPIOI_PIN2) | PIN_PUPDR_PULLUP(GPIOI_PIN3) | PIN_PUPDR_PULLUP(GPIOI_PIN4) | PIN_PUPDR_PULLUP(GPIOI_PIN5) | PIN_PUPDR_PULLUP(GPIOI_PIN6) | PIN_PUPDR_PULLUP(GPIOI_PIN7) | PIN_PUPDR_PULLUP(GPIOI_PIN8) | PIN_PUPDR_PULLUP(GPIOI_PIN9) | PIN_PUPDR_PULLUP(GPIOI_PIN10) | PIN_PUPDR_PULLUP(GPIOI_PIN11) | PIN_PUPDR_PULLUP(GPIOI_PIN12) | PIN_PUPDR_PULLUP(GPIOI_PIN13) | PIN_PUPDR_PULLUP(GPIOI_PIN14) | PIN_PUPDR_PULLUP(GPIOI_PIN15)) | ||
| 550 | #define VAL_GPIOI_ODR (PIN_ODR_HIGH(GPIOI_PIN0) | PIN_ODR_HIGH(GPIOI_PIN1) | PIN_ODR_HIGH(GPIOI_PIN2) | PIN_ODR_HIGH(GPIOI_PIN3) | PIN_ODR_HIGH(GPIOI_PIN4) | PIN_ODR_HIGH(GPIOI_PIN5) | PIN_ODR_HIGH(GPIOI_PIN6) | PIN_ODR_HIGH(GPIOI_PIN7) | PIN_ODR_HIGH(GPIOI_PIN8) | PIN_ODR_HIGH(GPIOI_PIN9) | PIN_ODR_HIGH(GPIOI_PIN10) | PIN_ODR_HIGH(GPIOI_PIN11) | PIN_ODR_HIGH(GPIOI_PIN12) | PIN_ODR_HIGH(GPIOI_PIN13) | PIN_ODR_HIGH(GPIOI_PIN14) | PIN_ODR_HIGH(GPIOI_PIN15)) | ||
| 551 | #define VAL_GPIOI_AFRL (PIN_AFIO_AF(GPIOI_PIN0, 0U) | PIN_AFIO_AF(GPIOI_PIN1, 0U) | PIN_AFIO_AF(GPIOI_PIN2, 0U) | PIN_AFIO_AF(GPIOI_PIN3, 0U) | PIN_AFIO_AF(GPIOI_PIN4, 0U) | PIN_AFIO_AF(GPIOI_PIN5, 0U) | PIN_AFIO_AF(GPIOI_PIN6, 0U) | PIN_AFIO_AF(GPIOI_PIN7, 0U)) | ||
| 552 | #define VAL_GPIOI_AFRH (PIN_AFIO_AF(GPIOI_PIN8, 0U) | PIN_AFIO_AF(GPIOI_PIN9, 0U) | PIN_AFIO_AF(GPIOI_PIN10, 0U) | PIN_AFIO_AF(GPIOI_PIN11, 0U) | PIN_AFIO_AF(GPIOI_PIN12, 0U) | PIN_AFIO_AF(GPIOI_PIN13, 0U) | PIN_AFIO_AF(GPIOI_PIN14, 0U) | PIN_AFIO_AF(GPIOI_PIN15, 0U)) | ||
| 553 | |||
| 554 | /*===========================================================================*/ | ||
| 555 | /* External declarations. */ | ||
| 556 | /*===========================================================================*/ | ||
| 557 | |||
| 558 | #if !defined(_FROM_ASM_) | ||
| 559 | # ifdef __cplusplus | ||
| 560 | extern "C" { | ||
| 561 | # endif | ||
| 562 | void boardInit(void); | ||
| 563 | # ifdef __cplusplus | ||
| 564 | } | ||
| 565 | # endif | ||
| 566 | #endif /* _FROM_ASM_ */ | ||
| 567 | |||
| 568 | #endif /* BOARD_H */ | ||
diff --git a/drivers/boards/BLACKPILL_STM32_F401/cfg/board.chcfg b/drivers/boards/BLACKPILL_STM32_F401/cfg/board.chcfg deleted file mode 100644 index 7559ceb93..000000000 --- a/drivers/boards/BLACKPILL_STM32_F401/cfg/board.chcfg +++ /dev/null | |||
| @@ -1,1193 +0,0 @@ | |||
| 1 | <?xml version="1.0" encoding="UTF-8"?> | ||
| 2 | <!-- STM32F4xx board Template --> | ||
| 3 | <board | ||
| 4 | xmlns:xsi="http://www.w3.org/2001/XMLSchema-instance" | ||
| 5 | xsi:noNamespaceSchemaLocation="http://www.chibios.org/xml/schema/boards/stm32f4xx_board.xsd"> | ||
| 6 | <configuration_settings> | ||
| 7 | <templates_path>resources/gencfg/processors/boards/stm32f4xx/templates</templates_path> | ||
| 8 | <output_path>..</output_path> | ||
| 9 | <hal_version>5.0.x</hal_version> | ||
| 10 | </configuration_settings> | ||
| 11 | <board_name>STMicroelectronics STM32F401C-Discovery</board_name> | ||
| 12 | <board_id>ST_STM32F401C_DISCOVERY</board_id> | ||
| 13 | <board_functions></board_functions> | ||
| 14 | <subtype>STM32F401xC</subtype> | ||
| 15 | <clocks | ||
| 16 | HSEFrequency="8000000" | ||
| 17 | HSEBypass="false" | ||
| 18 | LSEFrequency="0" | ||
| 19 | LSEBypass="false" | ||
| 20 | VDD="300" /> | ||
| 21 | <ports> | ||
| 22 | <GPIOA> | ||
| 23 | <pin0 | ||
| 24 | ID="BUTTON" | ||
| 25 | Type="PushPull" | ||
| 26 | Level="High" | ||
| 27 | Speed="Maximum" | ||
| 28 | Resistor="Floating" | ||
| 29 | Mode="Input" | ||
| 30 | Alternate="0" /> | ||
| 31 | <pin1 | ||
| 32 | ID="" | ||
| 33 | Type="PushPull" | ||
| 34 | Level="High" | ||
| 35 | Speed="Maximum" | ||
| 36 | Resistor="PullUp" | ||
| 37 | Mode="Input" | ||
| 38 | Alternate="0" /> | ||
| 39 | <pin2 | ||
| 40 | ID="" | ||
| 41 | Type="PushPull" | ||
| 42 | Level="High" | ||
| 43 | Speed="Maximum" | ||
| 44 | Resistor="PullUp" | ||
| 45 | Mode="Input" | ||
| 46 | Alternate="0" /> | ||
| 47 | <pin3 | ||
| 48 | ID="" | ||
| 49 | Type="PushPull" | ||
| 50 | Level="High" | ||
| 51 | Speed="Maximum" | ||
| 52 | Resistor="PullUp" | ||
| 53 | Mode="Input" | ||
| 54 | Alternate="0" /> | ||
| 55 | <pin4 | ||
| 56 | ID="CS43L22_LRCK" | ||
| 57 | Type="PushPull" | ||
| 58 | Level="High" | ||
| 59 | Speed="Maximum" | ||
| 60 | Resistor="Floating" | ||
| 61 | Mode="Alternate" | ||
| 62 | Alternate="6" /> | ||
| 63 | <pin5 | ||
| 64 | ID="L3GD20_SCL" | ||
| 65 | Type="PushPull" | ||
| 66 | Level="High" | ||
| 67 | Speed="Maximum" | ||
| 68 | Resistor="Floating" | ||
| 69 | Mode="Alternate" | ||
| 70 | Alternate="5" /> | ||
| 71 | <pin6 | ||
| 72 | ID="L3GD20_SD0" | ||
| 73 | Type="PushPull" | ||
| 74 | Level="High" | ||
| 75 | Speed="Maximum" | ||
| 76 | Resistor="PullUp" | ||
| 77 | Mode="Alternate" | ||
| 78 | Alternate="5" /> | ||
| 79 | <pin7 | ||
| 80 | ID="L3GD20_SDI" | ||
| 81 | Type="PushPull" | ||
| 82 | Level="High" | ||
| 83 | Speed="Maximum" | ||
| 84 | Resistor="PullUp" | ||
| 85 | Mode="Alternate" | ||
| 86 | Alternate="5" /> | ||
| 87 | <pin8 | ||
| 88 | ID="" | ||
| 89 | Type="PushPull" | ||
| 90 | Level="High" | ||
| 91 | Speed="Maximum" | ||
| 92 | Resistor="PullUp" | ||
| 93 | Mode="Input" | ||
| 94 | Alternate="0" /> | ||
| 95 | <pin9 | ||
| 96 | ID="VBUS_FS" | ||
| 97 | Type="PushPull" | ||
| 98 | Level="High" | ||
| 99 | Speed="Maximum" | ||
| 100 | Resistor="Floating" | ||
| 101 | Mode="Input" | ||
| 102 | Alternate="0" /> | ||
| 103 | <pin10 | ||
| 104 | ID="OTG_FS_ID" | ||
| 105 | Type="PushPull" | ||
| 106 | Level="High" | ||
| 107 | Speed="Maximum" | ||
| 108 | Resistor="Floating" | ||
| 109 | Mode="Alternate" | ||
| 110 | Alternate="10" /> | ||
| 111 | <pin11 | ||
| 112 | ID="OTG_FS_DM" | ||
| 113 | Type="PushPull" | ||
| 114 | Level="High" | ||
| 115 | Speed="Maximum" | ||
| 116 | Resistor="Floating" | ||
| 117 | Mode="Alternate" | ||
| 118 | Alternate="10" /> | ||
| 119 | <pin12 | ||
| 120 | ID="OTG_FS_DP" | ||
| 121 | Type="PushPull" | ||
| 122 | Level="High" | ||
| 123 | Speed="Maximum" | ||
| 124 | Resistor="Floating" | ||
| 125 | Mode="Alternate" | ||
| 126 | Alternate="10" /> | ||
| 127 | <pin13 | ||
| 128 | ID="SWDIO" | ||
| 129 | Type="PushPull" | ||
| 130 | Level="High" | ||
| 131 | Speed="Maximum" | ||
| 132 | Resistor="Floating" | ||
| 133 | Mode="Alternate" | ||
| 134 | Alternate="0" /> | ||
| 135 | <pin14 | ||
| 136 | ID="SWCLK" | ||
| 137 | Type="PushPull" | ||
| 138 | Level="High" | ||
| 139 | Speed="Maximum" | ||
| 140 | Resistor="Floating" | ||
| 141 | Mode="Alternate" | ||
| 142 | Alternate="0" /> | ||
| 143 | <pin15 | ||
| 144 | ID="" | ||
| 145 | Type="PushPull" | ||
| 146 | Level="High" | ||
| 147 | Speed="Maximum" | ||
| 148 | Resistor="PullUp" | ||
| 149 | Mode="Input" | ||
| 150 | Alternate="0" /> | ||
| 151 | </GPIOA> | ||
| 152 | <GPIOB> | ||
| 153 | <pin0 | ||
| 154 | ID="" | ||
| 155 | Type="PushPull" | ||
| 156 | Level="High" | ||
| 157 | Speed="Maximum" | ||
| 158 | Resistor="PullUp" | ||
| 159 | Mode="Input" | ||
| 160 | Alternate="0" /> | ||
| 161 | <pin1 | ||
| 162 | ID="" | ||
| 163 | Type="PushPull" | ||
| 164 | Level="High" | ||
| 165 | Speed="Maximum" | ||
| 166 | Resistor="PullUp" | ||
| 167 | Mode="Input" | ||
| 168 | Alternate="0" /> | ||
| 169 | <pin2 | ||
| 170 | ID="" | ||
| 171 | Type="PushPull" | ||
| 172 | Level="High" | ||
| 173 | Speed="Maximum" | ||
| 174 | Resistor="PullUp" | ||
| 175 | Mode="Input" | ||
| 176 | Alternate="0" /> | ||
| 177 | <pin3 | ||
| 178 | ID="SWO" | ||
| 179 | Type="PushPull" | ||
| 180 | Level="High" | ||
| 181 | Speed="Maximum" | ||
| 182 | Resistor="PullUp" | ||
| 183 | Mode="Alternate" | ||
| 184 | Alternate="0" /> | ||
| 185 | <pin4 | ||
| 186 | ID="" | ||
| 187 | Type="PushPull" | ||
| 188 | Level="High" | ||
| 189 | Speed="Maximum" | ||
| 190 | Resistor="PullUp" | ||
| 191 | Mode="Input" | ||
| 192 | Alternate="0" /> | ||
| 193 | <pin5 | ||
| 194 | ID="" | ||
| 195 | Type="PushPull" | ||
| 196 | Level="High" | ||
| 197 | Speed="Maximum" | ||
| 198 | Resistor="PullUp" | ||
| 199 | Mode="Input" | ||
| 200 | Alternate="0" /> | ||
| 201 | <pin6 | ||
| 202 | ID="LSM303DLHC_SCL" | ||
| 203 | Type="PushPull" | ||
| 204 | Level="High" | ||
| 205 | Speed="Maximum" | ||
| 206 | Resistor="Floating" | ||
| 207 | Mode="Alternate" | ||
| 208 | Alternate="4" /> | ||
| 209 | <pin7 | ||
| 210 | ID="" | ||
| 211 | Type="PushPull" | ||
| 212 | Level="High" | ||
| 213 | Speed="Maximum" | ||
| 214 | Resistor="PullUp" | ||
| 215 | Mode="Input" | ||
| 216 | Alternate="0" /> | ||
| 217 | <pin8 | ||
| 218 | ID="" | ||
| 219 | Type="PushPull" | ||
| 220 | Level="High" | ||
| 221 | Speed="Maximum" | ||
| 222 | Resistor="PullUp" | ||
| 223 | Mode="Input" | ||
| 224 | Alternate="0" /> | ||
| 225 | <pin9 | ||
| 226 | ID="LSM303DLHC_SDA" | ||
| 227 | Type="PushPull" | ||
| 228 | Level="High" | ||
| 229 | Speed="Maximum" | ||
| 230 | Resistor="Floating" | ||
| 231 | Mode="Alternate" | ||
| 232 | Alternate="4" /> | ||
| 233 | <pin10 | ||
| 234 | ID="MP45DT02_CLK_IN" | ||
| 235 | Type="PushPull" | ||
| 236 | Level="High" | ||
| 237 | Speed="Maximum" | ||
| 238 | Resistor="Floating" | ||
| 239 | Mode="Alternate" | ||
| 240 | Alternate="5" /> | ||
| 241 | <pin11 | ||
| 242 | ID="" | ||
| 243 | Type="PushPull" | ||
| 244 | Level="High" | ||
| 245 | Speed="Maximum" | ||
| 246 | Resistor="PullUp" | ||
| 247 | Mode="Input" | ||
| 248 | Alternate="0" /> | ||
| 249 | <pin12 | ||
| 250 | ID="" | ||
| 251 | Type="PushPull" | ||
| 252 | Level="High" | ||
| 253 | Speed="Maximum" | ||
| 254 | Resistor="PullUp" | ||
| 255 | Mode="Input" | ||
| 256 | Alternate="0" /> | ||
| 257 | <pin13 | ||
| 258 | ID="" | ||
| 259 | Type="PushPull" | ||
| 260 | Level="High" | ||
| 261 | Speed="Maximum" | ||
| 262 | Resistor="PullUp" | ||
| 263 | Mode="Input" | ||
| 264 | Alternate="0" /> | ||
| 265 | <pin14 | ||
| 266 | ID="" | ||
| 267 | Type="PushPull" | ||
| 268 | Level="High" | ||
| 269 | Speed="Maximum" | ||
| 270 | Resistor="PullUp" | ||
| 271 | Mode="Input" | ||
| 272 | Alternate="0" /> | ||
| 273 | <pin15 | ||
| 274 | ID="" | ||
| 275 | Type="PushPull" | ||
| 276 | Level="High" | ||
| 277 | Speed="Maximum" | ||
| 278 | Resistor="PullUp" | ||
| 279 | Mode="Input" | ||
| 280 | Alternate="0" /> | ||
| 281 | </GPIOB> | ||
| 282 | <GPIOC> | ||
| 283 | <pin0 | ||
| 284 | ID="OTG_FS_POWER_ON" | ||
| 285 | Type="PushPull" | ||
| 286 | Level="High" | ||
| 287 | Speed="Maximum" | ||
| 288 | Resistor="PullUp" | ||
| 289 | Mode="Output" | ||
| 290 | Alternate="0" /> | ||
| 291 | <pin1 | ||
| 292 | ID="" | ||
| 293 | Type="PushPull" | ||
| 294 | Level="High" | ||
| 295 | Speed="Maximum" | ||
| 296 | Resistor="PullUp" | ||
| 297 | Mode="Input" | ||
| 298 | Alternate="0" /> | ||
| 299 | <pin2 | ||
| 300 | ID="" | ||
| 301 | Type="PushPull" | ||
| 302 | Level="High" | ||
| 303 | Speed="Maximum" | ||
| 304 | Resistor="PullUp" | ||
| 305 | Mode="Input" | ||
| 306 | Alternate="0" /> | ||
| 307 | <pin3 | ||
| 308 | ID="CS43L22_AIN4x MP45DT02_PDM_OUT" | ||
| 309 | Type="PushPull" | ||
| 310 | Level="High" | ||
| 311 | Speed="Maximum" | ||
| 312 | Resistor="Floating" | ||
| 313 | Mode="Alternate" | ||
| 314 | Alternate="5" /> | ||
| 315 | <pin4 | ||
| 316 | ID="" | ||
| 317 | Type="PushPull" | ||
| 318 | Level="High" | ||
| 319 | Speed="Maximum" | ||
| 320 | Resistor="PullUp" | ||
| 321 | Mode="Input" | ||
| 322 | Alternate="0" /> | ||
| 323 | <pin5 | ||
| 324 | ID="" | ||
| 325 | Type="PushPull" | ||
| 326 | Level="High" | ||
| 327 | Speed="Maximum" | ||
| 328 | Resistor="PullUp" | ||
| 329 | Mode="Input" | ||
| 330 | Alternate="0" /> | ||
| 331 | <pin6 | ||
| 332 | ID="" | ||
| 333 | Type="PushPull" | ||
| 334 | Level="High" | ||
| 335 | Speed="Maximum" | ||
| 336 | Resistor="PullUp" | ||
| 337 | Mode="Input" | ||
| 338 | Alternate="0" /> | ||
| 339 | <pin7 | ||
| 340 | ID="CS43L22_MCLK" | ||
| 341 | Type="PushPull" | ||
| 342 | Level="High" | ||
| 343 | Speed="Maximum" | ||
| 344 | Resistor="PullUp" | ||
| 345 | Mode="Alternate" | ||
| 346 | Alternate="6" /> | ||
| 347 | <pin8 | ||
| 348 | ID="" | ||
| 349 | Type="PushPull" | ||
| 350 | Level="High" | ||
| 351 | Speed="Maximum" | ||
| 352 | Resistor="PullUp" | ||
| 353 | Mode="Input" | ||
| 354 | Alternate="0" /> | ||
| 355 | <pin9 | ||
| 356 | ID="" | ||
| 357 | Type="PushPull" | ||
| 358 | Level="High" | ||
| 359 | Speed="Maximum" | ||
| 360 | Resistor="PullUp" | ||
| 361 | Mode="Input" | ||
| 362 | Alternate="0" /> | ||
| 363 | <pin10 | ||
| 364 | ID="CS43L22_SCLK" | ||
| 365 | Type="PushPull" | ||
| 366 | Level="High" | ||
| 367 | Speed="Maximum" | ||
| 368 | Resistor="PullUp" | ||
| 369 | Mode="Alternate" | ||
| 370 | Alternate="6" /> | ||
| 371 | <pin11 | ||
| 372 | ID="" | ||
| 373 | Type="PushPull" | ||
| 374 | Level="High" | ||
| 375 | Speed="Maximum" | ||
| 376 | Resistor="PullUp" | ||
| 377 | Mode="Input" | ||
| 378 | Alternate="0" /> | ||
| 379 | <pin12 | ||
| 380 | ID="CS43L22_SDIN" | ||
| 381 | Type="PushPull" | ||
| 382 | Level="High" | ||
| 383 | Speed="Maximum" | ||
| 384 | Resistor="PullUp" | ||
| 385 | Mode="Alternate" | ||
| 386 | Alternate="6" /> | ||
| 387 | <pin13 | ||
| 388 | ID="" | ||
| 389 | Type="PushPull" | ||
| 390 | Level="High" | ||
| 391 | Speed="Maximum" | ||
| 392 | Resistor="PullUp" | ||
| 393 | Mode="Input" | ||
| 394 | Alternate="0" /> | ||
| 395 | <pin14 | ||
| 396 | ID="OSC32_IN" | ||
| 397 | Type="PushPull" | ||
| 398 | Level="High" | ||
| 399 | Speed="Maximum" | ||
| 400 | Resistor="Floating" | ||
| 401 | Mode="Input" | ||
| 402 | Alternate="0" /> | ||
| 403 | <pin15 | ||
| 404 | ID="OSC32_OUT" | ||
| 405 | Type="PushPull" | ||
| 406 | Level="High" | ||
| 407 | Speed="Maximum" | ||
| 408 | Resistor="Floating" | ||
| 409 | Mode="Input" | ||
| 410 | Alternate="0" /> | ||
| 411 | </GPIOC> | ||
| 412 | <GPIOD> | ||
| 413 | <pin0 | ||
| 414 | ID="" | ||
| 415 | Type="PushPull" | ||
| 416 | Level="High" | ||
| 417 | Speed="Maximum" | ||
| 418 | Resistor="PullUp" | ||
| 419 | Mode="Input" | ||
| 420 | Alternate="0" /> | ||
| 421 | <pin1 | ||
| 422 | ID="" | ||
| 423 | Type="PushPull" | ||
| 424 | Level="High" | ||
| 425 | Speed="Maximum" | ||
| 426 | Resistor="PullUp" | ||
| 427 | Mode="Input" | ||
| 428 | Alternate="0" /> | ||
| 429 | <pin2 | ||
| 430 | ID="" | ||
| 431 | Type="PushPull" | ||
| 432 | Level="High" | ||
| 433 | Speed="Maximum" | ||
| 434 | Resistor="PullUp" | ||
| 435 | Mode="Input" | ||
| 436 | Alternate="0" /> | ||
| 437 | <pin3 | ||
| 438 | ID="" | ||
| 439 | Type="PushPull" | ||
| 440 | Level="High" | ||
| 441 | Speed="Maximum" | ||
| 442 | Resistor="PullUp" | ||
| 443 | Mode="Input" | ||
| 444 | Alternate="0" /> | ||
| 445 | <pin4 | ||
| 446 | ID="CS43L22_RESET" | ||
| 447 | Type="PushPull" | ||
| 448 | Level="High" | ||
| 449 | Speed="Maximum" | ||
| 450 | Resistor="PullUp" | ||
| 451 | Mode="Output" | ||
| 452 | Alternate="0" /> | ||
| 453 | <pin5 | ||
| 454 | ID="OverCurrent" | ||
| 455 | Type="PushPull" | ||
| 456 | Level="High" | ||
| 457 | Speed="Maximum" | ||
| 458 | Resistor="Floating" | ||
| 459 | Mode="Input" | ||
| 460 | Alternate="0" /> | ||
| 461 | <pin6 | ||
| 462 | ID="" | ||
| 463 | Type="PushPull" | ||
| 464 | Level="High" | ||
| 465 | Speed="Maximum" | ||
| 466 | Resistor="PullUp" | ||
| 467 | Mode="Input" | ||
| 468 | Alternate="0" /> | ||
| 469 | <pin7 | ||
| 470 | ID="" | ||
| 471 | Type="PushPull" | ||
| 472 | Level="High" | ||
| 473 | Speed="Maximum" | ||
| 474 | Resistor="PullUp" | ||
| 475 | Mode="Input" | ||
| 476 | Alternate="0" /> | ||
| 477 | <pin8 | ||
| 478 | ID="" | ||
| 479 | Type="PushPull" | ||
| 480 | Level="High" | ||
| 481 | Speed="Maximum" | ||
| 482 | Resistor="PullUp" | ||
| 483 | Mode="Input" | ||
| 484 | Alternate="0" /> | ||
| 485 | <pin9 | ||
| 486 | ID="" | ||
| 487 | Type="PushPull" | ||
| 488 | Level="High" | ||
| 489 | Speed="Maximum" | ||
| 490 | Resistor="PullUp" | ||
| 491 | Mode="Input" | ||
| 492 | Alternate="0" /> | ||
| 493 | <pin10 | ||
| 494 | ID="" | ||
| 495 | Type="PushPull" | ||
| 496 | Level="High" | ||
| 497 | Speed="Maximum" | ||
| 498 | Resistor="PullUp" | ||
| 499 | Mode="Input" | ||
| 500 | Alternate="0" /> | ||
| 501 | <pin11 | ||
| 502 | ID="" | ||
| 503 | Type="PushPull" | ||
| 504 | Level="High" | ||
| 505 | Speed="Maximum" | ||
| 506 | Resistor="PullUp" | ||
| 507 | Mode="Input" | ||
| 508 | Alternate="0" /> | ||
| 509 | <pin12 | ||
| 510 | ID="LED4" | ||
| 511 | Type="PushPull" | ||
| 512 | Level="Low" | ||
| 513 | Speed="Maximum" | ||
| 514 | Resistor="Floating" | ||
| 515 | Mode="Output" | ||
| 516 | Alternate="0" /> | ||
| 517 | <pin13 | ||
| 518 | ID="LED3" | ||
| 519 | Type="PushPull" | ||
| 520 | Level="Low" | ||
| 521 | Speed="Maximum" | ||
| 522 | Resistor="Floating" | ||
| 523 | Mode="Output" | ||
| 524 | Alternate="0" /> | ||
| 525 | <pin14 | ||
| 526 | ID="LED5" | ||
| 527 | Type="PushPull" | ||
| 528 | Level="Low" | ||
| 529 | Speed="Maximum" | ||
| 530 | Resistor="Floating" | ||
| 531 | Mode="Output" | ||
| 532 | Alternate="0" /> | ||
| 533 | <pin15 | ||
| 534 | ID="LED6" | ||
| 535 | Type="PushPull" | ||
| 536 | Level="Low" | ||
| 537 | Speed="Maximum" | ||
| 538 | Resistor="Floating" | ||
| 539 | Mode="Output" | ||
| 540 | Alternate="0" /> | ||
| 541 | </GPIOD> | ||
| 542 | <GPIOE> | ||
| 543 | <pin0 | ||
| 544 | ID="L3GD20_INT1" | ||
| 545 | Type="PushPull" | ||
| 546 | Level="High" | ||
| 547 | Speed="Maximum" | ||
| 548 | Resistor="PullUp" | ||
| 549 | Mode="Input" | ||
| 550 | Alternate="0" /> | ||
| 551 | <pin1 | ||
| 552 | ID="L3GD20_INT2" | ||
| 553 | Type="PushPull" | ||
| 554 | Level="High" | ||
| 555 | Speed="Maximum" | ||
| 556 | Resistor="PullUp" | ||
| 557 | Mode="Input" | ||
| 558 | Alternate="0" /> | ||
| 559 | <pin2 | ||
| 560 | ID="LSM303DLHC_DRDY" | ||
| 561 | Type="PushPull" | ||
| 562 | Level="High" | ||
| 563 | Speed="Maximum" | ||
| 564 | Resistor="Floating" | ||
| 565 | Mode="Input" | ||
| 566 | Alternate="0" /> | ||
| 567 | <pin3 | ||
| 568 | ID="L3GD20_CS" | ||
| 569 | Type="PushPull" | ||
| 570 | Level="High" | ||
| 571 | Speed="Maximum" | ||
| 572 | Resistor="PullUp" | ||
| 573 | Mode="Output" | ||
| 574 | Alternate="0" /> | ||
| 575 | <pin4 | ||
| 576 | ID="LSM303DLHC_INT1" | ||
| 577 | Type="PushPull" | ||
| 578 | Level="High" | ||
| 579 | Speed="Maximum" | ||
| 580 | Resistor="PullUp" | ||
| 581 | Mode="Output" | ||
| 582 | Alternate="0" /> | ||
| 583 | <pin5 | ||
| 584 | ID="LSM303DLHC_INT2" | ||
| 585 | Type="PushPull" | ||
| 586 | Level="High" | ||
| 587 | Speed="Maximum" | ||
| 588 | Resistor="PullUp" | ||
| 589 | Mode="Output" | ||
| 590 | Alternate="0" /> | ||
| 591 | <pin6 | ||
| 592 | ID="" | ||
| 593 | Type="PushPull" | ||
| 594 | Level="High" | ||
| 595 | Speed="Maximum" | ||
| 596 | Resistor="PullUp" | ||
| 597 | Mode="Input" | ||
| 598 | Alternate="0" /> | ||
| 599 | <pin7 | ||
| 600 | ID="" | ||
| 601 | Type="PushPull" | ||
| 602 | Level="High" | ||
| 603 | Speed="Maximum" | ||
| 604 | Resistor="PullUp" | ||
| 605 | Mode="Input" | ||
| 606 | Alternate="0" /> | ||
| 607 | <pin8 | ||
| 608 | ID="" | ||
| 609 | Type="PushPull" | ||
| 610 | Level="High" | ||
| 611 | Speed="Maximum" | ||
| 612 | Resistor="PullUp" | ||
| 613 | Mode="Input" | ||
| 614 | Alternate="0" /> | ||
| 615 | <pin9 | ||
| 616 | ID="" | ||
| 617 | Type="PushPull" | ||
| 618 | Level="High" | ||
| 619 | Speed="Maximum" | ||
| 620 | Resistor="PullUp" | ||
| 621 | Mode="Input" | ||
| 622 | Alternate="0" /> | ||
| 623 | <pin10 | ||
| 624 | ID="" | ||
| 625 | Type="PushPull" | ||
| 626 | Level="High" | ||
| 627 | Speed="Maximum" | ||
| 628 | Resistor="PullUp" | ||
| 629 | Mode="Input" | ||
| 630 | Alternate="0" /> | ||
| 631 | <pin11 | ||
| 632 | ID="" | ||
| 633 | Type="PushPull" | ||
| 634 | Level="High" | ||
| 635 | Speed="Maximum" | ||
| 636 | Resistor="PullUp" | ||
| 637 | Mode="Input" | ||
| 638 | Alternate="0" /> | ||
| 639 | <pin12 | ||
| 640 | ID="" | ||
| 641 | Type="PushPull" | ||
| 642 | Level="High" | ||
| 643 | Speed="Maximum" | ||
| 644 | Resistor="PullUp" | ||
| 645 | Mode="Input" | ||
| 646 | Alternate="0" /> | ||
| 647 | <pin13 | ||
| 648 | ID="" | ||
| 649 | Type="PushPull" | ||
| 650 | Level="High" | ||
| 651 | Speed="Maximum" | ||
| 652 | Resistor="PullUp" | ||
| 653 | Mode="Input" | ||
| 654 | Alternate="0" /> | ||
| 655 | <pin14 | ||
| 656 | ID="" | ||
| 657 | Type="PushPull" | ||
| 658 | Level="High" | ||
| 659 | Speed="Maximum" | ||
| 660 | Resistor="PullUp" | ||
| 661 | Mode="Input" | ||
| 662 | Alternate="0" /> | ||
| 663 | <pin15 | ||
| 664 | ID="" | ||
| 665 | Type="PushPull" | ||
| 666 | Level="High" | ||
| 667 | Speed="Maximum" | ||
| 668 | Resistor="PullUp" | ||
| 669 | Mode="Input" | ||
| 670 | Alternate="0" /> | ||
| 671 | </GPIOE> | ||
| 672 | <GPIOF> | ||
| 673 | <pin0 | ||
| 674 | ID="" | ||
| 675 | Type="PushPull" | ||
| 676 | Level="High" | ||
| 677 | Speed="Maximum" | ||
| 678 | Resistor="PullUp" | ||
| 679 | Mode="Input" | ||
| 680 | Alternate="0" /> | ||
| 681 | <pin1 | ||
| 682 | ID="" | ||
| 683 | Type="PushPull" | ||
| 684 | Level="High" | ||
| 685 | Speed="Maximum" | ||
| 686 | Resistor="PullUp" | ||
| 687 | Mode="Input" | ||
| 688 | Alternate="0" /> | ||
| 689 | <pin2 | ||
| 690 | ID="" | ||
| 691 | Type="PushPull" | ||
| 692 | Level="High" | ||
| 693 | Speed="Maximum" | ||
| 694 | Resistor="PullUp" | ||
| 695 | Mode="Input" | ||
| 696 | Alternate="0" /> | ||
| 697 | <pin3 | ||
| 698 | ID="" | ||
| 699 | Type="PushPull" | ||
| 700 | Level="High" | ||
| 701 | Speed="Maximum" | ||
| 702 | Resistor="PullUp" | ||
| 703 | Mode="Input" | ||
| 704 | Alternate="0" /> | ||
| 705 | <pin4 | ||
| 706 | ID="" | ||
| 707 | Type="PushPull" | ||
| 708 | Level="High" | ||
| 709 | Speed="Maximum" | ||
| 710 | Resistor="PullUp" | ||
| 711 | Mode="Input" | ||
| 712 | Alternate="0" /> | ||
| 713 | <pin5 | ||
| 714 | ID="" | ||
| 715 | Type="PushPull" | ||
| 716 | Level="High" | ||
| 717 | Speed="Maximum" | ||
| 718 | Resistor="PullUp" | ||
| 719 | Mode="Input" | ||
| 720 | Alternate="0" /> | ||
| 721 | <pin6 | ||
| 722 | ID="" | ||
| 723 | Type="PushPull" | ||
| 724 | Level="High" | ||
| 725 | Speed="Maximum" | ||
| 726 | Resistor="PullUp" | ||
| 727 | Mode="Input" | ||
| 728 | Alternate="0" /> | ||
| 729 | <pin7 | ||
| 730 | ID="" | ||
| 731 | Type="PushPull" | ||
| 732 | Level="High" | ||
| 733 | Speed="Maximum" | ||
| 734 | Resistor="PullUp" | ||
| 735 | Mode="Input" | ||
| 736 | Alternate="0" /> | ||
| 737 | <pin8 | ||
| 738 | ID="" | ||
| 739 | Type="PushPull" | ||
| 740 | Level="High" | ||
| 741 | Speed="Maximum" | ||
| 742 | Resistor="PullUp" | ||
| 743 | Mode="Input" | ||
| 744 | Alternate="0" /> | ||
| 745 | <pin9 | ||
| 746 | ID="" | ||
| 747 | Type="PushPull" | ||
| 748 | Level="High" | ||
| 749 | Speed="Maximum" | ||
| 750 | Resistor="PullUp" | ||
| 751 | Mode="Input" | ||
| 752 | Alternate="0" /> | ||
| 753 | <pin10 | ||
| 754 | ID="" | ||
| 755 | Type="PushPull" | ||
| 756 | Level="High" | ||
| 757 | Speed="Maximum" | ||
| 758 | Resistor="PullUp" | ||
| 759 | Mode="Input" | ||
| 760 | Alternate="0" /> | ||
| 761 | <pin11 | ||
| 762 | ID="" | ||
| 763 | Type="PushPull" | ||
| 764 | Level="High" | ||
| 765 | Speed="Maximum" | ||
| 766 | Resistor="PullUp" | ||
| 767 | Mode="Input" | ||
| 768 | Alternate="0" /> | ||
| 769 | <pin12 | ||
| 770 | ID="" | ||
| 771 | Type="PushPull" | ||
| 772 | Level="High" | ||
| 773 | Speed="Maximum" | ||
| 774 | Resistor="PullUp" | ||
| 775 | Mode="Input" | ||
| 776 | Alternate="0" /> | ||
| 777 | <pin13 | ||
| 778 | ID="" | ||
| 779 | Type="PushPull" | ||
| 780 | Level="High" | ||
| 781 | Speed="Maximum" | ||
| 782 | Resistor="PullUp" | ||
| 783 | Mode="Input" | ||
| 784 | Alternate="0" /> | ||
| 785 | <pin14 | ||
| 786 | ID="" | ||
| 787 | Type="PushPull" | ||
| 788 | Level="High" | ||
| 789 | Speed="Maximum" | ||
| 790 | Resistor="PullUp" | ||
| 791 | Mode="Input" | ||
| 792 | Alternate="0" /> | ||
| 793 | <pin15 | ||
| 794 | ID="" | ||
| 795 | Type="PushPull" | ||
| 796 | Level="High" | ||
| 797 | Speed="Maximum" | ||
| 798 | Resistor="PullUp" | ||
| 799 | Mode="Input" | ||
| 800 | Alternate="0" /> | ||
| 801 | </GPIOF> | ||
| 802 | <GPIOG> | ||
| 803 | <pin0 | ||
| 804 | ID="" | ||
| 805 | Type="PushPull" | ||
| 806 | Level="High" | ||
| 807 | Speed="Maximum" | ||
| 808 | Resistor="PullUp" | ||
| 809 | Mode="Input" | ||
| 810 | Alternate="0" /> | ||
| 811 | <pin1 | ||
| 812 | ID="" | ||
| 813 | Type="PushPull" | ||
| 814 | Level="High" | ||
| 815 | Speed="Maximum" | ||
| 816 | Resistor="PullUp" | ||
| 817 | Mode="Input" | ||
| 818 | Alternate="0" /> | ||
| 819 | <pin2 | ||
| 820 | ID="" | ||
| 821 | Type="PushPull" | ||
| 822 | Level="High" | ||
| 823 | Speed="Maximum" | ||
| 824 | Resistor="PullUp" | ||
| 825 | Mode="Input" | ||
| 826 | Alternate="0" /> | ||
| 827 | <pin3 | ||
| 828 | ID="" | ||
| 829 | Type="PushPull" | ||
| 830 | Level="High" | ||
| 831 | Speed="Maximum" | ||
| 832 | Resistor="PullUp" | ||
| 833 | Mode="Input" | ||
| 834 | Alternate="0" /> | ||
| 835 | <pin4 | ||
| 836 | ID="" | ||
| 837 | Type="PushPull" | ||
| 838 | Level="High" | ||
| 839 | Speed="Maximum" | ||
| 840 | Resistor="PullUp" | ||
| 841 | Mode="Input" | ||
| 842 | Alternate="0" /> | ||
| 843 | <pin5 | ||
| 844 | ID="" | ||
| 845 | Type="PushPull" | ||
| 846 | Level="High" | ||
| 847 | Speed="Maximum" | ||
| 848 | Resistor="PullUp" | ||
| 849 | Mode="Input" | ||
| 850 | Alternate="0" /> | ||
| 851 | <pin6 | ||
| 852 | ID="" | ||
| 853 | Type="PushPull" | ||
| 854 | Level="High" | ||
| 855 | Speed="Maximum" | ||
| 856 | Resistor="PullUp" | ||
| 857 | Mode="Input" | ||
| 858 | Alternate="0" /> | ||
| 859 | <pin7 | ||
| 860 | ID="" | ||
| 861 | Type="PushPull" | ||
| 862 | Level="High" | ||
| 863 | Speed="Maximum" | ||
| 864 | Resistor="PullUp" | ||
| 865 | Mode="Input" | ||
| 866 | Alternate="0" /> | ||
| 867 | <pin8 | ||
| 868 | ID="" | ||
| 869 | Type="PushPull" | ||
| 870 | Level="High" | ||
| 871 | Speed="Maximum" | ||
| 872 | Resistor="PullUp" | ||
| 873 | Mode="Input" | ||
| 874 | Alternate="0" /> | ||
| 875 | <pin9 | ||
| 876 | ID="" | ||
| 877 | Type="PushPull" | ||
| 878 | Level="High" | ||
| 879 | Speed="Maximum" | ||
| 880 | Resistor="PullUp" | ||
| 881 | Mode="Input" | ||
| 882 | Alternate="0" /> | ||
| 883 | <pin10 | ||
| 884 | ID="" | ||
| 885 | Type="PushPull" | ||
| 886 | Level="High" | ||
| 887 | Speed="Maximum" | ||
| 888 | Resistor="PullUp" | ||
| 889 | Mode="Input" | ||
| 890 | Alternate="0" /> | ||
| 891 | <pin11 | ||
| 892 | ID="" | ||
| 893 | Type="PushPull" | ||
| 894 | Level="High" | ||
| 895 | Speed="Maximum" | ||
| 896 | Resistor="PullUp" | ||
| 897 | Mode="Input" | ||
| 898 | Alternate="0" /> | ||
| 899 | <pin12 | ||
| 900 | ID="" | ||
| 901 | Type="PushPull" | ||
| 902 | Level="High" | ||
| 903 | Speed="Maximum" | ||
| 904 | Resistor="PullUp" | ||
| 905 | Mode="Input" | ||
| 906 | Alternate="0" /> | ||
| 907 | <pin13 | ||
| 908 | ID="" | ||
| 909 | Type="PushPull" | ||
| 910 | Level="High" | ||
| 911 | Speed="Maximum" | ||
| 912 | Resistor="PullUp" | ||
| 913 | Mode="Input" | ||
| 914 | Alternate="0" /> | ||
| 915 | <pin14 | ||
| 916 | ID="" | ||
| 917 | Type="PushPull" | ||
| 918 | Level="High" | ||
| 919 | Speed="Maximum" | ||
| 920 | Resistor="PullUp" | ||
| 921 | Mode="Input" | ||
| 922 | Alternate="0" /> | ||
| 923 | <pin15 | ||
| 924 | ID="" | ||
| 925 | Type="PushPull" | ||
| 926 | Level="High" | ||
| 927 | Speed="Maximum" | ||
| 928 | Resistor="PullUp" | ||
| 929 | Mode="Input" | ||
| 930 | Alternate="0" /> | ||
| 931 | </GPIOG> | ||
| 932 | <GPIOH> | ||
| 933 | <pin0 | ||
| 934 | ID="OSC_IN" | ||
| 935 | Type="PushPull" | ||
| 936 | Level="High" | ||
| 937 | Speed="Maximum" | ||
| 938 | Resistor="Floating" | ||
| 939 | Mode="Input" | ||
| 940 | Alternate="0" /> | ||
| 941 | <pin1 | ||
| 942 | ID="OSC_OUT" | ||
| 943 | Type="PushPull" | ||
| 944 | Level="High" | ||
| 945 | Speed="Maximum" | ||
| 946 | Resistor="Floating" | ||
| 947 | Mode="Input" | ||
| 948 | Alternate="0" /> | ||
| 949 | <pin2 | ||
| 950 | ID="" | ||
| 951 | Type="PushPull" | ||
| 952 | Level="High" | ||
| 953 | Speed="Maximum" | ||
| 954 | Resistor="PullUp" | ||
| 955 | Mode="Input" | ||
| 956 | Alternate="0" /> | ||
| 957 | <pin3 | ||
| 958 | ID="" | ||
| 959 | Type="PushPull" | ||
| 960 | Level="High" | ||
| 961 | Speed="Maximum" | ||
| 962 | Resistor="PullUp" | ||
| 963 | Mode="Input" | ||
| 964 | Alternate="0" /> | ||
| 965 | <pin4 | ||
| 966 | ID="" | ||
| 967 | Type="PushPull" | ||
| 968 | Level="High" | ||
| 969 | Speed="Maximum" | ||
| 970 | Resistor="PullUp" | ||
| 971 | Mode="Input" | ||
| 972 | Alternate="0" /> | ||
| 973 | <pin5 | ||
| 974 | ID="" | ||
| 975 | Type="PushPull" | ||
| 976 | Level="High" | ||
| 977 | Speed="Maximum" | ||
| 978 | Resistor="PullUp" | ||
| 979 | Mode="Input" | ||
| 980 | Alternate="0" /> | ||
| 981 | <pin6 | ||
| 982 | ID="" | ||
| 983 | Type="PushPull" | ||
| 984 | Level="High" | ||
| 985 | Speed="Maximum" | ||
| 986 | Resistor="PullUp" | ||
| 987 | Mode="Input" | ||
| 988 | Alternate="0" /> | ||
| 989 | <pin7 | ||
| 990 | ID="" | ||
| 991 | Type="PushPull" | ||
| 992 | Level="High" | ||
| 993 | Speed="Maximum" | ||
| 994 | Resistor="PullUp" | ||
| 995 | Mode="Input" | ||
| 996 | Alternate="0" /> | ||
| 997 | <pin8 | ||
| 998 | ID="" | ||
| 999 | Type="PushPull" | ||
| 1000 | Level="High" | ||
| 1001 | Speed="Maximum" | ||
| 1002 | Resistor="PullUp" | ||
| 1003 | Mode="Input" | ||
| 1004 | Alternate="0" /> | ||
| 1005 | <pin9 | ||
| 1006 | ID="" | ||
| 1007 | Type="PushPull" | ||
| 1008 | Level="High" | ||
| 1009 | Speed="Maximum" | ||
| 1010 | Resistor="PullUp" | ||
| 1011 | Mode="Input" | ||
| 1012 | Alternate="0" /> | ||
| 1013 | <pin10 | ||
| 1014 | ID="" | ||
| 1015 | Type="PushPull" | ||
| 1016 | Level="High" | ||
| 1017 | Speed="Maximum" | ||
| 1018 | Resistor="PullUp" | ||
| 1019 | Mode="Input" | ||
| 1020 | Alternate="0" /> | ||
| 1021 | <pin11 | ||
| 1022 | ID="" | ||
| 1023 | Type="PushPull" | ||
| 1024 | Level="High" | ||
| 1025 | Speed="Maximum" | ||
| 1026 | Resistor="PullUp" | ||
| 1027 | Mode="Input" | ||
| 1028 | Alternate="0" /> | ||
| 1029 | <pin12 | ||
| 1030 | ID="" | ||
| 1031 | Type="PushPull" | ||
| 1032 | Level="High" | ||
| 1033 | Speed="Maximum" | ||
| 1034 | Resistor="PullUp" | ||
| 1035 | Mode="Input" | ||
| 1036 | Alternate="0" /> | ||
| 1037 | <pin13 | ||
| 1038 | ID="" | ||
| 1039 | Type="PushPull" | ||
| 1040 | Level="High" | ||
| 1041 | Speed="Maximum" | ||
| 1042 | Resistor="PullUp" | ||
| 1043 | Mode="Input" | ||
| 1044 | Alternate="0" /> | ||
| 1045 | <pin14 | ||
| 1046 | ID="" | ||
| 1047 | Type="PushPull" | ||
| 1048 | Level="High" | ||
| 1049 | Speed="Maximum" | ||
| 1050 | Resistor="PullUp" | ||
| 1051 | Mode="Input" | ||
| 1052 | Alternate="0" /> | ||
| 1053 | <pin15 | ||
| 1054 | ID="" | ||
| 1055 | Type="PushPull" | ||
| 1056 | Level="High" | ||
| 1057 | Speed="Maximum" | ||
| 1058 | Resistor="PullUp" | ||
| 1059 | Mode="Input" | ||
| 1060 | Alternate="0" /> | ||
| 1061 | </GPIOH> | ||
| 1062 | <GPIOI> | ||
| 1063 | <pin0 | ||
| 1064 | ID="" | ||
| 1065 | Type="PushPull" | ||
| 1066 | Level="High" | ||
| 1067 | Speed="Maximum" | ||
| 1068 | Resistor="PullUp" | ||
| 1069 | Mode="Input" | ||
| 1070 | Alternate="0" /> | ||
| 1071 | <pin1 | ||
| 1072 | ID="" | ||
| 1073 | Type="PushPull" | ||
| 1074 | Level="High" | ||
| 1075 | Speed="Maximum" | ||
| 1076 | Resistor="PullUp" | ||
| 1077 | Mode="Input" | ||
| 1078 | Alternate="0" /> | ||
| 1079 | <pin2 | ||
| 1080 | ID="" | ||
| 1081 | Type="PushPull" | ||
| 1082 | Level="High" | ||
| 1083 | Speed="Maximum" | ||
| 1084 | Resistor="PullUp" | ||
| 1085 | Mode="Input" | ||
| 1086 | Alternate="0" /> | ||
| 1087 | <pin3 | ||
| 1088 | ID="" | ||
| 1089 | Type="PushPull" | ||
| 1090 | Level="High" | ||
| 1091 | Speed="Maximum" | ||
| 1092 | Resistor="PullUp" | ||
| 1093 | Mode="Input" | ||
| 1094 | Alternate="0" /> | ||
| 1095 | <pin4 | ||
| 1096 | ID="" | ||
| 1097 | Type="PushPull" | ||
| 1098 | Level="High" | ||
| 1099 | Speed="Maximum" | ||
| 1100 | Resistor="PullUp" | ||
| 1101 | Mode="Input" | ||
| 1102 | Alternate="0" /> | ||
| 1103 | <pin5 | ||
| 1104 | ID="" | ||
| 1105 | Type="PushPull" | ||
| 1106 | Level="High" | ||
| 1107 | Speed="Maximum" | ||
| 1108 | Resistor="PullUp" | ||
| 1109 | Mode="Input" | ||
| 1110 | Alternate="0" /> | ||
| 1111 | <pin6 | ||
| 1112 | ID="" | ||
| 1113 | Type="PushPull" | ||
| 1114 | Level="High" | ||
| 1115 | Speed="Maximum" | ||
| 1116 | Resistor="PullUp" | ||
| 1117 | Mode="Input" | ||
| 1118 | Alternate="0" /> | ||
| 1119 | <pin7 | ||
| 1120 | ID="" | ||
| 1121 | Type="PushPull" | ||
| 1122 | Level="High" | ||
| 1123 | Speed="Maximum" | ||
| 1124 | Resistor="PullUp" | ||
| 1125 | Mode="Input" | ||
| 1126 | Alternate="0" /> | ||
| 1127 | <pin8 | ||
| 1128 | ID="" | ||
| 1129 | Type="PushPull" | ||
| 1130 | Level="High" | ||
| 1131 | Speed="Maximum" | ||
| 1132 | Resistor="PullUp" | ||
| 1133 | Mode="Input" | ||
| 1134 | Alternate="0" /> | ||
| 1135 | <pin9 | ||
| 1136 | ID="" | ||
| 1137 | Type="PushPull" | ||
| 1138 | Level="High" | ||
| 1139 | Speed="Maximum" | ||
| 1140 | Resistor="PullUp" | ||
| 1141 | Mode="Input" | ||
| 1142 | Alternate="0" /> | ||
| 1143 | <pin10 | ||
| 1144 | ID="" | ||
| 1145 | Type="PushPull" | ||
| 1146 | Level="High" | ||
| 1147 | Speed="Maximum" | ||
| 1148 | Resistor="PullUp" | ||
| 1149 | Mode="Input" | ||
| 1150 | Alternate="0" /> | ||
| 1151 | <pin11 | ||
| 1152 | ID="" | ||
| 1153 | Type="PushPull" | ||
| 1154 | Level="High" | ||
| 1155 | Speed="Maximum" | ||
| 1156 | Resistor="PullUp" | ||
| 1157 | Mode="Input" | ||
| 1158 | Alternate="0" /> | ||
| 1159 | <pin12 | ||
| 1160 | ID="" | ||
| 1161 | Type="PushPull" | ||
| 1162 | Level="High" | ||
| 1163 | Speed="Maximum" | ||
| 1164 | Resistor="PullUp" | ||
| 1165 | Mode="Input" | ||
| 1166 | Alternate="0" /> | ||
| 1167 | <pin13 | ||
| 1168 | ID="" | ||
| 1169 | Type="PushPull" | ||
| 1170 | Level="High" | ||
| 1171 | Speed="Maximum" | ||
| 1172 | Resistor="PullUp" | ||
| 1173 | Mode="Input" | ||
| 1174 | Alternate="0" /> | ||
| 1175 | <pin14 | ||
| 1176 | ID="" | ||
| 1177 | Type="PushPull" | ||
| 1178 | Level="High" | ||
| 1179 | Speed="Maximum" | ||
| 1180 | Resistor="PullUp" | ||
| 1181 | Mode="Input" | ||
| 1182 | Alternate="0" /> | ||
| 1183 | <pin15 | ||
| 1184 | ID="" | ||
| 1185 | Type="PushPull" | ||
| 1186 | Level="High" | ||
| 1187 | Speed="Maximum" | ||
| 1188 | Resistor="PullUp" | ||
| 1189 | Mode="Input" | ||
| 1190 | Alternate="0" /> | ||
| 1191 | </GPIOI> | ||
| 1192 | </ports> | ||
| 1193 | </board> | ||
diff --git a/drivers/boards/BLACKPILL_STM32_F401/cfg/board.fmpp b/drivers/boards/BLACKPILL_STM32_F401/cfg/board.fmpp deleted file mode 100644 index 41754c141..000000000 --- a/drivers/boards/BLACKPILL_STM32_F401/cfg/board.fmpp +++ /dev/null | |||
| @@ -1,15 +0,0 @@ | |||
| 1 | sourceRoot: ../../../../../tools/ftl/processors/boards/stm32f4xx/templates | ||
| 2 | outputRoot: .. | ||
| 3 | dataRoot: . | ||
| 4 | |||
| 5 | freemarkerLinks: { | ||
| 6 | lib: ../../../../../tools/ftl/libs | ||
| 7 | } | ||
| 8 | |||
| 9 | data : { | ||
| 10 | doc1:xml ( | ||
| 11 | board.chcfg | ||
| 12 | { | ||
| 13 | } | ||
| 14 | ) | ||
| 15 | } | ||
diff --git a/drivers/boards/BLACKPILL_STM32_F411/board.c b/drivers/boards/BLACKPILL_STM32_F411/board.c deleted file mode 100644 index 330e06c8a..000000000 --- a/drivers/boards/BLACKPILL_STM32_F411/board.c +++ /dev/null | |||
| @@ -1,250 +0,0 @@ | |||
| 1 | /* | ||
| 2 | ChibiOS - Copyright (C) 2006..2018 Giovanni Di Sirio | ||
| 3 | |||
| 4 | Licensed under the Apache License, Version 2.0 (the "License"); | ||
| 5 | you may not use this file except in compliance with the License. | ||
| 6 | You may obtain a copy of the License at | ||
| 7 | |||
| 8 | http://www.apache.org/licenses/LICENSE-2.0 | ||
| 9 | |||
| 10 | Unless required by applicable law or agreed to in writing, software | ||
| 11 | distributed under the License is distributed on an "AS IS" BASIS, | ||
| 12 | WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. | ||
| 13 | See the License for the specific language governing permissions and | ||
| 14 | limitations under the License. | ||
| 15 | */ | ||
| 16 | |||
| 17 | /* | ||
| 18 | * This file has been automatically generated using ChibiStudio board | ||
| 19 | * generator plugin. Do not edit manually. | ||
| 20 | */ | ||
| 21 | |||
| 22 | #include "hal.h" | ||
| 23 | #include "stm32_gpio.h" | ||
| 24 | |||
| 25 | /*===========================================================================*/ | ||
| 26 | /* Driver local definitions. */ | ||
| 27 | /*===========================================================================*/ | ||
| 28 | |||
| 29 | /*===========================================================================*/ | ||
| 30 | /* Driver exported variables. */ | ||
| 31 | /*===========================================================================*/ | ||
| 32 | |||
| 33 | /*===========================================================================*/ | ||
| 34 | /* Driver local variables and types. */ | ||
| 35 | /*===========================================================================*/ | ||
| 36 | |||
| 37 | /** | ||
| 38 | * @brief Type of STM32 GPIO port setup. | ||
| 39 | */ | ||
| 40 | typedef struct { | ||
| 41 | uint32_t moder; | ||
| 42 | uint32_t otyper; | ||
| 43 | uint32_t ospeedr; | ||
| 44 | uint32_t pupdr; | ||
| 45 | uint32_t odr; | ||
| 46 | uint32_t afrl; | ||
| 47 | uint32_t afrh; | ||
| 48 | } gpio_setup_t; | ||
| 49 | |||
| 50 | /** | ||
| 51 | * @brief Type of STM32 GPIO initialization data. | ||
| 52 | */ | ||
| 53 | typedef struct { | ||
| 54 | #if STM32_HAS_GPIOA || defined(__DOXYGEN__) | ||
| 55 | gpio_setup_t PAData; | ||
| 56 | #endif | ||
| 57 | #if STM32_HAS_GPIOB || defined(__DOXYGEN__) | ||
| 58 | gpio_setup_t PBData; | ||
| 59 | #endif | ||
| 60 | #if STM32_HAS_GPIOC || defined(__DOXYGEN__) | ||
| 61 | gpio_setup_t PCData; | ||
| 62 | #endif | ||
| 63 | #if STM32_HAS_GPIOD || defined(__DOXYGEN__) | ||
| 64 | gpio_setup_t PDData; | ||
| 65 | #endif | ||
| 66 | #if STM32_HAS_GPIOE || defined(__DOXYGEN__) | ||
| 67 | gpio_setup_t PEData; | ||
| 68 | #endif | ||
| 69 | #if STM32_HAS_GPIOF || defined(__DOXYGEN__) | ||
| 70 | gpio_setup_t PFData; | ||
| 71 | #endif | ||
| 72 | #if STM32_HAS_GPIOG || defined(__DOXYGEN__) | ||
| 73 | gpio_setup_t PGData; | ||
| 74 | #endif | ||
| 75 | #if STM32_HAS_GPIOH || defined(__DOXYGEN__) | ||
| 76 | gpio_setup_t PHData; | ||
| 77 | #endif | ||
| 78 | #if STM32_HAS_GPIOI || defined(__DOXYGEN__) | ||
| 79 | gpio_setup_t PIData; | ||
| 80 | #endif | ||
| 81 | #if STM32_HAS_GPIOJ || defined(__DOXYGEN__) | ||
| 82 | gpio_setup_t PJData; | ||
| 83 | #endif | ||
| 84 | #if STM32_HAS_GPIOK || defined(__DOXYGEN__) | ||
| 85 | gpio_setup_t PKData; | ||
| 86 | #endif | ||
| 87 | } gpio_config_t; | ||
| 88 | |||
| 89 | /** | ||
| 90 | * @brief STM32 GPIO static initialization data. | ||
| 91 | */ | ||
| 92 | static const gpio_config_t gpio_default_config = { | ||
| 93 | #if STM32_HAS_GPIOA | ||
| 94 | {VAL_GPIOA_MODER, VAL_GPIOA_OTYPER, VAL_GPIOA_OSPEEDR, VAL_GPIOA_PUPDR, VAL_GPIOA_ODR, VAL_GPIOA_AFRL, VAL_GPIOA_AFRH}, | ||
| 95 | #endif | ||
| 96 | #if STM32_HAS_GPIOB | ||
| 97 | {VAL_GPIOB_MODER, VAL_GPIOB_OTYPER, VAL_GPIOB_OSPEEDR, VAL_GPIOB_PUPDR, VAL_GPIOB_ODR, VAL_GPIOB_AFRL, VAL_GPIOB_AFRH}, | ||
| 98 | #endif | ||
| 99 | #if STM32_HAS_GPIOC | ||
| 100 | {VAL_GPIOC_MODER, VAL_GPIOC_OTYPER, VAL_GPIOC_OSPEEDR, VAL_GPIOC_PUPDR, VAL_GPIOC_ODR, VAL_GPIOC_AFRL, VAL_GPIOC_AFRH}, | ||
| 101 | #endif | ||
| 102 | #if STM32_HAS_GPIOD | ||
| 103 | {VAL_GPIOD_MODER, VAL_GPIOD_OTYPER, VAL_GPIOD_OSPEEDR, VAL_GPIOD_PUPDR, VAL_GPIOD_ODR, VAL_GPIOD_AFRL, VAL_GPIOD_AFRH}, | ||
| 104 | #endif | ||
| 105 | #if STM32_HAS_GPIOE | ||
| 106 | {VAL_GPIOE_MODER, VAL_GPIOE_OTYPER, VAL_GPIOE_OSPEEDR, VAL_GPIOE_PUPDR, VAL_GPIOE_ODR, VAL_GPIOE_AFRL, VAL_GPIOE_AFRH}, | ||
| 107 | #endif | ||
| 108 | #if STM32_HAS_GPIOF | ||
| 109 | {VAL_GPIOF_MODER, VAL_GPIOF_OTYPER, VAL_GPIOF_OSPEEDR, VAL_GPIOF_PUPDR, VAL_GPIOF_ODR, VAL_GPIOF_AFRL, VAL_GPIOF_AFRH}, | ||
| 110 | #endif | ||
| 111 | #if STM32_HAS_GPIOG | ||
| 112 | {VAL_GPIOG_MODER, VAL_GPIOG_OTYPER, VAL_GPIOG_OSPEEDR, VAL_GPIOG_PUPDR, VAL_GPIOG_ODR, VAL_GPIOG_AFRL, VAL_GPIOG_AFRH}, | ||
| 113 | #endif | ||
| 114 | #if STM32_HAS_GPIOH | ||
| 115 | {VAL_GPIOH_MODER, VAL_GPIOH_OTYPER, VAL_GPIOH_OSPEEDR, VAL_GPIOH_PUPDR, VAL_GPIOH_ODR, VAL_GPIOH_AFRL, VAL_GPIOH_AFRH}, | ||
| 116 | #endif | ||
| 117 | #if STM32_HAS_GPIOI | ||
| 118 | {VAL_GPIOI_MODER, VAL_GPIOI_OTYPER, VAL_GPIOI_OSPEEDR, VAL_GPIOI_PUPDR, VAL_GPIOI_ODR, VAL_GPIOI_AFRL, VAL_GPIOI_AFRH}, | ||
| 119 | #endif | ||
| 120 | #if STM32_HAS_GPIOJ | ||
| 121 | {VAL_GPIOJ_MODER, VAL_GPIOJ_OTYPER, VAL_GPIOJ_OSPEEDR, VAL_GPIOJ_PUPDR, VAL_GPIOJ_ODR, VAL_GPIOJ_AFRL, VAL_GPIOJ_AFRH}, | ||
| 122 | #endif | ||
| 123 | #if STM32_HAS_GPIOK | ||
| 124 | {VAL_GPIOK_MODER, VAL_GPIOK_OTYPER, VAL_GPIOK_OSPEEDR, VAL_GPIOK_PUPDR, VAL_GPIOK_ODR, VAL_GPIOK_AFRL, VAL_GPIOK_AFRH} | ||
| 125 | #endif | ||
| 126 | }; | ||
| 127 | |||
| 128 | /*===========================================================================*/ | ||
| 129 | /* Driver local functions. */ | ||
| 130 | /*===========================================================================*/ | ||
| 131 | |||
| 132 | static void gpio_init(stm32_gpio_t *gpiop, const gpio_setup_t *config) { | ||
| 133 | gpiop->OTYPER = config->otyper; | ||
| 134 | gpiop->OSPEEDR = config->ospeedr; | ||
| 135 | gpiop->PUPDR = config->pupdr; | ||
| 136 | gpiop->ODR = config->odr; | ||
| 137 | gpiop->AFRL = config->afrl; | ||
| 138 | gpiop->AFRH = config->afrh; | ||
| 139 | gpiop->MODER = config->moder; | ||
| 140 | } | ||
| 141 | |||
| 142 | static void stm32_gpio_init(void) { | ||
| 143 | /* Enabling GPIO-related clocks, the mask comes from the | ||
| 144 | registry header file.*/ | ||
| 145 | rccResetAHB1(STM32_GPIO_EN_MASK); | ||
| 146 | rccEnableAHB1(STM32_GPIO_EN_MASK, true); | ||
| 147 | |||
| 148 | /* Initializing all the defined GPIO ports.*/ | ||
| 149 | #if STM32_HAS_GPIOA | ||
| 150 | gpio_init(GPIOA, &gpio_default_config.PAData); | ||
| 151 | #endif | ||
| 152 | #if STM32_HAS_GPIOB | ||
| 153 | gpio_init(GPIOB, &gpio_default_config.PBData); | ||
| 154 | #endif | ||
| 155 | #if STM32_HAS_GPIOC | ||
| 156 | gpio_init(GPIOC, &gpio_default_config.PCData); | ||
| 157 | #endif | ||
| 158 | #if STM32_HAS_GPIOD | ||
| 159 | gpio_init(GPIOD, &gpio_default_config.PDData); | ||
| 160 | #endif | ||
| 161 | #if STM32_HAS_GPIOE | ||
| 162 | gpio_init(GPIOE, &gpio_default_config.PEData); | ||
| 163 | #endif | ||
| 164 | #if STM32_HAS_GPIOF | ||
| 165 | gpio_init(GPIOF, &gpio_default_config.PFData); | ||
| 166 | #endif | ||
| 167 | #if STM32_HAS_GPIOG | ||
| 168 | gpio_init(GPIOG, &gpio_default_config.PGData); | ||
| 169 | #endif | ||
| 170 | #if STM32_HAS_GPIOH | ||
| 171 | gpio_init(GPIOH, &gpio_default_config.PHData); | ||
| 172 | #endif | ||
| 173 | #if STM32_HAS_GPIOI | ||
| 174 | gpio_init(GPIOI, &gpio_default_config.PIData); | ||
| 175 | #endif | ||
| 176 | #if STM32_HAS_GPIOJ | ||
| 177 | gpio_init(GPIOJ, &gpio_default_config.PJData); | ||
| 178 | #endif | ||
| 179 | #if STM32_HAS_GPIOK | ||
| 180 | gpio_init(GPIOK, &gpio_default_config.PKData); | ||
| 181 | #endif | ||
| 182 | } | ||
| 183 | |||
| 184 | /*===========================================================================*/ | ||
| 185 | /* Driver interrupt handlers. */ | ||
| 186 | /*===========================================================================*/ | ||
| 187 | |||
| 188 | /*===========================================================================*/ | ||
| 189 | /* Driver exported functions. */ | ||
| 190 | /*===========================================================================*/ | ||
| 191 | |||
| 192 | __attribute__((weak)) void enter_bootloader_mode_if_requested(void) {} | ||
| 193 | |||
| 194 | /** | ||
| 195 | * @brief Early initialization code. | ||
| 196 | * @details GPIO ports and system clocks are initialized before everything | ||
| 197 | * else. | ||
| 198 | */ | ||
| 199 | void __early_init(void) { | ||
| 200 | enter_bootloader_mode_if_requested(); | ||
| 201 | |||
| 202 | stm32_gpio_init(); | ||
| 203 | stm32_clock_init(); | ||
| 204 | } | ||
| 205 | |||
| 206 | #if HAL_USE_SDC || defined(__DOXYGEN__) | ||
| 207 | /** | ||
| 208 | * @brief SDC card detection. | ||
| 209 | */ | ||
| 210 | bool sdc_lld_is_card_inserted(SDCDriver *sdcp) { | ||
| 211 | (void)sdcp; | ||
| 212 | /* TODO: Fill the implementation.*/ | ||
| 213 | return true; | ||
| 214 | } | ||
| 215 | |||
| 216 | /** | ||
| 217 | * @brief SDC card write protection detection. | ||
| 218 | */ | ||
| 219 | bool sdc_lld_is_write_protected(SDCDriver *sdcp) { | ||
| 220 | (void)sdcp; | ||
| 221 | /* TODO: Fill the implementation.*/ | ||
| 222 | return false; | ||
| 223 | } | ||
| 224 | #endif /* HAL_USE_SDC */ | ||
| 225 | |||
| 226 | #if HAL_USE_MMC_SPI || defined(__DOXYGEN__) | ||
| 227 | /** | ||
| 228 | * @brief MMC_SPI card detection. | ||
| 229 | */ | ||
| 230 | bool mmc_lld_is_card_inserted(MMCDriver *mmcp) { | ||
| 231 | (void)mmcp; | ||
| 232 | /* TODO: Fill the implementation.*/ | ||
| 233 | return true; | ||
| 234 | } | ||
| 235 | |||
| 236 | /** | ||
| 237 | * @brief MMC_SPI card write protection detection. | ||
| 238 | */ | ||
| 239 | bool mmc_lld_is_write_protected(MMCDriver *mmcp) { | ||
| 240 | (void)mmcp; | ||
| 241 | /* TODO: Fill the implementation.*/ | ||
| 242 | return false; | ||
| 243 | } | ||
| 244 | #endif | ||
| 245 | |||
| 246 | /** | ||
| 247 | * @brief Board-specific initialization code. | ||
| 248 | * @todo Add your board-specific code, if any. | ||
| 249 | */ | ||
| 250 | void boardInit(void) {} | ||
diff --git a/drivers/boards/BLACKPILL_STM32_F411/board.h b/drivers/boards/BLACKPILL_STM32_F411/board.h deleted file mode 100644 index c0613b4a7..000000000 --- a/drivers/boards/BLACKPILL_STM32_F411/board.h +++ /dev/null | |||
| @@ -1,583 +0,0 @@ | |||
| 1 | /* | ||
| 2 | ChibiOS - Copyright (C) 2006..2018 Giovanni Di Sirio | ||
| 3 | |||
| 4 | Licensed under the Apache License, Version 2.0 (the "License"); | ||
| 5 | you may not use this file except in compliance with the License. | ||
| 6 | You may obtain a copy of the License at | ||
| 7 | |||
| 8 | http://www.apache.org/licenses/LICENSE-2.0 | ||
| 9 | |||
| 10 | Unless required by applicable law or agreed to in writing, software | ||
| 11 | distributed under the License is distributed on an "AS IS" BASIS, | ||
| 12 | WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. | ||
| 13 | See the License for the specific language governing permissions and | ||
| 14 | limitations under the License. | ||
| 15 | */ | ||
| 16 | |||
| 17 | /* | ||
| 18 | * This file has been automatically generated using ChibiStudio board | ||
| 19 | * generator plugin. Do not edit manually. | ||
| 20 | */ | ||
| 21 | |||
| 22 | #ifndef BOARD_H | ||
| 23 | #define BOARD_H | ||
| 24 | |||
| 25 | /*===========================================================================*/ | ||
| 26 | /* Driver constants. */ | ||
| 27 | /*===========================================================================*/ | ||
| 28 | |||
| 29 | /* | ||
| 30 | * Setup for STM32F411CEU6 black pill board. | ||
| 31 | */ | ||
| 32 | |||
| 33 | /* | ||
| 34 | * Board identifier. | ||
| 35 | */ | ||
| 36 | #define BOARD_BLACKPILL_STM32_F411 | ||
| 37 | #define BOARD_NAME "STM32F411CEU6 blackpill" | ||
| 38 | |||
| 39 | /* | ||
| 40 | * Allow Board to boot USB without extra A9 hardware/software config | ||
| 41 | */ | ||
| 42 | #define BOARD_OTG_NOVBUSSENS 1 | ||
| 43 | |||
| 44 | /* | ||
| 45 | * Board oscillators-related settings. | ||
| 46 | */ | ||
| 47 | #if !defined(STM32_LSECLK) | ||
| 48 | # define STM32_LSECLK 32768U | ||
| 49 | #endif | ||
| 50 | |||
| 51 | #if !defined(STM32_HSECLK) | ||
| 52 | # define STM32_HSECLK 25000000U | ||
| 53 | #endif | ||
| 54 | |||
| 55 | //#define STM32_HSE_BYPASS | ||
| 56 | |||
| 57 | /* | ||
| 58 | * Board voltages. | ||
| 59 | * Required for performance limits calculation. | ||
| 60 | */ | ||
| 61 | #define STM32_VDD 300U | ||
| 62 | |||
| 63 | /* | ||
| 64 | * MCU type as defined in the ST header. | ||
| 65 | */ | ||
| 66 | #define STM32F411xE | ||
| 67 | |||
| 68 | /* | ||
| 69 | * IO pins assignments. | ||
| 70 | */ | ||
| 71 | #define GPIOA_ARD_A0 0U | ||
| 72 | #define GPIOA_ADC1_IN0 0U | ||
| 73 | #define GPIOA_ARD_A1 1U | ||
| 74 | #define GPIOA_ADC1_IN1 1U | ||
| 75 | #define GPIOA_ARD_D1 2U | ||
| 76 | #define GPIOA_USART2_TX 2U | ||
| 77 | #define GPIOA_ARD_D0 3U | ||
| 78 | #define GPIOA_USART2_RX 3U | ||
| 79 | #define GPIOA_ARD_A2 4U | ||
| 80 | #define GPIOA_ADC1_IN4 4U | ||
| 81 | #define GPIOA_LED_GREEN 5U | ||
| 82 | #define GPIOA_ARD_D13 5U | ||
| 83 | #define GPIOA_ARD_D12 6U | ||
| 84 | #define GPIOA_ARD_D11 7U | ||
| 85 | #define GPIOA_ARD_D7 8U | ||
| 86 | #define GPIOA_ARD_D8 9U | ||
| 87 | #define GPIOA_ARD_D2 10U | ||
| 88 | #define GPIOA_OTG_FS_DM 11U | ||
| 89 | #define GPIOA_OTG_FS_DP 12U | ||
| 90 | #define GPIOA_SWDIO 13U | ||
| 91 | #define GPIOA_SWCLK 14U | ||
| 92 | #define GPIOA_PIN15 15U | ||
| 93 | |||
| 94 | #define GPIOB_ARD_A3 0U | ||
| 95 | #define GPIOB_ADC1_IN8 0U | ||
| 96 | #define GPIOB_PIN1 1U | ||
| 97 | #define GPIOB_PIN2 2U | ||
| 98 | #define GPIOB_SWO 3U | ||
| 99 | #define GPIOB_ARD_D3 3U | ||
| 100 | #define GPIOB_ARD_D5 4U | ||
| 101 | #define GPIOB_ARD_D4 5U | ||
| 102 | #define GPIOB_ARD_D10 6U | ||
| 103 | #define GPIOB_PIN7 7U | ||
| 104 | #define GPIOB_ARD_D15 8U | ||
| 105 | #define GPIOB_ARD_D14 9U | ||
| 106 | #define GPIOB_ARD_D6 10U | ||
| 107 | #define GPIOB_PIN11 11U | ||
| 108 | #define GPIOB_PIN12 12U | ||
| 109 | #define GPIOB_PIN13 13U | ||
| 110 | #define GPIOB_PIN14 14U | ||
| 111 | #define GPIOB_PIN15 15U | ||
| 112 | |||
| 113 | #define GPIOC_ARD_A5 0U | ||
| 114 | #define GPIOC_ADC1_IN10 0U | ||
| 115 | #define GPIOC_ARD_A4 1U | ||
| 116 | #define GPIOC_ADC1_IN11 1U | ||
| 117 | #define GPIOC_PIN2 2U | ||
| 118 | #define GPIOC_PIN3 3U | ||
| 119 | #define GPIOC_PIN4 4U | ||
| 120 | #define GPIOC_PIN5 5U | ||
| 121 | #define GPIOC_PIN6 6U | ||
| 122 | #define GPIOC_ARD_D9 7U | ||
| 123 | #define GPIOC_PIN8 8U | ||
| 124 | #define GPIOC_PIN9 9U | ||
| 125 | #define GPIOC_PIN10 10U | ||
| 126 | #define GPIOC_PIN11 11U | ||
| 127 | #define GPIOC_PIN12 12U | ||
| 128 | #define GPIOC_BUTTON 13U | ||
| 129 | #define GPIOC_OSC32_IN 14U | ||
| 130 | #define GPIOC_OSC32_OUT 15U | ||
| 131 | |||
| 132 | #define GPIOD_PIN0 0U | ||
| 133 | #define GPIOD_PIN1 1U | ||
| 134 | #define GPIOD_PIN2 2U | ||
| 135 | #define GPIOD_PIN3 3U | ||
| 136 | #define GPIOD_PIN4 4U | ||
| 137 | #define GPIOD_PIN5 5U | ||
| 138 | #define GPIOD_PIN6 6U | ||
| 139 | #define GPIOD_PIN7 7U | ||
| 140 | #define GPIOD_PIN8 8U | ||
| 141 | #define GPIOD_PIN9 9U | ||
| 142 | #define GPIOD_PIN10 10U | ||
| 143 | #define GPIOD_PIN11 11U | ||
| 144 | #define GPIOD_PIN12 12U | ||
| 145 | #define GPIOD_PIN13 13U | ||
| 146 | #define GPIOD_PIN14 14U | ||
| 147 | #define GPIOD_PIN15 15U | ||
| 148 | |||
| 149 | #define GPIOE_PIN0 0U | ||
| 150 | #define GPIOE_PIN1 1U | ||
| 151 | #define GPIOE_PIN2 2U | ||
| 152 | #define GPIOE_PIN3 3U | ||
| 153 | #define GPIOE_PIN4 4U | ||
| 154 | #define GPIOE_PIN5 5U | ||
| 155 | #define GPIOE_PIN6 6U | ||
| 156 | #define GPIOE_PIN7 7U | ||
| 157 | #define GPIOE_PIN8 8U | ||
| 158 | #define GPIOE_PIN9 9U | ||
| 159 | #define GPIOE_PIN10 10U | ||
| 160 | #define GPIOE_PIN11 11U | ||
| 161 | #define GPIOE_PIN12 12U | ||
| 162 | #define GPIOE_PIN13 13U | ||
| 163 | #define GPIOE_PIN14 14U | ||
| 164 | #define GPIOE_PIN15 15U | ||
| 165 | |||
| 166 | #define GPIOF_PIN0 0U | ||
| 167 | #define GPIOF_PIN1 1U | ||
| 168 | #define GPIOF_PIN2 2U | ||
| 169 | #define GPIOF_PIN3 3U | ||
| 170 | #define GPIOF_PIN4 4U | ||
| 171 | #define GPIOF_PIN5 5U | ||
| 172 | #define GPIOF_PIN6 6U | ||
| 173 | #define GPIOF_PIN7 7U | ||
| 174 | #define GPIOF_PIN8 8U | ||
| 175 | #define GPIOF_PIN9 9U | ||
| 176 | #define GPIOF_PIN10 10U | ||
| 177 | #define GPIOF_PIN11 11U | ||
| 178 | #define GPIOF_PIN12 12U | ||
| 179 | #define GPIOF_PIN13 13U | ||
| 180 | #define GPIOF_PIN14 14U | ||
| 181 | #define GPIOF_PIN15 15U | ||
| 182 | |||
| 183 | #define GPIOG_PIN0 0U | ||
| 184 | #define GPIOG_PIN1 1U | ||
| 185 | #define GPIOG_PIN2 2U | ||
| 186 | #define GPIOG_PIN3 3U | ||
| 187 | #define GPIOG_PIN4 4U | ||
| 188 | #define GPIOG_PIN5 5U | ||
| 189 | #define GPIOG_PIN6 6U | ||
| 190 | #define GPIOG_PIN7 7U | ||
| 191 | #define GPIOG_PIN8 8U | ||
| 192 | #define GPIOG_PIN9 9U | ||
| 193 | #define GPIOG_PIN10 10U | ||
| 194 | #define GPIOG_PIN11 11U | ||
| 195 | #define GPIOG_PIN12 12U | ||
| 196 | #define GPIOG_PIN13 13U | ||
| 197 | #define GPIOG_PIN14 14U | ||
| 198 | #define GPIOG_PIN15 15U | ||
| 199 | |||
| 200 | #define GPIOH_OSC_IN 0U | ||
| 201 | #define GPIOH_OSC_OUT 1U | ||
| 202 | #define GPIOH_PIN2 2U | ||
| 203 | #define GPIOH_PIN3 3U | ||
| 204 | #define GPIOH_PIN4 4U | ||
| 205 | #define GPIOH_PIN5 5U | ||
| 206 | #define GPIOH_PIN6 6U | ||
| 207 | #define GPIOH_PIN7 7U | ||
| 208 | #define GPIOH_PIN8 8U | ||
| 209 | #define GPIOH_PIN9 9U | ||
| 210 | #define GPIOH_PIN10 10U | ||
| 211 | #define GPIOH_PIN11 11U | ||
| 212 | #define GPIOH_PIN12 12U | ||
| 213 | #define GPIOH_PIN13 13U | ||
| 214 | #define GPIOH_PIN14 14U | ||
| 215 | #define GPIOH_PIN15 15U | ||
| 216 | |||
| 217 | #define GPIOI_PIN0 0U | ||
| 218 | #define GPIOI_PIN1 1U | ||
| 219 | #define GPIOI_PIN2 2U | ||
| 220 | #define GPIOI_PIN3 3U | ||
| 221 | #define GPIOI_PIN4 4U | ||
| 222 | #define GPIOI_PIN5 5U | ||
| 223 | #define GPIOI_PIN6 6U | ||
| 224 | #define GPIOI_PIN7 7U | ||
| 225 | #define GPIOI_PIN8 8U | ||
| 226 | #define GPIOI_PIN9 9U | ||
| 227 | #define GPIOI_PIN10 10U | ||
| 228 | #define GPIOI_PIN11 11U | ||
| 229 | #define GPIOI_PIN12 12U | ||
| 230 | #define GPIOI_PIN13 13U | ||
| 231 | #define GPIOI_PIN14 14U | ||
| 232 | #define GPIOI_PIN15 15U | ||
| 233 | |||
| 234 | /* | ||
| 235 | * IO lines assignments. | ||
| 236 | */ | ||
| 237 | #define LINE_ARD_A0 PAL_LINE(GPIOA, 0U) | ||
| 238 | #define LINE_ADC1_IN0 PAL_LINE(GPIOA, 0U) | ||
| 239 | #define LINE_ARD_A1 PAL_LINE(GPIOA, 1U) | ||
| 240 | #define LINE_ADC1_IN1 PAL_LINE(GPIOA, 1U) | ||
| 241 | #define LINE_ARD_D1 PAL_LINE(GPIOA, 2U) | ||
| 242 | #define LINE_USART2_TX PAL_LINE(GPIOA, 2U) | ||
| 243 | #define LINE_ARD_D0 PAL_LINE(GPIOA, 3U) | ||
| 244 | #define LINE_USART2_RX PAL_LINE(GPIOA, 3U) | ||
| 245 | #define LINE_ARD_A2 PAL_LINE(GPIOA, 4U) | ||
| 246 | #define LINE_ADC1_IN4 PAL_LINE(GPIOA, 4U) | ||
| 247 | #define LINE_LED_GREEN PAL_LINE(GPIOA, 5U) | ||
| 248 | #define LINE_ARD_D13 PAL_LINE(GPIOA, 5U) | ||
| 249 | #define LINE_ARD_D12 PAL_LINE(GPIOA, 6U) | ||
| 250 | #define LINE_ARD_D11 PAL_LINE(GPIOA, 7U) | ||
| 251 | #define LINE_ARD_D7 PAL_LINE(GPIOA, 8U) | ||
| 252 | #define LINE_ARD_D8 PAL_LINE(GPIOA, 9U) | ||
| 253 | #define LINE_ARD_D2 PAL_LINE(GPIOA, 10U) | ||
| 254 | #define LINE_OTG_FS_DM PAL_LINE(GPIOA, 11U) | ||
| 255 | #define LINE_OTG_FS_DP PAL_LINE(GPIOA, 12U) | ||
| 256 | #define LINE_SWDIO PAL_LINE(GPIOA, 13U) | ||
| 257 | #define LINE_SWCLK PAL_LINE(GPIOA, 14U) | ||
| 258 | #define LINE_ARD_A3 PAL_LINE(GPIOB, 0U) | ||
| 259 | #define LINE_ADC1_IN8 PAL_LINE(GPIOB, 0U) | ||
| 260 | #define LINE_SWO PAL_LINE(GPIOB, 3U) | ||
| 261 | #define LINE_ARD_D3 PAL_LINE(GPIOB, 3U) | ||
| 262 | #define LINE_ARD_D5 PAL_LINE(GPIOB, 4U) | ||
| 263 | #define LINE_ARD_D4 PAL_LINE(GPIOB, 5U) | ||
| 264 | #define LINE_ARD_D10 PAL_LINE(GPIOB, 6U) | ||
| 265 | #define LINE_ARD_D15 PAL_LINE(GPIOB, 8U) | ||
| 266 | #define LINE_ARD_D14 PAL_LINE(GPIOB, 9U) | ||
| 267 | #define LINE_ARD_D6 PAL_LINE(GPIOB, 10U) | ||
| 268 | #define LINE_ARD_A5 PAL_LINE(GPIOC, 0U) | ||
| 269 | #define LINE_ADC1_IN10 PAL_LINE(GPIOC, 0U) | ||
| 270 | #define LINE_ARD_A4 PAL_LINE(GPIOC, 1U) | ||
| 271 | #define LINE_ADC1_IN11 PAL_LINE(GPIOC, 1U) | ||
| 272 | #define LINE_ARD_D9 PAL_LINE(GPIOC, 7U) | ||
| 273 | #define LINE_BUTTON PAL_LINE(GPIOC, 13U) | ||
| 274 | #define LINE_OSC32_IN PAL_LINE(GPIOC, 14U) | ||
| 275 | #define LINE_OSC32_OUT PAL_LINE(GPIOC, 15U) | ||
| 276 | #define LINE_OSC_IN PAL_LINE(GPIOH, 0U) | ||
| 277 | #define LINE_OSC_OUT PAL_LINE(GPIOH, 1U) | ||
| 278 | |||
| 279 | /*===========================================================================*/ | ||
| 280 | /* Driver pre-compile time settings. */ | ||
| 281 | /*===========================================================================*/ | ||
| 282 | |||
| 283 | /*===========================================================================*/ | ||
| 284 | /* Derived constants and error checks. */ | ||
| 285 | /*===========================================================================*/ | ||
| 286 | |||
| 287 | /*===========================================================================*/ | ||
| 288 | /* Driver data structures and types. */ | ||
| 289 | /*===========================================================================*/ | ||
| 290 | |||
| 291 | /*===========================================================================*/ | ||
| 292 | /* Driver macros. */ | ||
| 293 | /*===========================================================================*/ | ||
| 294 | |||
| 295 | /* | ||
| 296 | * I/O ports initial setup, this configuration is established soon after reset | ||
| 297 | * in the initialization code. | ||
| 298 | * Please refer to the STM32 Reference Manual for details. | ||
| 299 | */ | ||
| 300 | #define PIN_MODE_INPUT(n) (0U << ((n)*2U)) | ||
| 301 | #define PIN_MODE_OUTPUT(n) (1U << ((n)*2U)) | ||
| 302 | #define PIN_MODE_ALTERNATE(n) (2U << ((n)*2U)) | ||
| 303 | #define PIN_MODE_ANALOG(n) (3U << ((n)*2U)) | ||
| 304 | #define PIN_ODR_LOW(n) (0U << (n)) | ||
| 305 | #define PIN_ODR_HIGH(n) (1U << (n)) | ||
| 306 | #define PIN_OTYPE_PUSHPULL(n) (0U << (n)) | ||
| 307 | #define PIN_OTYPE_OPENDRAIN(n) (1U << (n)) | ||
| 308 | #define PIN_OSPEED_VERYLOW(n) (0U << ((n)*2U)) | ||
| 309 | #define PIN_OSPEED_LOW(n) (1U << ((n)*2U)) | ||
| 310 | #define PIN_OSPEED_MEDIUM(n) (2U << ((n)*2U)) | ||
| 311 | #define PIN_OSPEED_HIGH(n) (3U << ((n)*2U)) | ||
| 312 | #define PIN_PUPDR_FLOATING(n) (0U << ((n)*2U)) | ||
| 313 | #define PIN_PUPDR_PULLUP(n) (1U << ((n)*2U)) | ||
| 314 | #define PIN_PUPDR_PULLDOWN(n) (2U << ((n)*2U)) | ||
| 315 | #define PIN_AFIO_AF(n, v) ((v) << (((n) % 8U) * 4U)) | ||
| 316 | |||
| 317 | /* | ||
| 318 | * GPIOA setup: | ||
| 319 | * | ||
| 320 | * PA0 - ARD_A0 ADC1_IN0 (input pullup). | ||
| 321 | * PA1 - ARD_A1 ADC1_IN1 (input pullup). | ||
| 322 | * PA2 - ARD_D1 USART2_TX (alternate 7). | ||
| 323 | * PA3 - ARD_D0 USART2_RX (alternate 7). | ||
| 324 | * PA4 - ARD_A2 ADC1_IN4 (input pullup). | ||
| 325 | * PA5 - LED_GREEN ARD_D13 (output pushpull high). | ||
| 326 | * PA6 - ARD_D12 (input pullup). | ||
| 327 | * PA7 - ARD_D11 (input pullup). | ||
| 328 | * PA8 - ARD_D7 (input pullup). | ||
| 329 | * PA9 - ARD_D8 (input pullup). | ||
| 330 | * PA10 - ARD_D2 (input pullup). | ||
| 331 | * PA11 - OTG_FS_DM (alternate 10). | ||
| 332 | * PA12 - OTG_FS_DP (alternate 10). | ||
| 333 | * PA13 - SWDIO (alternate 0). | ||
| 334 | * PA14 - SWCLK (alternate 0). | ||
| 335 | * PA15 - PIN15 (input pullup). | ||
| 336 | */ | ||
| 337 | #define VAL_GPIOA_MODER (PIN_MODE_INPUT(GPIOA_ARD_A0) | PIN_MODE_INPUT(GPIOA_ARD_A1) | PIN_MODE_ALTERNATE(GPIOA_ARD_D1) | PIN_MODE_ALTERNATE(GPIOA_ARD_D0) | PIN_MODE_INPUT(GPIOA_ARD_A2) | PIN_MODE_OUTPUT(GPIOA_LED_GREEN) | PIN_MODE_INPUT(GPIOA_ARD_D12) | PIN_MODE_INPUT(GPIOA_ARD_D11) | PIN_MODE_INPUT(GPIOA_ARD_D7) | PIN_MODE_INPUT(GPIOA_ARD_D8) | PIN_MODE_INPUT(GPIOA_ARD_D2) | PIN_MODE_ALTERNATE(GPIOA_OTG_FS_DM) | PIN_MODE_ALTERNATE(GPIOA_OTG_FS_DP) | PIN_MODE_ALTERNATE(GPIOA_SWDIO) | PIN_MODE_ALTERNATE(GPIOA_SWCLK) | PIN_MODE_INPUT(GPIOA_PIN15)) | ||
| 338 | #define VAL_GPIOA_OTYPER (PIN_OTYPE_PUSHPULL(GPIOA_ARD_A0) | PIN_OTYPE_PUSHPULL(GPIOA_ARD_A1) | PIN_OTYPE_PUSHPULL(GPIOA_ARD_D1) | PIN_OTYPE_PUSHPULL(GPIOA_ARD_D0) | PIN_OTYPE_PUSHPULL(GPIOA_ARD_A2) | PIN_OTYPE_PUSHPULL(GPIOA_LED_GREEN) | PIN_OTYPE_PUSHPULL(GPIOA_ARD_D12) | PIN_OTYPE_PUSHPULL(GPIOA_ARD_D11) | PIN_OTYPE_PUSHPULL(GPIOA_ARD_D7) | PIN_OTYPE_PUSHPULL(GPIOA_ARD_D8) | PIN_OTYPE_PUSHPULL(GPIOA_ARD_D2) | PIN_OTYPE_PUSHPULL(GPIOA_OTG_FS_DM) | PIN_OTYPE_PUSHPULL(GPIOA_OTG_FS_DP) | PIN_OTYPE_PUSHPULL(GPIOA_SWDIO) | PIN_OTYPE_PUSHPULL(GPIOA_SWCLK) | PIN_OTYPE_PUSHPULL(GPIOA_PIN15)) | ||
| 339 | #define VAL_GPIOA_OSPEEDR (PIN_OSPEED_HIGH(GPIOA_ARD_A0) | PIN_OSPEED_HIGH(GPIOA_ARD_A1) | PIN_OSPEED_MEDIUM(GPIOA_ARD_D1) | PIN_OSPEED_MEDIUM(GPIOA_ARD_D0) | PIN_OSPEED_HIGH(GPIOA_ARD_A2) | PIN_OSPEED_MEDIUM(GPIOA_LED_GREEN) | PIN_OSPEED_HIGH(GPIOA_ARD_D12) | PIN_OSPEED_HIGH(GPIOA_ARD_D11) | PIN_OSPEED_HIGH(GPIOA_ARD_D7) | PIN_OSPEED_HIGH(GPIOA_ARD_D8) | PIN_OSPEED_HIGH(GPIOA_ARD_D2) | PIN_OSPEED_HIGH(GPIOA_OTG_FS_DM) | PIN_OSPEED_HIGH(GPIOA_OTG_FS_DP) | PIN_OSPEED_HIGH(GPIOA_SWDIO) | PIN_OSPEED_HIGH(GPIOA_SWCLK) | PIN_OSPEED_HIGH(GPIOA_PIN15)) | ||
| 340 | #define VAL_GPIOA_PUPDR (PIN_PUPDR_PULLUP(GPIOA_ARD_A0) | PIN_PUPDR_PULLUP(GPIOA_ARD_A1) | PIN_PUPDR_FLOATING(GPIOA_ARD_D1) | PIN_PUPDR_FLOATING(GPIOA_ARD_D0) | PIN_PUPDR_PULLUP(GPIOA_ARD_A2) | PIN_PUPDR_FLOATING(GPIOA_LED_GREEN) | PIN_PUPDR_PULLUP(GPIOA_ARD_D12) | PIN_PUPDR_PULLUP(GPIOA_ARD_D11) | PIN_PUPDR_PULLUP(GPIOA_ARD_D7) | PIN_PUPDR_PULLUP(GPIOA_ARD_D8) | PIN_PUPDR_PULLUP(GPIOA_ARD_D2) | PIN_PUPDR_FLOATING(GPIOA_OTG_FS_DM) | PIN_PUPDR_FLOATING(GPIOA_OTG_FS_DP) | PIN_PUPDR_PULLUP(GPIOA_SWDIO) | PIN_PUPDR_PULLDOWN(GPIOA_SWCLK) | PIN_PUPDR_PULLUP(GPIOA_PIN15)) | ||
| 341 | #define VAL_GPIOA_ODR (PIN_ODR_HIGH(GPIOA_ARD_A0) | PIN_ODR_HIGH(GPIOA_ARD_A1) | PIN_ODR_HIGH(GPIOA_ARD_D1) | PIN_ODR_HIGH(GPIOA_ARD_D0) | PIN_ODR_HIGH(GPIOA_ARD_A2) | PIN_ODR_LOW(GPIOA_LED_GREEN) | PIN_ODR_HIGH(GPIOA_ARD_D12) | PIN_ODR_HIGH(GPIOA_ARD_D11) | PIN_ODR_HIGH(GPIOA_ARD_D7) | PIN_ODR_HIGH(GPIOA_ARD_D8) | PIN_ODR_HIGH(GPIOA_ARD_D2) | PIN_ODR_HIGH(GPIOA_OTG_FS_DM) | PIN_ODR_HIGH(GPIOA_OTG_FS_DP) | PIN_ODR_HIGH(GPIOA_SWDIO) | PIN_ODR_HIGH(GPIOA_SWCLK) | PIN_ODR_HIGH(GPIOA_PIN15)) | ||
| 342 | #define VAL_GPIOA_AFRL (PIN_AFIO_AF(GPIOA_ARD_A0, 0U) | PIN_AFIO_AF(GPIOA_ARD_A1, 0U) | PIN_AFIO_AF(GPIOA_ARD_D1, 7U) | PIN_AFIO_AF(GPIOA_ARD_D0, 7U) | PIN_AFIO_AF(GPIOA_ARD_A2, 0U) | PIN_AFIO_AF(GPIOA_LED_GREEN, 0U) | PIN_AFIO_AF(GPIOA_ARD_D12, 0U) | PIN_AFIO_AF(GPIOA_ARD_D11, 0U)) | ||
| 343 | #define VAL_GPIOA_AFRH (PIN_AFIO_AF(GPIOA_ARD_D7, 0U) | PIN_AFIO_AF(GPIOA_ARD_D8, 0U) | PIN_AFIO_AF(GPIOA_ARD_D2, 0U) | PIN_AFIO_AF(GPIOA_OTG_FS_DM, 10U) | PIN_AFIO_AF(GPIOA_OTG_FS_DP, 10U) | PIN_AFIO_AF(GPIOA_SWDIO, 0U) | PIN_AFIO_AF(GPIOA_SWCLK, 0U) | PIN_AFIO_AF(GPIOA_PIN15, 0U)) | ||
| 344 | |||
| 345 | /* | ||
| 346 | * GPIOB setup: | ||
| 347 | * | ||
| 348 | * PB0 - ARD_A3 ADC1_IN8 (input pullup). | ||
| 349 | * PB1 - PIN1 (input pullup). | ||
| 350 | * PB2 - PIN2 (input pullup). | ||
| 351 | * PB3 - SWO ARD_D3 (alternate 0). | ||
| 352 | * PB4 - ARD_D5 (input pullup). | ||
| 353 | * PB5 - ARD_D4 (input pullup). | ||
| 354 | * PB6 - ARD_D10 (input pullup). | ||
| 355 | * PB7 - PIN7 (input pullup). | ||
| 356 | * PB8 - ARD_D15 (input pullup). | ||
| 357 | * PB9 - ARD_D14 (input pullup). | ||
| 358 | * PB10 - ARD_D6 (input pullup). | ||
| 359 | * PB11 - PIN11 (input pullup). | ||
| 360 | * PB12 - PIN12 (input pullup). | ||
| 361 | * PB13 - PIN13 (input pullup). | ||
| 362 | * PB14 - PIN14 (input pullup). | ||
| 363 | * PB15 - PIN15 (input pullup). | ||
| 364 | */ | ||
| 365 | #define VAL_GPIOB_MODER (PIN_MODE_INPUT(GPIOB_ARD_A3) | PIN_MODE_INPUT(GPIOB_PIN1) | PIN_MODE_INPUT(GPIOB_PIN2) | PIN_MODE_ALTERNATE(GPIOB_SWO) | PIN_MODE_INPUT(GPIOB_ARD_D5) | PIN_MODE_INPUT(GPIOB_ARD_D4) | PIN_MODE_INPUT(GPIOB_ARD_D10) | PIN_MODE_INPUT(GPIOB_PIN7) | PIN_MODE_INPUT(GPIOB_ARD_D15) | PIN_MODE_INPUT(GPIOB_ARD_D14) | PIN_MODE_INPUT(GPIOB_ARD_D6) | PIN_MODE_INPUT(GPIOB_PIN11) | PIN_MODE_INPUT(GPIOB_PIN12) | PIN_MODE_INPUT(GPIOB_PIN13) | PIN_MODE_INPUT(GPIOB_PIN14) | PIN_MODE_INPUT(GPIOB_PIN15)) | ||
| 366 | #define VAL_GPIOB_OTYPER (PIN_OTYPE_PUSHPULL(GPIOB_ARD_A3) | PIN_OTYPE_PUSHPULL(GPIOB_PIN1) | PIN_OTYPE_PUSHPULL(GPIOB_PIN2) | PIN_OTYPE_PUSHPULL(GPIOB_SWO) | PIN_OTYPE_PUSHPULL(GPIOB_ARD_D5) | PIN_OTYPE_PUSHPULL(GPIOB_ARD_D4) | PIN_OTYPE_PUSHPULL(GPIOB_ARD_D10) | PIN_OTYPE_PUSHPULL(GPIOB_PIN7) | PIN_OTYPE_PUSHPULL(GPIOB_ARD_D15) | PIN_OTYPE_PUSHPULL(GPIOB_ARD_D14) | PIN_OTYPE_PUSHPULL(GPIOB_ARD_D6) | PIN_OTYPE_PUSHPULL(GPIOB_PIN11) | PIN_OTYPE_PUSHPULL(GPIOB_PIN12) | PIN_OTYPE_PUSHPULL(GPIOB_PIN13) | PIN_OTYPE_PUSHPULL(GPIOB_PIN14) | PIN_OTYPE_PUSHPULL(GPIOB_PIN15)) | ||
| 367 | #define VAL_GPIOB_OSPEEDR (PIN_OSPEED_HIGH(GPIOB_ARD_A3) | PIN_OSPEED_HIGH(GPIOB_PIN1) | PIN_OSPEED_HIGH(GPIOB_PIN2) | PIN_OSPEED_HIGH(GPIOB_SWO) | PIN_OSPEED_HIGH(GPIOB_ARD_D5) | PIN_OSPEED_HIGH(GPIOB_ARD_D4) | PIN_OSPEED_HIGH(GPIOB_ARD_D10) | PIN_OSPEED_HIGH(GPIOB_PIN7) | PIN_OSPEED_HIGH(GPIOB_ARD_D15) | PIN_OSPEED_HIGH(GPIOB_ARD_D14) | PIN_OSPEED_HIGH(GPIOB_ARD_D6) | PIN_OSPEED_HIGH(GPIOB_PIN11) | PIN_OSPEED_HIGH(GPIOB_PIN12) | PIN_OSPEED_HIGH(GPIOB_PIN13) | PIN_OSPEED_HIGH(GPIOB_PIN14) | PIN_OSPEED_HIGH(GPIOB_PIN15)) | ||
| 368 | #define VAL_GPIOB_PUPDR (PIN_PUPDR_PULLUP(GPIOB_ARD_A3) | PIN_PUPDR_PULLUP(GPIOB_PIN1) | PIN_PUPDR_PULLUP(GPIOB_PIN2) | PIN_PUPDR_PULLUP(GPIOB_SWO) | PIN_PUPDR_PULLUP(GPIOB_ARD_D5) | PIN_PUPDR_PULLUP(GPIOB_ARD_D4) | PIN_PUPDR_PULLUP(GPIOB_ARD_D10) | PIN_PUPDR_PULLUP(GPIOB_PIN7) | PIN_PUPDR_PULLUP(GPIOB_ARD_D15) | PIN_PUPDR_PULLUP(GPIOB_ARD_D14) | PIN_PUPDR_PULLUP(GPIOB_ARD_D6) | PIN_PUPDR_PULLUP(GPIOB_PIN11) | PIN_PUPDR_PULLUP(GPIOB_PIN12) | PIN_PUPDR_PULLUP(GPIOB_PIN13) | PIN_PUPDR_PULLUP(GPIOB_PIN14) | PIN_PUPDR_PULLUP(GPIOB_PIN15)) | ||
| 369 | #define VAL_GPIOB_ODR (PIN_ODR_HIGH(GPIOB_ARD_A3) | PIN_ODR_HIGH(GPIOB_PIN1) | PIN_ODR_HIGH(GPIOB_PIN2) | PIN_ODR_HIGH(GPIOB_SWO) | PIN_ODR_HIGH(GPIOB_ARD_D5) | PIN_ODR_HIGH(GPIOB_ARD_D4) | PIN_ODR_HIGH(GPIOB_ARD_D10) | PIN_ODR_HIGH(GPIOB_PIN7) | PIN_ODR_HIGH(GPIOB_ARD_D15) | PIN_ODR_HIGH(GPIOB_ARD_D14) | PIN_ODR_HIGH(GPIOB_ARD_D6) | PIN_ODR_HIGH(GPIOB_PIN11) | PIN_ODR_HIGH(GPIOB_PIN12) | PIN_ODR_HIGH(GPIOB_PIN13) | PIN_ODR_HIGH(GPIOB_PIN14) | PIN_ODR_HIGH(GPIOB_PIN15)) | ||
| 370 | #define VAL_GPIOB_AFRL (PIN_AFIO_AF(GPIOB_ARD_A3, 0U) | PIN_AFIO_AF(GPIOB_PIN1, 0U) | PIN_AFIO_AF(GPIOB_PIN2, 0U) | PIN_AFIO_AF(GPIOB_SWO, 0U) | PIN_AFIO_AF(GPIOB_ARD_D5, 0U) | PIN_AFIO_AF(GPIOB_ARD_D4, 0U) | PIN_AFIO_AF(GPIOB_ARD_D10, 0U) | PIN_AFIO_AF(GPIOB_PIN7, 0U)) | ||
| 371 | #define VAL_GPIOB_AFRH (PIN_AFIO_AF(GPIOB_ARD_D15, 0U) | PIN_AFIO_AF(GPIOB_ARD_D14, 0U) | PIN_AFIO_AF(GPIOB_ARD_D6, 0U) | PIN_AFIO_AF(GPIOB_PIN11, 0U) | PIN_AFIO_AF(GPIOB_PIN12, 0U) | PIN_AFIO_AF(GPIOB_PIN13, 0U) | PIN_AFIO_AF(GPIOB_PIN14, 0U) | PIN_AFIO_AF(GPIOB_PIN15, 0U)) | ||
| 372 | |||
| 373 | /* | ||
| 374 | * GPIOC setup: | ||
| 375 | * | ||
| 376 | * PC0 - ARD_A5 ADC1_IN10 (input pullup). | ||
| 377 | * PC1 - ARD_A4 ADC1_IN11 (input pullup). | ||
| 378 | * PC2 - PIN2 (input pullup). | ||
| 379 | * PC3 - PIN3 (input pullup). | ||
| 380 | * PC4 - PIN4 (input pullup). | ||
| 381 | * PC5 - PIN5 (input pullup). | ||
| 382 | * PC6 - PIN6 (input pullup). | ||
| 383 | * PC7 - ARD_D9 (input pullup). | ||
| 384 | * PC8 - PIN8 (input pullup). | ||
| 385 | * PC9 - PIN9 (input pullup). | ||
| 386 | * PC10 - PIN10 (input pullup). | ||
| 387 | * PC11 - PIN11 (input pullup). | ||
| 388 | * PC12 - PIN12 (input pullup). | ||
| 389 | * PC13 - BUTTON (input floating). | ||
| 390 | * PC14 - OSC32_IN (input floating). | ||
| 391 | * PC15 - OSC32_OUT (input floating). | ||
| 392 | */ | ||
| 393 | #define VAL_GPIOC_MODER (PIN_MODE_INPUT(GPIOC_ARD_A5) | PIN_MODE_INPUT(GPIOC_ARD_A4) | PIN_MODE_INPUT(GPIOC_PIN2) | PIN_MODE_INPUT(GPIOC_PIN3) | PIN_MODE_INPUT(GPIOC_PIN4) | PIN_MODE_INPUT(GPIOC_PIN5) | PIN_MODE_INPUT(GPIOC_PIN6) | PIN_MODE_INPUT(GPIOC_ARD_D9) | PIN_MODE_INPUT(GPIOC_PIN8) | PIN_MODE_INPUT(GPIOC_PIN9) | PIN_MODE_INPUT(GPIOC_PIN10) | PIN_MODE_INPUT(GPIOC_PIN11) | PIN_MODE_INPUT(GPIOC_PIN12) | PIN_MODE_INPUT(GPIOC_BUTTON) | PIN_MODE_INPUT(GPIOC_OSC32_IN) | PIN_MODE_INPUT(GPIOC_OSC32_OUT)) | ||
| 394 | #define VAL_GPIOC_OTYPER (PIN_OTYPE_PUSHPULL(GPIOC_ARD_A5) | PIN_OTYPE_PUSHPULL(GPIOC_ARD_A4) | PIN_OTYPE_PUSHPULL(GPIOC_PIN2) | PIN_OTYPE_PUSHPULL(GPIOC_PIN3) | PIN_OTYPE_PUSHPULL(GPIOC_PIN4) | PIN_OTYPE_PUSHPULL(GPIOC_PIN5) | PIN_OTYPE_PUSHPULL(GPIOC_PIN6) | PIN_OTYPE_PUSHPULL(GPIOC_ARD_D9) | PIN_OTYPE_PUSHPULL(GPIOC_PIN8) | PIN_OTYPE_PUSHPULL(GPIOC_PIN9) | PIN_OTYPE_PUSHPULL(GPIOC_PIN10) | PIN_OTYPE_PUSHPULL(GPIOC_PIN11) | PIN_OTYPE_PUSHPULL(GPIOC_PIN12) | PIN_OTYPE_PUSHPULL(GPIOC_BUTTON) | PIN_OTYPE_PUSHPULL(GPIOC_OSC32_IN) | PIN_OTYPE_PUSHPULL(GPIOC_OSC32_OUT)) | ||
| 395 | #define VAL_GPIOC_OSPEEDR (PIN_OSPEED_HIGH(GPIOC_ARD_A5) | PIN_OSPEED_HIGH(GPIOC_ARD_A4) | PIN_OSPEED_HIGH(GPIOC_PIN2) | PIN_OSPEED_HIGH(GPIOC_PIN3) | PIN_OSPEED_HIGH(GPIOC_PIN4) | PIN_OSPEED_HIGH(GPIOC_PIN5) | PIN_OSPEED_HIGH(GPIOC_PIN6) | PIN_OSPEED_HIGH(GPIOC_ARD_D9) | PIN_OSPEED_HIGH(GPIOC_PIN8) | PIN_OSPEED_HIGH(GPIOC_PIN9) | PIN_OSPEED_HIGH(GPIOC_PIN10) | PIN_OSPEED_HIGH(GPIOC_PIN11) | PIN_OSPEED_HIGH(GPIOC_PIN12) | PIN_OSPEED_HIGH(GPIOC_BUTTON) | PIN_OSPEED_HIGH(GPIOC_OSC32_IN) | PIN_OSPEED_HIGH(GPIOC_OSC32_OUT)) | ||
| 396 | #define VAL_GPIOC_PUPDR (PIN_PUPDR_PULLUP(GPIOC_ARD_A5) | PIN_PUPDR_PULLUP(GPIOC_ARD_A4) | PIN_PUPDR_PULLUP(GPIOC_PIN2) | PIN_PUPDR_PULLUP(GPIOC_PIN3) | PIN_PUPDR_PULLUP(GPIOC_PIN4) | PIN_PUPDR_PULLUP(GPIOC_PIN5) | PIN_PUPDR_PULLUP(GPIOC_PIN6) | PIN_PUPDR_PULLUP(GPIOC_ARD_D9) | PIN_PUPDR_PULLUP(GPIOC_PIN8) | PIN_PUPDR_PULLUP(GPIOC_PIN9) | PIN_PUPDR_PULLUP(GPIOC_PIN10) | PIN_PUPDR_PULLUP(GPIOC_PIN11) | PIN_PUPDR_PULLUP(GPIOC_PIN12) | PIN_PUPDR_FLOATING(GPIOC_BUTTON) | PIN_PUPDR_FLOATING(GPIOC_OSC32_IN) | PIN_PUPDR_FLOATING(GPIOC_OSC32_OUT)) | ||
| 397 | #define VAL_GPIOC_ODR (PIN_ODR_HIGH(GPIOC_ARD_A5) | PIN_ODR_HIGH(GPIOC_ARD_A4) | PIN_ODR_HIGH(GPIOC_PIN2) | PIN_ODR_HIGH(GPIOC_PIN3) | PIN_ODR_HIGH(GPIOC_PIN4) | PIN_ODR_HIGH(GPIOC_PIN5) | PIN_ODR_HIGH(GPIOC_PIN6) | PIN_ODR_HIGH(GPIOC_ARD_D9) | PIN_ODR_HIGH(GPIOC_PIN8) | PIN_ODR_HIGH(GPIOC_PIN9) | PIN_ODR_HIGH(GPIOC_PIN10) | PIN_ODR_HIGH(GPIOC_PIN11) | PIN_ODR_HIGH(GPIOC_PIN12) | PIN_ODR_HIGH(GPIOC_BUTTON) | PIN_ODR_HIGH(GPIOC_OSC32_IN) | PIN_ODR_HIGH(GPIOC_OSC32_OUT)) | ||
| 398 | #define VAL_GPIOC_AFRL (PIN_AFIO_AF(GPIOC_ARD_A5, 0U) | PIN_AFIO_AF(GPIOC_ARD_A4, 0U) | PIN_AFIO_AF(GPIOC_PIN2, 0U) | PIN_AFIO_AF(GPIOC_PIN3, 0U) | PIN_AFIO_AF(GPIOC_PIN4, 0U) | PIN_AFIO_AF(GPIOC_PIN5, 0U) | PIN_AFIO_AF(GPIOC_PIN6, 0U) | PIN_AFIO_AF(GPIOC_ARD_D9, 0U)) | ||
| 399 | #define VAL_GPIOC_AFRH (PIN_AFIO_AF(GPIOC_PIN8, 0U) | PIN_AFIO_AF(GPIOC_PIN9, 0U) | PIN_AFIO_AF(GPIOC_PIN10, 0U) | PIN_AFIO_AF(GPIOC_PIN11, 0U) | PIN_AFIO_AF(GPIOC_PIN12, 0U) | PIN_AFIO_AF(GPIOC_BUTTON, 0U) | PIN_AFIO_AF(GPIOC_OSC32_IN, 0U) | PIN_AFIO_AF(GPIOC_OSC32_OUT, 0U)) | ||
| 400 | |||
| 401 | /* | ||
| 402 | * GPIOD setup: | ||
| 403 | * | ||
| 404 | * PD0 - PIN0 (input pullup). | ||
| 405 | * PD1 - PIN1 (input pullup). | ||
| 406 | * PD2 - PIN2 (input pullup). | ||
| 407 | * PD3 - PIN3 (input pullup). | ||
| 408 | * PD4 - PIN4 (input pullup). | ||
| 409 | * PD5 - PIN5 (input pullup). | ||
| 410 | * PD6 - PIN6 (input pullup). | ||
| 411 | * PD7 - PIN7 (input pullup). | ||
| 412 | * PD8 - PIN8 (input pullup). | ||
| 413 | * PD9 - PIN9 (input pullup). | ||
| 414 | * PD10 - PIN10 (input pullup). | ||
| 415 | * PD11 - PIN11 (input pullup). | ||
| 416 | * PD12 - PIN12 (input pullup). | ||
| 417 | * PD13 - PIN13 (input pullup). | ||
| 418 | * PD14 - PIN14 (input pullup). | ||
| 419 | * PD15 - PIN15 (input pullup). | ||
| 420 | */ | ||
| 421 | #define VAL_GPIOD_MODER (PIN_MODE_INPUT(GPIOD_PIN0) | PIN_MODE_INPUT(GPIOD_PIN1) | PIN_MODE_INPUT(GPIOD_PIN2) | PIN_MODE_INPUT(GPIOD_PIN3) | PIN_MODE_INPUT(GPIOD_PIN4) | PIN_MODE_INPUT(GPIOD_PIN5) | PIN_MODE_INPUT(GPIOD_PIN6) | PIN_MODE_INPUT(GPIOD_PIN7) | PIN_MODE_INPUT(GPIOD_PIN8) | PIN_MODE_INPUT(GPIOD_PIN9) | PIN_MODE_INPUT(GPIOD_PIN10) | PIN_MODE_INPUT(GPIOD_PIN11) | PIN_MODE_INPUT(GPIOD_PIN12) | PIN_MODE_INPUT(GPIOD_PIN13) | PIN_MODE_INPUT(GPIOD_PIN14) | PIN_MODE_INPUT(GPIOD_PIN15)) | ||
| 422 | #define VAL_GPIOD_OTYPER (PIN_OTYPE_PUSHPULL(GPIOD_PIN0) | PIN_OTYPE_PUSHPULL(GPIOD_PIN1) | PIN_OTYPE_PUSHPULL(GPIOD_PIN2) | PIN_OTYPE_PUSHPULL(GPIOD_PIN3) | PIN_OTYPE_PUSHPULL(GPIOD_PIN4) | PIN_OTYPE_PUSHPULL(GPIOD_PIN5) | PIN_OTYPE_PUSHPULL(GPIOD_PIN6) | PIN_OTYPE_PUSHPULL(GPIOD_PIN7) | PIN_OTYPE_PUSHPULL(GPIOD_PIN8) | PIN_OTYPE_PUSHPULL(GPIOD_PIN9) | PIN_OTYPE_PUSHPULL(GPIOD_PIN10) | PIN_OTYPE_PUSHPULL(GPIOD_PIN11) | PIN_OTYPE_PUSHPULL(GPIOD_PIN12) | PIN_OTYPE_PUSHPULL(GPIOD_PIN13) | PIN_OTYPE_PUSHPULL(GPIOD_PIN14) | PIN_OTYPE_PUSHPULL(GPIOD_PIN15)) | ||
| 423 | #define VAL_GPIOD_OSPEEDR (PIN_OSPEED_HIGH(GPIOD_PIN0) | PIN_OSPEED_HIGH(GPIOD_PIN1) | PIN_OSPEED_HIGH(GPIOD_PIN2) | PIN_OSPEED_HIGH(GPIOD_PIN3) | PIN_OSPEED_HIGH(GPIOD_PIN4) | PIN_OSPEED_HIGH(GPIOD_PIN5) | PIN_OSPEED_HIGH(GPIOD_PIN6) | PIN_OSPEED_HIGH(GPIOD_PIN7) | PIN_OSPEED_HIGH(GPIOD_PIN8) | PIN_OSPEED_HIGH(GPIOD_PIN9) | PIN_OSPEED_HIGH(GPIOD_PIN10) | PIN_OSPEED_HIGH(GPIOD_PIN11) | PIN_OSPEED_HIGH(GPIOD_PIN12) | PIN_OSPEED_HIGH(GPIOD_PIN13) | PIN_OSPEED_HIGH(GPIOD_PIN14) | PIN_OSPEED_HIGH(GPIOD_PIN15)) | ||
| 424 | #define VAL_GPIOD_PUPDR (PIN_PUPDR_PULLUP(GPIOD_PIN0) | PIN_PUPDR_PULLUP(GPIOD_PIN1) | PIN_PUPDR_PULLUP(GPIOD_PIN2) | PIN_PUPDR_PULLUP(GPIOD_PIN3) | PIN_PUPDR_PULLUP(GPIOD_PIN4) | PIN_PUPDR_PULLUP(GPIOD_PIN5) | PIN_PUPDR_PULLUP(GPIOD_PIN6) | PIN_PUPDR_PULLUP(GPIOD_PIN7) | PIN_PUPDR_PULLUP(GPIOD_PIN8) | PIN_PUPDR_PULLUP(GPIOD_PIN9) | PIN_PUPDR_PULLUP(GPIOD_PIN10) | PIN_PUPDR_PULLUP(GPIOD_PIN11) | PIN_PUPDR_PULLUP(GPIOD_PIN12) | PIN_PUPDR_PULLUP(GPIOD_PIN13) | PIN_PUPDR_PULLUP(GPIOD_PIN14) | PIN_PUPDR_PULLUP(GPIOD_PIN15)) | ||
| 425 | #define VAL_GPIOD_ODR (PIN_ODR_HIGH(GPIOD_PIN0) | PIN_ODR_HIGH(GPIOD_PIN1) | PIN_ODR_HIGH(GPIOD_PIN2) | PIN_ODR_HIGH(GPIOD_PIN3) | PIN_ODR_HIGH(GPIOD_PIN4) | PIN_ODR_HIGH(GPIOD_PIN5) | PIN_ODR_HIGH(GPIOD_PIN6) | PIN_ODR_HIGH(GPIOD_PIN7) | PIN_ODR_HIGH(GPIOD_PIN8) | PIN_ODR_HIGH(GPIOD_PIN9) | PIN_ODR_HIGH(GPIOD_PIN10) | PIN_ODR_HIGH(GPIOD_PIN11) | PIN_ODR_HIGH(GPIOD_PIN12) | PIN_ODR_HIGH(GPIOD_PIN13) | PIN_ODR_HIGH(GPIOD_PIN14) | PIN_ODR_HIGH(GPIOD_PIN15)) | ||
| 426 | #define VAL_GPIOD_AFRL (PIN_AFIO_AF(GPIOD_PIN0, 0U) | PIN_AFIO_AF(GPIOD_PIN1, 0U) | PIN_AFIO_AF(GPIOD_PIN2, 0U) | PIN_AFIO_AF(GPIOD_PIN3, 0U) | PIN_AFIO_AF(GPIOD_PIN4, 0U) | PIN_AFIO_AF(GPIOD_PIN5, 0U) | PIN_AFIO_AF(GPIOD_PIN6, 0U) | PIN_AFIO_AF(GPIOD_PIN7, 0U)) | ||
| 427 | #define VAL_GPIOD_AFRH (PIN_AFIO_AF(GPIOD_PIN8, 0U) | PIN_AFIO_AF(GPIOD_PIN9, 0U) | PIN_AFIO_AF(GPIOD_PIN10, 0U) | PIN_AFIO_AF(GPIOD_PIN11, 0U) | PIN_AFIO_AF(GPIOD_PIN12, 0U) | PIN_AFIO_AF(GPIOD_PIN13, 0U) | PIN_AFIO_AF(GPIOD_PIN14, 0U) | PIN_AFIO_AF(GPIOD_PIN15, 0U)) | ||
| 428 | |||
| 429 | /* | ||
| 430 | * GPIOE setup: | ||
| 431 | * | ||
| 432 | * PE0 - PIN0 (input pullup). | ||
| 433 | * PE1 - PIN1 (input pullup). | ||
| 434 | * PE2 - PIN2 (input pullup). | ||
| 435 | * PE3 - PIN3 (input pullup). | ||
| 436 | * PE4 - PIN4 (input pullup). | ||
| 437 | * PE5 - PIN5 (input pullup). | ||
| 438 | * PE6 - PIN6 (input pullup). | ||
| 439 | * PE7 - PIN7 (input pullup). | ||
| 440 | * PE8 - PIN8 (input pullup). | ||
| 441 | * PE9 - PIN9 (input pullup). | ||
| 442 | * PE10 - PIN10 (input pullup). | ||
| 443 | * PE11 - PIN11 (input pullup). | ||
| 444 | * PE12 - PIN12 (input pullup). | ||
| 445 | * PE13 - PIN13 (input pullup). | ||
| 446 | * PE14 - PIN14 (input pullup). | ||
| 447 | * PE15 - PIN15 (input pullup). | ||
| 448 | */ | ||
| 449 | #define VAL_GPIOE_MODER (PIN_MODE_INPUT(GPIOE_PIN0) | PIN_MODE_INPUT(GPIOE_PIN1) | PIN_MODE_INPUT(GPIOE_PIN2) | PIN_MODE_INPUT(GPIOE_PIN3) | PIN_MODE_INPUT(GPIOE_PIN4) | PIN_MODE_INPUT(GPIOE_PIN5) | PIN_MODE_INPUT(GPIOE_PIN6) | PIN_MODE_INPUT(GPIOE_PIN7) | PIN_MODE_INPUT(GPIOE_PIN8) | PIN_MODE_INPUT(GPIOE_PIN9) | PIN_MODE_INPUT(GPIOE_PIN10) | PIN_MODE_INPUT(GPIOE_PIN11) | PIN_MODE_INPUT(GPIOE_PIN12) | PIN_MODE_INPUT(GPIOE_PIN13) | PIN_MODE_INPUT(GPIOE_PIN14) | PIN_MODE_INPUT(GPIOE_PIN15)) | ||
| 450 | #define VAL_GPIOE_OTYPER (PIN_OTYPE_PUSHPULL(GPIOE_PIN0) | PIN_OTYPE_PUSHPULL(GPIOE_PIN1) | PIN_OTYPE_PUSHPULL(GPIOE_PIN2) | PIN_OTYPE_PUSHPULL(GPIOE_PIN3) | PIN_OTYPE_PUSHPULL(GPIOE_PIN4) | PIN_OTYPE_PUSHPULL(GPIOE_PIN5) | PIN_OTYPE_PUSHPULL(GPIOE_PIN6) | PIN_OTYPE_PUSHPULL(GPIOE_PIN7) | PIN_OTYPE_PUSHPULL(GPIOE_PIN8) | PIN_OTYPE_PUSHPULL(GPIOE_PIN9) | PIN_OTYPE_PUSHPULL(GPIOE_PIN10) | PIN_OTYPE_PUSHPULL(GPIOE_PIN11) | PIN_OTYPE_PUSHPULL(GPIOE_PIN12) | PIN_OTYPE_PUSHPULL(GPIOE_PIN13) | PIN_OTYPE_PUSHPULL(GPIOE_PIN14) | PIN_OTYPE_PUSHPULL(GPIOE_PIN15)) | ||
| 451 | #define VAL_GPIOE_OSPEEDR (PIN_OSPEED_HIGH(GPIOE_PIN0) | PIN_OSPEED_HIGH(GPIOE_PIN1) | PIN_OSPEED_HIGH(GPIOE_PIN2) | PIN_OSPEED_HIGH(GPIOE_PIN3) | PIN_OSPEED_HIGH(GPIOE_PIN4) | PIN_OSPEED_HIGH(GPIOE_PIN5) | PIN_OSPEED_HIGH(GPIOE_PIN6) | PIN_OSPEED_HIGH(GPIOE_PIN7) | PIN_OSPEED_HIGH(GPIOE_PIN8) | PIN_OSPEED_HIGH(GPIOE_PIN9) | PIN_OSPEED_HIGH(GPIOE_PIN10) | PIN_OSPEED_HIGH(GPIOE_PIN11) | PIN_OSPEED_HIGH(GPIOE_PIN12) | PIN_OSPEED_HIGH(GPIOE_PIN13) | PIN_OSPEED_HIGH(GPIOE_PIN14) | PIN_OSPEED_HIGH(GPIOE_PIN15)) | ||
| 452 | #define VAL_GPIOE_PUPDR (PIN_PUPDR_PULLUP(GPIOE_PIN0) | PIN_PUPDR_PULLUP(GPIOE_PIN1) | PIN_PUPDR_PULLUP(GPIOE_PIN2) | PIN_PUPDR_PULLUP(GPIOE_PIN3) | PIN_PUPDR_PULLUP(GPIOE_PIN4) | PIN_PUPDR_PULLUP(GPIOE_PIN5) | PIN_PUPDR_PULLUP(GPIOE_PIN6) | PIN_PUPDR_PULLUP(GPIOE_PIN7) | PIN_PUPDR_PULLUP(GPIOE_PIN8) | PIN_PUPDR_PULLUP(GPIOE_PIN9) | PIN_PUPDR_PULLUP(GPIOE_PIN10) | PIN_PUPDR_PULLUP(GPIOE_PIN11) | PIN_PUPDR_PULLUP(GPIOE_PIN12) | PIN_PUPDR_PULLUP(GPIOE_PIN13) | PIN_PUPDR_PULLUP(GPIOE_PIN14) | PIN_PUPDR_PULLUP(GPIOE_PIN15)) | ||
| 453 | #define VAL_GPIOE_ODR (PIN_ODR_HIGH(GPIOE_PIN0) | PIN_ODR_HIGH(GPIOE_PIN1) | PIN_ODR_HIGH(GPIOE_PIN2) | PIN_ODR_HIGH(GPIOE_PIN3) | PIN_ODR_HIGH(GPIOE_PIN4) | PIN_ODR_HIGH(GPIOE_PIN5) | PIN_ODR_HIGH(GPIOE_PIN6) | PIN_ODR_HIGH(GPIOE_PIN7) | PIN_ODR_HIGH(GPIOE_PIN8) | PIN_ODR_HIGH(GPIOE_PIN9) | PIN_ODR_HIGH(GPIOE_PIN10) | PIN_ODR_HIGH(GPIOE_PIN11) | PIN_ODR_HIGH(GPIOE_PIN12) | PIN_ODR_HIGH(GPIOE_PIN13) | PIN_ODR_HIGH(GPIOE_PIN14) | PIN_ODR_HIGH(GPIOE_PIN15)) | ||
| 454 | #define VAL_GPIOE_AFRL (PIN_AFIO_AF(GPIOE_PIN0, 0U) | PIN_AFIO_AF(GPIOE_PIN1, 0U) | PIN_AFIO_AF(GPIOE_PIN2, 0U) | PIN_AFIO_AF(GPIOE_PIN3, 0U) | PIN_AFIO_AF(GPIOE_PIN4, 0U) | PIN_AFIO_AF(GPIOE_PIN5, 0U) | PIN_AFIO_AF(GPIOE_PIN6, 0U) | PIN_AFIO_AF(GPIOE_PIN7, 0U)) | ||
| 455 | #define VAL_GPIOE_AFRH (PIN_AFIO_AF(GPIOE_PIN8, 0U) | PIN_AFIO_AF(GPIOE_PIN9, 0U) | PIN_AFIO_AF(GPIOE_PIN10, 0U) | PIN_AFIO_AF(GPIOE_PIN11, 0U) | PIN_AFIO_AF(GPIOE_PIN12, 0U) | PIN_AFIO_AF(GPIOE_PIN13, 0U) | PIN_AFIO_AF(GPIOE_PIN14, 0U) | PIN_AFIO_AF(GPIOE_PIN15, 0U)) | ||
| 456 | |||
| 457 | /* | ||
| 458 | * GPIOF setup: | ||
| 459 | * | ||
| 460 | * PF0 - PIN0 (input pullup). | ||
| 461 | * PF1 - PIN1 (input pullup). | ||
| 462 | * PF2 - PIN2 (input pullup). | ||
| 463 | * PF3 - PIN3 (input pullup). | ||
| 464 | * PF4 - PIN4 (input pullup). | ||
| 465 | * PF5 - PIN5 (input pullup). | ||
| 466 | * PF6 - PIN6 (input pullup). | ||
| 467 | * PF7 - PIN7 (input pullup). | ||
| 468 | * PF8 - PIN8 (input pullup). | ||
| 469 | * PF9 - PIN9 (input pullup). | ||
| 470 | * PF10 - PIN10 (input pullup). | ||
| 471 | * PF11 - PIN11 (input pullup). | ||
| 472 | * PF12 - PIN12 (input pullup). | ||
| 473 | * PF13 - PIN13 (input pullup). | ||
| 474 | * PF14 - PIN14 (input pullup). | ||
| 475 | * PF15 - PIN15 (input pullup). | ||
| 476 | */ | ||
| 477 | #define VAL_GPIOF_MODER (PIN_MODE_INPUT(GPIOF_PIN0) | PIN_MODE_INPUT(GPIOF_PIN1) | PIN_MODE_INPUT(GPIOF_PIN2) | PIN_MODE_INPUT(GPIOF_PIN3) | PIN_MODE_INPUT(GPIOF_PIN4) | PIN_MODE_INPUT(GPIOF_PIN5) | PIN_MODE_INPUT(GPIOF_PIN6) | PIN_MODE_INPUT(GPIOF_PIN7) | PIN_MODE_INPUT(GPIOF_PIN8) | PIN_MODE_INPUT(GPIOF_PIN9) | PIN_MODE_INPUT(GPIOF_PIN10) | PIN_MODE_INPUT(GPIOF_PIN11) | PIN_MODE_INPUT(GPIOF_PIN12) | PIN_MODE_INPUT(GPIOF_PIN13) | PIN_MODE_INPUT(GPIOF_PIN14) | PIN_MODE_INPUT(GPIOF_PIN15)) | ||
| 478 | #define VAL_GPIOF_OTYPER (PIN_OTYPE_PUSHPULL(GPIOF_PIN0) | PIN_OTYPE_PUSHPULL(GPIOF_PIN1) | PIN_OTYPE_PUSHPULL(GPIOF_PIN2) | PIN_OTYPE_PUSHPULL(GPIOF_PIN3) | PIN_OTYPE_PUSHPULL(GPIOF_PIN4) | PIN_OTYPE_PUSHPULL(GPIOF_PIN5) | PIN_OTYPE_PUSHPULL(GPIOF_PIN6) | PIN_OTYPE_PUSHPULL(GPIOF_PIN7) | PIN_OTYPE_PUSHPULL(GPIOF_PIN8) | PIN_OTYPE_PUSHPULL(GPIOF_PIN9) | PIN_OTYPE_PUSHPULL(GPIOF_PIN10) | PIN_OTYPE_PUSHPULL(GPIOF_PIN11) | PIN_OTYPE_PUSHPULL(GPIOF_PIN12) | PIN_OTYPE_PUSHPULL(GPIOF_PIN13) | PIN_OTYPE_PUSHPULL(GPIOF_PIN14) | PIN_OTYPE_PUSHPULL(GPIOF_PIN15)) | ||
| 479 | #define VAL_GPIOF_OSPEEDR (PIN_OSPEED_HIGH(GPIOF_PIN0) | PIN_OSPEED_HIGH(GPIOF_PIN1) | PIN_OSPEED_HIGH(GPIOF_PIN2) | PIN_OSPEED_HIGH(GPIOF_PIN3) | PIN_OSPEED_HIGH(GPIOF_PIN4) | PIN_OSPEED_HIGH(GPIOF_PIN5) | PIN_OSPEED_HIGH(GPIOF_PIN6) | PIN_OSPEED_HIGH(GPIOF_PIN7) | PIN_OSPEED_HIGH(GPIOF_PIN8) | PIN_OSPEED_HIGH(GPIOF_PIN9) | PIN_OSPEED_HIGH(GPIOF_PIN10) | PIN_OSPEED_HIGH(GPIOF_PIN11) | PIN_OSPEED_HIGH(GPIOF_PIN12) | PIN_OSPEED_HIGH(GPIOF_PIN13) | PIN_OSPEED_HIGH(GPIOF_PIN14) | PIN_OSPEED_HIGH(GPIOF_PIN15)) | ||
| 480 | #define VAL_GPIOF_PUPDR (PIN_PUPDR_PULLUP(GPIOF_PIN0) | PIN_PUPDR_PULLUP(GPIOF_PIN1) | PIN_PUPDR_PULLUP(GPIOF_PIN2) | PIN_PUPDR_PULLUP(GPIOF_PIN3) | PIN_PUPDR_PULLUP(GPIOF_PIN4) | PIN_PUPDR_PULLUP(GPIOF_PIN5) | PIN_PUPDR_PULLUP(GPIOF_PIN6) | PIN_PUPDR_PULLUP(GPIOF_PIN7) | PIN_PUPDR_PULLUP(GPIOF_PIN8) | PIN_PUPDR_PULLUP(GPIOF_PIN9) | PIN_PUPDR_PULLUP(GPIOF_PIN10) | PIN_PUPDR_PULLUP(GPIOF_PIN11) | PIN_PUPDR_PULLUP(GPIOF_PIN12) | PIN_PUPDR_PULLUP(GPIOF_PIN13) | PIN_PUPDR_PULLUP(GPIOF_PIN14) | PIN_PUPDR_PULLUP(GPIOF_PIN15)) | ||
| 481 | #define VAL_GPIOF_ODR (PIN_ODR_HIGH(GPIOF_PIN0) | PIN_ODR_HIGH(GPIOF_PIN1) | PIN_ODR_HIGH(GPIOF_PIN2) | PIN_ODR_HIGH(GPIOF_PIN3) | PIN_ODR_HIGH(GPIOF_PIN4) | PIN_ODR_HIGH(GPIOF_PIN5) | PIN_ODR_HIGH(GPIOF_PIN6) | PIN_ODR_HIGH(GPIOF_PIN7) | PIN_ODR_HIGH(GPIOF_PIN8) | PIN_ODR_HIGH(GPIOF_PIN9) | PIN_ODR_HIGH(GPIOF_PIN10) | PIN_ODR_HIGH(GPIOF_PIN11) | PIN_ODR_HIGH(GPIOF_PIN12) | PIN_ODR_HIGH(GPIOF_PIN13) | PIN_ODR_HIGH(GPIOF_PIN14) | PIN_ODR_HIGH(GPIOF_PIN15)) | ||
| 482 | #define VAL_GPIOF_AFRL (PIN_AFIO_AF(GPIOF_PIN0, 0U) | PIN_AFIO_AF(GPIOF_PIN1, 0U) | PIN_AFIO_AF(GPIOF_PIN2, 0U) | PIN_AFIO_AF(GPIOF_PIN3, 0U) | PIN_AFIO_AF(GPIOF_PIN4, 0U) | PIN_AFIO_AF(GPIOF_PIN5, 0U) | PIN_AFIO_AF(GPIOF_PIN6, 0U) | PIN_AFIO_AF(GPIOF_PIN7, 0U)) | ||
| 483 | #define VAL_GPIOF_AFRH (PIN_AFIO_AF(GPIOF_PIN8, 0U) | PIN_AFIO_AF(GPIOF_PIN9, 0U) | PIN_AFIO_AF(GPIOF_PIN10, 0U) | PIN_AFIO_AF(GPIOF_PIN11, 0U) | PIN_AFIO_AF(GPIOF_PIN12, 0U) | PIN_AFIO_AF(GPIOF_PIN13, 0U) | PIN_AFIO_AF(GPIOF_PIN14, 0U) | PIN_AFIO_AF(GPIOF_PIN15, 0U)) | ||
| 484 | |||
| 485 | /* | ||
| 486 | * GPIOG setup: | ||
| 487 | * | ||
| 488 | * PG0 - PIN0 (input pullup). | ||
| 489 | * PG1 - PIN1 (input pullup). | ||
| 490 | * PG2 - PIN2 (input pullup). | ||
| 491 | * PG3 - PIN3 (input pullup). | ||
| 492 | * PG4 - PIN4 (input pullup). | ||
| 493 | * PG5 - PIN5 (input pullup). | ||
| 494 | * PG6 - PIN6 (input pullup). | ||
| 495 | * PG7 - PIN7 (input pullup). | ||
| 496 | * PG8 - PIN8 (input pullup). | ||
| 497 | * PG9 - PIN9 (input pullup). | ||
| 498 | * PG10 - PIN10 (input pullup). | ||
| 499 | * PG11 - PIN11 (input pullup). | ||
| 500 | * PG12 - PIN12 (input pullup). | ||
| 501 | * PG13 - PIN13 (input pullup). | ||
| 502 | * PG14 - PIN14 (input pullup). | ||
| 503 | * PG15 - PIN15 (input pullup). | ||
| 504 | */ | ||
| 505 | #define VAL_GPIOG_MODER (PIN_MODE_INPUT(GPIOG_PIN0) | PIN_MODE_INPUT(GPIOG_PIN1) | PIN_MODE_INPUT(GPIOG_PIN2) | PIN_MODE_INPUT(GPIOG_PIN3) | PIN_MODE_INPUT(GPIOG_PIN4) | PIN_MODE_INPUT(GPIOG_PIN5) | PIN_MODE_INPUT(GPIOG_PIN6) | PIN_MODE_INPUT(GPIOG_PIN7) | PIN_MODE_INPUT(GPIOG_PIN8) | PIN_MODE_INPUT(GPIOG_PIN9) | PIN_MODE_INPUT(GPIOG_PIN10) | PIN_MODE_INPUT(GPIOG_PIN11) | PIN_MODE_INPUT(GPIOG_PIN12) | PIN_MODE_INPUT(GPIOG_PIN13) | PIN_MODE_INPUT(GPIOG_PIN14) | PIN_MODE_INPUT(GPIOG_PIN15)) | ||
| 506 | #define VAL_GPIOG_OTYPER (PIN_OTYPE_PUSHPULL(GPIOG_PIN0) | PIN_OTYPE_PUSHPULL(GPIOG_PIN1) | PIN_OTYPE_PUSHPULL(GPIOG_PIN2) | PIN_OTYPE_PUSHPULL(GPIOG_PIN3) | PIN_OTYPE_PUSHPULL(GPIOG_PIN4) | PIN_OTYPE_PUSHPULL(GPIOG_PIN5) | PIN_OTYPE_PUSHPULL(GPIOG_PIN6) | PIN_OTYPE_PUSHPULL(GPIOG_PIN7) | PIN_OTYPE_PUSHPULL(GPIOG_PIN8) | PIN_OTYPE_PUSHPULL(GPIOG_PIN9) | PIN_OTYPE_PUSHPULL(GPIOG_PIN10) | PIN_OTYPE_PUSHPULL(GPIOG_PIN11) | PIN_OTYPE_PUSHPULL(GPIOG_PIN12) | PIN_OTYPE_PUSHPULL(GPIOG_PIN13) | PIN_OTYPE_PUSHPULL(GPIOG_PIN14) | PIN_OTYPE_PUSHPULL(GPIOG_PIN15)) | ||
| 507 | #define VAL_GPIOG_OSPEEDR (PIN_OSPEED_HIGH(GPIOG_PIN0) | PIN_OSPEED_HIGH(GPIOG_PIN1) | PIN_OSPEED_HIGH(GPIOG_PIN2) | PIN_OSPEED_HIGH(GPIOG_PIN3) | PIN_OSPEED_HIGH(GPIOG_PIN4) | PIN_OSPEED_HIGH(GPIOG_PIN5) | PIN_OSPEED_HIGH(GPIOG_PIN6) | PIN_OSPEED_HIGH(GPIOG_PIN7) | PIN_OSPEED_HIGH(GPIOG_PIN8) | PIN_OSPEED_HIGH(GPIOG_PIN9) | PIN_OSPEED_HIGH(GPIOG_PIN10) | PIN_OSPEED_HIGH(GPIOG_PIN11) | PIN_OSPEED_HIGH(GPIOG_PIN12) | PIN_OSPEED_HIGH(GPIOG_PIN13) | PIN_OSPEED_HIGH(GPIOG_PIN14) | PIN_OSPEED_HIGH(GPIOG_PIN15)) | ||
| 508 | #define VAL_GPIOG_PUPDR (PIN_PUPDR_PULLUP(GPIOG_PIN0) | PIN_PUPDR_PULLUP(GPIOG_PIN1) | PIN_PUPDR_PULLUP(GPIOG_PIN2) | PIN_PUPDR_PULLUP(GPIOG_PIN3) | PIN_PUPDR_PULLUP(GPIOG_PIN4) | PIN_PUPDR_PULLUP(GPIOG_PIN5) | PIN_PUPDR_PULLUP(GPIOG_PIN6) | PIN_PUPDR_PULLUP(GPIOG_PIN7) | PIN_PUPDR_PULLUP(GPIOG_PIN8) | PIN_PUPDR_PULLUP(GPIOG_PIN9) | PIN_PUPDR_PULLUP(GPIOG_PIN10) | PIN_PUPDR_PULLUP(GPIOG_PIN11) | PIN_PUPDR_PULLUP(GPIOG_PIN12) | PIN_PUPDR_PULLUP(GPIOG_PIN13) | PIN_PUPDR_PULLUP(GPIOG_PIN14) | PIN_PUPDR_PULLUP(GPIOG_PIN15)) | ||
| 509 | #define VAL_GPIOG_ODR (PIN_ODR_HIGH(GPIOG_PIN0) | PIN_ODR_HIGH(GPIOG_PIN1) | PIN_ODR_HIGH(GPIOG_PIN2) | PIN_ODR_HIGH(GPIOG_PIN3) | PIN_ODR_HIGH(GPIOG_PIN4) | PIN_ODR_HIGH(GPIOG_PIN5) | PIN_ODR_HIGH(GPIOG_PIN6) | PIN_ODR_HIGH(GPIOG_PIN7) | PIN_ODR_HIGH(GPIOG_PIN8) | PIN_ODR_HIGH(GPIOG_PIN9) | PIN_ODR_HIGH(GPIOG_PIN10) | PIN_ODR_HIGH(GPIOG_PIN11) | PIN_ODR_HIGH(GPIOG_PIN12) | PIN_ODR_HIGH(GPIOG_PIN13) | PIN_ODR_HIGH(GPIOG_PIN14) | PIN_ODR_HIGH(GPIOG_PIN15)) | ||
| 510 | #define VAL_GPIOG_AFRL (PIN_AFIO_AF(GPIOG_PIN0, 0U) | PIN_AFIO_AF(GPIOG_PIN1, 0U) | PIN_AFIO_AF(GPIOG_PIN2, 0U) | PIN_AFIO_AF(GPIOG_PIN3, 0U) | PIN_AFIO_AF(GPIOG_PIN4, 0U) | PIN_AFIO_AF(GPIOG_PIN5, 0U) | PIN_AFIO_AF(GPIOG_PIN6, 0U) | PIN_AFIO_AF(GPIOG_PIN7, 0U)) | ||
| 511 | #define VAL_GPIOG_AFRH (PIN_AFIO_AF(GPIOG_PIN8, 0U) | PIN_AFIO_AF(GPIOG_PIN9, 0U) | PIN_AFIO_AF(GPIOG_PIN10, 0U) | PIN_AFIO_AF(GPIOG_PIN11, 0U) | PIN_AFIO_AF(GPIOG_PIN12, 0U) | PIN_AFIO_AF(GPIOG_PIN13, 0U) | PIN_AFIO_AF(GPIOG_PIN14, 0U) | PIN_AFIO_AF(GPIOG_PIN15, 0U)) | ||
| 512 | |||
| 513 | /* | ||
| 514 | * GPIOH setup: | ||
| 515 | * | ||
| 516 | * PH0 - OSC_IN (input floating). | ||
| 517 | * PH1 - OSC_OUT (input floating). | ||
| 518 | * PH2 - PIN2 (input pullup). | ||
| 519 | * PH3 - PIN3 (input pullup). | ||
| 520 | * PH4 - PIN4 (input pullup). | ||
| 521 | * PH5 - PIN5 (input pullup). | ||
| 522 | * PH6 - PIN6 (input pullup). | ||
| 523 | * PH7 - PIN7 (input pullup). | ||
| 524 | * PH8 - PIN8 (input pullup). | ||
| 525 | * PH9 - PIN9 (input pullup). | ||
| 526 | * PH10 - PIN10 (input pullup). | ||
| 527 | * PH11 - PIN11 (input pullup). | ||
| 528 | * PH12 - PIN12 (input pullup). | ||
| 529 | * PH13 - PIN13 (input pullup). | ||
| 530 | * PH14 - PIN14 (input pullup). | ||
| 531 | * PH15 - PIN15 (input pullup). | ||
| 532 | */ | ||
| 533 | #define VAL_GPIOH_MODER (PIN_MODE_INPUT(GPIOH_OSC_IN) | PIN_MODE_INPUT(GPIOH_OSC_OUT) | PIN_MODE_INPUT(GPIOH_PIN2) | PIN_MODE_INPUT(GPIOH_PIN3) | PIN_MODE_INPUT(GPIOH_PIN4) | PIN_MODE_INPUT(GPIOH_PIN5) | PIN_MODE_INPUT(GPIOH_PIN6) | PIN_MODE_INPUT(GPIOH_PIN7) | PIN_MODE_INPUT(GPIOH_PIN8) | PIN_MODE_INPUT(GPIOH_PIN9) | PIN_MODE_INPUT(GPIOH_PIN10) | PIN_MODE_INPUT(GPIOH_PIN11) | PIN_MODE_INPUT(GPIOH_PIN12) | PIN_MODE_INPUT(GPIOH_PIN13) | PIN_MODE_INPUT(GPIOH_PIN14) | PIN_MODE_INPUT(GPIOH_PIN15)) | ||
| 534 | #define VAL_GPIOH_OTYPER (PIN_OTYPE_PUSHPULL(GPIOH_OSC_IN) | PIN_OTYPE_PUSHPULL(GPIOH_OSC_OUT) | PIN_OTYPE_PUSHPULL(GPIOH_PIN2) | PIN_OTYPE_PUSHPULL(GPIOH_PIN3) | PIN_OTYPE_PUSHPULL(GPIOH_PIN4) | PIN_OTYPE_PUSHPULL(GPIOH_PIN5) | PIN_OTYPE_PUSHPULL(GPIOH_PIN6) | PIN_OTYPE_PUSHPULL(GPIOH_PIN7) | PIN_OTYPE_PUSHPULL(GPIOH_PIN8) | PIN_OTYPE_PUSHPULL(GPIOH_PIN9) | PIN_OTYPE_PUSHPULL(GPIOH_PIN10) | PIN_OTYPE_PUSHPULL(GPIOH_PIN11) | PIN_OTYPE_PUSHPULL(GPIOH_PIN12) | PIN_OTYPE_PUSHPULL(GPIOH_PIN13) | PIN_OTYPE_PUSHPULL(GPIOH_PIN14) | PIN_OTYPE_PUSHPULL(GPIOH_PIN15)) | ||
| 535 | #define VAL_GPIOH_OSPEEDR (PIN_OSPEED_HIGH(GPIOH_OSC_IN) | PIN_OSPEED_HIGH(GPIOH_OSC_OUT) | PIN_OSPEED_HIGH(GPIOH_PIN2) | PIN_OSPEED_HIGH(GPIOH_PIN3) | PIN_OSPEED_HIGH(GPIOH_PIN4) | PIN_OSPEED_HIGH(GPIOH_PIN5) | PIN_OSPEED_HIGH(GPIOH_PIN6) | PIN_OSPEED_HIGH(GPIOH_PIN7) | PIN_OSPEED_HIGH(GPIOH_PIN8) | PIN_OSPEED_HIGH(GPIOH_PIN9) | PIN_OSPEED_HIGH(GPIOH_PIN10) | PIN_OSPEED_HIGH(GPIOH_PIN11) | PIN_OSPEED_HIGH(GPIOH_PIN12) | PIN_OSPEED_HIGH(GPIOH_PIN13) | PIN_OSPEED_HIGH(GPIOH_PIN14) | PIN_OSPEED_HIGH(GPIOH_PIN15)) | ||
| 536 | #define VAL_GPIOH_PUPDR (PIN_PUPDR_FLOATING(GPIOH_OSC_IN) | PIN_PUPDR_FLOATING(GPIOH_OSC_OUT) | PIN_PUPDR_PULLUP(GPIOH_PIN2) | PIN_PUPDR_PULLUP(GPIOH_PIN3) | PIN_PUPDR_PULLUP(GPIOH_PIN4) | PIN_PUPDR_PULLUP(GPIOH_PIN5) | PIN_PUPDR_PULLUP(GPIOH_PIN6) | PIN_PUPDR_PULLUP(GPIOH_PIN7) | PIN_PUPDR_PULLUP(GPIOH_PIN8) | PIN_PUPDR_PULLUP(GPIOH_PIN9) | PIN_PUPDR_PULLUP(GPIOH_PIN10) | PIN_PUPDR_PULLUP(GPIOH_PIN11) | PIN_PUPDR_PULLUP(GPIOH_PIN12) | PIN_PUPDR_PULLUP(GPIOH_PIN13) | PIN_PUPDR_PULLUP(GPIOH_PIN14) | PIN_PUPDR_PULLUP(GPIOH_PIN15)) | ||
| 537 | #define VAL_GPIOH_ODR (PIN_ODR_HIGH(GPIOH_OSC_IN) | PIN_ODR_HIGH(GPIOH_OSC_OUT) | PIN_ODR_HIGH(GPIOH_PIN2) | PIN_ODR_HIGH(GPIOH_PIN3) | PIN_ODR_HIGH(GPIOH_PIN4) | PIN_ODR_HIGH(GPIOH_PIN5) | PIN_ODR_HIGH(GPIOH_PIN6) | PIN_ODR_HIGH(GPIOH_PIN7) | PIN_ODR_HIGH(GPIOH_PIN8) | PIN_ODR_HIGH(GPIOH_PIN9) | PIN_ODR_HIGH(GPIOH_PIN10) | PIN_ODR_HIGH(GPIOH_PIN11) | PIN_ODR_HIGH(GPIOH_PIN12) | PIN_ODR_HIGH(GPIOH_PIN13) | PIN_ODR_HIGH(GPIOH_PIN14) | PIN_ODR_HIGH(GPIOH_PIN15)) | ||
| 538 | #define VAL_GPIOH_AFRL (PIN_AFIO_AF(GPIOH_OSC_IN, 0U) | PIN_AFIO_AF(GPIOH_OSC_OUT, 0U) | PIN_AFIO_AF(GPIOH_PIN2, 0U) | PIN_AFIO_AF(GPIOH_PIN3, 0U) | PIN_AFIO_AF(GPIOH_PIN4, 0U) | PIN_AFIO_AF(GPIOH_PIN5, 0U) | PIN_AFIO_AF(GPIOH_PIN6, 0U) | PIN_AFIO_AF(GPIOH_PIN7, 0U)) | ||
| 539 | #define VAL_GPIOH_AFRH (PIN_AFIO_AF(GPIOH_PIN8, 0U) | PIN_AFIO_AF(GPIOH_PIN9, 0U) | PIN_AFIO_AF(GPIOH_PIN10, 0U) | PIN_AFIO_AF(GPIOH_PIN11, 0U) | PIN_AFIO_AF(GPIOH_PIN12, 0U) | PIN_AFIO_AF(GPIOH_PIN13, 0U) | PIN_AFIO_AF(GPIOH_PIN14, 0U) | PIN_AFIO_AF(GPIOH_PIN15, 0U)) | ||
| 540 | |||
| 541 | /* | ||
| 542 | * GPIOI setup: | ||
| 543 | * | ||
| 544 | * PI0 - PIN0 (input pullup). | ||
| 545 | * PI1 - PIN1 (input pullup). | ||
| 546 | * PI2 - PIN2 (input pullup). | ||
| 547 | * PI3 - PIN3 (input pullup). | ||
| 548 | * PI4 - PIN4 (input pullup). | ||
| 549 | * PI5 - PIN5 (input pullup). | ||
| 550 | * PI6 - PIN6 (input pullup). | ||
| 551 | * PI7 - PIN7 (input pullup). | ||
| 552 | * PI8 - PIN8 (input pullup). | ||
| 553 | * PI9 - PIN9 (input pullup). | ||
| 554 | * PI10 - PIN10 (input pullup). | ||
| 555 | * PI11 - PIN11 (input pullup). | ||
| 556 | * PI12 - PIN12 (input pullup). | ||
| 557 | * PI13 - PIN13 (input pullup). | ||
| 558 | * PI14 - PIN14 (input pullup). | ||
| 559 | * PI15 - PIN15 (input pullup). | ||
| 560 | */ | ||
| 561 | #define VAL_GPIOI_MODER (PIN_MODE_INPUT(GPIOI_PIN0) | PIN_MODE_INPUT(GPIOI_PIN1) | PIN_MODE_INPUT(GPIOI_PIN2) | PIN_MODE_INPUT(GPIOI_PIN3) | PIN_MODE_INPUT(GPIOI_PIN4) | PIN_MODE_INPUT(GPIOI_PIN5) | PIN_MODE_INPUT(GPIOI_PIN6) | PIN_MODE_INPUT(GPIOI_PIN7) | PIN_MODE_INPUT(GPIOI_PIN8) | PIN_MODE_INPUT(GPIOI_PIN9) | PIN_MODE_INPUT(GPIOI_PIN10) | PIN_MODE_INPUT(GPIOI_PIN11) | PIN_MODE_INPUT(GPIOI_PIN12) | PIN_MODE_INPUT(GPIOI_PIN13) | PIN_MODE_INPUT(GPIOI_PIN14) | PIN_MODE_INPUT(GPIOI_PIN15)) | ||
| 562 | #define VAL_GPIOI_OTYPER (PIN_OTYPE_PUSHPULL(GPIOI_PIN0) | PIN_OTYPE_PUSHPULL(GPIOI_PIN1) | PIN_OTYPE_PUSHPULL(GPIOI_PIN2) | PIN_OTYPE_PUSHPULL(GPIOI_PIN3) | PIN_OTYPE_PUSHPULL(GPIOI_PIN4) | PIN_OTYPE_PUSHPULL(GPIOI_PIN5) | PIN_OTYPE_PUSHPULL(GPIOI_PIN6) | PIN_OTYPE_PUSHPULL(GPIOI_PIN7) | PIN_OTYPE_PUSHPULL(GPIOI_PIN8) | PIN_OTYPE_PUSHPULL(GPIOI_PIN9) | PIN_OTYPE_PUSHPULL(GPIOI_PIN10) | PIN_OTYPE_PUSHPULL(GPIOI_PIN11) | PIN_OTYPE_PUSHPULL(GPIOI_PIN12) | PIN_OTYPE_PUSHPULL(GPIOI_PIN13) | PIN_OTYPE_PUSHPULL(GPIOI_PIN14) | PIN_OTYPE_PUSHPULL(GPIOI_PIN15)) | ||
| 563 | #define VAL_GPIOI_OSPEEDR (PIN_OSPEED_HIGH(GPIOI_PIN0) | PIN_OSPEED_HIGH(GPIOI_PIN1) | PIN_OSPEED_HIGH(GPIOI_PIN2) | PIN_OSPEED_HIGH(GPIOI_PIN3) | PIN_OSPEED_HIGH(GPIOI_PIN4) | PIN_OSPEED_HIGH(GPIOI_PIN5) | PIN_OSPEED_HIGH(GPIOI_PIN6) | PIN_OSPEED_HIGH(GPIOI_PIN7) | PIN_OSPEED_HIGH(GPIOI_PIN8) | PIN_OSPEED_HIGH(GPIOI_PIN9) | PIN_OSPEED_HIGH(GPIOI_PIN10) | PIN_OSPEED_HIGH(GPIOI_PIN11) | PIN_OSPEED_HIGH(GPIOI_PIN12) | PIN_OSPEED_HIGH(GPIOI_PIN13) | PIN_OSPEED_HIGH(GPIOI_PIN14) | PIN_OSPEED_HIGH(GPIOI_PIN15)) | ||
| 564 | #define VAL_GPIOI_PUPDR (PIN_PUPDR_PULLUP(GPIOI_PIN0) | PIN_PUPDR_PULLUP(GPIOI_PIN1) | PIN_PUPDR_PULLUP(GPIOI_PIN2) | PIN_PUPDR_PULLUP(GPIOI_PIN3) | PIN_PUPDR_PULLUP(GPIOI_PIN4) | PIN_PUPDR_PULLUP(GPIOI_PIN5) | PIN_PUPDR_PULLUP(GPIOI_PIN6) | PIN_PUPDR_PULLUP(GPIOI_PIN7) | PIN_PUPDR_PULLUP(GPIOI_PIN8) | PIN_PUPDR_PULLUP(GPIOI_PIN9) | PIN_PUPDR_PULLUP(GPIOI_PIN10) | PIN_PUPDR_PULLUP(GPIOI_PIN11) | PIN_PUPDR_PULLUP(GPIOI_PIN12) | PIN_PUPDR_PULLUP(GPIOI_PIN13) | PIN_PUPDR_PULLUP(GPIOI_PIN14) | PIN_PUPDR_PULLUP(GPIOI_PIN15)) | ||
| 565 | #define VAL_GPIOI_ODR (PIN_ODR_HIGH(GPIOI_PIN0) | PIN_ODR_HIGH(GPIOI_PIN1) | PIN_ODR_HIGH(GPIOI_PIN2) | PIN_ODR_HIGH(GPIOI_PIN3) | PIN_ODR_HIGH(GPIOI_PIN4) | PIN_ODR_HIGH(GPIOI_PIN5) | PIN_ODR_HIGH(GPIOI_PIN6) | PIN_ODR_HIGH(GPIOI_PIN7) | PIN_ODR_HIGH(GPIOI_PIN8) | PIN_ODR_HIGH(GPIOI_PIN9) | PIN_ODR_HIGH(GPIOI_PIN10) | PIN_ODR_HIGH(GPIOI_PIN11) | PIN_ODR_HIGH(GPIOI_PIN12) | PIN_ODR_HIGH(GPIOI_PIN13) | PIN_ODR_HIGH(GPIOI_PIN14) | PIN_ODR_HIGH(GPIOI_PIN15)) | ||
| 566 | #define VAL_GPIOI_AFRL (PIN_AFIO_AF(GPIOI_PIN0, 0U) | PIN_AFIO_AF(GPIOI_PIN1, 0U) | PIN_AFIO_AF(GPIOI_PIN2, 0U) | PIN_AFIO_AF(GPIOI_PIN3, 0U) | PIN_AFIO_AF(GPIOI_PIN4, 0U) | PIN_AFIO_AF(GPIOI_PIN5, 0U) | PIN_AFIO_AF(GPIOI_PIN6, 0U) | PIN_AFIO_AF(GPIOI_PIN7, 0U)) | ||
| 567 | #define VAL_GPIOI_AFRH (PIN_AFIO_AF(GPIOI_PIN8, 0U) | PIN_AFIO_AF(GPIOI_PIN9, 0U) | PIN_AFIO_AF(GPIOI_PIN10, 0U) | PIN_AFIO_AF(GPIOI_PIN11, 0U) | PIN_AFIO_AF(GPIOI_PIN12, 0U) | PIN_AFIO_AF(GPIOI_PIN13, 0U) | PIN_AFIO_AF(GPIOI_PIN14, 0U) | PIN_AFIO_AF(GPIOI_PIN15, 0U)) | ||
| 568 | |||
| 569 | /*===========================================================================*/ | ||
| 570 | /* External declarations. */ | ||
| 571 | /*===========================================================================*/ | ||
| 572 | |||
| 573 | #if !defined(_FROM_ASM_) | ||
| 574 | # ifdef __cplusplus | ||
| 575 | extern "C" { | ||
| 576 | # endif | ||
| 577 | void boardInit(void); | ||
| 578 | # ifdef __cplusplus | ||
| 579 | } | ||
| 580 | # endif | ||
| 581 | #endif /* _FROM_ASM_ */ | ||
| 582 | |||
| 583 | #endif /* BOARD_H */ | ||
diff --git a/drivers/boards/BLACKPILL_STM32_F411/cfg/board.chcfg b/drivers/boards/BLACKPILL_STM32_F411/cfg/board.chcfg deleted file mode 100644 index 3095409cc..000000000 --- a/drivers/boards/BLACKPILL_STM32_F411/cfg/board.chcfg +++ /dev/null | |||
| @@ -1,1193 +0,0 @@ | |||
| 1 | <?xml version="1.0" encoding="UTF-8"?> | ||
| 2 | <!-- STM32F4xx board Template --> | ||
| 3 | <board | ||
| 4 | xmlns:xsi="http://www.w3.org/2001/XMLSchema-instance" | ||
| 5 | xsi:noNamespaceSchemaLocation="http://www.chibios.org/xml/schema/boards/stm32f4xx_board.xsd"> | ||
| 6 | <configuration_settings> | ||
| 7 | <templates_path>resources/gencfg/processors/boards/stm32f4xx/templates</templates_path> | ||
| 8 | <output_path>..</output_path> | ||
| 9 | <hal_version>5.0.x</hal_version> | ||
| 10 | </configuration_settings> | ||
| 11 | <board_name>STMicroelectronics STM32 Nucleo64-F411RE</board_name> | ||
| 12 | <board_id>ST_NUCLEO64_F411RE</board_id> | ||
| 13 | <board_functions></board_functions> | ||
| 14 | <subtype>STM32F411xE</subtype> | ||
| 15 | <clocks | ||
| 16 | HSEFrequency="8000000" | ||
| 17 | HSEBypass="true" | ||
| 18 | LSEFrequency="0" | ||
| 19 | LSEBypass="false" | ||
| 20 | VDD="300" /> | ||
| 21 | <ports> | ||
| 22 | <GPIOA> | ||
| 23 | <pin0 | ||
| 24 | ID="ARD_A0 ADC1_IN0" | ||
| 25 | Type="PushPull" | ||
| 26 | Level="High" | ||
| 27 | Speed="Maximum" | ||
| 28 | Resistor="PullUp" | ||
| 29 | Mode="Input" | ||
| 30 | Alternate="0" /> | ||
| 31 | <pin1 | ||
| 32 | ID="ARD_A1 ADC1_IN1" | ||
| 33 | Type="PushPull" | ||
| 34 | Level="High" | ||
| 35 | Speed="Maximum" | ||
| 36 | Resistor="PullUp" | ||
| 37 | Mode="Input" | ||
| 38 | Alternate="0" /> | ||
| 39 | <pin2 | ||
| 40 | ID="ARD_D1 USART2_TX" | ||
| 41 | Type="PushPull" | ||
| 42 | Level="High" | ||
| 43 | Speed="High" | ||
| 44 | Resistor="Floating" | ||
| 45 | Mode="Alternate" | ||
| 46 | Alternate="7" /> | ||
| 47 | <pin3 | ||
| 48 | ID="ARD_D0 USART2_RX" | ||
| 49 | Type="PushPull" | ||
| 50 | Level="High" | ||
| 51 | Speed="High" | ||
| 52 | Resistor="Floating" | ||
| 53 | Mode="Alternate" | ||
| 54 | Alternate="7" /> | ||
| 55 | <pin4 | ||
| 56 | ID="ARD_A2 ADC1_IN4" | ||
| 57 | Type="PushPull" | ||
| 58 | Level="High" | ||
| 59 | Speed="Maximum" | ||
| 60 | Resistor="PullUp" | ||
| 61 | Mode="Input" | ||
| 62 | Alternate="0" /> | ||
| 63 | <pin5 | ||
| 64 | ID="LED_GREEN ARD_D13" | ||
| 65 | Type="PushPull" | ||
| 66 | Level="Low" | ||
| 67 | Speed="High" | ||
| 68 | Resistor="Floating" | ||
| 69 | Mode="Output" | ||
| 70 | Alternate="0" /> | ||
| 71 | <pin6 | ||
| 72 | ID="ARD_D12" | ||
| 73 | Type="PushPull" | ||
| 74 | Level="High" | ||
| 75 | Speed="Maximum" | ||
| 76 | Resistor="PullUp" | ||
| 77 | Mode="Input" | ||
| 78 | Alternate="0" /> | ||
| 79 | <pin7 | ||
| 80 | ID="ARD_D11" | ||
| 81 | Type="PushPull" | ||
| 82 | Level="High" | ||
| 83 | Speed="Maximum" | ||
| 84 | Resistor="PullUp" | ||
| 85 | Mode="Input" | ||
| 86 | Alternate="0" /> | ||
| 87 | <pin8 | ||
| 88 | ID="ARD_D7" | ||
| 89 | Type="PushPull" | ||
| 90 | Level="High" | ||
| 91 | Speed="Maximum" | ||
| 92 | Resistor="PullUp" | ||
| 93 | Mode="Input" | ||
| 94 | Alternate="0" /> | ||
| 95 | <pin9 | ||
| 96 | ID="ARD_D8" | ||
| 97 | Type="PushPull" | ||
| 98 | Level="High" | ||
| 99 | Speed="Maximum" | ||
| 100 | Resistor="PullUp" | ||
| 101 | Mode="Input" | ||
| 102 | Alternate="0" /> | ||
| 103 | <pin10 | ||
| 104 | ID="ARD_D2" | ||
| 105 | Type="PushPull" | ||
| 106 | Level="High" | ||
| 107 | Speed="Maximum" | ||
| 108 | Resistor="PullUp" | ||
| 109 | Mode="Input" | ||
| 110 | Alternate="0" /> | ||
| 111 | <pin11 | ||
| 112 | ID="OTG_FS_DM" | ||
| 113 | Type="PushPull" | ||
| 114 | Level="High" | ||
| 115 | Speed="Maximum" | ||
| 116 | Resistor="Floating" | ||
| 117 | Mode="Alternate" | ||
| 118 | Alternate="10" /> | ||
| 119 | <pin12 | ||
| 120 | ID="OTG_FS_DP" | ||
| 121 | Type="PushPull" | ||
| 122 | Level="High" | ||
| 123 | Speed="Maximum" | ||
| 124 | Resistor="Floating" | ||
| 125 | Mode="Alternate" | ||
| 126 | Alternate="10" /> | ||
| 127 | <pin13 | ||
| 128 | ID="SWDIO" | ||
| 129 | Type="PushPull" | ||
| 130 | Level="High" | ||
| 131 | Speed="Maximum" | ||
| 132 | Resistor="PullUp" | ||
| 133 | Mode="Alternate" | ||
| 134 | Alternate="0" /> | ||
| 135 | <pin14 | ||
| 136 | ID="SWCLK" | ||
| 137 | Type="PushPull" | ||
| 138 | Level="High" | ||
| 139 | Speed="Maximum" | ||
| 140 | Resistor="PullDown" | ||
| 141 | Mode="Alternate" | ||
| 142 | Alternate="0" /> | ||
| 143 | <pin15 | ||
| 144 | ID="" | ||
| 145 | Type="PushPull" | ||
| 146 | Level="High" | ||
| 147 | Speed="Maximum" | ||
| 148 | Resistor="PullUp" | ||
| 149 | Mode="Input" | ||
| 150 | Alternate="0" /> | ||
| 151 | </GPIOA> | ||
| 152 | <GPIOB> | ||
| 153 | <pin0 | ||
| 154 | ID="ARD_A3 ADC1_IN8" | ||
| 155 | Type="PushPull" | ||
| 156 | Level="High" | ||
| 157 | Speed="Maximum" | ||
| 158 | Resistor="PullUp" | ||
| 159 | Mode="Input" | ||
| 160 | Alternate="0" /> | ||
| 161 | <pin1 | ||
| 162 | ID="" | ||
| 163 | Type="PushPull" | ||
| 164 | Level="High" | ||
| 165 | Speed="Maximum" | ||
| 166 | Resistor="PullUp" | ||
| 167 | Mode="Input" | ||
| 168 | Alternate="0" /> | ||
| 169 | <pin2 | ||
| 170 | ID="" | ||
| 171 | Type="PushPull" | ||
| 172 | Level="High" | ||
| 173 | Speed="Maximum" | ||
| 174 | Resistor="PullUp" | ||
| 175 | Mode="Input" | ||
| 176 | Alternate="0" /> | ||
| 177 | <pin3 | ||
| 178 | ID="SWO ARD_D3" | ||
| 179 | Type="PushPull" | ||
| 180 | Level="High" | ||
| 181 | Speed="Maximum" | ||
| 182 | Resistor="PullUp" | ||
| 183 | Mode="Alternate" | ||
| 184 | Alternate="0" /> | ||
| 185 | <pin4 | ||
| 186 | ID="ARD_D5" | ||
| 187 | Type="PushPull" | ||
| 188 | Level="High" | ||
| 189 | Speed="Maximum" | ||
| 190 | Resistor="PullUp" | ||
| 191 | Mode="Input" | ||
| 192 | Alternate="0" /> | ||
| 193 | <pin5 | ||
| 194 | ID="ARD_D4" | ||
| 195 | Type="PushPull" | ||
| 196 | Level="High" | ||
| 197 | Speed="Maximum" | ||
| 198 | Resistor="PullUp" | ||
| 199 | Mode="Input" | ||
| 200 | Alternate="0" /> | ||
| 201 | <pin6 | ||
| 202 | ID="ARD_D10" | ||
| 203 | Type="PushPull" | ||
| 204 | Level="High" | ||
| 205 | Speed="Maximum" | ||
| 206 | Resistor="PullUp" | ||
| 207 | Mode="Input" | ||
| 208 | Alternate="0" /> | ||
| 209 | <pin7 | ||
| 210 | ID="" | ||
| 211 | Type="PushPull" | ||
| 212 | Level="High" | ||
| 213 | Speed="Maximum" | ||
| 214 | Resistor="PullUp" | ||
| 215 | Mode="Input" | ||
| 216 | Alternate="0" /> | ||
| 217 | <pin8 | ||
| 218 | ID="ARD_D15" | ||
| 219 | Type="PushPull" | ||
| 220 | Level="High" | ||
| 221 | Speed="Maximum" | ||
| 222 | Resistor="PullUp" | ||
| 223 | Mode="Input" | ||
| 224 | Alternate="0" /> | ||
| 225 | <pin9 | ||
| 226 | ID="ARD_D14" | ||
| 227 | Type="PushPull" | ||
| 228 | Level="High" | ||
| 229 | Speed="Maximum" | ||
| 230 | Resistor="PullUp" | ||
| 231 | Mode="Input" | ||
| 232 | Alternate="0" /> | ||
| 233 | <pin10 | ||
| 234 | ID="ARD_D6" | ||
| 235 | Type="PushPull" | ||
| 236 | Level="High" | ||
| 237 | Speed="Maximum" | ||
| 238 | Resistor="PullUp" | ||
| 239 | Mode="Input" | ||
| 240 | Alternate="0" /> | ||
| 241 | <pin11 | ||
| 242 | ID="" | ||
| 243 | Type="PushPull" | ||
| 244 | Level="High" | ||
| 245 | Speed="Maximum" | ||
| 246 | Resistor="PullUp" | ||
| 247 | Mode="Input" | ||
| 248 | Alternate="0" /> | ||
| 249 | <pin12 | ||
| 250 | ID="" | ||
| 251 | Type="PushPull" | ||
| 252 | Level="High" | ||
| 253 | Speed="Maximum" | ||
| 254 | Resistor="PullUp" | ||
| 255 | Mode="Input" | ||
| 256 | Alternate="0" /> | ||
| 257 | <pin13 | ||
| 258 | ID="" | ||
| 259 | Type="PushPull" | ||
| 260 | Level="High" | ||
| 261 | Speed="Maximum" | ||
| 262 | Resistor="PullUp" | ||
| 263 | Mode="Input" | ||
| 264 | Alternate="0" /> | ||
| 265 | <pin14 | ||
| 266 | ID="" | ||
| 267 | Type="PushPull" | ||
| 268 | Level="High" | ||
| 269 | Speed="Maximum" | ||
| 270 | Resistor="PullUp" | ||
| 271 | Mode="Input" | ||
| 272 | Alternate="0" /> | ||
| 273 | <pin15 | ||
| 274 | ID="" | ||
| 275 | Type="PushPull" | ||
| 276 | Level="High" | ||
| 277 | Speed="Maximum" | ||
| 278 | Resistor="PullUp" | ||
| 279 | Mode="Input" | ||
| 280 | Alternate="0" /> | ||
| 281 | </GPIOB> | ||
| 282 | <GPIOC> | ||
| 283 | <pin0 | ||
| 284 | ID="ARD_A5 ADC1_IN10" | ||
| 285 | Type="PushPull" | ||
| 286 | Level="High" | ||
| 287 | Speed="Maximum" | ||
| 288 | Resistor="PullUp" | ||
| 289 | Mode="Input" | ||
| 290 | Alternate="0" /> | ||
| 291 | <pin1 | ||
| 292 | ID="ARD_A4 ADC1_IN11" | ||
| 293 | Type="PushPull" | ||
| 294 | Level="High" | ||
| 295 | Speed="Maximum" | ||
| 296 | Resistor="PullUp" | ||
| 297 | Mode="Input" | ||
| 298 | Alternate="0" /> | ||
| 299 | <pin2 | ||
| 300 | ID="" | ||
| 301 | Type="PushPull" | ||
| 302 | Level="High" | ||
| 303 | Speed="Maximum" | ||
| 304 | Resistor="PullUp" | ||
| 305 | Mode="Input" | ||
| 306 | Alternate="0" /> | ||
| 307 | <pin3 | ||
| 308 | ID="" | ||
| 309 | Type="PushPull" | ||
| 310 | Level="High" | ||
| 311 | Speed="Maximum" | ||
| 312 | Resistor="PullUp" | ||
| 313 | Mode="Input" | ||
| 314 | Alternate="0" /> | ||
| 315 | <pin4 | ||
| 316 | ID="" | ||
| 317 | Type="PushPull" | ||
| 318 | Level="High" | ||
| 319 | Speed="Maximum" | ||
| 320 | Resistor="PullUp" | ||
| 321 | Mode="Input" | ||
| 322 | Alternate="0" /> | ||
| 323 | <pin5 | ||
| 324 | ID="" | ||
| 325 | Type="PushPull" | ||
| 326 | Level="High" | ||
| 327 | Speed="Maximum" | ||
| 328 | Resistor="PullUp" | ||
| 329 | Mode="Input" | ||
| 330 | Alternate="0" /> | ||
| 331 | <pin6 | ||
| 332 | ID="" | ||
| 333 | Type="PushPull" | ||
| 334 | Level="High" | ||
| 335 | Speed="Maximum" | ||
| 336 | Resistor="PullUp" | ||
| 337 | Mode="Input" | ||
| 338 | Alternate="0" /> | ||
| 339 | <pin7 | ||
| 340 | ID="ARD_D9" | ||
| 341 | Type="PushPull" | ||
| 342 | Level="High" | ||
| 343 | Speed="Maximum" | ||
| 344 | Resistor="PullUp" | ||
| 345 | Mode="Input" | ||
| 346 | Alternate="0" /> | ||
| 347 | <pin8 | ||
| 348 | ID="" | ||
| 349 | Type="PushPull" | ||
| 350 | Level="High" | ||
| 351 | Speed="Maximum" | ||
| 352 | Resistor="PullUp" | ||
| 353 | Mode="Input" | ||
| 354 | Alternate="0" /> | ||
| 355 | <pin9 | ||
| 356 | ID="" | ||
| 357 | Type="PushPull" | ||
| 358 | Level="High" | ||
| 359 | Speed="Maximum" | ||
| 360 | Resistor="PullUp" | ||
| 361 | Mode="Input" | ||
| 362 | Alternate="0" /> | ||
| 363 | <pin10 | ||
| 364 | ID="" | ||
| 365 | Type="PushPull" | ||
| 366 | Level="High" | ||
| 367 | Speed="Maximum" | ||
| 368 | Resistor="PullUp" | ||
| 369 | Mode="Input" | ||
| 370 | Alternate="0" /> | ||
| 371 | <pin11 | ||
| 372 | ID="" | ||
| 373 | Type="PushPull" | ||
| 374 | Level="High" | ||
| 375 | Speed="Maximum" | ||
| 376 | Resistor="PullUp" | ||
| 377 | Mode="Input" | ||
| 378 | Alternate="0" /> | ||
| 379 | <pin12 | ||
| 380 | ID="" | ||
| 381 | Type="PushPull" | ||
| 382 | Level="High" | ||
| 383 | Speed="Maximum" | ||
| 384 | Resistor="PullUp" | ||
| 385 | Mode="Input" | ||
| 386 | Alternate="0" /> | ||
| 387 | <pin13 | ||
| 388 | ID="BUTTON" | ||
| 389 | Type="PushPull" | ||
| 390 | Level="High" | ||
| 391 | Speed="Maximum" | ||
| 392 | Resistor="Floating" | ||
| 393 | Mode="Input" | ||
| 394 | Alternate="0" /> | ||
| 395 | <pin14 | ||
| 396 | ID="OSC32_IN" | ||
| 397 | Type="PushPull" | ||
| 398 | Level="High" | ||
| 399 | Speed="Maximum" | ||
| 400 | Resistor="Floating" | ||
| 401 | Mode="Input" | ||
| 402 | Alternate="0" /> | ||
| 403 | <pin15 | ||
| 404 | ID="OSC32_OUT" | ||
| 405 | Type="PushPull" | ||
| 406 | Level="High" | ||
| 407 | Speed="Maximum" | ||
| 408 | Resistor="Floating" | ||
| 409 | Mode="Input" | ||
| 410 | Alternate="0" /> | ||
| 411 | </GPIOC> | ||
| 412 | <GPIOD> | ||
| 413 | <pin0 | ||
| 414 | ID="" | ||
| 415 | Type="PushPull" | ||
| 416 | Level="High" | ||
| 417 | Speed="Maximum" | ||
| 418 | Resistor="PullUp" | ||
| 419 | Mode="Input" | ||
| 420 | Alternate="0" /> | ||
| 421 | <pin1 | ||
| 422 | ID="" | ||
| 423 | Type="PushPull" | ||
| 424 | Level="High" | ||
| 425 | Speed="Maximum" | ||
| 426 | Resistor="PullUp" | ||
| 427 | Mode="Input" | ||
| 428 | Alternate="0" /> | ||
| 429 | <pin2 | ||
| 430 | ID="" | ||
| 431 | Type="PushPull" | ||
| 432 | Level="High" | ||
| 433 | Speed="Maximum" | ||
| 434 | Resistor="PullUp" | ||
| 435 | Mode="Input" | ||
| 436 | Alternate="0" /> | ||
| 437 | <pin3 | ||
| 438 | ID="" | ||
| 439 | Type="PushPull" | ||
| 440 | Level="High" | ||
| 441 | Speed="Maximum" | ||
| 442 | Resistor="PullUp" | ||
| 443 | Mode="Input" | ||
| 444 | Alternate="0" /> | ||
| 445 | <pin4 | ||
| 446 | ID="" | ||
| 447 | Type="PushPull" | ||
| 448 | Level="High" | ||
| 449 | Speed="Maximum" | ||
| 450 | Resistor="PullUp" | ||
| 451 | Mode="Input" | ||
| 452 | Alternate="0" /> | ||
| 453 | <pin5 | ||
| 454 | ID="" | ||
| 455 | Type="PushPull" | ||
| 456 | Level="High" | ||
| 457 | Speed="Maximum" | ||
| 458 | Resistor="PullUp" | ||
| 459 | Mode="Input" | ||
| 460 | Alternate="0" /> | ||
| 461 | <pin6 | ||
| 462 | ID="" | ||
| 463 | Type="PushPull" | ||
| 464 | Level="High" | ||
| 465 | Speed="Maximum" | ||
| 466 | Resistor="PullUp" | ||
| 467 | Mode="Input" | ||
| 468 | Alternate="0" /> | ||
| 469 | <pin7 | ||
| 470 | ID="" | ||
| 471 | Type="PushPull" | ||
| 472 | Level="High" | ||
| 473 | Speed="Maximum" | ||
| 474 | Resistor="PullUp" | ||
| 475 | Mode="Input" | ||
| 476 | Alternate="0" /> | ||
| 477 | <pin8 | ||
| 478 | ID="" | ||
| 479 | Type="PushPull" | ||
| 480 | Level="High" | ||
| 481 | Speed="Maximum" | ||
| 482 | Resistor="PullUp" | ||
| 483 | Mode="Input" | ||
| 484 | Alternate="0" /> | ||
| 485 | <pin9 | ||
| 486 | ID="" | ||
| 487 | Type="PushPull" | ||
| 488 | Level="High" | ||
| 489 | Speed="Maximum" | ||
| 490 | Resistor="PullUp" | ||
| 491 | Mode="Input" | ||
| 492 | Alternate="0" /> | ||
| 493 | <pin10 | ||
| 494 | ID="" | ||
| 495 | Type="PushPull" | ||
| 496 | Level="High" | ||
| 497 | Speed="Maximum" | ||
| 498 | Resistor="PullUp" | ||
| 499 | Mode="Input" | ||
| 500 | Alternate="0" /> | ||
| 501 | <pin11 | ||
| 502 | ID="" | ||
| 503 | Type="PushPull" | ||
| 504 | Level="High" | ||
| 505 | Speed="Maximum" | ||
| 506 | Resistor="PullUp" | ||
| 507 | Mode="Input" | ||
| 508 | Alternate="0" /> | ||
| 509 | <pin12 | ||
| 510 | ID="" | ||
| 511 | Type="PushPull" | ||
| 512 | Level="High" | ||
| 513 | Speed="Maximum" | ||
| 514 | Resistor="PullUp" | ||
| 515 | Mode="Input" | ||
| 516 | Alternate="0" /> | ||
| 517 | <pin13 | ||
| 518 | ID="" | ||
| 519 | Type="PushPull" | ||
| 520 | Level="High" | ||
| 521 | Speed="Maximum" | ||
| 522 | Resistor="PullUp" | ||
| 523 | Mode="Input" | ||
| 524 | Alternate="0" /> | ||
| 525 | <pin14 | ||
| 526 | ID="" | ||
| 527 | Type="PushPull" | ||
| 528 | Level="High" | ||
| 529 | Speed="Maximum" | ||
| 530 | Resistor="PullUp" | ||
| 531 | Mode="Input" | ||
| 532 | Alternate="0" /> | ||
| 533 | <pin15 | ||
| 534 | ID="" | ||
| 535 | Type="PushPull" | ||
| 536 | Level="High" | ||
| 537 | Speed="Maximum" | ||
| 538 | Resistor="PullUp" | ||
| 539 | Mode="Input" | ||
| 540 | Alternate="0" /> | ||
| 541 | </GPIOD> | ||
| 542 | <GPIOE> | ||
| 543 | <pin0 | ||
| 544 | ID="" | ||
| 545 | Type="PushPull" | ||
| 546 | Level="High" | ||
| 547 | Speed="Maximum" | ||
| 548 | Resistor="PullUp" | ||
| 549 | Mode="Input" | ||
| 550 | Alternate="0" /> | ||
| 551 | <pin1 | ||
| 552 | ID="" | ||
| 553 | Type="PushPull" | ||
| 554 | Level="High" | ||
| 555 | Speed="Maximum" | ||
| 556 | Resistor="PullUp" | ||
| 557 | Mode="Input" | ||
| 558 | Alternate="0" /> | ||
| 559 | <pin2 | ||
| 560 | ID="" | ||
| 561 | Type="PushPull" | ||
| 562 | Level="High" | ||
| 563 | Speed="Maximum" | ||
| 564 | Resistor="PullUp" | ||
| 565 | Mode="Input" | ||
| 566 | Alternate="0" /> | ||
| 567 | <pin3 | ||
| 568 | ID="" | ||
| 569 | Type="PushPull" | ||
| 570 | Level="High" | ||
| 571 | Speed="Maximum" | ||
| 572 | Resistor="PullUp" | ||
| 573 | Mode="Input" | ||
| 574 | Alternate="0" /> | ||
| 575 | <pin4 | ||
| 576 | ID="" | ||
| 577 | Type="PushPull" | ||
| 578 | Level="High" | ||
| 579 | Speed="Maximum" | ||
| 580 | Resistor="PullUp" | ||
| 581 | Mode="Input" | ||
| 582 | Alternate="0" /> | ||
| 583 | <pin5 | ||
| 584 | ID="" | ||
| 585 | Type="PushPull" | ||
| 586 | Level="High" | ||
| 587 | Speed="Maximum" | ||
| 588 | Resistor="PullUp" | ||
| 589 | Mode="Input" | ||
| 590 | Alternate="0" /> | ||
| 591 | <pin6 | ||
| 592 | ID="" | ||
| 593 | Type="PushPull" | ||
| 594 | Level="High" | ||
| 595 | Speed="Maximum" | ||
| 596 | Resistor="PullUp" | ||
| 597 | Mode="Input" | ||
| 598 | Alternate="0" /> | ||
| 599 | <pin7 | ||
| 600 | ID="" | ||
| 601 | Type="PushPull" | ||
| 602 | Level="High" | ||
| 603 | Speed="Maximum" | ||
| 604 | Resistor="PullUp" | ||
| 605 | Mode="Input" | ||
| 606 | Alternate="0" /> | ||
| 607 | <pin8 | ||
| 608 | ID="" | ||
| 609 | Type="PushPull" | ||
| 610 | Level="High" | ||
| 611 | Speed="Maximum" | ||
| 612 | Resistor="PullUp" | ||
| 613 | Mode="Input" | ||
| 614 | Alternate="0" /> | ||
| 615 | <pin9 | ||
| 616 | ID="" | ||
| 617 | Type="PushPull" | ||
| 618 | Level="High" | ||
| 619 | Speed="Maximum" | ||
| 620 | Resistor="PullUp" | ||
| 621 | Mode="Input" | ||
| 622 | Alternate="0" /> | ||
| 623 | <pin10 | ||
| 624 | ID="" | ||
| 625 | Type="PushPull" | ||
| 626 | Level="High" | ||
| 627 | Speed="Maximum" | ||
| 628 | Resistor="PullUp" | ||
| 629 | Mode="Input" | ||
| 630 | Alternate="0" /> | ||
| 631 | <pin11 | ||
| 632 | ID="" | ||
| 633 | Type="PushPull" | ||
| 634 | Level="High" | ||
| 635 | Speed="Maximum" | ||
| 636 | Resistor="PullUp" | ||
| 637 | Mode="Input" | ||
| 638 | Alternate="0" /> | ||
| 639 | <pin12 | ||
| 640 | ID="" | ||
| 641 | Type="PushPull" | ||
| 642 | Level="High" | ||
| 643 | Speed="Maximum" | ||
| 644 | Resistor="PullUp" | ||
| 645 | Mode="Input" | ||
| 646 | Alternate="0" /> | ||
| 647 | <pin13 | ||
| 648 | ID="" | ||
| 649 | Type="PushPull" | ||
| 650 | Level="High" | ||
| 651 | Speed="Maximum" | ||
| 652 | Resistor="PullUp" | ||
| 653 | Mode="Input" | ||
| 654 | Alternate="0" /> | ||
| 655 | <pin14 | ||
| 656 | ID="" | ||
| 657 | Type="PushPull" | ||
| 658 | Level="High" | ||
| 659 | Speed="Maximum" | ||
| 660 | Resistor="PullUp" | ||
| 661 | Mode="Input" | ||
| 662 | Alternate="0" /> | ||
| 663 | <pin15 | ||
| 664 | ID="" | ||
| 665 | Type="PushPull" | ||
| 666 | Level="High" | ||
| 667 | Speed="Maximum" | ||
| 668 | Resistor="PullUp" | ||
| 669 | Mode="Input" | ||
| 670 | Alternate="0" /> | ||
| 671 | </GPIOE> | ||
| 672 | <GPIOF> | ||
| 673 | <pin0 | ||
| 674 | ID="" | ||
| 675 | Type="PushPull" | ||
| 676 | Level="High" | ||
| 677 | Speed="Maximum" | ||
| 678 | Resistor="PullUp" | ||
| 679 | Mode="Input" | ||
| 680 | Alternate="0" /> | ||
| 681 | <pin1 | ||
| 682 | ID="" | ||
| 683 | Type="PushPull" | ||
| 684 | Level="High" | ||
| 685 | Speed="Maximum" | ||
| 686 | Resistor="PullUp" | ||
| 687 | Mode="Input" | ||
| 688 | Alternate="0" /> | ||
| 689 | <pin2 | ||
| 690 | ID="" | ||
| 691 | Type="PushPull" | ||
| 692 | Level="High" | ||
| 693 | Speed="Maximum" | ||
| 694 | Resistor="PullUp" | ||
| 695 | Mode="Input" | ||
| 696 | Alternate="0" /> | ||
| 697 | <pin3 | ||
| 698 | ID="" | ||
| 699 | Type="PushPull" | ||
| 700 | Level="High" | ||
| 701 | Speed="Maximum" | ||
| 702 | Resistor="PullUp" | ||
| 703 | Mode="Input" | ||
| 704 | Alternate="0" /> | ||
| 705 | <pin4 | ||
| 706 | ID="" | ||
| 707 | Type="PushPull" | ||
| 708 | Level="High" | ||
| 709 | Speed="Maximum" | ||
| 710 | Resistor="PullUp" | ||
| 711 | Mode="Input" | ||
| 712 | Alternate="0" /> | ||
| 713 | <pin5 | ||
| 714 | ID="" | ||
| 715 | Type="PushPull" | ||
| 716 | Level="High" | ||
| 717 | Speed="Maximum" | ||
| 718 | Resistor="PullUp" | ||
| 719 | Mode="Input" | ||
| 720 | Alternate="0" /> | ||
| 721 | <pin6 | ||
| 722 | ID="" | ||
| 723 | Type="PushPull" | ||
| 724 | Level="High" | ||
| 725 | Speed="Maximum" | ||
| 726 | Resistor="PullUp" | ||
| 727 | Mode="Input" | ||
| 728 | Alternate="0" /> | ||
| 729 | <pin7 | ||
| 730 | ID="" | ||
| 731 | Type="PushPull" | ||
| 732 | Level="High" | ||
| 733 | Speed="Maximum" | ||
| 734 | Resistor="PullUp" | ||
| 735 | Mode="Input" | ||
| 736 | Alternate="0" /> | ||
| 737 | <pin8 | ||
| 738 | ID="" | ||
| 739 | Type="PushPull" | ||
| 740 | Level="High" | ||
| 741 | Speed="Maximum" | ||
| 742 | Resistor="PullUp" | ||
| 743 | Mode="Input" | ||
| 744 | Alternate="0" /> | ||
| 745 | <pin9 | ||
| 746 | ID="" | ||
| 747 | Type="PushPull" | ||
| 748 | Level="High" | ||
| 749 | Speed="Maximum" | ||
| 750 | Resistor="PullUp" | ||
| 751 | Mode="Input" | ||
| 752 | Alternate="0" /> | ||
| 753 | <pin10 | ||
| 754 | ID="" | ||
| 755 | Type="PushPull" | ||
| 756 | Level="High" | ||
| 757 | Speed="Maximum" | ||
| 758 | Resistor="PullUp" | ||
| 759 | Mode="Input" | ||
| 760 | Alternate="0" /> | ||
| 761 | <pin11 | ||
| 762 | ID="" | ||
| 763 | Type="PushPull" | ||
| 764 | Level="High" | ||
| 765 | Speed="Maximum" | ||
| 766 | Resistor="PullUp" | ||
| 767 | Mode="Input" | ||
| 768 | Alternate="0" /> | ||
| 769 | <pin12 | ||
| 770 | ID="" | ||
| 771 | Type="PushPull" | ||
| 772 | Level="High" | ||
| 773 | Speed="Maximum" | ||
| 774 | Resistor="PullUp" | ||
| 775 | Mode="Input" | ||
| 776 | Alternate="0" /> | ||
| 777 | <pin13 | ||
| 778 | ID="" | ||
| 779 | Type="PushPull" | ||
| 780 | Level="High" | ||
| 781 | Speed="Maximum" | ||
| 782 | Resistor="PullUp" | ||
| 783 | Mode="Input" | ||
| 784 | Alternate="0" /> | ||
| 785 | <pin14 | ||
| 786 | ID="" | ||
| 787 | Type="PushPull" | ||
| 788 | Level="High" | ||
| 789 | Speed="Maximum" | ||
| 790 | Resistor="PullUp" | ||
| 791 | Mode="Input" | ||
| 792 | Alternate="0" /> | ||
| 793 | <pin15 | ||
| 794 | ID="" | ||
| 795 | Type="PushPull" | ||
| 796 | Level="High" | ||
| 797 | Speed="Maximum" | ||
| 798 | Resistor="PullUp" | ||
| 799 | Mode="Input" | ||
| 800 | Alternate="0" /> | ||
| 801 | </GPIOF> | ||
| 802 | <GPIOG> | ||
| 803 | <pin0 | ||
| 804 | ID="" | ||
| 805 | Type="PushPull" | ||
| 806 | Level="High" | ||
| 807 | Speed="Maximum" | ||
| 808 | Resistor="PullUp" | ||
| 809 | Mode="Input" | ||
| 810 | Alternate="0" /> | ||
| 811 | <pin1 | ||
| 812 | ID="" | ||
| 813 | Type="PushPull" | ||
| 814 | Level="High" | ||
| 815 | Speed="Maximum" | ||
| 816 | Resistor="PullUp" | ||
| 817 | Mode="Input" | ||
| 818 | Alternate="0" /> | ||
| 819 | <pin2 | ||
| 820 | ID="" | ||
| 821 | Type="PushPull" | ||
| 822 | Level="High" | ||
| 823 | Speed="Maximum" | ||
| 824 | Resistor="PullUp" | ||
| 825 | Mode="Input" | ||
| 826 | Alternate="0" /> | ||
| 827 | <pin3 | ||
| 828 | ID="" | ||
| 829 | Type="PushPull" | ||
| 830 | Level="High" | ||
| 831 | Speed="Maximum" | ||
| 832 | Resistor="PullUp" | ||
| 833 | Mode="Input" | ||
| 834 | Alternate="0" /> | ||
| 835 | <pin4 | ||
| 836 | ID="" | ||
| 837 | Type="PushPull" | ||
| 838 | Level="High" | ||
| 839 | Speed="Maximum" | ||
| 840 | Resistor="PullUp" | ||
| 841 | Mode="Input" | ||
| 842 | Alternate="0" /> | ||
| 843 | <pin5 | ||
| 844 | ID="" | ||
| 845 | Type="PushPull" | ||
| 846 | Level="High" | ||
| 847 | Speed="Maximum" | ||
| 848 | Resistor="PullUp" | ||
| 849 | Mode="Input" | ||
| 850 | Alternate="0" /> | ||
| 851 | <pin6 | ||
| 852 | ID="" | ||
| 853 | Type="PushPull" | ||
| 854 | Level="High" | ||
| 855 | Speed="Maximum" | ||
| 856 | Resistor="PullUp" | ||
| 857 | Mode="Input" | ||
| 858 | Alternate="0" /> | ||
| 859 | <pin7 | ||
| 860 | ID="" | ||
| 861 | Type="PushPull" | ||
| 862 | Level="High" | ||
| 863 | Speed="Maximum" | ||
| 864 | Resistor="PullUp" | ||
| 865 | Mode="Input" | ||
| 866 | Alternate="0" /> | ||
| 867 | <pin8 | ||
| 868 | ID="" | ||
| 869 | Type="PushPull" | ||
| 870 | Level="High" | ||
| 871 | Speed="Maximum" | ||
| 872 | Resistor="PullUp" | ||
| 873 | Mode="Input" | ||
| 874 | Alternate="0" /> | ||
| 875 | <pin9 | ||
| 876 | ID="" | ||
| 877 | Type="PushPull" | ||
| 878 | Level="High" | ||
| 879 | Speed="Maximum" | ||
| 880 | Resistor="PullUp" | ||
| 881 | Mode="Input" | ||
| 882 | Alternate="0" /> | ||
| 883 | <pin10 | ||
| 884 | ID="" | ||
| 885 | Type="PushPull" | ||
| 886 | Level="High" | ||
| 887 | Speed="Maximum" | ||
| 888 | Resistor="PullUp" | ||
| 889 | Mode="Input" | ||
| 890 | Alternate="0" /> | ||
| 891 | <pin11 | ||
| 892 | ID="" | ||
| 893 | Type="PushPull" | ||
| 894 | Level="High" | ||
| 895 | Speed="Maximum" | ||
| 896 | Resistor="PullUp" | ||
| 897 | Mode="Input" | ||
| 898 | Alternate="0" /> | ||
| 899 | <pin12 | ||
| 900 | ID="" | ||
| 901 | Type="PushPull" | ||
| 902 | Level="High" | ||
| 903 | Speed="Maximum" | ||
| 904 | Resistor="PullUp" | ||
| 905 | Mode="Input" | ||
| 906 | Alternate="0" /> | ||
| 907 | <pin13 | ||
| 908 | ID="" | ||
| 909 | Type="PushPull" | ||
| 910 | Level="High" | ||
| 911 | Speed="Maximum" | ||
| 912 | Resistor="PullUp" | ||
| 913 | Mode="Input" | ||
| 914 | Alternate="0" /> | ||
| 915 | <pin14 | ||
| 916 | ID="" | ||
| 917 | Type="PushPull" | ||
| 918 | Level="High" | ||
| 919 | Speed="Maximum" | ||
| 920 | Resistor="PullUp" | ||
| 921 | Mode="Input" | ||
| 922 | Alternate="0" /> | ||
| 923 | <pin15 | ||
| 924 | ID="" | ||
| 925 | Type="PushPull" | ||
| 926 | Level="High" | ||
| 927 | Speed="Maximum" | ||
| 928 | Resistor="PullUp" | ||
| 929 | Mode="Input" | ||
| 930 | Alternate="0" /> | ||
| 931 | </GPIOG> | ||
| 932 | <GPIOH> | ||
| 933 | <pin0 | ||
| 934 | ID="OSC_IN" | ||
| 935 | Type="PushPull" | ||
| 936 | Level="High" | ||
| 937 | Speed="Maximum" | ||
| 938 | Resistor="Floating" | ||
| 939 | Mode="Input" | ||
| 940 | Alternate="0" /> | ||
| 941 | <pin1 | ||
| 942 | ID="OSC_OUT" | ||
| 943 | Type="PushPull" | ||
| 944 | Level="High" | ||
| 945 | Speed="Maximum" | ||
| 946 | Resistor="Floating" | ||
| 947 | Mode="Input" | ||
| 948 | Alternate="0" /> | ||
| 949 | <pin2 | ||
| 950 | ID="" | ||
| 951 | Type="PushPull" | ||
| 952 | Level="High" | ||
| 953 | Speed="Maximum" | ||
| 954 | Resistor="PullUp" | ||
| 955 | Mode="Input" | ||
| 956 | Alternate="0" /> | ||
| 957 | <pin3 | ||
| 958 | ID="" | ||
| 959 | Type="PushPull" | ||
| 960 | Level="High" | ||
| 961 | Speed="Maximum" | ||
| 962 | Resistor="PullUp" | ||
| 963 | Mode="Input" | ||
| 964 | Alternate="0" /> | ||
| 965 | <pin4 | ||
| 966 | ID="" | ||
| 967 | Type="PushPull" | ||
| 968 | Level="High" | ||
| 969 | Speed="Maximum" | ||
| 970 | Resistor="PullUp" | ||
| 971 | Mode="Input" | ||
| 972 | Alternate="0" /> | ||
| 973 | <pin5 | ||
| 974 | ID="" | ||
| 975 | Type="PushPull" | ||
| 976 | Level="High" | ||
| 977 | Speed="Maximum" | ||
| 978 | Resistor="PullUp" | ||
| 979 | Mode="Input" | ||
| 980 | Alternate="0" /> | ||
| 981 | <pin6 | ||
| 982 | ID="" | ||
| 983 | Type="PushPull" | ||
| 984 | Level="High" | ||
| 985 | Speed="Maximum" | ||
| 986 | Resistor="PullUp" | ||
| 987 | Mode="Input" | ||
| 988 | Alternate="0" /> | ||
| 989 | <pin7 | ||
| 990 | ID="" | ||
| 991 | Type="PushPull" | ||
| 992 | Level="High" | ||
| 993 | Speed="Maximum" | ||
| 994 | Resistor="PullUp" | ||
| 995 | Mode="Input" | ||
| 996 | Alternate="0" /> | ||
| 997 | <pin8 | ||
| 998 | ID="" | ||
| 999 | Type="PushPull" | ||
| 1000 | Level="High" | ||
| 1001 | Speed="Maximum" | ||
| 1002 | Resistor="PullUp" | ||
| 1003 | Mode="Input" | ||
| 1004 | Alternate="0" /> | ||
| 1005 | <pin9 | ||
| 1006 | ID="" | ||
| 1007 | Type="PushPull" | ||
| 1008 | Level="High" | ||
| 1009 | Speed="Maximum" | ||
| 1010 | Resistor="PullUp" | ||
| 1011 | Mode="Input" | ||
| 1012 | Alternate="0" /> | ||
| 1013 | <pin10 | ||
| 1014 | ID="" | ||
| 1015 | Type="PushPull" | ||
| 1016 | Level="High" | ||
| 1017 | Speed="Maximum" | ||
| 1018 | Resistor="PullUp" | ||
| 1019 | Mode="Input" | ||
| 1020 | Alternate="0" /> | ||
| 1021 | <pin11 | ||
| 1022 | ID="" | ||
| 1023 | Type="PushPull" | ||
| 1024 | Level="High" | ||
| 1025 | Speed="Maximum" | ||
| 1026 | Resistor="PullUp" | ||
| 1027 | Mode="Input" | ||
| 1028 | Alternate="0" /> | ||
| 1029 | <pin12 | ||
| 1030 | ID="" | ||
| 1031 | Type="PushPull" | ||
| 1032 | Level="High" | ||
| 1033 | Speed="Maximum" | ||
| 1034 | Resistor="PullUp" | ||
| 1035 | Mode="Input" | ||
| 1036 | Alternate="0" /> | ||
| 1037 | <pin13 | ||
| 1038 | ID="" | ||
| 1039 | Type="PushPull" | ||
| 1040 | Level="High" | ||
| 1041 | Speed="Maximum" | ||
| 1042 | Resistor="PullUp" | ||
| 1043 | Mode="Input" | ||
| 1044 | Alternate="0" /> | ||
| 1045 | <pin14 | ||
| 1046 | ID="" | ||
| 1047 | Type="PushPull" | ||
| 1048 | Level="High" | ||
| 1049 | Speed="Maximum" | ||
| 1050 | Resistor="PullUp" | ||
| 1051 | Mode="Input" | ||
| 1052 | Alternate="0" /> | ||
| 1053 | <pin15 | ||
| 1054 | ID="" | ||
| 1055 | Type="PushPull" | ||
| 1056 | Level="High" | ||
| 1057 | Speed="Maximum" | ||
| 1058 | Resistor="PullUp" | ||
| 1059 | Mode="Input" | ||
| 1060 | Alternate="0" /> | ||
| 1061 | </GPIOH> | ||
| 1062 | <GPIOI> | ||
| 1063 | <pin0 | ||
| 1064 | ID="" | ||
| 1065 | Type="PushPull" | ||
| 1066 | Level="High" | ||
| 1067 | Speed="Maximum" | ||
| 1068 | Resistor="PullUp" | ||
| 1069 | Mode="Input" | ||
| 1070 | Alternate="0" /> | ||
| 1071 | <pin1 | ||
| 1072 | ID="" | ||
| 1073 | Type="PushPull" | ||
| 1074 | Level="High" | ||
| 1075 | Speed="Maximum" | ||
| 1076 | Resistor="PullUp" | ||
| 1077 | Mode="Input" | ||
| 1078 | Alternate="0" /> | ||
| 1079 | <pin2 | ||
| 1080 | ID="" | ||
| 1081 | Type="PushPull" | ||
| 1082 | Level="High" | ||
| 1083 | Speed="Maximum" | ||
| 1084 | Resistor="PullUp" | ||
| 1085 | Mode="Input" | ||
| 1086 | Alternate="0" /> | ||
| 1087 | <pin3 | ||
| 1088 | ID="" | ||
| 1089 | Type="PushPull" | ||
| 1090 | Level="High" | ||
| 1091 | Speed="Maximum" | ||
| 1092 | Resistor="PullUp" | ||
| 1093 | Mode="Input" | ||
| 1094 | Alternate="0" /> | ||
| 1095 | <pin4 | ||
| 1096 | ID="" | ||
| 1097 | Type="PushPull" | ||
| 1098 | Level="High" | ||
| 1099 | Speed="Maximum" | ||
| 1100 | Resistor="PullUp" | ||
| 1101 | Mode="Input" | ||
| 1102 | Alternate="0" /> | ||
| 1103 | <pin5 | ||
| 1104 | ID="" | ||
| 1105 | Type="PushPull" | ||
| 1106 | Level="High" | ||
| 1107 | Speed="Maximum" | ||
| 1108 | Resistor="PullUp" | ||
| 1109 | Mode="Input" | ||
| 1110 | Alternate="0" /> | ||
| 1111 | <pin6 | ||
| 1112 | ID="" | ||
| 1113 | Type="PushPull" | ||
| 1114 | Level="High" | ||
| 1115 | Speed="Maximum" | ||
| 1116 | Resistor="PullUp" | ||
| 1117 | Mode="Input" | ||
| 1118 | Alternate="0" /> | ||
| 1119 | <pin7 | ||
| 1120 | ID="" | ||
| 1121 | Type="PushPull" | ||
| 1122 | Level="High" | ||
| 1123 | Speed="Maximum" | ||
| 1124 | Resistor="PullUp" | ||
| 1125 | Mode="Input" | ||
| 1126 | Alternate="0" /> | ||
| 1127 | <pin8 | ||
| 1128 | ID="" | ||
| 1129 | Type="PushPull" | ||
| 1130 | Level="High" | ||
| 1131 | Speed="Maximum" | ||
| 1132 | Resistor="PullUp" | ||
| 1133 | Mode="Input" | ||
| 1134 | Alternate="0" /> | ||
| 1135 | <pin9 | ||
| 1136 | ID="" | ||
| 1137 | Type="PushPull" | ||
| 1138 | Level="High" | ||
| 1139 | Speed="Maximum" | ||
| 1140 | Resistor="PullUp" | ||
| 1141 | Mode="Input" | ||
| 1142 | Alternate="0" /> | ||
| 1143 | <pin10 | ||
| 1144 | ID="" | ||
| 1145 | Type="PushPull" | ||
| 1146 | Level="High" | ||
| 1147 | Speed="Maximum" | ||
| 1148 | Resistor="PullUp" | ||
| 1149 | Mode="Input" | ||
| 1150 | Alternate="0" /> | ||
| 1151 | <pin11 | ||
| 1152 | ID="" | ||
| 1153 | Type="PushPull" | ||
| 1154 | Level="High" | ||
| 1155 | Speed="Maximum" | ||
| 1156 | Resistor="PullUp" | ||
| 1157 | Mode="Input" | ||
| 1158 | Alternate="0" /> | ||
| 1159 | <pin12 | ||
| 1160 | ID="" | ||
| 1161 | Type="PushPull" | ||
| 1162 | Level="High" | ||
| 1163 | Speed="Maximum" | ||
| 1164 | Resistor="PullUp" | ||
| 1165 | Mode="Input" | ||
| 1166 | Alternate="0" /> | ||
| 1167 | <pin13 | ||
| 1168 | ID="" | ||
| 1169 | Type="PushPull" | ||
| 1170 | Level="High" | ||
| 1171 | Speed="Maximum" | ||
| 1172 | Resistor="PullUp" | ||
| 1173 | Mode="Input" | ||
| 1174 | Alternate="0" /> | ||
| 1175 | <pin14 | ||
| 1176 | ID="" | ||
| 1177 | Type="PushPull" | ||
| 1178 | Level="High" | ||
| 1179 | Speed="Maximum" | ||
| 1180 | Resistor="PullUp" | ||
| 1181 | Mode="Input" | ||
| 1182 | Alternate="0" /> | ||
| 1183 | <pin15 | ||
| 1184 | ID="" | ||
| 1185 | Type="PushPull" | ||
| 1186 | Level="High" | ||
| 1187 | Speed="Maximum" | ||
| 1188 | Resistor="PullUp" | ||
| 1189 | Mode="Input" | ||
| 1190 | Alternate="0" /> | ||
| 1191 | </GPIOI> | ||
| 1192 | </ports> | ||
| 1193 | </board> | ||
diff --git a/drivers/boards/BLACKPILL_STM32_F411/cfg/board.fmpp b/drivers/boards/BLACKPILL_STM32_F411/cfg/board.fmpp deleted file mode 100644 index 41754c141..000000000 --- a/drivers/boards/BLACKPILL_STM32_F411/cfg/board.fmpp +++ /dev/null | |||
| @@ -1,15 +0,0 @@ | |||
| 1 | sourceRoot: ../../../../../tools/ftl/processors/boards/stm32f4xx/templates | ||
| 2 | outputRoot: .. | ||
| 3 | dataRoot: . | ||
| 4 | |||
| 5 | freemarkerLinks: { | ||
| 6 | lib: ../../../../../tools/ftl/libs | ||
| 7 | } | ||
| 8 | |||
| 9 | data : { | ||
| 10 | doc1:xml ( | ||
| 11 | board.chcfg | ||
| 12 | { | ||
| 13 | } | ||
| 14 | ) | ||
| 15 | } | ||
diff --git a/drivers/boards/GENERIC_STM32_F072XB/cfg/board.chcfg b/drivers/boards/GENERIC_STM32_F072XB/cfg/board.chcfg deleted file mode 100644 index e6ceecb62..000000000 --- a/drivers/boards/GENERIC_STM32_F072XB/cfg/board.chcfg +++ /dev/null | |||
| @@ -1,703 +0,0 @@ | |||
| 1 | <?xml version="1.0" encoding="UTF-8"?> | ||
| 2 | <!-- STM32F0xx board Template --> | ||
| 3 | <board | ||
| 4 | xmlns:xsi="http://www.w3.org/2001/XMLSchema-instance" | ||
| 5 | xsi:noNamespaceSchemaLocation="http://www.chibios.org/xml/schema/boards/stm32f0xx_board.xsd"> | ||
| 6 | <configuration_settings> | ||
| 7 | <templates_path>resources/gencfg/processors/boards/stm32f0xx/templates</templates_path> | ||
| 8 | <output_path>..</output_path> | ||
| 9 | <hal_version>5.0.x</hal_version> | ||
| 10 | </configuration_settings> | ||
| 11 | <board_name>ST STM32F072B-Discovery</board_name> | ||
| 12 | <board_id>ST_STM32F072B_DISCOVERY</board_id> | ||
| 13 | <board_functions></board_functions> | ||
| 14 | <subtype>STM32F072xB</subtype> | ||
| 15 | <clocks HSEFrequency="0" HSEBypass="true" LSEFrequency="0" | ||
| 16 | LSEBypass="false" LSEDrive="3 High Drive (default)" /> | ||
| 17 | <ports> | ||
| 18 | <GPIOA> | ||
| 19 | <pin0 | ||
| 20 | ID="BUTTON" | ||
| 21 | Type="PushPull" | ||
| 22 | Speed="Minimum" | ||
| 23 | Resistor="Floating" | ||
| 24 | Level="High" | ||
| 25 | Mode="Input" | ||
| 26 | Alternate="0" /> | ||
| 27 | <pin1 | ||
| 28 | ID="" | ||
| 29 | Type="PushPull" | ||
| 30 | Speed="Minimum" | ||
| 31 | Resistor="PullUp" | ||
| 32 | Level="High" | ||
| 33 | Mode="Input" | ||
| 34 | Alternate="0" /> | ||
| 35 | <pin2 | ||
| 36 | ID="" | ||
| 37 | Type="PushPull" | ||
| 38 | Speed="Minimum" | ||
| 39 | Resistor="PullUp" | ||
| 40 | Level="High" | ||
| 41 | Mode="Input" | ||
| 42 | Alternate="0" /> | ||
| 43 | <pin3 | ||
| 44 | ID="" | ||
| 45 | Type="PushPull" | ||
| 46 | Speed="Minimum" | ||
| 47 | Resistor="PullUp" | ||
| 48 | Level="High" | ||
| 49 | Mode="Input" | ||
| 50 | Alternate="0" /> | ||
| 51 | <pin4 | ||
| 52 | ID="" | ||
| 53 | Type="PushPull" | ||
| 54 | Speed="Minimum" | ||
| 55 | Resistor="PullUp" | ||
| 56 | Level="High" | ||
| 57 | Mode="Input" | ||
| 58 | Alternate="0" /> | ||
| 59 | <pin5 | ||
| 60 | ID="" | ||
| 61 | Type="PushPull" | ||
| 62 | Speed="Minimum" | ||
| 63 | Resistor="PullUp" | ||
| 64 | Level="High" | ||
| 65 | Mode="Input" | ||
| 66 | Alternate="0" /> | ||
| 67 | <pin6 | ||
| 68 | ID="" | ||
| 69 | Type="PushPull" | ||
| 70 | Speed="Minimum" | ||
| 71 | Resistor="PullUp" | ||
| 72 | Level="High" | ||
| 73 | Mode="Input" | ||
| 74 | Alternate="0" /> | ||
| 75 | <pin7 | ||
| 76 | ID="" | ||
| 77 | Type="PushPull" | ||
| 78 | Speed="Minimum" | ||
| 79 | Resistor="PullUp" | ||
| 80 | Level="High" | ||
| 81 | Mode="Input" | ||
| 82 | Alternate="0" /> | ||
| 83 | <pin8 | ||
| 84 | ID="" | ||
| 85 | Type="PushPull" | ||
| 86 | Speed="Minimum" | ||
| 87 | Resistor="PullUp" | ||
| 88 | Level="High" | ||
| 89 | Mode="Input" | ||
| 90 | Alternate="0" /> | ||
| 91 | <pin9 | ||
| 92 | ID="" | ||
| 93 | Type="PushPull" | ||
| 94 | Speed="Minimum" | ||
| 95 | Resistor="PullUp" | ||
| 96 | Level="High" | ||
| 97 | Mode="Input" | ||
| 98 | Alternate="0" /> | ||
| 99 | <pin10 | ||
| 100 | ID="" | ||
| 101 | Type="PushPull" | ||
| 102 | Speed="Minimum" | ||
| 103 | Resistor="PullUp" | ||
| 104 | Level="High" | ||
| 105 | Mode="Input" | ||
| 106 | Alternate="0" /> | ||
| 107 | <pin11 | ||
| 108 | ID="USB_DM" | ||
| 109 | Type="PushPull" | ||
| 110 | Speed="Minimum" | ||
| 111 | Resistor="Floating" | ||
| 112 | Level="High" | ||
| 113 | Mode="Input" | ||
| 114 | Alternate="0" /> | ||
| 115 | <pin12 | ||
| 116 | ID="USB_DP" | ||
| 117 | Type="PushPull" | ||
| 118 | Speed="Minimum" | ||
| 119 | Resistor="Floating" | ||
| 120 | Level="High" | ||
| 121 | Mode="Input" | ||
| 122 | Alternate="0" /> | ||
| 123 | <pin13 | ||
| 124 | ID="SWDIO" | ||
| 125 | Type="PushPull" | ||
| 126 | Speed="Maximum" | ||
| 127 | Resistor="PullUp" | ||
| 128 | Level="High" | ||
| 129 | Mode="Alternate" | ||
| 130 | Alternate="0" /> | ||
| 131 | <pin14 | ||
| 132 | ID="SWCLK" | ||
| 133 | Type="PushPull" | ||
| 134 | Speed="Maximum" | ||
| 135 | Resistor="PullDown" | ||
| 136 | Level="High" | ||
| 137 | Mode="Alternate" | ||
| 138 | Alternate="0" /> | ||
| 139 | <pin15 | ||
| 140 | ID="" | ||
| 141 | Type="PushPull" | ||
| 142 | Speed="Maximum" | ||
| 143 | Resistor="PullUp" | ||
| 144 | Level="High" | ||
| 145 | Mode="Input" | ||
| 146 | Alternate="0" /> | ||
| 147 | </GPIOA> | ||
| 148 | <GPIOB> | ||
| 149 | <pin0 | ||
| 150 | ID="" | ||
| 151 | Type="PushPull" | ||
| 152 | Speed="Minimum" | ||
| 153 | Resistor="PullUp" | ||
| 154 | Level="High" | ||
| 155 | Mode="Input" | ||
| 156 | Alternate="0" /> | ||
| 157 | <pin1 | ||
| 158 | ID="" | ||
| 159 | Type="PushPull" | ||
| 160 | Speed="Minimum" | ||
| 161 | Resistor="PullUp" | ||
| 162 | Level="High" | ||
| 163 | Mode="Input" | ||
| 164 | Alternate="0" /> | ||
| 165 | <pin2 | ||
| 166 | ID="" | ||
| 167 | Type="PushPull" | ||
| 168 | Speed="Maximum" | ||
| 169 | Resistor="PullUp" | ||
| 170 | Level="High" | ||
| 171 | Mode="Input" | ||
| 172 | Alternate="0" /> | ||
| 173 | <pin3 | ||
| 174 | ID="" | ||
| 175 | Type="PushPull" | ||
| 176 | Speed="Maximum" | ||
| 177 | Resistor="PullUp" | ||
| 178 | Level="High" | ||
| 179 | Mode="Input" | ||
| 180 | Alternate="0" /> | ||
| 181 | <pin4 | ||
| 182 | ID="" | ||
| 183 | Type="PushPull" | ||
| 184 | Speed="Maximum" | ||
| 185 | Resistor="PullUp" | ||
| 186 | Level="High" | ||
| 187 | Mode="Input" | ||
| 188 | Alternate="0" /> | ||
| 189 | <pin5 | ||
| 190 | ID="" | ||
| 191 | Type="PushPull" | ||
| 192 | Speed="Minimum" | ||
| 193 | Resistor="PullUp" | ||
| 194 | Level="High" | ||
| 195 | Mode="Input" | ||
| 196 | Alternate="0" /> | ||
| 197 | <pin6 | ||
| 198 | ID="" | ||
| 199 | Type="PushPull" | ||
| 200 | Speed="Minimum" | ||
| 201 | Resistor="PullUp" | ||
| 202 | Level="High" | ||
| 203 | Mode="Input" | ||
| 204 | Alternate="0" /> | ||
| 205 | <pin7 | ||
| 206 | ID="" | ||
| 207 | Type="PushPull" | ||
| 208 | Speed="Minimum" | ||
| 209 | Resistor="PullUp" | ||
| 210 | Level="High" | ||
| 211 | Mode="Input" | ||
| 212 | Alternate="0" /> | ||
| 213 | <pin8 | ||
| 214 | ID="" | ||
| 215 | Type="PushPull" | ||
| 216 | Speed="Minimum" | ||
| 217 | Resistor="PullUp" | ||
| 218 | Level="High" | ||
| 219 | Mode="Input" | ||
| 220 | Alternate="0" /> | ||
| 221 | <pin9 | ||
| 222 | ID="" | ||
| 223 | Type="PushPull" | ||
| 224 | Speed="Minimum" | ||
| 225 | Resistor="PullUp" | ||
| 226 | Level="High" | ||
| 227 | Mode="Input" | ||
| 228 | Alternate="0" /> | ||
| 229 | <pin10 | ||
| 230 | ID="" | ||
| 231 | Type="PushPull" | ||
| 232 | Speed="Minimum" | ||
| 233 | Resistor="PullUp" | ||
| 234 | Level="High" | ||
| 235 | Mode="Input" | ||
| 236 | Alternate="0" /> | ||
| 237 | <pin11 | ||
| 238 | ID="" | ||
| 239 | Type="PushPull" | ||
| 240 | Speed="Minimum" | ||
| 241 | Resistor="PullUp" | ||
| 242 | Level="High" | ||
| 243 | Mode="Input" | ||
| 244 | Alternate="0" /> | ||
| 245 | <pin12 | ||
| 246 | ID="" | ||
| 247 | Type="PushPull" | ||
| 248 | Speed="Minimum" | ||
| 249 | Resistor="PullUp" | ||
| 250 | Level="High" | ||
| 251 | Mode="Input" | ||
| 252 | Alternate="0" /> | ||
| 253 | <pin13 | ||
| 254 | ID="SPI2_SCK" | ||
| 255 | Type="PushPull" | ||
| 256 | Speed="Minimum" | ||
| 257 | Resistor="Floating" | ||
| 258 | Level="High" | ||
| 259 | Mode="Alternate" | ||
| 260 | Alternate="0" /> | ||
| 261 | <pin14 | ||
| 262 | ID="SPI2_MISO" | ||
| 263 | Type="PushPull" | ||
| 264 | Speed="Minimum" | ||
| 265 | Resistor="Floating" | ||
| 266 | Level="High" | ||
| 267 | Mode="Alternate" | ||
| 268 | Alternate="0" /> | ||
| 269 | <pin15 | ||
| 270 | ID="SPI2_MOSI" | ||
| 271 | Type="PushPull" | ||
| 272 | Speed="Minimum" | ||
| 273 | Resistor="Floating" | ||
| 274 | Level="High" | ||
| 275 | Mode="Alternate" | ||
| 276 | Alternate="0" /> | ||
| 277 | </GPIOB> | ||
| 278 | <GPIOC> | ||
| 279 | <pin0 | ||
| 280 | ID="MEMS_CS" | ||
| 281 | Type="PushPull" | ||
| 282 | Speed="Maximum" | ||
| 283 | Resistor="Floating" | ||
| 284 | Level="High" | ||
| 285 | Mode="Output" | ||
| 286 | Alternate="0" /> | ||
| 287 | <pin1 | ||
| 288 | ID="" | ||
| 289 | Type="PushPull" | ||
| 290 | Speed="Minimum" | ||
| 291 | Resistor="PullUp" | ||
| 292 | Level="High" | ||
| 293 | Mode="Input" | ||
| 294 | Alternate="0" /> | ||
| 295 | <pin2 | ||
| 296 | ID="" | ||
| 297 | Type="PushPull" | ||
| 298 | Speed="Minimum" | ||
| 299 | Resistor="PullUp" | ||
| 300 | Level="High" | ||
| 301 | Mode="Input" | ||
| 302 | Alternate="0" /> | ||
| 303 | <pin3 | ||
| 304 | ID="" | ||
| 305 | Type="PushPull" | ||
| 306 | Speed="Minimum" | ||
| 307 | Resistor="PullUp" | ||
| 308 | Level="High" | ||
| 309 | Mode="Input" | ||
| 310 | Alternate="0" /> | ||
| 311 | <pin4 | ||
| 312 | ID="" | ||
| 313 | Type="PushPull" | ||
| 314 | Speed="Minimum" | ||
| 315 | Resistor="PullUp" | ||
| 316 | Level="High" | ||
| 317 | Mode="Input" | ||
| 318 | Alternate="0" /> | ||
| 319 | <pin5 | ||
| 320 | ID="" | ||
| 321 | Type="PushPull" | ||
| 322 | Speed="Minimum" | ||
| 323 | Resistor="PullUp" | ||
| 324 | Level="High" | ||
| 325 | Mode="Input" | ||
| 326 | Alternate="0" /> | ||
| 327 | <pin6 | ||
| 328 | ID="LED_RED" | ||
| 329 | Type="PushPull" | ||
| 330 | Speed="Maximum" | ||
| 331 | Resistor="Floating" | ||
| 332 | Level="Low" | ||
| 333 | Mode="Output" | ||
| 334 | Alternate="0" /> | ||
| 335 | <pin7 | ||
| 336 | ID="LED_BLUE" | ||
| 337 | Type="PushPull" | ||
| 338 | Speed="Maximum" | ||
| 339 | Resistor="Floating" | ||
| 340 | Level="Low" | ||
| 341 | Mode="Output" | ||
| 342 | Alternate="0" /> | ||
| 343 | <pin8 | ||
| 344 | ID="LED_ORANGE" | ||
| 345 | Type="PushPull" | ||
| 346 | Speed="Maximum" | ||
| 347 | Resistor="Floating" | ||
| 348 | Level="Low" | ||
| 349 | Mode="Output" | ||
| 350 | Alternate="0" ></pin8> | ||
| 351 | <pin9 | ||
| 352 | ID="LED_GREEN" | ||
| 353 | Type="PushPull" | ||
| 354 | Speed="Maximum" | ||
| 355 | Resistor="Floating" | ||
| 356 | Level="Low" | ||
| 357 | Mode="Output" | ||
| 358 | Alternate="0" /> | ||
| 359 | <pin10 | ||
| 360 | ID="" | ||
| 361 | Type="PushPull" | ||
| 362 | Speed="Minimum" | ||
| 363 | Resistor="PullUp" | ||
| 364 | Level="High" | ||
| 365 | Mode="Input" | ||
| 366 | Alternate="0" /> | ||
| 367 | <pin11 | ||
| 368 | ID="" | ||
| 369 | Type="PushPull" | ||
| 370 | Speed="Minimum" | ||
| 371 | Resistor="PullUp" | ||
| 372 | Level="High" | ||
| 373 | Mode="Input" | ||
| 374 | Alternate="0" /> | ||
| 375 | <pin12 | ||
| 376 | ID="" | ||
| 377 | Type="PushPull" | ||
| 378 | Speed="Minimum" | ||
| 379 | Resistor="PullUp" | ||
| 380 | Level="High" | ||
| 381 | Mode="Input" | ||
| 382 | Alternate="0" /> | ||
| 383 | <pin13 | ||
| 384 | ID="" | ||
| 385 | Type="PushPull" | ||
| 386 | Speed="Minimum" | ||
| 387 | Resistor="PullUp" | ||
| 388 | Level="High" | ||
| 389 | Mode="Input" | ||
| 390 | Alternate="0" /> | ||
| 391 | <pin14 | ||
| 392 | ID="OSC32_IN" | ||
| 393 | Type="PushPull" | ||
| 394 | Speed="Maximum" | ||
| 395 | Resistor="Floating" | ||
| 396 | Level="High" | ||
| 397 | Mode="Input" | ||
| 398 | Alternate="0" /> | ||
| 399 | <pin15 | ||
| 400 | ID="OSC32_OUT" | ||
| 401 | Type="PushPull" | ||
| 402 | Speed="Maximum" | ||
| 403 | Resistor="Floating" | ||
| 404 | Level="High" | ||
| 405 | Mode="Input" | ||
| 406 | Alternate="0" /> | ||
| 407 | </GPIOC> | ||
| 408 | <GPIOD> | ||
| 409 | <pin0 | ||
| 410 | ID="" | ||
| 411 | Type="PushPull" | ||
| 412 | Speed="Minimum" | ||
| 413 | Resistor="PullUp" | ||
| 414 | Level="High" | ||
| 415 | Mode="Input" | ||
| 416 | Alternate="0" /> | ||
| 417 | <pin1 | ||
| 418 | ID="" | ||
| 419 | Type="PushPull" | ||
| 420 | Speed="Minimum" | ||
| 421 | Resistor="PullUp" | ||
| 422 | Level="High" | ||
| 423 | Mode="Input" | ||
| 424 | Alternate="0" /> | ||
| 425 | <pin2 | ||
| 426 | ID="" | ||
| 427 | Type="PushPull" | ||
| 428 | Speed="Minimum" | ||
| 429 | Resistor="PullUp" | ||
| 430 | Level="High" | ||
| 431 | Mode="Input" | ||
| 432 | Alternate="0" /> | ||
| 433 | <pin3 | ||
| 434 | ID="" | ||
| 435 | Type="PushPull" | ||
| 436 | Speed="Minimum" | ||
| 437 | Resistor="PullUp" | ||
| 438 | Level="High" | ||
| 439 | Mode="Input" | ||
| 440 | Alternate="0" /> | ||
| 441 | <pin4 | ||
| 442 | ID="" | ||
| 443 | Type="PushPull" | ||
| 444 | Speed="Minimum" | ||
| 445 | Resistor="PullUp" | ||
| 446 | Level="High" | ||
| 447 | Mode="Input" | ||
| 448 | Alternate="0" /> | ||
| 449 | <pin5 | ||
| 450 | ID="" | ||
| 451 | Type="PushPull" | ||
| 452 | Speed="Minimum" | ||
| 453 | Resistor="PullUp" | ||
| 454 | Level="High" | ||
| 455 | Mode="Input" | ||
| 456 | Alternate="0" /> | ||
| 457 | <pin6 | ||
| 458 | ID="" | ||
| 459 | Type="PushPull" | ||
| 460 | Speed="Minimum" | ||
| 461 | Resistor="PullUp" | ||
| 462 | Level="High" | ||
| 463 | Mode="Input" | ||
| 464 | Alternate="0" /> | ||
| 465 | <pin7 | ||
| 466 | ID="" | ||
| 467 | Type="PushPull" | ||
| 468 | Speed="Minimum" | ||
| 469 | Resistor="PullUp" | ||
| 470 | Level="High" | ||
| 471 | Mode="Input" | ||
| 472 | Alternate="0" /> | ||
| 473 | <pin8 | ||
| 474 | ID="" | ||
| 475 | Type="PushPull" | ||
| 476 | Speed="Minimum" | ||
| 477 | Resistor="PullUp" | ||
| 478 | Level="High" | ||
| 479 | Mode="Input" | ||
| 480 | Alternate="0" /> | ||
| 481 | <pin9 | ||
| 482 | ID="" | ||
| 483 | Type="PushPull" | ||
| 484 | Speed="Minimum" | ||
| 485 | Resistor="PullUp" | ||
| 486 | Level="High" | ||
| 487 | Mode="Input" | ||
| 488 | Alternate="0" /> | ||
| 489 | <pin10 | ||
| 490 | ID="" | ||
| 491 | Type="PushPull" | ||
| 492 | Speed="Minimum" | ||
| 493 | Resistor="PullUp" | ||
| 494 | Level="High" | ||
| 495 | Mode="Input" | ||
| 496 | Alternate="0" /> | ||
| 497 | <pin11 | ||
| 498 | ID="" | ||
| 499 | Type="PushPull" | ||
| 500 | Speed="Minimum" | ||
| 501 | Resistor="PullUp" | ||
| 502 | Level="High" | ||
| 503 | Mode="Input" | ||
| 504 | Alternate="0" /> | ||
| 505 | <pin12 | ||
| 506 | ID="" | ||
| 507 | Type="PushPull" | ||
| 508 | Speed="Minimum" | ||
| 509 | Resistor="PullUp" | ||
| 510 | Level="High" | ||
| 511 | Mode="Input" | ||
| 512 | Alternate="0" /> | ||
| 513 | <pin13 | ||
| 514 | ID="" | ||
| 515 | Type="PushPull" | ||
| 516 | Speed="Minimum" | ||
| 517 | Resistor="PullUp" | ||
| 518 | Level="High" | ||
| 519 | Mode="Input" | ||
| 520 | Alternate="0" /> | ||
| 521 | <pin14 | ||
| 522 | ID="" | ||
| 523 | Type="PushPull" | ||
| 524 | Speed="Minimum" | ||
| 525 | Resistor="PullUp" | ||
| 526 | Level="High" | ||
| 527 | Mode="Input" | ||
| 528 | Alternate="0" /> | ||
| 529 | <pin15 | ||
| 530 | ID="" | ||
| 531 | Type="PushPull" | ||
| 532 | Speed="Minimum" | ||
| 533 | Resistor="PullUp" | ||
| 534 | Level="High" | ||
| 535 | Mode="Input" | ||
| 536 | Alternate="0" /> | ||
| 537 | </GPIOD> | ||
| 538 | <GPIOE> | ||
| 539 | <pin0 ID="" Type="PushPull" Speed="Minimum" Resistor="PullUp" | ||
| 540 | Level="High" Mode="Input" Alternate="0" /> | ||
| 541 | <pin1 ID="" Type="PushPull" Speed="Minimum" Resistor="PullUp" | ||
| 542 | Level="High" Mode="Input" Alternate="0" /> | ||
| 543 | <pin2 ID="" Type="PushPull" Speed="Minimum" Resistor="PullUp" | ||
| 544 | Level="High" Mode="Input" Alternate="0" /> | ||
| 545 | <pin3 ID="" Type="PushPull" Speed="Minimum" Resistor="PullUp" | ||
| 546 | Level="High" Mode="Input" Alternate="0" /> | ||
| 547 | <pin4 ID="" Type="PushPull" Speed="Minimum" Resistor="PullUp" | ||
| 548 | Level="High" Mode="Input" Alternate="0" /> | ||
| 549 | <pin5 ID="" Type="PushPull" Speed="Minimum" Resistor="PullUp" | ||
| 550 | Level="High" Mode="Input" Alternate="0" /> | ||
| 551 | <pin6 ID="" Type="PushPull" Speed="Minimum" Resistor="PullUp" | ||
| 552 | Level="High" Mode="Input" Alternate="0" /> | ||
| 553 | <pin7 ID="" Type="PushPull" Speed="Minimum" Resistor="PullUp" | ||
| 554 | Level="High" Mode="Input" Alternate="0" /> | ||
| 555 | <pin8 ID="" Type="PushPull" Speed="Minimum" Resistor="PullUp" | ||
| 556 | Level="High" Mode="Input" Alternate="0" /> | ||
| 557 | <pin9 ID="" Type="PushPull" Speed="Minimum" Resistor="PullUp" | ||
| 558 | Level="High" Mode="Input" Alternate="0" /> | ||
| 559 | <pin10 ID="" Type="PushPull" Speed="Minimum" Resistor="PullUp" | ||
| 560 | Level="High" Mode="Input" Alternate="0" /> | ||
| 561 | <pin11 ID="" Type="PushPull" Speed="Minimum" Resistor="PullUp" | ||
| 562 | Level="High" Mode="Input" Alternate="0" /> | ||
| 563 | <pin12 ID="" Type="PushPull" Speed="Minimum" Resistor="PullUp" | ||
| 564 | Level="High" Mode="Input" Alternate="0" /> | ||
| 565 | <pin13 ID="" Type="PushPull" Speed="Minimum" Resistor="PullUp" | ||
| 566 | Level="High" Mode="Input" Alternate="0" /> | ||
| 567 | <pin14 ID="" Type="PushPull" Speed="Minimum" Resistor="PullUp" | ||
| 568 | Level="High" Mode="Input" Alternate="0" /> | ||
| 569 | <pin15 ID="" Type="PushPull" Speed="Minimum" Resistor="PullUp" | ||
| 570 | Level="High" Mode="Input" Alternate="0" /> | ||
| 571 | </GPIOE> | ||
| 572 | <GPIOF> | ||
| 573 | <pin0 | ||
| 574 | ID="OSC_IN" | ||
| 575 | Type="PushPull" | ||
| 576 | Speed="Minimum" | ||
| 577 | Resistor="Floating" | ||
| 578 | Level="High" | ||
| 579 | Mode="Input" | ||
| 580 | Alternate="0" /> | ||
| 581 | <pin1 | ||
| 582 | ID="OSC_OUT" | ||
| 583 | Type="PushPull" | ||
| 584 | Speed="Minimum" | ||
| 585 | Resistor="Floating" | ||
| 586 | Level="High" | ||
| 587 | Mode="Input" | ||
| 588 | Alternate="0" /> | ||
| 589 | <pin2 | ||
| 590 | ID="" | ||
| 591 | Type="PushPull" | ||
| 592 | Speed="Minimum" | ||
| 593 | Resistor="PullUp" | ||
| 594 | Level="High" | ||
| 595 | Mode="Input" | ||
| 596 | Alternate="0" /> | ||
| 597 | <pin3 | ||
| 598 | ID="" | ||
| 599 | Type="PushPull" | ||
| 600 | Speed="Minimum" | ||
| 601 | Resistor="PullUp" | ||
| 602 | Level="High" | ||
| 603 | Mode="Input" | ||
| 604 | Alternate="0" /> | ||
| 605 | <pin4 | ||
| 606 | ID="" | ||
| 607 | Type="PushPull" | ||
| 608 | Speed="Minimum" | ||
| 609 | Resistor="PullUp" | ||
| 610 | Level="High" | ||
| 611 | Mode="Input" | ||
| 612 | Alternate="0" /> | ||
| 613 | <pin5 | ||
| 614 | ID="" | ||
| 615 | Type="PushPull" | ||
| 616 | Speed="Minimum" | ||
| 617 | Resistor="PullUp" | ||
| 618 | Level="High" | ||
| 619 | Mode="Input" | ||
| 620 | Alternate="0" /> | ||
| 621 | <pin6 | ||
| 622 | ID="" | ||
| 623 | Type="PushPull" | ||
| 624 | Speed="Minimum" | ||
| 625 | Resistor="PullUp" | ||
| 626 | Level="High" | ||
| 627 | Mode="Input" | ||
| 628 | Alternate="0" /> | ||
| 629 | <pin7 | ||
| 630 | ID="" | ||
| 631 | Type="PushPull" | ||
| 632 | Speed="Minimum" | ||
| 633 | Resistor="PullUp" | ||
| 634 | Level="High" | ||
| 635 | Mode="Input" | ||
| 636 | Alternate="0" /> | ||
| 637 | <pin8 | ||
| 638 | ID="" | ||
| 639 | Type="PushPull" | ||
| 640 | Speed="Minimum" | ||
| 641 | Resistor="PullUp" | ||
| 642 | Level="High" | ||
| 643 | Mode="Input" | ||
| 644 | Alternate="0" /> | ||
| 645 | <pin9 | ||
| 646 | ID="" | ||
| 647 | Type="PushPull" | ||
| 648 | Speed="Minimum" | ||
| 649 | Resistor="PullUp" | ||
| 650 | Level="High" | ||
| 651 | Mode="Input" | ||
| 652 | Alternate="0" /> | ||
| 653 | <pin10 | ||
| 654 | ID="" | ||
| 655 | Type="PushPull" | ||
| 656 | Speed="Minimum" | ||
| 657 | Resistor="PullUp" | ||
| 658 | Level="High" | ||
| 659 | Mode="Input" | ||
| 660 | Alternate="0" /> | ||
| 661 | <pin11 | ||
| 662 | ID="" | ||
| 663 | Type="PushPull" | ||
| 664 | Speed="Minimum" | ||
| 665 | Resistor="PullUp" | ||
| 666 | Level="High" | ||
| 667 | Mode="Input" | ||
| 668 | Alternate="0" /> | ||
| 669 | <pin12 | ||
| 670 | ID="" | ||
| 671 | Type="PushPull" | ||
| 672 | Speed="Minimum" | ||
| 673 | Resistor="PullUp" | ||
| 674 | Level="High" | ||
| 675 | Mode="Input" | ||
| 676 | Alternate="0" /> | ||
| 677 | <pin13 | ||
| 678 | ID="" | ||
| 679 | Type="PushPull" | ||
| 680 | Speed="Minimum" | ||
| 681 | Resistor="PullUp" | ||
| 682 | Level="High" | ||
| 683 | Mode="Input" | ||
| 684 | Alternate="0" /> | ||
| 685 | <pin14 | ||
| 686 | ID="" | ||
| 687 | Type="PushPull" | ||
| 688 | Speed="Minimum" | ||
| 689 | Resistor="PullUp" | ||
| 690 | Level="High" | ||
| 691 | Mode="Input" | ||
| 692 | Alternate="0" /> | ||
| 693 | <pin15 | ||
| 694 | ID="" | ||
| 695 | Type="PushPull" | ||
| 696 | Speed="Minimum" | ||
| 697 | Resistor="PullUp" | ||
| 698 | Level="High" | ||
| 699 | Mode="Input" | ||
| 700 | Alternate="0" /> | ||
| 701 | </GPIOF> | ||
| 702 | </ports> | ||
| 703 | </board> | ||
diff --git a/drivers/boards/GENERIC_STM32_F072XB/cfg/board.fmpp b/drivers/boards/GENERIC_STM32_F072XB/cfg/board.fmpp deleted file mode 100644 index 55cd396e4..000000000 --- a/drivers/boards/GENERIC_STM32_F072XB/cfg/board.fmpp +++ /dev/null | |||
| @@ -1,15 +0,0 @@ | |||
| 1 | sourceRoot: ../../../../../tools/ftl/processors/boards/stm32f0xx/templates | ||
| 2 | outputRoot: .. | ||
| 3 | dataRoot: . | ||
| 4 | |||
| 5 | freemarkerLinks: { | ||
| 6 | lib: ../../../../../tools/ftl/libs | ||
| 7 | } | ||
| 8 | |||
| 9 | data : { | ||
| 10 | doc1:xml ( | ||
| 11 | board.chcfg | ||
| 12 | { | ||
| 13 | } | ||
| 14 | ) | ||
| 15 | } | ||
diff --git a/drivers/boards/GENERIC_STM32_F303XC/board.mk b/drivers/boards/GENERIC_STM32_F303XC/board.mk deleted file mode 100644 index 43377629a..000000000 --- a/drivers/boards/GENERIC_STM32_F303XC/board.mk +++ /dev/null | |||
| @@ -1,5 +0,0 @@ | |||
| 1 | # List of all the board related files. | ||
| 2 | BOARDSRC = $(BOARD_PATH)/boards/GENERIC_STM32_F303XC/board.c | ||
| 3 | |||
| 4 | # Required include directories | ||
| 5 | BOARDINC = $(BOARD_PATH)/boards/GENERIC_STM32_F303XC | ||
diff --git a/drivers/boards/IC_TEENSY_3_1/board.mk b/drivers/boards/IC_TEENSY_3_1/board.mk deleted file mode 100644 index 62f5b751c..000000000 --- a/drivers/boards/IC_TEENSY_3_1/board.mk +++ /dev/null | |||
| @@ -1,5 +0,0 @@ | |||
| 1 | # List of all the board related files. | ||
| 2 | BOARDSRC = $(BOARD_PATH)/boards/IC_TEENSY_3_1/board.c | ||
| 3 | |||
| 4 | # Required include directories | ||
| 5 | BOARDINC = $(BOARD_PATH)/boards/IC_TEENSY_3_1 | ||
diff --git a/drivers/boards/STM32_F103_STM32DUINO/board.mk b/drivers/boards/STM32_F103_STM32DUINO/board.mk deleted file mode 100644 index 81141bdfd..000000000 --- a/drivers/boards/STM32_F103_STM32DUINO/board.mk +++ /dev/null | |||
| @@ -1,5 +0,0 @@ | |||
| 1 | # List of all the board related files. | ||
| 2 | BOARDSRC = $(BOARD_PATH)/boards/STM32_F103_STM32DUINO/board.c | ||
| 3 | |||
| 4 | # Required include directories | ||
| 5 | BOARDINC = $(BOARD_PATH)/boards/STM32_F103_STM32DUINO | ||
diff --git a/keyboards/handwired/onekey/blackpill_f401/halconf.h b/keyboards/handwired/onekey/blackpill_f401/halconf.h index a8db392aa..d73c214ec 100644 --- a/keyboards/handwired/onekey/blackpill_f401/halconf.h +++ b/keyboards/handwired/onekey/blackpill_f401/halconf.h | |||
| @@ -1,525 +1,20 @@ | |||
| 1 | /* | 1 | /* Copyright 2020 Nick Brassel (tzarc) |
| 2 | ChibiOS - Copyright (C) 2006..2018 Giovanni Di Sirio | ||
| 3 | |||
| 4 | Licensed under the Apache License, Version 2.0 (the "License"); | ||
| 5 | you may not use this file except in compliance with the License. | ||
| 6 | You may obtain a copy of the License at | ||
| 7 | |||
| 8 | http://www.apache.org/licenses/LICENSE-2.0 | ||
| 9 | |||
| 10 | Unless required by applicable law or agreed to in writing, software | ||
| 11 | distributed under the License is distributed on an "AS IS" BASIS, | ||
| 12 | WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. | ||
| 13 | See the License for the specific language governing permissions and | ||
| 14 | limitations under the License. | ||
| 15 | */ | ||
| 16 | |||
| 17 | /** | ||
| 18 | * @file templates/halconf.h | ||
| 19 | * @brief HAL configuration header. | ||
| 20 | * @details HAL configuration file, this file allows to enable or disable the | ||
| 21 | * various device drivers from your application. You may also use | ||
| 22 | * this file in order to override the device drivers default settings. | ||
| 23 | * | 2 | * |
| 24 | * @addtogroup HAL_CONF | 3 | * This program is free software: you can redistribute it and/or modify |
| 25 | * @{ | 4 | * it under the terms of the GNU General Public License as published by |
| 26 | */ | 5 | * the Free Software Foundation, either version 3 of the License, or |
| 27 | 6 | * (at your option) any later version. | |
| 28 | #ifndef HALCONF_H | 7 | * |
| 29 | #define HALCONF_H | 8 | * This program is distributed in the hope that it will be useful, |
| 30 | 9 | * but WITHOUT ANY WARRANTY; without even the implied warranty of | |
| 31 | #define _CHIBIOS_HAL_CONF_ | 10 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the |
| 32 | #define _CHIBIOS_HAL_CONF_VER_7_0_ | 11 | * GNU General Public License for more details. |
| 33 | 12 | * | |
| 34 | #include "mcuconf.h" | 13 | * You should have received a copy of the GNU General Public License |
| 35 | 14 | * along with this program. If not, see <https://www.gnu.org/licenses/>. | |
| 36 | /** | ||
| 37 | * @brief Enables the PAL subsystem. | ||
| 38 | */ | ||
| 39 | #if !defined(HAL_USE_PAL) || defined(__DOXYGEN__) | ||
| 40 | #define HAL_USE_PAL TRUE | ||
| 41 | #endif | ||
| 42 | |||
| 43 | /** | ||
| 44 | * @brief Enables the ADC subsystem. | ||
| 45 | */ | ||
| 46 | #if !defined(HAL_USE_ADC) || defined(__DOXYGEN__) | ||
| 47 | #define HAL_USE_ADC FALSE | ||
| 48 | #endif | ||
| 49 | |||
| 50 | /** | ||
| 51 | * @brief Enables the CAN subsystem. | ||
| 52 | */ | ||
| 53 | #if !defined(HAL_USE_CAN) || defined(__DOXYGEN__) | ||
| 54 | #define HAL_USE_CAN FALSE | ||
| 55 | #endif | ||
| 56 | |||
| 57 | /** | ||
| 58 | * @brief Enables the cryptographic subsystem. | ||
| 59 | */ | ||
| 60 | #if !defined(HAL_USE_CRY) || defined(__DOXYGEN__) | ||
| 61 | #define HAL_USE_CRY FALSE | ||
| 62 | #endif | ||
| 63 | |||
| 64 | /** | ||
| 65 | * @brief Enables the DAC subsystem. | ||
| 66 | */ | ||
| 67 | #if !defined(HAL_USE_DAC) || defined(__DOXYGEN__) | ||
| 68 | #define HAL_USE_DAC FALSE | ||
| 69 | #endif | ||
| 70 | |||
| 71 | /** | ||
| 72 | * @brief Enables the GPT subsystem. | ||
| 73 | */ | ||
| 74 | #if !defined(HAL_USE_GPT) || defined(__DOXYGEN__) | ||
| 75 | #define HAL_USE_GPT FALSE | ||
| 76 | #endif | ||
| 77 | |||
| 78 | /** | ||
| 79 | * @brief Enables the I2C subsystem. | ||
| 80 | */ | ||
| 81 | #if !defined(HAL_USE_I2C) || defined(__DOXYGEN__) | ||
| 82 | #define HAL_USE_I2C FALSE | ||
| 83 | #endif | ||
| 84 | |||
| 85 | /** | ||
| 86 | * @brief Enables the I2S subsystem. | ||
| 87 | */ | ||
| 88 | #if !defined(HAL_USE_I2S) || defined(__DOXYGEN__) | ||
| 89 | #define HAL_USE_I2S FALSE | ||
| 90 | #endif | ||
| 91 | |||
| 92 | /** | ||
| 93 | * @brief Enables the ICU subsystem. | ||
| 94 | */ | ||
| 95 | #if !defined(HAL_USE_ICU) || defined(__DOXYGEN__) | ||
| 96 | #define HAL_USE_ICU FALSE | ||
| 97 | #endif | ||
| 98 | |||
| 99 | /** | ||
| 100 | * @brief Enables the MAC subsystem. | ||
| 101 | */ | ||
| 102 | #if !defined(HAL_USE_MAC) || defined(__DOXYGEN__) | ||
| 103 | #define HAL_USE_MAC FALSE | ||
| 104 | #endif | ||
| 105 | |||
| 106 | /** | ||
| 107 | * @brief Enables the MMC_SPI subsystem. | ||
| 108 | */ | ||
| 109 | #if !defined(HAL_USE_MMC_SPI) || defined(__DOXYGEN__) | ||
| 110 | #define HAL_USE_MMC_SPI FALSE | ||
| 111 | #endif | ||
| 112 | |||
| 113 | /** | ||
| 114 | * @brief Enables the PWM subsystem. | ||
| 115 | */ | ||
| 116 | #if !defined(HAL_USE_PWM) || defined(__DOXYGEN__) | ||
| 117 | #define HAL_USE_PWM FALSE | ||
| 118 | #endif | ||
| 119 | |||
| 120 | /** | ||
| 121 | * @brief Enables the RTC subsystem. | ||
| 122 | */ | ||
| 123 | #if !defined(HAL_USE_RTC) || defined(__DOXYGEN__) | ||
| 124 | #define HAL_USE_RTC FALSE | ||
| 125 | #endif | ||
| 126 | |||
| 127 | /** | ||
| 128 | * @brief Enables the SDC subsystem. | ||
| 129 | */ | ||
| 130 | #if !defined(HAL_USE_SDC) || defined(__DOXYGEN__) | ||
| 131 | #define HAL_USE_SDC FALSE | ||
| 132 | #endif | ||
| 133 | |||
| 134 | /** | ||
| 135 | * @brief Enables the SERIAL subsystem. | ||
| 136 | */ | ||
| 137 | #if !defined(HAL_USE_SERIAL) || defined(__DOXYGEN__) | ||
| 138 | #define HAL_USE_SERIAL FALSE | ||
| 139 | #endif | ||
| 140 | |||
| 141 | /** | ||
| 142 | * @brief Enables the SERIAL over USB subsystem. | ||
| 143 | */ | ||
| 144 | #if !defined(HAL_USE_SERIAL_USB) || defined(__DOXYGEN__) | ||
| 145 | #define HAL_USE_SERIAL_USB FALSE | ||
| 146 | #endif | ||
| 147 | |||
| 148 | /** | ||
| 149 | * @brief Enables the SIO subsystem. | ||
| 150 | */ | ||
| 151 | #if !defined(HAL_USE_SIO) || defined(__DOXYGEN__) | ||
| 152 | #define HAL_USE_SIO FALSE | ||
| 153 | #endif | ||
| 154 | |||
| 155 | /** | ||
| 156 | * @brief Enables the SPI subsystem. | ||
| 157 | */ | ||
| 158 | #if !defined(HAL_USE_SPI) || defined(__DOXYGEN__) | ||
| 159 | #define HAL_USE_SPI FALSE | ||
| 160 | #endif | ||
| 161 | |||
| 162 | /** | ||
| 163 | * @brief Enables the TRNG subsystem. | ||
| 164 | */ | ||
| 165 | #if !defined(HAL_USE_TRNG) || defined(__DOXYGEN__) | ||
| 166 | #define HAL_USE_TRNG FALSE | ||
| 167 | #endif | ||
| 168 | |||
| 169 | /** | ||
| 170 | * @brief Enables the UART subsystem. | ||
| 171 | */ | ||
| 172 | #if !defined(HAL_USE_UART) || defined(__DOXYGEN__) | ||
| 173 | #define HAL_USE_UART FALSE | ||
| 174 | #endif | ||
| 175 | |||
| 176 | /** | ||
| 177 | * @brief Enables the USB subsystem. | ||
| 178 | */ | ||
| 179 | #if !defined(HAL_USE_USB) || defined(__DOXYGEN__) | ||
| 180 | #define HAL_USE_USB TRUE | ||
| 181 | #endif | ||
| 182 | |||
| 183 | /** | ||
| 184 | * @brief Enables the WDG subsystem. | ||
| 185 | */ | ||
| 186 | #if !defined(HAL_USE_WDG) || defined(__DOXYGEN__) | ||
| 187 | #define HAL_USE_WDG FALSE | ||
| 188 | #endif | ||
| 189 | |||
| 190 | /** | ||
| 191 | * @brief Enables the WSPI subsystem. | ||
| 192 | */ | ||
| 193 | #if !defined(HAL_USE_WSPI) || defined(__DOXYGEN__) | ||
| 194 | #define HAL_USE_WSPI FALSE | ||
| 195 | #endif | ||
| 196 | |||
| 197 | /*===========================================================================*/ | ||
| 198 | /* PAL driver related settings. */ | ||
| 199 | /*===========================================================================*/ | ||
| 200 | |||
| 201 | /** | ||
| 202 | * @brief Enables synchronous APIs. | ||
| 203 | * @note Disabling this option saves both code and data space. | ||
| 204 | */ | ||
| 205 | #if !defined(PAL_USE_CALLBACKS) || defined(__DOXYGEN__) | ||
| 206 | #define PAL_USE_CALLBACKS FALSE | ||
| 207 | #endif | ||
| 208 | |||
| 209 | /** | ||
| 210 | * @brief Enables synchronous APIs. | ||
| 211 | * @note Disabling this option saves both code and data space. | ||
| 212 | */ | ||
| 213 | #if !defined(PAL_USE_WAIT) || defined(__DOXYGEN__) | ||
| 214 | #define PAL_USE_WAIT FALSE | ||
| 215 | #endif | ||
| 216 | |||
| 217 | /*===========================================================================*/ | ||
| 218 | /* ADC driver related settings. */ | ||
| 219 | /*===========================================================================*/ | ||
| 220 | |||
| 221 | /** | ||
| 222 | * @brief Enables synchronous APIs. | ||
| 223 | * @note Disabling this option saves both code and data space. | ||
| 224 | */ | ||
| 225 | #if !defined(ADC_USE_WAIT) || defined(__DOXYGEN__) | ||
| 226 | #define ADC_USE_WAIT TRUE | ||
| 227 | #endif | ||
| 228 | |||
| 229 | /** | ||
| 230 | * @brief Enables the @p adcAcquireBus() and @p adcReleaseBus() APIs. | ||
| 231 | * @note Disabling this option saves both code and data space. | ||
| 232 | */ | ||
| 233 | #if !defined(ADC_USE_MUTUAL_EXCLUSION) || defined(__DOXYGEN__) | ||
| 234 | #define ADC_USE_MUTUAL_EXCLUSION TRUE | ||
| 235 | #endif | ||
| 236 | |||
| 237 | /*===========================================================================*/ | ||
| 238 | /* CAN driver related settings. */ | ||
| 239 | /*===========================================================================*/ | ||
| 240 | |||
| 241 | /** | ||
| 242 | * @brief Sleep mode related APIs inclusion switch. | ||
| 243 | */ | ||
| 244 | #if !defined(CAN_USE_SLEEP_MODE) || defined(__DOXYGEN__) | ||
| 245 | #define CAN_USE_SLEEP_MODE TRUE | ||
| 246 | #endif | ||
| 247 | |||
| 248 | /** | ||
| 249 | * @brief Enforces the driver to use direct callbacks rather than OSAL events. | ||
| 250 | */ | ||
| 251 | #if !defined(CAN_ENFORCE_USE_CALLBACKS) || defined(__DOXYGEN__) | ||
| 252 | #define CAN_ENFORCE_USE_CALLBACKS FALSE | ||
| 253 | #endif | ||
| 254 | |||
| 255 | /*===========================================================================*/ | ||
| 256 | /* CRY driver related settings. */ | ||
| 257 | /*===========================================================================*/ | ||
| 258 | |||
| 259 | /** | ||
| 260 | * @brief Enables the SW fall-back of the cryptographic driver. | ||
| 261 | * @details When enabled, this option, activates a fall-back software | ||
| 262 | * implementation for algorithms not supported by the underlying | ||
| 263 | * hardware. | ||
| 264 | * @note Fall-back implementations may not be present for all algorithms. | ||
| 265 | */ | ||
| 266 | #if !defined(HAL_CRY_USE_FALLBACK) || defined(__DOXYGEN__) | ||
| 267 | #define HAL_CRY_USE_FALLBACK FALSE | ||
| 268 | #endif | ||
| 269 | |||
| 270 | /** | ||
| 271 | * @brief Makes the driver forcibly use the fall-back implementations. | ||
| 272 | */ | ||
| 273 | #if !defined(HAL_CRY_ENFORCE_FALLBACK) || defined(__DOXYGEN__) | ||
| 274 | #define HAL_CRY_ENFORCE_FALLBACK FALSE | ||
| 275 | #endif | ||
| 276 | |||
| 277 | /*===========================================================================*/ | ||
| 278 | /* DAC driver related settings. */ | ||
| 279 | /*===========================================================================*/ | ||
| 280 | |||
| 281 | /** | ||
| 282 | * @brief Enables synchronous APIs. | ||
| 283 | * @note Disabling this option saves both code and data space. | ||
| 284 | */ | ||
| 285 | #if !defined(DAC_USE_WAIT) || defined(__DOXYGEN__) | ||
| 286 | #define DAC_USE_WAIT TRUE | ||
| 287 | #endif | ||
| 288 | |||
| 289 | /** | ||
| 290 | * @brief Enables the @p dacAcquireBus() and @p dacReleaseBus() APIs. | ||
| 291 | * @note Disabling this option saves both code and data space. | ||
| 292 | */ | ||
| 293 | #if !defined(DAC_USE_MUTUAL_EXCLUSION) || defined(__DOXYGEN__) | ||
| 294 | #define DAC_USE_MUTUAL_EXCLUSION TRUE | ||
| 295 | #endif | ||
| 296 | |||
| 297 | /*===========================================================================*/ | ||
| 298 | /* I2C driver related settings. */ | ||
| 299 | /*===========================================================================*/ | ||
| 300 | |||
| 301 | /** | ||
| 302 | * @brief Enables the mutual exclusion APIs on the I2C bus. | ||
| 303 | */ | ||
| 304 | #if !defined(I2C_USE_MUTUAL_EXCLUSION) || defined(__DOXYGEN__) | ||
| 305 | #define I2C_USE_MUTUAL_EXCLUSION TRUE | ||
| 306 | #endif | ||
| 307 | |||
| 308 | /*===========================================================================*/ | ||
| 309 | /* MAC driver related settings. */ | ||
| 310 | /*===========================================================================*/ | ||
| 311 | |||
| 312 | /** | ||
| 313 | * @brief Enables the zero-copy API. | ||
| 314 | */ | ||
| 315 | #if !defined(MAC_USE_ZERO_COPY) || defined(__DOXYGEN__) | ||
| 316 | #define MAC_USE_ZERO_COPY FALSE | ||
| 317 | #endif | ||
| 318 | |||
| 319 | /** | ||
| 320 | * @brief Enables an event sources for incoming packets. | ||
| 321 | */ | ||
| 322 | #if !defined(MAC_USE_EVENTS) || defined(__DOXYGEN__) | ||
| 323 | #define MAC_USE_EVENTS TRUE | ||
| 324 | #endif | ||
| 325 | |||
| 326 | /*===========================================================================*/ | ||
| 327 | /* MMC_SPI driver related settings. */ | ||
| 328 | /*===========================================================================*/ | ||
| 329 | |||
| 330 | /** | ||
| 331 | * @brief Delays insertions. | ||
| 332 | * @details If enabled this options inserts delays into the MMC waiting | ||
| 333 | * routines releasing some extra CPU time for the threads with | ||
| 334 | * lower priority, this may slow down the driver a bit however. | ||
| 335 | * This option is recommended also if the SPI driver does not | ||
| 336 | * use a DMA channel and heavily loads the CPU. | ||
| 337 | */ | ||
| 338 | #if !defined(MMC_NICE_WAITING) || defined(__DOXYGEN__) | ||
| 339 | #define MMC_NICE_WAITING TRUE | ||
| 340 | #endif | ||
| 341 | |||
| 342 | /*===========================================================================*/ | ||
| 343 | /* SDC driver related settings. */ | ||
| 344 | /*===========================================================================*/ | ||
| 345 | |||
| 346 | /** | ||
| 347 | * @brief Number of initialization attempts before rejecting the card. | ||
| 348 | * @note Attempts are performed at 10mS intervals. | ||
| 349 | */ | ||
| 350 | #if !defined(SDC_INIT_RETRY) || defined(__DOXYGEN__) | ||
| 351 | #define SDC_INIT_RETRY 100 | ||
| 352 | #endif | ||
| 353 | |||
| 354 | /** | ||
| 355 | * @brief Include support for MMC cards. | ||
| 356 | * @note MMC support is not yet implemented so this option must be kept | ||
| 357 | * at @p FALSE. | ||
| 358 | */ | ||
| 359 | #if !defined(SDC_MMC_SUPPORT) || defined(__DOXYGEN__) | ||
| 360 | #define SDC_MMC_SUPPORT FALSE | ||
| 361 | #endif | ||
| 362 | |||
| 363 | /** | ||
| 364 | * @brief Delays insertions. | ||
| 365 | * @details If enabled this options inserts delays into the MMC waiting | ||
| 366 | * routines releasing some extra CPU time for the threads with | ||
| 367 | * lower priority, this may slow down the driver a bit however. | ||
| 368 | */ | ||
| 369 | #if !defined(SDC_NICE_WAITING) || defined(__DOXYGEN__) | ||
| 370 | #define SDC_NICE_WAITING TRUE | ||
| 371 | #endif | ||
| 372 | |||
| 373 | /** | ||
| 374 | * @brief OCR initialization constant for V20 cards. | ||
| 375 | */ | ||
| 376 | #if !defined(SDC_INIT_OCR_V20) || defined(__DOXYGEN__) | ||
| 377 | #define SDC_INIT_OCR_V20 0x50FF8000U | ||
| 378 | #endif | ||
| 379 | |||
| 380 | /** | ||
| 381 | * @brief OCR initialization constant for non-V20 cards. | ||
| 382 | */ | ||
| 383 | #if !defined(SDC_INIT_OCR) || defined(__DOXYGEN__) | ||
| 384 | #define SDC_INIT_OCR 0x80100000U | ||
| 385 | #endif | ||
| 386 | |||
| 387 | /*===========================================================================*/ | ||
| 388 | /* SERIAL driver related settings. */ | ||
| 389 | /*===========================================================================*/ | ||
| 390 | |||
| 391 | /** | ||
| 392 | * @brief Default bit rate. | ||
| 393 | * @details Configuration parameter, this is the baud rate selected for the | ||
| 394 | * default configuration. | ||
| 395 | */ | ||
| 396 | #if !defined(SERIAL_DEFAULT_BITRATE) || defined(__DOXYGEN__) | ||
| 397 | #define SERIAL_DEFAULT_BITRATE 38400 | ||
| 398 | #endif | ||
| 399 | |||
| 400 | /** | ||
| 401 | * @brief Serial buffers size. | ||
| 402 | * @details Configuration parameter, you can change the depth of the queue | ||
| 403 | * buffers depending on the requirements of your application. | ||
| 404 | * @note The default is 16 bytes for both the transmission and receive | ||
| 405 | * buffers. | ||
| 406 | */ | ||
| 407 | #if !defined(SERIAL_BUFFERS_SIZE) || defined(__DOXYGEN__) | ||
| 408 | #define SERIAL_BUFFERS_SIZE 16 | ||
| 409 | #endif | ||
| 410 | |||
| 411 | /*===========================================================================*/ | ||
| 412 | /* SERIAL_USB driver related setting. */ | ||
| 413 | /*===========================================================================*/ | ||
| 414 | |||
| 415 | /** | ||
| 416 | * @brief Serial over USB buffers size. | ||
| 417 | * @details Configuration parameter, the buffer size must be a multiple of | ||
| 418 | * the USB data endpoint maximum packet size. | ||
| 419 | * @note The default is 256 bytes for both the transmission and receive | ||
| 420 | * buffers. | ||
| 421 | */ | ||
| 422 | #if !defined(SERIAL_USB_BUFFERS_SIZE) || defined(__DOXYGEN__) | ||
| 423 | #define SERIAL_USB_BUFFERS_SIZE 256 | ||
| 424 | #endif | ||
| 425 | |||
| 426 | /** | ||
| 427 | * @brief Serial over USB number of buffers. | ||
| 428 | * @note The default is 2 buffers. | ||
| 429 | */ | ||
| 430 | #if !defined(SERIAL_USB_BUFFERS_NUMBER) || defined(__DOXYGEN__) | ||
| 431 | #define SERIAL_USB_BUFFERS_NUMBER 2 | ||
| 432 | #endif | ||
| 433 | |||
| 434 | /*===========================================================================*/ | ||
| 435 | /* SPI driver related settings. */ | ||
| 436 | /*===========================================================================*/ | ||
| 437 | |||
| 438 | /** | ||
| 439 | * @brief Enables synchronous APIs. | ||
| 440 | * @note Disabling this option saves both code and data space. | ||
| 441 | */ | ||
| 442 | #if !defined(SPI_USE_WAIT) || defined(__DOXYGEN__) | ||
| 443 | #define SPI_USE_WAIT TRUE | ||
| 444 | #endif | ||
| 445 | |||
| 446 | /** | ||
| 447 | * @brief Enables circular transfers APIs. | ||
| 448 | * @note Disabling this option saves both code and data space. | ||
| 449 | */ | ||
| 450 | #if !defined(SPI_USE_CIRCULAR) || defined(__DOXYGEN__) | ||
| 451 | #define SPI_USE_CIRCULAR FALSE | ||
| 452 | #endif | ||
| 453 | |||
| 454 | |||
| 455 | /** | ||
| 456 | * @brief Enables the @p spiAcquireBus() and @p spiReleaseBus() APIs. | ||
| 457 | * @note Disabling this option saves both code and data space. | ||
| 458 | */ | ||
| 459 | #if !defined(SPI_USE_MUTUAL_EXCLUSION) || defined(__DOXYGEN__) | ||
| 460 | #define SPI_USE_MUTUAL_EXCLUSION TRUE | ||
| 461 | #endif | ||
| 462 | |||
| 463 | /** | ||
| 464 | * @brief Handling method for SPI CS line. | ||
| 465 | * @note Disabling this option saves both code and data space. | ||
| 466 | */ | ||
| 467 | #if !defined(SPI_SELECT_MODE) || defined(__DOXYGEN__) | ||
| 468 | #define SPI_SELECT_MODE SPI_SELECT_MODE_PAD | ||
| 469 | #endif | ||
| 470 | |||
| 471 | /*===========================================================================*/ | ||
| 472 | /* UART driver related settings. */ | ||
| 473 | /*===========================================================================*/ | ||
| 474 | |||
| 475 | /** | ||
| 476 | * @brief Enables synchronous APIs. | ||
| 477 | * @note Disabling this option saves both code and data space. | ||
| 478 | */ | ||
| 479 | #if !defined(UART_USE_WAIT) || defined(__DOXYGEN__) | ||
| 480 | #define UART_USE_WAIT FALSE | ||
| 481 | #endif | ||
| 482 | |||
| 483 | /** | ||
| 484 | * @brief Enables the @p uartAcquireBus() and @p uartReleaseBus() APIs. | ||
| 485 | * @note Disabling this option saves both code and data space. | ||
| 486 | */ | ||
| 487 | #if !defined(UART_USE_MUTUAL_EXCLUSION) || defined(__DOXYGEN__) | ||
| 488 | #define UART_USE_MUTUAL_EXCLUSION FALSE | ||
| 489 | #endif | ||
| 490 | |||
| 491 | /*===========================================================================*/ | ||
| 492 | /* USB driver related settings. */ | ||
| 493 | /*===========================================================================*/ | ||
| 494 | |||
| 495 | /** | ||
| 496 | * @brief Enables synchronous APIs. | ||
| 497 | * @note Disabling this option saves both code and data space. | ||
| 498 | */ | ||
| 499 | #if !defined(USB_USE_WAIT) || defined(__DOXYGEN__) | ||
| 500 | #define USB_USE_WAIT TRUE | ||
| 501 | #endif | ||
| 502 | |||
| 503 | /*===========================================================================*/ | ||
| 504 | /* WSPI driver related settings. */ | ||
| 505 | /*===========================================================================*/ | ||
| 506 | |||
| 507 | /** | ||
| 508 | * @brief Enables synchronous APIs. | ||
| 509 | * @note Disabling this option saves both code and data space. | ||
| 510 | */ | ||
| 511 | #if !defined(WSPI_USE_WAIT) || defined(__DOXYGEN__) | ||
| 512 | #define WSPI_USE_WAIT TRUE | ||
| 513 | #endif | ||
| 514 | |||
| 515 | /** | ||
| 516 | * @brief Enables the @p wspiAcquireBus() and @p wspiReleaseBus() APIs. | ||
| 517 | * @note Disabling this option saves both code and data space. | ||
| 518 | */ | 15 | */ |
| 519 | #if !defined(WSPI_USE_MUTUAL_EXCLUSION) || defined(__DOXYGEN__) | 16 | #pragma once |
| 520 | #define WSPI_USE_MUTUAL_EXCLUSION TRUE | ||
| 521 | #endif | ||
| 522 | 17 | ||
| 523 | #endif /* HALCONF_H */ | 18 | #define HAL_USE_I2C TRUE |
| 524 | 19 | ||
| 525 | /** @} */ | 20 | #include_next "halconf.h" |
diff --git a/keyboards/handwired/onekey/blackpill_f401/mcuconf.h b/keyboards/handwired/onekey/blackpill_f401/mcuconf.h index ba6e934fe..33e07847b 100644 --- a/keyboards/handwired/onekey/blackpill_f401/mcuconf.h +++ b/keyboards/handwired/onekey/blackpill_f401/mcuconf.h | |||
| @@ -1,253 +1,21 @@ | |||
| 1 | /* | 1 | /* Copyright 2020 Nick Brassel (tzarc) |
| 2 | ChibiOS - Copyright (C) 2006..2018 Giovanni Di Sirio | ||
| 3 | |||
| 4 | Licensed under the Apache License, Version 2.0 (the "License"); | ||
| 5 | you may not use this file except in compliance with the License. | ||
| 6 | You may obtain a copy of the License at | ||
| 7 | |||
| 8 | http://www.apache.org/licenses/LICENSE-2.0 | ||
| 9 | |||
| 10 | Unless required by applicable law or agreed to in writing, software | ||
| 11 | distributed under the License is distributed on an "AS IS" BASIS, | ||
| 12 | WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. | ||
| 13 | See the License for the specific language governing permissions and | ||
| 14 | limitations under the License. | ||
| 15 | */ | ||
| 16 | |||
| 17 | #ifndef MCUCONF_H | ||
| 18 | #define MCUCONF_H | ||
| 19 | |||
| 20 | /* | ||
| 21 | * STM32F4xx drivers configuration. | ||
| 22 | * The following settings override the default settings present in | ||
| 23 | * the various device driver implementation headers. | ||
| 24 | * Note that the settings for each driver only have effect if the whole | ||
| 25 | * driver is enabled in halconf.h. | ||
| 26 | * | 2 | * |
| 27 | * IRQ priorities: | 3 | * This program is free software: you can redistribute it and/or modify |
| 28 | * 15...0 Lowest...Highest. | 4 | * it under the terms of the GNU General Public License as published by |
| 5 | * the Free Software Foundation, either version 3 of the License, or | ||
| 6 | * (at your option) any later version. | ||
| 29 | * | 7 | * |
| 30 | * DMA priorities: | 8 | * This program is distributed in the hope that it will be useful, |
| 31 | * 0...3 Lowest...Highest. | 9 | * but WITHOUT ANY WARRANTY; without even the implied warranty of |
| 32 | */ | 10 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the |
| 33 | 11 | * GNU General Public License for more details. | |
| 34 | #define STM32F4xx_MCUCONF | 12 | * |
| 35 | 13 | * You should have received a copy of the GNU General Public License | |
| 36 | /* | 14 | * along with this program. If not, see <https://www.gnu.org/licenses/>. |
| 37 | * HAL driver system settings. | ||
| 38 | */ | ||
| 39 | #define STM32_NO_INIT FALSE | ||
| 40 | #define STM32_HSI_ENABLED TRUE | ||
| 41 | #define STM32_LSI_ENABLED TRUE | ||
| 42 | #define STM32_HSE_ENABLED TRUE | ||
| 43 | #define STM32_LSE_ENABLED FALSE | ||
| 44 | #define STM32_CLOCK48_REQUIRED TRUE | ||
| 45 | #define STM32_SW STM32_SW_PLL | ||
| 46 | #define STM32_PLLSRC STM32_PLLSRC_HSE | ||
| 47 | #define STM32_PLLM_VALUE 25 | ||
| 48 | #define STM32_PLLN_VALUE 336 | ||
| 49 | #define STM32_PLLP_VALUE 4 | ||
| 50 | #define STM32_PLLQ_VALUE 7 | ||
| 51 | #define STM32_HPRE STM32_HPRE_DIV1 | ||
| 52 | #define STM32_PPRE1 STM32_PPRE1_DIV4 | ||
| 53 | #define STM32_PPRE2 STM32_PPRE2_DIV2 | ||
| 54 | #define STM32_RTCSEL STM32_RTCSEL_LSI | ||
| 55 | #define STM32_RTCPRE_VALUE 8 | ||
| 56 | #define STM32_MCO1SEL STM32_MCO1SEL_HSI | ||
| 57 | #define STM32_MCO1PRE STM32_MCO1PRE_DIV1 | ||
| 58 | #define STM32_MCO2SEL STM32_MCO2SEL_SYSCLK | ||
| 59 | #define STM32_MCO2PRE STM32_MCO2PRE_DIV5 | ||
| 60 | #define STM32_I2SSRC STM32_I2SSRC_CKIN | ||
| 61 | #define STM32_PLLI2SN_VALUE 192 | ||
| 62 | #define STM32_PLLI2SR_VALUE 5 | ||
| 63 | #define STM32_PVD_ENABLE FALSE | ||
| 64 | #define STM32_PLS STM32_PLS_LEV0 | ||
| 65 | #define STM32_BKPRAM_ENABLE FALSE | ||
| 66 | |||
| 67 | /* | ||
| 68 | * IRQ system settings. | ||
| 69 | */ | ||
| 70 | #define STM32_IRQ_EXTI0_PRIORITY 6 | ||
| 71 | #define STM32_IRQ_EXTI1_PRIORITY 6 | ||
| 72 | #define STM32_IRQ_EXTI2_PRIORITY 6 | ||
| 73 | #define STM32_IRQ_EXTI3_PRIORITY 6 | ||
| 74 | #define STM32_IRQ_EXTI4_PRIORITY 6 | ||
| 75 | #define STM32_IRQ_EXTI5_9_PRIORITY 6 | ||
| 76 | #define STM32_IRQ_EXTI10_15_PRIORITY 6 | ||
| 77 | #define STM32_IRQ_EXTI16_PRIORITY 6 | ||
| 78 | #define STM32_IRQ_EXTI17_PRIORITY 15 | ||
| 79 | #define STM32_IRQ_EXTI18_PRIORITY 6 | ||
| 80 | #define STM32_IRQ_EXTI19_PRIORITY 6 | ||
| 81 | #define STM32_IRQ_EXTI20_PRIORITY 6 | ||
| 82 | #define STM32_IRQ_EXTI21_PRIORITY 15 | ||
| 83 | #define STM32_IRQ_EXTI22_PRIORITY 15 | ||
| 84 | |||
| 85 | /* | ||
| 86 | * ADC driver system settings. | ||
| 87 | */ | ||
| 88 | #define STM32_ADC_ADCPRE ADC_CCR_ADCPRE_DIV4 | ||
| 89 | #define STM32_ADC_USE_ADC1 FALSE | ||
| 90 | #define STM32_ADC_ADC1_DMA_STREAM STM32_DMA_STREAM_ID(2, 4) | ||
| 91 | #define STM32_ADC_ADC1_DMA_PRIORITY 2 | ||
| 92 | #define STM32_ADC_IRQ_PRIORITY 6 | ||
| 93 | #define STM32_ADC_ADC1_DMA_IRQ_PRIORITY 6 | ||
| 94 | |||
| 95 | /* | ||
| 96 | * GPT driver system settings. | ||
| 97 | */ | ||
| 98 | #define STM32_GPT_USE_TIM1 FALSE | ||
| 99 | #define STM32_GPT_USE_TIM2 FALSE | ||
| 100 | #define STM32_GPT_USE_TIM3 FALSE | ||
| 101 | #define STM32_GPT_USE_TIM4 FALSE | ||
| 102 | #define STM32_GPT_USE_TIM5 FALSE | ||
| 103 | #define STM32_GPT_USE_TIM9 FALSE | ||
| 104 | #define STM32_GPT_USE_TIM11 FALSE | ||
| 105 | #define STM32_GPT_TIM1_IRQ_PRIORITY 7 | ||
| 106 | #define STM32_GPT_TIM2_IRQ_PRIORITY 7 | ||
| 107 | #define STM32_GPT_TIM3_IRQ_PRIORITY 7 | ||
| 108 | #define STM32_GPT_TIM4_IRQ_PRIORITY 7 | ||
| 109 | #define STM32_GPT_TIM5_IRQ_PRIORITY 7 | ||
| 110 | #define STM32_GPT_TIM9_IRQ_PRIORITY 7 | ||
| 111 | #define STM32_GPT_TIM11_IRQ_PRIORITY 7 | ||
| 112 | |||
| 113 | /* | ||
| 114 | * I2C driver system settings. | ||
| 115 | */ | ||
| 116 | #define STM32_I2C_USE_I2C1 FALSE | ||
| 117 | #define STM32_I2C_USE_I2C2 FALSE | ||
| 118 | #define STM32_I2C_USE_I2C3 FALSE | ||
| 119 | #define STM32_I2C_BUSY_TIMEOUT 50 | ||
| 120 | #define STM32_I2C_I2C1_RX_DMA_STREAM STM32_DMA_STREAM_ID(1, 0) | ||
| 121 | #define STM32_I2C_I2C1_TX_DMA_STREAM STM32_DMA_STREAM_ID(1, 6) | ||
| 122 | #define STM32_I2C_I2C2_RX_DMA_STREAM STM32_DMA_STREAM_ID(1, 2) | ||
| 123 | #define STM32_I2C_I2C2_TX_DMA_STREAM STM32_DMA_STREAM_ID(1, 7) | ||
| 124 | #define STM32_I2C_I2C3_RX_DMA_STREAM STM32_DMA_STREAM_ID(1, 2) | ||
| 125 | #define STM32_I2C_I2C3_TX_DMA_STREAM STM32_DMA_STREAM_ID(1, 4) | ||
| 126 | #define STM32_I2C_I2C1_IRQ_PRIORITY 5 | ||
| 127 | #define STM32_I2C_I2C2_IRQ_PRIORITY 5 | ||
| 128 | #define STM32_I2C_I2C3_IRQ_PRIORITY 5 | ||
| 129 | #define STM32_I2C_I2C1_DMA_PRIORITY 3 | ||
| 130 | #define STM32_I2C_I2C2_DMA_PRIORITY 3 | ||
| 131 | #define STM32_I2C_I2C3_DMA_PRIORITY 3 | ||
| 132 | #define STM32_I2C_DMA_ERROR_HOOK(i2cp) osalSysHalt("DMA failure") | ||
| 133 | |||
| 134 | /* | ||
| 135 | * I2S driver system settings. | ||
| 136 | */ | ||
| 137 | #define STM32_I2S_USE_SPI2 FALSE | ||
| 138 | #define STM32_I2S_USE_SPI3 FALSE | ||
| 139 | #define STM32_I2S_SPI2_IRQ_PRIORITY 10 | ||
| 140 | #define STM32_I2S_SPI3_IRQ_PRIORITY 10 | ||
| 141 | #define STM32_I2S_SPI2_DMA_PRIORITY 1 | ||
| 142 | #define STM32_I2S_SPI3_DMA_PRIORITY 1 | ||
| 143 | #define STM32_I2S_SPI2_RX_DMA_STREAM STM32_DMA_STREAM_ID(1, 3) | ||
| 144 | #define STM32_I2S_SPI2_TX_DMA_STREAM STM32_DMA_STREAM_ID(1, 4) | ||
| 145 | #define STM32_I2S_SPI3_RX_DMA_STREAM STM32_DMA_STREAM_ID(1, 0) | ||
| 146 | #define STM32_I2S_SPI3_TX_DMA_STREAM STM32_DMA_STREAM_ID(1, 7) | ||
| 147 | #define STM32_I2S_DMA_ERROR_HOOK(i2sp) osalSysHalt("DMA failure") | ||
| 148 | |||
| 149 | /* | ||
| 150 | * ICU driver system settings. | ||
| 151 | */ | ||
| 152 | #define STM32_ICU_USE_TIM1 FALSE | ||
| 153 | #define STM32_ICU_USE_TIM2 FALSE | ||
| 154 | #define STM32_ICU_USE_TIM3 FALSE | ||
| 155 | #define STM32_ICU_USE_TIM4 FALSE | ||
| 156 | #define STM32_ICU_USE_TIM5 FALSE | ||
| 157 | #define STM32_ICU_USE_TIM9 FALSE | ||
| 158 | #define STM32_ICU_TIM1_IRQ_PRIORITY 7 | ||
| 159 | #define STM32_ICU_TIM2_IRQ_PRIORITY 7 | ||
| 160 | #define STM32_ICU_TIM3_IRQ_PRIORITY 7 | ||
| 161 | #define STM32_ICU_TIM4_IRQ_PRIORITY 7 | ||
| 162 | #define STM32_ICU_TIM5_IRQ_PRIORITY 7 | ||
| 163 | #define STM32_ICU_TIM9_IRQ_PRIORITY 7 | ||
| 164 | |||
| 165 | /* | ||
| 166 | * PWM driver system settings. | ||
| 167 | */ | ||
| 168 | #define STM32_PWM_USE_ADVANCED FALSE | ||
| 169 | #define STM32_PWM_USE_TIM1 FALSE | ||
| 170 | #define STM32_PWM_USE_TIM2 FALSE | ||
| 171 | #define STM32_PWM_USE_TIM3 FALSE | ||
| 172 | #define STM32_PWM_USE_TIM4 FALSE | ||
| 173 | #define STM32_PWM_USE_TIM5 FALSE | ||
| 174 | #define STM32_PWM_USE_TIM9 FALSE | ||
| 175 | #define STM32_PWM_TIM1_IRQ_PRIORITY 7 | ||
| 176 | #define STM32_PWM_TIM2_IRQ_PRIORITY 7 | ||
| 177 | #define STM32_PWM_TIM3_IRQ_PRIORITY 7 | ||
| 178 | #define STM32_PWM_TIM4_IRQ_PRIORITY 7 | ||
| 179 | #define STM32_PWM_TIM5_IRQ_PRIORITY 7 | ||
| 180 | #define STM32_PWM_TIM9_IRQ_PRIORITY 7 | ||
| 181 | |||
| 182 | /* | ||
| 183 | * SERIAL driver system settings. | ||
| 184 | */ | ||
| 185 | #define STM32_SERIAL_USE_USART1 FALSE | ||
| 186 | #define STM32_SERIAL_USE_USART2 FALSE | ||
| 187 | #define STM32_SERIAL_USE_USART6 FALSE | ||
| 188 | #define STM32_SERIAL_USART1_PRIORITY 12 | ||
| 189 | #define STM32_SERIAL_USART2_PRIORITY 12 | ||
| 190 | #define STM32_SERIAL_USART6_PRIORITY 12 | ||
| 191 | |||
| 192 | /* | ||
| 193 | * SPI driver system settings. | ||
| 194 | */ | ||
| 195 | #define STM32_SPI_USE_SPI1 FALSE | ||
| 196 | #define STM32_SPI_USE_SPI2 FALSE | ||
| 197 | #define STM32_SPI_USE_SPI3 FALSE | ||
| 198 | #define STM32_SPI_SPI1_RX_DMA_STREAM STM32_DMA_STREAM_ID(2, 0) | ||
| 199 | #define STM32_SPI_SPI1_TX_DMA_STREAM STM32_DMA_STREAM_ID(2, 3) | ||
| 200 | #define STM32_SPI_SPI2_RX_DMA_STREAM STM32_DMA_STREAM_ID(1, 3) | ||
| 201 | #define STM32_SPI_SPI2_TX_DMA_STREAM STM32_DMA_STREAM_ID(1, 4) | ||
| 202 | #define STM32_SPI_SPI3_RX_DMA_STREAM STM32_DMA_STREAM_ID(1, 0) | ||
| 203 | #define STM32_SPI_SPI3_TX_DMA_STREAM STM32_DMA_STREAM_ID(1, 7) | ||
| 204 | #define STM32_SPI_SPI1_DMA_PRIORITY 1 | ||
| 205 | #define STM32_SPI_SPI2_DMA_PRIORITY 1 | ||
| 206 | #define STM32_SPI_SPI3_DMA_PRIORITY 1 | ||
| 207 | #define STM32_SPI_SPI1_IRQ_PRIORITY 10 | ||
| 208 | #define STM32_SPI_SPI2_IRQ_PRIORITY 10 | ||
| 209 | #define STM32_SPI_SPI3_IRQ_PRIORITY 10 | ||
| 210 | #define STM32_SPI_DMA_ERROR_HOOK(spip) osalSysHalt("DMA failure") | ||
| 211 | |||
| 212 | /* | ||
| 213 | * ST driver system settings. | ||
| 214 | */ | ||
| 215 | #define STM32_ST_IRQ_PRIORITY 8 | ||
| 216 | #define STM32_ST_USE_TIMER 2 | ||
| 217 | |||
| 218 | /* | ||
| 219 | * UART driver system settings. | ||
| 220 | */ | ||
| 221 | #define STM32_UART_USE_USART1 FALSE | ||
| 222 | #define STM32_UART_USE_USART2 FALSE | ||
| 223 | #define STM32_UART_USE_USART6 FALSE | ||
| 224 | #define STM32_UART_USART1_RX_DMA_STREAM STM32_DMA_STREAM_ID(2, 5) | ||
| 225 | #define STM32_UART_USART1_TX_DMA_STREAM STM32_DMA_STREAM_ID(2, 7) | ||
| 226 | #define STM32_UART_USART2_RX_DMA_STREAM STM32_DMA_STREAM_ID(1, 5) | ||
| 227 | #define STM32_UART_USART2_TX_DMA_STREAM STM32_DMA_STREAM_ID(1, 6) | ||
| 228 | #define STM32_UART_USART6_RX_DMA_STREAM STM32_DMA_STREAM_ID(2, 2) | ||
| 229 | #define STM32_UART_USART6_TX_DMA_STREAM STM32_DMA_STREAM_ID(2, 7) | ||
| 230 | #define STM32_UART_USART1_IRQ_PRIORITY 12 | ||
| 231 | #define STM32_UART_USART2_IRQ_PRIORITY 12 | ||
| 232 | #define STM32_UART_USART6_IRQ_PRIORITY 12 | ||
| 233 | #define STM32_UART_USART1_DMA_PRIORITY 0 | ||
| 234 | #define STM32_UART_USART2_DMA_PRIORITY 0 | ||
| 235 | #define STM32_UART_USART6_DMA_PRIORITY 0 | ||
| 236 | #define STM32_UART_DMA_ERROR_HOOK(uartp) osalSysHalt("DMA failure") | ||
| 237 | |||
| 238 | /* | ||
| 239 | * USB driver system settings. | ||
| 240 | */ | 15 | */ |
| 241 | #define STM32_USB_USE_OTG1 TRUE | 16 | #pragma once |
| 242 | #define STM32_USB_OTG1_IRQ_PRIORITY 14 | ||
| 243 | #define STM32_USB_OTG1_RX_FIFO_SIZE 512 | ||
| 244 | #define STM32_USB_OTG_THREAD_PRIO NORMALPRIO+1 | ||
| 245 | #define STM32_USB_OTG_THREAD_STACK_SIZE 128 | ||
| 246 | #define STM32_USB_OTGFIFO_FILL_BASEPRI 0 | ||
| 247 | 17 | ||
| 248 | /* | 18 | #include_next "mcuconf.h" |
| 249 | * WDG driver system settings. | ||
| 250 | */ | ||
| 251 | #define STM32_WDG_USE_IWDG FALSE | ||
| 252 | 19 | ||
| 253 | #endif /* MCUCONF_H */ | 20 | #undef STM32_I2C_USE_I2C1 |
| 21 | #define STM32_I2C_USE_I2C1 TRUE | ||
diff --git a/keyboards/handwired/onekey/blackpill_f411/halconf.h b/keyboards/handwired/onekey/blackpill_f411/halconf.h index a8db392aa..d73c214ec 100644 --- a/keyboards/handwired/onekey/blackpill_f411/halconf.h +++ b/keyboards/handwired/onekey/blackpill_f411/halconf.h | |||
| @@ -1,525 +1,20 @@ | |||
| 1 | /* | 1 | /* Copyright 2020 Nick Brassel (tzarc) |
| 2 | ChibiOS - Copyright (C) 2006..2018 Giovanni Di Sirio | ||
| 3 | |||
| 4 | Licensed under the Apache License, Version 2.0 (the "License"); | ||
| 5 | you may not use this file except in compliance with the License. | ||
| 6 | You may obtain a copy of the License at | ||
| 7 | |||
| 8 | http://www.apache.org/licenses/LICENSE-2.0 | ||
| 9 | |||
| 10 | Unless required by applicable law or agreed to in writing, software | ||
| 11 | distributed under the License is distributed on an "AS IS" BASIS, | ||
| 12 | WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. | ||
| 13 | See the License for the specific language governing permissions and | ||
| 14 | limitations under the License. | ||
| 15 | */ | ||
| 16 | |||
| 17 | /** | ||
| 18 | * @file templates/halconf.h | ||
| 19 | * @brief HAL configuration header. | ||
| 20 | * @details HAL configuration file, this file allows to enable or disable the | ||
| 21 | * various device drivers from your application. You may also use | ||
| 22 | * this file in order to override the device drivers default settings. | ||
| 23 | * | 2 | * |
| 24 | * @addtogroup HAL_CONF | 3 | * This program is free software: you can redistribute it and/or modify |
| 25 | * @{ | 4 | * it under the terms of the GNU General Public License as published by |
| 26 | */ | 5 | * the Free Software Foundation, either version 3 of the License, or |
| 27 | 6 | * (at your option) any later version. | |
| 28 | #ifndef HALCONF_H | 7 | * |
| 29 | #define HALCONF_H | 8 | * This program is distributed in the hope that it will be useful, |
| 30 | 9 | * but WITHOUT ANY WARRANTY; without even the implied warranty of | |
| 31 | #define _CHIBIOS_HAL_CONF_ | 10 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the |
| 32 | #define _CHIBIOS_HAL_CONF_VER_7_0_ | 11 | * GNU General Public License for more details. |
| 33 | 12 | * | |
| 34 | #include "mcuconf.h" | 13 | * You should have received a copy of the GNU General Public License |
| 35 | 14 | * along with this program. If not, see <https://www.gnu.org/licenses/>. | |
| 36 | /** | ||
| 37 | * @brief Enables the PAL subsystem. | ||
| 38 | */ | ||
| 39 | #if !defined(HAL_USE_PAL) || defined(__DOXYGEN__) | ||
| 40 | #define HAL_USE_PAL TRUE | ||
| 41 | #endif | ||
| 42 | |||
| 43 | /** | ||
| 44 | * @brief Enables the ADC subsystem. | ||
| 45 | */ | ||
| 46 | #if !defined(HAL_USE_ADC) || defined(__DOXYGEN__) | ||
| 47 | #define HAL_USE_ADC FALSE | ||
| 48 | #endif | ||
| 49 | |||
| 50 | /** | ||
| 51 | * @brief Enables the CAN subsystem. | ||
| 52 | */ | ||
| 53 | #if !defined(HAL_USE_CAN) || defined(__DOXYGEN__) | ||
| 54 | #define HAL_USE_CAN FALSE | ||
| 55 | #endif | ||
| 56 | |||
| 57 | /** | ||
| 58 | * @brief Enables the cryptographic subsystem. | ||
| 59 | */ | ||
| 60 | #if !defined(HAL_USE_CRY) || defined(__DOXYGEN__) | ||
| 61 | #define HAL_USE_CRY FALSE | ||
| 62 | #endif | ||
| 63 | |||
| 64 | /** | ||
| 65 | * @brief Enables the DAC subsystem. | ||
| 66 | */ | ||
| 67 | #if !defined(HAL_USE_DAC) || defined(__DOXYGEN__) | ||
| 68 | #define HAL_USE_DAC FALSE | ||
| 69 | #endif | ||
| 70 | |||
| 71 | /** | ||
| 72 | * @brief Enables the GPT subsystem. | ||
| 73 | */ | ||
| 74 | #if !defined(HAL_USE_GPT) || defined(__DOXYGEN__) | ||
| 75 | #define HAL_USE_GPT FALSE | ||
| 76 | #endif | ||
| 77 | |||
| 78 | /** | ||
| 79 | * @brief Enables the I2C subsystem. | ||
| 80 | */ | ||
| 81 | #if !defined(HAL_USE_I2C) || defined(__DOXYGEN__) | ||
| 82 | #define HAL_USE_I2C FALSE | ||
| 83 | #endif | ||
| 84 | |||
| 85 | /** | ||
| 86 | * @brief Enables the I2S subsystem. | ||
| 87 | */ | ||
| 88 | #if !defined(HAL_USE_I2S) || defined(__DOXYGEN__) | ||
| 89 | #define HAL_USE_I2S FALSE | ||
| 90 | #endif | ||
| 91 | |||
| 92 | /** | ||
| 93 | * @brief Enables the ICU subsystem. | ||
| 94 | */ | ||
| 95 | #if !defined(HAL_USE_ICU) || defined(__DOXYGEN__) | ||
| 96 | #define HAL_USE_ICU FALSE | ||
| 97 | #endif | ||
| 98 | |||
| 99 | /** | ||
| 100 | * @brief Enables the MAC subsystem. | ||
| 101 | */ | ||
| 102 | #if !defined(HAL_USE_MAC) || defined(__DOXYGEN__) | ||
| 103 | #define HAL_USE_MAC FALSE | ||
| 104 | #endif | ||
| 105 | |||
| 106 | /** | ||
| 107 | * @brief Enables the MMC_SPI subsystem. | ||
| 108 | */ | ||
| 109 | #if !defined(HAL_USE_MMC_SPI) || defined(__DOXYGEN__) | ||
| 110 | #define HAL_USE_MMC_SPI FALSE | ||
| 111 | #endif | ||
| 112 | |||
| 113 | /** | ||
| 114 | * @brief Enables the PWM subsystem. | ||
| 115 | */ | ||
| 116 | #if !defined(HAL_USE_PWM) || defined(__DOXYGEN__) | ||
| 117 | #define HAL_USE_PWM FALSE | ||
| 118 | #endif | ||
| 119 | |||
| 120 | /** | ||
| 121 | * @brief Enables the RTC subsystem. | ||
| 122 | */ | ||
| 123 | #if !defined(HAL_USE_RTC) || defined(__DOXYGEN__) | ||
| 124 | #define HAL_USE_RTC FALSE | ||
| 125 | #endif | ||
| 126 | |||
| 127 | /** | ||
| 128 | * @brief Enables the SDC subsystem. | ||
| 129 | */ | ||
| 130 | #if !defined(HAL_USE_SDC) || defined(__DOXYGEN__) | ||
| 131 | #define HAL_USE_SDC FALSE | ||
| 132 | #endif | ||
| 133 | |||
| 134 | /** | ||
| 135 | * @brief Enables the SERIAL subsystem. | ||
| 136 | */ | ||
| 137 | #if !defined(HAL_USE_SERIAL) || defined(__DOXYGEN__) | ||
| 138 | #define HAL_USE_SERIAL FALSE | ||
| 139 | #endif | ||
| 140 | |||
| 141 | /** | ||
| 142 | * @brief Enables the SERIAL over USB subsystem. | ||
| 143 | */ | ||
| 144 | #if !defined(HAL_USE_SERIAL_USB) || defined(__DOXYGEN__) | ||
| 145 | #define HAL_USE_SERIAL_USB FALSE | ||
| 146 | #endif | ||
| 147 | |||
| 148 | /** | ||
| 149 | * @brief Enables the SIO subsystem. | ||
| 150 | */ | ||
| 151 | #if !defined(HAL_USE_SIO) || defined(__DOXYGEN__) | ||
| 152 | #define HAL_USE_SIO FALSE | ||
| 153 | #endif | ||
| 154 | |||
| 155 | /** | ||
| 156 | * @brief Enables the SPI subsystem. | ||
| 157 | */ | ||
| 158 | #if !defined(HAL_USE_SPI) || defined(__DOXYGEN__) | ||
| 159 | #define HAL_USE_SPI FALSE | ||
| 160 | #endif | ||
| 161 | |||
| 162 | /** | ||
| 163 | * @brief Enables the TRNG subsystem. | ||
| 164 | */ | ||
| 165 | #if !defined(HAL_USE_TRNG) || defined(__DOXYGEN__) | ||
| 166 | #define HAL_USE_TRNG FALSE | ||
| 167 | #endif | ||
| 168 | |||
| 169 | /** | ||
| 170 | * @brief Enables the UART subsystem. | ||
| 171 | */ | ||
| 172 | #if !defined(HAL_USE_UART) || defined(__DOXYGEN__) | ||
| 173 | #define HAL_USE_UART FALSE | ||
| 174 | #endif | ||
| 175 | |||
| 176 | /** | ||
| 177 | * @brief Enables the USB subsystem. | ||
| 178 | */ | ||
| 179 | #if !defined(HAL_USE_USB) || defined(__DOXYGEN__) | ||
| 180 | #define HAL_USE_USB TRUE | ||
| 181 | #endif | ||
| 182 | |||
| 183 | /** | ||
| 184 | * @brief Enables the WDG subsystem. | ||
| 185 | */ | ||
| 186 | #if !defined(HAL_USE_WDG) || defined(__DOXYGEN__) | ||
| 187 | #define HAL_USE_WDG FALSE | ||
| 188 | #endif | ||
| 189 | |||
| 190 | /** | ||
| 191 | * @brief Enables the WSPI subsystem. | ||
| 192 | */ | ||
| 193 | #if !defined(HAL_USE_WSPI) || defined(__DOXYGEN__) | ||
| 194 | #define HAL_USE_WSPI FALSE | ||
| 195 | #endif | ||
| 196 | |||
| 197 | /*===========================================================================*/ | ||
| 198 | /* PAL driver related settings. */ | ||
| 199 | /*===========================================================================*/ | ||
| 200 | |||
| 201 | /** | ||
| 202 | * @brief Enables synchronous APIs. | ||
| 203 | * @note Disabling this option saves both code and data space. | ||
| 204 | */ | ||
| 205 | #if !defined(PAL_USE_CALLBACKS) || defined(__DOXYGEN__) | ||
| 206 | #define PAL_USE_CALLBACKS FALSE | ||
| 207 | #endif | ||
| 208 | |||
| 209 | /** | ||
| 210 | * @brief Enables synchronous APIs. | ||
| 211 | * @note Disabling this option saves both code and data space. | ||
| 212 | */ | ||
| 213 | #if !defined(PAL_USE_WAIT) || defined(__DOXYGEN__) | ||
| 214 | #define PAL_USE_WAIT FALSE | ||
| 215 | #endif | ||
| 216 | |||
| 217 | /*===========================================================================*/ | ||
| 218 | /* ADC driver related settings. */ | ||
| 219 | /*===========================================================================*/ | ||
| 220 | |||
| 221 | /** | ||
| 222 | * @brief Enables synchronous APIs. | ||
| 223 | * @note Disabling this option saves both code and data space. | ||
| 224 | */ | ||
| 225 | #if !defined(ADC_USE_WAIT) || defined(__DOXYGEN__) | ||
| 226 | #define ADC_USE_WAIT TRUE | ||
| 227 | #endif | ||
| 228 | |||
| 229 | /** | ||
| 230 | * @brief Enables the @p adcAcquireBus() and @p adcReleaseBus() APIs. | ||
| 231 | * @note Disabling this option saves both code and data space. | ||
| 232 | */ | ||
| 233 | #if !defined(ADC_USE_MUTUAL_EXCLUSION) || defined(__DOXYGEN__) | ||
| 234 | #define ADC_USE_MUTUAL_EXCLUSION TRUE | ||
| 235 | #endif | ||
| 236 | |||
| 237 | /*===========================================================================*/ | ||
| 238 | /* CAN driver related settings. */ | ||
| 239 | /*===========================================================================*/ | ||
| 240 | |||
| 241 | /** | ||
| 242 | * @brief Sleep mode related APIs inclusion switch. | ||
| 243 | */ | ||
| 244 | #if !defined(CAN_USE_SLEEP_MODE) || defined(__DOXYGEN__) | ||
| 245 | #define CAN_USE_SLEEP_MODE TRUE | ||
| 246 | #endif | ||
| 247 | |||
| 248 | /** | ||
| 249 | * @brief Enforces the driver to use direct callbacks rather than OSAL events. | ||
| 250 | */ | ||
| 251 | #if !defined(CAN_ENFORCE_USE_CALLBACKS) || defined(__DOXYGEN__) | ||
| 252 | #define CAN_ENFORCE_USE_CALLBACKS FALSE | ||
| 253 | #endif | ||
| 254 | |||
| 255 | /*===========================================================================*/ | ||
| 256 | /* CRY driver related settings. */ | ||
| 257 | /*===========================================================================*/ | ||
| 258 | |||
| 259 | /** | ||
| 260 | * @brief Enables the SW fall-back of the cryptographic driver. | ||
| 261 | * @details When enabled, this option, activates a fall-back software | ||
| 262 | * implementation for algorithms not supported by the underlying | ||
| 263 | * hardware. | ||
| 264 | * @note Fall-back implementations may not be present for all algorithms. | ||
| 265 | */ | ||
| 266 | #if !defined(HAL_CRY_USE_FALLBACK) || defined(__DOXYGEN__) | ||
| 267 | #define HAL_CRY_USE_FALLBACK FALSE | ||
| 268 | #endif | ||
| 269 | |||
| 270 | /** | ||
| 271 | * @brief Makes the driver forcibly use the fall-back implementations. | ||
| 272 | */ | ||
| 273 | #if !defined(HAL_CRY_ENFORCE_FALLBACK) || defined(__DOXYGEN__) | ||
| 274 | #define HAL_CRY_ENFORCE_FALLBACK FALSE | ||
| 275 | #endif | ||
| 276 | |||
| 277 | /*===========================================================================*/ | ||
| 278 | /* DAC driver related settings. */ | ||
| 279 | /*===========================================================================*/ | ||
| 280 | |||
| 281 | /** | ||
| 282 | * @brief Enables synchronous APIs. | ||
| 283 | * @note Disabling this option saves both code and data space. | ||
| 284 | */ | ||
| 285 | #if !defined(DAC_USE_WAIT) || defined(__DOXYGEN__) | ||
| 286 | #define DAC_USE_WAIT TRUE | ||
| 287 | #endif | ||
| 288 | |||
| 289 | /** | ||
| 290 | * @brief Enables the @p dacAcquireBus() and @p dacReleaseBus() APIs. | ||
| 291 | * @note Disabling this option saves both code and data space. | ||
| 292 | */ | ||
| 293 | #if !defined(DAC_USE_MUTUAL_EXCLUSION) || defined(__DOXYGEN__) | ||
| 294 | #define DAC_USE_MUTUAL_EXCLUSION TRUE | ||
| 295 | #endif | ||
| 296 | |||
| 297 | /*===========================================================================*/ | ||
| 298 | /* I2C driver related settings. */ | ||
| 299 | /*===========================================================================*/ | ||
| 300 | |||
| 301 | /** | ||
| 302 | * @brief Enables the mutual exclusion APIs on the I2C bus. | ||
| 303 | */ | ||
| 304 | #if !defined(I2C_USE_MUTUAL_EXCLUSION) || defined(__DOXYGEN__) | ||
| 305 | #define I2C_USE_MUTUAL_EXCLUSION TRUE | ||
| 306 | #endif | ||
| 307 | |||
| 308 | /*===========================================================================*/ | ||
| 309 | /* MAC driver related settings. */ | ||
| 310 | /*===========================================================================*/ | ||
| 311 | |||
| 312 | /** | ||
| 313 | * @brief Enables the zero-copy API. | ||
| 314 | */ | ||
| 315 | #if !defined(MAC_USE_ZERO_COPY) || defined(__DOXYGEN__) | ||
| 316 | #define MAC_USE_ZERO_COPY FALSE | ||
| 317 | #endif | ||
| 318 | |||
| 319 | /** | ||
| 320 | * @brief Enables an event sources for incoming packets. | ||
| 321 | */ | ||
| 322 | #if !defined(MAC_USE_EVENTS) || defined(__DOXYGEN__) | ||
| 323 | #define MAC_USE_EVENTS TRUE | ||
| 324 | #endif | ||
| 325 | |||
| 326 | /*===========================================================================*/ | ||
| 327 | /* MMC_SPI driver related settings. */ | ||
| 328 | /*===========================================================================*/ | ||
| 329 | |||
| 330 | /** | ||
| 331 | * @brief Delays insertions. | ||
| 332 | * @details If enabled this options inserts delays into the MMC waiting | ||
| 333 | * routines releasing some extra CPU time for the threads with | ||
| 334 | * lower priority, this may slow down the driver a bit however. | ||
| 335 | * This option is recommended also if the SPI driver does not | ||
| 336 | * use a DMA channel and heavily loads the CPU. | ||
| 337 | */ | ||
| 338 | #if !defined(MMC_NICE_WAITING) || defined(__DOXYGEN__) | ||
| 339 | #define MMC_NICE_WAITING TRUE | ||
| 340 | #endif | ||
| 341 | |||
| 342 | /*===========================================================================*/ | ||
| 343 | /* SDC driver related settings. */ | ||
| 344 | /*===========================================================================*/ | ||
| 345 | |||
| 346 | /** | ||
| 347 | * @brief Number of initialization attempts before rejecting the card. | ||
| 348 | * @note Attempts are performed at 10mS intervals. | ||
| 349 | */ | ||
| 350 | #if !defined(SDC_INIT_RETRY) || defined(__DOXYGEN__) | ||
| 351 | #define SDC_INIT_RETRY 100 | ||
| 352 | #endif | ||
| 353 | |||
| 354 | /** | ||
| 355 | * @brief Include support for MMC cards. | ||
| 356 | * @note MMC support is not yet implemented so this option must be kept | ||
| 357 | * at @p FALSE. | ||
| 358 | */ | ||
| 359 | #if !defined(SDC_MMC_SUPPORT) || defined(__DOXYGEN__) | ||
| 360 | #define SDC_MMC_SUPPORT FALSE | ||
| 361 | #endif | ||
| 362 | |||
| 363 | /** | ||
| 364 | * @brief Delays insertions. | ||
| 365 | * @details If enabled this options inserts delays into the MMC waiting | ||
| 366 | * routines releasing some extra CPU time for the threads with | ||
| 367 | * lower priority, this may slow down the driver a bit however. | ||
| 368 | */ | ||
| 369 | #if !defined(SDC_NICE_WAITING) || defined(__DOXYGEN__) | ||
| 370 | #define SDC_NICE_WAITING TRUE | ||
| 371 | #endif | ||
| 372 | |||
| 373 | /** | ||
| 374 | * @brief OCR initialization constant for V20 cards. | ||
| 375 | */ | ||
| 376 | #if !defined(SDC_INIT_OCR_V20) || defined(__DOXYGEN__) | ||
| 377 | #define SDC_INIT_OCR_V20 0x50FF8000U | ||
| 378 | #endif | ||
| 379 | |||
| 380 | /** | ||
| 381 | * @brief OCR initialization constant for non-V20 cards. | ||
| 382 | */ | ||
| 383 | #if !defined(SDC_INIT_OCR) || defined(__DOXYGEN__) | ||
| 384 | #define SDC_INIT_OCR 0x80100000U | ||
| 385 | #endif | ||
| 386 | |||
| 387 | /*===========================================================================*/ | ||
| 388 | /* SERIAL driver related settings. */ | ||
| 389 | /*===========================================================================*/ | ||
| 390 | |||
| 391 | /** | ||
| 392 | * @brief Default bit rate. | ||
| 393 | * @details Configuration parameter, this is the baud rate selected for the | ||
| 394 | * default configuration. | ||
| 395 | */ | ||
| 396 | #if !defined(SERIAL_DEFAULT_BITRATE) || defined(__DOXYGEN__) | ||
| 397 | #define SERIAL_DEFAULT_BITRATE 38400 | ||
| 398 | #endif | ||
| 399 | |||
| 400 | /** | ||
| 401 | * @brief Serial buffers size. | ||
| 402 | * @details Configuration parameter, you can change the depth of the queue | ||
| 403 | * buffers depending on the requirements of your application. | ||
| 404 | * @note The default is 16 bytes for both the transmission and receive | ||
| 405 | * buffers. | ||
| 406 | */ | ||
| 407 | #if !defined(SERIAL_BUFFERS_SIZE) || defined(__DOXYGEN__) | ||
| 408 | #define SERIAL_BUFFERS_SIZE 16 | ||
| 409 | #endif | ||
| 410 | |||
| 411 | /*===========================================================================*/ | ||
| 412 | /* SERIAL_USB driver related setting. */ | ||
| 413 | /*===========================================================================*/ | ||
| 414 | |||
| 415 | /** | ||
| 416 | * @brief Serial over USB buffers size. | ||
| 417 | * @details Configuration parameter, the buffer size must be a multiple of | ||
| 418 | * the USB data endpoint maximum packet size. | ||
| 419 | * @note The default is 256 bytes for both the transmission and receive | ||
| 420 | * buffers. | ||
| 421 | */ | ||
| 422 | #if !defined(SERIAL_USB_BUFFERS_SIZE) || defined(__DOXYGEN__) | ||
| 423 | #define SERIAL_USB_BUFFERS_SIZE 256 | ||
| 424 | #endif | ||
| 425 | |||
| 426 | /** | ||
| 427 | * @brief Serial over USB number of buffers. | ||
| 428 | * @note The default is 2 buffers. | ||
| 429 | */ | ||
| 430 | #if !defined(SERIAL_USB_BUFFERS_NUMBER) || defined(__DOXYGEN__) | ||
| 431 | #define SERIAL_USB_BUFFERS_NUMBER 2 | ||
| 432 | #endif | ||
| 433 | |||
| 434 | /*===========================================================================*/ | ||
| 435 | /* SPI driver related settings. */ | ||
| 436 | /*===========================================================================*/ | ||
| 437 | |||
| 438 | /** | ||
| 439 | * @brief Enables synchronous APIs. | ||
| 440 | * @note Disabling this option saves both code and data space. | ||
| 441 | */ | ||
| 442 | #if !defined(SPI_USE_WAIT) || defined(__DOXYGEN__) | ||
| 443 | #define SPI_USE_WAIT TRUE | ||
| 444 | #endif | ||
| 445 | |||
| 446 | /** | ||
| 447 | * @brief Enables circular transfers APIs. | ||
| 448 | * @note Disabling this option saves both code and data space. | ||
| 449 | */ | ||
| 450 | #if !defined(SPI_USE_CIRCULAR) || defined(__DOXYGEN__) | ||
| 451 | #define SPI_USE_CIRCULAR FALSE | ||
| 452 | #endif | ||
| 453 | |||
| 454 | |||
| 455 | /** | ||
| 456 | * @brief Enables the @p spiAcquireBus() and @p spiReleaseBus() APIs. | ||
| 457 | * @note Disabling this option saves both code and data space. | ||
| 458 | */ | ||
| 459 | #if !defined(SPI_USE_MUTUAL_EXCLUSION) || defined(__DOXYGEN__) | ||
| 460 | #define SPI_USE_MUTUAL_EXCLUSION TRUE | ||
| 461 | #endif | ||
| 462 | |||
| 463 | /** | ||
| 464 | * @brief Handling method for SPI CS line. | ||
| 465 | * @note Disabling this option saves both code and data space. | ||
| 466 | */ | ||
| 467 | #if !defined(SPI_SELECT_MODE) || defined(__DOXYGEN__) | ||
| 468 | #define SPI_SELECT_MODE SPI_SELECT_MODE_PAD | ||
| 469 | #endif | ||
| 470 | |||
| 471 | /*===========================================================================*/ | ||
| 472 | /* UART driver related settings. */ | ||
| 473 | /*===========================================================================*/ | ||
| 474 | |||
| 475 | /** | ||
| 476 | * @brief Enables synchronous APIs. | ||
| 477 | * @note Disabling this option saves both code and data space. | ||
| 478 | */ | ||
| 479 | #if !defined(UART_USE_WAIT) || defined(__DOXYGEN__) | ||
| 480 | #define UART_USE_WAIT FALSE | ||
| 481 | #endif | ||
| 482 | |||
| 483 | /** | ||
| 484 | * @brief Enables the @p uartAcquireBus() and @p uartReleaseBus() APIs. | ||
| 485 | * @note Disabling this option saves both code and data space. | ||
| 486 | */ | ||
| 487 | #if !defined(UART_USE_MUTUAL_EXCLUSION) || defined(__DOXYGEN__) | ||
| 488 | #define UART_USE_MUTUAL_EXCLUSION FALSE | ||
| 489 | #endif | ||
| 490 | |||
| 491 | /*===========================================================================*/ | ||
| 492 | /* USB driver related settings. */ | ||
| 493 | /*===========================================================================*/ | ||
| 494 | |||
| 495 | /** | ||
| 496 | * @brief Enables synchronous APIs. | ||
| 497 | * @note Disabling this option saves both code and data space. | ||
| 498 | */ | ||
| 499 | #if !defined(USB_USE_WAIT) || defined(__DOXYGEN__) | ||
| 500 | #define USB_USE_WAIT TRUE | ||
| 501 | #endif | ||
| 502 | |||
| 503 | /*===========================================================================*/ | ||
| 504 | /* WSPI driver related settings. */ | ||
| 505 | /*===========================================================================*/ | ||
| 506 | |||
| 507 | /** | ||
| 508 | * @brief Enables synchronous APIs. | ||
| 509 | * @note Disabling this option saves both code and data space. | ||
| 510 | */ | ||
| 511 | #if !defined(WSPI_USE_WAIT) || defined(__DOXYGEN__) | ||
| 512 | #define WSPI_USE_WAIT TRUE | ||
| 513 | #endif | ||
| 514 | |||
| 515 | /** | ||
| 516 | * @brief Enables the @p wspiAcquireBus() and @p wspiReleaseBus() APIs. | ||
| 517 | * @note Disabling this option saves both code and data space. | ||
| 518 | */ | 15 | */ |
| 519 | #if !defined(WSPI_USE_MUTUAL_EXCLUSION) || defined(__DOXYGEN__) | 16 | #pragma once |
| 520 | #define WSPI_USE_MUTUAL_EXCLUSION TRUE | ||
| 521 | #endif | ||
| 522 | 17 | ||
| 523 | #endif /* HALCONF_H */ | 18 | #define HAL_USE_I2C TRUE |
| 524 | 19 | ||
| 525 | /** @} */ | 20 | #include_next "halconf.h" |
diff --git a/keyboards/handwired/onekey/blackpill_f411/mcuconf.h b/keyboards/handwired/onekey/blackpill_f411/mcuconf.h index 0394ff56b..33e07847b 100644 --- a/keyboards/handwired/onekey/blackpill_f411/mcuconf.h +++ b/keyboards/handwired/onekey/blackpill_f411/mcuconf.h | |||
| @@ -1,253 +1,21 @@ | |||
| 1 | /* | 1 | /* Copyright 2020 Nick Brassel (tzarc) |
| 2 | ChibiOS - Copyright (C) 2006..2018 Giovanni Di Sirio | ||
| 3 | |||
| 4 | Licensed under the Apache License, Version 2.0 (the "License"); | ||
| 5 | you may not use this file except in compliance with the License. | ||
| 6 | You may obtain a copy of the License at | ||
| 7 | |||
| 8 | http://www.apache.org/licenses/LICENSE-2.0 | ||
| 9 | |||
| 10 | Unless required by applicable law or agreed to in writing, software | ||
| 11 | distributed under the License is distributed on an "AS IS" BASIS, | ||
| 12 | WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. | ||
| 13 | See the License for the specific language governing permissions and | ||
| 14 | limitations under the License. | ||
| 15 | */ | ||
| 16 | |||
| 17 | #ifndef MCUCONF_H | ||
| 18 | #define MCUCONF_H | ||
| 19 | |||
| 20 | /* | ||
| 21 | * STM32F4xx drivers configuration. | ||
| 22 | * The following settings override the default settings present in | ||
| 23 | * the various device driver implementation headers. | ||
| 24 | * Note that the settings for each driver only have effect if the whole | ||
| 25 | * driver is enabled in halconf.h. | ||
| 26 | * | 2 | * |
| 27 | * IRQ priorities: | 3 | * This program is free software: you can redistribute it and/or modify |
| 28 | * 15...0 Lowest...Highest. | 4 | * it under the terms of the GNU General Public License as published by |
| 5 | * the Free Software Foundation, either version 3 of the License, or | ||
| 6 | * (at your option) any later version. | ||
| 29 | * | 7 | * |
| 30 | * DMA priorities: | 8 | * This program is distributed in the hope that it will be useful, |
| 31 | * 0...3 Lowest...Highest. | 9 | * but WITHOUT ANY WARRANTY; without even the implied warranty of |
| 32 | */ | 10 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the |
| 33 | 11 | * GNU General Public License for more details. | |
| 34 | #define STM32F4xx_MCUCONF | 12 | * |
| 35 | 13 | * You should have received a copy of the GNU General Public License | |
| 36 | /* | 14 | * along with this program. If not, see <https://www.gnu.org/licenses/>. |
| 37 | * HAL driver system settings. | ||
| 38 | */ | ||
| 39 | #define STM32_NO_INIT FALSE | ||
| 40 | #define STM32_HSI_ENABLED TRUE | ||
| 41 | #define STM32_LSI_ENABLED TRUE | ||
| 42 | #define STM32_HSE_ENABLED TRUE | ||
| 43 | #define STM32_LSE_ENABLED FALSE | ||
| 44 | #define STM32_CLOCK48_REQUIRED TRUE | ||
| 45 | #define STM32_SW STM32_SW_PLL | ||
| 46 | #define STM32_PLLSRC STM32_PLLSRC_HSE | ||
| 47 | #define STM32_PLLM_VALUE 25 | ||
| 48 | #define STM32_PLLN_VALUE 384 | ||
| 49 | #define STM32_PLLP_VALUE 4 | ||
| 50 | #define STM32_PLLQ_VALUE 8 | ||
| 51 | #define STM32_HPRE STM32_HPRE_DIV1 | ||
| 52 | #define STM32_PPRE1 STM32_PPRE1_DIV4 | ||
| 53 | #define STM32_PPRE2 STM32_PPRE2_DIV2 | ||
| 54 | #define STM32_RTCSEL STM32_RTCSEL_LSI | ||
| 55 | #define STM32_RTCPRE_VALUE 8 | ||
| 56 | #define STM32_MCO1SEL STM32_MCO1SEL_HSI | ||
| 57 | #define STM32_MCO1PRE STM32_MCO1PRE_DIV1 | ||
| 58 | #define STM32_MCO2SEL STM32_MCO2SEL_SYSCLK | ||
| 59 | #define STM32_MCO2PRE STM32_MCO2PRE_DIV5 | ||
| 60 | #define STM32_I2SSRC STM32_I2SSRC_CKIN | ||
| 61 | #define STM32_PLLI2SN_VALUE 192 | ||
| 62 | #define STM32_PLLI2SR_VALUE 5 | ||
| 63 | #define STM32_PVD_ENABLE FALSE | ||
| 64 | #define STM32_PLS STM32_PLS_LEV0 | ||
| 65 | #define STM32_BKPRAM_ENABLE FALSE | ||
| 66 | |||
| 67 | /* | ||
| 68 | * IRQ system settings. | ||
| 69 | */ | ||
| 70 | #define STM32_IRQ_EXTI0_PRIORITY 6 | ||
| 71 | #define STM32_IRQ_EXTI1_PRIORITY 6 | ||
| 72 | #define STM32_IRQ_EXTI2_PRIORITY 6 | ||
| 73 | #define STM32_IRQ_EXTI3_PRIORITY 6 | ||
| 74 | #define STM32_IRQ_EXTI4_PRIORITY 6 | ||
| 75 | #define STM32_IRQ_EXTI5_9_PRIORITY 6 | ||
| 76 | #define STM32_IRQ_EXTI10_15_PRIORITY 6 | ||
| 77 | #define STM32_IRQ_EXTI16_PRIORITY 6 | ||
| 78 | #define STM32_IRQ_EXTI17_PRIORITY 15 | ||
| 79 | #define STM32_IRQ_EXTI18_PRIORITY 6 | ||
| 80 | #define STM32_IRQ_EXTI19_PRIORITY 6 | ||
| 81 | #define STM32_IRQ_EXTI20_PRIORITY 6 | ||
| 82 | #define STM32_IRQ_EXTI21_PRIORITY 15 | ||
| 83 | #define STM32_IRQ_EXTI22_PRIORITY 15 | ||
| 84 | |||
| 85 | /* | ||
| 86 | * ADC driver system settings. | ||
| 87 | */ | ||
| 88 | #define STM32_ADC_ADCPRE ADC_CCR_ADCPRE_DIV4 | ||
| 89 | #define STM32_ADC_USE_ADC1 FALSE | ||
| 90 | #define STM32_ADC_ADC1_DMA_STREAM STM32_DMA_STREAM_ID(2, 4) | ||
| 91 | #define STM32_ADC_ADC1_DMA_PRIORITY 2 | ||
| 92 | #define STM32_ADC_IRQ_PRIORITY 6 | ||
| 93 | #define STM32_ADC_ADC1_DMA_IRQ_PRIORITY 6 | ||
| 94 | |||
| 95 | /* | ||
| 96 | * GPT driver system settings. | ||
| 97 | */ | ||
| 98 | #define STM32_GPT_USE_TIM1 FALSE | ||
| 99 | #define STM32_GPT_USE_TIM2 FALSE | ||
| 100 | #define STM32_GPT_USE_TIM3 FALSE | ||
| 101 | #define STM32_GPT_USE_TIM4 FALSE | ||
| 102 | #define STM32_GPT_USE_TIM5 FALSE | ||
| 103 | #define STM32_GPT_USE_TIM9 FALSE | ||
| 104 | #define STM32_GPT_USE_TIM11 FALSE | ||
| 105 | #define STM32_GPT_TIM1_IRQ_PRIORITY 7 | ||
| 106 | #define STM32_GPT_TIM2_IRQ_PRIORITY 7 | ||
| 107 | #define STM32_GPT_TIM3_IRQ_PRIORITY 7 | ||
| 108 | #define STM32_GPT_TIM4_IRQ_PRIORITY 7 | ||
| 109 | #define STM32_GPT_TIM5_IRQ_PRIORITY 7 | ||
| 110 | #define STM32_GPT_TIM9_IRQ_PRIORITY 7 | ||
| 111 | #define STM32_GPT_TIM11_IRQ_PRIORITY 7 | ||
| 112 | |||
| 113 | /* | ||
| 114 | * I2C driver system settings. | ||
| 115 | */ | ||
| 116 | #define STM32_I2C_USE_I2C1 FALSE | ||
| 117 | #define STM32_I2C_USE_I2C2 FALSE | ||
| 118 | #define STM32_I2C_USE_I2C3 FALSE | ||
| 119 | #define STM32_I2C_BUSY_TIMEOUT 50 | ||
| 120 | #define STM32_I2C_I2C1_RX_DMA_STREAM STM32_DMA_STREAM_ID(1, 0) | ||
| 121 | #define STM32_I2C_I2C1_TX_DMA_STREAM STM32_DMA_STREAM_ID(1, 6) | ||
| 122 | #define STM32_I2C_I2C2_RX_DMA_STREAM STM32_DMA_STREAM_ID(1, 2) | ||
| 123 | #define STM32_I2C_I2C2_TX_DMA_STREAM STM32_DMA_STREAM_ID(1, 7) | ||
| 124 | #define STM32_I2C_I2C3_RX_DMA_STREAM STM32_DMA_STREAM_ID(1, 2) | ||
| 125 | #define STM32_I2C_I2C3_TX_DMA_STREAM STM32_DMA_STREAM_ID(1, 4) | ||
| 126 | #define STM32_I2C_I2C1_IRQ_PRIORITY 5 | ||
| 127 | #define STM32_I2C_I2C2_IRQ_PRIORITY 5 | ||
| 128 | #define STM32_I2C_I2C3_IRQ_PRIORITY 5 | ||
| 129 | #define STM32_I2C_I2C1_DMA_PRIORITY 3 | ||
| 130 | #define STM32_I2C_I2C2_DMA_PRIORITY 3 | ||
| 131 | #define STM32_I2C_I2C3_DMA_PRIORITY 3 | ||
| 132 | #define STM32_I2C_DMA_ERROR_HOOK(i2cp) osalSysHalt("DMA failure") | ||
| 133 | |||
| 134 | /* | ||
| 135 | * I2S driver system settings. | ||
| 136 | */ | ||
| 137 | #define STM32_I2S_USE_SPI2 FALSE | ||
| 138 | #define STM32_I2S_USE_SPI3 FALSE | ||
| 139 | #define STM32_I2S_SPI2_IRQ_PRIORITY 10 | ||
| 140 | #define STM32_I2S_SPI3_IRQ_PRIORITY 10 | ||
| 141 | #define STM32_I2S_SPI2_DMA_PRIORITY 1 | ||
| 142 | #define STM32_I2S_SPI3_DMA_PRIORITY 1 | ||
| 143 | #define STM32_I2S_SPI2_RX_DMA_STREAM STM32_DMA_STREAM_ID(1, 3) | ||
| 144 | #define STM32_I2S_SPI2_TX_DMA_STREAM STM32_DMA_STREAM_ID(1, 4) | ||
| 145 | #define STM32_I2S_SPI3_RX_DMA_STREAM STM32_DMA_STREAM_ID(1, 0) | ||
| 146 | #define STM32_I2S_SPI3_TX_DMA_STREAM STM32_DMA_STREAM_ID(1, 7) | ||
| 147 | #define STM32_I2S_DMA_ERROR_HOOK(i2sp) osalSysHalt("DMA failure") | ||
| 148 | |||
| 149 | /* | ||
| 150 | * ICU driver system settings. | ||
| 151 | */ | ||
| 152 | #define STM32_ICU_USE_TIM1 FALSE | ||
| 153 | #define STM32_ICU_USE_TIM2 FALSE | ||
| 154 | #define STM32_ICU_USE_TIM3 FALSE | ||
| 155 | #define STM32_ICU_USE_TIM4 FALSE | ||
| 156 | #define STM32_ICU_USE_TIM5 FALSE | ||
| 157 | #define STM32_ICU_USE_TIM9 FALSE | ||
| 158 | #define STM32_ICU_TIM1_IRQ_PRIORITY 7 | ||
| 159 | #define STM32_ICU_TIM2_IRQ_PRIORITY 7 | ||
| 160 | #define STM32_ICU_TIM3_IRQ_PRIORITY 7 | ||
| 161 | #define STM32_ICU_TIM4_IRQ_PRIORITY 7 | ||
| 162 | #define STM32_ICU_TIM5_IRQ_PRIORITY 7 | ||
| 163 | #define STM32_ICU_TIM9_IRQ_PRIORITY 7 | ||
| 164 | |||
| 165 | /* | ||
| 166 | * PWM driver system settings. | ||
| 167 | */ | ||
| 168 | #define STM32_PWM_USE_ADVANCED FALSE | ||
| 169 | #define STM32_PWM_USE_TIM1 FALSE | ||
| 170 | #define STM32_PWM_USE_TIM2 FALSE | ||
| 171 | #define STM32_PWM_USE_TIM3 FALSE | ||
| 172 | #define STM32_PWM_USE_TIM4 FALSE | ||
| 173 | #define STM32_PWM_USE_TIM5 FALSE | ||
| 174 | #define STM32_PWM_USE_TIM9 FALSE | ||
| 175 | #define STM32_PWM_TIM1_IRQ_PRIORITY 7 | ||
| 176 | #define STM32_PWM_TIM2_IRQ_PRIORITY 7 | ||
| 177 | #define STM32_PWM_TIM3_IRQ_PRIORITY 7 | ||
| 178 | #define STM32_PWM_TIM4_IRQ_PRIORITY 7 | ||
| 179 | #define STM32_PWM_TIM5_IRQ_PRIORITY 7 | ||
| 180 | #define STM32_PWM_TIM9_IRQ_PRIORITY 7 | ||
| 181 | |||
| 182 | /* | ||
| 183 | * SERIAL driver system settings. | ||
| 184 | */ | ||
| 185 | #define STM32_SERIAL_USE_USART1 FALSE | ||
| 186 | #define STM32_SERIAL_USE_USART2 FALSE | ||
| 187 | #define STM32_SERIAL_USE_USART6 FALSE | ||
| 188 | #define STM32_SERIAL_USART1_PRIORITY 12 | ||
| 189 | #define STM32_SERIAL_USART2_PRIORITY 12 | ||
| 190 | #define STM32_SERIAL_USART6_PRIORITY 12 | ||
| 191 | |||
| 192 | /* | ||
| 193 | * SPI driver system settings. | ||
| 194 | */ | ||
| 195 | #define STM32_SPI_USE_SPI1 FALSE | ||
| 196 | #define STM32_SPI_USE_SPI2 FALSE | ||
| 197 | #define STM32_SPI_USE_SPI3 FALSE | ||
| 198 | #define STM32_SPI_SPI1_RX_DMA_STREAM STM32_DMA_STREAM_ID(2, 0) | ||
| 199 | #define STM32_SPI_SPI1_TX_DMA_STREAM STM32_DMA_STREAM_ID(2, 3) | ||
| 200 | #define STM32_SPI_SPI2_RX_DMA_STREAM STM32_DMA_STREAM_ID(1, 3) | ||
| 201 | #define STM32_SPI_SPI2_TX_DMA_STREAM STM32_DMA_STREAM_ID(1, 4) | ||
| 202 | #define STM32_SPI_SPI3_RX_DMA_STREAM STM32_DMA_STREAM_ID(1, 0) | ||
| 203 | #define STM32_SPI_SPI3_TX_DMA_STREAM STM32_DMA_STREAM_ID(1, 7) | ||
| 204 | #define STM32_SPI_SPI1_DMA_PRIORITY 1 | ||
| 205 | #define STM32_SPI_SPI2_DMA_PRIORITY 1 | ||
| 206 | #define STM32_SPI_SPI3_DMA_PRIORITY 1 | ||
| 207 | #define STM32_SPI_SPI1_IRQ_PRIORITY 10 | ||
| 208 | #define STM32_SPI_SPI2_IRQ_PRIORITY 10 | ||
| 209 | #define STM32_SPI_SPI3_IRQ_PRIORITY 10 | ||
| 210 | #define STM32_SPI_DMA_ERROR_HOOK(spip) osalSysHalt("DMA failure") | ||
| 211 | |||
| 212 | /* | ||
| 213 | * ST driver system settings. | ||
| 214 | */ | ||
| 215 | #define STM32_ST_IRQ_PRIORITY 8 | ||
| 216 | #define STM32_ST_USE_TIMER 2 | ||
| 217 | |||
| 218 | /* | ||
| 219 | * UART driver system settings. | ||
| 220 | */ | ||
| 221 | #define STM32_UART_USE_USART1 FALSE | ||
| 222 | #define STM32_UART_USE_USART2 FALSE | ||
| 223 | #define STM32_UART_USE_USART6 FALSE | ||
| 224 | #define STM32_UART_USART1_RX_DMA_STREAM STM32_DMA_STREAM_ID(2, 5) | ||
| 225 | #define STM32_UART_USART1_TX_DMA_STREAM STM32_DMA_STREAM_ID(2, 7) | ||
| 226 | #define STM32_UART_USART2_RX_DMA_STREAM STM32_DMA_STREAM_ID(1, 5) | ||
| 227 | #define STM32_UART_USART2_TX_DMA_STREAM STM32_DMA_STREAM_ID(1, 6) | ||
| 228 | #define STM32_UART_USART6_RX_DMA_STREAM STM32_DMA_STREAM_ID(2, 2) | ||
| 229 | #define STM32_UART_USART6_TX_DMA_STREAM STM32_DMA_STREAM_ID(2, 7) | ||
| 230 | #define STM32_UART_USART1_IRQ_PRIORITY 12 | ||
| 231 | #define STM32_UART_USART2_IRQ_PRIORITY 12 | ||
| 232 | #define STM32_UART_USART6_IRQ_PRIORITY 12 | ||
| 233 | #define STM32_UART_USART1_DMA_PRIORITY 0 | ||
| 234 | #define STM32_UART_USART2_DMA_PRIORITY 0 | ||
| 235 | #define STM32_UART_USART6_DMA_PRIORITY 0 | ||
| 236 | #define STM32_UART_DMA_ERROR_HOOK(uartp) osalSysHalt("DMA failure") | ||
| 237 | |||
| 238 | /* | ||
| 239 | * USB driver system settings. | ||
| 240 | */ | 15 | */ |
| 241 | #define STM32_USB_USE_OTG1 TRUE | 16 | #pragma once |
| 242 | #define STM32_USB_OTG1_IRQ_PRIORITY 14 | ||
| 243 | #define STM32_USB_OTG1_RX_FIFO_SIZE 512 | ||
| 244 | #define STM32_USB_OTG_THREAD_PRIO NORMALPRIO+1 | ||
| 245 | #define STM32_USB_OTG_THREAD_STACK_SIZE 128 | ||
| 246 | #define STM32_USB_OTGFIFO_FILL_BASEPRI 0 | ||
| 247 | 17 | ||
| 248 | /* | 18 | #include_next "mcuconf.h" |
| 249 | * WDG driver system settings. | ||
| 250 | */ | ||
| 251 | #define STM32_WDG_USE_IWDG FALSE | ||
| 252 | 19 | ||
| 253 | #endif /* MCUCONF_H */ | 20 | #undef STM32_I2C_USE_I2C1 |
| 21 | #define STM32_I2C_USE_I2C1 TRUE | ||
diff --git a/keyboards/peiorisboards/ixora/boards/GENERIC_STM32_F042X6/board.c b/keyboards/peiorisboards/ixora/boards/GENERIC_STM32_F042X6/board.c deleted file mode 100644 index 754dc5c4d..000000000 --- a/keyboards/peiorisboards/ixora/boards/GENERIC_STM32_F042X6/board.c +++ /dev/null | |||
| @@ -1,268 +0,0 @@ | |||
| 1 | /* | ||
| 2 | ChibiOS - Copyright (C) 2006..2018 Giovanni Di Sirio | ||
| 3 | |||
| 4 | Licensed under the Apache License, Version 2.0 (the "License"); | ||
| 5 | you may not use this file except in compliance with the License. | ||
| 6 | You may obtain a copy of the License at | ||
| 7 | |||
| 8 | http://www.apache.org/licenses/LICENSE-2.0 | ||
| 9 | |||
| 10 | Unless required by applicable law or agreed to in writing, software | ||
| 11 | distributed under the License is distributed on an "AS IS" BASIS, | ||
| 12 | WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. | ||
| 13 | See the License for the specific language governing permissions and | ||
| 14 | limitations under the License. | ||
| 15 | */ | ||
| 16 | |||
| 17 | /* | ||
| 18 | * This file has been automatically generated using ChibiStudio board | ||
| 19 | * generator plugin. Do not edit manually. | ||
| 20 | */ | ||
| 21 | |||
| 22 | #include "hal.h" | ||
| 23 | #include "stm32_gpio.h" | ||
| 24 | |||
| 25 | /*===========================================================================*/ | ||
| 26 | /* Driver local definitions. */ | ||
| 27 | /*===========================================================================*/ | ||
| 28 | |||
| 29 | /*===========================================================================*/ | ||
| 30 | /* Driver exported variables. */ | ||
| 31 | /*===========================================================================*/ | ||
| 32 | |||
| 33 | /*===========================================================================*/ | ||
| 34 | /* Driver local variables and types. */ | ||
| 35 | /*===========================================================================*/ | ||
| 36 | |||
| 37 | /** | ||
| 38 | * @brief Type of STM32 GPIO port setup. | ||
| 39 | */ | ||
| 40 | typedef struct { | ||
| 41 | uint32_t moder; | ||
| 42 | uint32_t otyper; | ||
| 43 | uint32_t ospeedr; | ||
| 44 | uint32_t pupdr; | ||
| 45 | uint32_t odr; | ||
| 46 | uint32_t afrl; | ||
| 47 | uint32_t afrh; | ||
| 48 | } gpio_setup_t; | ||
| 49 | |||
| 50 | /** | ||
| 51 | * @brief Type of STM32 GPIO initialization data. | ||
| 52 | */ | ||
| 53 | typedef struct { | ||
| 54 | #if STM32_HAS_GPIOA || defined(__DOXYGEN__) | ||
| 55 | gpio_setup_t PAData; | ||
| 56 | #endif | ||
| 57 | #if STM32_HAS_GPIOB || defined(__DOXYGEN__) | ||
| 58 | gpio_setup_t PBData; | ||
| 59 | #endif | ||
| 60 | #if STM32_HAS_GPIOC || defined(__DOXYGEN__) | ||
| 61 | gpio_setup_t PCData; | ||
| 62 | #endif | ||
| 63 | #if STM32_HAS_GPIOD || defined(__DOXYGEN__) | ||
| 64 | gpio_setup_t PDData; | ||
| 65 | #endif | ||
| 66 | #if STM32_HAS_GPIOE || defined(__DOXYGEN__) | ||
| 67 | gpio_setup_t PEData; | ||
| 68 | #endif | ||
| 69 | #if STM32_HAS_GPIOF || defined(__DOXYGEN__) | ||
| 70 | gpio_setup_t PFData; | ||
| 71 | #endif | ||
| 72 | #if STM32_HAS_GPIOG || defined(__DOXYGEN__) | ||
| 73 | gpio_setup_t PGData; | ||
| 74 | #endif | ||
| 75 | #if STM32_HAS_GPIOH || defined(__DOXYGEN__) | ||
| 76 | gpio_setup_t PHData; | ||
| 77 | #endif | ||
| 78 | #if STM32_HAS_GPIOI || defined(__DOXYGEN__) | ||
| 79 | gpio_setup_t PIData; | ||
| 80 | #endif | ||
| 81 | #if STM32_HAS_GPIOJ || defined(__DOXYGEN__) | ||
| 82 | gpio_setup_t PJData; | ||
| 83 | #endif | ||
| 84 | #if STM32_HAS_GPIOK || defined(__DOXYGEN__) | ||
| 85 | gpio_setup_t PKData; | ||
| 86 | #endif | ||
| 87 | } gpio_config_t; | ||
| 88 | |||
| 89 | /** | ||
| 90 | * @brief STM32 GPIO static initialization data. | ||
| 91 | */ | ||
| 92 | static const gpio_config_t gpio_default_config = { | ||
| 93 | #if STM32_HAS_GPIOA | ||
| 94 | {VAL_GPIOA_MODER, VAL_GPIOA_OTYPER, VAL_GPIOA_OSPEEDR, VAL_GPIOA_PUPDR, | ||
| 95 | VAL_GPIOA_ODR, VAL_GPIOA_AFRL, VAL_GPIOA_AFRH}, | ||
| 96 | #endif | ||
| 97 | #if STM32_HAS_GPIOB | ||
| 98 | {VAL_GPIOB_MODER, VAL_GPIOB_OTYPER, VAL_GPIOB_OSPEEDR, VAL_GPIOB_PUPDR, | ||
| 99 | VAL_GPIOB_ODR, VAL_GPIOB_AFRL, VAL_GPIOB_AFRH}, | ||
| 100 | #endif | ||
| 101 | #if STM32_HAS_GPIOC | ||
| 102 | {VAL_GPIOC_MODER, VAL_GPIOC_OTYPER, VAL_GPIOC_OSPEEDR, VAL_GPIOC_PUPDR, | ||
| 103 | VAL_GPIOC_ODR, VAL_GPIOC_AFRL, VAL_GPIOC_AFRH}, | ||
| 104 | #endif | ||
| 105 | #if STM32_HAS_GPIOD | ||
| 106 | {VAL_GPIOD_MODER, VAL_GPIOD_OTYPER, VAL_GPIOD_OSPEEDR, VAL_GPIOD_PUPDR, | ||
| 107 | VAL_GPIOD_ODR, VAL_GPIOD_AFRL, VAL_GPIOD_AFRH}, | ||
| 108 | #endif | ||
| 109 | #if STM32_HAS_GPIOE | ||
| 110 | {VAL_GPIOE_MODER, VAL_GPIOE_OTYPER, VAL_GPIOE_OSPEEDR, VAL_GPIOE_PUPDR, | ||
| 111 | VAL_GPIOE_ODR, VAL_GPIOE_AFRL, VAL_GPIOE_AFRH}, | ||
| 112 | #endif | ||
| 113 | #if STM32_HAS_GPIOF | ||
| 114 | {VAL_GPIOF_MODER, VAL_GPIOF_OTYPER, VAL_GPIOF_OSPEEDR, VAL_GPIOF_PUPDR, | ||
| 115 | VAL_GPIOF_ODR, VAL_GPIOF_AFRL, VAL_GPIOF_AFRH}, | ||
| 116 | #endif | ||
| 117 | #if STM32_HAS_GPIOG | ||
| 118 | {VAL_GPIOG_MODER, VAL_GPIOG_OTYPER, VAL_GPIOG_OSPEEDR, VAL_GPIOG_PUPDR, | ||
| 119 | VAL_GPIOG_ODR, VAL_GPIOG_AFRL, VAL_GPIOG_AFRH}, | ||
| 120 | #endif | ||
| 121 | #if STM32_HAS_GPIOH | ||
| 122 | {VAL_GPIOH_MODER, VAL_GPIOH_OTYPER, VAL_GPIOH_OSPEEDR, VAL_GPIOH_PUPDR, | ||
| 123 | VAL_GPIOH_ODR, VAL_GPIOH_AFRL, VAL_GPIOH_AFRH}, | ||
| 124 | #endif | ||
| 125 | #if STM32_HAS_GPIOI | ||
| 126 | {VAL_GPIOI_MODER, VAL_GPIOI_OTYPER, VAL_GPIOI_OSPEEDR, VAL_GPIOI_PUPDR, | ||
| 127 | VAL_GPIOI_ODR, VAL_GPIOI_AFRL, VAL_GPIOI_AFRH}, | ||
| 128 | #endif | ||
| 129 | #if STM32_HAS_GPIOJ | ||
| 130 | {VAL_GPIOJ_MODER, VAL_GPIOJ_OTYPER, VAL_GPIOJ_OSPEEDR, VAL_GPIOJ_PUPDR, | ||
| 131 | VAL_GPIOJ_ODR, VAL_GPIOJ_AFRL, VAL_GPIOJ_AFRH}, | ||
| 132 | #endif | ||
| 133 | #if STM32_HAS_GPIOK | ||
| 134 | {VAL_GPIOK_MODER, VAL_GPIOK_OTYPER, VAL_GPIOK_OSPEEDR, VAL_GPIOK_PUPDR, | ||
| 135 | VAL_GPIOK_ODR, VAL_GPIOK_AFRL, VAL_GPIOK_AFRH} | ||
| 136 | #endif | ||
| 137 | }; | ||
| 138 | |||
| 139 | /*===========================================================================*/ | ||
| 140 | /* Driver local functions. */ | ||
| 141 | /*===========================================================================*/ | ||
| 142 | |||
| 143 | static void gpio_init(stm32_gpio_t *gpiop, const gpio_setup_t *config) { | ||
| 144 | |||
| 145 | gpiop->OTYPER = config->otyper; | ||
| 146 | gpiop->OSPEEDR = config->ospeedr; | ||
| 147 | gpiop->PUPDR = config->pupdr; | ||
| 148 | gpiop->ODR = config->odr; | ||
| 149 | gpiop->AFRL = config->afrl; | ||
| 150 | gpiop->AFRH = config->afrh; | ||
| 151 | gpiop->MODER = config->moder; | ||
| 152 | } | ||
| 153 | |||
| 154 | static void stm32_gpio_init(void) { | ||
| 155 | |||
| 156 | /* Enabling GPIO-related clocks, the mask comes from the | ||
| 157 | registry header file.*/ | ||
| 158 | rccResetAHB(STM32_GPIO_EN_MASK); | ||
| 159 | rccEnableAHB(STM32_GPIO_EN_MASK, true); | ||
| 160 | |||
| 161 | /* Initializing all the defined GPIO ports.*/ | ||
| 162 | #if STM32_HAS_GPIOA | ||
| 163 | gpio_init(GPIOA, &gpio_default_config.PAData); | ||
| 164 | #endif | ||
| 165 | #if STM32_HAS_GPIOB | ||
| 166 | gpio_init(GPIOB, &gpio_default_config.PBData); | ||
| 167 | #endif | ||
| 168 | #if STM32_HAS_GPIOC | ||
| 169 | gpio_init(GPIOC, &gpio_default_config.PCData); | ||
| 170 | #endif | ||
| 171 | #if STM32_HAS_GPIOD | ||
| 172 | gpio_init(GPIOD, &gpio_default_config.PDData); | ||
| 173 | #endif | ||
| 174 | #if STM32_HAS_GPIOE | ||
| 175 | gpio_init(GPIOE, &gpio_default_config.PEData); | ||
| 176 | #endif | ||
| 177 | #if STM32_HAS_GPIOF | ||
| 178 | gpio_init(GPIOF, &gpio_default_config.PFData); | ||
| 179 | #endif | ||
| 180 | #if STM32_HAS_GPIOG | ||
| 181 | gpio_init(GPIOG, &gpio_default_config.PGData); | ||
| 182 | #endif | ||
| 183 | #if STM32_HAS_GPIOH | ||
| 184 | gpio_init(GPIOH, &gpio_default_config.PHData); | ||
| 185 | #endif | ||
| 186 | #if STM32_HAS_GPIOI | ||
| 187 | gpio_init(GPIOI, &gpio_default_config.PIData); | ||
| 188 | #endif | ||
| 189 | #if STM32_HAS_GPIOJ | ||
| 190 | gpio_init(GPIOJ, &gpio_default_config.PJData); | ||
| 191 | #endif | ||
| 192 | #if STM32_HAS_GPIOK | ||
| 193 | gpio_init(GPIOK, &gpio_default_config.PKData); | ||
| 194 | #endif | ||
| 195 | } | ||
| 196 | |||
| 197 | /*===========================================================================*/ | ||
| 198 | /* Driver interrupt handlers. */ | ||
| 199 | /*===========================================================================*/ | ||
| 200 | |||
| 201 | /*===========================================================================*/ | ||
| 202 | /* Driver exported functions. */ | ||
| 203 | /*===========================================================================*/ | ||
| 204 | |||
| 205 | /** | ||
| 206 | * @brief Early initialization code. | ||
| 207 | * @details GPIO ports and system clocks are initialized before everything | ||
| 208 | * else. | ||
| 209 | */ | ||
| 210 | void __early_init(void) { | ||
| 211 | extern void enter_bootloader_mode_if_requested(void); | ||
| 212 | enter_bootloader_mode_if_requested(); | ||
| 213 | |||
| 214 | stm32_gpio_init(); | ||
| 215 | stm32_clock_init(); | ||
| 216 | } | ||
| 217 | |||
| 218 | #if HAL_USE_SDC || defined(__DOXYGEN__) | ||
| 219 | /** | ||
| 220 | * @brief SDC card detection. | ||
| 221 | */ | ||
| 222 | bool sdc_lld_is_card_inserted(SDCDriver *sdcp) { | ||
| 223 | |||
| 224 | (void)sdcp; | ||
| 225 | /* TODO: Fill the implementation.*/ | ||
| 226 | return true; | ||
| 227 | } | ||
| 228 | |||
| 229 | /** | ||
| 230 | * @brief SDC card write protection detection. | ||
| 231 | */ | ||
| 232 | bool sdc_lld_is_write_protected(SDCDriver *sdcp) { | ||
| 233 | |||
| 234 | (void)sdcp; | ||
| 235 | /* TODO: Fill the implementation.*/ | ||
| 236 | return false; | ||
| 237 | } | ||
| 238 | #endif /* HAL_USE_SDC */ | ||
| 239 | |||
| 240 | #if HAL_USE_MMC_SPI || defined(__DOXYGEN__) | ||
| 241 | /** | ||
| 242 | * @brief MMC_SPI card detection. | ||
| 243 | */ | ||
| 244 | bool mmc_lld_is_card_inserted(MMCDriver *mmcp) { | ||
| 245 | |||
| 246 | (void)mmcp; | ||
| 247 | /* TODO: Fill the implementation.*/ | ||
| 248 | return true; | ||
| 249 | } | ||
| 250 | |||
| 251 | /** | ||
| 252 | * @brief MMC_SPI card write protection detection. | ||
| 253 | */ | ||
| 254 | bool mmc_lld_is_write_protected(MMCDriver *mmcp) { | ||
| 255 | |||
| 256 | (void)mmcp; | ||
| 257 | /* TODO: Fill the implementation.*/ | ||
| 258 | return false; | ||
| 259 | } | ||
| 260 | #endif | ||
| 261 | |||
| 262 | /** | ||
| 263 | * @brief Board-specific initialization code. | ||
| 264 | * @todo Add your board-specific code, if any. | ||
| 265 | */ | ||
| 266 | void boardInit(void) { | ||
| 267 | |||
| 268 | } | ||
diff --git a/keyboards/peiorisboards/ixora/boards/GENERIC_STM32_F042X6/board.mk b/keyboards/peiorisboards/ixora/boards/GENERIC_STM32_F042X6/board.mk deleted file mode 100644 index bbeb5bbff..000000000 --- a/keyboards/peiorisboards/ixora/boards/GENERIC_STM32_F042X6/board.mk +++ /dev/null | |||
| @@ -1,5 +0,0 @@ | |||
| 1 | # List of all the board related files. | ||
| 2 | BOARDSRC = $(BOARD_PATH)/boards/GENERIC_STM32_F042X6/board.c | ||
| 3 | |||
| 4 | # Required include directories | ||
| 5 | BOARDINC = $(BOARD_PATH)/boards/GENERIC_STM32_F042X6 | ||
diff --git a/keyboards/vinta/boards/GENERIC_STM32_F042X6/board.h b/keyboards/vinta/boards/GENERIC_STM32_F042X6/board.h deleted file mode 100644 index 241d566af..000000000 --- a/keyboards/vinta/boards/GENERIC_STM32_F042X6/board.h +++ /dev/null | |||
| @@ -1,896 +0,0 @@ | |||
| 1 | /* | ||
| 2 | ChibiOS - Copyright (C) 2006..2016 Giovanni Di Sirio | ||
| 3 | |||
| 4 | Licensed under the Apache License, Version 2.0 (the "License"); | ||
| 5 | you may not use this file except in compliance with the License. | ||
| 6 | You may obtain a copy of the License at | ||
| 7 | |||
| 8 | http://www.apache.org/licenses/LICENSE-2.0 | ||
| 9 | |||
| 10 | Unless required by applicable law or agreed to in writing, software | ||
| 11 | distributed under the License is distributed on an "AS IS" BASIS, | ||
| 12 | WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. | ||
| 13 | See the License for the specific language governing permissions and | ||
| 14 | limitations under the License. | ||
| 15 | */ | ||
| 16 | #ifndef _BOARD_H | ||
| 17 | #define _BOARD_H | ||
| 18 | |||
| 19 | /* | ||
| 20 | * Setup for STMicroelectronics STM32 Nucleo32-F042K6 board. | ||
| 21 | */ | ||
| 22 | |||
| 23 | /* | ||
| 24 | * Board identifier. | ||
| 25 | */ | ||
| 26 | #define BOARD_GENERIC_STM32_F042X6 | ||
| 27 | #define BOARD_NAME "Vinta PCB" | ||
| 28 | |||
| 29 | /* | ||
| 30 | * Board oscillators-related settings. | ||
| 31 | * NOTE: LSE not fitted. | ||
| 32 | * NOTE: HSE not fitted. | ||
| 33 | */ | ||
| 34 | #if !defined(STM32_LSECLK) | ||
| 35 | #define STM32_LSECLK 0U | ||
| 36 | #endif | ||
| 37 | |||
| 38 | #define STM32_LSEDRV (3U << 3U) | ||
| 39 | |||
| 40 | #if !defined(STM32_HSECLK) | ||
| 41 | #define STM32_HSECLK 0U | ||
| 42 | #endif | ||
| 43 | |||
| 44 | /* | ||
| 45 | * MCU type as defined in the ST header. | ||
| 46 | */ | ||
| 47 | #define STM32F042x6 | ||
| 48 | |||
| 49 | /* | ||
| 50 | * IO pins assignments. | ||
| 51 | */ | ||
| 52 | #define GPIOA_PIN0 0U | ||
| 53 | #define GPIOA_PIN1 1U | ||
| 54 | #define GPIOA_PIN2 2U | ||
| 55 | #define GPIOA_PIN3 3U | ||
| 56 | #define GPIOA_PIN4 4U | ||
| 57 | #define GPIOA_PIN5 5U | ||
| 58 | #define GPIOA_PIN6 6U | ||
| 59 | #define GPIOA_PIN7 7U | ||
| 60 | #define GPIOA_PIN8 8U | ||
| 61 | #define GPIOA_PIN9 9U | ||
| 62 | #define GPIOA_PIN10 10U | ||
| 63 | #define GPIOA_PIN11 11U | ||
| 64 | #define GPIOA_PIN12 12U | ||
| 65 | #define GPIOA_PIN13 13U | ||
| 66 | #define GPIOA_PIN14 14U | ||
| 67 | #define GPIOA_PIN15 15U | ||
| 68 | |||
| 69 | #define GPIOB_PIN0 0U | ||
| 70 | #define GPIOB_PIN1 1U | ||
| 71 | #define GPIOB_PIN2 2U | ||
| 72 | #define GPIOB_PIN3 3U | ||
| 73 | #define GPIOB_PIN4 4U | ||
| 74 | #define GPIOB_PIN5 5U | ||
| 75 | #define GPIOB_PIN6 6U | ||
| 76 | #define GPIOB_PIN7 7U | ||
| 77 | #define GPIOB_PIN8 8U | ||
| 78 | #define GPIOB_PIN9 9U | ||
| 79 | #define GPIOB_PIN10 10U | ||
| 80 | #define GPIOB_PIN11 11U | ||
| 81 | #define GPIOB_PIN12 12U | ||
| 82 | #define GPIOB_PIN13 13U | ||
| 83 | #define GPIOB_PIN14 14U | ||
| 84 | #define GPIOB_PIN15 15U | ||
| 85 | |||
| 86 | #define GPIOC_PIN0 0U | ||
| 87 | #define GPIOC_PIN1 1U | ||
| 88 | #define GPIOC_PIN2 2U | ||
| 89 | #define GPIOC_PIN3 3U | ||
| 90 | #define GPIOC_PIN4 4U | ||
| 91 | #define GPIOC_PIN5 5U | ||
| 92 | #define GPIOC_PIN6 6U | ||
| 93 | #define GPIOC_PIN7 7U | ||
| 94 | #define GPIOC_PIN8 8U | ||
| 95 | #define GPIOC_PIN9 9U | ||
| 96 | #define GPIOC_PIN10 10U | ||
| 97 | #define GPIOC_PIN11 11U | ||
| 98 | #define GPIOC_PIN12 12U | ||
| 99 | #define GPIOC_PIN13 13U | ||
| 100 | #define GPIOC_PIN14 14U | ||
| 101 | #define GPIOC_PIN15 15U | ||
| 102 | |||
| 103 | #define GPIOD_PIN0 0U | ||
| 104 | #define GPIOD_PIN1 1U | ||
| 105 | #define GPIOD_PIN2 2U | ||
| 106 | #define GPIOD_PIN3 3U | ||
| 107 | #define GPIOD_PIN4 4U | ||
| 108 | #define GPIOD_PIN5 5U | ||
| 109 | #define GPIOD_PIN6 6U | ||
| 110 | #define GPIOD_PIN7 7U | ||
| 111 | #define GPIOD_PIN8 8U | ||
| 112 | #define GPIOD_PIN9 9U | ||
| 113 | #define GPIOD_PIN10 10U | ||
| 114 | #define GPIOD_PIN11 11U | ||
| 115 | #define GPIOD_PIN12 12U | ||
| 116 | #define GPIOD_PIN13 13U | ||
| 117 | #define GPIOD_PIN14 14U | ||
| 118 | #define GPIOD_PIN15 15U | ||
| 119 | |||
| 120 | #define GPIOE_PIN0 0U | ||
| 121 | #define GPIOE_PIN1 1U | ||
| 122 | #define GPIOE_PIN2 2U | ||
| 123 | #define GPIOE_PIN3 3U | ||
| 124 | #define GPIOE_PIN4 4U | ||
| 125 | #define GPIOE_PIN5 5U | ||
| 126 | #define GPIOE_PIN6 6U | ||
| 127 | #define GPIOE_PIN7 7U | ||
| 128 | #define GPIOE_PIN8 8U | ||
| 129 | #define GPIOE_PIN9 9U | ||
| 130 | #define GPIOE_PIN10 10U | ||
| 131 | #define GPIOE_PIN11 11U | ||
| 132 | #define GPIOE_PIN12 12U | ||
| 133 | #define GPIOE_PIN13 13U | ||
| 134 | #define GPIOE_PIN14 14U | ||
| 135 | #define GPIOE_PIN15 15U | ||
| 136 | |||
| 137 | #define GPIOF_PIN0 0U | ||
| 138 | #define GPIOF_PIN1 1U | ||
| 139 | #define GPIOF_PIN2 2U | ||
| 140 | #define GPIOF_PIN3 3U | ||
| 141 | #define GPIOF_PIN4 4U | ||
| 142 | #define GPIOF_PIN5 5U | ||
| 143 | #define GPIOF_PIN6 6U | ||
| 144 | #define GPIOF_PIN7 7U | ||
| 145 | #define GPIOF_PIN8 8U | ||
| 146 | #define GPIOF_PIN9 9U | ||
| 147 | #define GPIOF_PIN10 10U | ||
| 148 | #define GPIOF_PIN11 11U | ||
| 149 | #define GPIOF_PIN12 12U | ||
| 150 | #define GPIOF_PIN13 13U | ||
| 151 | #define GPIOF_PIN14 14U | ||
| 152 | #define GPIOF_PIN15 15U | ||
| 153 | |||
| 154 | /* | ||
| 155 | * IO lines assignments. | ||
| 156 | */ | ||
| 157 | |||
| 158 | #define LINE_BOOT0 PAL_LINE(GPIOB, 8U) | ||
| 159 | #define LINE_SWCLK PAL_LINE(GPIOA, 14U) | ||
| 160 | #define LINE_SWDIO PAL_LINE(GPIOA, 13U) | ||
| 161 | |||
| 162 | /* | ||
| 163 | * I/O ports initial setup, this configuration is established soon after reset | ||
| 164 | * in the initialization code. | ||
| 165 | * Please refer to the STM32 Reference Manual for details. | ||
| 166 | */ | ||
| 167 | #define PIN_MODE_INPUT(n) (0U << ((n) * 2U)) | ||
| 168 | #define PIN_MODE_OUTPUT(n) (1U << ((n) * 2U)) | ||
| 169 | #define PIN_MODE_ALTERNATE(n) (2U << ((n) * 2U)) | ||
| 170 | #define PIN_MODE_ANALOG(n) (3U << ((n) * 2U)) | ||
| 171 | #define PIN_ODR_LOW(n) (0U << (n)) | ||
| 172 | #define PIN_ODR_HIGH(n) (1U << (n)) | ||
| 173 | #define PIN_OTYPE_PUSHPULL(n) (0U << (n)) | ||
| 174 | #define PIN_OTYPE_OPENDRAIN(n) (1U << (n)) | ||
| 175 | #define PIN_OSPEED_VERYLOW(n) (0U << ((n) * 2U)) | ||
| 176 | #define PIN_OSPEED_LOW(n) (1U << ((n) * 2U)) | ||
| 177 | #define PIN_OSPEED_MEDIUM(n) (2U << ((n) * 2U)) | ||
| 178 | #define PIN_OSPEED_HIGH(n) (3U << ((n) * 2U)) | ||
| 179 | #define PIN_PUPDR_FLOATING(n) (0U << ((n) * 2U)) | ||
| 180 | #define PIN_PUPDR_PULLUP(n) (1U << ((n) * 2U)) | ||
| 181 | #define PIN_PUPDR_PULLDOWN(n) (2U << ((n) * 2U)) | ||
| 182 | #define PIN_AFIO_AF(n, v) ((v) << (((n) % 8U) * 4U)) | ||
| 183 | |||
| 184 | /* | ||
| 185 | * GPIOA setup: | ||
| 186 | * | ||
| 187 | * PA0 - COL5 | ||
| 188 | * PA1 - COL4 | ||
| 189 | * PA2 - COL3 | ||
| 190 | * PA3 - COL2 | ||
| 191 | * PA4 - COL1 | ||
| 192 | * PA5 - COL0 | ||
| 193 | * PA6 - ROW4 | ||
| 194 | * PA7 - ROW3 | ||
| 195 | * PA8 - NC | ||
| 196 | * PA9 - ROW1 | ||
| 197 | * PA10 - ROW0 | ||
| 198 | * PA11 - USB_DM | ||
| 199 | * PA12 - USB_DP | ||
| 200 | * PA13 - COL15/SWDIO (for now, COL15) | ||
| 201 | * PA14 - COL14/SWCLK (for now, COL14) | ||
| 202 | * PA15 - COL13 | ||
| 203 | */ | ||
| 204 | #define VAL_GPIOA_MODER (PIN_MODE_INPUT(GPIOA_PIN0) | \ | ||
| 205 | PIN_MODE_INPUT(GPIOA_PIN1) | \ | ||
| 206 | PIN_MODE_INPUT(GPIOA_PIN2) | \ | ||
| 207 | PIN_MODE_INPUT(GPIOA_PIN3) | \ | ||
| 208 | PIN_MODE_INPUT(GPIOA_PIN4) | \ | ||
| 209 | PIN_MODE_INPUT(GPIOA_PIN5) | \ | ||
| 210 | PIN_MODE_INPUT(GPIOA_PIN6) | \ | ||
| 211 | PIN_MODE_INPUT(GPIOA_PIN7) | \ | ||
| 212 | PIN_MODE_INPUT(GPIOA_PIN8) | \ | ||
| 213 | PIN_MODE_INPUT(GPIOA_PIN9) | \ | ||
| 214 | PIN_MODE_INPUT(GPIOA_PIN10) | \ | ||
| 215 | PIN_MODE_INPUT(GPIOA_PIN11) | \ | ||
| 216 | PIN_MODE_INPUT(GPIOA_PIN12) | \ | ||
| 217 | PIN_MODE_INPUT(GPIOA_PIN13) | \ | ||
| 218 | PIN_MODE_INPUT(GPIOA_PIN14) | \ | ||
| 219 | PIN_MODE_INPUT(GPIOA_PIN15)) | ||
| 220 | #define VAL_GPIOA_OTYPER (PIN_OTYPE_PUSHPULL(GPIOA_PIN0) | \ | ||
| 221 | PIN_OTYPE_PUSHPULL(GPIOA_PIN1) | \ | ||
| 222 | PIN_OTYPE_PUSHPULL(GPIOA_PIN2) | \ | ||
| 223 | PIN_OTYPE_PUSHPULL(GPIOA_PIN3) | \ | ||
| 224 | PIN_OTYPE_PUSHPULL(GPIOA_PIN4) | \ | ||
| 225 | PIN_OTYPE_PUSHPULL(GPIOA_PIN5) | \ | ||
| 226 | PIN_OTYPE_PUSHPULL(GPIOA_PIN6) | \ | ||
| 227 | PIN_OTYPE_PUSHPULL(GPIOA_PIN7) | \ | ||
| 228 | PIN_OTYPE_PUSHPULL(GPIOA_PIN8) | \ | ||
| 229 | PIN_OTYPE_PUSHPULL(GPIOA_PIN9) | \ | ||
| 230 | PIN_OTYPE_PUSHPULL(GPIOA_PIN10) | \ | ||
| 231 | PIN_OTYPE_PUSHPULL(GPIOA_PIN11) | \ | ||
| 232 | PIN_OTYPE_PUSHPULL(GPIOA_PIN12) | \ | ||
| 233 | PIN_OTYPE_PUSHPULL(GPIOA_PIN13) | \ | ||
| 234 | PIN_OTYPE_PUSHPULL(GPIOA_PIN14) | \ | ||
| 235 | PIN_OTYPE_PUSHPULL(GPIOA_PIN15)) | ||
| 236 | #define VAL_GPIOA_OSPEEDR (PIN_OSPEED_VERYLOW(GPIOA_PIN0) | \ | ||
| 237 | PIN_OSPEED_VERYLOW(GPIOA_PIN1) | \ | ||
| 238 | PIN_OSPEED_VERYLOW(GPIOA_PIN2) | \ | ||
| 239 | PIN_OSPEED_VERYLOW(GPIOA_PIN3) | \ | ||
| 240 | PIN_OSPEED_VERYLOW(GPIOA_PIN4) | \ | ||
| 241 | PIN_OSPEED_VERYLOW(GPIOA_PIN5) | \ | ||
| 242 | PIN_OSPEED_VERYLOW(GPIOA_PIN6) | \ | ||
| 243 | PIN_OSPEED_VERYLOW(GPIOA_PIN7) | \ | ||
| 244 | PIN_OSPEED_VERYLOW(GPIOA_PIN8) | \ | ||
| 245 | PIN_OSPEED_VERYLOW(GPIOA_PIN9) | \ | ||
| 246 | PIN_OSPEED_VERYLOW(GPIOA_PIN10) | \ | ||
| 247 | PIN_OSPEED_HIGH(GPIOA_PIN11) | \ | ||
| 248 | PIN_OSPEED_VERYLOW(GPIOA_PIN12) | \ | ||
| 249 | PIN_OSPEED_VERYLOW(GPIOA_PIN13) | \ | ||
| 250 | PIN_OSPEED_VERYLOW(GPIOA_PIN14) | \ | ||
| 251 | PIN_OSPEED_VERYLOW(GPIOA_PIN15)) | ||
| 252 | #define VAL_GPIOA_PUPDR (PIN_PUPDR_PULLUP(GPIOA_PIN0) | \ | ||
| 253 | PIN_PUPDR_PULLUP(GPIOA_PIN1) | \ | ||
| 254 | PIN_PUPDR_PULLUP(GPIOA_PIN2) | \ | ||
| 255 | PIN_PUPDR_PULLUP(GPIOA_PIN3) | \ | ||
| 256 | PIN_PUPDR_PULLUP(GPIOA_PIN4) | \ | ||
| 257 | PIN_PUPDR_PULLUP(GPIOA_PIN5) | \ | ||
| 258 | PIN_PUPDR_PULLUP(GPIOA_PIN6) | \ | ||
| 259 | PIN_PUPDR_PULLUP(GPIOA_PIN7) | \ | ||
| 260 | PIN_PUPDR_PULLUP(GPIOA_PIN8) | \ | ||
| 261 | PIN_PUPDR_PULLUP(GPIOA_PIN9) | \ | ||
| 262 | PIN_PUPDR_PULLUP(GPIOA_PIN10) | \ | ||
| 263 | PIN_PUPDR_FLOATING(GPIOA_PIN11) | \ | ||
| 264 | PIN_PUPDR_FLOATING(GPIOA_PIN12) | \ | ||
| 265 | PIN_PUPDR_PULLUP(GPIOA_PIN13) | \ | ||
| 266 | PIN_PUPDR_PULLUP(GPIOA_PIN14) | \ | ||
| 267 | PIN_PUPDR_PULLUP(GPIOA_PIN15)) | ||
| 268 | #define VAL_GPIOA_ODR (PIN_ODR_HIGH(GPIOA_PIN0) | \ | ||
| 269 | PIN_ODR_HIGH(GPIOA_PIN1) | \ | ||
| 270 | PIN_ODR_HIGH(GPIOA_PIN2) | \ | ||
| 271 | PIN_ODR_HIGH(GPIOA_PIN3) | \ | ||
| 272 | PIN_ODR_HIGH(GPIOA_PIN4) | \ | ||
| 273 | PIN_ODR_HIGH(GPIOA_PIN5) | \ | ||
| 274 | PIN_ODR_HIGH(GPIOA_PIN6) | \ | ||
| 275 | PIN_ODR_HIGH(GPIOA_PIN7) | \ | ||
| 276 | PIN_ODR_HIGH(GPIOA_PIN8) | \ | ||
| 277 | PIN_ODR_HIGH(GPIOA_PIN9) | \ | ||
| 278 | PIN_ODR_HIGH(GPIOA_PIN10) | \ | ||
| 279 | PIN_ODR_HIGH(GPIOA_PIN11) | \ | ||
| 280 | PIN_ODR_HIGH(GPIOA_PIN12) | \ | ||
| 281 | PIN_ODR_HIGH(GPIOA_PIN13) | \ | ||
| 282 | PIN_ODR_HIGH(GPIOA_PIN14) | \ | ||
| 283 | PIN_ODR_HIGH(GPIOA_PIN15)) | ||
| 284 | #define VAL_GPIOA_AFRL (PIN_AFIO_AF(GPIOA_PIN0, 0U) | \ | ||
| 285 | PIN_AFIO_AF(GPIOA_PIN1, 0U) | \ | ||
| 286 | PIN_AFIO_AF(GPIOA_PIN2, 0U) | \ | ||
| 287 | PIN_AFIO_AF(GPIOA_PIN3, 0U) | \ | ||
| 288 | PIN_AFIO_AF(GPIOA_PIN4, 0U) | \ | ||
| 289 | PIN_AFIO_AF(GPIOA_PIN5, 0U) | \ | ||
| 290 | PIN_AFIO_AF(GPIOA_PIN6, 0U) | \ | ||
| 291 | PIN_AFIO_AF(GPIOA_PIN7, 0U)) | ||
| 292 | #define VAL_GPIOA_AFRH (PIN_AFIO_AF(GPIOA_PIN8, 0U) | \ | ||
| 293 | PIN_AFIO_AF(GPIOA_PIN9, 0U) | \ | ||
| 294 | PIN_AFIO_AF(GPIOA_PIN10, 0U) | \ | ||
| 295 | PIN_AFIO_AF(GPIOA_PIN11, 0U) | \ | ||
| 296 | PIN_AFIO_AF(GPIOA_PIN12, 0U) | \ | ||
| 297 | PIN_AFIO_AF(GPIOA_PIN13, 0U) | \ | ||
| 298 | PIN_AFIO_AF(GPIOA_PIN14, 0U) | \ | ||
| 299 | PIN_AFIO_AF(GPIOA_PIN15, 0U)) | ||
| 300 | |||
| 301 | /* | ||
| 302 | * GPIOB setup: | ||
| 303 | * | ||
| 304 | * PB0 - ROW2 | ||
| 305 | * PB1 - RGB_D | ||
| 306 | * PB2 - PIN2 (input pullup). | ||
| 307 | * PB3 - COL12 | ||
| 308 | * PB4 - COL11 | ||
| 309 | * PB5 - COL10 | ||
| 310 | * PB6 - COL9 | ||
| 311 | * PB7 - COL8 | ||
| 312 | * PB8 - BOOT0 (set as output for STM32F042) | ||
| 313 | * PB9 - PIN9 (input pullup). | ||
| 314 | * PB10 - PIN10 (input pullup). | ||
| 315 | * PB11 - PIN11 (input pullup). | ||
| 316 | * PB12 - PIN12 (input pullup). | ||
| 317 | * PB13 - PIN13 (input pullup). | ||
| 318 | * PB14 - PIN14 (input pullup). | ||
| 319 | * PB15 - PIN15 (input pullup). | ||
| 320 | */ | ||
| 321 | #define VAL_GPIOB_MODER (PIN_MODE_INPUT(GPIOB_PIN0) | \ | ||
| 322 | PIN_MODE_OUTPUT(GPIOB_PIN1) | \ | ||
| 323 | PIN_MODE_INPUT(GPIOB_PIN2) | \ | ||
| 324 | PIN_MODE_INPUT(GPIOB_PIN3) | \ | ||
| 325 | PIN_MODE_INPUT(GPIOB_PIN4) | \ | ||
| 326 | PIN_MODE_INPUT(GPIOB_PIN5) | \ | ||
| 327 | PIN_MODE_INPUT(GPIOB_PIN6) | \ | ||
| 328 | PIN_MODE_INPUT(GPIOB_PIN7) | \ | ||
| 329 | PIN_MODE_OUTPUT(GPIOB_PIN8) | \ | ||
| 330 | PIN_MODE_INPUT(GPIOB_PIN9) | \ | ||
| 331 | PIN_MODE_INPUT(GPIOB_PIN10) | \ | ||
| 332 | PIN_MODE_INPUT(GPIOB_PIN11) | \ | ||
| 333 | PIN_MODE_INPUT(GPIOB_PIN12) | \ | ||
| 334 | PIN_MODE_INPUT(GPIOB_PIN13) | \ | ||
| 335 | PIN_MODE_INPUT(GPIOB_PIN14) | \ | ||
| 336 | PIN_MODE_INPUT(GPIOB_PIN15)) | ||
| 337 | #define VAL_GPIOB_OTYPER (PIN_OTYPE_PUSHPULL(GPIOB_PIN0) | \ | ||
| 338 | PIN_OTYPE_PUSHPULL(GPIOB_PIN1) | \ | ||
| 339 | PIN_OTYPE_PUSHPULL(GPIOB_PIN2) | \ | ||
| 340 | PIN_OTYPE_PUSHPULL(GPIOB_PIN3) | \ | ||
| 341 | PIN_OTYPE_PUSHPULL(GPIOB_PIN4) | \ | ||
| 342 | PIN_OTYPE_PUSHPULL(GPIOB_PIN5) | \ | ||
| 343 | PIN_OTYPE_PUSHPULL(GPIOB_PIN6) | \ | ||
| 344 | PIN_OTYPE_PUSHPULL(GPIOB_PIN7) | \ | ||
| 345 | PIN_OTYPE_PUSHPULL(GPIOB_PIN8) | \ | ||
| 346 | PIN_OTYPE_PUSHPULL(GPIOB_PIN9) | \ | ||
| 347 | PIN_OTYPE_PUSHPULL(GPIOB_PIN10) | \ | ||
| 348 | PIN_OTYPE_PUSHPULL(GPIOB_PIN11) | \ | ||
| 349 | PIN_OTYPE_PUSHPULL(GPIOB_PIN12) | \ | ||
| 350 | PIN_OTYPE_PUSHPULL(GPIOB_PIN13) | \ | ||
| 351 | PIN_OTYPE_PUSHPULL(GPIOB_PIN14) | \ | ||
| 352 | PIN_OTYPE_PUSHPULL(GPIOB_PIN15)) | ||
| 353 | #define VAL_GPIOB_OSPEEDR (PIN_OSPEED_VERYLOW(GPIOB_PIN0) | \ | ||
| 354 | PIN_OSPEED_HIGH(GPIOB_PIN1) | \ | ||
| 355 | PIN_OSPEED_HIGH(GPIOB_PIN2) | \ | ||
| 356 | PIN_OSPEED_VERYLOW(GPIOB_PIN3) | \ | ||
| 357 | PIN_OSPEED_VERYLOW(GPIOB_PIN4) | \ | ||
| 358 | PIN_OSPEED_VERYLOW(GPIOB_PIN5) | \ | ||
| 359 | PIN_OSPEED_VERYLOW(GPIOB_PIN6) | \ | ||
| 360 | PIN_OSPEED_VERYLOW(GPIOB_PIN7) | \ | ||
| 361 | PIN_OSPEED_VERYLOW(GPIOB_PIN8) | \ | ||
| 362 | PIN_OSPEED_HIGH(GPIOB_PIN9) | \ | ||
| 363 | PIN_OSPEED_HIGH(GPIOB_PIN10) | \ | ||
| 364 | PIN_OSPEED_HIGH(GPIOB_PIN11) | \ | ||
| 365 | PIN_OSPEED_HIGH(GPIOB_PIN12) | \ | ||
| 366 | PIN_OSPEED_HIGH(GPIOB_PIN13) | \ | ||
| 367 | PIN_OSPEED_HIGH(GPIOB_PIN14) | \ | ||
| 368 | PIN_OSPEED_HIGH(GPIOB_PIN15)) | ||
| 369 | #define VAL_GPIOB_PUPDR (PIN_PUPDR_PULLUP(GPIOB_PIN0) | \ | ||
| 370 | PIN_PUPDR_FLOATING(GPIOB_PIN1) | \ | ||
| 371 | PIN_PUPDR_PULLUP(GPIOB_PIN2) | \ | ||
| 372 | PIN_PUPDR_PULLUP(GPIOB_PIN3) | \ | ||
| 373 | PIN_PUPDR_PULLUP(GPIOB_PIN4) | \ | ||
| 374 | PIN_PUPDR_PULLUP(GPIOB_PIN5) | \ | ||
| 375 | PIN_PUPDR_PULLUP(GPIOB_PIN6) | \ | ||
| 376 | PIN_PUPDR_PULLUP(GPIOB_PIN7) | \ | ||
| 377 | PIN_PUPDR_PULLDOWN(GPIOB_PIN8) | \ | ||
| 378 | PIN_PUPDR_PULLUP(GPIOB_PIN9) | \ | ||
| 379 | PIN_PUPDR_PULLUP(GPIOB_PIN10) | \ | ||
| 380 | PIN_PUPDR_PULLUP(GPIOB_PIN11) | \ | ||
| 381 | PIN_PUPDR_PULLUP(GPIOB_PIN12) | \ | ||
| 382 | PIN_PUPDR_PULLUP(GPIOB_PIN13) | \ | ||
| 383 | PIN_PUPDR_PULLUP(GPIOB_PIN14) | \ | ||
| 384 | PIN_PUPDR_PULLUP(GPIOB_PIN15)) | ||
| 385 | #define VAL_GPIOB_ODR (PIN_ODR_HIGH(GPIOB_PIN0) | \ | ||
| 386 | PIN_ODR_HIGH(GPIOB_PIN1) | \ | ||
| 387 | PIN_ODR_HIGH(GPIOB_PIN2) | \ | ||
| 388 | PIN_ODR_HIGH(GPIOB_PIN3) | \ | ||
| 389 | PIN_ODR_HIGH(GPIOB_PIN4) | \ | ||
| 390 | PIN_ODR_HIGH(GPIOB_PIN5) | \ | ||
| 391 | PIN_ODR_HIGH(GPIOB_PIN6) | \ | ||
| 392 | PIN_ODR_HIGH(GPIOB_PIN7) | \ | ||
| 393 | PIN_ODR_HIGH(GPIOB_PIN8) | \ | ||
| 394 | PIN_ODR_HIGH(GPIOB_PIN9) | \ | ||
| 395 | PIN_ODR_HIGH(GPIOB_PIN10) | \ | ||
| 396 | PIN_ODR_HIGH(GPIOB_PIN11) | \ | ||
| 397 | PIN_ODR_HIGH(GPIOB_PIN12) | \ | ||
| 398 | PIN_ODR_HIGH(GPIOB_PIN13) | \ | ||
| 399 | PIN_ODR_HIGH(GPIOB_PIN14) | \ | ||
| 400 | PIN_ODR_HIGH(GPIOB_PIN15)) | ||
| 401 | #define VAL_GPIOB_AFRL (PIN_AFIO_AF(GPIOB_PIN0, 0U) | \ | ||
| 402 | PIN_AFIO_AF(GPIOB_PIN1, 0U) | \ | ||
| 403 | PIN_AFIO_AF(GPIOB_PIN2, 0U) | \ | ||
| 404 | PIN_AFIO_AF(GPIOB_PIN3, 0U) | \ | ||
| 405 | PIN_AFIO_AF(GPIOB_PIN4, 0U) | \ | ||
| 406 | PIN_AFIO_AF(GPIOB_PIN5, 0U) | \ | ||
| 407 | PIN_AFIO_AF(GPIOB_PIN6, 0U) | \ | ||
| 408 | PIN_AFIO_AF(GPIOB_PIN7, 0U)) | ||
| 409 | #define VAL_GPIOB_AFRH (PIN_AFIO_AF(GPIOB_PIN8, 0U) | \ | ||
| 410 | PIN_AFIO_AF(GPIOB_PIN9, 0U) | \ | ||
| 411 | PIN_AFIO_AF(GPIOB_PIN10, 0U) | \ | ||
| 412 | PIN_AFIO_AF(GPIOB_PIN11, 0U) | \ | ||
| 413 | PIN_AFIO_AF(GPIOB_PIN12, 0U) | \ | ||
| 414 | PIN_AFIO_AF(GPIOB_PIN13, 0U) | \ | ||
| 415 | PIN_AFIO_AF(GPIOB_PIN14, 0U) | \ | ||
| 416 | PIN_AFIO_AF(GPIOB_PIN15, 0U)) | ||
| 417 | |||
| 418 | /* | ||
| 419 | * GPIOC setup: | ||
| 420 | * | ||
| 421 | * PC0 - PIN0 (input pullup). | ||
| 422 | * PC1 - PIN1 (input pullup). | ||
| 423 | * PC2 - PIN2 (input pullup). | ||
| 424 | * PC3 - PIN3 (input pullup). | ||
| 425 | * PC4 - PIN4 (input pullup). | ||
| 426 | * PC5 - PIN5 (input pullup). | ||
| 427 | * PC6 - PIN6 (input pullup). | ||
| 428 | * PC7 - PIN7 (input pullup). | ||
| 429 | * PC8 - PIN8 (input pullup). | ||
| 430 | * PC9 - PIN9 (input pullup). | ||
| 431 | * PC10 - PIN10 (input pullup). | ||
| 432 | * PC11 - PIN11 (input pullup). | ||
| 433 | * PC12 - PIN12 (input pullup). | ||
| 434 | * PC13 - PIN13 (input pullup). | ||
| 435 | * PC14 - PIN14 (input pullup). | ||
| 436 | * PC15 - PIN15 (input pullup). | ||
| 437 | */ | ||
| 438 | #define VAL_GPIOC_MODER (PIN_MODE_INPUT(GPIOC_PIN0) | \ | ||
| 439 | PIN_MODE_INPUT(GPIOC_PIN1) | \ | ||
| 440 | PIN_MODE_INPUT(GPIOC_PIN2) | \ | ||
| 441 | PIN_MODE_INPUT(GPIOC_PIN3) | \ | ||
| 442 | PIN_MODE_INPUT(GPIOC_PIN4) | \ | ||
| 443 | PIN_MODE_INPUT(GPIOC_PIN5) | \ | ||
| 444 | PIN_MODE_INPUT(GPIOC_PIN6) | \ | ||
| 445 | PIN_MODE_INPUT(GPIOC_PIN7) | \ | ||
| 446 | PIN_MODE_INPUT(GPIOC_PIN8) | \ | ||
| 447 | PIN_MODE_INPUT(GPIOC_PIN9) | \ | ||
| 448 | PIN_MODE_INPUT(GPIOC_PIN10) | \ | ||
| 449 | PIN_MODE_INPUT(GPIOC_PIN11) | \ | ||
| 450 | PIN_MODE_INPUT(GPIOC_PIN12) | \ | ||
| 451 | PIN_MODE_INPUT(GPIOC_PIN13) | \ | ||
| 452 | PIN_MODE_INPUT(GPIOC_PIN14) | \ | ||
| 453 | PIN_MODE_INPUT(GPIOC_PIN15)) | ||
| 454 | #define VAL_GPIOC_OTYPER (PIN_OTYPE_PUSHPULL(GPIOC_PIN0) | \ | ||
| 455 | PIN_OTYPE_PUSHPULL(GPIOC_PIN1) | \ | ||
| 456 | PIN_OTYPE_PUSHPULL(GPIOC_PIN2) | \ | ||
| 457 | PIN_OTYPE_PUSHPULL(GPIOC_PIN3) | \ | ||
| 458 | PIN_OTYPE_PUSHPULL(GPIOC_PIN4) | \ | ||
| 459 | PIN_OTYPE_PUSHPULL(GPIOC_PIN5) | \ | ||
| 460 | PIN_OTYPE_PUSHPULL(GPIOC_PIN6) | \ | ||
| 461 | PIN_OTYPE_PUSHPULL(GPIOC_PIN7) | \ | ||
| 462 | PIN_OTYPE_PUSHPULL(GPIOC_PIN8) | \ | ||
| 463 | PIN_OTYPE_PUSHPULL(GPIOC_PIN9) | \ | ||
| 464 | PIN_OTYPE_PUSHPULL(GPIOC_PIN10) | \ | ||
| 465 | PIN_OTYPE_PUSHPULL(GPIOC_PIN11) | \ | ||
| 466 | PIN_OTYPE_PUSHPULL(GPIOC_PIN12) | \ | ||
| 467 | PIN_OTYPE_PUSHPULL(GPIOC_PIN13) | \ | ||
| 468 | PIN_OTYPE_PUSHPULL(GPIOC_PIN14) | \ | ||
| 469 | PIN_OTYPE_PUSHPULL(GPIOC_PIN15)) | ||
| 470 | #define VAL_GPIOC_OSPEEDR (PIN_OSPEED_HIGH(GPIOC_PIN0) | \ | ||
| 471 | PIN_OSPEED_HIGH(GPIOC_PIN1) | \ | ||
| 472 | PIN_OSPEED_HIGH(GPIOC_PIN2) | \ | ||
| 473 | PIN_OSPEED_HIGH(GPIOC_PIN3) | \ | ||
| 474 | PIN_OSPEED_HIGH(GPIOC_PIN4) | \ | ||
| 475 | PIN_OSPEED_HIGH(GPIOC_PIN5) | \ | ||
| 476 | PIN_OSPEED_HIGH(GPIOC_PIN6) | \ | ||
| 477 | PIN_OSPEED_HIGH(GPIOC_PIN7) | \ | ||
| 478 | PIN_OSPEED_HIGH(GPIOC_PIN8) | \ | ||
| 479 | PIN_OSPEED_HIGH(GPIOC_PIN9) | \ | ||
| 480 | PIN_OSPEED_HIGH(GPIOC_PIN10) | \ | ||
| 481 | PIN_OSPEED_HIGH(GPIOC_PIN11) | \ | ||
| 482 | PIN_OSPEED_HIGH(GPIOC_PIN12) | \ | ||
| 483 | PIN_OSPEED_HIGH(GPIOC_PIN13) | \ | ||
| 484 | PIN_OSPEED_HIGH(GPIOC_PIN14) | \ | ||
| 485 | PIN_OSPEED_HIGH(GPIOC_PIN15)) | ||
| 486 | #define VAL_GPIOC_PUPDR (PIN_PUPDR_PULLUP(GPIOC_PIN0) | \ | ||
| 487 | PIN_PUPDR_PULLUP(GPIOC_PIN1) | \ | ||
| 488 | PIN_PUPDR_PULLUP(GPIOC_PIN2) | \ | ||
| 489 | PIN_PUPDR_PULLUP(GPIOC_PIN3) | \ | ||
| 490 | PIN_PUPDR_PULLUP(GPIOC_PIN4) | \ | ||
| 491 | PIN_PUPDR_PULLUP(GPIOC_PIN5) | \ | ||
| 492 | PIN_PUPDR_PULLUP(GPIOC_PIN6) | \ | ||
| 493 | PIN_PUPDR_PULLUP(GPIOC_PIN7) | \ | ||
| 494 | PIN_PUPDR_PULLUP(GPIOC_PIN8) | \ | ||
| 495 | PIN_PUPDR_PULLUP(GPIOC_PIN9) | \ | ||
| 496 | PIN_PUPDR_PULLUP(GPIOC_PIN10) | \ | ||
| 497 | PIN_PUPDR_PULLUP(GPIOC_PIN11) | \ | ||
| 498 | PIN_PUPDR_PULLUP(GPIOC_PIN12) | \ | ||
| 499 | PIN_PUPDR_PULLUP(GPIOC_PIN13) | \ | ||
| 500 | PIN_PUPDR_PULLUP(GPIOC_PIN14) | \ | ||
| 501 | PIN_PUPDR_PULLUP(GPIOC_PIN15)) | ||
| 502 | #define VAL_GPIOC_ODR (PIN_ODR_HIGH(GPIOC_PIN0) | \ | ||
| 503 | PIN_ODR_HIGH(GPIOC_PIN1) | \ | ||
| 504 | PIN_ODR_HIGH(GPIOC_PIN2) | \ | ||
| 505 | PIN_ODR_HIGH(GPIOC_PIN3) | \ | ||
| 506 | PIN_ODR_HIGH(GPIOC_PIN4) | \ | ||
| 507 | PIN_ODR_HIGH(GPIOC_PIN5) | \ | ||
| 508 | PIN_ODR_HIGH(GPIOC_PIN6) | \ | ||
| 509 | PIN_ODR_HIGH(GPIOC_PIN7) | \ | ||
| 510 | PIN_ODR_HIGH(GPIOC_PIN8) | \ | ||
| 511 | PIN_ODR_HIGH(GPIOC_PIN9) | \ | ||
| 512 | PIN_ODR_HIGH(GPIOC_PIN10) | \ | ||
| 513 | PIN_ODR_HIGH(GPIOC_PIN11) | \ | ||
| 514 | PIN_ODR_HIGH(GPIOC_PIN12) | \ | ||
| 515 | PIN_ODR_HIGH(GPIOC_PIN13) | \ | ||
| 516 | PIN_ODR_HIGH(GPIOC_PIN14) | \ | ||
| 517 | PIN_ODR_HIGH(GPIOC_PIN15)) | ||
| 518 | #define VAL_GPIOC_AFRL (PIN_AFIO_AF(GPIOC_PIN0, 0U) | \ | ||
| 519 | PIN_AFIO_AF(GPIOC_PIN1, 0U) | \ | ||
| 520 | PIN_AFIO_AF(GPIOC_PIN2, 0U) | \ | ||
| 521 | PIN_AFIO_AF(GPIOC_PIN3, 0U) | \ | ||
| 522 | PIN_AFIO_AF(GPIOC_PIN4, 0U) | \ | ||
| 523 | PIN_AFIO_AF(GPIOC_PIN5, 0U) | \ | ||
| 524 | PIN_AFIO_AF(GPIOC_PIN6, 0U) | \ | ||
| 525 | PIN_AFIO_AF(GPIOC_PIN7, 0U)) | ||
| 526 | #define VAL_GPIOC_AFRH (PIN_AFIO_AF(GPIOC_PIN8, 0U) | \ | ||
| 527 | PIN_AFIO_AF(GPIOC_PIN9, 0U) | \ | ||
| 528 | PIN_AFIO_AF(GPIOC_PIN10, 0U) | \ | ||
| 529 | PIN_AFIO_AF(GPIOC_PIN11, 0U) | \ | ||
| 530 | PIN_AFIO_AF(GPIOC_PIN12, 0U) | \ | ||
| 531 | PIN_AFIO_AF(GPIOC_PIN13, 0U) | \ | ||
| 532 | PIN_AFIO_AF(GPIOC_PIN14, 0U) | \ | ||
| 533 | PIN_AFIO_AF(GPIOC_PIN15, 0U)) | ||
| 534 | |||
| 535 | /* | ||
| 536 | * GPIOD setup: | ||
| 537 | * | ||
| 538 | * PD0 - PIN0 (input pullup). | ||
| 539 | * PD1 - PIN1 (input pullup). | ||
| 540 | * PD2 - PIN2 (input pullup). | ||
| 541 | * PD3 - PIN3 (input pullup). | ||
| 542 | * PD4 - PIN4 (input pullup). | ||
| 543 | * PD5 - PIN5 (input pullup). | ||
| 544 | * PD6 - PIN6 (input pullup). | ||
| 545 | * PD7 - PIN7 (input pullup). | ||
| 546 | * PD8 - PIN8 (input pullup). | ||
| 547 | * PD9 - PIN9 (input pullup). | ||
| 548 | * PD10 - PIN10 (input pullup). | ||
| 549 | * PD11 - PIN11 (input pullup). | ||
| 550 | * PD12 - PIN12 (input pullup). | ||
| 551 | * PD13 - PIN13 (input pullup). | ||
| 552 | * PD14 - PIN14 (input pullup). | ||
| 553 | * PD15 - PIN15 (input pullup). | ||
| 554 | */ | ||
| 555 | #define VAL_GPIOD_MODER (PIN_MODE_INPUT(GPIOD_PIN0) | \ | ||
| 556 | PIN_MODE_INPUT(GPIOD_PIN1) | \ | ||
| 557 | PIN_MODE_INPUT(GPIOD_PIN2) | \ | ||
| 558 | PIN_MODE_INPUT(GPIOD_PIN3) | \ | ||
| 559 | PIN_MODE_INPUT(GPIOD_PIN4) | \ | ||
| 560 | PIN_MODE_INPUT(GPIOD_PIN5) | \ | ||
| 561 | PIN_MODE_INPUT(GPIOD_PIN6) | \ | ||
| 562 | PIN_MODE_INPUT(GPIOD_PIN7) | \ | ||
| 563 | PIN_MODE_INPUT(GPIOD_PIN8) | \ | ||
| 564 | PIN_MODE_INPUT(GPIOD_PIN9) | \ | ||
| 565 | PIN_MODE_INPUT(GPIOD_PIN10) | \ | ||
| 566 | PIN_MODE_INPUT(GPIOD_PIN11) | \ | ||
| 567 | PIN_MODE_INPUT(GPIOD_PIN12) | \ | ||
| 568 | PIN_MODE_INPUT(GPIOD_PIN13) | \ | ||
| 569 | PIN_MODE_INPUT(GPIOD_PIN14) | \ | ||
| 570 | PIN_MODE_INPUT(GPIOD_PIN15)) | ||
| 571 | #define VAL_GPIOD_OTYPER (PIN_OTYPE_PUSHPULL(GPIOD_PIN0) | \ | ||
| 572 | PIN_OTYPE_PUSHPULL(GPIOD_PIN1) | \ | ||
| 573 | PIN_OTYPE_PUSHPULL(GPIOD_PIN2) | \ | ||
| 574 | PIN_OTYPE_PUSHPULL(GPIOD_PIN3) | \ | ||
| 575 | PIN_OTYPE_PUSHPULL(GPIOD_PIN4) | \ | ||
| 576 | PIN_OTYPE_PUSHPULL(GPIOD_PIN5) | \ | ||
| 577 | PIN_OTYPE_PUSHPULL(GPIOD_PIN6) | \ | ||
| 578 | PIN_OTYPE_PUSHPULL(GPIOD_PIN7) | \ | ||
| 579 | PIN_OTYPE_PUSHPULL(GPIOD_PIN8) | \ | ||
| 580 | PIN_OTYPE_PUSHPULL(GPIOD_PIN9) | \ | ||
| 581 | PIN_OTYPE_PUSHPULL(GPIOD_PIN10) | \ | ||
| 582 | PIN_OTYPE_PUSHPULL(GPIOD_PIN11) | \ | ||
| 583 | PIN_OTYPE_PUSHPULL(GPIOD_PIN12) | \ | ||
| 584 | PIN_OTYPE_PUSHPULL(GPIOD_PIN13) | \ | ||
| 585 | PIN_OTYPE_PUSHPULL(GPIOD_PIN14) | \ | ||
| 586 | PIN_OTYPE_PUSHPULL(GPIOD_PIN15)) | ||
| 587 | #define VAL_GPIOD_OSPEEDR (PIN_OSPEED_HIGH(GPIOD_PIN0) | \ | ||
| 588 | PIN_OSPEED_HIGH(GPIOD_PIN1) | \ | ||
| 589 | PIN_OSPEED_HIGH(GPIOD_PIN2) | \ | ||
| 590 | PIN_OSPEED_HIGH(GPIOD_PIN3) | \ | ||
| 591 | PIN_OSPEED_HIGH(GPIOD_PIN4) | \ | ||
| 592 | PIN_OSPEED_HIGH(GPIOD_PIN5) | \ | ||
| 593 | PIN_OSPEED_HIGH(GPIOD_PIN6) | \ | ||
| 594 | PIN_OSPEED_HIGH(GPIOD_PIN7) | \ | ||
| 595 | PIN_OSPEED_HIGH(GPIOD_PIN8) | \ | ||
| 596 | PIN_OSPEED_HIGH(GPIOD_PIN9) | \ | ||
| 597 | PIN_OSPEED_HIGH(GPIOD_PIN10) | \ | ||
| 598 | PIN_OSPEED_HIGH(GPIOD_PIN11) | \ | ||
| 599 | PIN_OSPEED_HIGH(GPIOD_PIN12) | \ | ||
| 600 | PIN_OSPEED_HIGH(GPIOD_PIN13) | \ | ||
| 601 | PIN_OSPEED_HIGH(GPIOD_PIN14) | \ | ||
| 602 | PIN_OSPEED_HIGH(GPIOD_PIN15)) | ||
| 603 | #define VAL_GPIOD_PUPDR (PIN_PUPDR_PULLUP(GPIOD_PIN0) | \ | ||
| 604 | PIN_PUPDR_PULLUP(GPIOD_PIN1) | \ | ||
| 605 | PIN_PUPDR_PULLUP(GPIOD_PIN2) | \ | ||
| 606 | PIN_PUPDR_PULLUP(GPIOD_PIN3) | \ | ||
| 607 | PIN_PUPDR_PULLUP(GPIOD_PIN4) | \ | ||
| 608 | PIN_PUPDR_PULLUP(GPIOD_PIN5) | \ | ||
| 609 | PIN_PUPDR_PULLUP(GPIOD_PIN6) | \ | ||
| 610 | PIN_PUPDR_PULLUP(GPIOD_PIN7) | \ | ||
| 611 | PIN_PUPDR_PULLUP(GPIOD_PIN8) | \ | ||
| 612 | PIN_PUPDR_PULLUP(GPIOD_PIN9) | \ | ||
| 613 | PIN_PUPDR_PULLUP(GPIOD_PIN10) | \ | ||
| 614 | PIN_PUPDR_PULLUP(GPIOD_PIN11) | \ | ||
| 615 | PIN_PUPDR_PULLUP(GPIOD_PIN12) | \ | ||
| 616 | PIN_PUPDR_PULLUP(GPIOD_PIN13) | \ | ||
| 617 | PIN_PUPDR_PULLUP(GPIOD_PIN14) | \ | ||
| 618 | PIN_PUPDR_PULLUP(GPIOD_PIN15)) | ||
| 619 | #define VAL_GPIOD_ODR (PIN_ODR_HIGH(GPIOD_PIN0) | \ | ||
| 620 | PIN_ODR_HIGH(GPIOD_PIN1) | \ | ||
| 621 | PIN_ODR_HIGH(GPIOD_PIN2) | \ | ||
| 622 | PIN_ODR_HIGH(GPIOD_PIN3) | \ | ||
| 623 | PIN_ODR_HIGH(GPIOD_PIN4) | \ | ||
| 624 | PIN_ODR_HIGH(GPIOD_PIN5) | \ | ||
| 625 | PIN_ODR_HIGH(GPIOD_PIN6) | \ | ||
| 626 | PIN_ODR_HIGH(GPIOD_PIN7) | \ | ||
| 627 | PIN_ODR_HIGH(GPIOD_PIN8) | \ | ||
| 628 | PIN_ODR_HIGH(GPIOD_PIN9) | \ | ||
| 629 | PIN_ODR_HIGH(GPIOD_PIN10) | \ | ||
| 630 | PIN_ODR_HIGH(GPIOD_PIN11) | \ | ||
| 631 | PIN_ODR_HIGH(GPIOD_PIN12) | \ | ||
| 632 | PIN_ODR_HIGH(GPIOD_PIN13) | \ | ||
| 633 | PIN_ODR_HIGH(GPIOD_PIN14) | \ | ||
| 634 | PIN_ODR_HIGH(GPIOD_PIN15)) | ||
| 635 | #define VAL_GPIOD_AFRL (PIN_AFIO_AF(GPIOD_PIN0, 0U) | \ | ||
| 636 | PIN_AFIO_AF(GPIOD_PIN1, 0U) | \ | ||
| 637 | PIN_AFIO_AF(GPIOD_PIN2, 0U) | \ | ||
| 638 | PIN_AFIO_AF(GPIOD_PIN3, 0U) | \ | ||
| 639 | PIN_AFIO_AF(GPIOD_PIN4, 0U) | \ | ||
| 640 | PIN_AFIO_AF(GPIOD_PIN5, 0U) | \ | ||
| 641 | PIN_AFIO_AF(GPIOD_PIN6, 0U) | \ | ||
| 642 | PIN_AFIO_AF(GPIOD_PIN7, 0U)) | ||
| 643 | #define VAL_GPIOD_AFRH (PIN_AFIO_AF(GPIOD_PIN8, 0U) | \ | ||
| 644 | PIN_AFIO_AF(GPIOD_PIN9, 0U) | \ | ||
| 645 | PIN_AFIO_AF(GPIOD_PIN10, 0U) | \ | ||
| 646 | PIN_AFIO_AF(GPIOD_PIN11, 0U) | \ | ||
| 647 | PIN_AFIO_AF(GPIOD_PIN12, 0U) | \ | ||
| 648 | PIN_AFIO_AF(GPIOD_PIN13, 0U) | \ | ||
| 649 | PIN_AFIO_AF(GPIOD_PIN14, 0U) | \ | ||
| 650 | PIN_AFIO_AF(GPIOD_PIN15, 0U)) | ||
| 651 | |||
| 652 | /* | ||
| 653 | * GPIOE setup: | ||
| 654 | * | ||
| 655 | * PE0 - PIN0 (input pullup). | ||
| 656 | * PE1 - PIN1 (input pullup). | ||
| 657 | * PE2 - PIN2 (input pullup). | ||
| 658 | * PE3 - PIN3 (input pullup). | ||
| 659 | * PE4 - PIN4 (input pullup). | ||
| 660 | * PE5 - PIN5 (input pullup). | ||
| 661 | * PE6 - PIN6 (input pullup). | ||
| 662 | * PE7 - PIN7 (input pullup). | ||
| 663 | * PE8 - PIN8 (input pullup). | ||
| 664 | * PE9 - PIN9 (input pullup). | ||
| 665 | * PE10 - PIN10 (input pullup). | ||
| 666 | * PE11 - PIN11 (input pullup). | ||
| 667 | * PE12 - PIN12 (input pullup). | ||
| 668 | * PE13 - PIN13 (input pullup). | ||
| 669 | * PE14 - PIN14 (input pullup). | ||
| 670 | * PE15 - PIN15 (input pullup). | ||
| 671 | */ | ||
| 672 | #define VAL_GPIOE_MODER (PIN_MODE_INPUT(GPIOE_PIN0) | \ | ||
| 673 | PIN_MODE_INPUT(GPIOE_PIN1) | \ | ||
| 674 | PIN_MODE_INPUT(GPIOE_PIN2) | \ | ||
| 675 | PIN_MODE_INPUT(GPIOE_PIN3) | \ | ||
| 676 | PIN_MODE_INPUT(GPIOE_PIN4) | \ | ||
| 677 | PIN_MODE_INPUT(GPIOE_PIN5) | \ | ||
| 678 | PIN_MODE_INPUT(GPIOE_PIN6) | \ | ||
| 679 | PIN_MODE_INPUT(GPIOE_PIN7) | \ | ||
| 680 | PIN_MODE_INPUT(GPIOE_PIN8) | \ | ||
| 681 | PIN_MODE_INPUT(GPIOE_PIN9) | \ | ||
| 682 | PIN_MODE_INPUT(GPIOE_PIN10) | \ | ||
| 683 | PIN_MODE_INPUT(GPIOE_PIN11) | \ | ||
| 684 | PIN_MODE_INPUT(GPIOE_PIN12) | \ | ||
| 685 | PIN_MODE_INPUT(GPIOE_PIN13) | \ | ||
| 686 | PIN_MODE_INPUT(GPIOE_PIN14) | \ | ||
| 687 | PIN_MODE_INPUT(GPIOE_PIN15)) | ||
| 688 | #define VAL_GPIOE_OTYPER (PIN_OTYPE_PUSHPULL(GPIOE_PIN0) | \ | ||
| 689 | PIN_OTYPE_PUSHPULL(GPIOE_PIN1) | \ | ||
| 690 | PIN_OTYPE_PUSHPULL(GPIOE_PIN2) | \ | ||
| 691 | PIN_OTYPE_PUSHPULL(GPIOE_PIN3) | \ | ||
| 692 | PIN_OTYPE_PUSHPULL(GPIOE_PIN4) | \ | ||
| 693 | PIN_OTYPE_PUSHPULL(GPIOE_PIN5) | \ | ||
| 694 | PIN_OTYPE_PUSHPULL(GPIOE_PIN6) | \ | ||
| 695 | PIN_OTYPE_PUSHPULL(GPIOE_PIN7) | \ | ||
| 696 | PIN_OTYPE_PUSHPULL(GPIOE_PIN8) | \ | ||
| 697 | PIN_OTYPE_PUSHPULL(GPIOE_PIN9) | \ | ||
| 698 | PIN_OTYPE_PUSHPULL(GPIOE_PIN10) | \ | ||
| 699 | PIN_OTYPE_PUSHPULL(GPIOE_PIN11) | \ | ||
| 700 | PIN_OTYPE_PUSHPULL(GPIOE_PIN12) | \ | ||
| 701 | PIN_OTYPE_PUSHPULL(GPIOE_PIN13) | \ | ||
| 702 | PIN_OTYPE_PUSHPULL(GPIOE_PIN14) | \ | ||
| 703 | PIN_OTYPE_PUSHPULL(GPIOE_PIN15)) | ||
| 704 | #define VAL_GPIOE_OSPEEDR (PIN_OSPEED_HIGH(GPIOE_PIN0) | \ | ||
| 705 | PIN_OSPEED_HIGH(GPIOE_PIN1) | \ | ||
| 706 | PIN_OSPEED_HIGH(GPIOE_PIN2) | \ | ||
| 707 | PIN_OSPEED_HIGH(GPIOE_PIN3) | \ | ||
| 708 | PIN_OSPEED_HIGH(GPIOE_PIN4) | \ | ||
| 709 | PIN_OSPEED_HIGH(GPIOE_PIN5) | \ | ||
| 710 | PIN_OSPEED_HIGH(GPIOE_PIN6) | \ | ||
| 711 | PIN_OSPEED_HIGH(GPIOE_PIN7) | \ | ||
| 712 | PIN_OSPEED_HIGH(GPIOE_PIN8) | \ | ||
| 713 | PIN_OSPEED_HIGH(GPIOE_PIN9) | \ | ||
| 714 | PIN_OSPEED_HIGH(GPIOE_PIN10) | \ | ||
| 715 | PIN_OSPEED_HIGH(GPIOE_PIN11) | \ | ||
| 716 | PIN_OSPEED_HIGH(GPIOE_PIN12) | \ | ||
| 717 | PIN_OSPEED_HIGH(GPIOE_PIN13) | \ | ||
| 718 | PIN_OSPEED_HIGH(GPIOE_PIN14) | \ | ||
| 719 | PIN_OSPEED_HIGH(GPIOE_PIN15)) | ||
| 720 | #define VAL_GPIOE_PUPDR (PIN_PUPDR_PULLUP(GPIOE_PIN0) | \ | ||
| 721 | PIN_PUPDR_PULLUP(GPIOE_PIN1) | \ | ||
| 722 | PIN_PUPDR_PULLUP(GPIOE_PIN2) | \ | ||
| 723 | PIN_PUPDR_PULLUP(GPIOE_PIN3) | \ | ||
| 724 | PIN_PUPDR_PULLUP(GPIOE_PIN4) | \ | ||
| 725 | PIN_PUPDR_PULLUP(GPIOE_PIN5) | \ | ||
| 726 | PIN_PUPDR_PULLUP(GPIOE_PIN6) | \ | ||
| 727 | PIN_PUPDR_PULLUP(GPIOE_PIN7) | \ | ||
| 728 | PIN_PUPDR_PULLUP(GPIOE_PIN8) | \ | ||
| 729 | PIN_PUPDR_PULLUP(GPIOE_PIN9) | \ | ||
| 730 | PIN_PUPDR_PULLUP(GPIOE_PIN10) | \ | ||
| 731 | PIN_PUPDR_PULLUP(GPIOE_PIN11) | \ | ||
| 732 | PIN_PUPDR_PULLUP(GPIOE_PIN12) | \ | ||
| 733 | PIN_PUPDR_PULLUP(GPIOE_PIN13) | \ | ||
| 734 | PIN_PUPDR_PULLUP(GPIOE_PIN14) | \ | ||
| 735 | PIN_PUPDR_PULLUP(GPIOE_PIN15)) | ||
| 736 | #define VAL_GPIOE_ODR (PIN_ODR_HIGH(GPIOE_PIN0) | \ | ||
| 737 | PIN_ODR_HIGH(GPIOE_PIN1) | \ | ||
| 738 | PIN_ODR_HIGH(GPIOE_PIN2) | \ | ||
| 739 | PIN_ODR_HIGH(GPIOE_PIN3) | \ | ||
| 740 | PIN_ODR_HIGH(GPIOE_PIN4) | \ | ||
| 741 | PIN_ODR_HIGH(GPIOE_PIN5) | \ | ||
| 742 | PIN_ODR_HIGH(GPIOE_PIN6) | \ | ||
| 743 | PIN_ODR_HIGH(GPIOE_PIN7) | \ | ||
| 744 | PIN_ODR_HIGH(GPIOE_PIN8) | \ | ||
| 745 | PIN_ODR_HIGH(GPIOE_PIN9) | \ | ||
| 746 | PIN_ODR_HIGH(GPIOE_PIN10) | \ | ||
| 747 | PIN_ODR_HIGH(GPIOE_PIN11) | \ | ||
| 748 | PIN_ODR_HIGH(GPIOE_PIN12) | \ | ||
| 749 | PIN_ODR_HIGH(GPIOE_PIN13) | \ | ||
| 750 | PIN_ODR_HIGH(GPIOE_PIN14) | \ | ||
| 751 | PIN_ODR_HIGH(GPIOE_PIN15)) | ||
| 752 | #define VAL_GPIOE_AFRL (PIN_AFIO_AF(GPIOE_PIN0, 0U) | \ | ||
| 753 | PIN_AFIO_AF(GPIOE_PIN1, 0U) | \ | ||
| 754 | PIN_AFIO_AF(GPIOE_PIN2, 0U) | \ | ||
| 755 | PIN_AFIO_AF(GPIOE_PIN3, 0U) | \ | ||
| 756 | PIN_AFIO_AF(GPIOE_PIN4, 0U) | \ | ||
| 757 | PIN_AFIO_AF(GPIOE_PIN5, 0U) | \ | ||
| 758 | PIN_AFIO_AF(GPIOE_PIN6, 0U) | \ | ||
| 759 | PIN_AFIO_AF(GPIOE_PIN7, 0U)) | ||
| 760 | #define VAL_GPIOE_AFRH (PIN_AFIO_AF(GPIOE_PIN8, 0U) | \ | ||
| 761 | PIN_AFIO_AF(GPIOE_PIN9, 0U) | \ | ||
| 762 | PIN_AFIO_AF(GPIOE_PIN10, 0U) | \ | ||
| 763 | PIN_AFIO_AF(GPIOE_PIN11, 0U) | \ | ||
| 764 | PIN_AFIO_AF(GPIOE_PIN12, 0U) | \ | ||
| 765 | PIN_AFIO_AF(GPIOE_PIN13, 0U) | \ | ||
| 766 | PIN_AFIO_AF(GPIOE_PIN14, 0U) | \ | ||
| 767 | PIN_AFIO_AF(GPIOE_PIN15, 0U)) | ||
| 768 | |||
| 769 | /* | ||
| 770 | * GPIOF setup: | ||
| 771 | * | ||
| 772 | * PF0 - COL7 | ||
| 773 | * PF1 - COL6 | ||
| 774 | * PF2 - PIN2 (input pullup). | ||
| 775 | * PF3 - PIN3 (input pullup). | ||
| 776 | * PF4 - PIN4 (input pullup). | ||
| 777 | * PF5 - PIN5 (input pullup). | ||
| 778 | * PF6 - PIN6 (input pullup). | ||
| 779 | * PF7 - PIN7 (input pullup). | ||
| 780 | * PF8 - PIN8 (input pullup). | ||
| 781 | * PF9 - PIN9 (input pullup). | ||
| 782 | * PF10 - PIN10 (input pullup). | ||
| 783 | * PF11 - PIN11 (input pullup). | ||
| 784 | * PF12 - PIN12 (input pullup). | ||
| 785 | * PF13 - PIN13 (input pullup). | ||
| 786 | * PF14 - PIN14 (input pullup). | ||
| 787 | * PF15 - PIN15 (input pullup). | ||
| 788 | */ | ||
| 789 | #define VAL_GPIOF_MODER (PIN_MODE_INPUT(GPIOF_PIN0) | \ | ||
| 790 | PIN_MODE_INPUT(GPIOF_PIN1) | \ | ||
| 791 | PIN_MODE_INPUT(GPIOF_PIN2) | \ | ||
| 792 | PIN_MODE_INPUT(GPIOF_PIN3) | \ | ||
| 793 | PIN_MODE_INPUT(GPIOF_PIN4) | \ | ||
| 794 | PIN_MODE_INPUT(GPIOF_PIN5) | \ | ||
| 795 | PIN_MODE_INPUT(GPIOF_PIN6) | \ | ||
| 796 | PIN_MODE_INPUT(GPIOF_PIN7) | \ | ||
| 797 | PIN_MODE_INPUT(GPIOF_PIN8) | \ | ||
| 798 | PIN_MODE_INPUT(GPIOF_PIN9) | \ | ||
| 799 | PIN_MODE_INPUT(GPIOF_PIN10) | \ | ||
| 800 | PIN_MODE_INPUT(GPIOF_PIN11) | \ | ||
| 801 | PIN_MODE_INPUT(GPIOF_PIN12) | \ | ||
| 802 | PIN_MODE_INPUT(GPIOF_PIN13) | \ | ||
| 803 | PIN_MODE_INPUT(GPIOF_PIN14) | \ | ||
| 804 | PIN_MODE_INPUT(GPIOF_PIN15)) | ||
| 805 | #define VAL_GPIOF_OTYPER (PIN_OTYPE_PUSHPULL(GPIOF_PIN0) | \ | ||
| 806 | PIN_OTYPE_PUSHPULL(GPIOF_PIN1) | \ | ||
| 807 | PIN_OTYPE_PUSHPULL(GPIOF_PIN2) | \ | ||
| 808 | PIN_OTYPE_PUSHPULL(GPIOF_PIN3) | \ | ||
| 809 | PIN_OTYPE_PUSHPULL(GPIOF_PIN4) | \ | ||
| 810 | PIN_OTYPE_PUSHPULL(GPIOF_PIN5) | \ | ||
| 811 | PIN_OTYPE_PUSHPULL(GPIOF_PIN6) | \ | ||
| 812 | PIN_OTYPE_PUSHPULL(GPIOF_PIN7) | \ | ||
| 813 | PIN_OTYPE_PUSHPULL(GPIOF_PIN8) | \ | ||
| 814 | PIN_OTYPE_PUSHPULL(GPIOF_PIN9) | \ | ||
| 815 | PIN_OTYPE_PUSHPULL(GPIOF_PIN10) | \ | ||
| 816 | PIN_OTYPE_PUSHPULL(GPIOF_PIN11) | \ | ||
| 817 | PIN_OTYPE_PUSHPULL(GPIOF_PIN12) | \ | ||
| 818 | PIN_OTYPE_PUSHPULL(GPIOF_PIN13) | \ | ||
| 819 | PIN_OTYPE_PUSHPULL(GPIOF_PIN14) | \ | ||
| 820 | PIN_OTYPE_PUSHPULL(GPIOF_PIN15)) | ||
| 821 | #define VAL_GPIOF_OSPEEDR (PIN_OSPEED_VERYLOW(GPIOF_PIN0) | \ | ||
| 822 | PIN_OSPEED_VERYLOW(GPIOF_PIN1) | \ | ||
| 823 | PIN_OSPEED_HIGH(GPIOF_PIN2) | \ | ||
| 824 | PIN_OSPEED_HIGH(GPIOF_PIN3) | \ | ||
| 825 | PIN_OSPEED_HIGH(GPIOF_PIN4) | \ | ||
| 826 | PIN_OSPEED_HIGH(GPIOF_PIN5) | \ | ||
| 827 | PIN_OSPEED_HIGH(GPIOF_PIN6) | \ | ||
| 828 | PIN_OSPEED_HIGH(GPIOF_PIN7) | \ | ||
| 829 | PIN_OSPEED_HIGH(GPIOF_PIN8) | \ | ||
| 830 | PIN_OSPEED_HIGH(GPIOF_PIN9) | \ | ||
| 831 | PIN_OSPEED_HIGH(GPIOF_PIN10) | \ | ||
| 832 | PIN_OSPEED_HIGH(GPIOF_PIN11) | \ | ||
| 833 | PIN_OSPEED_HIGH(GPIOF_PIN12) | \ | ||
| 834 | PIN_OSPEED_HIGH(GPIOF_PIN13) | \ | ||
| 835 | PIN_OSPEED_HIGH(GPIOF_PIN14) | \ | ||
| 836 | PIN_OSPEED_HIGH(GPIOF_PIN15)) | ||
| 837 | #define VAL_GPIOF_PUPDR (PIN_PUPDR_PULLUP(GPIOF_PIN0) | \ | ||
| 838 | PIN_PUPDR_PULLUP(GPIOF_PIN1) | \ | ||
| 839 | PIN_PUPDR_PULLUP(GPIOF_PIN2) | \ | ||
| 840 | PIN_PUPDR_PULLUP(GPIOF_PIN3) | \ | ||
| 841 | PIN_PUPDR_PULLUP(GPIOF_PIN4) | \ | ||
| 842 | PIN_PUPDR_PULLUP(GPIOF_PIN5) | \ | ||
| 843 | PIN_PUPDR_PULLUP(GPIOF_PIN6) | \ | ||
| 844 | PIN_PUPDR_PULLUP(GPIOF_PIN7) | \ | ||
| 845 | PIN_PUPDR_PULLUP(GPIOF_PIN8) | \ | ||
| 846 | PIN_PUPDR_PULLUP(GPIOF_PIN9) | \ | ||
| 847 | PIN_PUPDR_PULLUP(GPIOF_PIN10) | \ | ||
| 848 | PIN_PUPDR_PULLUP(GPIOF_PIN11) | \ | ||
| 849 | PIN_PUPDR_PULLUP(GPIOF_PIN12) | \ | ||
| 850 | PIN_PUPDR_PULLUP(GPIOF_PIN13) | \ | ||
| 851 | PIN_PUPDR_PULLUP(GPIOF_PIN14) | \ | ||
| 852 | PIN_PUPDR_PULLUP(GPIOF_PIN15)) | ||
| 853 | #define VAL_GPIOF_ODR (PIN_ODR_HIGH(GPIOF_PIN0) | \ | ||
| 854 | PIN_ODR_HIGH(GPIOF_PIN1) | \ | ||
| 855 | PIN_ODR_HIGH(GPIOF_PIN2) | \ | ||
| 856 | PIN_ODR_HIGH(GPIOF_PIN3) | \ | ||
| 857 | PIN_ODR_HIGH(GPIOF_PIN4) | \ | ||
| 858 | PIN_ODR_HIGH(GPIOF_PIN5) | \ | ||
| 859 | PIN_ODR_HIGH(GPIOF_PIN6) | \ | ||
| 860 | PIN_ODR_HIGH(GPIOF_PIN7) | \ | ||
| 861 | PIN_ODR_HIGH(GPIOF_PIN8) | \ | ||
| 862 | PIN_ODR_HIGH(GPIOF_PIN9) | \ | ||
| 863 | PIN_ODR_HIGH(GPIOF_PIN10) | \ | ||
| 864 | PIN_ODR_HIGH(GPIOF_PIN11) | \ | ||
| 865 | PIN_ODR_HIGH(GPIOF_PIN12) | \ | ||
| 866 | PIN_ODR_HIGH(GPIOF_PIN13) | \ | ||
| 867 | PIN_ODR_HIGH(GPIOF_PIN14) | \ | ||
| 868 | PIN_ODR_HIGH(GPIOF_PIN15)) | ||
| 869 | #define VAL_GPIOF_AFRL (PIN_AFIO_AF(GPIOF_PIN0, 0U) | \ | ||
| 870 | PIN_AFIO_AF(GPIOF_PIN1, 0U) | \ | ||
| 871 | PIN_AFIO_AF(GPIOF_PIN2, 0U) | \ | ||
| 872 | PIN_AFIO_AF(GPIOF_PIN3, 0U) | \ | ||
| 873 | PIN_AFIO_AF(GPIOF_PIN4, 0U) | \ | ||
| 874 | PIN_AFIO_AF(GPIOF_PIN5, 0U) | \ | ||
| 875 | PIN_AFIO_AF(GPIOF_PIN6, 0U) | \ | ||
| 876 | PIN_AFIO_AF(GPIOF_PIN7, 0U)) | ||
| 877 | #define VAL_GPIOF_AFRH (PIN_AFIO_AF(GPIOF_PIN8, 0U) | \ | ||
| 878 | PIN_AFIO_AF(GPIOF_PIN9, 0U) | \ | ||
| 879 | PIN_AFIO_AF(GPIOF_PIN10, 0U) | \ | ||
| 880 | PIN_AFIO_AF(GPIOF_PIN11, 0U) | \ | ||
| 881 | PIN_AFIO_AF(GPIOF_PIN12, 0U) | \ | ||
| 882 | PIN_AFIO_AF(GPIOF_PIN13, 0U) | \ | ||
| 883 | PIN_AFIO_AF(GPIOF_PIN14, 0U) | \ | ||
| 884 | PIN_AFIO_AF(GPIOF_PIN15, 0U)) | ||
| 885 | |||
| 886 | #if !defined(_FROM_ASM_) | ||
| 887 | #ifdef __cplusplus | ||
| 888 | extern "C" { | ||
| 889 | #endif | ||
| 890 | void boardInit(void); | ||
| 891 | #ifdef __cplusplus | ||
| 892 | } | ||
| 893 | #endif | ||
| 894 | #endif /* _FROM_ASM_ */ | ||
| 895 | |||
| 896 | #endif /* _BOARD_H */ | ||
diff --git a/keyboards/vinta/boards/GENERIC_STM32_F042X6/board.mk b/keyboards/vinta/boards/GENERIC_STM32_F042X6/board.mk deleted file mode 100644 index bbeb5bbff..000000000 --- a/keyboards/vinta/boards/GENERIC_STM32_F042X6/board.mk +++ /dev/null | |||
| @@ -1,5 +0,0 @@ | |||
| 1 | # List of all the board related files. | ||
| 2 | BOARDSRC = $(BOARD_PATH)/boards/GENERIC_STM32_F042X6/board.c | ||
| 3 | |||
| 4 | # Required include directories | ||
| 5 | BOARDINC = $(BOARD_PATH)/boards/GENERIC_STM32_F042X6 | ||
diff --git a/keyboards/vinta/bootloader_defs.h b/keyboards/vinta/bootloader_defs.h deleted file mode 100644 index 4994be9c2..000000000 --- a/keyboards/vinta/bootloader_defs.h +++ /dev/null | |||
| @@ -1,7 +0,0 @@ | |||
| 1 | /* Address for jumping to bootloader on STM32 chips. */ | ||
| 2 | /* It is chip dependent, the correct number can be looked up here: | ||
| 3 | * http://www.st.com/web/en/resource/technical/document/application_note/CD00167594.pdf | ||
| 4 | * This also requires a patch to chibios: | ||
| 5 | * <tmk_dir>/tmk_core/tool/chibios/ch-bootloader-jump.patch | ||
| 6 | */ | ||
| 7 | #define STM32_BOOTLOADER_ADDRESS 0x1FFFC400 \ No newline at end of file | ||
diff --git a/lib/python/qmk/cli/cformat.py b/lib/python/qmk/cli/cformat.py index 600161c5c..6bcd15a11 100644 --- a/lib/python/qmk/cli/cformat.py +++ b/lib/python/qmk/cli/cformat.py | |||
| @@ -43,8 +43,8 @@ def cformat(cli): | |||
| 43 | # Empty array for files | 43 | # Empty array for files |
| 44 | files = [] | 44 | files = [] |
| 45 | # Core directories for formatting | 45 | # Core directories for formatting |
| 46 | core_dirs = ['drivers', 'quantum', 'tests', 'tmk_core'] | 46 | core_dirs = ['drivers', 'quantum', 'tests', 'tmk_core', 'platforms'] |
| 47 | ignores = ['tmk_core/protocol/usb_hid', 'quantum/template'] | 47 | ignores = ['tmk_core/protocol/usb_hid', 'quantum/template', 'platforms/chibios'] |
| 48 | # Find the list of files to format | 48 | # Find the list of files to format |
| 49 | if cli.args.files: | 49 | if cli.args.files: |
| 50 | files.extend(normpath(file) for file in cli.args.files) | 50 | files.extend(normpath(file) for file in cli.args.files) |
diff --git a/platforms/chibios/BLACKPILL_STM32_F401/board/board.mk b/platforms/chibios/BLACKPILL_STM32_F401/board/board.mk new file mode 100644 index 000000000..fddf7dace --- /dev/null +++ b/platforms/chibios/BLACKPILL_STM32_F401/board/board.mk | |||
| @@ -0,0 +1,9 @@ | |||
| 1 | # List of all the board related files. | ||
| 2 | BOARDSRC = $(CHIBIOS)/os/hal/boards/ST_STM32F401C_DISCOVERY/board.c | ||
| 3 | |||
| 4 | # Required include directories | ||
| 5 | BOARDINC = $(CHIBIOS)/os/hal/boards/ST_STM32F401C_DISCOVERY | ||
| 6 | |||
| 7 | # Shared variables | ||
| 8 | ALLCSRC += $(BOARDSRC) | ||
| 9 | ALLINC += $(BOARDINC) | ||
diff --git a/platforms/chibios/BLACKPILL_STM32_F401/configs/board.h b/platforms/chibios/BLACKPILL_STM32_F401/configs/board.h new file mode 100644 index 000000000..30af6b0c8 --- /dev/null +++ b/platforms/chibios/BLACKPILL_STM32_F401/configs/board.h | |||
| @@ -0,0 +1,20 @@ | |||
| 1 | /* Copyright 2020 Nick Brassel (tzarc) | ||
| 2 | * | ||
| 3 | * This program is free software: you can redistribute it and/or modify | ||
| 4 | * it under the terms of the GNU General Public License as published by | ||
| 5 | * the Free Software Foundation, either version 3 of the License, or | ||
| 6 | * (at your option) any later version. | ||
| 7 | * | ||
| 8 | * This program is distributed in the hope that it will be useful, | ||
| 9 | * but WITHOUT ANY WARRANTY; without even the implied warranty of | ||
| 10 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | ||
| 11 | * GNU General Public License for more details. | ||
| 12 | * | ||
| 13 | * You should have received a copy of the GNU General Public License | ||
| 14 | * along with this program. If not, see <https://www.gnu.org/licenses/>. | ||
| 15 | */ | ||
| 16 | #pragma once | ||
| 17 | |||
| 18 | #include_next "board.h" | ||
| 19 | |||
| 20 | #undef STM32_HSE_BYPASS | ||
diff --git a/keyboards/handwired/onekey/blackpill_f401/chconf.h b/platforms/chibios/BLACKPILL_STM32_F401/configs/chconf.h index 7dc4f84a8..7dc4f84a8 100644 --- a/keyboards/handwired/onekey/blackpill_f401/chconf.h +++ b/platforms/chibios/BLACKPILL_STM32_F401/configs/chconf.h | |||
diff --git a/platforms/chibios/BLACKPILL_STM32_F401/configs/config.h b/platforms/chibios/BLACKPILL_STM32_F401/configs/config.h new file mode 100644 index 000000000..eb73e72ef --- /dev/null +++ b/platforms/chibios/BLACKPILL_STM32_F401/configs/config.h | |||
| @@ -0,0 +1,23 @@ | |||
| 1 | /* Copyright 2020 Nick Brassel (tzarc) | ||
| 2 | * | ||
| 3 | * This program is free software: you can redistribute it and/or modify | ||
| 4 | * it under the terms of the GNU General Public License as published by | ||
| 5 | * the Free Software Foundation, either version 3 of the License, or | ||
| 6 | * (at your option) any later version. | ||
| 7 | * | ||
| 8 | * This program is distributed in the hope that it will be useful, | ||
| 9 | * but WITHOUT ANY WARRANTY; without even the implied warranty of | ||
| 10 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | ||
| 11 | * GNU General Public License for more details. | ||
| 12 | * | ||
| 13 | * You should have received a copy of the GNU General Public License | ||
| 14 | * along with this program. If not, see <https://www.gnu.org/licenses/>. | ||
| 15 | */ | ||
| 16 | #pragma once | ||
| 17 | |||
| 18 | #define BOARD_OTG_NOVBUSSENS 1 | ||
| 19 | |||
| 20 | #define STM32_LSECLK 32768U | ||
| 21 | #define STM32_HSECLK 25000000U | ||
| 22 | |||
| 23 | #define EARLY_INIT_PERFORM_BOOTLOADER_JUMP TRUE | ||
diff --git a/platforms/chibios/BLACKPILL_STM32_F401/configs/halconf.h b/platforms/chibios/BLACKPILL_STM32_F401/configs/halconf.h new file mode 100644 index 000000000..a8db392aa --- /dev/null +++ b/platforms/chibios/BLACKPILL_STM32_F401/configs/halconf.h | |||
| @@ -0,0 +1,525 @@ | |||
| 1 | /* | ||
| 2 | ChibiOS - Copyright (C) 2006..2018 Giovanni Di Sirio | ||
| 3 | |||
| 4 | Licensed under the Apache License, Version 2.0 (the "License"); | ||
| 5 | you may not use this file except in compliance with the License. | ||
| 6 | You may obtain a copy of the License at | ||
| 7 | |||
| 8 | http://www.apache.org/licenses/LICENSE-2.0 | ||
| 9 | |||
| 10 | Unless required by applicable law or agreed to in writing, software | ||
| 11 | distributed under the License is distributed on an "AS IS" BASIS, | ||
| 12 | WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. | ||
| 13 | See the License for the specific language governing permissions and | ||
| 14 | limitations under the License. | ||
| 15 | */ | ||
| 16 | |||
| 17 | /** | ||
| 18 | * @file templates/halconf.h | ||
| 19 | * @brief HAL configuration header. | ||
| 20 | * @details HAL configuration file, this file allows to enable or disable the | ||
| 21 | * various device drivers from your application. You may also use | ||
| 22 | * this file in order to override the device drivers default settings. | ||
| 23 | * | ||
| 24 | * @addtogroup HAL_CONF | ||
| 25 | * @{ | ||
| 26 | */ | ||
| 27 | |||
| 28 | #ifndef HALCONF_H | ||
| 29 | #define HALCONF_H | ||
| 30 | |||
| 31 | #define _CHIBIOS_HAL_CONF_ | ||
| 32 | #define _CHIBIOS_HAL_CONF_VER_7_0_ | ||
| 33 | |||
| 34 | #include "mcuconf.h" | ||
| 35 | |||
| 36 | /** | ||
| 37 | * @brief Enables the PAL subsystem. | ||
| 38 | */ | ||
| 39 | #if !defined(HAL_USE_PAL) || defined(__DOXYGEN__) | ||
| 40 | #define HAL_USE_PAL TRUE | ||
| 41 | #endif | ||
| 42 | |||
| 43 | /** | ||
| 44 | * @brief Enables the ADC subsystem. | ||
| 45 | */ | ||
| 46 | #if !defined(HAL_USE_ADC) || defined(__DOXYGEN__) | ||
| 47 | #define HAL_USE_ADC FALSE | ||
| 48 | #endif | ||
| 49 | |||
| 50 | /** | ||
| 51 | * @brief Enables the CAN subsystem. | ||
| 52 | */ | ||
| 53 | #if !defined(HAL_USE_CAN) || defined(__DOXYGEN__) | ||
| 54 | #define HAL_USE_CAN FALSE | ||
| 55 | #endif | ||
| 56 | |||
| 57 | /** | ||
| 58 | * @brief Enables the cryptographic subsystem. | ||
| 59 | */ | ||
| 60 | #if !defined(HAL_USE_CRY) || defined(__DOXYGEN__) | ||
| 61 | #define HAL_USE_CRY FALSE | ||
| 62 | #endif | ||
| 63 | |||
| 64 | /** | ||
| 65 | * @brief Enables the DAC subsystem. | ||
| 66 | */ | ||
| 67 | #if !defined(HAL_USE_DAC) || defined(__DOXYGEN__) | ||
| 68 | #define HAL_USE_DAC FALSE | ||
| 69 | #endif | ||
| 70 | |||
| 71 | /** | ||
| 72 | * @brief Enables the GPT subsystem. | ||
| 73 | */ | ||
| 74 | #if !defined(HAL_USE_GPT) || defined(__DOXYGEN__) | ||
| 75 | #define HAL_USE_GPT FALSE | ||
| 76 | #endif | ||
| 77 | |||
| 78 | /** | ||
| 79 | * @brief Enables the I2C subsystem. | ||
| 80 | */ | ||
| 81 | #if !defined(HAL_USE_I2C) || defined(__DOXYGEN__) | ||
| 82 | #define HAL_USE_I2C FALSE | ||
| 83 | #endif | ||
| 84 | |||
| 85 | /** | ||
| 86 | * @brief Enables the I2S subsystem. | ||
| 87 | */ | ||
| 88 | #if !defined(HAL_USE_I2S) || defined(__DOXYGEN__) | ||
| 89 | #define HAL_USE_I2S FALSE | ||
| 90 | #endif | ||
| 91 | |||
| 92 | /** | ||
| 93 | * @brief Enables the ICU subsystem. | ||
| 94 | */ | ||
| 95 | #if !defined(HAL_USE_ICU) || defined(__DOXYGEN__) | ||
| 96 | #define HAL_USE_ICU FALSE | ||
| 97 | #endif | ||
| 98 | |||
| 99 | /** | ||
| 100 | * @brief Enables the MAC subsystem. | ||
| 101 | */ | ||
| 102 | #if !defined(HAL_USE_MAC) || defined(__DOXYGEN__) | ||
| 103 | #define HAL_USE_MAC FALSE | ||
| 104 | #endif | ||
| 105 | |||
| 106 | /** | ||
| 107 | * @brief Enables the MMC_SPI subsystem. | ||
| 108 | */ | ||
| 109 | #if !defined(HAL_USE_MMC_SPI) || defined(__DOXYGEN__) | ||
| 110 | #define HAL_USE_MMC_SPI FALSE | ||
| 111 | #endif | ||
| 112 | |||
| 113 | /** | ||
| 114 | * @brief Enables the PWM subsystem. | ||
| 115 | */ | ||
| 116 | #if !defined(HAL_USE_PWM) || defined(__DOXYGEN__) | ||
| 117 | #define HAL_USE_PWM FALSE | ||
| 118 | #endif | ||
| 119 | |||
| 120 | /** | ||
| 121 | * @brief Enables the RTC subsystem. | ||
| 122 | */ | ||
| 123 | #if !defined(HAL_USE_RTC) || defined(__DOXYGEN__) | ||
| 124 | #define HAL_USE_RTC FALSE | ||
| 125 | #endif | ||
| 126 | |||
| 127 | /** | ||
| 128 | * @brief Enables the SDC subsystem. | ||
| 129 | */ | ||
| 130 | #if !defined(HAL_USE_SDC) || defined(__DOXYGEN__) | ||
| 131 | #define HAL_USE_SDC FALSE | ||
| 132 | #endif | ||
| 133 | |||
| 134 | /** | ||
| 135 | * @brief Enables the SERIAL subsystem. | ||
| 136 | */ | ||
| 137 | #if !defined(HAL_USE_SERIAL) || defined(__DOXYGEN__) | ||
| 138 | #define HAL_USE_SERIAL FALSE | ||
| 139 | #endif | ||
| 140 | |||
| 141 | /** | ||
| 142 | * @brief Enables the SERIAL over USB subsystem. | ||
| 143 | */ | ||
| 144 | #if !defined(HAL_USE_SERIAL_USB) || defined(__DOXYGEN__) | ||
| 145 | #define HAL_USE_SERIAL_USB FALSE | ||
| 146 | #endif | ||
| 147 | |||
| 148 | /** | ||
| 149 | * @brief Enables the SIO subsystem. | ||
| 150 | */ | ||
| 151 | #if !defined(HAL_USE_SIO) || defined(__DOXYGEN__) | ||
| 152 | #define HAL_USE_SIO FALSE | ||
| 153 | #endif | ||
| 154 | |||
| 155 | /** | ||
| 156 | * @brief Enables the SPI subsystem. | ||
| 157 | */ | ||
| 158 | #if !defined(HAL_USE_SPI) || defined(__DOXYGEN__) | ||
| 159 | #define HAL_USE_SPI FALSE | ||
| 160 | #endif | ||
| 161 | |||
| 162 | /** | ||
| 163 | * @brief Enables the TRNG subsystem. | ||
| 164 | */ | ||
| 165 | #if !defined(HAL_USE_TRNG) || defined(__DOXYGEN__) | ||
| 166 | #define HAL_USE_TRNG FALSE | ||
| 167 | #endif | ||
| 168 | |||
| 169 | /** | ||
| 170 | * @brief Enables the UART subsystem. | ||
| 171 | */ | ||
| 172 | #if !defined(HAL_USE_UART) || defined(__DOXYGEN__) | ||
| 173 | #define HAL_USE_UART FALSE | ||
| 174 | #endif | ||
| 175 | |||
| 176 | /** | ||
| 177 | * @brief Enables the USB subsystem. | ||
| 178 | */ | ||
| 179 | #if !defined(HAL_USE_USB) || defined(__DOXYGEN__) | ||
| 180 | #define HAL_USE_USB TRUE | ||
| 181 | #endif | ||
| 182 | |||
| 183 | /** | ||
| 184 | * @brief Enables the WDG subsystem. | ||
| 185 | */ | ||
| 186 | #if !defined(HAL_USE_WDG) || defined(__DOXYGEN__) | ||
| 187 | #define HAL_USE_WDG FALSE | ||
| 188 | #endif | ||
| 189 | |||
| 190 | /** | ||
| 191 | * @brief Enables the WSPI subsystem. | ||
| 192 | */ | ||
| 193 | #if !defined(HAL_USE_WSPI) || defined(__DOXYGEN__) | ||
| 194 | #define HAL_USE_WSPI FALSE | ||
| 195 | #endif | ||
| 196 | |||
| 197 | /*===========================================================================*/ | ||
| 198 | /* PAL driver related settings. */ | ||
| 199 | /*===========================================================================*/ | ||
| 200 | |||
| 201 | /** | ||
| 202 | * @brief Enables synchronous APIs. | ||
| 203 | * @note Disabling this option saves both code and data space. | ||
| 204 | */ | ||
| 205 | #if !defined(PAL_USE_CALLBACKS) || defined(__DOXYGEN__) | ||
| 206 | #define PAL_USE_CALLBACKS FALSE | ||
| 207 | #endif | ||
| 208 | |||
| 209 | /** | ||
| 210 | * @brief Enables synchronous APIs. | ||
| 211 | * @note Disabling this option saves both code and data space. | ||
| 212 | */ | ||
| 213 | #if !defined(PAL_USE_WAIT) || defined(__DOXYGEN__) | ||
| 214 | #define PAL_USE_WAIT FALSE | ||
| 215 | #endif | ||
| 216 | |||
| 217 | /*===========================================================================*/ | ||
| 218 | /* ADC driver related settings. */ | ||
| 219 | /*===========================================================================*/ | ||
| 220 | |||
| 221 | /** | ||
| 222 | * @brief Enables synchronous APIs. | ||
| 223 | * @note Disabling this option saves both code and data space. | ||
| 224 | */ | ||
| 225 | #if !defined(ADC_USE_WAIT) || defined(__DOXYGEN__) | ||
| 226 | #define ADC_USE_WAIT TRUE | ||
| 227 | #endif | ||
| 228 | |||
| 229 | /** | ||
| 230 | * @brief Enables the @p adcAcquireBus() and @p adcReleaseBus() APIs. | ||
| 231 | * @note Disabling this option saves both code and data space. | ||
| 232 | */ | ||
| 233 | #if !defined(ADC_USE_MUTUAL_EXCLUSION) || defined(__DOXYGEN__) | ||
| 234 | #define ADC_USE_MUTUAL_EXCLUSION TRUE | ||
| 235 | #endif | ||
| 236 | |||
| 237 | /*===========================================================================*/ | ||
| 238 | /* CAN driver related settings. */ | ||
| 239 | /*===========================================================================*/ | ||
| 240 | |||
| 241 | /** | ||
| 242 | * @brief Sleep mode related APIs inclusion switch. | ||
| 243 | */ | ||
| 244 | #if !defined(CAN_USE_SLEEP_MODE) || defined(__DOXYGEN__) | ||
| 245 | #define CAN_USE_SLEEP_MODE TRUE | ||
| 246 | #endif | ||
| 247 | |||
| 248 | /** | ||
| 249 | * @brief Enforces the driver to use direct callbacks rather than OSAL events. | ||
| 250 | */ | ||
| 251 | #if !defined(CAN_ENFORCE_USE_CALLBACKS) || defined(__DOXYGEN__) | ||
| 252 | #define CAN_ENFORCE_USE_CALLBACKS FALSE | ||
| 253 | #endif | ||
| 254 | |||
| 255 | /*===========================================================================*/ | ||
| 256 | /* CRY driver related settings. */ | ||
| 257 | /*===========================================================================*/ | ||
| 258 | |||
| 259 | /** | ||
| 260 | * @brief Enables the SW fall-back of the cryptographic driver. | ||
| 261 | * @details When enabled, this option, activates a fall-back software | ||
| 262 | * implementation for algorithms not supported by the underlying | ||
| 263 | * hardware. | ||
| 264 | * @note Fall-back implementations may not be present for all algorithms. | ||
| 265 | */ | ||
| 266 | #if !defined(HAL_CRY_USE_FALLBACK) || defined(__DOXYGEN__) | ||
| 267 | #define HAL_CRY_USE_FALLBACK FALSE | ||
| 268 | #endif | ||
| 269 | |||
| 270 | /** | ||
| 271 | * @brief Makes the driver forcibly use the fall-back implementations. | ||
| 272 | */ | ||
| 273 | #if !defined(HAL_CRY_ENFORCE_FALLBACK) || defined(__DOXYGEN__) | ||
| 274 | #define HAL_CRY_ENFORCE_FALLBACK FALSE | ||
| 275 | #endif | ||
| 276 | |||
| 277 | /*===========================================================================*/ | ||
| 278 | /* DAC driver related settings. */ | ||
| 279 | /*===========================================================================*/ | ||
| 280 | |||
| 281 | /** | ||
| 282 | * @brief Enables synchronous APIs. | ||
| 283 | * @note Disabling this option saves both code and data space. | ||
| 284 | */ | ||
| 285 | #if !defined(DAC_USE_WAIT) || defined(__DOXYGEN__) | ||
| 286 | #define DAC_USE_WAIT TRUE | ||
| 287 | #endif | ||
| 288 | |||
| 289 | /** | ||
| 290 | * @brief Enables the @p dacAcquireBus() and @p dacReleaseBus() APIs. | ||
| 291 | * @note Disabling this option saves both code and data space. | ||
| 292 | */ | ||
| 293 | #if !defined(DAC_USE_MUTUAL_EXCLUSION) || defined(__DOXYGEN__) | ||
| 294 | #define DAC_USE_MUTUAL_EXCLUSION TRUE | ||
| 295 | #endif | ||
| 296 | |||
| 297 | /*===========================================================================*/ | ||
| 298 | /* I2C driver related settings. */ | ||
| 299 | /*===========================================================================*/ | ||
| 300 | |||
| 301 | /** | ||
| 302 | * @brief Enables the mutual exclusion APIs on the I2C bus. | ||
| 303 | */ | ||
| 304 | #if !defined(I2C_USE_MUTUAL_EXCLUSION) || defined(__DOXYGEN__) | ||
| 305 | #define I2C_USE_MUTUAL_EXCLUSION TRUE | ||
| 306 | #endif | ||
| 307 | |||
| 308 | /*===========================================================================*/ | ||
| 309 | /* MAC driver related settings. */ | ||
| 310 | /*===========================================================================*/ | ||
| 311 | |||
| 312 | /** | ||
| 313 | * @brief Enables the zero-copy API. | ||
| 314 | */ | ||
| 315 | #if !defined(MAC_USE_ZERO_COPY) || defined(__DOXYGEN__) | ||
| 316 | #define MAC_USE_ZERO_COPY FALSE | ||
| 317 | #endif | ||
| 318 | |||
| 319 | /** | ||
| 320 | * @brief Enables an event sources for incoming packets. | ||
| 321 | */ | ||
| 322 | #if !defined(MAC_USE_EVENTS) || defined(__DOXYGEN__) | ||
| 323 | #define MAC_USE_EVENTS TRUE | ||
| 324 | #endif | ||
| 325 | |||
| 326 | /*===========================================================================*/ | ||
| 327 | /* MMC_SPI driver related settings. */ | ||
| 328 | /*===========================================================================*/ | ||
| 329 | |||
| 330 | /** | ||
| 331 | * @brief Delays insertions. | ||
| 332 | * @details If enabled this options inserts delays into the MMC waiting | ||
| 333 | * routines releasing some extra CPU time for the threads with | ||
| 334 | * lower priority, this may slow down the driver a bit however. | ||
| 335 | * This option is recommended also if the SPI driver does not | ||
| 336 | * use a DMA channel and heavily loads the CPU. | ||
| 337 | */ | ||
| 338 | #if !defined(MMC_NICE_WAITING) || defined(__DOXYGEN__) | ||
| 339 | #define MMC_NICE_WAITING TRUE | ||
| 340 | #endif | ||
| 341 | |||
| 342 | /*===========================================================================*/ | ||
| 343 | /* SDC driver related settings. */ | ||
| 344 | /*===========================================================================*/ | ||
| 345 | |||
| 346 | /** | ||
| 347 | * @brief Number of initialization attempts before rejecting the card. | ||
| 348 | * @note Attempts are performed at 10mS intervals. | ||
| 349 | */ | ||
| 350 | #if !defined(SDC_INIT_RETRY) || defined(__DOXYGEN__) | ||
| 351 | #define SDC_INIT_RETRY 100 | ||
| 352 | #endif | ||
| 353 | |||
| 354 | /** | ||
| 355 | * @brief Include support for MMC cards. | ||
| 356 | * @note MMC support is not yet implemented so this option must be kept | ||
| 357 | * at @p FALSE. | ||
| 358 | */ | ||
| 359 | #if !defined(SDC_MMC_SUPPORT) || defined(__DOXYGEN__) | ||
| 360 | #define SDC_MMC_SUPPORT FALSE | ||
| 361 | #endif | ||
| 362 | |||
| 363 | /** | ||
| 364 | * @brief Delays insertions. | ||
| 365 | * @details If enabled this options inserts delays into the MMC waiting | ||
| 366 | * routines releasing some extra CPU time for the threads with | ||
| 367 | * lower priority, this may slow down the driver a bit however. | ||
| 368 | */ | ||
| 369 | #if !defined(SDC_NICE_WAITING) || defined(__DOXYGEN__) | ||
| 370 | #define SDC_NICE_WAITING TRUE | ||
| 371 | #endif | ||
| 372 | |||
| 373 | /** | ||
| 374 | * @brief OCR initialization constant for V20 cards. | ||
| 375 | */ | ||
| 376 | #if !defined(SDC_INIT_OCR_V20) || defined(__DOXYGEN__) | ||
| 377 | #define SDC_INIT_OCR_V20 0x50FF8000U | ||
| 378 | #endif | ||
| 379 | |||
| 380 | /** | ||
| 381 | * @brief OCR initialization constant for non-V20 cards. | ||
| 382 | */ | ||
| 383 | #if !defined(SDC_INIT_OCR) || defined(__DOXYGEN__) | ||
| 384 | #define SDC_INIT_OCR 0x80100000U | ||
| 385 | #endif | ||
| 386 | |||
| 387 | /*===========================================================================*/ | ||
| 388 | /* SERIAL driver related settings. */ | ||
| 389 | /*===========================================================================*/ | ||
| 390 | |||
| 391 | /** | ||
| 392 | * @brief Default bit rate. | ||
| 393 | * @details Configuration parameter, this is the baud rate selected for the | ||
| 394 | * default configuration. | ||
| 395 | */ | ||
| 396 | #if !defined(SERIAL_DEFAULT_BITRATE) || defined(__DOXYGEN__) | ||
| 397 | #define SERIAL_DEFAULT_BITRATE 38400 | ||
| 398 | #endif | ||
| 399 | |||
| 400 | /** | ||
| 401 | * @brief Serial buffers size. | ||
| 402 | * @details Configuration parameter, you can change the depth of the queue | ||
| 403 | * buffers depending on the requirements of your application. | ||
| 404 | * @note The default is 16 bytes for both the transmission and receive | ||
| 405 | * buffers. | ||
| 406 | */ | ||
| 407 | #if !defined(SERIAL_BUFFERS_SIZE) || defined(__DOXYGEN__) | ||
| 408 | #define SERIAL_BUFFERS_SIZE 16 | ||
| 409 | #endif | ||
| 410 | |||
| 411 | /*===========================================================================*/ | ||
| 412 | /* SERIAL_USB driver related setting. */ | ||
| 413 | /*===========================================================================*/ | ||
| 414 | |||
| 415 | /** | ||
| 416 | * @brief Serial over USB buffers size. | ||
| 417 | * @details Configuration parameter, the buffer size must be a multiple of | ||
| 418 | * the USB data endpoint maximum packet size. | ||
| 419 | * @note The default is 256 bytes for both the transmission and receive | ||
| 420 | * buffers. | ||
| 421 | */ | ||
| 422 | #if !defined(SERIAL_USB_BUFFERS_SIZE) || defined(__DOXYGEN__) | ||
| 423 | #define SERIAL_USB_BUFFERS_SIZE 256 | ||
| 424 | #endif | ||
| 425 | |||
| 426 | /** | ||
| 427 | * @brief Serial over USB number of buffers. | ||
| 428 | * @note The default is 2 buffers. | ||
| 429 | */ | ||
| 430 | #if !defined(SERIAL_USB_BUFFERS_NUMBER) || defined(__DOXYGEN__) | ||
| 431 | #define SERIAL_USB_BUFFERS_NUMBER 2 | ||
| 432 | #endif | ||
| 433 | |||
| 434 | /*===========================================================================*/ | ||
| 435 | /* SPI driver related settings. */ | ||
| 436 | /*===========================================================================*/ | ||
| 437 | |||
| 438 | /** | ||
| 439 | * @brief Enables synchronous APIs. | ||
| 440 | * @note Disabling this option saves both code and data space. | ||
| 441 | */ | ||
| 442 | #if !defined(SPI_USE_WAIT) || defined(__DOXYGEN__) | ||
| 443 | #define SPI_USE_WAIT TRUE | ||
| 444 | #endif | ||
| 445 | |||
| 446 | /** | ||
| 447 | * @brief Enables circular transfers APIs. | ||
| 448 | * @note Disabling this option saves both code and data space. | ||
| 449 | */ | ||
| 450 | #if !defined(SPI_USE_CIRCULAR) || defined(__DOXYGEN__) | ||
| 451 | #define SPI_USE_CIRCULAR FALSE | ||
| 452 | #endif | ||
| 453 | |||
| 454 | |||
| 455 | /** | ||
| 456 | * @brief Enables the @p spiAcquireBus() and @p spiReleaseBus() APIs. | ||
| 457 | * @note Disabling this option saves both code and data space. | ||
| 458 | */ | ||
| 459 | #if !defined(SPI_USE_MUTUAL_EXCLUSION) || defined(__DOXYGEN__) | ||
| 460 | #define SPI_USE_MUTUAL_EXCLUSION TRUE | ||
| 461 | #endif | ||
| 462 | |||
| 463 | /** | ||
| 464 | * @brief Handling method for SPI CS line. | ||
| 465 | * @note Disabling this option saves both code and data space. | ||
| 466 | */ | ||
| 467 | #if !defined(SPI_SELECT_MODE) || defined(__DOXYGEN__) | ||
| 468 | #define SPI_SELECT_MODE SPI_SELECT_MODE_PAD | ||
| 469 | #endif | ||
| 470 | |||
| 471 | /*===========================================================================*/ | ||
| 472 | /* UART driver related settings. */ | ||
| 473 | /*===========================================================================*/ | ||
| 474 | |||
| 475 | /** | ||
| 476 | * @brief Enables synchronous APIs. | ||
| 477 | * @note Disabling this option saves both code and data space. | ||
| 478 | */ | ||
| 479 | #if !defined(UART_USE_WAIT) || defined(__DOXYGEN__) | ||
| 480 | #define UART_USE_WAIT FALSE | ||
| 481 | #endif | ||
| 482 | |||
| 483 | /** | ||
| 484 | * @brief Enables the @p uartAcquireBus() and @p uartReleaseBus() APIs. | ||
| 485 | * @note Disabling this option saves both code and data space. | ||
| 486 | */ | ||
| 487 | #if !defined(UART_USE_MUTUAL_EXCLUSION) || defined(__DOXYGEN__) | ||
| 488 | #define UART_USE_MUTUAL_EXCLUSION FALSE | ||
| 489 | #endif | ||
| 490 | |||
| 491 | /*===========================================================================*/ | ||
| 492 | /* USB driver related settings. */ | ||
| 493 | /*===========================================================================*/ | ||
| 494 | |||
| 495 | /** | ||
| 496 | * @brief Enables synchronous APIs. | ||
| 497 | * @note Disabling this option saves both code and data space. | ||
| 498 | */ | ||
| 499 | #if !defined(USB_USE_WAIT) || defined(__DOXYGEN__) | ||
| 500 | #define USB_USE_WAIT TRUE | ||
| 501 | #endif | ||
| 502 | |||
| 503 | /*===========================================================================*/ | ||
| 504 | /* WSPI driver related settings. */ | ||
| 505 | /*===========================================================================*/ | ||
| 506 | |||
| 507 | /** | ||
| 508 | * @brief Enables synchronous APIs. | ||
| 509 | * @note Disabling this option saves both code and data space. | ||
| 510 | */ | ||
| 511 | #if !defined(WSPI_USE_WAIT) || defined(__DOXYGEN__) | ||
| 512 | #define WSPI_USE_WAIT TRUE | ||
| 513 | #endif | ||
| 514 | |||
| 515 | /** | ||
| 516 | * @brief Enables the @p wspiAcquireBus() and @p wspiReleaseBus() APIs. | ||
| 517 | * @note Disabling this option saves both code and data space. | ||
| 518 | */ | ||
| 519 | #if !defined(WSPI_USE_MUTUAL_EXCLUSION) || defined(__DOXYGEN__) | ||
| 520 | #define WSPI_USE_MUTUAL_EXCLUSION TRUE | ||
| 521 | #endif | ||
| 522 | |||
| 523 | #endif /* HALCONF_H */ | ||
| 524 | |||
| 525 | /** @} */ | ||
diff --git a/platforms/chibios/BLACKPILL_STM32_F401/configs/mcuconf.h b/platforms/chibios/BLACKPILL_STM32_F401/configs/mcuconf.h new file mode 100644 index 000000000..ba6e934fe --- /dev/null +++ b/platforms/chibios/BLACKPILL_STM32_F401/configs/mcuconf.h | |||
| @@ -0,0 +1,253 @@ | |||
| 1 | /* | ||
| 2 | ChibiOS - Copyright (C) 2006..2018 Giovanni Di Sirio | ||
| 3 | |||
| 4 | Licensed under the Apache License, Version 2.0 (the "License"); | ||
| 5 | you may not use this file except in compliance with the License. | ||
| 6 | You may obtain a copy of the License at | ||
| 7 | |||
| 8 | http://www.apache.org/licenses/LICENSE-2.0 | ||
| 9 | |||
| 10 | Unless required by applicable law or agreed to in writing, software | ||
| 11 | distributed under the License is distributed on an "AS IS" BASIS, | ||
| 12 | WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. | ||
| 13 | See the License for the specific language governing permissions and | ||
| 14 | limitations under the License. | ||
| 15 | */ | ||
| 16 | |||
| 17 | #ifndef MCUCONF_H | ||
| 18 | #define MCUCONF_H | ||
| 19 | |||
| 20 | /* | ||
| 21 | * STM32F4xx drivers configuration. | ||
| 22 | * The following settings override the default settings present in | ||
| 23 | * the various device driver implementation headers. | ||
| 24 | * Note that the settings for each driver only have effect if the whole | ||
| 25 | * driver is enabled in halconf.h. | ||
| 26 | * | ||
| 27 | * IRQ priorities: | ||
| 28 | * 15...0 Lowest...Highest. | ||
| 29 | * | ||
| 30 | * DMA priorities: | ||
| 31 | * 0...3 Lowest...Highest. | ||
| 32 | */ | ||
| 33 | |||
| 34 | #define STM32F4xx_MCUCONF | ||
| 35 | |||
| 36 | /* | ||
| 37 | * HAL driver system settings. | ||
| 38 | */ | ||
| 39 | #define STM32_NO_INIT FALSE | ||
| 40 | #define STM32_HSI_ENABLED TRUE | ||
| 41 | #define STM32_LSI_ENABLED TRUE | ||
| 42 | #define STM32_HSE_ENABLED TRUE | ||
| 43 | #define STM32_LSE_ENABLED FALSE | ||
| 44 | #define STM32_CLOCK48_REQUIRED TRUE | ||
| 45 | #define STM32_SW STM32_SW_PLL | ||
| 46 | #define STM32_PLLSRC STM32_PLLSRC_HSE | ||
| 47 | #define STM32_PLLM_VALUE 25 | ||
| 48 | #define STM32_PLLN_VALUE 336 | ||
| 49 | #define STM32_PLLP_VALUE 4 | ||
| 50 | #define STM32_PLLQ_VALUE 7 | ||
| 51 | #define STM32_HPRE STM32_HPRE_DIV1 | ||
| 52 | #define STM32_PPRE1 STM32_PPRE1_DIV4 | ||
| 53 | #define STM32_PPRE2 STM32_PPRE2_DIV2 | ||
| 54 | #define STM32_RTCSEL STM32_RTCSEL_LSI | ||
| 55 | #define STM32_RTCPRE_VALUE 8 | ||
| 56 | #define STM32_MCO1SEL STM32_MCO1SEL_HSI | ||
| 57 | #define STM32_MCO1PRE STM32_MCO1PRE_DIV1 | ||
| 58 | #define STM32_MCO2SEL STM32_MCO2SEL_SYSCLK | ||
| 59 | #define STM32_MCO2PRE STM32_MCO2PRE_DIV5 | ||
| 60 | #define STM32_I2SSRC STM32_I2SSRC_CKIN | ||
| 61 | #define STM32_PLLI2SN_VALUE 192 | ||
| 62 | #define STM32_PLLI2SR_VALUE 5 | ||
| 63 | #define STM32_PVD_ENABLE FALSE | ||
| 64 | #define STM32_PLS STM32_PLS_LEV0 | ||
| 65 | #define STM32_BKPRAM_ENABLE FALSE | ||
| 66 | |||
| 67 | /* | ||
| 68 | * IRQ system settings. | ||
| 69 | */ | ||
| 70 | #define STM32_IRQ_EXTI0_PRIORITY 6 | ||
| 71 | #define STM32_IRQ_EXTI1_PRIORITY 6 | ||
| 72 | #define STM32_IRQ_EXTI2_PRIORITY 6 | ||
| 73 | #define STM32_IRQ_EXTI3_PRIORITY 6 | ||
| 74 | #define STM32_IRQ_EXTI4_PRIORITY 6 | ||
| 75 | #define STM32_IRQ_EXTI5_9_PRIORITY 6 | ||
| 76 | #define STM32_IRQ_EXTI10_15_PRIORITY 6 | ||
| 77 | #define STM32_IRQ_EXTI16_PRIORITY 6 | ||
| 78 | #define STM32_IRQ_EXTI17_PRIORITY 15 | ||
| 79 | #define STM32_IRQ_EXTI18_PRIORITY 6 | ||
| 80 | #define STM32_IRQ_EXTI19_PRIORITY 6 | ||
| 81 | #define STM32_IRQ_EXTI20_PRIORITY 6 | ||
| 82 | #define STM32_IRQ_EXTI21_PRIORITY 15 | ||
| 83 | #define STM32_IRQ_EXTI22_PRIORITY 15 | ||
| 84 | |||
| 85 | /* | ||
| 86 | * ADC driver system settings. | ||
| 87 | */ | ||
| 88 | #define STM32_ADC_ADCPRE ADC_CCR_ADCPRE_DIV4 | ||
| 89 | #define STM32_ADC_USE_ADC1 FALSE | ||
| 90 | #define STM32_ADC_ADC1_DMA_STREAM STM32_DMA_STREAM_ID(2, 4) | ||
| 91 | #define STM32_ADC_ADC1_DMA_PRIORITY 2 | ||
| 92 | #define STM32_ADC_IRQ_PRIORITY 6 | ||
| 93 | #define STM32_ADC_ADC1_DMA_IRQ_PRIORITY 6 | ||
| 94 | |||
| 95 | /* | ||
| 96 | * GPT driver system settings. | ||
| 97 | */ | ||
| 98 | #define STM32_GPT_USE_TIM1 FALSE | ||
| 99 | #define STM32_GPT_USE_TIM2 FALSE | ||
| 100 | #define STM32_GPT_USE_TIM3 FALSE | ||
| 101 | #define STM32_GPT_USE_TIM4 FALSE | ||
| 102 | #define STM32_GPT_USE_TIM5 FALSE | ||
| 103 | #define STM32_GPT_USE_TIM9 FALSE | ||
| 104 | #define STM32_GPT_USE_TIM11 FALSE | ||
| 105 | #define STM32_GPT_TIM1_IRQ_PRIORITY 7 | ||
| 106 | #define STM32_GPT_TIM2_IRQ_PRIORITY 7 | ||
| 107 | #define STM32_GPT_TIM3_IRQ_PRIORITY 7 | ||
| 108 | #define STM32_GPT_TIM4_IRQ_PRIORITY 7 | ||
| 109 | #define STM32_GPT_TIM5_IRQ_PRIORITY 7 | ||
| 110 | #define STM32_GPT_TIM9_IRQ_PRIORITY 7 | ||
| 111 | #define STM32_GPT_TIM11_IRQ_PRIORITY 7 | ||
| 112 | |||
| 113 | /* | ||
| 114 | * I2C driver system settings. | ||
| 115 | */ | ||
| 116 | #define STM32_I2C_USE_I2C1 FALSE | ||
| 117 | #define STM32_I2C_USE_I2C2 FALSE | ||
| 118 | #define STM32_I2C_USE_I2C3 FALSE | ||
| 119 | #define STM32_I2C_BUSY_TIMEOUT 50 | ||
| 120 | #define STM32_I2C_I2C1_RX_DMA_STREAM STM32_DMA_STREAM_ID(1, 0) | ||
| 121 | #define STM32_I2C_I2C1_TX_DMA_STREAM STM32_DMA_STREAM_ID(1, 6) | ||
| 122 | #define STM32_I2C_I2C2_RX_DMA_STREAM STM32_DMA_STREAM_ID(1, 2) | ||
| 123 | #define STM32_I2C_I2C2_TX_DMA_STREAM STM32_DMA_STREAM_ID(1, 7) | ||
| 124 | #define STM32_I2C_I2C3_RX_DMA_STREAM STM32_DMA_STREAM_ID(1, 2) | ||
| 125 | #define STM32_I2C_I2C3_TX_DMA_STREAM STM32_DMA_STREAM_ID(1, 4) | ||
| 126 | #define STM32_I2C_I2C1_IRQ_PRIORITY 5 | ||
| 127 | #define STM32_I2C_I2C2_IRQ_PRIORITY 5 | ||
| 128 | #define STM32_I2C_I2C3_IRQ_PRIORITY 5 | ||
| 129 | #define STM32_I2C_I2C1_DMA_PRIORITY 3 | ||
| 130 | #define STM32_I2C_I2C2_DMA_PRIORITY 3 | ||
| 131 | #define STM32_I2C_I2C3_DMA_PRIORITY 3 | ||
| 132 | #define STM32_I2C_DMA_ERROR_HOOK(i2cp) osalSysHalt("DMA failure") | ||
| 133 | |||
| 134 | /* | ||
| 135 | * I2S driver system settings. | ||
| 136 | */ | ||
| 137 | #define STM32_I2S_USE_SPI2 FALSE | ||
| 138 | #define STM32_I2S_USE_SPI3 FALSE | ||
| 139 | #define STM32_I2S_SPI2_IRQ_PRIORITY 10 | ||
| 140 | #define STM32_I2S_SPI3_IRQ_PRIORITY 10 | ||
| 141 | #define STM32_I2S_SPI2_DMA_PRIORITY 1 | ||
| 142 | #define STM32_I2S_SPI3_DMA_PRIORITY 1 | ||
| 143 | #define STM32_I2S_SPI2_RX_DMA_STREAM STM32_DMA_STREAM_ID(1, 3) | ||
| 144 | #define STM32_I2S_SPI2_TX_DMA_STREAM STM32_DMA_STREAM_ID(1, 4) | ||
| 145 | #define STM32_I2S_SPI3_RX_DMA_STREAM STM32_DMA_STREAM_ID(1, 0) | ||
| 146 | #define STM32_I2S_SPI3_TX_DMA_STREAM STM32_DMA_STREAM_ID(1, 7) | ||
| 147 | #define STM32_I2S_DMA_ERROR_HOOK(i2sp) osalSysHalt("DMA failure") | ||
| 148 | |||
| 149 | /* | ||
| 150 | * ICU driver system settings. | ||
| 151 | */ | ||
| 152 | #define STM32_ICU_USE_TIM1 FALSE | ||
| 153 | #define STM32_ICU_USE_TIM2 FALSE | ||
| 154 | #define STM32_ICU_USE_TIM3 FALSE | ||
| 155 | #define STM32_ICU_USE_TIM4 FALSE | ||
| 156 | #define STM32_ICU_USE_TIM5 FALSE | ||
| 157 | #define STM32_ICU_USE_TIM9 FALSE | ||
| 158 | #define STM32_ICU_TIM1_IRQ_PRIORITY 7 | ||
| 159 | #define STM32_ICU_TIM2_IRQ_PRIORITY 7 | ||
| 160 | #define STM32_ICU_TIM3_IRQ_PRIORITY 7 | ||
| 161 | #define STM32_ICU_TIM4_IRQ_PRIORITY 7 | ||
| 162 | #define STM32_ICU_TIM5_IRQ_PRIORITY 7 | ||
| 163 | #define STM32_ICU_TIM9_IRQ_PRIORITY 7 | ||
| 164 | |||
| 165 | /* | ||
| 166 | * PWM driver system settings. | ||
| 167 | */ | ||
| 168 | #define STM32_PWM_USE_ADVANCED FALSE | ||
| 169 | #define STM32_PWM_USE_TIM1 FALSE | ||
| 170 | #define STM32_PWM_USE_TIM2 FALSE | ||
| 171 | #define STM32_PWM_USE_TIM3 FALSE | ||
| 172 | #define STM32_PWM_USE_TIM4 FALSE | ||
| 173 | #define STM32_PWM_USE_TIM5 FALSE | ||
| 174 | #define STM32_PWM_USE_TIM9 FALSE | ||
| 175 | #define STM32_PWM_TIM1_IRQ_PRIORITY 7 | ||
| 176 | #define STM32_PWM_TIM2_IRQ_PRIORITY 7 | ||
| 177 | #define STM32_PWM_TIM3_IRQ_PRIORITY 7 | ||
| 178 | #define STM32_PWM_TIM4_IRQ_PRIORITY 7 | ||
| 179 | #define STM32_PWM_TIM5_IRQ_PRIORITY 7 | ||
| 180 | #define STM32_PWM_TIM9_IRQ_PRIORITY 7 | ||
| 181 | |||
| 182 | /* | ||
| 183 | * SERIAL driver system settings. | ||
| 184 | */ | ||
| 185 | #define STM32_SERIAL_USE_USART1 FALSE | ||
| 186 | #define STM32_SERIAL_USE_USART2 FALSE | ||
| 187 | #define STM32_SERIAL_USE_USART6 FALSE | ||
| 188 | #define STM32_SERIAL_USART1_PRIORITY 12 | ||
| 189 | #define STM32_SERIAL_USART2_PRIORITY 12 | ||
| 190 | #define STM32_SERIAL_USART6_PRIORITY 12 | ||
| 191 | |||
| 192 | /* | ||
| 193 | * SPI driver system settings. | ||
| 194 | */ | ||
| 195 | #define STM32_SPI_USE_SPI1 FALSE | ||
| 196 | #define STM32_SPI_USE_SPI2 FALSE | ||
| 197 | #define STM32_SPI_USE_SPI3 FALSE | ||
| 198 | #define STM32_SPI_SPI1_RX_DMA_STREAM STM32_DMA_STREAM_ID(2, 0) | ||
| 199 | #define STM32_SPI_SPI1_TX_DMA_STREAM STM32_DMA_STREAM_ID(2, 3) | ||
| 200 | #define STM32_SPI_SPI2_RX_DMA_STREAM STM32_DMA_STREAM_ID(1, 3) | ||
| 201 | #define STM32_SPI_SPI2_TX_DMA_STREAM STM32_DMA_STREAM_ID(1, 4) | ||
| 202 | #define STM32_SPI_SPI3_RX_DMA_STREAM STM32_DMA_STREAM_ID(1, 0) | ||
| 203 | #define STM32_SPI_SPI3_TX_DMA_STREAM STM32_DMA_STREAM_ID(1, 7) | ||
| 204 | #define STM32_SPI_SPI1_DMA_PRIORITY 1 | ||
| 205 | #define STM32_SPI_SPI2_DMA_PRIORITY 1 | ||
| 206 | #define STM32_SPI_SPI3_DMA_PRIORITY 1 | ||
| 207 | #define STM32_SPI_SPI1_IRQ_PRIORITY 10 | ||
| 208 | #define STM32_SPI_SPI2_IRQ_PRIORITY 10 | ||
| 209 | #define STM32_SPI_SPI3_IRQ_PRIORITY 10 | ||
| 210 | #define STM32_SPI_DMA_ERROR_HOOK(spip) osalSysHalt("DMA failure") | ||
| 211 | |||
| 212 | /* | ||
| 213 | * ST driver system settings. | ||
| 214 | */ | ||
| 215 | #define STM32_ST_IRQ_PRIORITY 8 | ||
| 216 | #define STM32_ST_USE_TIMER 2 | ||
| 217 | |||
| 218 | /* | ||
| 219 | * UART driver system settings. | ||
| 220 | */ | ||
| 221 | #define STM32_UART_USE_USART1 FALSE | ||
| 222 | #define STM32_UART_USE_USART2 FALSE | ||
| 223 | #define STM32_UART_USE_USART6 FALSE | ||
| 224 | #define STM32_UART_USART1_RX_DMA_STREAM STM32_DMA_STREAM_ID(2, 5) | ||
| 225 | #define STM32_UART_USART1_TX_DMA_STREAM STM32_DMA_STREAM_ID(2, 7) | ||
| 226 | #define STM32_UART_USART2_RX_DMA_STREAM STM32_DMA_STREAM_ID(1, 5) | ||
| 227 | #define STM32_UART_USART2_TX_DMA_STREAM STM32_DMA_STREAM_ID(1, 6) | ||
| 228 | #define STM32_UART_USART6_RX_DMA_STREAM STM32_DMA_STREAM_ID(2, 2) | ||
| 229 | #define STM32_UART_USART6_TX_DMA_STREAM STM32_DMA_STREAM_ID(2, 7) | ||
| 230 | #define STM32_UART_USART1_IRQ_PRIORITY 12 | ||
| 231 | #define STM32_UART_USART2_IRQ_PRIORITY 12 | ||
| 232 | #define STM32_UART_USART6_IRQ_PRIORITY 12 | ||
| 233 | #define STM32_UART_USART1_DMA_PRIORITY 0 | ||
| 234 | #define STM32_UART_USART2_DMA_PRIORITY 0 | ||
| 235 | #define STM32_UART_USART6_DMA_PRIORITY 0 | ||
| 236 | #define STM32_UART_DMA_ERROR_HOOK(uartp) osalSysHalt("DMA failure") | ||
| 237 | |||
| 238 | /* | ||
| 239 | * USB driver system settings. | ||
| 240 | */ | ||
| 241 | #define STM32_USB_USE_OTG1 TRUE | ||
| 242 | #define STM32_USB_OTG1_IRQ_PRIORITY 14 | ||
| 243 | #define STM32_USB_OTG1_RX_FIFO_SIZE 512 | ||
| 244 | #define STM32_USB_OTG_THREAD_PRIO NORMALPRIO+1 | ||
| 245 | #define STM32_USB_OTG_THREAD_STACK_SIZE 128 | ||
| 246 | #define STM32_USB_OTGFIFO_FILL_BASEPRI 0 | ||
| 247 | |||
| 248 | /* | ||
| 249 | * WDG driver system settings. | ||
| 250 | */ | ||
| 251 | #define STM32_WDG_USE_IWDG FALSE | ||
| 252 | |||
| 253 | #endif /* MCUCONF_H */ | ||
diff --git a/platforms/chibios/BLACKPILL_STM32_F411/board/board.mk b/platforms/chibios/BLACKPILL_STM32_F411/board/board.mk new file mode 100644 index 000000000..bb00b1a2b --- /dev/null +++ b/platforms/chibios/BLACKPILL_STM32_F411/board/board.mk | |||
| @@ -0,0 +1,9 @@ | |||
| 1 | # List of all the board related files. | ||
| 2 | BOARDSRC = $(CHIBIOS)/os/hal/boards/ST_NUCLEO64_F411RE/board.c | ||
| 3 | |||
| 4 | # Required include directories | ||
| 5 | BOARDINC = $(CHIBIOS)/os/hal/boards/ST_NUCLEO64_F411RE | ||
| 6 | |||
| 7 | # Shared variables | ||
| 8 | ALLCSRC += $(BOARDSRC) | ||
| 9 | ALLINC += $(BOARDINC) | ||
diff --git a/platforms/chibios/BLACKPILL_STM32_F411/configs/board.h b/platforms/chibios/BLACKPILL_STM32_F411/configs/board.h new file mode 100644 index 000000000..30af6b0c8 --- /dev/null +++ b/platforms/chibios/BLACKPILL_STM32_F411/configs/board.h | |||
| @@ -0,0 +1,20 @@ | |||
| 1 | /* Copyright 2020 Nick Brassel (tzarc) | ||
| 2 | * | ||
| 3 | * This program is free software: you can redistribute it and/or modify | ||
| 4 | * it under the terms of the GNU General Public License as published by | ||
| 5 | * the Free Software Foundation, either version 3 of the License, or | ||
| 6 | * (at your option) any later version. | ||
| 7 | * | ||
| 8 | * This program is distributed in the hope that it will be useful, | ||
| 9 | * but WITHOUT ANY WARRANTY; without even the implied warranty of | ||
| 10 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | ||
| 11 | * GNU General Public License for more details. | ||
| 12 | * | ||
| 13 | * You should have received a copy of the GNU General Public License | ||
| 14 | * along with this program. If not, see <https://www.gnu.org/licenses/>. | ||
| 15 | */ | ||
| 16 | #pragma once | ||
| 17 | |||
| 18 | #include_next "board.h" | ||
| 19 | |||
| 20 | #undef STM32_HSE_BYPASS | ||
diff --git a/keyboards/handwired/onekey/blackpill_f411/chconf.h b/platforms/chibios/BLACKPILL_STM32_F411/configs/chconf.h index 7dc4f84a8..7dc4f84a8 100644 --- a/keyboards/handwired/onekey/blackpill_f411/chconf.h +++ b/platforms/chibios/BLACKPILL_STM32_F411/configs/chconf.h | |||
diff --git a/platforms/chibios/BLACKPILL_STM32_F411/configs/config.h b/platforms/chibios/BLACKPILL_STM32_F411/configs/config.h new file mode 100644 index 000000000..eb73e72ef --- /dev/null +++ b/platforms/chibios/BLACKPILL_STM32_F411/configs/config.h | |||
| @@ -0,0 +1,23 @@ | |||
| 1 | /* Copyright 2020 Nick Brassel (tzarc) | ||
| 2 | * | ||
| 3 | * This program is free software: you can redistribute it and/or modify | ||
| 4 | * it under the terms of the GNU General Public License as published by | ||
| 5 | * the Free Software Foundation, either version 3 of the License, or | ||
| 6 | * (at your option) any later version. | ||
| 7 | * | ||
| 8 | * This program is distributed in the hope that it will be useful, | ||
| 9 | * but WITHOUT ANY WARRANTY; without even the implied warranty of | ||
| 10 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | ||
| 11 | * GNU General Public License for more details. | ||
| 12 | * | ||
| 13 | * You should have received a copy of the GNU General Public License | ||
| 14 | * along with this program. If not, see <https://www.gnu.org/licenses/>. | ||
| 15 | */ | ||
| 16 | #pragma once | ||
| 17 | |||
| 18 | #define BOARD_OTG_NOVBUSSENS 1 | ||
| 19 | |||
| 20 | #define STM32_LSECLK 32768U | ||
| 21 | #define STM32_HSECLK 25000000U | ||
| 22 | |||
| 23 | #define EARLY_INIT_PERFORM_BOOTLOADER_JUMP TRUE | ||
diff --git a/platforms/chibios/BLACKPILL_STM32_F411/configs/halconf.h b/platforms/chibios/BLACKPILL_STM32_F411/configs/halconf.h new file mode 100644 index 000000000..a8db392aa --- /dev/null +++ b/platforms/chibios/BLACKPILL_STM32_F411/configs/halconf.h | |||
| @@ -0,0 +1,525 @@ | |||
| 1 | /* | ||
| 2 | ChibiOS - Copyright (C) 2006..2018 Giovanni Di Sirio | ||
| 3 | |||
| 4 | Licensed under the Apache License, Version 2.0 (the "License"); | ||
| 5 | you may not use this file except in compliance with the License. | ||
| 6 | You may obtain a copy of the License at | ||
| 7 | |||
| 8 | http://www.apache.org/licenses/LICENSE-2.0 | ||
| 9 | |||
| 10 | Unless required by applicable law or agreed to in writing, software | ||
| 11 | distributed under the License is distributed on an "AS IS" BASIS, | ||
| 12 | WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. | ||
| 13 | See the License for the specific language governing permissions and | ||
| 14 | limitations under the License. | ||
| 15 | */ | ||
| 16 | |||
| 17 | /** | ||
| 18 | * @file templates/halconf.h | ||
| 19 | * @brief HAL configuration header. | ||
| 20 | * @details HAL configuration file, this file allows to enable or disable the | ||
| 21 | * various device drivers from your application. You may also use | ||
| 22 | * this file in order to override the device drivers default settings. | ||
| 23 | * | ||
| 24 | * @addtogroup HAL_CONF | ||
| 25 | * @{ | ||
| 26 | */ | ||
| 27 | |||
| 28 | #ifndef HALCONF_H | ||
| 29 | #define HALCONF_H | ||
| 30 | |||
| 31 | #define _CHIBIOS_HAL_CONF_ | ||
| 32 | #define _CHIBIOS_HAL_CONF_VER_7_0_ | ||
| 33 | |||
| 34 | #include "mcuconf.h" | ||
| 35 | |||
| 36 | /** | ||
| 37 | * @brief Enables the PAL subsystem. | ||
| 38 | */ | ||
| 39 | #if !defined(HAL_USE_PAL) || defined(__DOXYGEN__) | ||
| 40 | #define HAL_USE_PAL TRUE | ||
| 41 | #endif | ||
| 42 | |||
| 43 | /** | ||
| 44 | * @brief Enables the ADC subsystem. | ||
| 45 | */ | ||
| 46 | #if !defined(HAL_USE_ADC) || defined(__DOXYGEN__) | ||
| 47 | #define HAL_USE_ADC FALSE | ||
| 48 | #endif | ||
| 49 | |||
| 50 | /** | ||
| 51 | * @brief Enables the CAN subsystem. | ||
| 52 | */ | ||
| 53 | #if !defined(HAL_USE_CAN) || defined(__DOXYGEN__) | ||
| 54 | #define HAL_USE_CAN FALSE | ||
| 55 | #endif | ||
| 56 | |||
| 57 | /** | ||
| 58 | * @brief Enables the cryptographic subsystem. | ||
| 59 | */ | ||
| 60 | #if !defined(HAL_USE_CRY) || defined(__DOXYGEN__) | ||
| 61 | #define HAL_USE_CRY FALSE | ||
| 62 | #endif | ||
| 63 | |||
| 64 | /** | ||
| 65 | * @brief Enables the DAC subsystem. | ||
| 66 | */ | ||
| 67 | #if !defined(HAL_USE_DAC) || defined(__DOXYGEN__) | ||
| 68 | #define HAL_USE_DAC FALSE | ||
| 69 | #endif | ||
| 70 | |||
| 71 | /** | ||
| 72 | * @brief Enables the GPT subsystem. | ||
| 73 | */ | ||
| 74 | #if !defined(HAL_USE_GPT) || defined(__DOXYGEN__) | ||
| 75 | #define HAL_USE_GPT FALSE | ||
| 76 | #endif | ||
| 77 | |||
| 78 | /** | ||
| 79 | * @brief Enables the I2C subsystem. | ||
| 80 | */ | ||
| 81 | #if !defined(HAL_USE_I2C) || defined(__DOXYGEN__) | ||
| 82 | #define HAL_USE_I2C FALSE | ||
| 83 | #endif | ||
| 84 | |||
| 85 | /** | ||
| 86 | * @brief Enables the I2S subsystem. | ||
| 87 | */ | ||
| 88 | #if !defined(HAL_USE_I2S) || defined(__DOXYGEN__) | ||
| 89 | #define HAL_USE_I2S FALSE | ||
| 90 | #endif | ||
| 91 | |||
| 92 | /** | ||
| 93 | * @brief Enables the ICU subsystem. | ||
| 94 | */ | ||
| 95 | #if !defined(HAL_USE_ICU) || defined(__DOXYGEN__) | ||
| 96 | #define HAL_USE_ICU FALSE | ||
| 97 | #endif | ||
| 98 | |||
| 99 | /** | ||
| 100 | * @brief Enables the MAC subsystem. | ||
| 101 | */ | ||
| 102 | #if !defined(HAL_USE_MAC) || defined(__DOXYGEN__) | ||
| 103 | #define HAL_USE_MAC FALSE | ||
| 104 | #endif | ||
| 105 | |||
| 106 | /** | ||
| 107 | * @brief Enables the MMC_SPI subsystem. | ||
| 108 | */ | ||
| 109 | #if !defined(HAL_USE_MMC_SPI) || defined(__DOXYGEN__) | ||
| 110 | #define HAL_USE_MMC_SPI FALSE | ||
| 111 | #endif | ||
| 112 | |||
| 113 | /** | ||
| 114 | * @brief Enables the PWM subsystem. | ||
| 115 | */ | ||
| 116 | #if !defined(HAL_USE_PWM) || defined(__DOXYGEN__) | ||
| 117 | #define HAL_USE_PWM FALSE | ||
| 118 | #endif | ||
| 119 | |||
| 120 | /** | ||
| 121 | * @brief Enables the RTC subsystem. | ||
| 122 | */ | ||
| 123 | #if !defined(HAL_USE_RTC) || defined(__DOXYGEN__) | ||
| 124 | #define HAL_USE_RTC FALSE | ||
| 125 | #endif | ||
| 126 | |||
| 127 | /** | ||
| 128 | * @brief Enables the SDC subsystem. | ||
| 129 | */ | ||
| 130 | #if !defined(HAL_USE_SDC) || defined(__DOXYGEN__) | ||
| 131 | #define HAL_USE_SDC FALSE | ||
| 132 | #endif | ||
| 133 | |||
| 134 | /** | ||
| 135 | * @brief Enables the SERIAL subsystem. | ||
| 136 | */ | ||
| 137 | #if !defined(HAL_USE_SERIAL) || defined(__DOXYGEN__) | ||
| 138 | #define HAL_USE_SERIAL FALSE | ||
| 139 | #endif | ||
| 140 | |||
| 141 | /** | ||
| 142 | * @brief Enables the SERIAL over USB subsystem. | ||
| 143 | */ | ||
| 144 | #if !defined(HAL_USE_SERIAL_USB) || defined(__DOXYGEN__) | ||
| 145 | #define HAL_USE_SERIAL_USB FALSE | ||
| 146 | #endif | ||
| 147 | |||
| 148 | /** | ||
| 149 | * @brief Enables the SIO subsystem. | ||
| 150 | */ | ||
| 151 | #if !defined(HAL_USE_SIO) || defined(__DOXYGEN__) | ||
| 152 | #define HAL_USE_SIO FALSE | ||
| 153 | #endif | ||
| 154 | |||
| 155 | /** | ||
| 156 | * @brief Enables the SPI subsystem. | ||
| 157 | */ | ||
| 158 | #if !defined(HAL_USE_SPI) || defined(__DOXYGEN__) | ||
| 159 | #define HAL_USE_SPI FALSE | ||
| 160 | #endif | ||
| 161 | |||
| 162 | /** | ||
| 163 | * @brief Enables the TRNG subsystem. | ||
| 164 | */ | ||
| 165 | #if !defined(HAL_USE_TRNG) || defined(__DOXYGEN__) | ||
| 166 | #define HAL_USE_TRNG FALSE | ||
| 167 | #endif | ||
| 168 | |||
| 169 | /** | ||
| 170 | * @brief Enables the UART subsystem. | ||
| 171 | */ | ||
| 172 | #if !defined(HAL_USE_UART) || defined(__DOXYGEN__) | ||
| 173 | #define HAL_USE_UART FALSE | ||
| 174 | #endif | ||
| 175 | |||
| 176 | /** | ||
| 177 | * @brief Enables the USB subsystem. | ||
| 178 | */ | ||
| 179 | #if !defined(HAL_USE_USB) || defined(__DOXYGEN__) | ||
| 180 | #define HAL_USE_USB TRUE | ||
| 181 | #endif | ||
| 182 | |||
| 183 | /** | ||
| 184 | * @brief Enables the WDG subsystem. | ||
| 185 | */ | ||
| 186 | #if !defined(HAL_USE_WDG) || defined(__DOXYGEN__) | ||
| 187 | #define HAL_USE_WDG FALSE | ||
| 188 | #endif | ||
| 189 | |||
| 190 | /** | ||
| 191 | * @brief Enables the WSPI subsystem. | ||
| 192 | */ | ||
| 193 | #if !defined(HAL_USE_WSPI) || defined(__DOXYGEN__) | ||
| 194 | #define HAL_USE_WSPI FALSE | ||
| 195 | #endif | ||
| 196 | |||
| 197 | /*===========================================================================*/ | ||
| 198 | /* PAL driver related settings. */ | ||
| 199 | /*===========================================================================*/ | ||
| 200 | |||
| 201 | /** | ||
| 202 | * @brief Enables synchronous APIs. | ||
| 203 | * @note Disabling this option saves both code and data space. | ||
| 204 | */ | ||
| 205 | #if !defined(PAL_USE_CALLBACKS) || defined(__DOXYGEN__) | ||
| 206 | #define PAL_USE_CALLBACKS FALSE | ||
| 207 | #endif | ||
| 208 | |||
| 209 | /** | ||
| 210 | * @brief Enables synchronous APIs. | ||
| 211 | * @note Disabling this option saves both code and data space. | ||
| 212 | */ | ||
| 213 | #if !defined(PAL_USE_WAIT) || defined(__DOXYGEN__) | ||
| 214 | #define PAL_USE_WAIT FALSE | ||
| 215 | #endif | ||
| 216 | |||
| 217 | /*===========================================================================*/ | ||
| 218 | /* ADC driver related settings. */ | ||
| 219 | /*===========================================================================*/ | ||
| 220 | |||
| 221 | /** | ||
| 222 | * @brief Enables synchronous APIs. | ||
| 223 | * @note Disabling this option saves both code and data space. | ||
| 224 | */ | ||
| 225 | #if !defined(ADC_USE_WAIT) || defined(__DOXYGEN__) | ||
| 226 | #define ADC_USE_WAIT TRUE | ||
| 227 | #endif | ||
| 228 | |||
| 229 | /** | ||
| 230 | * @brief Enables the @p adcAcquireBus() and @p adcReleaseBus() APIs. | ||
| 231 | * @note Disabling this option saves both code and data space. | ||
| 232 | */ | ||
| 233 | #if !defined(ADC_USE_MUTUAL_EXCLUSION) || defined(__DOXYGEN__) | ||
| 234 | #define ADC_USE_MUTUAL_EXCLUSION TRUE | ||
| 235 | #endif | ||
| 236 | |||
| 237 | /*===========================================================================*/ | ||
| 238 | /* CAN driver related settings. */ | ||
| 239 | /*===========================================================================*/ | ||
| 240 | |||
| 241 | /** | ||
| 242 | * @brief Sleep mode related APIs inclusion switch. | ||
| 243 | */ | ||
| 244 | #if !defined(CAN_USE_SLEEP_MODE) || defined(__DOXYGEN__) | ||
| 245 | #define CAN_USE_SLEEP_MODE TRUE | ||
| 246 | #endif | ||
| 247 | |||
| 248 | /** | ||
| 249 | * @brief Enforces the driver to use direct callbacks rather than OSAL events. | ||
| 250 | */ | ||
| 251 | #if !defined(CAN_ENFORCE_USE_CALLBACKS) || defined(__DOXYGEN__) | ||
| 252 | #define CAN_ENFORCE_USE_CALLBACKS FALSE | ||
| 253 | #endif | ||
| 254 | |||
| 255 | /*===========================================================================*/ | ||
| 256 | /* CRY driver related settings. */ | ||
| 257 | /*===========================================================================*/ | ||
| 258 | |||
| 259 | /** | ||
| 260 | * @brief Enables the SW fall-back of the cryptographic driver. | ||
| 261 | * @details When enabled, this option, activates a fall-back software | ||
| 262 | * implementation for algorithms not supported by the underlying | ||
| 263 | * hardware. | ||
| 264 | * @note Fall-back implementations may not be present for all algorithms. | ||
| 265 | */ | ||
| 266 | #if !defined(HAL_CRY_USE_FALLBACK) || defined(__DOXYGEN__) | ||
| 267 | #define HAL_CRY_USE_FALLBACK FALSE | ||
| 268 | #endif | ||
| 269 | |||
| 270 | /** | ||
| 271 | * @brief Makes the driver forcibly use the fall-back implementations. | ||
| 272 | */ | ||
| 273 | #if !defined(HAL_CRY_ENFORCE_FALLBACK) || defined(__DOXYGEN__) | ||
| 274 | #define HAL_CRY_ENFORCE_FALLBACK FALSE | ||
| 275 | #endif | ||
| 276 | |||
| 277 | /*===========================================================================*/ | ||
| 278 | /* DAC driver related settings. */ | ||
| 279 | /*===========================================================================*/ | ||
| 280 | |||
| 281 | /** | ||
| 282 | * @brief Enables synchronous APIs. | ||
| 283 | * @note Disabling this option saves both code and data space. | ||
| 284 | */ | ||
| 285 | #if !defined(DAC_USE_WAIT) || defined(__DOXYGEN__) | ||
| 286 | #define DAC_USE_WAIT TRUE | ||
| 287 | #endif | ||
| 288 | |||
| 289 | /** | ||
| 290 | * @brief Enables the @p dacAcquireBus() and @p dacReleaseBus() APIs. | ||
| 291 | * @note Disabling this option saves both code and data space. | ||
| 292 | */ | ||
| 293 | #if !defined(DAC_USE_MUTUAL_EXCLUSION) || defined(__DOXYGEN__) | ||
| 294 | #define DAC_USE_MUTUAL_EXCLUSION TRUE | ||
| 295 | #endif | ||
| 296 | |||
| 297 | /*===========================================================================*/ | ||
| 298 | /* I2C driver related settings. */ | ||
| 299 | /*===========================================================================*/ | ||
| 300 | |||
| 301 | /** | ||
| 302 | * @brief Enables the mutual exclusion APIs on the I2C bus. | ||
| 303 | */ | ||
| 304 | #if !defined(I2C_USE_MUTUAL_EXCLUSION) || defined(__DOXYGEN__) | ||
| 305 | #define I2C_USE_MUTUAL_EXCLUSION TRUE | ||
| 306 | #endif | ||
| 307 | |||
| 308 | /*===========================================================================*/ | ||
| 309 | /* MAC driver related settings. */ | ||
| 310 | /*===========================================================================*/ | ||
| 311 | |||
| 312 | /** | ||
| 313 | * @brief Enables the zero-copy API. | ||
| 314 | */ | ||
| 315 | #if !defined(MAC_USE_ZERO_COPY) || defined(__DOXYGEN__) | ||
| 316 | #define MAC_USE_ZERO_COPY FALSE | ||
| 317 | #endif | ||
| 318 | |||
| 319 | /** | ||
| 320 | * @brief Enables an event sources for incoming packets. | ||
| 321 | */ | ||
| 322 | #if !defined(MAC_USE_EVENTS) || defined(__DOXYGEN__) | ||
| 323 | #define MAC_USE_EVENTS TRUE | ||
| 324 | #endif | ||
| 325 | |||
| 326 | /*===========================================================================*/ | ||
| 327 | /* MMC_SPI driver related settings. */ | ||
| 328 | /*===========================================================================*/ | ||
| 329 | |||
| 330 | /** | ||
| 331 | * @brief Delays insertions. | ||
| 332 | * @details If enabled this options inserts delays into the MMC waiting | ||
| 333 | * routines releasing some extra CPU time for the threads with | ||
| 334 | * lower priority, this may slow down the driver a bit however. | ||
| 335 | * This option is recommended also if the SPI driver does not | ||
| 336 | * use a DMA channel and heavily loads the CPU. | ||
| 337 | */ | ||
| 338 | #if !defined(MMC_NICE_WAITING) || defined(__DOXYGEN__) | ||
| 339 | #define MMC_NICE_WAITING TRUE | ||
| 340 | #endif | ||
| 341 | |||
| 342 | /*===========================================================================*/ | ||
| 343 | /* SDC driver related settings. */ | ||
| 344 | /*===========================================================================*/ | ||
| 345 | |||
| 346 | /** | ||
| 347 | * @brief Number of initialization attempts before rejecting the card. | ||
| 348 | * @note Attempts are performed at 10mS intervals. | ||
| 349 | */ | ||
| 350 | #if !defined(SDC_INIT_RETRY) || defined(__DOXYGEN__) | ||
| 351 | #define SDC_INIT_RETRY 100 | ||
| 352 | #endif | ||
| 353 | |||
| 354 | /** | ||
| 355 | * @brief Include support for MMC cards. | ||
| 356 | * @note MMC support is not yet implemented so this option must be kept | ||
| 357 | * at @p FALSE. | ||
| 358 | */ | ||
| 359 | #if !defined(SDC_MMC_SUPPORT) || defined(__DOXYGEN__) | ||
| 360 | #define SDC_MMC_SUPPORT FALSE | ||
| 361 | #endif | ||
| 362 | |||
| 363 | /** | ||
| 364 | * @brief Delays insertions. | ||
| 365 | * @details If enabled this options inserts delays into the MMC waiting | ||
| 366 | * routines releasing some extra CPU time for the threads with | ||
| 367 | * lower priority, this may slow down the driver a bit however. | ||
| 368 | */ | ||
| 369 | #if !defined(SDC_NICE_WAITING) || defined(__DOXYGEN__) | ||
| 370 | #define SDC_NICE_WAITING TRUE | ||
| 371 | #endif | ||
| 372 | |||
| 373 | /** | ||
| 374 | * @brief OCR initialization constant for V20 cards. | ||
| 375 | */ | ||
| 376 | #if !defined(SDC_INIT_OCR_V20) || defined(__DOXYGEN__) | ||
| 377 | #define SDC_INIT_OCR_V20 0x50FF8000U | ||
| 378 | #endif | ||
| 379 | |||
| 380 | /** | ||
| 381 | * @brief OCR initialization constant for non-V20 cards. | ||
| 382 | */ | ||
| 383 | #if !defined(SDC_INIT_OCR) || defined(__DOXYGEN__) | ||
| 384 | #define SDC_INIT_OCR 0x80100000U | ||
| 385 | #endif | ||
| 386 | |||
| 387 | /*===========================================================================*/ | ||
| 388 | /* SERIAL driver related settings. */ | ||
| 389 | /*===========================================================================*/ | ||
| 390 | |||
| 391 | /** | ||
| 392 | * @brief Default bit rate. | ||
| 393 | * @details Configuration parameter, this is the baud rate selected for the | ||
| 394 | * default configuration. | ||
| 395 | */ | ||
| 396 | #if !defined(SERIAL_DEFAULT_BITRATE) || defined(__DOXYGEN__) | ||
| 397 | #define SERIAL_DEFAULT_BITRATE 38400 | ||
| 398 | #endif | ||
| 399 | |||
| 400 | /** | ||
| 401 | * @brief Serial buffers size. | ||
| 402 | * @details Configuration parameter, you can change the depth of the queue | ||
| 403 | * buffers depending on the requirements of your application. | ||
| 404 | * @note The default is 16 bytes for both the transmission and receive | ||
| 405 | * buffers. | ||
| 406 | */ | ||
| 407 | #if !defined(SERIAL_BUFFERS_SIZE) || defined(__DOXYGEN__) | ||
| 408 | #define SERIAL_BUFFERS_SIZE 16 | ||
| 409 | #endif | ||
| 410 | |||
| 411 | /*===========================================================================*/ | ||
| 412 | /* SERIAL_USB driver related setting. */ | ||
| 413 | /*===========================================================================*/ | ||
| 414 | |||
| 415 | /** | ||
| 416 | * @brief Serial over USB buffers size. | ||
| 417 | * @details Configuration parameter, the buffer size must be a multiple of | ||
| 418 | * the USB data endpoint maximum packet size. | ||
| 419 | * @note The default is 256 bytes for both the transmission and receive | ||
| 420 | * buffers. | ||
| 421 | */ | ||
| 422 | #if !defined(SERIAL_USB_BUFFERS_SIZE) || defined(__DOXYGEN__) | ||
| 423 | #define SERIAL_USB_BUFFERS_SIZE 256 | ||
| 424 | #endif | ||
| 425 | |||
| 426 | /** | ||
| 427 | * @brief Serial over USB number of buffers. | ||
| 428 | * @note The default is 2 buffers. | ||
| 429 | */ | ||
| 430 | #if !defined(SERIAL_USB_BUFFERS_NUMBER) || defined(__DOXYGEN__) | ||
| 431 | #define SERIAL_USB_BUFFERS_NUMBER 2 | ||
| 432 | #endif | ||
| 433 | |||
| 434 | /*===========================================================================*/ | ||
| 435 | /* SPI driver related settings. */ | ||
| 436 | /*===========================================================================*/ | ||
| 437 | |||
| 438 | /** | ||
| 439 | * @brief Enables synchronous APIs. | ||
| 440 | * @note Disabling this option saves both code and data space. | ||
| 441 | */ | ||
| 442 | #if !defined(SPI_USE_WAIT) || defined(__DOXYGEN__) | ||
| 443 | #define SPI_USE_WAIT TRUE | ||
| 444 | #endif | ||
| 445 | |||
| 446 | /** | ||
| 447 | * @brief Enables circular transfers APIs. | ||
| 448 | * @note Disabling this option saves both code and data space. | ||
| 449 | */ | ||
| 450 | #if !defined(SPI_USE_CIRCULAR) || defined(__DOXYGEN__) | ||
| 451 | #define SPI_USE_CIRCULAR FALSE | ||
| 452 | #endif | ||
| 453 | |||
| 454 | |||
| 455 | /** | ||
| 456 | * @brief Enables the @p spiAcquireBus() and @p spiReleaseBus() APIs. | ||
| 457 | * @note Disabling this option saves both code and data space. | ||
| 458 | */ | ||
| 459 | #if !defined(SPI_USE_MUTUAL_EXCLUSION) || defined(__DOXYGEN__) | ||
| 460 | #define SPI_USE_MUTUAL_EXCLUSION TRUE | ||
| 461 | #endif | ||
| 462 | |||
| 463 | /** | ||
| 464 | * @brief Handling method for SPI CS line. | ||
| 465 | * @note Disabling this option saves both code and data space. | ||
| 466 | */ | ||
| 467 | #if !defined(SPI_SELECT_MODE) || defined(__DOXYGEN__) | ||
| 468 | #define SPI_SELECT_MODE SPI_SELECT_MODE_PAD | ||
| 469 | #endif | ||
| 470 | |||
| 471 | /*===========================================================================*/ | ||
| 472 | /* UART driver related settings. */ | ||
| 473 | /*===========================================================================*/ | ||
| 474 | |||
| 475 | /** | ||
| 476 | * @brief Enables synchronous APIs. | ||
| 477 | * @note Disabling this option saves both code and data space. | ||
| 478 | */ | ||
| 479 | #if !defined(UART_USE_WAIT) || defined(__DOXYGEN__) | ||
| 480 | #define UART_USE_WAIT FALSE | ||
| 481 | #endif | ||
| 482 | |||
| 483 | /** | ||
| 484 | * @brief Enables the @p uartAcquireBus() and @p uartReleaseBus() APIs. | ||
| 485 | * @note Disabling this option saves both code and data space. | ||
| 486 | */ | ||
| 487 | #if !defined(UART_USE_MUTUAL_EXCLUSION) || defined(__DOXYGEN__) | ||
| 488 | #define UART_USE_MUTUAL_EXCLUSION FALSE | ||
| 489 | #endif | ||
| 490 | |||
| 491 | /*===========================================================================*/ | ||
| 492 | /* USB driver related settings. */ | ||
| 493 | /*===========================================================================*/ | ||
| 494 | |||
| 495 | /** | ||
| 496 | * @brief Enables synchronous APIs. | ||
| 497 | * @note Disabling this option saves both code and data space. | ||
| 498 | */ | ||
| 499 | #if !defined(USB_USE_WAIT) || defined(__DOXYGEN__) | ||
| 500 | #define USB_USE_WAIT TRUE | ||
| 501 | #endif | ||
| 502 | |||
| 503 | /*===========================================================================*/ | ||
| 504 | /* WSPI driver related settings. */ | ||
| 505 | /*===========================================================================*/ | ||
| 506 | |||
| 507 | /** | ||
| 508 | * @brief Enables synchronous APIs. | ||
| 509 | * @note Disabling this option saves both code and data space. | ||
| 510 | */ | ||
| 511 | #if !defined(WSPI_USE_WAIT) || defined(__DOXYGEN__) | ||
| 512 | #define WSPI_USE_WAIT TRUE | ||
| 513 | #endif | ||
| 514 | |||
| 515 | /** | ||
| 516 | * @brief Enables the @p wspiAcquireBus() and @p wspiReleaseBus() APIs. | ||
| 517 | * @note Disabling this option saves both code and data space. | ||
| 518 | */ | ||
| 519 | #if !defined(WSPI_USE_MUTUAL_EXCLUSION) || defined(__DOXYGEN__) | ||
| 520 | #define WSPI_USE_MUTUAL_EXCLUSION TRUE | ||
| 521 | #endif | ||
| 522 | |||
| 523 | #endif /* HALCONF_H */ | ||
| 524 | |||
| 525 | /** @} */ | ||
diff --git a/platforms/chibios/BLACKPILL_STM32_F411/configs/mcuconf.h b/platforms/chibios/BLACKPILL_STM32_F411/configs/mcuconf.h new file mode 100644 index 000000000..0394ff56b --- /dev/null +++ b/platforms/chibios/BLACKPILL_STM32_F411/configs/mcuconf.h | |||
| @@ -0,0 +1,253 @@ | |||
| 1 | /* | ||
| 2 | ChibiOS - Copyright (C) 2006..2018 Giovanni Di Sirio | ||
| 3 | |||
| 4 | Licensed under the Apache License, Version 2.0 (the "License"); | ||
| 5 | you may not use this file except in compliance with the License. | ||
| 6 | You may obtain a copy of the License at | ||
| 7 | |||
| 8 | http://www.apache.org/licenses/LICENSE-2.0 | ||
| 9 | |||
| 10 | Unless required by applicable law or agreed to in writing, software | ||
| 11 | distributed under the License is distributed on an "AS IS" BASIS, | ||
| 12 | WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. | ||
| 13 | See the License for the specific language governing permissions and | ||
| 14 | limitations under the License. | ||
| 15 | */ | ||
| 16 | |||
| 17 | #ifndef MCUCONF_H | ||
| 18 | #define MCUCONF_H | ||
| 19 | |||
| 20 | /* | ||
| 21 | * STM32F4xx drivers configuration. | ||
| 22 | * The following settings override the default settings present in | ||
| 23 | * the various device driver implementation headers. | ||
| 24 | * Note that the settings for each driver only have effect if the whole | ||
| 25 | * driver is enabled in halconf.h. | ||
| 26 | * | ||
| 27 | * IRQ priorities: | ||
| 28 | * 15...0 Lowest...Highest. | ||
| 29 | * | ||
| 30 | * DMA priorities: | ||
| 31 | * 0...3 Lowest...Highest. | ||
| 32 | */ | ||
| 33 | |||
| 34 | #define STM32F4xx_MCUCONF | ||
| 35 | |||
| 36 | /* | ||
| 37 | * HAL driver system settings. | ||
| 38 | */ | ||
| 39 | #define STM32_NO_INIT FALSE | ||
| 40 | #define STM32_HSI_ENABLED TRUE | ||
| 41 | #define STM32_LSI_ENABLED TRUE | ||
| 42 | #define STM32_HSE_ENABLED TRUE | ||
| 43 | #define STM32_LSE_ENABLED FALSE | ||
| 44 | #define STM32_CLOCK48_REQUIRED TRUE | ||
| 45 | #define STM32_SW STM32_SW_PLL | ||
| 46 | #define STM32_PLLSRC STM32_PLLSRC_HSE | ||
| 47 | #define STM32_PLLM_VALUE 25 | ||
| 48 | #define STM32_PLLN_VALUE 384 | ||
| 49 | #define STM32_PLLP_VALUE 4 | ||
| 50 | #define STM32_PLLQ_VALUE 8 | ||
| 51 | #define STM32_HPRE STM32_HPRE_DIV1 | ||
| 52 | #define STM32_PPRE1 STM32_PPRE1_DIV4 | ||
| 53 | #define STM32_PPRE2 STM32_PPRE2_DIV2 | ||
| 54 | #define STM32_RTCSEL STM32_RTCSEL_LSI | ||
| 55 | #define STM32_RTCPRE_VALUE 8 | ||
| 56 | #define STM32_MCO1SEL STM32_MCO1SEL_HSI | ||
| 57 | #define STM32_MCO1PRE STM32_MCO1PRE_DIV1 | ||
| 58 | #define STM32_MCO2SEL STM32_MCO2SEL_SYSCLK | ||
| 59 | #define STM32_MCO2PRE STM32_MCO2PRE_DIV5 | ||
| 60 | #define STM32_I2SSRC STM32_I2SSRC_CKIN | ||
| 61 | #define STM32_PLLI2SN_VALUE 192 | ||
| 62 | #define STM32_PLLI2SR_VALUE 5 | ||
| 63 | #define STM32_PVD_ENABLE FALSE | ||
| 64 | #define STM32_PLS STM32_PLS_LEV0 | ||
| 65 | #define STM32_BKPRAM_ENABLE FALSE | ||
| 66 | |||
| 67 | /* | ||
| 68 | * IRQ system settings. | ||
| 69 | */ | ||
| 70 | #define STM32_IRQ_EXTI0_PRIORITY 6 | ||
| 71 | #define STM32_IRQ_EXTI1_PRIORITY 6 | ||
| 72 | #define STM32_IRQ_EXTI2_PRIORITY 6 | ||
| 73 | #define STM32_IRQ_EXTI3_PRIORITY 6 | ||
| 74 | #define STM32_IRQ_EXTI4_PRIORITY 6 | ||
| 75 | #define STM32_IRQ_EXTI5_9_PRIORITY 6 | ||
| 76 | #define STM32_IRQ_EXTI10_15_PRIORITY 6 | ||
| 77 | #define STM32_IRQ_EXTI16_PRIORITY 6 | ||
| 78 | #define STM32_IRQ_EXTI17_PRIORITY 15 | ||
| 79 | #define STM32_IRQ_EXTI18_PRIORITY 6 | ||
| 80 | #define STM32_IRQ_EXTI19_PRIORITY 6 | ||
| 81 | #define STM32_IRQ_EXTI20_PRIORITY 6 | ||
| 82 | #define STM32_IRQ_EXTI21_PRIORITY 15 | ||
| 83 | #define STM32_IRQ_EXTI22_PRIORITY 15 | ||
| 84 | |||
| 85 | /* | ||
| 86 | * ADC driver system settings. | ||
| 87 | */ | ||
| 88 | #define STM32_ADC_ADCPRE ADC_CCR_ADCPRE_DIV4 | ||
| 89 | #define STM32_ADC_USE_ADC1 FALSE | ||
| 90 | #define STM32_ADC_ADC1_DMA_STREAM STM32_DMA_STREAM_ID(2, 4) | ||
| 91 | #define STM32_ADC_ADC1_DMA_PRIORITY 2 | ||
| 92 | #define STM32_ADC_IRQ_PRIORITY 6 | ||
| 93 | #define STM32_ADC_ADC1_DMA_IRQ_PRIORITY 6 | ||
| 94 | |||
| 95 | /* | ||
| 96 | * GPT driver system settings. | ||
| 97 | */ | ||
| 98 | #define STM32_GPT_USE_TIM1 FALSE | ||
| 99 | #define STM32_GPT_USE_TIM2 FALSE | ||
| 100 | #define STM32_GPT_USE_TIM3 FALSE | ||
| 101 | #define STM32_GPT_USE_TIM4 FALSE | ||
| 102 | #define STM32_GPT_USE_TIM5 FALSE | ||
| 103 | #define STM32_GPT_USE_TIM9 FALSE | ||
| 104 | #define STM32_GPT_USE_TIM11 FALSE | ||
| 105 | #define STM32_GPT_TIM1_IRQ_PRIORITY 7 | ||
| 106 | #define STM32_GPT_TIM2_IRQ_PRIORITY 7 | ||
| 107 | #define STM32_GPT_TIM3_IRQ_PRIORITY 7 | ||
| 108 | #define STM32_GPT_TIM4_IRQ_PRIORITY 7 | ||
| 109 | #define STM32_GPT_TIM5_IRQ_PRIORITY 7 | ||
| 110 | #define STM32_GPT_TIM9_IRQ_PRIORITY 7 | ||
| 111 | #define STM32_GPT_TIM11_IRQ_PRIORITY 7 | ||
| 112 | |||
| 113 | /* | ||
| 114 | * I2C driver system settings. | ||
| 115 | */ | ||
| 116 | #define STM32_I2C_USE_I2C1 FALSE | ||
| 117 | #define STM32_I2C_USE_I2C2 FALSE | ||
| 118 | #define STM32_I2C_USE_I2C3 FALSE | ||
| 119 | #define STM32_I2C_BUSY_TIMEOUT 50 | ||
| 120 | #define STM32_I2C_I2C1_RX_DMA_STREAM STM32_DMA_STREAM_ID(1, 0) | ||
| 121 | #define STM32_I2C_I2C1_TX_DMA_STREAM STM32_DMA_STREAM_ID(1, 6) | ||
| 122 | #define STM32_I2C_I2C2_RX_DMA_STREAM STM32_DMA_STREAM_ID(1, 2) | ||
| 123 | #define STM32_I2C_I2C2_TX_DMA_STREAM STM32_DMA_STREAM_ID(1, 7) | ||
| 124 | #define STM32_I2C_I2C3_RX_DMA_STREAM STM32_DMA_STREAM_ID(1, 2) | ||
| 125 | #define STM32_I2C_I2C3_TX_DMA_STREAM STM32_DMA_STREAM_ID(1, 4) | ||
| 126 | #define STM32_I2C_I2C1_IRQ_PRIORITY 5 | ||
| 127 | #define STM32_I2C_I2C2_IRQ_PRIORITY 5 | ||
| 128 | #define STM32_I2C_I2C3_IRQ_PRIORITY 5 | ||
| 129 | #define STM32_I2C_I2C1_DMA_PRIORITY 3 | ||
| 130 | #define STM32_I2C_I2C2_DMA_PRIORITY 3 | ||
| 131 | #define STM32_I2C_I2C3_DMA_PRIORITY 3 | ||
| 132 | #define STM32_I2C_DMA_ERROR_HOOK(i2cp) osalSysHalt("DMA failure") | ||
| 133 | |||
| 134 | /* | ||
| 135 | * I2S driver system settings. | ||
| 136 | */ | ||
| 137 | #define STM32_I2S_USE_SPI2 FALSE | ||
| 138 | #define STM32_I2S_USE_SPI3 FALSE | ||
| 139 | #define STM32_I2S_SPI2_IRQ_PRIORITY 10 | ||
| 140 | #define STM32_I2S_SPI3_IRQ_PRIORITY 10 | ||
| 141 | #define STM32_I2S_SPI2_DMA_PRIORITY 1 | ||
| 142 | #define STM32_I2S_SPI3_DMA_PRIORITY 1 | ||
| 143 | #define STM32_I2S_SPI2_RX_DMA_STREAM STM32_DMA_STREAM_ID(1, 3) | ||
| 144 | #define STM32_I2S_SPI2_TX_DMA_STREAM STM32_DMA_STREAM_ID(1, 4) | ||
| 145 | #define STM32_I2S_SPI3_RX_DMA_STREAM STM32_DMA_STREAM_ID(1, 0) | ||
| 146 | #define STM32_I2S_SPI3_TX_DMA_STREAM STM32_DMA_STREAM_ID(1, 7) | ||
| 147 | #define STM32_I2S_DMA_ERROR_HOOK(i2sp) osalSysHalt("DMA failure") | ||
| 148 | |||
| 149 | /* | ||
| 150 | * ICU driver system settings. | ||
| 151 | */ | ||
| 152 | #define STM32_ICU_USE_TIM1 FALSE | ||
| 153 | #define STM32_ICU_USE_TIM2 FALSE | ||
| 154 | #define STM32_ICU_USE_TIM3 FALSE | ||
| 155 | #define STM32_ICU_USE_TIM4 FALSE | ||
| 156 | #define STM32_ICU_USE_TIM5 FALSE | ||
| 157 | #define STM32_ICU_USE_TIM9 FALSE | ||
| 158 | #define STM32_ICU_TIM1_IRQ_PRIORITY 7 | ||
| 159 | #define STM32_ICU_TIM2_IRQ_PRIORITY 7 | ||
| 160 | #define STM32_ICU_TIM3_IRQ_PRIORITY 7 | ||
| 161 | #define STM32_ICU_TIM4_IRQ_PRIORITY 7 | ||
| 162 | #define STM32_ICU_TIM5_IRQ_PRIORITY 7 | ||
| 163 | #define STM32_ICU_TIM9_IRQ_PRIORITY 7 | ||
| 164 | |||
| 165 | /* | ||
| 166 | * PWM driver system settings. | ||
| 167 | */ | ||
| 168 | #define STM32_PWM_USE_ADVANCED FALSE | ||
| 169 | #define STM32_PWM_USE_TIM1 FALSE | ||
| 170 | #define STM32_PWM_USE_TIM2 FALSE | ||
| 171 | #define STM32_PWM_USE_TIM3 FALSE | ||
| 172 | #define STM32_PWM_USE_TIM4 FALSE | ||
| 173 | #define STM32_PWM_USE_TIM5 FALSE | ||
| 174 | #define STM32_PWM_USE_TIM9 FALSE | ||
| 175 | #define STM32_PWM_TIM1_IRQ_PRIORITY 7 | ||
| 176 | #define STM32_PWM_TIM2_IRQ_PRIORITY 7 | ||
| 177 | #define STM32_PWM_TIM3_IRQ_PRIORITY 7 | ||
| 178 | #define STM32_PWM_TIM4_IRQ_PRIORITY 7 | ||
| 179 | #define STM32_PWM_TIM5_IRQ_PRIORITY 7 | ||
| 180 | #define STM32_PWM_TIM9_IRQ_PRIORITY 7 | ||
| 181 | |||
| 182 | /* | ||
| 183 | * SERIAL driver system settings. | ||
| 184 | */ | ||
| 185 | #define STM32_SERIAL_USE_USART1 FALSE | ||
| 186 | #define STM32_SERIAL_USE_USART2 FALSE | ||
| 187 | #define STM32_SERIAL_USE_USART6 FALSE | ||
| 188 | #define STM32_SERIAL_USART1_PRIORITY 12 | ||
| 189 | #define STM32_SERIAL_USART2_PRIORITY 12 | ||
| 190 | #define STM32_SERIAL_USART6_PRIORITY 12 | ||
| 191 | |||
| 192 | /* | ||
| 193 | * SPI driver system settings. | ||
| 194 | */ | ||
| 195 | #define STM32_SPI_USE_SPI1 FALSE | ||
| 196 | #define STM32_SPI_USE_SPI2 FALSE | ||
| 197 | #define STM32_SPI_USE_SPI3 FALSE | ||
| 198 | #define STM32_SPI_SPI1_RX_DMA_STREAM STM32_DMA_STREAM_ID(2, 0) | ||
| 199 | #define STM32_SPI_SPI1_TX_DMA_STREAM STM32_DMA_STREAM_ID(2, 3) | ||
| 200 | #define STM32_SPI_SPI2_RX_DMA_STREAM STM32_DMA_STREAM_ID(1, 3) | ||
| 201 | #define STM32_SPI_SPI2_TX_DMA_STREAM STM32_DMA_STREAM_ID(1, 4) | ||
| 202 | #define STM32_SPI_SPI3_RX_DMA_STREAM STM32_DMA_STREAM_ID(1, 0) | ||
| 203 | #define STM32_SPI_SPI3_TX_DMA_STREAM STM32_DMA_STREAM_ID(1, 7) | ||
| 204 | #define STM32_SPI_SPI1_DMA_PRIORITY 1 | ||
| 205 | #define STM32_SPI_SPI2_DMA_PRIORITY 1 | ||
| 206 | #define STM32_SPI_SPI3_DMA_PRIORITY 1 | ||
| 207 | #define STM32_SPI_SPI1_IRQ_PRIORITY 10 | ||
| 208 | #define STM32_SPI_SPI2_IRQ_PRIORITY 10 | ||
| 209 | #define STM32_SPI_SPI3_IRQ_PRIORITY 10 | ||
| 210 | #define STM32_SPI_DMA_ERROR_HOOK(spip) osalSysHalt("DMA failure") | ||
| 211 | |||
| 212 | /* | ||
| 213 | * ST driver system settings. | ||
| 214 | */ | ||
| 215 | #define STM32_ST_IRQ_PRIORITY 8 | ||
| 216 | #define STM32_ST_USE_TIMER 2 | ||
| 217 | |||
| 218 | /* | ||
| 219 | * UART driver system settings. | ||
| 220 | */ | ||
| 221 | #define STM32_UART_USE_USART1 FALSE | ||
| 222 | #define STM32_UART_USE_USART2 FALSE | ||
| 223 | #define STM32_UART_USE_USART6 FALSE | ||
| 224 | #define STM32_UART_USART1_RX_DMA_STREAM STM32_DMA_STREAM_ID(2, 5) | ||
| 225 | #define STM32_UART_USART1_TX_DMA_STREAM STM32_DMA_STREAM_ID(2, 7) | ||
| 226 | #define STM32_UART_USART2_RX_DMA_STREAM STM32_DMA_STREAM_ID(1, 5) | ||
| 227 | #define STM32_UART_USART2_TX_DMA_STREAM STM32_DMA_STREAM_ID(1, 6) | ||
| 228 | #define STM32_UART_USART6_RX_DMA_STREAM STM32_DMA_STREAM_ID(2, 2) | ||
| 229 | #define STM32_UART_USART6_TX_DMA_STREAM STM32_DMA_STREAM_ID(2, 7) | ||
| 230 | #define STM32_UART_USART1_IRQ_PRIORITY 12 | ||
| 231 | #define STM32_UART_USART2_IRQ_PRIORITY 12 | ||
| 232 | #define STM32_UART_USART6_IRQ_PRIORITY 12 | ||
| 233 | #define STM32_UART_USART1_DMA_PRIORITY 0 | ||
| 234 | #define STM32_UART_USART2_DMA_PRIORITY 0 | ||
| 235 | #define STM32_UART_USART6_DMA_PRIORITY 0 | ||
| 236 | #define STM32_UART_DMA_ERROR_HOOK(uartp) osalSysHalt("DMA failure") | ||
| 237 | |||
| 238 | /* | ||
| 239 | * USB driver system settings. | ||
| 240 | */ | ||
| 241 | #define STM32_USB_USE_OTG1 TRUE | ||
| 242 | #define STM32_USB_OTG1_IRQ_PRIORITY 14 | ||
| 243 | #define STM32_USB_OTG1_RX_FIFO_SIZE 512 | ||
| 244 | #define STM32_USB_OTG_THREAD_PRIO NORMALPRIO+1 | ||
| 245 | #define STM32_USB_OTG_THREAD_STACK_SIZE 128 | ||
| 246 | #define STM32_USB_OTGFIFO_FILL_BASEPRI 0 | ||
| 247 | |||
| 248 | /* | ||
| 249 | * WDG driver system settings. | ||
| 250 | */ | ||
| 251 | #define STM32_WDG_USE_IWDG FALSE | ||
| 252 | |||
| 253 | #endif /* MCUCONF_H */ | ||
diff --git a/keyboards/vinta/boards/GENERIC_STM32_F042X6/board.c b/platforms/chibios/GENERIC_STM32_F042X6/board/board.c index 754dc5c4d..7d93b68f9 100644 --- a/keyboards/vinta/boards/GENERIC_STM32_F042X6/board.c +++ b/platforms/chibios/GENERIC_STM32_F042X6/board/board.c | |||
| @@ -202,13 +202,14 @@ static void stm32_gpio_init(void) { | |||
| 202 | /* Driver exported functions. */ | 202 | /* Driver exported functions. */ |
| 203 | /*===========================================================================*/ | 203 | /*===========================================================================*/ |
| 204 | 204 | ||
| 205 | __attribute__((weak)) void enter_bootloader_mode_if_requested(void) {} | ||
| 206 | |||
| 205 | /** | 207 | /** |
| 206 | * @brief Early initialization code. | 208 | * @brief Early initialization code. |
| 207 | * @details GPIO ports and system clocks are initialized before everything | 209 | * @details GPIO ports and system clocks are initialized before everything |
| 208 | * else. | 210 | * else. |
| 209 | */ | 211 | */ |
| 210 | void __early_init(void) { | 212 | void __early_init(void) { |
| 211 | extern void enter_bootloader_mode_if_requested(void); | ||
| 212 | enter_bootloader_mode_if_requested(); | 213 | enter_bootloader_mode_if_requested(); |
| 213 | 214 | ||
| 214 | stm32_gpio_init(); | 215 | stm32_gpio_init(); |
diff --git a/keyboards/peiorisboards/ixora/boards/GENERIC_STM32_F042X6/board.h b/platforms/chibios/GENERIC_STM32_F042X6/board/board.h index ee9d31e04..ee9d31e04 100644 --- a/keyboards/peiorisboards/ixora/boards/GENERIC_STM32_F042X6/board.h +++ b/platforms/chibios/GENERIC_STM32_F042X6/board/board.h | |||
diff --git a/drivers/boards/GENERIC_STM32_F072XB/board.mk b/platforms/chibios/GENERIC_STM32_F042X6/board/board.mk index bd6f87826..842e33590 100644 --- a/drivers/boards/GENERIC_STM32_F072XB/board.mk +++ b/platforms/chibios/GENERIC_STM32_F042X6/board/board.mk | |||
| @@ -1,8 +1,8 @@ | |||
| 1 | # List of all the board related files. | 1 | # List of all the board related files. |
| 2 | BOARDSRC = $(BOARD_PATH)/boards/GENERIC_STM32_F072XB/board.c | 2 | BOARDSRC = $(BOARD_PATH)/board/board.c |
| 3 | 3 | ||
| 4 | # Required include directories | 4 | # Required include directories |
| 5 | BOARDINC = $(BOARD_PATH)/boards/GENERIC_STM32_F072XB | 5 | BOARDINC = $(BOARD_PATH)/board |
| 6 | 6 | ||
| 7 | # Shared variables | 7 | # Shared variables |
| 8 | ALLCSRC += $(BOARDSRC) | 8 | ALLCSRC += $(BOARDSRC) |
diff --git a/keyboards/peiorisboards/ixora/bootloader_defs.h b/platforms/chibios/GENERIC_STM32_F042X6/configs/bootloader_defs.h index 4994be9c2..4994be9c2 100644 --- a/keyboards/peiorisboards/ixora/bootloader_defs.h +++ b/platforms/chibios/GENERIC_STM32_F042X6/configs/bootloader_defs.h | |||
diff --git a/drivers/boards/GENERIC_STM32_F072XB/board.c b/platforms/chibios/GENERIC_STM32_F072XB/board/board.c index c91136e8f..c91136e8f 100644 --- a/drivers/boards/GENERIC_STM32_F072XB/board.c +++ b/platforms/chibios/GENERIC_STM32_F072XB/board/board.c | |||
diff --git a/drivers/boards/GENERIC_STM32_F072XB/board.h b/platforms/chibios/GENERIC_STM32_F072XB/board/board.h index 87570e62d..87570e62d 100644 --- a/drivers/boards/GENERIC_STM32_F072XB/board.h +++ b/platforms/chibios/GENERIC_STM32_F072XB/board/board.h | |||
diff --git a/drivers/boards/BLACKPILL_STM32_F411/board.mk b/platforms/chibios/GENERIC_STM32_F072XB/board/board.mk index 93c1e62f5..842e33590 100644 --- a/drivers/boards/BLACKPILL_STM32_F411/board.mk +++ b/platforms/chibios/GENERIC_STM32_F072XB/board/board.mk | |||
| @@ -1,8 +1,8 @@ | |||
| 1 | # List of all the board related files. | 1 | # List of all the board related files. |
| 2 | BOARDSRC = $(BOARD_PATH)/boards/BLACKPILL_STM32_F411/board.c | 2 | BOARDSRC = $(BOARD_PATH)/board/board.c |
| 3 | 3 | ||
| 4 | # Required include directories | 4 | # Required include directories |
| 5 | BOARDINC = $(BOARD_PATH)/boards/BLACKPILL_STM32_F411 | 5 | BOARDINC = $(BOARD_PATH)/board |
| 6 | 6 | ||
| 7 | # Shared variables | 7 | # Shared variables |
| 8 | ALLCSRC += $(BOARDSRC) | 8 | ALLCSRC += $(BOARDSRC) |
diff --git a/drivers/boards/GENERIC_STM32_F072XB/bootloader_defs.h b/platforms/chibios/GENERIC_STM32_F072XB/configs/bootloader_defs.h index 02c48c4e6..02c48c4e6 100644 --- a/drivers/boards/GENERIC_STM32_F072XB/bootloader_defs.h +++ b/platforms/chibios/GENERIC_STM32_F072XB/configs/bootloader_defs.h | |||
diff --git a/drivers/boards/GENERIC_STM32_F303XC/board.c b/platforms/chibios/GENERIC_STM32_F303XC/board/board.c index 9b0fc1b6b..4722acd64 100644 --- a/drivers/boards/GENERIC_STM32_F303XC/board.c +++ b/platforms/chibios/GENERIC_STM32_F303XC/board/board.c | |||
| @@ -181,7 +181,7 @@ static void stm32_gpio_init(void) { | |||
| 181 | #endif | 181 | #endif |
| 182 | } | 182 | } |
| 183 | 183 | ||
| 184 | void enter_bootloader_mode_if_requested(void); | 184 | __attribute__((weak)) void enter_bootloader_mode_if_requested(void) {} |
| 185 | 185 | ||
| 186 | /** | 186 | /** |
| 187 | * @brief Early initialization code. | 187 | * @brief Early initialization code. |
diff --git a/drivers/boards/GENERIC_STM32_F303XC/board.h b/platforms/chibios/GENERIC_STM32_F303XC/board/board.h index 3579c8277..3579c8277 100644 --- a/drivers/boards/GENERIC_STM32_F303XC/board.h +++ b/platforms/chibios/GENERIC_STM32_F303XC/board/board.h | |||
diff --git a/drivers/boards/BLACKPILL_STM32_F401/board.mk b/platforms/chibios/GENERIC_STM32_F303XC/board/board.mk index 33473ed6b..842e33590 100644 --- a/drivers/boards/BLACKPILL_STM32_F401/board.mk +++ b/platforms/chibios/GENERIC_STM32_F303XC/board/board.mk | |||
| @@ -1,8 +1,8 @@ | |||
| 1 | # List of all the board related files. | 1 | # List of all the board related files. |
| 2 | BOARDSRC = $(BOARD_PATH)/boards/BLACKPILL_STM32_F401/board.c | 2 | BOARDSRC = $(BOARD_PATH)/board/board.c |
| 3 | 3 | ||
| 4 | # Required include directories | 4 | # Required include directories |
| 5 | BOARDINC = $(BOARD_PATH)/boards/BLACKPILL_STM32_F401 | 5 | BOARDINC = $(BOARD_PATH)/board |
| 6 | 6 | ||
| 7 | # Shared variables | 7 | # Shared variables |
| 8 | ALLCSRC += $(BOARDSRC) | 8 | ALLCSRC += $(BOARDSRC) |
diff --git a/drivers/boards/GENERIC_STM32_F303XC/bootloader_defs.h b/platforms/chibios/GENERIC_STM32_F303XC/configs/bootloader_defs.h index 3b0e9d20a..3b0e9d20a 100644 --- a/drivers/boards/GENERIC_STM32_F303XC/bootloader_defs.h +++ b/platforms/chibios/GENERIC_STM32_F303XC/configs/bootloader_defs.h | |||
diff --git a/quantum/stm32/chconf.h b/platforms/chibios/GENERIC_STM32_F303XC/configs/chconf.h index b6e66f9e4..aac330370 100644 --- a/quantum/stm32/chconf.h +++ b/platforms/chibios/GENERIC_STM32_F303XC/configs/chconf.h | |||
| @@ -26,10 +26,10 @@ | |||
| 26 | */ | 26 | */ |
| 27 | 27 | ||
| 28 | #ifndef CHCONF_H | 28 | #ifndef CHCONF_H |
| 29 | # define CHCONF_H | 29 | #define CHCONF_H |
| 30 | 30 | ||
| 31 | # define _CHIBIOS_RT_CONF_ | 31 | #define _CHIBIOS_RT_CONF_ |
| 32 | # define _CHIBIOS_RT_CONF_VER_6_0_ | 32 | #define _CHIBIOS_RT_CONF_VER_6_0_ |
| 33 | 33 | ||
| 34 | /*===========================================================================*/ | 34 | /*===========================================================================*/ |
| 35 | /** | 35 | /** |
| @@ -42,34 +42,34 @@ | |||
| 42 | * @brief System time counter resolution. | 42 | * @brief System time counter resolution. |
| 43 | * @note Allowed values are 16 or 32 bits. | 43 | * @note Allowed values are 16 or 32 bits. |
| 44 | */ | 44 | */ |
| 45 | # if !defined(CH_CFG_ST_RESOLUTION) | 45 | #if !defined(CH_CFG_ST_RESOLUTION) |
| 46 | # define CH_CFG_ST_RESOLUTION 32 | 46 | #define CH_CFG_ST_RESOLUTION 32 |
| 47 | # endif | 47 | #endif |
| 48 | 48 | ||
| 49 | /** | 49 | /** |
| 50 | * @brief System tick frequency. | 50 | * @brief System tick frequency. |
| 51 | * @details Frequency of the system timer that drives the system ticks. This | 51 | * @details Frequency of the system timer that drives the system ticks. This |
| 52 | * setting also defines the system tick time unit. | 52 | * setting also defines the system tick time unit. |
| 53 | */ | 53 | */ |
| 54 | # if !defined(CH_CFG_ST_FREQUENCY) | 54 | #if !defined(CH_CFG_ST_FREQUENCY) |
| 55 | # define CH_CFG_ST_FREQUENCY 100000 | 55 | #define CH_CFG_ST_FREQUENCY 100000 |
| 56 | # endif | 56 | #endif |
| 57 | 57 | ||
| 58 | /** | 58 | /** |
| 59 | * @brief Time intervals data size. | 59 | * @brief Time intervals data size. |
| 60 | * @note Allowed values are 16, 32 or 64 bits. | 60 | * @note Allowed values are 16, 32 or 64 bits. |
| 61 | */ | 61 | */ |
| 62 | # if !defined(CH_CFG_INTERVALS_SIZE) | 62 | #if !defined(CH_CFG_INTERVALS_SIZE) |
| 63 | # define CH_CFG_INTERVALS_SIZE 32 | 63 | #define CH_CFG_INTERVALS_SIZE 32 |
| 64 | # endif | 64 | #endif |
| 65 | 65 | ||
| 66 | /** | 66 | /** |
| 67 | * @brief Time types data size. | 67 | * @brief Time types data size. |
| 68 | * @note Allowed values are 16 or 32 bits. | 68 | * @note Allowed values are 16 or 32 bits. |
| 69 | */ | 69 | */ |
| 70 | # if !defined(CH_CFG_TIME_TYPES_SIZE) | 70 | #if !defined(CH_CFG_TIME_TYPES_SIZE) |
| 71 | # define CH_CFG_TIME_TYPES_SIZE 32 | 71 | #define CH_CFG_TIME_TYPES_SIZE 32 |
| 72 | # endif | 72 | #endif |
| 73 | 73 | ||
| 74 | /** | 74 | /** |
| 75 | * @brief Time delta constant for the tick-less mode. | 75 | * @brief Time delta constant for the tick-less mode. |
| @@ -79,9 +79,9 @@ | |||
| 79 | * The value one is not valid, timeouts are rounded up to | 79 | * The value one is not valid, timeouts are rounded up to |
| 80 | * this value. | 80 | * this value. |
| 81 | */ | 81 | */ |
| 82 | # if !defined(CH_CFG_ST_TIMEDELTA) | 82 | #if !defined(CH_CFG_ST_TIMEDELTA) |
| 83 | # define CH_CFG_ST_TIMEDELTA 2 | 83 | #define CH_CFG_ST_TIMEDELTA 2 |
| 84 | # endif | 84 | #endif |
| 85 | 85 | ||
| 86 | /** @} */ | 86 | /** @} */ |
| 87 | 87 | ||
| @@ -104,9 +104,9 @@ | |||
| 104 | * @note The round robin preemption is not supported in tickless mode and | 104 | * @note The round robin preemption is not supported in tickless mode and |
| 105 | * must be set to zero in that case. | 105 | * must be set to zero in that case. |
| 106 | */ | 106 | */ |
| 107 | # if !defined(CH_CFG_TIME_QUANTUM) | 107 | #if !defined(CH_CFG_TIME_QUANTUM) |
| 108 | # define CH_CFG_TIME_QUANTUM 0 | 108 | #define CH_CFG_TIME_QUANTUM 0 |
| 109 | # endif | 109 | #endif |
| 110 | 110 | ||
| 111 | /** | 111 | /** |
| 112 | * @brief Managed RAM size. | 112 | * @brief Managed RAM size. |
| @@ -119,9 +119,9 @@ | |||
| 119 | * provide the @p __heap_base__ and @p __heap_end__ symbols. | 119 | * provide the @p __heap_base__ and @p __heap_end__ symbols. |
| 120 | * @note Requires @p CH_CFG_USE_MEMCORE. | 120 | * @note Requires @p CH_CFG_USE_MEMCORE. |
| 121 | */ | 121 | */ |
| 122 | # if !defined(CH_CFG_MEMCORE_SIZE) | 122 | #if !defined(CH_CFG_MEMCORE_SIZE) |
| 123 | # define CH_CFG_MEMCORE_SIZE 0 | 123 | #define CH_CFG_MEMCORE_SIZE 0 |
| 124 | # endif | 124 | #endif |
| 125 | 125 | ||
| 126 | /** | 126 | /** |
| 127 | * @brief Idle thread automatic spawn suppression. | 127 | * @brief Idle thread automatic spawn suppression. |
| @@ -130,9 +130,9 @@ | |||
| 130 | * function becomes the idle thread and must implement an | 130 | * function becomes the idle thread and must implement an |
| 131 | * infinite loop. | 131 | * infinite loop. |
| 132 | */ | 132 | */ |
| 133 | # if !defined(CH_CFG_NO_IDLE_THREAD) | 133 | #if !defined(CH_CFG_NO_IDLE_THREAD) |
| 134 | # define CH_CFG_NO_IDLE_THREAD FALSE | 134 | #define CH_CFG_NO_IDLE_THREAD FALSE |
| 135 | # endif | 135 | #endif |
| 136 | 136 | ||
| 137 | /** @} */ | 137 | /** @} */ |
| 138 | 138 | ||
| @@ -151,9 +151,9 @@ | |||
| 151 | * @note This is not related to the compiler optimization options. | 151 | * @note This is not related to the compiler optimization options. |
| 152 | * @note The default is @p TRUE. | 152 | * @note The default is @p TRUE. |
| 153 | */ | 153 | */ |
| 154 | # if !defined(CH_CFG_OPTIMIZE_SPEED) | 154 | #if !defined(CH_CFG_OPTIMIZE_SPEED) |
| 155 | # define CH_CFG_OPTIMIZE_SPEED TRUE | 155 | #define CH_CFG_OPTIMIZE_SPEED TRUE |
| 156 | # endif | 156 | #endif |
| 157 | 157 | ||
| 158 | /** @} */ | 158 | /** @} */ |
| 159 | 159 | ||
| @@ -171,9 +171,9 @@ | |||
| 171 | * | 171 | * |
| 172 | * @note The default is @p TRUE. | 172 | * @note The default is @p TRUE. |
| 173 | */ | 173 | */ |
| 174 | # if !defined(CH_CFG_USE_TM) | 174 | #if !defined(CH_CFG_USE_TM) |
| 175 | # define CH_CFG_USE_TM TRUE | 175 | #define CH_CFG_USE_TM TRUE |
| 176 | # endif | 176 | #endif |
| 177 | 177 | ||
| 178 | /** | 178 | /** |
| 179 | * @brief Threads registry APIs. | 179 | * @brief Threads registry APIs. |
| @@ -181,9 +181,9 @@ | |||
| 181 | * | 181 | * |
| 182 | * @note The default is @p TRUE. | 182 | * @note The default is @p TRUE. |
| 183 | */ | 183 | */ |
| 184 | # if !defined(CH_CFG_USE_REGISTRY) | 184 | #if !defined(CH_CFG_USE_REGISTRY) |
| 185 | # define CH_CFG_USE_REGISTRY TRUE | 185 | #define CH_CFG_USE_REGISTRY TRUE |
| 186 | # endif | 186 | #endif |
| 187 | 187 | ||
| 188 | /** | 188 | /** |
| 189 | * @brief Threads synchronization APIs. | 189 | * @brief Threads synchronization APIs. |
| @@ -192,9 +192,9 @@ | |||
| 192 | * | 192 | * |
| 193 | * @note The default is @p TRUE. | 193 | * @note The default is @p TRUE. |
| 194 | */ | 194 | */ |
| 195 | # if !defined(CH_CFG_USE_WAITEXIT) | 195 | #if !defined(CH_CFG_USE_WAITEXIT) |
| 196 | # define CH_CFG_USE_WAITEXIT TRUE | 196 | #define CH_CFG_USE_WAITEXIT TRUE |
| 197 | # endif | 197 | #endif |
| 198 | 198 | ||
| 199 | /** | 199 | /** |
| 200 | * @brief Semaphores APIs. | 200 | * @brief Semaphores APIs. |
| @@ -202,9 +202,9 @@ | |||
| 202 | * | 202 | * |
| 203 | * @note The default is @p TRUE. | 203 | * @note The default is @p TRUE. |
| 204 | */ | 204 | */ |
| 205 | # if !defined(CH_CFG_USE_SEMAPHORES) | 205 | #if !defined(CH_CFG_USE_SEMAPHORES) |
| 206 | # define CH_CFG_USE_SEMAPHORES TRUE | 206 | #define CH_CFG_USE_SEMAPHORES TRUE |
| 207 | # endif | 207 | #endif |
| 208 | 208 | ||
| 209 | /** | 209 | /** |
| 210 | * @brief Semaphores queuing mode. | 210 | * @brief Semaphores queuing mode. |
| @@ -215,9 +215,9 @@ | |||
| 215 | * requirements. | 215 | * requirements. |
| 216 | * @note Requires @p CH_CFG_USE_SEMAPHORES. | 216 | * @note Requires @p CH_CFG_USE_SEMAPHORES. |
| 217 | */ | 217 | */ |
| 218 | # if !defined(CH_CFG_USE_SEMAPHORES_PRIORITY) | 218 | #if !defined(CH_CFG_USE_SEMAPHORES_PRIORITY) |
| 219 | # define CH_CFG_USE_SEMAPHORES_PRIORITY FALSE | 219 | #define CH_CFG_USE_SEMAPHORES_PRIORITY FALSE |
| 220 | # endif | 220 | #endif |
| 221 | 221 | ||
| 222 | /** | 222 | /** |
| 223 | * @brief Mutexes APIs. | 223 | * @brief Mutexes APIs. |
| @@ -225,9 +225,9 @@ | |||
| 225 | * | 225 | * |
| 226 | * @note The default is @p TRUE. | 226 | * @note The default is @p TRUE. |
| 227 | */ | 227 | */ |
| 228 | # if !defined(CH_CFG_USE_MUTEXES) | 228 | #if !defined(CH_CFG_USE_MUTEXES) |
| 229 | # define CH_CFG_USE_MUTEXES TRUE | 229 | #define CH_CFG_USE_MUTEXES TRUE |
| 230 | # endif | 230 | #endif |
| 231 | 231 | ||
| 232 | /** | 232 | /** |
| 233 | * @brief Enables recursive behavior on mutexes. | 233 | * @brief Enables recursive behavior on mutexes. |
| @@ -237,9 +237,9 @@ | |||
| 237 | * @note The default is @p FALSE. | 237 | * @note The default is @p FALSE. |
| 238 | * @note Requires @p CH_CFG_USE_MUTEXES. | 238 | * @note Requires @p CH_CFG_USE_MUTEXES. |
| 239 | */ | 239 | */ |
| 240 | # if !defined(CH_CFG_USE_MUTEXES_RECURSIVE) | 240 | #if !defined(CH_CFG_USE_MUTEXES_RECURSIVE) |
| 241 | # define CH_CFG_USE_MUTEXES_RECURSIVE FALSE | 241 | #define CH_CFG_USE_MUTEXES_RECURSIVE FALSE |
| 242 | # endif | 242 | #endif |
| 243 | 243 | ||
| 244 | /** | 244 | /** |
| 245 | * @brief Conditional Variables APIs. | 245 | * @brief Conditional Variables APIs. |
| @@ -249,9 +249,9 @@ | |||
| 249 | * @note The default is @p TRUE. | 249 | * @note The default is @p TRUE. |
| 250 | * @note Requires @p CH_CFG_USE_MUTEXES. | 250 | * @note Requires @p CH_CFG_USE_MUTEXES. |
| 251 | */ | 251 | */ |
| 252 | # if !defined(CH_CFG_USE_CONDVARS) | 252 | #if !defined(CH_CFG_USE_CONDVARS) |
| 253 | # define CH_CFG_USE_CONDVARS TRUE | 253 | #define CH_CFG_USE_CONDVARS TRUE |
| 254 | # endif | 254 | #endif |
| 255 | 255 | ||
| 256 | /** | 256 | /** |
| 257 | * @brief Conditional Variables APIs with timeout. | 257 | * @brief Conditional Variables APIs with timeout. |
| @@ -261,9 +261,9 @@ | |||
| 261 | * @note The default is @p TRUE. | 261 | * @note The default is @p TRUE. |
| 262 | * @note Requires @p CH_CFG_USE_CONDVARS. | 262 | * @note Requires @p CH_CFG_USE_CONDVARS. |
| 263 | */ | 263 | */ |
| 264 | # if !defined(CH_CFG_USE_CONDVARS_TIMEOUT) | 264 | #if !defined(CH_CFG_USE_CONDVARS_TIMEOUT) |
| 265 | # define CH_CFG_USE_CONDVARS_TIMEOUT TRUE | 265 | #define CH_CFG_USE_CONDVARS_TIMEOUT TRUE |
| 266 | # endif | 266 | #endif |
| 267 | 267 | ||
| 268 | /** | 268 | /** |
| 269 | * @brief Events Flags APIs. | 269 | * @brief Events Flags APIs. |
| @@ -271,9 +271,9 @@ | |||
| 271 | * | 271 | * |
| 272 | * @note The default is @p TRUE. | 272 | * @note The default is @p TRUE. |
| 273 | */ | 273 | */ |
| 274 | # if !defined(CH_CFG_USE_EVENTS) | 274 | #if !defined(CH_CFG_USE_EVENTS) |
| 275 | # define CH_CFG_USE_EVENTS TRUE | 275 | #define CH_CFG_USE_EVENTS TRUE |
| 276 | # endif | 276 | #endif |
| 277 | 277 | ||
| 278 | /** | 278 | /** |
| 279 | * @brief Events Flags APIs with timeout. | 279 | * @brief Events Flags APIs with timeout. |
| @@ -283,9 +283,9 @@ | |||
| 283 | * @note The default is @p TRUE. | 283 | * @note The default is @p TRUE. |
| 284 | * @note Requires @p CH_CFG_USE_EVENTS. | 284 | * @note Requires @p CH_CFG_USE_EVENTS. |
| 285 | */ | 285 | */ |
| 286 | # if !defined(CH_CFG_USE_EVENTS_TIMEOUT) | 286 | #if !defined(CH_CFG_USE_EVENTS_TIMEOUT) |
| 287 | # define CH_CFG_USE_EVENTS_TIMEOUT TRUE | 287 | #define CH_CFG_USE_EVENTS_TIMEOUT TRUE |
| 288 | # endif | 288 | #endif |
| 289 | 289 | ||
| 290 | /** | 290 | /** |
| 291 | * @brief Synchronous Messages APIs. | 291 | * @brief Synchronous Messages APIs. |
| @@ -294,9 +294,9 @@ | |||
| 294 | * | 294 | * |
| 295 | * @note The default is @p TRUE. | 295 | * @note The default is @p TRUE. |
| 296 | */ | 296 | */ |
| 297 | # if !defined(CH_CFG_USE_MESSAGES) | 297 | #if !defined(CH_CFG_USE_MESSAGES) |
| 298 | # define CH_CFG_USE_MESSAGES TRUE | 298 | #define CH_CFG_USE_MESSAGES TRUE |
| 299 | # endif | 299 | #endif |
| 300 | 300 | ||
| 301 | /** | 301 | /** |
| 302 | * @brief Synchronous Messages queuing mode. | 302 | * @brief Synchronous Messages queuing mode. |
| @@ -307,9 +307,9 @@ | |||
| 307 | * requirements. | 307 | * requirements. |
| 308 | * @note Requires @p CH_CFG_USE_MESSAGES. | 308 | * @note Requires @p CH_CFG_USE_MESSAGES. |
| 309 | */ | 309 | */ |
| 310 | # if !defined(CH_CFG_USE_MESSAGES_PRIORITY) | 310 | #if !defined(CH_CFG_USE_MESSAGES_PRIORITY) |
| 311 | # define CH_CFG_USE_MESSAGES_PRIORITY TRUE | 311 | #define CH_CFG_USE_MESSAGES_PRIORITY TRUE |
| 312 | # endif | 312 | #endif |
| 313 | 313 | ||
| 314 | /** | 314 | /** |
| 315 | * @brief Mailboxes APIs. | 315 | * @brief Mailboxes APIs. |
| @@ -319,9 +319,9 @@ | |||
| 319 | * @note The default is @p TRUE. | 319 | * @note The default is @p TRUE. |
| 320 | * @note Requires @p CH_CFG_USE_SEMAPHORES. | 320 | * @note Requires @p CH_CFG_USE_SEMAPHORES. |
| 321 | */ | 321 | */ |
| 322 | # if !defined(CH_CFG_USE_MAILBOXES) | 322 | #if !defined(CH_CFG_USE_MAILBOXES) |
| 323 | # define CH_CFG_USE_MAILBOXES TRUE | 323 | #define CH_CFG_USE_MAILBOXES TRUE |
| 324 | # endif | 324 | #endif |
| 325 | 325 | ||
| 326 | /** | 326 | /** |
| 327 | * @brief Core Memory Manager APIs. | 327 | * @brief Core Memory Manager APIs. |
| @@ -330,9 +330,9 @@ | |||
| 330 | * | 330 | * |
| 331 | * @note The default is @p TRUE. | 331 | * @note The default is @p TRUE. |
| 332 | */ | 332 | */ |
| 333 | # if !defined(CH_CFG_USE_MEMCORE) | 333 | #if !defined(CH_CFG_USE_MEMCORE) |
| 334 | # define CH_CFG_USE_MEMCORE TRUE | 334 | #define CH_CFG_USE_MEMCORE TRUE |
| 335 | # endif | 335 | #endif |
| 336 | 336 | ||
| 337 | /** | 337 | /** |
| 338 | * @brief Heap Allocator APIs. | 338 | * @brief Heap Allocator APIs. |
| @@ -344,9 +344,9 @@ | |||
| 344 | * @p CH_CFG_USE_SEMAPHORES. | 344 | * @p CH_CFG_USE_SEMAPHORES. |
| 345 | * @note Mutexes are recommended. | 345 | * @note Mutexes are recommended. |
| 346 | */ | 346 | */ |
| 347 | # if !defined(CH_CFG_USE_HEAP) | 347 | #if !defined(CH_CFG_USE_HEAP) |
| 348 | # define CH_CFG_USE_HEAP TRUE | 348 | #define CH_CFG_USE_HEAP TRUE |
| 349 | # endif | 349 | #endif |
| 350 | 350 | ||
| 351 | /** | 351 | /** |
| 352 | * @brief Memory Pools Allocator APIs. | 352 | * @brief Memory Pools Allocator APIs. |
| @@ -355,9 +355,9 @@ | |||
| 355 | * | 355 | * |
| 356 | * @note The default is @p TRUE. | 356 | * @note The default is @p TRUE. |
| 357 | */ | 357 | */ |
| 358 | # if !defined(CH_CFG_USE_MEMPOOLS) | 358 | #if !defined(CH_CFG_USE_MEMPOOLS) |
| 359 | # define CH_CFG_USE_MEMPOOLS TRUE | 359 | #define CH_CFG_USE_MEMPOOLS TRUE |
| 360 | # endif | 360 | #endif |
| 361 | 361 | ||
| 362 | /** | 362 | /** |
| 363 | * @brief Objects FIFOs APIs. | 363 | * @brief Objects FIFOs APIs. |
| @@ -366,9 +366,9 @@ | |||
| 366 | * | 366 | * |
| 367 | * @note The default is @p TRUE. | 367 | * @note The default is @p TRUE. |
| 368 | */ | 368 | */ |
| 369 | # if !defined(CH_CFG_USE_OBJ_FIFOS) | 369 | #if !defined(CH_CFG_USE_OBJ_FIFOS) |
| 370 | # define CH_CFG_USE_OBJ_FIFOS TRUE | 370 | #define CH_CFG_USE_OBJ_FIFOS TRUE |
| 371 | # endif | 371 | #endif |
| 372 | 372 | ||
| 373 | /** | 373 | /** |
| 374 | * @brief Pipes APIs. | 374 | * @brief Pipes APIs. |
| @@ -377,9 +377,9 @@ | |||
| 377 | * | 377 | * |
| 378 | * @note The default is @p TRUE. | 378 | * @note The default is @p TRUE. |
| 379 | */ | 379 | */ |
| 380 | # if !defined(CH_CFG_USE_PIPES) | 380 | #if !defined(CH_CFG_USE_PIPES) |
| 381 | # define CH_CFG_USE_PIPES TRUE | 381 | #define CH_CFG_USE_PIPES TRUE |
| 382 | # endif | 382 | #endif |
| 383 | 383 | ||
| 384 | /** | 384 | /** |
| 385 | * @brief Dynamic Threads APIs. | 385 | * @brief Dynamic Threads APIs. |
| @@ -390,9 +390,9 @@ | |||
| 390 | * @note Requires @p CH_CFG_USE_WAITEXIT. | 390 | * @note Requires @p CH_CFG_USE_WAITEXIT. |
| 391 | * @note Requires @p CH_CFG_USE_HEAP and/or @p CH_CFG_USE_MEMPOOLS. | 391 | * @note Requires @p CH_CFG_USE_HEAP and/or @p CH_CFG_USE_MEMPOOLS. |
| 392 | */ | 392 | */ |
| 393 | # if !defined(CH_CFG_USE_DYNAMIC) | 393 | #if !defined(CH_CFG_USE_DYNAMIC) |
| 394 | # define CH_CFG_USE_DYNAMIC TRUE | 394 | #define CH_CFG_USE_DYNAMIC TRUE |
| 395 | # endif | 395 | #endif |
| 396 | 396 | ||
| 397 | /** @} */ | 397 | /** @} */ |
| 398 | 398 | ||
| @@ -410,60 +410,60 @@ | |||
| 410 | * | 410 | * |
| 411 | * @note The default is @p FALSE. | 411 | * @note The default is @p FALSE. |
| 412 | */ | 412 | */ |
| 413 | # if !defined(CH_CFG_USE_FACTORY) | 413 | #if !defined(CH_CFG_USE_FACTORY) |
| 414 | # define CH_CFG_USE_FACTORY TRUE | 414 | #define CH_CFG_USE_FACTORY TRUE |
| 415 | # endif | 415 | #endif |
| 416 | 416 | ||
| 417 | /** | 417 | /** |
| 418 | * @brief Maximum length for object names. | 418 | * @brief Maximum length for object names. |
| 419 | * @details If the specified length is zero then the name is stored by | 419 | * @details If the specified length is zero then the name is stored by |
| 420 | * pointer but this could have unintended side effects. | 420 | * pointer but this could have unintended side effects. |
| 421 | */ | 421 | */ |
| 422 | # if !defined(CH_CFG_FACTORY_MAX_NAMES_LENGTH) | 422 | #if !defined(CH_CFG_FACTORY_MAX_NAMES_LENGTH) |
| 423 | # define CH_CFG_FACTORY_MAX_NAMES_LENGTH 8 | 423 | #define CH_CFG_FACTORY_MAX_NAMES_LENGTH 8 |
| 424 | # endif | 424 | #endif |
| 425 | 425 | ||
| 426 | /** | 426 | /** |
| 427 | * @brief Enables the registry of generic objects. | 427 | * @brief Enables the registry of generic objects. |
| 428 | */ | 428 | */ |
| 429 | # if !defined(CH_CFG_FACTORY_OBJECTS_REGISTRY) | 429 | #if !defined(CH_CFG_FACTORY_OBJECTS_REGISTRY) |
| 430 | # define CH_CFG_FACTORY_OBJECTS_REGISTRY TRUE | 430 | #define CH_CFG_FACTORY_OBJECTS_REGISTRY TRUE |
| 431 | # endif | 431 | #endif |
| 432 | 432 | ||
| 433 | /** | 433 | /** |
| 434 | * @brief Enables factory for generic buffers. | 434 | * @brief Enables factory for generic buffers. |
| 435 | */ | 435 | */ |
| 436 | # if !defined(CH_CFG_FACTORY_GENERIC_BUFFERS) | 436 | #if !defined(CH_CFG_FACTORY_GENERIC_BUFFERS) |
| 437 | # define CH_CFG_FACTORY_GENERIC_BUFFERS TRUE | 437 | #define CH_CFG_FACTORY_GENERIC_BUFFERS TRUE |
| 438 | # endif | 438 | #endif |
| 439 | 439 | ||
| 440 | /** | 440 | /** |
| 441 | * @brief Enables factory for semaphores. | 441 | * @brief Enables factory for semaphores. |
| 442 | */ | 442 | */ |
| 443 | # if !defined(CH_CFG_FACTORY_SEMAPHORES) | 443 | #if !defined(CH_CFG_FACTORY_SEMAPHORES) |
| 444 | # define CH_CFG_FACTORY_SEMAPHORES TRUE | 444 | #define CH_CFG_FACTORY_SEMAPHORES TRUE |
| 445 | # endif | 445 | #endif |
| 446 | 446 | ||
| 447 | /** | 447 | /** |
| 448 | * @brief Enables factory for mailboxes. | 448 | * @brief Enables factory for mailboxes. |
| 449 | */ | 449 | */ |
| 450 | # if !defined(CH_CFG_FACTORY_MAILBOXES) | 450 | #if !defined(CH_CFG_FACTORY_MAILBOXES) |
| 451 | # define CH_CFG_FACTORY_MAILBOXES TRUE | 451 | #define CH_CFG_FACTORY_MAILBOXES TRUE |
| 452 | # endif | 452 | #endif |
| 453 | 453 | ||
| 454 | /** | 454 | /** |
| 455 | * @brief Enables factory for objects FIFOs. | 455 | * @brief Enables factory for objects FIFOs. |
| 456 | */ | 456 | */ |
| 457 | # if !defined(CH_CFG_FACTORY_OBJ_FIFOS) | 457 | #if !defined(CH_CFG_FACTORY_OBJ_FIFOS) |
| 458 | # define CH_CFG_FACTORY_OBJ_FIFOS TRUE | 458 | #define CH_CFG_FACTORY_OBJ_FIFOS TRUE |
| 459 | # endif | 459 | #endif |
| 460 | 460 | ||
| 461 | /** | 461 | /** |
| 462 | * @brief Enables factory for Pipes. | 462 | * @brief Enables factory for Pipes. |
| 463 | */ | 463 | */ |
| 464 | # if !defined(CH_CFG_FACTORY_PIPES) || defined(__DOXYGEN__) | 464 | #if !defined(CH_CFG_FACTORY_PIPES) || defined(__DOXYGEN__) |
| 465 | # define CH_CFG_FACTORY_PIPES TRUE | 465 | #define CH_CFG_FACTORY_PIPES TRUE |
| 466 | # endif | 466 | #endif |
| 467 | 467 | ||
| 468 | /** @} */ | 468 | /** @} */ |
| 469 | 469 | ||
| @@ -479,9 +479,9 @@ | |||
| 479 | * | 479 | * |
| 480 | * @note The default is @p FALSE. | 480 | * @note The default is @p FALSE. |
| 481 | */ | 481 | */ |
| 482 | # if !defined(CH_DBG_STATISTICS) | 482 | #if !defined(CH_DBG_STATISTICS) |
| 483 | # define CH_DBG_STATISTICS FALSE | 483 | #define CH_DBG_STATISTICS FALSE |
| 484 | # endif | 484 | #endif |
| 485 | 485 | ||
| 486 | /** | 486 | /** |
| 487 | * @brief Debug option, system state check. | 487 | * @brief Debug option, system state check. |
| @@ -490,9 +490,9 @@ | |||
| 490 | * | 490 | * |
| 491 | * @note The default is @p FALSE. | 491 | * @note The default is @p FALSE. |
| 492 | */ | 492 | */ |
| 493 | # if !defined(CH_DBG_SYSTEM_STATE_CHECK) | 493 | #if !defined(CH_DBG_SYSTEM_STATE_CHECK) |
| 494 | # define CH_DBG_SYSTEM_STATE_CHECK FALSE | 494 | #define CH_DBG_SYSTEM_STATE_CHECK FALSE |
| 495 | # endif | 495 | #endif |
| 496 | 496 | ||
| 497 | /** | 497 | /** |
| 498 | * @brief Debug option, parameters checks. | 498 | * @brief Debug option, parameters checks. |
| @@ -501,9 +501,9 @@ | |||
| 501 | * | 501 | * |
| 502 | * @note The default is @p FALSE. | 502 | * @note The default is @p FALSE. |
| 503 | */ | 503 | */ |
| 504 | # if !defined(CH_DBG_ENABLE_CHECKS) | 504 | #if !defined(CH_DBG_ENABLE_CHECKS) |
| 505 | # define CH_DBG_ENABLE_CHECKS FALSE | 505 | #define CH_DBG_ENABLE_CHECKS FALSE |
| 506 | # endif | 506 | #endif |
| 507 | 507 | ||
| 508 | /** | 508 | /** |
| 509 | * @brief Debug option, consistency checks. | 509 | * @brief Debug option, consistency checks. |
| @@ -513,9 +513,9 @@ | |||
| 513 | * | 513 | * |
| 514 | * @note The default is @p FALSE. | 514 | * @note The default is @p FALSE. |
| 515 | */ | 515 | */ |
| 516 | # if !defined(CH_DBG_ENABLE_ASSERTS) | 516 | #if !defined(CH_DBG_ENABLE_ASSERTS) |
| 517 | # define CH_DBG_ENABLE_ASSERTS FALSE | 517 | #define CH_DBG_ENABLE_ASSERTS FALSE |
| 518 | # endif | 518 | #endif |
| 519 | 519 | ||
| 520 | /** | 520 | /** |
| 521 | * @brief Debug option, trace buffer. | 521 | * @brief Debug option, trace buffer. |
| @@ -523,18 +523,18 @@ | |||
| 523 | * | 523 | * |
| 524 | * @note The default is @p CH_DBG_TRACE_MASK_DISABLED. | 524 | * @note The default is @p CH_DBG_TRACE_MASK_DISABLED. |
| 525 | */ | 525 | */ |
| 526 | # if !defined(CH_DBG_TRACE_MASK) | 526 | #if !defined(CH_DBG_TRACE_MASK) |
| 527 | # define CH_DBG_TRACE_MASK CH_DBG_TRACE_MASK_DISABLED | 527 | #define CH_DBG_TRACE_MASK CH_DBG_TRACE_MASK_DISABLED |
| 528 | # endif | 528 | #endif |
| 529 | 529 | ||
| 530 | /** | 530 | /** |
| 531 | * @brief Trace buffer entries. | 531 | * @brief Trace buffer entries. |
| 532 | * @note The trace buffer is only allocated if @p CH_DBG_TRACE_MASK is | 532 | * @note The trace buffer is only allocated if @p CH_DBG_TRACE_MASK is |
| 533 | * different from @p CH_DBG_TRACE_MASK_DISABLED. | 533 | * different from @p CH_DBG_TRACE_MASK_DISABLED. |
| 534 | */ | 534 | */ |
| 535 | # if !defined(CH_DBG_TRACE_BUFFER_SIZE) | 535 | #if !defined(CH_DBG_TRACE_BUFFER_SIZE) |
| 536 | # define CH_DBG_TRACE_BUFFER_SIZE 128 | 536 | #define CH_DBG_TRACE_BUFFER_SIZE 128 |
| 537 | # endif | 537 | #endif |
| 538 | 538 | ||
| 539 | /** | 539 | /** |
| 540 | * @brief Debug option, stack checks. | 540 | * @brief Debug option, stack checks. |
| @@ -546,9 +546,9 @@ | |||
| 546 | * @note The default failure mode is to halt the system with the global | 546 | * @note The default failure mode is to halt the system with the global |
| 547 | * @p panic_msg variable set to @p NULL. | 547 | * @p panic_msg variable set to @p NULL. |
| 548 | */ | 548 | */ |
| 549 | # if !defined(CH_DBG_ENABLE_STACK_CHECK) | 549 | #if !defined(CH_DBG_ENABLE_STACK_CHECK) |
| 550 | # define CH_DBG_ENABLE_STACK_CHECK TRUE | 550 | #define CH_DBG_ENABLE_STACK_CHECK TRUE |
| 551 | # endif | 551 | #endif |
| 552 | 552 | ||
| 553 | /** | 553 | /** |
| 554 | * @brief Debug option, stacks initialization. | 554 | * @brief Debug option, stacks initialization. |
| @@ -558,9 +558,9 @@ | |||
| 558 | * | 558 | * |
| 559 | * @note The default is @p FALSE. | 559 | * @note The default is @p FALSE. |
| 560 | */ | 560 | */ |
| 561 | # if !defined(CH_DBG_FILL_THREADS) | 561 | #if !defined(CH_DBG_FILL_THREADS) |
| 562 | # define CH_DBG_FILL_THREADS FALSE | 562 | #define CH_DBG_FILL_THREADS FALSE |
| 563 | # endif | 563 | #endif |
| 564 | 564 | ||
| 565 | /** | 565 | /** |
| 566 | * @brief Debug option, threads profiling. | 566 | * @brief Debug option, threads profiling. |
| @@ -571,9 +571,9 @@ | |||
| 571 | * @note This debug option is not currently compatible with the | 571 | * @note This debug option is not currently compatible with the |
| 572 | * tickless mode. | 572 | * tickless mode. |
| 573 | */ | 573 | */ |
| 574 | # if !defined(CH_DBG_THREADS_PROFILING) | 574 | #if !defined(CH_DBG_THREADS_PROFILING) |
| 575 | # define CH_DBG_THREADS_PROFILING FALSE | 575 | #define CH_DBG_THREADS_PROFILING FALSE |
| 576 | # endif | 576 | #endif |
| 577 | 577 | ||
| 578 | /** @} */ | 578 | /** @} */ |
| 579 | 579 | ||
| @@ -588,22 +588,24 @@ | |||
| 588 | * @brief System structure extension. | 588 | * @brief System structure extension. |
| 589 | * @details User fields added to the end of the @p ch_system_t structure. | 589 | * @details User fields added to the end of the @p ch_system_t structure. |
| 590 | */ | 590 | */ |
| 591 | # define CH_CFG_SYSTEM_EXTRA_FIELDS /* Add threads custom fields here.*/ | 591 | #define CH_CFG_SYSTEM_EXTRA_FIELDS \ |
| 592 | /* Add threads custom fields here.*/ | ||
| 592 | 593 | ||
| 593 | /** | 594 | /** |
| 594 | * @brief System initialization hook. | 595 | * @brief System initialization hook. |
| 595 | * @details User initialization code added to the @p chSysInit() function | 596 | * @details User initialization code added to the @p chSysInit() function |
| 596 | * just before interrupts are enabled globally. | 597 | * just before interrupts are enabled globally. |
| 597 | */ | 598 | */ |
| 598 | # define CH_CFG_SYSTEM_INIT_HOOK() \ | 599 | #define CH_CFG_SYSTEM_INIT_HOOK() { \ |
| 599 | { /* Add threads initialization code here.*/ \ | 600 | /* Add threads initialization code here.*/ \ |
| 600 | } | 601 | } |
| 601 | 602 | ||
| 602 | /** | 603 | /** |
| 603 | * @brief Threads descriptor structure extension. | 604 | * @brief Threads descriptor structure extension. |
| 604 | * @details User fields added to the end of the @p thread_t structure. | 605 | * @details User fields added to the end of the @p thread_t structure. |
| 605 | */ | 606 | */ |
| 606 | # define CH_CFG_THREAD_EXTRA_FIELDS /* Add threads custom fields here.*/ | 607 | #define CH_CFG_THREAD_EXTRA_FIELDS \ |
| 608 | /* Add threads custom fields here.*/ | ||
| 607 | 609 | ||
| 608 | /** | 610 | /** |
| 609 | * @brief Threads initialization hook. | 611 | * @brief Threads initialization hook. |
| @@ -612,39 +614,39 @@ | |||
| 612 | * @note It is invoked from within @p _thread_init() and implicitly from all | 614 | * @note It is invoked from within @p _thread_init() and implicitly from all |
| 613 | * the threads creation APIs. | 615 | * the threads creation APIs. |
| 614 | */ | 616 | */ |
| 615 | # define CH_CFG_THREAD_INIT_HOOK(tp) \ | 617 | #define CH_CFG_THREAD_INIT_HOOK(tp) { \ |
| 616 | { /* Add threads initialization code here.*/ \ | 618 | /* Add threads initialization code here.*/ \ |
| 617 | } | 619 | } |
| 618 | 620 | ||
| 619 | /** | 621 | /** |
| 620 | * @brief Threads finalization hook. | 622 | * @brief Threads finalization hook. |
| 621 | * @details User finalization code added to the @p chThdExit() API. | 623 | * @details User finalization code added to the @p chThdExit() API. |
| 622 | */ | 624 | */ |
| 623 | # define CH_CFG_THREAD_EXIT_HOOK(tp) \ | 625 | #define CH_CFG_THREAD_EXIT_HOOK(tp) { \ |
| 624 | { /* Add threads finalization code here.*/ \ | 626 | /* Add threads finalization code here.*/ \ |
| 625 | } | 627 | } |
| 626 | 628 | ||
| 627 | /** | 629 | /** |
| 628 | * @brief Context switch hook. | 630 | * @brief Context switch hook. |
| 629 | * @details This hook is invoked just before switching between threads. | 631 | * @details This hook is invoked just before switching between threads. |
| 630 | */ | 632 | */ |
| 631 | # define CH_CFG_CONTEXT_SWITCH_HOOK(ntp, otp) \ | 633 | #define CH_CFG_CONTEXT_SWITCH_HOOK(ntp, otp) { \ |
| 632 | { /* Context switch code here.*/ \ | 634 | /* Context switch code here.*/ \ |
| 633 | } | 635 | } |
| 634 | 636 | ||
| 635 | /** | 637 | /** |
| 636 | * @brief ISR enter hook. | 638 | * @brief ISR enter hook. |
| 637 | */ | 639 | */ |
| 638 | # define CH_CFG_IRQ_PROLOGUE_HOOK() \ | 640 | #define CH_CFG_IRQ_PROLOGUE_HOOK() { \ |
| 639 | { /* IRQ prologue code here.*/ \ | 641 | /* IRQ prologue code here.*/ \ |
| 640 | } | 642 | } |
| 641 | 643 | ||
| 642 | /** | 644 | /** |
| 643 | * @brief ISR exit hook. | 645 | * @brief ISR exit hook. |
| 644 | */ | 646 | */ |
| 645 | # define CH_CFG_IRQ_EPILOGUE_HOOK() \ | 647 | #define CH_CFG_IRQ_EPILOGUE_HOOK() { \ |
| 646 | { /* IRQ epilogue code here.*/ \ | 648 | /* IRQ epilogue code here.*/ \ |
| 647 | } | 649 | } |
| 648 | 650 | ||
| 649 | /** | 651 | /** |
| 650 | * @brief Idle thread enter hook. | 652 | * @brief Idle thread enter hook. |
| @@ -652,9 +654,9 @@ | |||
| 652 | * should be invoked from here. | 654 | * should be invoked from here. |
| 653 | * @note This macro can be used to activate a power saving mode. | 655 | * @note This macro can be used to activate a power saving mode. |
| 654 | */ | 656 | */ |
| 655 | # define CH_CFG_IDLE_ENTER_HOOK() \ | 657 | #define CH_CFG_IDLE_ENTER_HOOK() { \ |
| 656 | { /* Idle-enter code here.*/ \ | 658 | /* Idle-enter code here.*/ \ |
| 657 | } | 659 | } |
| 658 | 660 | ||
| 659 | /** | 661 | /** |
| 660 | * @brief Idle thread leave hook. | 662 | * @brief Idle thread leave hook. |
| @@ -662,44 +664,44 @@ | |||
| 662 | * should be invoked from here. | 664 | * should be invoked from here. |
| 663 | * @note This macro can be used to deactivate a power saving mode. | 665 | * @note This macro can be used to deactivate a power saving mode. |
| 664 | */ | 666 | */ |
| 665 | # define CH_CFG_IDLE_LEAVE_HOOK() \ | 667 | #define CH_CFG_IDLE_LEAVE_HOOK() { \ |
| 666 | { /* Idle-leave code here.*/ \ | 668 | /* Idle-leave code here.*/ \ |
| 667 | } | 669 | } |
| 668 | 670 | ||
| 669 | /** | 671 | /** |
| 670 | * @brief Idle Loop hook. | 672 | * @brief Idle Loop hook. |
| 671 | * @details This hook is continuously invoked by the idle thread loop. | 673 | * @details This hook is continuously invoked by the idle thread loop. |
| 672 | */ | 674 | */ |
| 673 | # define CH_CFG_IDLE_LOOP_HOOK() \ | 675 | #define CH_CFG_IDLE_LOOP_HOOK() { \ |
| 674 | { /* Idle loop code here.*/ \ | 676 | /* Idle loop code here.*/ \ |
| 675 | } | 677 | } |
| 676 | 678 | ||
| 677 | /** | 679 | /** |
| 678 | * @brief System tick event hook. | 680 | * @brief System tick event hook. |
| 679 | * @details This hook is invoked in the system tick handler immediately | 681 | * @details This hook is invoked in the system tick handler immediately |
| 680 | * after processing the virtual timers queue. | 682 | * after processing the virtual timers queue. |
| 681 | */ | 683 | */ |
| 682 | # define CH_CFG_SYSTEM_TICK_HOOK() \ | 684 | #define CH_CFG_SYSTEM_TICK_HOOK() { \ |
| 683 | { /* System tick event code here.*/ \ | 685 | /* System tick event code here.*/ \ |
| 684 | } | 686 | } |
| 685 | 687 | ||
| 686 | /** | 688 | /** |
| 687 | * @brief System halt hook. | 689 | * @brief System halt hook. |
| 688 | * @details This hook is invoked in case to a system halting error before | 690 | * @details This hook is invoked in case to a system halting error before |
| 689 | * the system is halted. | 691 | * the system is halted. |
| 690 | */ | 692 | */ |
| 691 | # define CH_CFG_SYSTEM_HALT_HOOK(reason) \ | 693 | #define CH_CFG_SYSTEM_HALT_HOOK(reason) { \ |
| 692 | { /* System halt code here.*/ \ | 694 | /* System halt code here.*/ \ |
| 693 | } | 695 | } |
| 694 | 696 | ||
| 695 | /** | 697 | /** |
| 696 | * @brief Trace hook. | 698 | * @brief Trace hook. |
| 697 | * @details This hook is invoked each time a new record is written in the | 699 | * @details This hook is invoked each time a new record is written in the |
| 698 | * trace buffer. | 700 | * trace buffer. |
| 699 | */ | 701 | */ |
| 700 | # define CH_CFG_TRACE_HOOK(tep) \ | 702 | #define CH_CFG_TRACE_HOOK(tep) { \ |
| 701 | { /* Trace code here.*/ \ | 703 | /* Trace code here.*/ \ |
| 702 | } | 704 | } |
| 703 | 705 | ||
| 704 | /** @} */ | 706 | /** @} */ |
| 705 | 707 | ||
| @@ -707,6 +709,6 @@ | |||
| 707 | /* Port-specific settings (override port settings defaulted in chcore.h). */ | 709 | /* Port-specific settings (override port settings defaulted in chcore.h). */ |
| 708 | /*===========================================================================*/ | 710 | /*===========================================================================*/ |
| 709 | 711 | ||
| 710 | #endif /* CHCONF_H */ | 712 | #endif /* CHCONF_H */ |
| 711 | 713 | ||
| 712 | /** @} */ | 714 | /** @} */ |
diff --git a/quantum/stm32/halconf.h b/platforms/chibios/GENERIC_STM32_F303XC/configs/halconf.h index b6c7b392c..6b48e289f 100644 --- a/quantum/stm32/halconf.h +++ b/platforms/chibios/GENERIC_STM32_F303XC/configs/halconf.h | |||
| @@ -26,173 +26,173 @@ | |||
| 26 | */ | 26 | */ |
| 27 | 27 | ||
| 28 | #ifndef HALCONF_H | 28 | #ifndef HALCONF_H |
| 29 | # define HALCONF_H | 29 | #define HALCONF_H |
| 30 | 30 | ||
| 31 | # define _CHIBIOS_HAL_CONF_ | 31 | #define _CHIBIOS_HAL_CONF_ |
| 32 | # define _CHIBIOS_HAL_CONF_VER_7_0_ | 32 | #define _CHIBIOS_HAL_CONF_VER_7_0_ |
| 33 | 33 | ||
| 34 | # include "mcuconf.h" | 34 | #include "mcuconf.h" |
| 35 | 35 | ||
| 36 | /** | 36 | /** |
| 37 | * @brief Enables the PAL subsystem. | 37 | * @brief Enables the PAL subsystem. |
| 38 | */ | 38 | */ |
| 39 | # if !defined(HAL_USE_PAL) || defined(__DOXYGEN__) | 39 | #if !defined(HAL_USE_PAL) || defined(__DOXYGEN__) |
| 40 | # define HAL_USE_PAL TRUE | 40 | #define HAL_USE_PAL TRUE |
| 41 | # endif | 41 | #endif |
| 42 | 42 | ||
| 43 | /** | 43 | /** |
| 44 | * @brief Enables the ADC subsystem. | 44 | * @brief Enables the ADC subsystem. |
| 45 | */ | 45 | */ |
| 46 | # if !defined(HAL_USE_ADC) || defined(__DOXYGEN__) | 46 | #if !defined(HAL_USE_ADC) || defined(__DOXYGEN__) |
| 47 | # define HAL_USE_ADC FALSE | 47 | #define HAL_USE_ADC FALSE |
| 48 | # endif | 48 | #endif |
| 49 | 49 | ||
| 50 | /** | 50 | /** |
| 51 | * @brief Enables the CAN subsystem. | 51 | * @brief Enables the CAN subsystem. |
| 52 | */ | 52 | */ |
| 53 | # if !defined(HAL_USE_CAN) || defined(__DOXYGEN__) | 53 | #if !defined(HAL_USE_CAN) || defined(__DOXYGEN__) |
| 54 | # define HAL_USE_CAN FALSE | 54 | #define HAL_USE_CAN FALSE |
| 55 | # endif | 55 | #endif |
| 56 | 56 | ||
| 57 | /** | 57 | /** |
| 58 | * @brief Enables the cryptographic subsystem. | 58 | * @brief Enables the cryptographic subsystem. |
| 59 | */ | 59 | */ |
| 60 | # if !defined(HAL_USE_CRY) || defined(__DOXYGEN__) | 60 | #if !defined(HAL_USE_CRY) || defined(__DOXYGEN__) |
| 61 | # define HAL_USE_CRY FALSE | 61 | #define HAL_USE_CRY FALSE |
| 62 | # endif | 62 | #endif |
| 63 | 63 | ||
| 64 | /** | 64 | /** |
| 65 | * @brief Enables the DAC subsystem. | 65 | * @brief Enables the DAC subsystem. |
| 66 | */ | 66 | */ |
| 67 | # if !defined(HAL_USE_DAC) || defined(__DOXYGEN__) | 67 | #if !defined(HAL_USE_DAC) || defined(__DOXYGEN__) |
| 68 | # define HAL_USE_DAC TRUE | 68 | #define HAL_USE_DAC TRUE |
| 69 | # endif | 69 | #endif |
| 70 | 70 | ||
| 71 | /** | 71 | /** |
| 72 | * @brief Enables the GPT subsystem. | 72 | * @brief Enables the GPT subsystem. |
| 73 | */ | 73 | */ |
| 74 | # if !defined(HAL_USE_GPT) || defined(__DOXYGEN__) | 74 | #if !defined(HAL_USE_GPT) || defined(__DOXYGEN__) |
| 75 | # define HAL_USE_GPT TRUE | 75 | #define HAL_USE_GPT TRUE |
| 76 | # endif | 76 | #endif |
| 77 | 77 | ||
| 78 | /** | 78 | /** |
| 79 | * @brief Enables the I2C subsystem. | 79 | * @brief Enables the I2C subsystem. |
| 80 | */ | 80 | */ |
| 81 | # if !defined(HAL_USE_I2C) || defined(__DOXYGEN__) | 81 | #if !defined(HAL_USE_I2C) || defined(__DOXYGEN__) |
| 82 | # define HAL_USE_I2C TRUE | 82 | #define HAL_USE_I2C TRUE |
| 83 | # endif | 83 | #endif |
| 84 | 84 | ||
| 85 | /** | 85 | /** |
| 86 | * @brief Enables the I2S subsystem. | 86 | * @brief Enables the I2S subsystem. |
| 87 | */ | 87 | */ |
| 88 | # if !defined(HAL_USE_I2S) || defined(__DOXYGEN__) | 88 | #if !defined(HAL_USE_I2S) || defined(__DOXYGEN__) |
| 89 | # define HAL_USE_I2S FALSE | 89 | #define HAL_USE_I2S FALSE |
| 90 | # endif | 90 | #endif |
| 91 | 91 | ||
| 92 | /** | 92 | /** |
| 93 | * @brief Enables the ICU subsystem. | 93 | * @brief Enables the ICU subsystem. |
| 94 | */ | 94 | */ |
| 95 | # if !defined(HAL_USE_ICU) || defined(__DOXYGEN__) | 95 | #if !defined(HAL_USE_ICU) || defined(__DOXYGEN__) |
| 96 | # define HAL_USE_ICU FALSE | 96 | #define HAL_USE_ICU FALSE |
| 97 | # endif | 97 | #endif |
| 98 | 98 | ||
| 99 | /** | 99 | /** |
| 100 | * @brief Enables the MAC subsystem. | 100 | * @brief Enables the MAC subsystem. |
| 101 | */ | 101 | */ |
| 102 | # if !defined(HAL_USE_MAC) || defined(__DOXYGEN__) | 102 | #if !defined(HAL_USE_MAC) || defined(__DOXYGEN__) |
| 103 | # define HAL_USE_MAC FALSE | 103 | #define HAL_USE_MAC FALSE |
| 104 | # endif | 104 | #endif |
| 105 | 105 | ||
| 106 | /** | 106 | /** |
| 107 | * @brief Enables the MMC_SPI subsystem. | 107 | * @brief Enables the MMC_SPI subsystem. |
| 108 | */ | 108 | */ |
| 109 | # if !defined(HAL_USE_MMC_SPI) || defined(__DOXYGEN__) | 109 | #if !defined(HAL_USE_MMC_SPI) || defined(__DOXYGEN__) |
| 110 | # define HAL_USE_MMC_SPI FALSE | 110 | #define HAL_USE_MMC_SPI FALSE |
| 111 | # endif | 111 | #endif |
| 112 | 112 | ||
| 113 | /** | 113 | /** |
| 114 | * @brief Enables the PWM subsystem. | 114 | * @brief Enables the PWM subsystem. |
| 115 | */ | 115 | */ |
| 116 | # if !defined(HAL_USE_PWM) || defined(__DOXYGEN__) | 116 | #if !defined(HAL_USE_PWM) || defined(__DOXYGEN__) |
| 117 | # define HAL_USE_PWM TRUE | 117 | #define HAL_USE_PWM TRUE |
| 118 | # endif | 118 | #endif |
| 119 | 119 | ||
| 120 | /** | 120 | /** |
| 121 | * @brief Enables the RTC subsystem. | 121 | * @brief Enables the RTC subsystem. |
| 122 | */ | 122 | */ |
| 123 | # if !defined(HAL_USE_RTC) || defined(__DOXYGEN__) | 123 | #if !defined(HAL_USE_RTC) || defined(__DOXYGEN__) |
| 124 | # define HAL_USE_RTC FALSE | 124 | #define HAL_USE_RTC FALSE |
| 125 | # endif | 125 | #endif |
| 126 | 126 | ||
| 127 | /** | 127 | /** |
| 128 | * @brief Enables the SDC subsystem. | 128 | * @brief Enables the SDC subsystem. |
| 129 | */ | 129 | */ |
| 130 | # if !defined(HAL_USE_SDC) || defined(__DOXYGEN__) | 130 | #if !defined(HAL_USE_SDC) || defined(__DOXYGEN__) |
| 131 | # define HAL_USE_SDC FALSE | 131 | #define HAL_USE_SDC FALSE |
| 132 | # endif | 132 | #endif |
| 133 | 133 | ||
| 134 | /** | 134 | /** |
| 135 | * @brief Enables the SERIAL subsystem. | 135 | * @brief Enables the SERIAL subsystem. |
| 136 | */ | 136 | */ |
| 137 | # if !defined(HAL_USE_SERIAL) || defined(__DOXYGEN__) | 137 | #if !defined(HAL_USE_SERIAL) || defined(__DOXYGEN__) |
| 138 | # define HAL_USE_SERIAL FALSE | 138 | #define HAL_USE_SERIAL FALSE |
| 139 | # endif | 139 | #endif |
| 140 | 140 | ||
| 141 | /** | 141 | /** |
| 142 | * @brief Enables the SERIAL over USB subsystem. | 142 | * @brief Enables the SERIAL over USB subsystem. |
| 143 | */ | 143 | */ |
| 144 | # if !defined(HAL_USE_SERIAL_USB) || defined(__DOXYGEN__) | 144 | #if !defined(HAL_USE_SERIAL_USB) || defined(__DOXYGEN__) |
| 145 | # define HAL_USE_SERIAL_USB TRUE | 145 | #define HAL_USE_SERIAL_USB TRUE |
| 146 | # endif | 146 | #endif |
| 147 | 147 | ||
| 148 | /** | 148 | /** |
| 149 | * @brief Enables the SIO subsystem. | 149 | * @brief Enables the SIO subsystem. |
| 150 | */ | 150 | */ |
| 151 | # if !defined(HAL_USE_SIO) || defined(__DOXYGEN__) | 151 | #if !defined(HAL_USE_SIO) || defined(__DOXYGEN__) |
| 152 | # define HAL_USE_SIO FALSE | 152 | #define HAL_USE_SIO FALSE |
| 153 | # endif | 153 | #endif |
| 154 | 154 | ||
| 155 | /** | 155 | /** |
| 156 | * @brief Enables the SPI subsystem. | 156 | * @brief Enables the SPI subsystem. |
| 157 | */ | 157 | */ |
| 158 | # if !defined(HAL_USE_SPI) || defined(__DOXYGEN__) | 158 | #if !defined(HAL_USE_SPI) || defined(__DOXYGEN__) |
| 159 | # define HAL_USE_SPI TRUE | 159 | #define HAL_USE_SPI TRUE |
| 160 | # endif | 160 | #endif |
| 161 | 161 | ||
| 162 | /** | 162 | /** |
| 163 | * @brief Enables the TRNG subsystem. | 163 | * @brief Enables the TRNG subsystem. |
| 164 | */ | 164 | */ |
| 165 | # if !defined(HAL_USE_TRNG) || defined(__DOXYGEN__) | 165 | #if !defined(HAL_USE_TRNG) || defined(__DOXYGEN__) |
| 166 | # define HAL_USE_TRNG FALSE | 166 | #define HAL_USE_TRNG FALSE |
| 167 | # endif | 167 | #endif |
| 168 | 168 | ||
| 169 | /** | 169 | /** |
| 170 | * @brief Enables the UART subsystem. | 170 | * @brief Enables the UART subsystem. |
| 171 | */ | 171 | */ |
| 172 | # if !defined(HAL_USE_UART) || defined(__DOXYGEN__) | 172 | #if !defined(HAL_USE_UART) || defined(__DOXYGEN__) |
| 173 | # define HAL_USE_UART FALSE | 173 | #define HAL_USE_UART FALSE |
| 174 | # endif | 174 | #endif |
| 175 | 175 | ||
| 176 | /** | 176 | /** |
| 177 | * @brief Enables the USB subsystem. | 177 | * @brief Enables the USB subsystem. |
| 178 | */ | 178 | */ |
| 179 | # if !defined(HAL_USE_USB) || defined(__DOXYGEN__) | 179 | #if !defined(HAL_USE_USB) || defined(__DOXYGEN__) |
| 180 | # define HAL_USE_USB TRUE | 180 | #define HAL_USE_USB TRUE |
| 181 | # endif | 181 | #endif |
| 182 | 182 | ||
| 183 | /** | 183 | /** |
| 184 | * @brief Enables the WDG subsystem. | 184 | * @brief Enables the WDG subsystem. |
| 185 | */ | 185 | */ |
| 186 | # if !defined(HAL_USE_WDG) || defined(__DOXYGEN__) | 186 | #if !defined(HAL_USE_WDG) || defined(__DOXYGEN__) |
| 187 | # define HAL_USE_WDG FALSE | 187 | #define HAL_USE_WDG FALSE |
| 188 | # endif | 188 | #endif |
| 189 | 189 | ||
| 190 | /** | 190 | /** |
| 191 | * @brief Enables the WSPI subsystem. | 191 | * @brief Enables the WSPI subsystem. |
| 192 | */ | 192 | */ |
| 193 | # if !defined(HAL_USE_WSPI) || defined(__DOXYGEN__) | 193 | #if !defined(HAL_USE_WSPI) || defined(__DOXYGEN__) |
| 194 | # define HAL_USE_WSPI FALSE | 194 | #define HAL_USE_WSPI FALSE |
| 195 | # endif | 195 | #endif |
| 196 | 196 | ||
| 197 | /*===========================================================================*/ | 197 | /*===========================================================================*/ |
| 198 | /* PAL driver related settings. */ | 198 | /* PAL driver related settings. */ |
| @@ -202,17 +202,17 @@ | |||
| 202 | * @brief Enables synchronous APIs. | 202 | * @brief Enables synchronous APIs. |
| 203 | * @note Disabling this option saves both code and data space. | 203 | * @note Disabling this option saves both code and data space. |
| 204 | */ | 204 | */ |
| 205 | # if !defined(PAL_USE_CALLBACKS) || defined(__DOXYGEN__) | 205 | #if !defined(PAL_USE_CALLBACKS) || defined(__DOXYGEN__) |
| 206 | # define PAL_USE_CALLBACKS TRUE | 206 | #define PAL_USE_CALLBACKS TRUE |
| 207 | # endif | 207 | #endif |
| 208 | 208 | ||
| 209 | /** | 209 | /** |
| 210 | * @brief Enables synchronous APIs. | 210 | * @brief Enables synchronous APIs. |
| 211 | * @note Disabling this option saves both code and data space. | 211 | * @note Disabling this option saves both code and data space. |
| 212 | */ | 212 | */ |
| 213 | # if !defined(PAL_USE_WAIT) || defined(__DOXYGEN__) | 213 | #if !defined(PAL_USE_WAIT) || defined(__DOXYGEN__) |
| 214 | # define PAL_USE_WAIT TRUE | 214 | #define PAL_USE_WAIT TRUE |
| 215 | # endif | 215 | #endif |
| 216 | 216 | ||
| 217 | /*===========================================================================*/ | 217 | /*===========================================================================*/ |
| 218 | /* ADC driver related settings. */ | 218 | /* ADC driver related settings. */ |
| @@ -222,17 +222,17 @@ | |||
| 222 | * @brief Enables synchronous APIs. | 222 | * @brief Enables synchronous APIs. |
| 223 | * @note Disabling this option saves both code and data space. | 223 | * @note Disabling this option saves both code and data space. |
| 224 | */ | 224 | */ |
| 225 | # if !defined(ADC_USE_WAIT) || defined(__DOXYGEN__) | 225 | #if !defined(ADC_USE_WAIT) || defined(__DOXYGEN__) |
| 226 | # define ADC_USE_WAIT TRUE | 226 | #define ADC_USE_WAIT TRUE |
| 227 | # endif | 227 | #endif |
| 228 | 228 | ||
| 229 | /** | 229 | /** |
| 230 | * @brief Enables the @p adcAcquireBus() and @p adcReleaseBus() APIs. | 230 | * @brief Enables the @p adcAcquireBus() and @p adcReleaseBus() APIs. |
| 231 | * @note Disabling this option saves both code and data space. | 231 | * @note Disabling this option saves both code and data space. |
| 232 | */ | 232 | */ |
| 233 | # if !defined(ADC_USE_MUTUAL_EXCLUSION) || defined(__DOXYGEN__) | 233 | #if !defined(ADC_USE_MUTUAL_EXCLUSION) || defined(__DOXYGEN__) |
| 234 | # define ADC_USE_MUTUAL_EXCLUSION TRUE | 234 | #define ADC_USE_MUTUAL_EXCLUSION TRUE |
| 235 | # endif | 235 | #endif |
| 236 | 236 | ||
| 237 | /*===========================================================================*/ | 237 | /*===========================================================================*/ |
| 238 | /* CAN driver related settings. */ | 238 | /* CAN driver related settings. */ |
| @@ -241,16 +241,16 @@ | |||
| 241 | /** | 241 | /** |
| 242 | * @brief Sleep mode related APIs inclusion switch. | 242 | * @brief Sleep mode related APIs inclusion switch. |
| 243 | */ | 243 | */ |
| 244 | # if !defined(CAN_USE_SLEEP_MODE) || defined(__DOXYGEN__) | 244 | #if !defined(CAN_USE_SLEEP_MODE) || defined(__DOXYGEN__) |
| 245 | # define CAN_USE_SLEEP_MODE TRUE | 245 | #define CAN_USE_SLEEP_MODE TRUE |
| 246 | # endif | 246 | #endif |
| 247 | 247 | ||
| 248 | /** | 248 | /** |
| 249 | * @brief Enforces the driver to use direct callbacks rather than OSAL events. | 249 | * @brief Enforces the driver to use direct callbacks rather than OSAL events. |
| 250 | */ | 250 | */ |
| 251 | # if !defined(CAN_ENFORCE_USE_CALLBACKS) || defined(__DOXYGEN__) | 251 | #if !defined(CAN_ENFORCE_USE_CALLBACKS) || defined(__DOXYGEN__) |
| 252 | # define CAN_ENFORCE_USE_CALLBACKS FALSE | 252 | #define CAN_ENFORCE_USE_CALLBACKS FALSE |
| 253 | # endif | 253 | #endif |
| 254 | 254 | ||
| 255 | /*===========================================================================*/ | 255 | /*===========================================================================*/ |
| 256 | /* CRY driver related settings. */ | 256 | /* CRY driver related settings. */ |
| @@ -263,16 +263,16 @@ | |||
| 263 | * hardware. | 263 | * hardware. |
| 264 | * @note Fall-back implementations may not be present for all algorithms. | 264 | * @note Fall-back implementations may not be present for all algorithms. |
| 265 | */ | 265 | */ |
| 266 | # if !defined(HAL_CRY_USE_FALLBACK) || defined(__DOXYGEN__) | 266 | #if !defined(HAL_CRY_USE_FALLBACK) || defined(__DOXYGEN__) |
| 267 | # define HAL_CRY_USE_FALLBACK FALSE | 267 | #define HAL_CRY_USE_FALLBACK FALSE |
| 268 | # endif | 268 | #endif |
| 269 | 269 | ||
| 270 | /** | 270 | /** |
| 271 | * @brief Makes the driver forcibly use the fall-back implementations. | 271 | * @brief Makes the driver forcibly use the fall-back implementations. |
| 272 | */ | 272 | */ |
| 273 | # if !defined(HAL_CRY_ENFORCE_FALLBACK) || defined(__DOXYGEN__) | 273 | #if !defined(HAL_CRY_ENFORCE_FALLBACK) || defined(__DOXYGEN__) |
| 274 | # define HAL_CRY_ENFORCE_FALLBACK FALSE | 274 | #define HAL_CRY_ENFORCE_FALLBACK FALSE |
| 275 | # endif | 275 | #endif |
| 276 | 276 | ||
| 277 | /*===========================================================================*/ | 277 | /*===========================================================================*/ |
| 278 | /* DAC driver related settings. */ | 278 | /* DAC driver related settings. */ |
| @@ -282,17 +282,17 @@ | |||
| 282 | * @brief Enables synchronous APIs. | 282 | * @brief Enables synchronous APIs. |
| 283 | * @note Disabling this option saves both code and data space. | 283 | * @note Disabling this option saves both code and data space. |
| 284 | */ | 284 | */ |
| 285 | # if !defined(DAC_USE_WAIT) || defined(__DOXYGEN__) | 285 | #if !defined(DAC_USE_WAIT) || defined(__DOXYGEN__) |
| 286 | # define DAC_USE_WAIT TRUE | 286 | #define DAC_USE_WAIT TRUE |
| 287 | # endif | 287 | #endif |
| 288 | 288 | ||
| 289 | /** | 289 | /** |
| 290 | * @brief Enables the @p dacAcquireBus() and @p dacReleaseBus() APIs. | 290 | * @brief Enables the @p dacAcquireBus() and @p dacReleaseBus() APIs. |
| 291 | * @note Disabling this option saves both code and data space. | 291 | * @note Disabling this option saves both code and data space. |
| 292 | */ | 292 | */ |
| 293 | # if !defined(DAC_USE_MUTUAL_EXCLUSION) || defined(__DOXYGEN__) | 293 | #if !defined(DAC_USE_MUTUAL_EXCLUSION) || defined(__DOXYGEN__) |
| 294 | # define DAC_USE_MUTUAL_EXCLUSION TRUE | 294 | #define DAC_USE_MUTUAL_EXCLUSION TRUE |
| 295 | # endif | 295 | #endif |
| 296 | 296 | ||
| 297 | /*===========================================================================*/ | 297 | /*===========================================================================*/ |
| 298 | /* I2C driver related settings. */ | 298 | /* I2C driver related settings. */ |
| @@ -301,9 +301,9 @@ | |||
| 301 | /** | 301 | /** |
| 302 | * @brief Enables the mutual exclusion APIs on the I2C bus. | 302 | * @brief Enables the mutual exclusion APIs on the I2C bus. |
| 303 | */ | 303 | */ |
| 304 | # if !defined(I2C_USE_MUTUAL_EXCLUSION) || defined(__DOXYGEN__) | 304 | #if !defined(I2C_USE_MUTUAL_EXCLUSION) || defined(__DOXYGEN__) |
| 305 | # define I2C_USE_MUTUAL_EXCLUSION TRUE | 305 | #define I2C_USE_MUTUAL_EXCLUSION TRUE |
| 306 | # endif | 306 | #endif |
| 307 | 307 | ||
| 308 | /*===========================================================================*/ | 308 | /*===========================================================================*/ |
| 309 | /* MAC driver related settings. */ | 309 | /* MAC driver related settings. */ |
| @@ -312,16 +312,16 @@ | |||
| 312 | /** | 312 | /** |
| 313 | * @brief Enables the zero-copy API. | 313 | * @brief Enables the zero-copy API. |
| 314 | */ | 314 | */ |
| 315 | # if !defined(MAC_USE_ZERO_COPY) || defined(__DOXYGEN__) | 315 | #if !defined(MAC_USE_ZERO_COPY) || defined(__DOXYGEN__) |
| 316 | # define MAC_USE_ZERO_COPY FALSE | 316 | #define MAC_USE_ZERO_COPY FALSE |
| 317 | # endif | 317 | #endif |
| 318 | 318 | ||
| 319 | /** | 319 | /** |
| 320 | * @brief Enables an event sources for incoming packets. | 320 | * @brief Enables an event sources for incoming packets. |
| 321 | */ | 321 | */ |
| 322 | # if !defined(MAC_USE_EVENTS) || defined(__DOXYGEN__) | 322 | #if !defined(MAC_USE_EVENTS) || defined(__DOXYGEN__) |
| 323 | # define MAC_USE_EVENTS TRUE | 323 | #define MAC_USE_EVENTS TRUE |
| 324 | # endif | 324 | #endif |
| 325 | 325 | ||
| 326 | /*===========================================================================*/ | 326 | /*===========================================================================*/ |
| 327 | /* MMC_SPI driver related settings. */ | 327 | /* MMC_SPI driver related settings. */ |
| @@ -335,9 +335,9 @@ | |||
| 335 | * This option is recommended also if the SPI driver does not | 335 | * This option is recommended also if the SPI driver does not |
| 336 | * use a DMA channel and heavily loads the CPU. | 336 | * use a DMA channel and heavily loads the CPU. |
| 337 | */ | 337 | */ |
| 338 | # if !defined(MMC_NICE_WAITING) || defined(__DOXYGEN__) | 338 | #if !defined(MMC_NICE_WAITING) || defined(__DOXYGEN__) |
| 339 | # define MMC_NICE_WAITING TRUE | 339 | #define MMC_NICE_WAITING TRUE |
| 340 | # endif | 340 | #endif |
| 341 | 341 | ||
| 342 | /*===========================================================================*/ | 342 | /*===========================================================================*/ |
| 343 | /* SDC driver related settings. */ | 343 | /* SDC driver related settings. */ |
| @@ -347,18 +347,18 @@ | |||
| 347 | * @brief Number of initialization attempts before rejecting the card. | 347 | * @brief Number of initialization attempts before rejecting the card. |
| 348 | * @note Attempts are performed at 10mS intervals. | 348 | * @note Attempts are performed at 10mS intervals. |
| 349 | */ | 349 | */ |
| 350 | # if !defined(SDC_INIT_RETRY) || defined(__DOXYGEN__) | 350 | #if !defined(SDC_INIT_RETRY) || defined(__DOXYGEN__) |
| 351 | # define SDC_INIT_RETRY 100 | 351 | #define SDC_INIT_RETRY 100 |
| 352 | # endif | 352 | #endif |
| 353 | 353 | ||
| 354 | /** | 354 | /** |
| 355 | * @brief Include support for MMC cards. | 355 | * @brief Include support for MMC cards. |
| 356 | * @note MMC support is not yet implemented so this option must be kept | 356 | * @note MMC support is not yet implemented so this option must be kept |
| 357 | * at @p FALSE. | 357 | * at @p FALSE. |
| 358 | */ | 358 | */ |
| 359 | # if !defined(SDC_MMC_SUPPORT) || defined(__DOXYGEN__) | 359 | #if !defined(SDC_MMC_SUPPORT) || defined(__DOXYGEN__) |
| 360 | # define SDC_MMC_SUPPORT FALSE | 360 | #define SDC_MMC_SUPPORT FALSE |
| 361 | # endif | 361 | #endif |
| 362 | 362 | ||
| 363 | /** | 363 | /** |
| 364 | * @brief Delays insertions. | 364 | * @brief Delays insertions. |
| @@ -366,23 +366,23 @@ | |||
| 366 | * routines releasing some extra CPU time for the threads with | 366 | * routines releasing some extra CPU time for the threads with |
| 367 | * lower priority, this may slow down the driver a bit however. | 367 | * lower priority, this may slow down the driver a bit however. |
| 368 | */ | 368 | */ |
| 369 | # if !defined(SDC_NICE_WAITING) || defined(__DOXYGEN__) | 369 | #if !defined(SDC_NICE_WAITING) || defined(__DOXYGEN__) |
| 370 | # define SDC_NICE_WAITING TRUE | 370 | #define SDC_NICE_WAITING TRUE |
| 371 | # endif | 371 | #endif |
| 372 | 372 | ||
| 373 | /** | 373 | /** |
| 374 | * @brief OCR initialization constant for V20 cards. | 374 | * @brief OCR initialization constant for V20 cards. |
| 375 | */ | 375 | */ |
| 376 | # if !defined(SDC_INIT_OCR_V20) || defined(__DOXYGEN__) | 376 | #if !defined(SDC_INIT_OCR_V20) || defined(__DOXYGEN__) |
| 377 | # define SDC_INIT_OCR_V20 0x50FF8000U | 377 | #define SDC_INIT_OCR_V20 0x50FF8000U |
| 378 | # endif | 378 | #endif |
| 379 | 379 | ||
| 380 | /** | 380 | /** |
| 381 | * @brief OCR initialization constant for non-V20 cards. | 381 | * @brief OCR initialization constant for non-V20 cards. |
| 382 | */ | 382 | */ |
| 383 | # if !defined(SDC_INIT_OCR) || defined(__DOXYGEN__) | 383 | #if !defined(SDC_INIT_OCR) || defined(__DOXYGEN__) |
| 384 | # define SDC_INIT_OCR 0x80100000U | 384 | #define SDC_INIT_OCR 0x80100000U |
| 385 | # endif | 385 | #endif |
| 386 | 386 | ||
| 387 | /*===========================================================================*/ | 387 | /*===========================================================================*/ |
| 388 | /* SERIAL driver related settings. */ | 388 | /* SERIAL driver related settings. */ |
| @@ -393,9 +393,9 @@ | |||
| 393 | * @details Configuration parameter, this is the baud rate selected for the | 393 | * @details Configuration parameter, this is the baud rate selected for the |
| 394 | * default configuration. | 394 | * default configuration. |
| 395 | */ | 395 | */ |
| 396 | # if !defined(SERIAL_DEFAULT_BITRATE) || defined(__DOXYGEN__) | 396 | #if !defined(SERIAL_DEFAULT_BITRATE) || defined(__DOXYGEN__) |
| 397 | # define SERIAL_DEFAULT_BITRATE 38400 | 397 | #define SERIAL_DEFAULT_BITRATE 38400 |
| 398 | # endif | 398 | #endif |
| 399 | 399 | ||
| 400 | /** | 400 | /** |
| 401 | * @brief Serial buffers size. | 401 | * @brief Serial buffers size. |
| @@ -404,9 +404,9 @@ | |||
| 404 | * @note The default is 16 bytes for both the transmission and receive | 404 | * @note The default is 16 bytes for both the transmission and receive |
| 405 | * buffers. | 405 | * buffers. |
| 406 | */ | 406 | */ |
| 407 | # if !defined(SERIAL_BUFFERS_SIZE) || defined(__DOXYGEN__) | 407 | #if !defined(SERIAL_BUFFERS_SIZE) || defined(__DOXYGEN__) |
| 408 | # define SERIAL_BUFFERS_SIZE 16 | 408 | #define SERIAL_BUFFERS_SIZE 16 |
| 409 | # endif | 409 | #endif |
| 410 | 410 | ||
| 411 | /*===========================================================================*/ | 411 | /*===========================================================================*/ |
| 412 | /* SERIAL_USB driver related setting. */ | 412 | /* SERIAL_USB driver related setting. */ |
| @@ -419,17 +419,17 @@ | |||
| 419 | * @note The default is 256 bytes for both the transmission and receive | 419 | * @note The default is 256 bytes for both the transmission and receive |
| 420 | * buffers. | 420 | * buffers. |
| 421 | */ | 421 | */ |
| 422 | # if !defined(SERIAL_USB_BUFFERS_SIZE) || defined(__DOXYGEN__) | 422 | #if !defined(SERIAL_USB_BUFFERS_SIZE) || defined(__DOXYGEN__) |
| 423 | # define SERIAL_USB_BUFFERS_SIZE 1 | 423 | #define SERIAL_USB_BUFFERS_SIZE 1 |
| 424 | # endif | 424 | #endif |
| 425 | 425 | ||
| 426 | /** | 426 | /** |
| 427 | * @brief Serial over USB number of buffers. | 427 | * @brief Serial over USB number of buffers. |
| 428 | * @note The default is 2 buffers. | 428 | * @note The default is 2 buffers. |
| 429 | */ | 429 | */ |
| 430 | # if !defined(SERIAL_USB_BUFFERS_NUMBER) || defined(__DOXYGEN__) | 430 | #if !defined(SERIAL_USB_BUFFERS_NUMBER) || defined(__DOXYGEN__) |
| 431 | # define SERIAL_USB_BUFFERS_NUMBER 2 | 431 | #define SERIAL_USB_BUFFERS_NUMBER 2 |
| 432 | # endif | 432 | #endif |
| 433 | 433 | ||
| 434 | /*===========================================================================*/ | 434 | /*===========================================================================*/ |
| 435 | /* SPI driver related settings. */ | 435 | /* SPI driver related settings. */ |
| @@ -439,33 +439,34 @@ | |||
| 439 | * @brief Enables synchronous APIs. | 439 | * @brief Enables synchronous APIs. |
| 440 | * @note Disabling this option saves both code and data space. | 440 | * @note Disabling this option saves both code and data space. |
| 441 | */ | 441 | */ |
| 442 | # if !defined(SPI_USE_WAIT) || defined(__DOXYGEN__) | 442 | #if !defined(SPI_USE_WAIT) || defined(__DOXYGEN__) |
| 443 | # define SPI_USE_WAIT TRUE | 443 | #define SPI_USE_WAIT TRUE |
| 444 | # endif | 444 | #endif |
| 445 | 445 | ||
| 446 | /** | 446 | /** |
| 447 | * @brief Enables circular transfers APIs. | 447 | * @brief Enables circular transfers APIs. |
| 448 | * @note Disabling this option saves both code and data space. | 448 | * @note Disabling this option saves both code and data space. |
| 449 | */ | 449 | */ |
| 450 | # if !defined(SPI_USE_CIRCULAR) || defined(__DOXYGEN__) | 450 | #if !defined(SPI_USE_CIRCULAR) || defined(__DOXYGEN__) |
| 451 | # define SPI_USE_CIRCULAR FALSE | 451 | #define SPI_USE_CIRCULAR FALSE |
| 452 | # endif | 452 | #endif |
| 453 | |||
| 453 | 454 | ||
| 454 | /** | 455 | /** |
| 455 | * @brief Enables the @p spiAcquireBus() and @p spiReleaseBus() APIs. | 456 | * @brief Enables the @p spiAcquireBus() and @p spiReleaseBus() APIs. |
| 456 | * @note Disabling this option saves both code and data space. | 457 | * @note Disabling this option saves both code and data space. |
| 457 | */ | 458 | */ |
| 458 | # if !defined(SPI_USE_MUTUAL_EXCLUSION) || defined(__DOXYGEN__) | 459 | #if !defined(SPI_USE_MUTUAL_EXCLUSION) || defined(__DOXYGEN__) |
| 459 | # define SPI_USE_MUTUAL_EXCLUSION TRUE | 460 | #define SPI_USE_MUTUAL_EXCLUSION TRUE |
| 460 | # endif | 461 | #endif |
| 461 | 462 | ||
| 462 | /** | 463 | /** |
| 463 | * @brief Handling method for SPI CS line. | 464 | * @brief Handling method for SPI CS line. |
| 464 | * @note Disabling this option saves both code and data space. | 465 | * @note Disabling this option saves both code and data space. |
| 465 | */ | 466 | */ |
| 466 | # if !defined(SPI_SELECT_MODE) || defined(__DOXYGEN__) | 467 | #if !defined(SPI_SELECT_MODE) || defined(__DOXYGEN__) |
| 467 | # define SPI_SELECT_MODE SPI_SELECT_MODE_PAD | 468 | #define SPI_SELECT_MODE SPI_SELECT_MODE_PAD |
| 468 | # endif | 469 | #endif |
| 469 | 470 | ||
| 470 | /*===========================================================================*/ | 471 | /*===========================================================================*/ |
| 471 | /* UART driver related settings. */ | 472 | /* UART driver related settings. */ |
| @@ -475,17 +476,17 @@ | |||
| 475 | * @brief Enables synchronous APIs. | 476 | * @brief Enables synchronous APIs. |
| 476 | * @note Disabling this option saves both code and data space. | 477 | * @note Disabling this option saves both code and data space. |
| 477 | */ | 478 | */ |
| 478 | # if !defined(UART_USE_WAIT) || defined(__DOXYGEN__) | 479 | #if !defined(UART_USE_WAIT) || defined(__DOXYGEN__) |
| 479 | # define UART_USE_WAIT FALSE | 480 | #define UART_USE_WAIT FALSE |
| 480 | # endif | 481 | #endif |
| 481 | 482 | ||
| 482 | /** | 483 | /** |
| 483 | * @brief Enables the @p uartAcquireBus() and @p uartReleaseBus() APIs. | 484 | * @brief Enables the @p uartAcquireBus() and @p uartReleaseBus() APIs. |
| 484 | * @note Disabling this option saves both code and data space. | 485 | * @note Disabling this option saves both code and data space. |
| 485 | */ | 486 | */ |
| 486 | # if !defined(UART_USE_MUTUAL_EXCLUSION) || defined(__DOXYGEN__) | 487 | #if !defined(UART_USE_MUTUAL_EXCLUSION) || defined(__DOXYGEN__) |
| 487 | # define UART_USE_MUTUAL_EXCLUSION FALSE | 488 | #define UART_USE_MUTUAL_EXCLUSION FALSE |
| 488 | # endif | 489 | #endif |
| 489 | 490 | ||
| 490 | /*===========================================================================*/ | 491 | /*===========================================================================*/ |
| 491 | /* USB driver related settings. */ | 492 | /* USB driver related settings. */ |
| @@ -495,9 +496,9 @@ | |||
| 495 | * @brief Enables synchronous APIs. | 496 | * @brief Enables synchronous APIs. |
| 496 | * @note Disabling this option saves both code and data space. | 497 | * @note Disabling this option saves both code and data space. |
| 497 | */ | 498 | */ |
| 498 | # if !defined(USB_USE_WAIT) || defined(__DOXYGEN__) | 499 | #if !defined(USB_USE_WAIT) || defined(__DOXYGEN__) |
| 499 | # define USB_USE_WAIT TRUE | 500 | #define USB_USE_WAIT TRUE |
| 500 | # endif | 501 | #endif |
| 501 | 502 | ||
| 502 | /*===========================================================================*/ | 503 | /*===========================================================================*/ |
| 503 | /* WSPI driver related settings. */ | 504 | /* WSPI driver related settings. */ |
| @@ -507,17 +508,17 @@ | |||
| 507 | * @brief Enables synchronous APIs. | 508 | * @brief Enables synchronous APIs. |
| 508 | * @note Disabling this option saves both code and data space. | 509 | * @note Disabling this option saves both code and data space. |
| 509 | */ | 510 | */ |
| 510 | # if !defined(WSPI_USE_WAIT) || defined(__DOXYGEN__) | 511 | #if !defined(WSPI_USE_WAIT) || defined(__DOXYGEN__) |
| 511 | # define WSPI_USE_WAIT TRUE | 512 | #define WSPI_USE_WAIT TRUE |
| 512 | # endif | 513 | #endif |
| 513 | 514 | ||
| 514 | /** | 515 | /** |
| 515 | * @brief Enables the @p wspiAcquireBus() and @p wspiReleaseBus() APIs. | 516 | * @brief Enables the @p wspiAcquireBus() and @p wspiReleaseBus() APIs. |
| 516 | * @note Disabling this option saves both code and data space. | 517 | * @note Disabling this option saves both code and data space. |
| 517 | */ | 518 | */ |
| 518 | # if !defined(WSPI_USE_MUTUAL_EXCLUSION) || defined(__DOXYGEN__) | 519 | #if !defined(WSPI_USE_MUTUAL_EXCLUSION) || defined(__DOXYGEN__) |
| 519 | # define WSPI_USE_MUTUAL_EXCLUSION TRUE | 520 | #define WSPI_USE_MUTUAL_EXCLUSION TRUE |
| 520 | # endif | 521 | #endif |
| 521 | 522 | ||
| 522 | #endif /* HALCONF_H */ | 523 | #endif /* HALCONF_H */ |
| 523 | 524 | ||
diff --git a/platforms/chibios/GENERIC_STM32_F303XC/configs/mcuconf.h b/platforms/chibios/GENERIC_STM32_F303XC/configs/mcuconf.h new file mode 100644 index 000000000..3b1588348 --- /dev/null +++ b/platforms/chibios/GENERIC_STM32_F303XC/configs/mcuconf.h | |||
| @@ -0,0 +1,273 @@ | |||
| 1 | /* | ||
| 2 | ChibiOS - Copyright (C) 2006..2018 Giovanni Di Sirio | ||
| 3 | |||
| 4 | Licensed under the Apache License, Version 2.0 (the "License"); | ||
| 5 | you may not use this file except in compliance with the License. | ||
| 6 | You may obtain a copy of the License at | ||
| 7 | |||
| 8 | http://www.apache.org/licenses/LICENSE-2.0 | ||
| 9 | |||
| 10 | Unless required by applicable law or agreed to in writing, software | ||
| 11 | distributed under the License is distributed on an "AS IS" BASIS, | ||
| 12 | WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. | ||
| 13 | See the License for the specific language governing permissions and | ||
| 14 | limitations under the License. | ||
| 15 | */ | ||
| 16 | |||
| 17 | #ifndef MCUCONF_H | ||
| 18 | #define MCUCONF_H | ||
| 19 | |||
| 20 | /* | ||
| 21 | * STM32F3xx drivers configuration. | ||
| 22 | * The following settings override the default settings present in | ||
| 23 | * the various device driver implementation headers. | ||
| 24 | * Note that the settings for each driver only have effect if the whole | ||
| 25 | * driver is enabled in halconf.h. | ||
| 26 | * | ||
| 27 | * IRQ priorities: | ||
| 28 | * 15...0 Lowest...Highest. | ||
| 29 | * | ||
| 30 | * DMA priorities: | ||
| 31 | * 0...3 Lowest...Highest. | ||
| 32 | */ | ||
| 33 | |||
| 34 | #define STM32F3xx_MCUCONF | ||
| 35 | #define STM32F303_MCUCONF | ||
| 36 | |||
| 37 | /* | ||
| 38 | * HAL driver system settings. | ||
| 39 | */ | ||
| 40 | #define STM32_NO_INIT FALSE | ||
| 41 | #define STM32_PVD_ENABLE FALSE | ||
| 42 | #define STM32_PLS STM32_PLS_LEV0 | ||
| 43 | #define STM32_HSI_ENABLED TRUE | ||
| 44 | #define STM32_LSI_ENABLED TRUE | ||
| 45 | #define STM32_HSE_ENABLED TRUE | ||
| 46 | #define STM32_LSE_ENABLED FALSE | ||
| 47 | #define STM32_SW STM32_SW_PLL | ||
| 48 | #define STM32_PLLSRC STM32_PLLSRC_HSE | ||
| 49 | #define STM32_PREDIV_VALUE 1 | ||
| 50 | #define STM32_PLLMUL_VALUE 9 | ||
| 51 | #define STM32_HPRE STM32_HPRE_DIV1 | ||
| 52 | #define STM32_PPRE1 STM32_PPRE1_DIV2 | ||
| 53 | #define STM32_PPRE2 STM32_PPRE2_DIV2 | ||
| 54 | #define STM32_MCOSEL STM32_MCOSEL_NOCLOCK | ||
| 55 | #define STM32_ADC12PRES STM32_ADC12PRES_DIV1 | ||
| 56 | #define STM32_ADC34PRES STM32_ADC34PRES_DIV1 | ||
| 57 | #define STM32_USART1SW STM32_USART1SW_PCLK | ||
| 58 | #define STM32_USART2SW STM32_USART2SW_PCLK | ||
| 59 | #define STM32_USART3SW STM32_USART3SW_PCLK | ||
| 60 | #define STM32_UART4SW STM32_UART4SW_PCLK | ||
| 61 | #define STM32_UART5SW STM32_UART5SW_PCLK | ||
| 62 | #define STM32_I2C1SW STM32_I2C1SW_SYSCLK | ||
| 63 | #define STM32_I2C2SW STM32_I2C2SW_SYSCLK | ||
| 64 | #define STM32_TIM1SW STM32_TIM1SW_PCLK2 | ||
| 65 | #define STM32_TIM8SW STM32_TIM8SW_PCLK2 | ||
| 66 | #define STM32_RTCSEL STM32_RTCSEL_LSI | ||
| 67 | #define STM32_USB_CLOCK_REQUIRED TRUE | ||
| 68 | #define STM32_USBPRE STM32_USBPRE_DIV1P5 | ||
| 69 | |||
| 70 | /* | ||
| 71 | * IRQ system settings. | ||
| 72 | */ | ||
| 73 | #define STM32_IRQ_EXTI0_PRIORITY 6 | ||
| 74 | #define STM32_IRQ_EXTI1_PRIORITY 6 | ||
| 75 | #define STM32_IRQ_EXTI2_PRIORITY 6 | ||
| 76 | #define STM32_IRQ_EXTI3_PRIORITY 6 | ||
| 77 | #define STM32_IRQ_EXTI4_PRIORITY 6 | ||
| 78 | #define STM32_IRQ_EXTI5_9_PRIORITY 6 | ||
| 79 | #define STM32_IRQ_EXTI10_15_PRIORITY 6 | ||
| 80 | #define STM32_IRQ_EXTI16_PRIORITY 6 | ||
| 81 | #define STM32_IRQ_EXTI17_PRIORITY 15 | ||
| 82 | #define STM32_IRQ_EXTI18_PRIORITY 6 | ||
| 83 | #define STM32_IRQ_EXTI19_PRIORITY 15 | ||
| 84 | #define STM32_IRQ_EXTI20_PRIORITY 15 | ||
| 85 | #define STM32_IRQ_EXTI21_22_29_PRIORITY 6 | ||
| 86 | #define STM32_IRQ_EXTI30_32_PRIORITY 6 | ||
| 87 | #define STM32_IRQ_EXTI33_PRIORITY 6 | ||
| 88 | #define STM32_IRQ_TIM1_BRK_TIM15_PRIORITY 7 | ||
| 89 | #define STM32_IRQ_TIM1_UP_TIM16_PRIORITY 7 | ||
| 90 | #define STM32_IRQ_TIM1_TRGCO_TIM17_PRIORITY 7 | ||
| 91 | #define STM32_IRQ_TIM1_CC_PRIORITY 7 | ||
| 92 | |||
| 93 | /* | ||
| 94 | * ADC driver system settings. | ||
| 95 | */ | ||
| 96 | #define STM32_ADC_DUAL_MODE FALSE | ||
| 97 | #define STM32_ADC_COMPACT_SAMPLES FALSE | ||
| 98 | #define STM32_ADC_USE_ADC1 FALSE | ||
| 99 | #define STM32_ADC_USE_ADC2 FALSE | ||
| 100 | #define STM32_ADC_USE_ADC3 FALSE | ||
| 101 | #define STM32_ADC_USE_ADC4 FALSE | ||
| 102 | #define STM32_ADC_ADC1_DMA_STREAM STM32_DMA_STREAM_ID(1, 1) | ||
| 103 | #define STM32_ADC_ADC2_DMA_STREAM STM32_DMA_STREAM_ID(2, 1) | ||
| 104 | #define STM32_ADC_ADC3_DMA_STREAM STM32_DMA_STREAM_ID(2, 5) | ||
| 105 | #define STM32_ADC_ADC4_DMA_STREAM STM32_DMA_STREAM_ID(2, 2) | ||
| 106 | #define STM32_ADC_ADC1_DMA_PRIORITY 2 | ||
| 107 | #define STM32_ADC_ADC2_DMA_PRIORITY 2 | ||
| 108 | #define STM32_ADC_ADC3_DMA_PRIORITY 2 | ||
| 109 | #define STM32_ADC_ADC4_DMA_PRIORITY 2 | ||
| 110 | #define STM32_ADC_ADC12_IRQ_PRIORITY 5 | ||
| 111 | #define STM32_ADC_ADC3_IRQ_PRIORITY 5 | ||
| 112 | #define STM32_ADC_ADC4_IRQ_PRIORITY 5 | ||
| 113 | #define STM32_ADC_ADC1_DMA_IRQ_PRIORITY 5 | ||
| 114 | #define STM32_ADC_ADC2_DMA_IRQ_PRIORITY 5 | ||
| 115 | #define STM32_ADC_ADC3_DMA_IRQ_PRIORITY 5 | ||
| 116 | #define STM32_ADC_ADC4_DMA_IRQ_PRIORITY 5 | ||
| 117 | #define STM32_ADC_ADC12_CLOCK_MODE ADC_CCR_CKMODE_AHB_DIV1 | ||
| 118 | #define STM32_ADC_ADC34_CLOCK_MODE ADC_CCR_CKMODE_AHB_DIV1 | ||
| 119 | |||
| 120 | /* | ||
| 121 | * CAN driver system settings. | ||
| 122 | */ | ||
| 123 | #define STM32_CAN_USE_CAN1 FALSE | ||
| 124 | #define STM32_CAN_CAN1_IRQ_PRIORITY 11 | ||
| 125 | |||
| 126 | /* | ||
| 127 | * DAC driver system settings. | ||
| 128 | */ | ||
| 129 | #define STM32_DAC_DUAL_MODE FALSE | ||
| 130 | #define STM32_DAC_USE_DAC1_CH1 TRUE | ||
| 131 | #define STM32_DAC_USE_DAC1_CH2 TRUE | ||
| 132 | #define STM32_DAC_DAC1_CH1_IRQ_PRIORITY 10 | ||
| 133 | #define STM32_DAC_DAC1_CH2_IRQ_PRIORITY 10 | ||
| 134 | #define STM32_DAC_DAC1_CH1_DMA_PRIORITY 2 | ||
| 135 | #define STM32_DAC_DAC1_CH2_DMA_PRIORITY 2 | ||
| 136 | |||
| 137 | /* | ||
| 138 | * GPT driver system settings. | ||
| 139 | */ | ||
| 140 | #define STM32_GPT_USE_TIM1 FALSE | ||
| 141 | #define STM32_GPT_USE_TIM2 FALSE | ||
| 142 | #define STM32_GPT_USE_TIM3 FALSE | ||
| 143 | #define STM32_GPT_USE_TIM4 FALSE | ||
| 144 | #define STM32_GPT_USE_TIM6 TRUE | ||
| 145 | #define STM32_GPT_USE_TIM7 TRUE | ||
| 146 | #define STM32_GPT_USE_TIM8 TRUE | ||
| 147 | #define STM32_GPT_USE_TIM15 FALSE | ||
| 148 | #define STM32_GPT_USE_TIM16 FALSE | ||
| 149 | #define STM32_GPT_USE_TIM17 FALSE | ||
| 150 | #define STM32_GPT_TIM1_IRQ_PRIORITY 7 | ||
| 151 | #define STM32_GPT_TIM2_IRQ_PRIORITY 7 | ||
| 152 | #define STM32_GPT_TIM3_IRQ_PRIORITY 7 | ||
| 153 | #define STM32_GPT_TIM4_IRQ_PRIORITY 7 | ||
| 154 | #define STM32_GPT_TIM6_IRQ_PRIORITY 7 | ||
| 155 | #define STM32_GPT_TIM7_IRQ_PRIORITY 7 | ||
| 156 | #define STM32_GPT_TIM8_IRQ_PRIORITY 7 | ||
| 157 | |||
| 158 | /* | ||
| 159 | * I2C driver system settings. | ||
| 160 | */ | ||
| 161 | #define STM32_I2C_USE_I2C1 TRUE | ||
| 162 | #define STM32_I2C_USE_I2C2 FALSE | ||
| 163 | #define STM32_I2C_BUSY_TIMEOUT 50 | ||
| 164 | #define STM32_I2C_I2C1_IRQ_PRIORITY 10 | ||
| 165 | #define STM32_I2C_I2C2_IRQ_PRIORITY 10 | ||
| 166 | #define STM32_I2C_USE_DMA TRUE | ||
| 167 | #define STM32_I2C_I2C1_DMA_PRIORITY 1 | ||
| 168 | #define STM32_I2C_I2C2_DMA_PRIORITY 1 | ||
| 169 | #define STM32_I2C_DMA_ERROR_HOOK(i2cp) osalSysHalt("DMA failure") | ||
| 170 | |||
| 171 | /* | ||
| 172 | * ICU driver system settings. | ||
| 173 | */ | ||
| 174 | #define STM32_ICU_USE_TIM1 FALSE | ||
| 175 | #define STM32_ICU_USE_TIM2 FALSE | ||
| 176 | #define STM32_ICU_USE_TIM3 FALSE | ||
| 177 | #define STM32_ICU_USE_TIM4 FALSE | ||
| 178 | #define STM32_ICU_USE_TIM8 FALSE | ||
| 179 | #define STM32_ICU_USE_TIM15 FALSE | ||
| 180 | #define STM32_ICU_TIM1_IRQ_PRIORITY 7 | ||
| 181 | #define STM32_ICU_TIM2_IRQ_PRIORITY 7 | ||
| 182 | #define STM32_ICU_TIM3_IRQ_PRIORITY 7 | ||
| 183 | #define STM32_ICU_TIM4_IRQ_PRIORITY 7 | ||
| 184 | #define STM32_ICU_TIM8_IRQ_PRIORITY 7 | ||
| 185 | |||
| 186 | /* | ||
| 187 | * PWM driver system settings. | ||
| 188 | */ | ||
| 189 | #define STM32_PWM_USE_ADVANCED FALSE | ||
| 190 | #define STM32_PWM_USE_TIM1 FALSE | ||
| 191 | #define STM32_PWM_USE_TIM2 FALSE | ||
| 192 | #define STM32_PWM_USE_TIM3 TRUE | ||
| 193 | #define STM32_PWM_USE_TIM4 TRUE | ||
| 194 | #define STM32_PWM_USE_TIM8 FALSE | ||
| 195 | #define STM32_PWM_USE_TIM15 FALSE | ||
| 196 | #define STM32_PWM_USE_TIM16 FALSE | ||
| 197 | #define STM32_PWM_USE_TIM17 FALSE | ||
| 198 | #define STM32_PWM_TIM1_IRQ_PRIORITY 7 | ||
| 199 | #define STM32_PWM_TIM2_IRQ_PRIORITY 7 | ||
| 200 | #define STM32_PWM_TIM3_IRQ_PRIORITY 7 | ||
| 201 | #define STM32_PWM_TIM4_IRQ_PRIORITY 7 | ||
| 202 | #define STM32_PWM_TIM8_IRQ_PRIORITY 7 | ||
| 203 | |||
| 204 | /* | ||
| 205 | * RTC driver system settings. | ||
| 206 | */ | ||
| 207 | #define STM32_RTC_PRESA_VALUE 32 | ||
| 208 | #define STM32_RTC_PRESS_VALUE 1024 | ||
| 209 | #define STM32_RTC_CR_INIT 0 | ||
| 210 | #define STM32_RTC_TAMPCR_INIT 0 | ||
| 211 | |||
| 212 | /* | ||
| 213 | * SERIAL driver system settings. | ||
| 214 | */ | ||
| 215 | #define STM32_SERIAL_USE_USART1 FALSE | ||
| 216 | #define STM32_SERIAL_USE_USART2 TRUE | ||
| 217 | #define STM32_SERIAL_USE_USART3 FALSE | ||
| 218 | #define STM32_SERIAL_USE_UART4 FALSE | ||
| 219 | #define STM32_SERIAL_USE_UART5 FALSE | ||
| 220 | #define STM32_SERIAL_USART1_PRIORITY 12 | ||
| 221 | #define STM32_SERIAL_USART2_PRIORITY 12 | ||
| 222 | #define STM32_SERIAL_USART3_PRIORITY 12 | ||
| 223 | #define STM32_SERIAL_UART4_PRIORITY 12 | ||
| 224 | #define STM32_SERIAL_UART5_PRIORITY 12 | ||
| 225 | |||
| 226 | /* | ||
| 227 | * SPI driver system settings. | ||
| 228 | */ | ||
| 229 | #define STM32_SPI_USE_SPI1 FALSE | ||
| 230 | #define STM32_SPI_USE_SPI2 TRUE | ||
| 231 | #define STM32_SPI_USE_SPI3 FALSE | ||
| 232 | #define STM32_SPI_SPI1_DMA_PRIORITY 1 | ||
| 233 | #define STM32_SPI_SPI2_DMA_PRIORITY 1 | ||
| 234 | #define STM32_SPI_SPI3_DMA_PRIORITY 1 | ||
| 235 | #define STM32_SPI_SPI1_IRQ_PRIORITY 10 | ||
| 236 | #define STM32_SPI_SPI2_IRQ_PRIORITY 10 | ||
| 237 | #define STM32_SPI_SPI3_IRQ_PRIORITY 10 | ||
| 238 | #define STM32_SPI_DMA_ERROR_HOOK(spip) osalSysHalt("DMA failure") | ||
| 239 | |||
| 240 | /* | ||
| 241 | * ST driver system settings. | ||
| 242 | */ | ||
| 243 | #define STM32_ST_IRQ_PRIORITY 8 | ||
| 244 | #define STM32_ST_USE_TIMER 2 | ||
| 245 | |||
| 246 | /* | ||
| 247 | * UART driver system settings. | ||
| 248 | */ | ||
| 249 | #define STM32_UART_USE_USART1 FALSE | ||
| 250 | #define STM32_UART_USE_USART2 FALSE | ||
| 251 | #define STM32_UART_USE_USART3 FALSE | ||
| 252 | #define STM32_UART_USART1_IRQ_PRIORITY 12 | ||
| 253 | #define STM32_UART_USART2_IRQ_PRIORITY 12 | ||
| 254 | #define STM32_UART_USART3_IRQ_PRIORITY 12 | ||
| 255 | #define STM32_UART_USART1_DMA_PRIORITY 0 | ||
| 256 | #define STM32_UART_USART2_DMA_PRIORITY 0 | ||
| 257 | #define STM32_UART_USART3_DMA_PRIORITY 0 | ||
| 258 | #define STM32_UART_DMA_ERROR_HOOK(uartp) osalSysHalt("DMA failure") | ||
| 259 | |||
| 260 | /* | ||
| 261 | * USB driver system settings. | ||
| 262 | */ | ||
| 263 | #define STM32_USB_USE_USB1 TRUE | ||
| 264 | #define STM32_USB_LOW_POWER_ON_SUSPEND FALSE | ||
| 265 | #define STM32_USB_USB1_HP_IRQ_PRIORITY 13 | ||
| 266 | #define STM32_USB_USB1_LP_IRQ_PRIORITY 14 | ||
| 267 | |||
| 268 | /* | ||
| 269 | * WDG driver system settings. | ||
| 270 | */ | ||
| 271 | #define STM32_WDG_USE_IWDG FALSE | ||
| 272 | |||
| 273 | #endif /* MCUCONF_H */ | ||
diff --git a/platforms/chibios/GENERIC_STM32_F303XC/configs/proton_c.mk b/platforms/chibios/GENERIC_STM32_F303XC/configs/proton_c.mk new file mode 100644 index 000000000..23907c810 --- /dev/null +++ b/platforms/chibios/GENERIC_STM32_F303XC/configs/proton_c.mk | |||
| @@ -0,0 +1,9 @@ | |||
| 1 | # Proton C MCU settings for converting AVR projects | ||
| 2 | MCU = STM32F303 | ||
| 3 | |||
| 4 | # These are defaults based on what has been implemented for ARM boards | ||
| 5 | AUDIO_ENABLE = yes | ||
| 6 | WS2812_DRIVER = bitbang | ||
| 7 | |||
| 8 | # Force task driven PWM until ARM can provide automatic configuration | ||
| 9 | BACKLIGHT_DRIVER = software | ||
diff --git a/drivers/boards/IC_TEENSY_3_1/board.c b/platforms/chibios/IC_TEENSY_3_1/board/board.c index 63e3f6492..63e3f6492 100644 --- a/drivers/boards/IC_TEENSY_3_1/board.c +++ b/platforms/chibios/IC_TEENSY_3_1/board/board.c | |||
diff --git a/drivers/boards/IC_TEENSY_3_1/board.h b/platforms/chibios/IC_TEENSY_3_1/board/board.h index c8259ab0c..c8259ab0c 100644 --- a/drivers/boards/IC_TEENSY_3_1/board.h +++ b/platforms/chibios/IC_TEENSY_3_1/board/board.h | |||
diff --git a/platforms/chibios/IC_TEENSY_3_1/board/board.mk b/platforms/chibios/IC_TEENSY_3_1/board/board.mk new file mode 100644 index 000000000..842e33590 --- /dev/null +++ b/platforms/chibios/IC_TEENSY_3_1/board/board.mk | |||
| @@ -0,0 +1,9 @@ | |||
| 1 | # List of all the board related files. | ||
| 2 | BOARDSRC = $(BOARD_PATH)/board/board.c | ||
| 3 | |||
| 4 | # Required include directories | ||
| 5 | BOARDINC = $(BOARD_PATH)/board | ||
| 6 | |||
| 7 | # Shared variables | ||
| 8 | ALLCSRC += $(BOARDSRC) | ||
| 9 | ALLINC += $(BOARDINC) | ||
diff --git a/drivers/boards/STM32_F103_STM32DUINO/board.c b/platforms/chibios/STM32_F103_STM32DUINO/board/board.c index 8c5a87f35..9135f6136 100644 --- a/drivers/boards/STM32_F103_STM32DUINO/board.c +++ b/platforms/chibios/STM32_F103_STM32DUINO/board/board.c | |||
| @@ -35,12 +35,15 @@ const PALConfig pal_default_config = | |||
| 35 | }; | 35 | }; |
| 36 | #endif | 36 | #endif |
| 37 | 37 | ||
| 38 | __attribute__((weak)) void enter_bootloader_mode_if_requested(void) {} | ||
| 39 | |||
| 38 | /* | 40 | /* |
| 39 | * Early initialization code. | 41 | * Early initialization code. |
| 40 | * This initialization must be performed just after stack setup and before | 42 | * This initialization must be performed just after stack setup and before |
| 41 | * any other initialization. | 43 | * any other initialization. |
| 42 | */ | 44 | */ |
| 43 | void __early_init(void) { | 45 | void __early_init(void) { |
| 46 | enter_bootloader_mode_if_requested(); | ||
| 44 | 47 | ||
| 45 | stm32_clock_init(); | 48 | stm32_clock_init(); |
| 46 | } | 49 | } |
diff --git a/drivers/boards/STM32_F103_STM32DUINO/board.h b/platforms/chibios/STM32_F103_STM32DUINO/board/board.h index 09d182d6c..09d182d6c 100644 --- a/drivers/boards/STM32_F103_STM32DUINO/board.h +++ b/platforms/chibios/STM32_F103_STM32DUINO/board/board.h | |||
diff --git a/platforms/chibios/STM32_F103_STM32DUINO/board/board.mk b/platforms/chibios/STM32_F103_STM32DUINO/board/board.mk new file mode 100644 index 000000000..842e33590 --- /dev/null +++ b/platforms/chibios/STM32_F103_STM32DUINO/board/board.mk | |||
| @@ -0,0 +1,9 @@ | |||
| 1 | # List of all the board related files. | ||
| 2 | BOARDSRC = $(BOARD_PATH)/board/board.c | ||
| 3 | |||
| 4 | # Required include directories | ||
| 5 | BOARDINC = $(BOARD_PATH)/board | ||
| 6 | |||
| 7 | # Shared variables | ||
| 8 | ALLCSRC += $(BOARDSRC) | ||
| 9 | ALLINC += $(BOARDINC) | ||
diff --git a/platforms/chibios/keyboard-config-templates/board.h b/platforms/chibios/keyboard-config-templates/board.h new file mode 100644 index 000000000..967ec13a1 --- /dev/null +++ b/platforms/chibios/keyboard-config-templates/board.h | |||
| @@ -0,0 +1,20 @@ | |||
| 1 | /* Copyright 2020 Nick Brassel (tzarc) | ||
| 2 | * | ||
| 3 | * This program is free software: you can redistribute it and/or modify | ||
| 4 | * it under the terms of the GNU General Public License as published by | ||
| 5 | * the Free Software Foundation, either version 3 of the License, or | ||
| 6 | * (at your option) any later version. | ||
| 7 | * | ||
| 8 | * This program is distributed in the hope that it will be useful, | ||
| 9 | * but WITHOUT ANY WARRANTY; without even the implied warranty of | ||
| 10 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | ||
| 11 | * GNU General Public License for more details. | ||
| 12 | * | ||
| 13 | * You should have received a copy of the GNU General Public License | ||
| 14 | * along with this program. If not, see <https://www.gnu.org/licenses/>. | ||
| 15 | */ | ||
| 16 | #pragma once | ||
| 17 | |||
| 18 | #include_next "board.h" | ||
| 19 | |||
| 20 | // #undef STM32_HSE_BYPASS | ||
diff --git a/platforms/chibios/keyboard-config-templates/chconf.h b/platforms/chibios/keyboard-config-templates/chconf.h new file mode 100644 index 000000000..7c2af93f5 --- /dev/null +++ b/platforms/chibios/keyboard-config-templates/chconf.h | |||
| @@ -0,0 +1,20 @@ | |||
| 1 | /* Copyright 2020 Nick Brassel (tzarc) | ||
| 2 | * | ||
| 3 | * This program is free software: you can redistribute it and/or modify | ||
| 4 | * it under the terms of the GNU General Public License as published by | ||
| 5 | * the Free Software Foundation, either version 3 of the License, or | ||
| 6 | * (at your option) any later version. | ||
| 7 | * | ||
| 8 | * This program is distributed in the hope that it will be useful, | ||
| 9 | * but WITHOUT ANY WARRANTY; without even the implied warranty of | ||
| 10 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | ||
| 11 | * GNU General Public License for more details. | ||
| 12 | * | ||
| 13 | * You should have received a copy of the GNU General Public License | ||
| 14 | * along with this program. If not, see <https://www.gnu.org/licenses/>. | ||
| 15 | */ | ||
| 16 | #pragma once | ||
| 17 | |||
| 18 | // #define CH_CFG_OPTIMIZE_SPEED TRUE | ||
| 19 | |||
| 20 | #include_next "chconf.h" | ||
diff --git a/platforms/chibios/keyboard-config-templates/halconf.h b/platforms/chibios/keyboard-config-templates/halconf.h new file mode 100644 index 000000000..ab5f738f9 --- /dev/null +++ b/platforms/chibios/keyboard-config-templates/halconf.h | |||
| @@ -0,0 +1,20 @@ | |||
| 1 | /* Copyright 2020 Nick Brassel (tzarc) | ||
| 2 | * | ||
| 3 | * This program is free software: you can redistribute it and/or modify | ||
| 4 | * it under the terms of the GNU General Public License as published by | ||
| 5 | * the Free Software Foundation, either version 3 of the License, or | ||
| 6 | * (at your option) any later version. | ||
| 7 | * | ||
| 8 | * This program is distributed in the hope that it will be useful, | ||
| 9 | * but WITHOUT ANY WARRANTY; without even the implied warranty of | ||
| 10 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | ||
| 11 | * GNU General Public License for more details. | ||
| 12 | * | ||
| 13 | * You should have received a copy of the GNU General Public License | ||
| 14 | * along with this program. If not, see <https://www.gnu.org/licenses/>. | ||
| 15 | */ | ||
| 16 | #pragma once | ||
| 17 | |||
| 18 | // #define HAL_USE_DAC TRUE | ||
| 19 | |||
| 20 | #include_next "halconf.h" | ||
diff --git a/platforms/chibios/keyboard-config-templates/mcuconf.h b/platforms/chibios/keyboard-config-templates/mcuconf.h new file mode 100644 index 000000000..5b42747b9 --- /dev/null +++ b/platforms/chibios/keyboard-config-templates/mcuconf.h | |||
| @@ -0,0 +1,21 @@ | |||
| 1 | /* Copyright 2020 Nick Brassel (tzarc) | ||
| 2 | * | ||
| 3 | * This program is free software: you can redistribute it and/or modify | ||
| 4 | * it under the terms of the GNU General Public License as published by | ||
| 5 | * the Free Software Foundation, either version 3 of the License, or | ||
| 6 | * (at your option) any later version. | ||
| 7 | * | ||
| 8 | * This program is distributed in the hope that it will be useful, | ||
| 9 | * but WITHOUT ANY WARRANTY; without even the implied warranty of | ||
| 10 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | ||
| 11 | * GNU General Public License for more details. | ||
| 12 | * | ||
| 13 | * You should have received a copy of the GNU General Public License | ||
| 14 | * along with this program. If not, see <https://www.gnu.org/licenses/>. | ||
| 15 | */ | ||
| 16 | #pragma once | ||
| 17 | |||
| 18 | #include_next "mcuconf.h" | ||
| 19 | |||
| 20 | // #undef STM32_HSE_ENABLED | ||
| 21 | // #define STM32_HSE_ENABLED FALSE | ||
diff --git a/drivers/boards/ld/MKL26Z64.ld b/platforms/chibios/ld/MKL26Z64.ld index c4ca8b874..c4ca8b874 100644 --- a/drivers/boards/ld/MKL26Z64.ld +++ b/platforms/chibios/ld/MKL26Z64.ld | |||
diff --git a/drivers/boards/ld/STM32F103x8_stm32duino_bootloader.ld b/platforms/chibios/ld/STM32F103x8_stm32duino_bootloader.ld index d0688ef60..d0688ef60 100644 --- a/drivers/boards/ld/STM32F103x8_stm32duino_bootloader.ld +++ b/platforms/chibios/ld/STM32F103x8_stm32duino_bootloader.ld | |||
diff --git a/quantum/stm32/mcuconf.h b/quantum/stm32/mcuconf.h deleted file mode 100644 index 71994a98e..000000000 --- a/quantum/stm32/mcuconf.h +++ /dev/null | |||
| @@ -1,273 +0,0 @@ | |||
| 1 | /* | ||
| 2 | ChibiOS - Copyright (C) 2006..2018 Giovanni Di Sirio | ||
| 3 | |||
| 4 | Licensed under the Apache License, Version 2.0 (the "License"); | ||
| 5 | you may not use this file except in compliance with the License. | ||
| 6 | You may obtain a copy of the License at | ||
| 7 | |||
| 8 | http://www.apache.org/licenses/LICENSE-2.0 | ||
| 9 | |||
| 10 | Unless required by applicable law or agreed to in writing, software | ||
| 11 | distributed under the License is distributed on an "AS IS" BASIS, | ||
| 12 | WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. | ||
| 13 | See the License for the specific language governing permissions and | ||
| 14 | limitations under the License. | ||
| 15 | */ | ||
| 16 | |||
| 17 | #ifndef MCUCONF_H | ||
| 18 | #define MCUCONF_H | ||
| 19 | |||
| 20 | /* | ||
| 21 | * STM32F3xx drivers configuration. | ||
| 22 | * The following settings override the default settings present in | ||
| 23 | * the various device driver implementation headers. | ||
| 24 | * Note that the settings for each driver only have effect if the whole | ||
| 25 | * driver is enabled in halconf.h. | ||
| 26 | * | ||
| 27 | * IRQ priorities: | ||
| 28 | * 15...0 Lowest...Highest. | ||
| 29 | * | ||
| 30 | * DMA priorities: | ||
| 31 | * 0...3 Lowest...Highest. | ||
| 32 | */ | ||
| 33 | |||
| 34 | #define STM32F3xx_MCUCONF | ||
| 35 | #define STM32F303_MCUCONF | ||
| 36 | |||
| 37 | /* | ||
| 38 | * HAL driver system settings. | ||
| 39 | */ | ||
| 40 | #define STM32_NO_INIT FALSE | ||
| 41 | #define STM32_PVD_ENABLE FALSE | ||
| 42 | #define STM32_PLS STM32_PLS_LEV0 | ||
| 43 | #define STM32_HSI_ENABLED TRUE | ||
| 44 | #define STM32_LSI_ENABLED TRUE | ||
| 45 | #define STM32_HSE_ENABLED TRUE | ||
| 46 | #define STM32_LSE_ENABLED FALSE | ||
| 47 | #define STM32_SW STM32_SW_PLL | ||
| 48 | #define STM32_PLLSRC STM32_PLLSRC_HSE | ||
| 49 | #define STM32_PREDIV_VALUE 1 | ||
| 50 | #define STM32_PLLMUL_VALUE 9 | ||
| 51 | #define STM32_HPRE STM32_HPRE_DIV1 | ||
| 52 | #define STM32_PPRE1 STM32_PPRE1_DIV2 | ||
| 53 | #define STM32_PPRE2 STM32_PPRE2_DIV2 | ||
| 54 | #define STM32_MCOSEL STM32_MCOSEL_NOCLOCK | ||
| 55 | #define STM32_ADC12PRES STM32_ADC12PRES_DIV1 | ||
| 56 | #define STM32_ADC34PRES STM32_ADC34PRES_DIV1 | ||
| 57 | #define STM32_USART1SW STM32_USART1SW_PCLK | ||
| 58 | #define STM32_USART2SW STM32_USART2SW_PCLK | ||
| 59 | #define STM32_USART3SW STM32_USART3SW_PCLK | ||
| 60 | #define STM32_UART4SW STM32_UART4SW_PCLK | ||
| 61 | #define STM32_UART5SW STM32_UART5SW_PCLK | ||
| 62 | #define STM32_I2C1SW STM32_I2C1SW_SYSCLK | ||
| 63 | #define STM32_I2C2SW STM32_I2C2SW_SYSCLK | ||
| 64 | #define STM32_TIM1SW STM32_TIM1SW_PCLK2 | ||
| 65 | #define STM32_TIM8SW STM32_TIM8SW_PCLK2 | ||
| 66 | #define STM32_RTCSEL STM32_RTCSEL_LSI | ||
| 67 | #define STM32_USB_CLOCK_REQUIRED TRUE | ||
| 68 | #define STM32_USBPRE STM32_USBPRE_DIV1P5 | ||
| 69 | |||
| 70 | /* | ||
| 71 | * IRQ system settings. | ||
| 72 | */ | ||
| 73 | #define STM32_IRQ_EXTI0_PRIORITY 6 | ||
| 74 | #define STM32_IRQ_EXTI1_PRIORITY 6 | ||
| 75 | #define STM32_IRQ_EXTI2_PRIORITY 6 | ||
| 76 | #define STM32_IRQ_EXTI3_PRIORITY 6 | ||
| 77 | #define STM32_IRQ_EXTI4_PRIORITY 6 | ||
| 78 | #define STM32_IRQ_EXTI5_9_PRIORITY 6 | ||
| 79 | #define STM32_IRQ_EXTI10_15_PRIORITY 6 | ||
| 80 | #define STM32_IRQ_EXTI16_PRIORITY 6 | ||
| 81 | #define STM32_IRQ_EXTI17_PRIORITY 15 | ||
| 82 | #define STM32_IRQ_EXTI18_PRIORITY 6 | ||
| 83 | #define STM32_IRQ_EXTI19_PRIORITY 15 | ||
| 84 | #define STM32_IRQ_EXTI20_PRIORITY 15 | ||
| 85 | #define STM32_IRQ_EXTI21_22_29_PRIORITY 6 | ||
| 86 | #define STM32_IRQ_EXTI30_32_PRIORITY 6 | ||
| 87 | #define STM32_IRQ_EXTI33_PRIORITY 6 | ||
| 88 | #define STM32_IRQ_TIM1_BRK_TIM15_PRIORITY 7 | ||
| 89 | #define STM32_IRQ_TIM1_UP_TIM16_PRIORITY 7 | ||
| 90 | #define STM32_IRQ_TIM1_TRGCO_TIM17_PRIORITY 7 | ||
| 91 | #define STM32_IRQ_TIM1_CC_PRIORITY 7 | ||
| 92 | |||
| 93 | /* | ||
| 94 | * ADC driver system settings. | ||
| 95 | */ | ||
| 96 | #define STM32_ADC_DUAL_MODE FALSE | ||
| 97 | #define STM32_ADC_COMPACT_SAMPLES FALSE | ||
| 98 | #define STM32_ADC_USE_ADC1 FALSE | ||
| 99 | #define STM32_ADC_USE_ADC2 FALSE | ||
| 100 | #define STM32_ADC_USE_ADC3 FALSE | ||
| 101 | #define STM32_ADC_USE_ADC4 FALSE | ||
| 102 | #define STM32_ADC_ADC1_DMA_STREAM STM32_DMA_STREAM_ID(1, 1) | ||
| 103 | #define STM32_ADC_ADC2_DMA_STREAM STM32_DMA_STREAM_ID(2, 1) | ||
| 104 | #define STM32_ADC_ADC3_DMA_STREAM STM32_DMA_STREAM_ID(2, 5) | ||
| 105 | #define STM32_ADC_ADC4_DMA_STREAM STM32_DMA_STREAM_ID(2, 2) | ||
| 106 | #define STM32_ADC_ADC1_DMA_PRIORITY 2 | ||
| 107 | #define STM32_ADC_ADC2_DMA_PRIORITY 2 | ||
| 108 | #define STM32_ADC_ADC3_DMA_PRIORITY 2 | ||
| 109 | #define STM32_ADC_ADC4_DMA_PRIORITY 2 | ||
| 110 | #define STM32_ADC_ADC12_IRQ_PRIORITY 5 | ||
| 111 | #define STM32_ADC_ADC3_IRQ_PRIORITY 5 | ||
| 112 | #define STM32_ADC_ADC4_IRQ_PRIORITY 5 | ||
| 113 | #define STM32_ADC_ADC1_DMA_IRQ_PRIORITY 5 | ||
| 114 | #define STM32_ADC_ADC2_DMA_IRQ_PRIORITY 5 | ||
| 115 | #define STM32_ADC_ADC3_DMA_IRQ_PRIORITY 5 | ||
| 116 | #define STM32_ADC_ADC4_DMA_IRQ_PRIORITY 5 | ||
| 117 | #define STM32_ADC_ADC12_CLOCK_MODE ADC_CCR_CKMODE_AHB_DIV1 | ||
| 118 | #define STM32_ADC_ADC34_CLOCK_MODE ADC_CCR_CKMODE_AHB_DIV1 | ||
| 119 | |||
| 120 | /* | ||
| 121 | * CAN driver system settings. | ||
| 122 | */ | ||
| 123 | #define STM32_CAN_USE_CAN1 FALSE | ||
| 124 | #define STM32_CAN_CAN1_IRQ_PRIORITY 11 | ||
| 125 | |||
| 126 | /* | ||
| 127 | * DAC driver system settings. | ||
| 128 | */ | ||
| 129 | #define STM32_DAC_DUAL_MODE FALSE | ||
| 130 | #define STM32_DAC_USE_DAC1_CH1 TRUE | ||
| 131 | #define STM32_DAC_USE_DAC1_CH2 TRUE | ||
| 132 | #define STM32_DAC_DAC1_CH1_IRQ_PRIORITY 10 | ||
| 133 | #define STM32_DAC_DAC1_CH2_IRQ_PRIORITY 10 | ||
| 134 | #define STM32_DAC_DAC1_CH1_DMA_PRIORITY 2 | ||
| 135 | #define STM32_DAC_DAC1_CH2_DMA_PRIORITY 2 | ||
| 136 | |||
| 137 | /* | ||
| 138 | * GPT driver system settings. | ||
| 139 | */ | ||
| 140 | #define STM32_GPT_USE_TIM1 FALSE | ||
| 141 | #define STM32_GPT_USE_TIM2 FALSE | ||
| 142 | #define STM32_GPT_USE_TIM3 FALSE | ||
| 143 | #define STM32_GPT_USE_TIM4 FALSE | ||
| 144 | #define STM32_GPT_USE_TIM6 TRUE | ||
| 145 | #define STM32_GPT_USE_TIM7 TRUE | ||
| 146 | #define STM32_GPT_USE_TIM8 TRUE | ||
| 147 | #define STM32_GPT_USE_TIM15 FALSE | ||
| 148 | #define STM32_GPT_USE_TIM16 FALSE | ||
| 149 | #define STM32_GPT_USE_TIM17 FALSE | ||
| 150 | #define STM32_GPT_TIM1_IRQ_PRIORITY 7 | ||
| 151 | #define STM32_GPT_TIM2_IRQ_PRIORITY 7 | ||
| 152 | #define STM32_GPT_TIM3_IRQ_PRIORITY 7 | ||
| 153 | #define STM32_GPT_TIM4_IRQ_PRIORITY 7 | ||
| 154 | #define STM32_GPT_TIM6_IRQ_PRIORITY 7 | ||
| 155 | #define STM32_GPT_TIM7_IRQ_PRIORITY 7 | ||
| 156 | #define STM32_GPT_TIM8_IRQ_PRIORITY 7 | ||
| 157 | |||
| 158 | /* | ||
| 159 | * I2C driver system settings. | ||
| 160 | */ | ||
| 161 | #define STM32_I2C_USE_I2C1 TRUE | ||
| 162 | #define STM32_I2C_USE_I2C2 FALSE | ||
| 163 | #define STM32_I2C_BUSY_TIMEOUT 50 | ||
| 164 | #define STM32_I2C_I2C1_IRQ_PRIORITY 10 | ||
| 165 | #define STM32_I2C_I2C2_IRQ_PRIORITY 10 | ||
| 166 | #define STM32_I2C_USE_DMA TRUE | ||
| 167 | #define STM32_I2C_I2C1_DMA_PRIORITY 1 | ||
| 168 | #define STM32_I2C_I2C2_DMA_PRIORITY 1 | ||
| 169 | #define STM32_I2C_DMA_ERROR_HOOK(i2cp) osalSysHalt("DMA failure") | ||
| 170 | |||
| 171 | /* | ||
| 172 | * ICU driver system settings. | ||
| 173 | */ | ||
| 174 | #define STM32_ICU_USE_TIM1 FALSE | ||
| 175 | #define STM32_ICU_USE_TIM2 FALSE | ||
| 176 | #define STM32_ICU_USE_TIM3 FALSE | ||
| 177 | #define STM32_ICU_USE_TIM4 FALSE | ||
| 178 | #define STM32_ICU_USE_TIM8 FALSE | ||
| 179 | #define STM32_ICU_USE_TIM15 FALSE | ||
| 180 | #define STM32_ICU_TIM1_IRQ_PRIORITY 7 | ||
| 181 | #define STM32_ICU_TIM2_IRQ_PRIORITY 7 | ||
| 182 | #define STM32_ICU_TIM3_IRQ_PRIORITY 7 | ||
| 183 | #define STM32_ICU_TIM4_IRQ_PRIORITY 7 | ||
| 184 | #define STM32_ICU_TIM8_IRQ_PRIORITY 7 | ||
| 185 | |||
| 186 | /* | ||
| 187 | * PWM driver system settings. | ||
| 188 | */ | ||
| 189 | #define STM32_PWM_USE_ADVANCED FALSE | ||
| 190 | #define STM32_PWM_USE_TIM1 FALSE | ||
| 191 | #define STM32_PWM_USE_TIM2 FALSE | ||
| 192 | #define STM32_PWM_USE_TIM3 TRUE | ||
| 193 | #define STM32_PWM_USE_TIM4 TRUE | ||
| 194 | #define STM32_PWM_USE_TIM8 FALSE | ||
| 195 | #define STM32_PWM_USE_TIM15 FALSE | ||
| 196 | #define STM32_PWM_USE_TIM16 FALSE | ||
| 197 | #define STM32_PWM_USE_TIM17 FALSE | ||
| 198 | #define STM32_PWM_TIM1_IRQ_PRIORITY 7 | ||
| 199 | #define STM32_PWM_TIM2_IRQ_PRIORITY 7 | ||
| 200 | #define STM32_PWM_TIM3_IRQ_PRIORITY 7 | ||
| 201 | #define STM32_PWM_TIM4_IRQ_PRIORITY 7 | ||
| 202 | #define STM32_PWM_TIM8_IRQ_PRIORITY 7 | ||
| 203 | |||
| 204 | /* | ||
| 205 | * RTC driver system settings. | ||
| 206 | */ | ||
| 207 | #define STM32_RTC_PRESA_VALUE 32 | ||
| 208 | #define STM32_RTC_PRESS_VALUE 1024 | ||
| 209 | #define STM32_RTC_CR_INIT 0 | ||
| 210 | #define STM32_RTC_TAMPCR_INIT 0 | ||
| 211 | |||
| 212 | /* | ||
| 213 | * SERIAL driver system settings. | ||
| 214 | */ | ||
| 215 | #define STM32_SERIAL_USE_USART1 FALSE | ||
| 216 | #define STM32_SERIAL_USE_USART2 TRUE | ||
| 217 | #define STM32_SERIAL_USE_USART3 FALSE | ||
| 218 | #define STM32_SERIAL_USE_UART4 FALSE | ||
| 219 | #define STM32_SERIAL_USE_UART5 FALSE | ||
| 220 | #define STM32_SERIAL_USART1_PRIORITY 12 | ||
| 221 | #define STM32_SERIAL_USART2_PRIORITY 12 | ||
| 222 | #define STM32_SERIAL_USART3_PRIORITY 12 | ||
| 223 | #define STM32_SERIAL_UART4_PRIORITY 12 | ||
| 224 | #define STM32_SERIAL_UART5_PRIORITY 12 | ||
| 225 | |||
| 226 | /* | ||
| 227 | * SPI driver system settings. | ||
| 228 | */ | ||
| 229 | #define STM32_SPI_USE_SPI1 FALSE | ||
| 230 | #define STM32_SPI_USE_SPI2 TRUE | ||
| 231 | #define STM32_SPI_USE_SPI3 FALSE | ||
| 232 | #define STM32_SPI_SPI1_DMA_PRIORITY 1 | ||
| 233 | #define STM32_SPI_SPI2_DMA_PRIORITY 1 | ||
| 234 | #define STM32_SPI_SPI3_DMA_PRIORITY 1 | ||
| 235 | #define STM32_SPI_SPI1_IRQ_PRIORITY 10 | ||
| 236 | #define STM32_SPI_SPI2_IRQ_PRIORITY 10 | ||
| 237 | #define STM32_SPI_SPI3_IRQ_PRIORITY 10 | ||
| 238 | #define STM32_SPI_DMA_ERROR_HOOK(spip) osalSysHalt("DMA failure") | ||
| 239 | |||
| 240 | /* | ||
| 241 | * ST driver system settings. | ||
| 242 | */ | ||
| 243 | #define STM32_ST_IRQ_PRIORITY 8 | ||
| 244 | #define STM32_ST_USE_TIMER 2 | ||
| 245 | |||
| 246 | /* | ||
| 247 | * UART driver system settings. | ||
| 248 | */ | ||
| 249 | #define STM32_UART_USE_USART1 FALSE | ||
| 250 | #define STM32_UART_USE_USART2 FALSE | ||
| 251 | #define STM32_UART_USE_USART3 FALSE | ||
| 252 | #define STM32_UART_USART1_IRQ_PRIORITY 12 | ||
| 253 | #define STM32_UART_USART2_IRQ_PRIORITY 12 | ||
| 254 | #define STM32_UART_USART3_IRQ_PRIORITY 12 | ||
| 255 | #define STM32_UART_USART1_DMA_PRIORITY 0 | ||
| 256 | #define STM32_UART_USART2_DMA_PRIORITY 0 | ||
| 257 | #define STM32_UART_USART3_DMA_PRIORITY 0 | ||
| 258 | #define STM32_UART_DMA_ERROR_HOOK(uartp) osalSysHalt("DMA failure") | ||
| 259 | |||
| 260 | /* | ||
| 261 | * USB driver system settings. | ||
| 262 | */ | ||
| 263 | #define STM32_USB_USE_USB1 TRUE | ||
| 264 | #define STM32_USB_LOW_POWER_ON_SUSPEND FALSE | ||
| 265 | #define STM32_USB_USB1_HP_IRQ_PRIORITY 13 | ||
| 266 | #define STM32_USB_USB1_LP_IRQ_PRIORITY 14 | ||
| 267 | |||
| 268 | /* | ||
| 269 | * WDG driver system settings. | ||
| 270 | */ | ||
| 271 | #define STM32_WDG_USE_IWDG FALSE | ||
| 272 | |||
| 273 | #endif /* MCUCONF_H */ | ||
diff --git a/quantum/stm32/proton_c.mk b/quantum/stm32/proton_c.mk deleted file mode 100644 index b25b55504..000000000 --- a/quantum/stm32/proton_c.mk +++ /dev/null | |||
| @@ -1,47 +0,0 @@ | |||
| 1 | # Proton C MCU settings for converting AVR projects | ||
| 2 | |||
| 3 | # These are defaults based on what has been implemented for ARM boards | ||
| 4 | AUDIO_ENABLE = yes | ||
| 5 | WS2812_DRIVER = bitbang | ||
| 6 | |||
| 7 | # Force task driven PWM until ARM can provide automatic configuration | ||
| 8 | BACKLIGHT_DRIVER = software | ||
| 9 | |||
| 10 | # The rest of these settings shouldn't change | ||
| 11 | |||
| 12 | ## chip/board settings | ||
| 13 | # - the next two should match the directories in | ||
| 14 | # <chibios>/os/hal/ports/$(MCU_FAMILY)/$(MCU_SERIES) | ||
| 15 | MCU_FAMILY = STM32 | ||
| 16 | MCU_SERIES = STM32F3xx | ||
| 17 | |||
| 18 | # Linker script to use | ||
| 19 | # - it should exist either in <chibios>/os/common/ports/ARMCMx/compilers/GCC/ld/ | ||
| 20 | # or <this_dir>/ld/ | ||
| 21 | MCU_LDSCRIPT = STM32F303xC | ||
| 22 | |||
| 23 | # Startup code to use | ||
| 24 | # - it should exist in <chibios>/os/common/startup/ARMCMx/compilers/GCC/mk/ | ||
| 25 | MCU_STARTUP = stm32f3xx | ||
| 26 | |||
| 27 | # Board: it should exist either in <chibios>/os/hal/boards/ | ||
| 28 | # or <this_dir>/boards | ||
| 29 | BOARD = GENERIC_STM32_F303XC | ||
| 30 | |||
| 31 | # Cortex version | ||
| 32 | MCU = cortex-m4 | ||
| 33 | |||
| 34 | # ARM version, CORTEX-M0/M1 are 6, CORTEX-M3/M4/M7 are 7 | ||
| 35 | ARMV = 7 | ||
| 36 | |||
| 37 | USE_FPU = yes | ||
| 38 | |||
| 39 | # Vector table for application | ||
| 40 | # 0x00000000-0x00001000 area is occupied by bootlaoder.*/ | ||
| 41 | # The CORTEX_VTOR... is needed only for MCHCK/Infinity KB | ||
| 42 | # OPT_DEFS = -DCORTEX_VTOR_INIT=0x08005000 | ||
| 43 | OPT_DEFS = | ||
| 44 | |||
| 45 | # Options to pass to dfu-util when flashing | ||
| 46 | DFU_ARGS = -d 0483:df11 -a 0 -s 0x08000000:leave | ||
| 47 | DFU_SUFFIX_ARGS = -p df11 -v 0483 | ||
diff --git a/tmk_core/chibios.mk b/tmk_core/chibios.mk index 09aaddeef..4e8abc9be 100644 --- a/tmk_core/chibios.mk +++ b/tmk_core/chibios.mk | |||
| @@ -50,11 +50,42 @@ PLATFORM_MK = $(CHIBIOS_CONTRIB)/os/hal/ports/$(MCU_FAMILY)/$(MCU_SERIES)/$(PLAT | |||
| 50 | endif | 50 | endif |
| 51 | include $(PLATFORM_MK) | 51 | include $(PLATFORM_MK) |
| 52 | 52 | ||
| 53 | BOARD_MK := | ||
| 54 | |||
| 55 | ifneq ("$(wildcard $(KEYBOARD_PATH_5)/boards/$(BOARD)/board.mk)","") | ||
| 56 | BOARD_PATH = $(KEYBOARD_PATH_5) | ||
| 57 | BOARD_MK += $(KEYBOARD_PATH_5)/boards/$(BOARD)/board.mk | ||
| 58 | else ifneq ("$(wildcard $(KEYBOARD_PATH_4)/boards/$(BOARD)/board.mk)","") | ||
| 59 | BOARD_PATH = $(KEYBOARD_PATH_4) | ||
| 60 | BOARD_MK += $(KEYBOARD_PATH_4)/boards/$(BOARD)/board.mk | ||
| 61 | else ifneq ("$(wildcard $(KEYBOARD_PATH_3)/boards/$(BOARD)/board.mk)","") | ||
| 62 | BOARD_PATH = $(KEYBOARD_PATH_3) | ||
| 63 | BOARD_MK += $(KEYBOARD_PATH_3)/boards/$(BOARD)/board.mk | ||
| 64 | else ifneq ("$(wildcard $(KEYBOARD_PATH_2)/boards/$(BOARD)/board.mk)","") | ||
| 65 | BOARD_PATH = $(KEYBOARD_PATH_2) | ||
| 66 | BOARD_MK += $(KEYBOARD_PATH_2)/boards/$(BOARD)/board.mk | ||
| 67 | else ifneq ("$(wildcard $(KEYBOARD_PATH_1)/boards/$(BOARD)/board.mk)","") | ||
| 68 | BOARD_PATH = $(KEYBOARD_PATH_1) | ||
| 69 | BOARD_MK += $(KEYBOARD_PATH_1)/boards/$(BOARD)/board.mk | ||
| 70 | else ifneq ("$(wildcard $(TOP_DIR)/platforms/chibios/$(BOARD)/board/board.mk)","") | ||
| 71 | BOARD_PATH = $(TOP_DIR)/platforms/chibios/$(BOARD) | ||
| 72 | BOARD_MK += $(TOP_DIR)/platforms/chibios/$(BOARD)/board/board.mk | ||
| 73 | KEYBOARD_PATHS += $(BOARD_PATH)/configs | ||
| 74 | endif | ||
| 75 | |||
| 76 | ifeq ("$(wildcard $(BOARD_MK))","") | ||
| 77 | BOARD_MK = $(CHIBIOS)/os/hal/boards/$(BOARD)/board.mk | ||
| 78 | ifeq ("$(wildcard $(BOARD_MK))","") | ||
| 79 | BOARD_MK = $(CHIBIOS_CONTRIB)/os/hal/boards/$(BOARD)/board.mk | ||
| 80 | endif | ||
| 81 | endif | ||
| 82 | |||
| 53 | # Bootloader address | 83 | # Bootloader address |
| 54 | ifdef STM32_BOOTLOADER_ADDRESS | 84 | ifdef STM32_BOOTLOADER_ADDRESS |
| 55 | OPT_DEFS += -DSTM32_BOOTLOADER_ADDRESS=$(STM32_BOOTLOADER_ADDRESS) | 85 | OPT_DEFS += -DSTM32_BOOTLOADER_ADDRESS=$(STM32_BOOTLOADER_ADDRESS) |
| 56 | endif | 86 | endif |
| 57 | 87 | ||
| 88 | # Work out if we need to set up the include for the bootloader definitions | ||
| 58 | ifneq ("$(wildcard $(KEYBOARD_PATH_5)/bootloader_defs.h)","") | 89 | ifneq ("$(wildcard $(KEYBOARD_PATH_5)/bootloader_defs.h)","") |
| 59 | OPT_DEFS += -include $(KEYBOARD_PATH_5)/bootloader_defs.h | 90 | OPT_DEFS += -include $(KEYBOARD_PATH_5)/bootloader_defs.h |
| 60 | else ifneq ("$(wildcard $(KEYBOARD_PATH_5)/boards/$(BOARD)/bootloader_defs.h)","") | 91 | else ifneq ("$(wildcard $(KEYBOARD_PATH_5)/boards/$(BOARD)/bootloader_defs.h)","") |
| @@ -75,38 +106,52 @@ else ifneq ("$(wildcard $(KEYBOARD_PATH_1)/bootloader_defs.h)","") | |||
| 75 | OPT_DEFS += -include $(KEYBOARD_PATH_1)/bootloader_defs.h | 106 | OPT_DEFS += -include $(KEYBOARD_PATH_1)/bootloader_defs.h |
| 76 | else ifneq ("$(wildcard $(KEYBOARD_PATH_1)/boards/$(BOARD)/bootloader_defs.h)","") | 107 | else ifneq ("$(wildcard $(KEYBOARD_PATH_1)/boards/$(BOARD)/bootloader_defs.h)","") |
| 77 | OPT_DEFS += -include $(KEYBOARD_PATH_1)/boards/$(BOARD)/bootloader_defs.h | 108 | OPT_DEFS += -include $(KEYBOARD_PATH_1)/boards/$(BOARD)/bootloader_defs.h |
| 78 | else ifneq ("$(wildcard $(TOP_DIR)/drivers/boards/$(BOARD)/bootloader_defs.h)","") | 109 | else ifneq ("$(wildcard $(BOARD_PATH)/configs/bootloader_defs.h)","") |
| 79 | OPT_DEFS += -include $(TOP_DIR)/drivers/boards/$(BOARD)/bootloader_defs.h | 110 | OPT_DEFS += -include $(BOARD_PATH)/configs/bootloader_defs.h |
| 80 | endif | 111 | endif |
| 81 | 112 | ||
| 82 | BOARD_MK := | 113 | # Work out the config file directories |
| 114 | ifneq ("$(wildcard $(KEYBOARD_PATH_5)/chconf.h)","") | ||
| 115 | CHCONFDIR = $(KEYBOARD_PATH_5) | ||
| 116 | else ifneq ("$(wildcard $(KEYBOARD_PATH_4)/chconf.h)","") | ||
| 117 | CHCONFDIR = $(KEYBOARD_PATH_4) | ||
| 118 | else ifneq ("$(wildcard $(KEYBOARD_PATH_3)/chconf.h)","") | ||
| 119 | CHCONFDIR = $(KEYBOARD_PATH_3) | ||
| 120 | else ifneq ("$(wildcard $(KEYBOARD_PATH_2)/chconf.h)","") | ||
| 121 | CHCONFDIR = $(KEYBOARD_PATH_2) | ||
| 122 | else ifneq ("$(wildcard $(KEYBOARD_PATH_1)/chconf.h)","") | ||
| 123 | CHCONFDIR = $(KEYBOARD_PATH_1) | ||
| 124 | else ifneq ("$(wildcard $(TOP_DIR)/platforms/chibios/$(BOARD)/configs/chconf.h)","") | ||
| 125 | CHCONFDIR = $(TOP_DIR)/platforms/chibios/$(BOARD)/configs | ||
| 126 | endif | ||
| 83 | 127 | ||
| 84 | ifneq ("$(wildcard $(KEYBOARD_PATH_5)/boards/$(BOARD)/board.mk)","") | 128 | ifneq ("$(wildcard $(KEYBOARD_PATH_5)/halconf.h)","") |
| 85 | BOARD_PATH = $(KEYBOARD_PATH_5) | 129 | HALCONFDIR = $(KEYBOARD_PATH_5) |
| 86 | BOARD_MK += $(KEYBOARD_PATH_5)/boards/$(BOARD)/board.mk | 130 | else ifneq ("$(wildcard $(KEYBOARD_PATH_4)/halconf.h)","") |
| 87 | else ifneq ("$(wildcard $(KEYBOARD_PATH_4)/boards/$(BOARD)/board.mk)","") | 131 | HALCONFDIR = $(KEYBOARD_PATH_4) |
| 88 | BOARD_PATH = $(KEYBOARD_PATH_4) | 132 | else ifneq ("$(wildcard $(KEYBOARD_PATH_3)/halconf.h)","") |
| 89 | BOARD_MK += $(KEYBOARD_PATH_4)/boards/$(BOARD)/board.mk | 133 | HALCONFDIR = $(KEYBOARD_PATH_3) |
| 90 | else ifneq ("$(wildcard $(KEYBOARD_PATH_3)/boards/$(BOARD)/board.mk)","") | 134 | else ifneq ("$(wildcard $(KEYBOARD_PATH_2)/halconf.h)","") |
| 91 | BOARD_PATH = $(KEYBOARD_PATH_3) | 135 | HALCONFDIR = $(KEYBOARD_PATH_2) |
| 92 | BOARD_MK += $(KEYBOARD_PATH_3)/boards/$(BOARD)/board.mk | 136 | else ifneq ("$(wildcard $(KEYBOARD_PATH_1)/halconf.h)","") |
| 93 | else ifneq ("$(wildcard $(KEYBOARD_PATH_2)/boards/$(BOARD)/board.mk)","") | 137 | HALCONFDIR = $(KEYBOARD_PATH_1) |
| 94 | BOARD_PATH = $(KEYBOARD_PATH_2) | 138 | else ifneq ("$(wildcard $(TOP_DIR)/platforms/chibios/$(BOARD)/configs/halconf.h)","") |
| 95 | BOARD_MK += $(KEYBOARD_PATH_2)/boards/$(BOARD)/board.mk | 139 | HALCONFDIR = $(TOP_DIR)/platforms/chibios/$(BOARD)/configs |
| 96 | else ifneq ("$(wildcard $(KEYBOARD_PATH_1)/boards/$(BOARD)/board.mk)","") | ||
| 97 | BOARD_PATH = $(KEYBOARD_PATH_1) | ||
| 98 | BOARD_MK += $(KEYBOARD_PATH_1)/boards/$(BOARD)/board.mk | ||
| 99 | else ifneq ("$(wildcard $(TOP_DIR)/drivers/boards/$(BOARD)/board.mk)","") | ||
| 100 | BOARD_PATH = $(TOP_DIR)/drivers | ||
| 101 | BOARD_MK += $(TOP_DIR)/drivers/boards/$(BOARD)/board.mk | ||
| 102 | endif | 140 | endif |
| 103 | 141 | ||
| 104 | ifeq ("$(wildcard $(BOARD_MK))","") | 142 | # HAL-OSAL files (optional). |
| 105 | BOARD_MK = $(CHIBIOS)/os/hal/boards/$(BOARD)/board.mk | 143 | include $(CHIBIOS)/os/hal/hal.mk |
| 106 | ifeq ("$(wildcard $(BOARD_MK))","") | 144 | |
| 107 | BOARD_MK = $(CHIBIOS_CONTRIB)/os/hal/boards/$(BOARD)/board.mk | 145 | ifeq ("$(PLATFORM_NAME)","") |
| 108 | endif | 146 | PLATFORM_NAME = platform |
| 147 | endif | ||
| 148 | |||
| 149 | PLATFORM_MK = $(CHIBIOS)/os/hal/ports/$(MCU_FAMILY)/$(MCU_SERIES)/$(PLATFORM_NAME).mk | ||
| 150 | ifeq ("$(wildcard $(PLATFORM_MK))","") | ||
| 151 | PLATFORM_MK = $(CHIBIOS_CONTRIB)/os/hal/ports/$(MCU_FAMILY)/$(MCU_SERIES)/$(PLATFORM_NAME).mk | ||
| 109 | endif | 152 | endif |
| 153 | include $(PLATFORM_MK) | ||
| 154 | |||
| 110 | 155 | ||
| 111 | include $(BOARD_MK) | 156 | include $(BOARD_MK) |
| 112 | -include $(CHIBIOS)/os/hal/osal/rt/osal.mk # ChibiOS <= 19.x | 157 | -include $(CHIBIOS)/os/hal/osal/rt/osal.mk # ChibiOS <= 19.x |
| @@ -138,8 +183,8 @@ else ifneq ("$(wildcard $(KEYBOARD_PATH_2)/ld/$(MCU_LDSCRIPT).ld)","") | |||
| 138 | LDSCRIPT = $(KEYBOARD_PATH_2)/ld/$(MCU_LDSCRIPT).ld | 183 | LDSCRIPT = $(KEYBOARD_PATH_2)/ld/$(MCU_LDSCRIPT).ld |
| 139 | else ifneq ("$(wildcard $(KEYBOARD_PATH_1)/ld/$(MCU_LDSCRIPT).ld)","") | 184 | else ifneq ("$(wildcard $(KEYBOARD_PATH_1)/ld/$(MCU_LDSCRIPT).ld)","") |
| 140 | LDSCRIPT = $(KEYBOARD_PATH_1)/ld/$(MCU_LDSCRIPT).ld | 185 | LDSCRIPT = $(KEYBOARD_PATH_1)/ld/$(MCU_LDSCRIPT).ld |
| 141 | else ifneq ("$(wildcard $(TOP_DIR)/drivers/boards/ld/$(MCU_LDSCRIPT).ld)","") | 186 | else ifneq ("$(wildcard $(TOP_DIR)/platforms/chibios/ld/$(MCU_LDSCRIPT).ld)","") |
| 142 | LDSCRIPT = $(TOP_DIR)/drivers/boards/ld/$(MCU_LDSCRIPT).ld | 187 | LDSCRIPT = $(TOP_DIR)/platforms/chibios/ld/$(MCU_LDSCRIPT).ld |
| 143 | else ifneq ("$(wildcard $(STARTUPLD_CONTRIB)/$(MCU_LDSCRIPT).ld)","") | 188 | else ifneq ("$(wildcard $(STARTUPLD_CONTRIB)/$(MCU_LDSCRIPT).ld)","") |
| 144 | LDSCRIPT = $(STARTUPLD_CONTRIB)/$(MCU_LDSCRIPT).ld | 189 | LDSCRIPT = $(STARTUPLD_CONTRIB)/$(MCU_LDSCRIPT).ld |
| 145 | USE_CHIBIOS_CONTRIB = yes | 190 | USE_CHIBIOS_CONTRIB = yes |
| @@ -163,6 +208,7 @@ QUANTUM_LIB_SRC += $(STARTUPASM) $(PORTASM) $(OSALASM) | |||
| 163 | CHIBISRC := $(patsubst $(TOP_DIR)/%,%,$(CHIBISRC)) | 208 | CHIBISRC := $(patsubst $(TOP_DIR)/%,%,$(CHIBISRC)) |
| 164 | 209 | ||
| 165 | EXTRAINCDIRS += $(CHIBIOS)/os/license $(CHIBIOS)/os/oslib/include \ | 210 | EXTRAINCDIRS += $(CHIBIOS)/os/license $(CHIBIOS)/os/oslib/include \ |
| 211 | $(TOP_DIR)/platforms/chibios/$(BOARD)/configs \ | ||
| 166 | $(STARTUPINC) $(KERNINC) $(PORTINC) $(OSALINC) \ | 212 | $(STARTUPINC) $(KERNINC) $(PORTINC) $(OSALINC) \ |
| 167 | $(HALINC) $(PLATFORMINC) $(BOARDINC) $(TESTINC) \ | 213 | $(HALINC) $(PLATFORMINC) $(BOARDINC) $(TESTINC) \ |
| 168 | $(STREAMSINC) $(CHIBIOS)/os/various $(COMMON_VPATH) | 214 | $(STREAMSINC) $(CHIBIOS)/os/various $(COMMON_VPATH) |
| @@ -182,6 +228,8 @@ else ifneq ("$(wildcard $(KEYBOARD_PATH_2)/halconf_community.h)","") | |||
| 182 | USE_CHIBIOS_CONTRIB = yes | 228 | USE_CHIBIOS_CONTRIB = yes |
| 183 | else ifneq ("$(wildcard $(KEYBOARD_PATH_1)/halconf_community.h)","") | 229 | else ifneq ("$(wildcard $(KEYBOARD_PATH_1)/halconf_community.h)","") |
| 184 | USE_CHIBIOS_CONTRIB = yes | 230 | USE_CHIBIOS_CONTRIB = yes |
| 231 | else ifneq ("$(wildcard $(TOP_DIR)/platforms/chibios/$(BOARD)/configs/halconf_community.h)","") | ||
| 232 | USE_CHIBIOS_CONTRIB = yes | ||
| 185 | endif | 233 | endif |
| 186 | 234 | ||
| 187 | ifeq ($(strip $(USE_CHIBIOS_CONTRIB)),yes) | 235 | ifeq ($(strip $(USE_CHIBIOS_CONTRIB)),yes) |
| @@ -194,6 +242,15 @@ endif | |||
| 194 | # Project, sources and paths | 242 | # Project, sources and paths |
| 195 | ############################################################################## | 243 | ############################################################################## |
| 196 | 244 | ||
| 245 | ############################################################################## | ||
| 246 | # Injected configs | ||
| 247 | # | ||
| 248 | ifneq ("$(wildcard $(BOARD_PATH)/configs/config.h)","") | ||
| 249 | CONFIG_H += $(BOARD_PATH)/configs/config.h | ||
| 250 | endif | ||
| 251 | ifneq ("$(wildcard $(BOARD_PATH)/configs/post_config.h)","") | ||
| 252 | POST_CONFIG_H += $(BOARD_PATH)/configs/post_config.h | ||
| 253 | endif | ||
| 197 | 254 | ||
| 198 | ############################################################################## | 255 | ############################################################################## |
| 199 | # Compiler settings | 256 | # Compiler settings |
diff --git a/util/chibios-upgrader.sh b/util/chibios-upgrader.sh index 2174da3cf..ebc12abe7 100755 --- a/util/chibios-upgrader.sh +++ b/util/chibios-upgrader.sh | |||
| @@ -38,7 +38,11 @@ find_chibi_files() { | |||
| 38 | local search_path="$1" | 38 | local search_path="$1" |
| 39 | shift | 39 | shift |
| 40 | local conditions=( "$@" ) | 40 | local conditions=( "$@" ) |
| 41 | find -L "$search_path" -not -path '*/lib/chibios*' -and -not -path '*/lib/ugfx*' -and -not -path '*/util/*' -and \( "${conditions[@]}" \) | sort | 41 | for file in $(find -L "$search_path" -not -path '*/lib/chibios*' -and -not -path '*/lib/ugfx*' -and -not -path '*/util/*' -and \( "${conditions[@]}" \) | sort) ; do |
| 42 | if [ -z "$(grep 'include_next' "$file")" ] ; then | ||
| 43 | echo $file | ||
| 44 | fi | ||
| 45 | done | ||
| 42 | } | 46 | } |
| 43 | 47 | ||
| 44 | revert_chibi_files() { | 48 | revert_chibi_files() { |
diff --git a/util/travis_compiled_push.sh b/util/travis_compiled_push.sh index 68f6d5c11..195a87208 100755 --- a/util/travis_compiled_push.sh +++ b/util/travis_compiled_push.sh | |||
| @@ -13,7 +13,7 @@ if [[ "$TRAVIS_BRANCH" == "master" && "$TRAVIS_PULL_REQUEST" == "false" ]] ; the | |||
| 13 | # fix formatting | 13 | # fix formatting |
| 14 | git checkout master | 14 | git checkout master |
| 15 | git diff --diff-filter=AM --name-only -n 1 -z ${TRAVIS_COMMIT_RANGE} | xargs -0 dos2unix | 15 | git diff --diff-filter=AM --name-only -n 1 -z ${TRAVIS_COMMIT_RANGE} | xargs -0 dos2unix |
| 16 | git diff --diff-filter=AM --name-only -n 1 -z ${TRAVIS_COMMIT_RANGE} '*.c' '*.h' '*.cpp' | grep -z -e '^drivers' -e '^quantum' -e '^tests' -e '^tmk_core' | grep -zv -e 'quantum/template' -e 'tmk_core/protocol/usb_hid' | xargs -0 clang-format-7 -i | 16 | git diff --diff-filter=AM --name-only -n 1 -z ${TRAVIS_COMMIT_RANGE} '*.c' '*.h' '*.cpp' | grep -z -e '^drivers' -e '^quantum' -e '^tests' -e '^tmk_core' | grep -zv -e 'quantum/template' -e 'tmk_core/protocol/usb_hid' -e 'platforms/chibios' | xargs -0 clang-format-7 -i |
| 17 | git diff --diff-filter=AM --name-only -n 1 -z ${TRAVIS_COMMIT_RANGE} | xargs -0 git add | 17 | git diff --diff-filter=AM --name-only -n 1 -z ${TRAVIS_COMMIT_RANGE} | xargs -0 git add |
| 18 | git commit -m "format code according to conventions [skip ci]" && git push git@github.com:qmk/qmk_firmware.git master | 18 | git commit -m "format code according to conventions [skip ci]" && git push git@github.com:qmk/qmk_firmware.git master |
| 19 | 19 | ||