aboutsummaryrefslogtreecommitdiff
diff options
context:
space:
mode:
Diffstat
-rw-r--r--docs/spi_driver.md19
-rw-r--r--drivers/chibios/spi_master.c137
-rw-r--r--drivers/chibios/spi_master.h78
-rw-r--r--quantum/stm32/halconf.h2
-rw-r--r--quantum/stm32/mcuconf.h2
5 files changed, 235 insertions, 3 deletions
diff --git a/docs/spi_driver.md b/docs/spi_driver.md
index e2b5b140b..c170bf1df 100644
--- a/docs/spi_driver.md
+++ b/docs/spi_driver.md
@@ -18,7 +18,24 @@ You may use more than one slave select pin, not just the `SS` pin. This is usefu
18 18
19## ChibiOS/ARM Configuration 19## ChibiOS/ARM Configuration
20 20
21ARM support for this driver is not ready yet. Check back later! 21You'll need to determine which pins can be used for SPI -- as an example, STM32 parts generally have multiple SPI peripherals, labeled SPI1, SPI2, SPI3 etc.
22
23To enable SPI, modify your board's `halconf.h` to enable SPI - both `HAL_USE_SPI` and `SPI_USE_WAIT` should be `TRUE`, and `SPI_SELECT_MODE` should be `SPI_SELECT_MODE_PAD`.
24Then, modify your board's `mcuconf.h` to enable the SPI peripheral you've chosen -- in the case of using SPI2, modify `STM32_SPI_USE_SPI2` to be `TRUE`.
25
26As per the AVR configuration, you may select any other standard GPIO as a slave select pin, and can be supplied to `spi_start()`.
27
28Configuration-wise, you'll need to set up the peripheral as per your MCU's datasheet -- the defaults match the pins for a Proton-C, i.e. STM32F303.
29
30`config.h` override | Description | Default Value
31----------------------------|---------------------------------------------------------------|--------------
32`#define SPI_DRIVER` | SPI peripheral to use - SPI1 => `SPID1`, SPI2 => `SPID2` etc. | `SPID2`
33`#define SPI_SCK_PIN` | The pin to use for the SCK | `B13`
34`#define SPI_SCK_PAL_MODE` | The alternate function mode for the SCK pin | `5`
35`#define SPI_MOSI_PIN` | The pin to use for the MOSI | `B15`
36`#define SPI_MOSI_PAL_MODE` | The alternate function mode for the MOSI pin | `5`
37`#define SPI_MISO_PIN` | The pin to use for the MISO | `B14`
38`#define SPI_MISO_PAL_MODE` | The alternate function mode for the MISO pin | `5`
22 39
23## Functions 40## Functions
24 41
diff --git a/drivers/chibios/spi_master.c b/drivers/chibios/spi_master.c
new file mode 100644
index 000000000..552ac663c
--- /dev/null
+++ b/drivers/chibios/spi_master.c
@@ -0,0 +1,137 @@
1/* Copyright 2020 Nick Brassel (tzarc)
2 *
3 * This program is free software: you can redistribute it and/or modify
4 * it under the terms of the GNU General Public License as published by
5 * the Free Software Foundation, either version 3 of the License, or
6 * (at your option) any later version.
7 *
8 * This program is distributed in the hope that it will be useful,
9 * but WITHOUT ANY WARRANTY; without even the implied warranty of
10 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
11 * GNU General Public License for more details.
12 *
13 * You should have received a copy of the GNU General Public License
14 * along with this program. If not, see <https://www.gnu.org/licenses/>.
15 */
16
17#include "spi_master.h"
18#include "quantum.h"
19#include "timer.h"
20
21static pin_t currentSlavePin = NO_PIN;
22static SPIConfig spiConfig = {false, NULL, 0, 0, 0, 0};
23
24__attribute__((weak)) void spi_init(void) {
25 // Try releasing special pins for a short time
26 palSetPadMode(PAL_PORT(SPI_SCK_PIN), PAL_PAD(SPI_SCK_PIN), PAL_MODE_INPUT);
27 palSetPadMode(PAL_PORT(SPI_MOSI_PIN), PAL_PAD(SPI_MOSI_PIN), PAL_MODE_INPUT);
28 palSetPadMode(PAL_PORT(SPI_MISO_PIN), PAL_PAD(SPI_MISO_PIN), PAL_MODE_INPUT);
29
30 chThdSleepMilliseconds(10);
31#if defined(USE_GPIOV1)
32 palSetPadMode(PAL_PORT(SPI_SCK_PIN), PAL_PAD(SPI_SCK_PIN), PAL_MODE_STM32_ALTERNATE_PUSHPULL);
33 palSetPadMode(PAL_PORT(SPI_MOSI_PIN), PAL_PAD(SPI_MOSI_PIN), PAL_MODE_STM32_ALTERNATE_PUSHPULL);
34 palSetPadMode(PAL_PORT(SPI_MISO_PIN), PAL_PAD(SPI_MISO_PIN), PAL_MODE_STM32_ALTERNATE_PUSHPULL);
35#else
36 palSetPadMode(PAL_PORT(SPI_SCK_PIN), PAL_PAD(SPI_SCK_PIN), PAL_MODE_ALTERNATE(SPI_SCK_PAL_MODE) | PAL_STM32_OTYPE_PUSHPULL | PAL_STM32_OSPEED_HIGHEST);
37 palSetPadMode(PAL_PORT(SPI_MOSI_PIN), PAL_PAD(SPI_MOSI_PIN), PAL_MODE_ALTERNATE(SPI_MOSI_PAL_MODE) | PAL_STM32_OTYPE_PUSHPULL | PAL_STM32_OSPEED_HIGHEST);
38 palSetPadMode(PAL_PORT(SPI_MISO_PIN), PAL_PAD(SPI_MISO_PIN), PAL_MODE_ALTERNATE(SPI_MISO_PAL_MODE) | PAL_STM32_OTYPE_PUSHPULL | PAL_STM32_OSPEED_HIGHEST);
39#endif
40}
41
42bool spi_start(pin_t slavePin, bool lsbFirst, uint8_t mode, uint16_t divisor) {
43 if (currentSlavePin != NO_PIN || slavePin == NO_PIN) {
44 return false;
45 }
46
47 uint16_t roundedDivisor = 2;
48 while (roundedDivisor < divisor) {
49 roundedDivisor <<= 1;
50 }
51
52 if (roundedDivisor < 2 || roundedDivisor > 256) {
53 return false;
54 }
55
56 spiConfig.cr1 = 0;
57
58 if (lsbFirst) {
59 spiConfig.cr1 |= SPI_CR1_LSBFIRST;
60 }
61
62 switch (mode) {
63 case 0:
64 break;
65 case 1:
66 spiConfig.cr1 |= SPI_CR1_CPHA;
67 break;
68 case 2:
69 spiConfig.cr1 |= SPI_CR1_CPOL;
70 break;
71 case 3:
72 spiConfig.cr1 |= SPI_CR1_CPHA | SPI_CR1_CPOL;
73 break;
74 }
75
76 switch (roundedDivisor) {
77 case 2:
78 break;
79 case 4:
80 spiConfig.cr1 |= SPI_CR1_BR_0;
81 break;
82 case 8:
83 spiConfig.cr1 |= SPI_CR1_BR_1;
84 break;
85 case 16:
86 spiConfig.cr1 |= SPI_CR1_BR_1 | SPI_CR1_BR_0;
87 break;
88 case 32:
89 spiConfig.cr1 |= SPI_CR1_BR_2;
90 break;
91 case 64:
92 spiConfig.cr1 |= SPI_CR1_BR_2 | SPI_CR1_BR_0;
93 break;
94 case 128:
95 spiConfig.cr1 |= SPI_CR1_BR_2 | SPI_CR1_BR_1;
96 break;
97 case 256:
98 spiConfig.cr1 |= SPI_CR1_BR_2 | SPI_CR1_BR_1 | SPI_CR1_BR_0;
99 break;
100 }
101
102 currentSlavePin = slavePin;
103 spiConfig.ssport = PAL_PORT(slavePin);
104 spiConfig.sspad = PAL_PAD(slavePin);
105
106 setPinOutput(slavePin);
107 spiStart(&SPI_DRIVER, &spiConfig);
108 spiSelect(&SPI_DRIVER);
109
110 return true;
111}
112
113spi_status_t spi_write(uint8_t data) { return spi_transmit(&data, 1); }
114
115spi_status_t spi_read(void) {
116 uint8_t data = 0;
117 spi_receive(&data, 1);
118 return data;
119}
120
121spi_status_t spi_transmit(const uint8_t *data, uint16_t length) {
122 spiSend(&SPI_DRIVER, length, data);
123 return SPI_STATUS_SUCCESS;
124}
125
126spi_status_t spi_receive(uint8_t *data, uint16_t length) {
127 spiReceive(&SPI_DRIVER, length, data);
128 return SPI_STATUS_SUCCESS;
129}
130
131void spi_stop(void) {
132 if (currentSlavePin != NO_PIN) {
133 spiUnselect(&SPI_DRIVER);
134 spiStop(&SPI_DRIVER);
135 currentSlavePin = NO_PIN;
136 }
137}
diff --git a/drivers/chibios/spi_master.h b/drivers/chibios/spi_master.h
new file mode 100644
index 000000000..0c18587c9
--- /dev/null
+++ b/drivers/chibios/spi_master.h
@@ -0,0 +1,78 @@
1/* Copyright 2020 Nick Brassel (tzarc)
2 *
3 * This program is free software: you can redistribute it and/or modify
4 * it under the terms of the GNU General Public License as published by
5 * the Free Software Foundation, either version 3 of the License, or
6 * (at your option) any later version.
7 *
8 * This program is distributed in the hope that it will be useful,
9 * but WITHOUT ANY WARRANTY; without even the implied warranty of
10 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
11 * GNU General Public License for more details.
12 *
13 * You should have received a copy of the GNU General Public License
14 * along with this program. If not, see <https://www.gnu.org/licenses/>.
15 */
16
17#pragma once
18
19#include <ch.h>
20#include <hal.h>
21#include <quantum.h>
22
23#ifndef SPI_DRIVER
24# define SPI_DRIVER SPID2
25#endif
26
27#ifndef SPI_SCK_PIN
28# define SPI_SCK_PIN B13
29#endif
30
31#ifndef SPI_SCK_PAL_MODE
32# define SPI_SCK_PAL_MODE 5
33#endif
34
35#ifndef SPI_MOSI_PIN
36# define SPI_MOSI_PIN B15
37#endif
38
39#ifndef SPI_MOSI_PAL_MODE
40# define SPI_MOSI_PAL_MODE 5
41#endif
42
43#ifndef SPI_MISO_PIN
44# define SPI_MISO_PIN B14
45#endif
46
47#ifndef SPI_MISO_PAL_MODE
48# define SPI_MISO_PAL_MODE 5
49#endif
50
51typedef int16_t spi_status_t;
52
53#define SPI_STATUS_SUCCESS (0)
54#define SPI_STATUS_ERROR (-1)
55#define SPI_STATUS_TIMEOUT (-2)
56
57#define SPI_TIMEOUT_IMMEDIATE (0)
58#define SPI_TIMEOUT_INFINITE (0xFFFF)
59
60#ifdef __cplusplus
61extern "C" {
62#endif
63void spi_init(void);
64
65bool spi_start(pin_t slavePin, bool lsbFirst, uint8_t mode, uint16_t divisor);
66
67spi_status_t spi_write(uint8_t data);
68
69spi_status_t spi_read(void);
70
71spi_status_t spi_transmit(const uint8_t *data, uint16_t length);
72
73spi_status_t spi_receive(uint8_t *data, uint16_t length);
74
75void spi_stop(void);
76#ifdef __cplusplus
77}
78#endif
diff --git a/quantum/stm32/halconf.h b/quantum/stm32/halconf.h
index 106f0f575..533803a25 100644
--- a/quantum/stm32/halconf.h
+++ b/quantum/stm32/halconf.h
@@ -156,7 +156,7 @@
156 * @brief Enables the SPI subsystem. 156 * @brief Enables the SPI subsystem.
157 */ 157 */
158# if !defined(HAL_USE_SPI) || defined(__DOXYGEN__) 158# if !defined(HAL_USE_SPI) || defined(__DOXYGEN__)
159# define HAL_USE_SPI FALSE 159# define HAL_USE_SPI TRUE
160# endif 160# endif
161 161
162/** 162/**
diff --git a/quantum/stm32/mcuconf.h b/quantum/stm32/mcuconf.h
index ca4ad7b51..71994a98e 100644
--- a/quantum/stm32/mcuconf.h
+++ b/quantum/stm32/mcuconf.h
@@ -227,7 +227,7 @@
227 * SPI driver system settings. 227 * SPI driver system settings.
228 */ 228 */
229#define STM32_SPI_USE_SPI1 FALSE 229#define STM32_SPI_USE_SPI1 FALSE
230#define STM32_SPI_USE_SPI2 FALSE 230#define STM32_SPI_USE_SPI2 TRUE
231#define STM32_SPI_USE_SPI3 FALSE 231#define STM32_SPI_USE_SPI3 FALSE
232#define STM32_SPI_SPI1_DMA_PRIORITY 1 232#define STM32_SPI_SPI1_DMA_PRIORITY 1
233#define STM32_SPI_SPI2_DMA_PRIORITY 1 233#define STM32_SPI_SPI2_DMA_PRIORITY 1
generated by cgit v1.2.3 (git 2.25.1) at 2025-11-22 17:53:06 +0000