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-rw-r--r--keyboards/akegata_denki/device_one/boards/DEVICE_ONE/board.c263
-rw-r--r--keyboards/akegata_denki/device_one/boards/DEVICE_ONE/board.h950
-rw-r--r--keyboards/akegata_denki/device_one/boards/DEVICE_ONE/board.mk5
-rw-r--r--keyboards/akegata_denki/device_one/chconf.h711
-rw-r--r--keyboards/akegata_denki/device_one/config.h18
-rw-r--r--keyboards/akegata_denki/device_one/device_one.c1
-rw-r--r--keyboards/akegata_denki/device_one/device_one.h59
-rw-r--r--keyboards/akegata_denki/device_one/halconf.h525
-rw-r--r--keyboards/akegata_denki/device_one/info.json21
-rw-r--r--keyboards/akegata_denki/device_one/keymaps/ansi_arrow_keys/keymap.c19
-rw-r--r--keyboards/akegata_denki/device_one/keymaps/ansi_split_backspace/keymap.c19
-rw-r--r--keyboards/akegata_denki/device_one/keymaps/default/keymap.c20
-rw-r--r--keyboards/akegata_denki/device_one/keymaps/iso/keymap.c18
-rw-r--r--keyboards/akegata_denki/device_one/mcuconf.h187
-rw-r--r--keyboards/akegata_denki/device_one/readme.md15
-rw-r--r--keyboards/akegata_denki/device_one/rules.mk21
-rw-r--r--keyboards/hs60/v1/keymaps/default/keymap.c2
-rw-r--r--keyboards/vinta/vinta.c2
18 files changed, 2854 insertions, 2 deletions
diff --git a/keyboards/akegata_denki/device_one/boards/DEVICE_ONE/board.c b/keyboards/akegata_denki/device_one/boards/DEVICE_ONE/board.c
new file mode 100644
index 000000000..8e0303523
--- /dev/null
+++ b/keyboards/akegata_denki/device_one/boards/DEVICE_ONE/board.c
@@ -0,0 +1,263 @@
1/*
2 ChibiOS - Copyright (C) 2006..2018 Giovanni Di Sirio
3 Licensed under the Apache License, Version 2.0 (the "License");
4 you may not use this file except in compliance with the License.
5 You may obtain a copy of the License at
6 http://www.apache.org/licenses/LICENSE-2.0
7 Unless required by applicable law or agreed to in writing, software
8 distributed under the License is distributed on an "AS IS" BASIS,
9 WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
10 See the License for the specific language governing permissions and
11 limitations under the License.
12*/
13
14/*
15 * This file has been automatically generated using ChibiStudio board
16 * generator plugin. Do not edit manually.
17 */
18
19#include "hal.h"
20#include "stm32_gpio.h"
21
22/*===========================================================================*/
23/* Driver local definitions. */
24/*===========================================================================*/
25
26/*===========================================================================*/
27/* Driver exported variables. */
28/*===========================================================================*/
29
30/*===========================================================================*/
31/* Driver local variables and types. */
32/*===========================================================================*/
33
34/**
35 * @brief Type of STM32 GPIO port setup.
36 */
37typedef struct {
38 uint32_t moder;
39 uint32_t otyper;
40 uint32_t ospeedr;
41 uint32_t pupdr;
42 uint32_t odr;
43 uint32_t afrl;
44 uint32_t afrh;
45} gpio_setup_t;
46
47/**
48 * @brief Type of STM32 GPIO initialization data.
49 */
50typedef struct {
51#if STM32_HAS_GPIOA || defined(__DOXYGEN__)
52 gpio_setup_t PAData;
53#endif
54#if STM32_HAS_GPIOB || defined(__DOXYGEN__)
55 gpio_setup_t PBData;
56#endif
57#if STM32_HAS_GPIOC || defined(__DOXYGEN__)
58 gpio_setup_t PCData;
59#endif
60#if STM32_HAS_GPIOD || defined(__DOXYGEN__)
61 gpio_setup_t PDData;
62#endif
63#if STM32_HAS_GPIOE || defined(__DOXYGEN__)
64 gpio_setup_t PEData;
65#endif
66#if STM32_HAS_GPIOF || defined(__DOXYGEN__)
67 gpio_setup_t PFData;
68#endif
69#if STM32_HAS_GPIOG || defined(__DOXYGEN__)
70 gpio_setup_t PGData;
71#endif
72#if STM32_HAS_GPIOH || defined(__DOXYGEN__)
73 gpio_setup_t PHData;
74#endif
75#if STM32_HAS_GPIOI || defined(__DOXYGEN__)
76 gpio_setup_t PIData;
77#endif
78#if STM32_HAS_GPIOJ || defined(__DOXYGEN__)
79 gpio_setup_t PJData;
80#endif
81#if STM32_HAS_GPIOK || defined(__DOXYGEN__)
82 gpio_setup_t PKData;
83#endif
84} gpio_config_t;
85
86/**
87 * @brief STM32 GPIO static initialization data.
88 */
89static const gpio_config_t gpio_default_config = {
90#if STM32_HAS_GPIOA
91 {VAL_GPIOA_MODER, VAL_GPIOA_OTYPER, VAL_GPIOA_OSPEEDR, VAL_GPIOA_PUPDR,
92 VAL_GPIOA_ODR, VAL_GPIOA_AFRL, VAL_GPIOA_AFRH},
93#endif
94#if STM32_HAS_GPIOB
95 {VAL_GPIOB_MODER, VAL_GPIOB_OTYPER, VAL_GPIOB_OSPEEDR, VAL_GPIOB_PUPDR,
96 VAL_GPIOB_ODR, VAL_GPIOB_AFRL, VAL_GPIOB_AFRH},
97#endif
98#if STM32_HAS_GPIOC
99 {VAL_GPIOC_MODER, VAL_GPIOC_OTYPER, VAL_GPIOC_OSPEEDR, VAL_GPIOC_PUPDR,
100 VAL_GPIOC_ODR, VAL_GPIOC_AFRL, VAL_GPIOC_AFRH},
101#endif
102#if STM32_HAS_GPIOD
103 {VAL_GPIOD_MODER, VAL_GPIOD_OTYPER, VAL_GPIOD_OSPEEDR, VAL_GPIOD_PUPDR,
104 VAL_GPIOD_ODR, VAL_GPIOD_AFRL, VAL_GPIOD_AFRH},
105#endif
106#if STM32_HAS_GPIOE
107 {VAL_GPIOE_MODER, VAL_GPIOE_OTYPER, VAL_GPIOE_OSPEEDR, VAL_GPIOE_PUPDR,
108 VAL_GPIOE_ODR, VAL_GPIOE_AFRL, VAL_GPIOE_AFRH},
109#endif
110#if STM32_HAS_GPIOF
111 {VAL_GPIOF_MODER, VAL_GPIOF_OTYPER, VAL_GPIOF_OSPEEDR, VAL_GPIOF_PUPDR,
112 VAL_GPIOF_ODR, VAL_GPIOF_AFRL, VAL_GPIOF_AFRH},
113#endif
114#if STM32_HAS_GPIOG
115 {VAL_GPIOG_MODER, VAL_GPIOG_OTYPER, VAL_GPIOG_OSPEEDR, VAL_GPIOG_PUPDR,
116 VAL_GPIOG_ODR, VAL_GPIOG_AFRL, VAL_GPIOG_AFRH},
117#endif
118#if STM32_HAS_GPIOH
119 {VAL_GPIOH_MODER, VAL_GPIOH_OTYPER, VAL_GPIOH_OSPEEDR, VAL_GPIOH_PUPDR,
120 VAL_GPIOH_ODR, VAL_GPIOH_AFRL, VAL_GPIOH_AFRH},
121#endif
122#if STM32_HAS_GPIOI
123 {VAL_GPIOI_MODER, VAL_GPIOI_OTYPER, VAL_GPIOI_OSPEEDR, VAL_GPIOI_PUPDR,
124 VAL_GPIOI_ODR, VAL_GPIOI_AFRL, VAL_GPIOI_AFRH},
125#endif
126#if STM32_HAS_GPIOJ
127 {VAL_GPIOJ_MODER, VAL_GPIOJ_OTYPER, VAL_GPIOJ_OSPEEDR, VAL_GPIOJ_PUPDR,
128 VAL_GPIOJ_ODR, VAL_GPIOJ_AFRL, VAL_GPIOJ_AFRH},
129#endif
130#if STM32_HAS_GPIOK
131 {VAL_GPIOK_MODER, VAL_GPIOK_OTYPER, VAL_GPIOK_OSPEEDR, VAL_GPIOK_PUPDR,
132 VAL_GPIOK_ODR, VAL_GPIOK_AFRL, VAL_GPIOK_AFRH}
133#endif
134};
135
136/*===========================================================================*/
137/* Driver local functions. */
138/*===========================================================================*/
139
140static void gpio_init(stm32_gpio_t *gpiop, const gpio_setup_t *config) {
141
142 gpiop->OTYPER = config->otyper;
143 gpiop->OSPEEDR = config->ospeedr;
144 gpiop->PUPDR = config->pupdr;
145 gpiop->ODR = config->odr;
146 gpiop->AFRL = config->afrl;
147 gpiop->AFRH = config->afrh;
148 gpiop->MODER = config->moder;
149}
150
151static void stm32_gpio_init(void) {
152
153 /* Enabling GPIO-related clocks, the mask comes from the
154 registry header file.*/
155 rccResetAHB(STM32_GPIO_EN_MASK);
156 rccEnableAHB(STM32_GPIO_EN_MASK, true);
157
158 /* Initializing all the defined GPIO ports.*/
159#if STM32_HAS_GPIOA
160 gpio_init(GPIOA, &gpio_default_config.PAData);
161#endif
162#if STM32_HAS_GPIOB
163 gpio_init(GPIOB, &gpio_default_config.PBData);
164#endif
165#if STM32_HAS_GPIOC
166 gpio_init(GPIOC, &gpio_default_config.PCData);
167#endif
168#if STM32_HAS_GPIOD
169 gpio_init(GPIOD, &gpio_default_config.PDData);
170#endif
171#if STM32_HAS_GPIOE
172 gpio_init(GPIOE, &gpio_default_config.PEData);
173#endif
174#if STM32_HAS_GPIOF
175 gpio_init(GPIOF, &gpio_default_config.PFData);
176#endif
177#if STM32_HAS_GPIOG
178 gpio_init(GPIOG, &gpio_default_config.PGData);
179#endif
180#if STM32_HAS_GPIOH
181 gpio_init(GPIOH, &gpio_default_config.PHData);
182#endif
183#if STM32_HAS_GPIOI
184 gpio_init(GPIOI, &gpio_default_config.PIData);
185#endif
186#if STM32_HAS_GPIOJ
187 gpio_init(GPIOJ, &gpio_default_config.PJData);
188#endif
189#if STM32_HAS_GPIOK
190 gpio_init(GPIOK, &gpio_default_config.PKData);
191#endif
192}
193
194/*===========================================================================*/
195/* Driver interrupt handlers. */
196/*===========================================================================*/
197
198/*===========================================================================*/
199/* Driver exported functions. */
200/*===========================================================================*/
201
202/**
203 * @brief Early initialization code.
204 * @details GPIO ports and system clocks are initialized before everything
205 * else.
206 */
207void __early_init(void) {
208
209 stm32_gpio_init();
210 stm32_clock_init();
211}
212
213#if HAL_USE_SDC || defined(__DOXYGEN__)
214/**
215 * @brief SDC card detection.
216 */
217bool sdc_lld_is_card_inserted(SDCDriver *sdcp) {
218
219 (void)sdcp;
220 /* TODO: Fill the implementation.*/
221 return true;
222}
223
224/**
225 * @brief SDC card write protection detection.
226 */
227bool sdc_lld_is_write_protected(SDCDriver *sdcp) {
228
229 (void)sdcp;
230 /* TODO: Fill the implementation.*/
231 return false;
232}
233#endif /* HAL_USE_SDC */
234
235#if HAL_USE_MMC_SPI || defined(__DOXYGEN__)
236/**
237 * @brief MMC_SPI card detection.
238 */
239bool mmc_lld_is_card_inserted(MMCDriver *mmcp) {
240
241 (void)mmcp;
242 /* TODO: Fill the implementation.*/
243 return true;
244}
245
246/**
247 * @brief MMC_SPI card write protection detection.
248 */
249bool mmc_lld_is_write_protected(MMCDriver *mmcp) {
250
251 (void)mmcp;
252 /* TODO: Fill the implementation.*/
253 return false;
254}
255#endif
256
257/**
258 * @brief Board-specific initialization code.
259 * @todo Add your board-specific code, if any.
260 */
261void boardInit(void) {
262
263}
diff --git a/keyboards/akegata_denki/device_one/boards/DEVICE_ONE/board.h b/keyboards/akegata_denki/device_one/boards/DEVICE_ONE/board.h
new file mode 100644
index 000000000..3c4f3f2e8
--- /dev/null
+++ b/keyboards/akegata_denki/device_one/boards/DEVICE_ONE/board.h
@@ -0,0 +1,950 @@
1/*
2 ChibiOS - Copyright (C) 2006..2018 Giovanni Di Sirio
3 Licensed under the Apache License, Version 2.0 (the "License");
4 you may not use this file except in compliance with the License.
5 You may obtain a copy of the License at
6 http://www.apache.org/licenses/LICENSE-2.0
7 Unless required by applicable law or agreed to in writing, software
8 distributed under the License is distributed on an "AS IS" BASIS,
9 WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
10 See the License for the specific language governing permissions and
11 limitations under the License.
12*/
13
14/*
15 * This file has been automatically generated using ChibiStudio board
16 * generator plugin. Do not edit manually.
17 */
18
19#ifndef BOARD_H
20#define BOARD_H
21
22/*===========================================================================*/
23/* Driver constants. */
24/*===========================================================================*/
25
26/*
27 * Setup for STMicroelectronics STM32 Nucleo32-F042K6 board.
28 */
29
30/*
31 * Board identifier.
32 */
33#define BOARD_ST_NUCLEO32_F042K6
34#define BOARD_NAME "STMicroelectronics STM32 Nucleo32-F042K6"
35
36/*
37 * Board oscillators-related settings.
38 * NOTE: LSE not fitted.
39 * NOTE: HSE not fitted.
40 */
41#if !defined(STM32_LSECLK)
42#define STM32_LSECLK 0U
43#endif
44
45#define STM32_LSEDRV (3U << 3U)
46
47#if !defined(STM32_HSECLK)
48#define STM32_HSECLK 0U
49#endif
50
51/*
52 * MCU type as defined in the ST header.
53 */
54#define STM32F042x6
55
56/*
57 * IO pins assignments.
58 */
59#define GPIOA_ARD_A0 0U
60#define GPIOA_ARD_A1 1U
61#define GPIOA_VCP_TX 2U
62#define GPIOA_ARD_A2 3U
63#define GPIOA_ARD_A3 4U
64#define GPIOA_ARD_A4 5U
65#define GPIOA_ARD_A5 6U
66#define GPIOA_ARD_A6 7U
67#define GPIOA_ARD_D9 8U
68#define GPIOA_ARD_D1 9U
69#define GPIOA_ARD_D0 10U
70#define GPIOA_ARD_D10 11U
71#define GPIOA_ARD_D2 12U
72#define GPIOA_SWDIO 13U
73#define GPIOA_SWCLK 14U
74#define GPIOA_VCP_RX 15U
75
76#define GPIOB_ARD_D3 0U
77#define GPIOB_ARD_D6 1U
78#define GPIOB_PIN2 2U
79#define GPIOB_ARD_D13 3U
80#define GPIOB_LED_GREEN 3U
81#define GPIOB_ARD_D12 4U
82#define GPIOB_ARD_D11 5U
83#define GPIOB_ARD_D5 6U
84#define GPIOB_ARD_A5_ALT 6U
85#define GPIOB_ARD_D4 7U
86#define GPIOB_ARD_A4_ALT 7U
87#define GPIOB_PIN8 8U
88#define GPIOB_PIN9 9U
89#define GPIOB_PIN10 10U
90#define GPIOB_PIN11 11U
91#define GPIOB_PIN12 12U
92#define GPIOB_PIN13 13U
93#define GPIOB_PIN14 14U
94#define GPIOB_PIN15 15U
95
96#define GPIOC_PIN0 0U
97#define GPIOC_PIN1 1U
98#define GPIOC_PIN2 2U
99#define GPIOC_PIN3 3U
100#define GPIOC_PIN4 4U
101#define GPIOC_PIN5 5U
102#define GPIOC_PIN6 6U
103#define GPIOC_PIN7 7U
104#define GPIOC_PIN8 8U
105#define GPIOC_PIN9 9U
106#define GPIOC_PIN10 10U
107#define GPIOC_PIN11 11U
108#define GPIOC_PIN12 12U
109#define GPIOC_PIN13 13U
110#define GPIOC_PIN14 14U
111#define GPIOC_PIN15 15U
112
113#define GPIOD_PIN0 0U
114#define GPIOD_PIN1 1U
115#define GPIOD_PIN2 2U
116#define GPIOD_PIN3 3U
117#define GPIOD_PIN4 4U
118#define GPIOD_PIN5 5U
119#define GPIOD_PIN6 6U
120#define GPIOD_PIN7 7U
121#define GPIOD_PIN8 8U
122#define GPIOD_PIN9 9U
123#define GPIOD_PIN10 10U
124#define GPIOD_PIN11 11U
125#define GPIOD_PIN12 12U
126#define GPIOD_PIN13 13U
127#define GPIOD_PIN14 14U
128#define GPIOD_PIN15 15U
129
130#define GPIOE_PIN0 0U
131#define GPIOE_PIN1 1U
132#define GPIOE_PIN2 2U
133#define GPIOE_PIN3 3U
134#define GPIOE_PIN4 4U
135#define GPIOE_PIN5 5U
136#define GPIOE_PIN6 6U
137#define GPIOE_PIN7 7U
138#define GPIOE_PIN8 8U
139#define GPIOE_PIN9 9U
140#define GPIOE_PIN10 10U
141#define GPIOE_PIN11 11U
142#define GPIOE_PIN12 12U
143#define GPIOE_PIN13 13U
144#define GPIOE_PIN14 14U
145#define GPIOE_PIN15 15U
146
147#define GPIOF_ARD_D7 0U
148#define GPIOF_ARD_D8 1U
149#define GPIOF_PIN2 2U
150#define GPIOF_PIN3 3U
151#define GPIOF_PIN4 4U
152#define GPIOF_PIN5 5U
153#define GPIOF_PIN6 6U
154#define GPIOF_PIN7 7U
155#define GPIOF_PIN8 8U
156#define GPIOF_PIN9 9U
157#define GPIOF_PIN10 10U
158#define GPIOF_PIN11 11U
159#define GPIOF_PIN12 12U
160#define GPIOF_PIN13 13U
161#define GPIOF_PIN14 14U
162#define GPIOF_PIN15 15U
163
164/*
165 * IO lines assignments.
166 */
167#define LINE_ARD_A0 PAL_LINE(GPIOA, 0U)
168#define LINE_ARD_A1 PAL_LINE(GPIOA, 1U)
169#define LINE_VCP_TX PAL_LINE(GPIOA, 2U)
170#define LINE_ARD_A2 PAL_LINE(GPIOA, 3U)
171#define LINE_ARD_A3 PAL_LINE(GPIOA, 4U)
172#define LINE_ARD_A4 PAL_LINE(GPIOA, 5U)
173#define LINE_ARD_A5 PAL_LINE(GPIOA, 6U)
174#define LINE_ARD_A6 PAL_LINE(GPIOA, 7U)
175#define LINE_ARD_D9 PAL_LINE(GPIOA, 8U)
176#define LINE_ARD_D1 PAL_LINE(GPIOA, 9U)
177#define LINE_ARD_D0 PAL_LINE(GPIOA, 10U)
178#define LINE_ARD_D10 PAL_LINE(GPIOA, 11U)
179#define LINE_ARD_D2 PAL_LINE(GPIOA, 12U)
180#define LINE_SWDIO PAL_LINE(GPIOA, 13U)
181#define LINE_SWCLK PAL_LINE(GPIOA, 14U)
182#define LINE_VCP_RX PAL_LINE(GPIOA, 15U)
183#define LINE_ARD_D3 PAL_LINE(GPIOB, 0U)
184#define LINE_ARD_D6 PAL_LINE(GPIOB, 1U)
185#define LINE_ARD_D13 PAL_LINE(GPIOB, 3U)
186#define LINE_LED_GREEN PAL_LINE(GPIOB, 3U)
187#define LINE_ARD_D12 PAL_LINE(GPIOB, 4U)
188#define LINE_ARD_D11 PAL_LINE(GPIOB, 5U)
189#define LINE_ARD_D5 PAL_LINE(GPIOB, 6U)
190#define LINE_ARD_A5_ALT PAL_LINE(GPIOB, 6U)
191#define LINE_ARD_D4 PAL_LINE(GPIOB, 7U)
192#define LINE_ARD_A4_ALT PAL_LINE(GPIOB, 7U)
193#define LINE_ARD_D7 PAL_LINE(GPIOF, 0U)
194#define LINE_ARD_D8 PAL_LINE(GPIOF, 1U)
195
196/*===========================================================================*/
197/* Driver pre-compile time settings. */
198/*===========================================================================*/
199
200/*===========================================================================*/
201/* Derived constants and error checks. */
202/*===========================================================================*/
203
204/*===========================================================================*/
205/* Driver data structures and types. */
206/*===========================================================================*/
207
208/*===========================================================================*/
209/* Driver macros. */
210/*===========================================================================*/
211
212/*
213 * I/O ports initial setup, this configuration is established soon after reset
214 * in the initialization code.
215 * Please refer to the STM32 Reference Manual for details.
216 */
217#define PIN_MODE_INPUT(n) (0U << ((n) * 2U))
218#define PIN_MODE_OUTPUT(n) (1U << ((n) * 2U))
219#define PIN_MODE_ALTERNATE(n) (2U << ((n) * 2U))
220#define PIN_MODE_ANALOG(n) (3U << ((n) * 2U))
221#define PIN_ODR_LOW(n) (0U << (n))
222#define PIN_ODR_HIGH(n) (1U << (n))
223#define PIN_OTYPE_PUSHPULL(n) (0U << (n))
224#define PIN_OTYPE_OPENDRAIN(n) (1U << (n))
225#define PIN_OSPEED_VERYLOW(n) (0U << ((n) * 2U))
226#define PIN_OSPEED_LOW(n) (1U << ((n) * 2U))
227#define PIN_OSPEED_MEDIUM(n) (2U << ((n) * 2U))
228#define PIN_OSPEED_HIGH(n) (3U << ((n) * 2U))
229#define PIN_PUPDR_FLOATING(n) (0U << ((n) * 2U))
230#define PIN_PUPDR_PULLUP(n) (1U << ((n) * 2U))
231#define PIN_PUPDR_PULLDOWN(n) (2U << ((n) * 2U))
232#define PIN_AFIO_AF(n, v) ((v) << (((n) % 8U) * 4U))
233
234/*
235 * GPIOA setup:
236 *
237 * PA0 - ARD_A0 (input pullup).
238 * PA1 - ARD_A1 (input pullup).
239 * PA2 - VCP_TX (alternate 1).
240 * PA3 - ARD_A2 (input pullup).
241 * PA4 - ARD_A3 (input pullup).
242 * PA5 - ARD_A4 (input pullup).
243 * PA6 - ARD_A5 (input pullup).
244 * PA7 - ARD_A6 (input pullup).
245 * PA8 - ARD_D9 (input pullup).
246 * PA9 - ARD_D1 (input pullup).
247 * PA10 - ARD_D0 (input pullup).
248 * PA11 - ARD_D10 (input pullup).
249 * PA12 - ARD_D2 (input pullup).
250 * PA13 - SWDIO (alternate 0).
251 * PA14 - SWCLK (alternate 0).
252 * PA15 - VCP_RX (alternate 1).
253 */
254#define VAL_GPIOA_MODER (PIN_MODE_INPUT(GPIOA_ARD_A0) | \
255 PIN_MODE_INPUT(GPIOA_ARD_A1) | \
256 PIN_MODE_ALTERNATE(GPIOA_VCP_TX) | \
257 PIN_MODE_INPUT(GPIOA_ARD_A2) | \
258 PIN_MODE_INPUT(GPIOA_ARD_A3) | \
259 PIN_MODE_INPUT(GPIOA_ARD_A4) | \
260 PIN_MODE_INPUT(GPIOA_ARD_A5) | \
261 PIN_MODE_INPUT(GPIOA_ARD_A6) | \
262 PIN_MODE_INPUT(GPIOA_ARD_D9) | \
263 PIN_MODE_INPUT(GPIOA_ARD_D1) | \
264 PIN_MODE_INPUT(GPIOA_ARD_D0) | \
265 PIN_MODE_INPUT(GPIOA_ARD_D10) | \
266 PIN_MODE_INPUT(GPIOA_ARD_D2) | \
267 PIN_MODE_ALTERNATE(GPIOA_SWDIO) | \
268 PIN_MODE_ALTERNATE(GPIOA_SWCLK) | \
269 PIN_MODE_ALTERNATE(GPIOA_VCP_RX))
270#define VAL_GPIOA_OTYPER (PIN_OTYPE_PUSHPULL(GPIOA_ARD_A0) | \
271 PIN_OTYPE_PUSHPULL(GPIOA_ARD_A1) | \
272 PIN_OTYPE_PUSHPULL(GPIOA_VCP_TX) | \
273 PIN_OTYPE_PUSHPULL(GPIOA_ARD_A2) | \
274 PIN_OTYPE_PUSHPULL(GPIOA_ARD_A3) | \
275 PIN_OTYPE_PUSHPULL(GPIOA_ARD_A4) | \
276 PIN_OTYPE_PUSHPULL(GPIOA_ARD_A5) | \
277 PIN_OTYPE_PUSHPULL(GPIOA_ARD_A6) | \
278 PIN_OTYPE_PUSHPULL(GPIOA_ARD_D9) | \
279 PIN_OTYPE_PUSHPULL(GPIOA_ARD_D1) | \
280 PIN_OTYPE_PUSHPULL(GPIOA_ARD_D0) | \
281 PIN_OTYPE_PUSHPULL(GPIOA_ARD_D10) | \
282 PIN_OTYPE_PUSHPULL(GPIOA_ARD_D2) | \
283 PIN_OTYPE_PUSHPULL(GPIOA_SWDIO) | \
284 PIN_OTYPE_PUSHPULL(GPIOA_SWCLK) | \
285 PIN_OTYPE_PUSHPULL(GPIOA_VCP_RX))
286#define VAL_GPIOA_OSPEEDR (PIN_OSPEED_HIGH(GPIOA_ARD_A0) | \
287 PIN_OSPEED_HIGH(GPIOA_ARD_A1) | \
288 PIN_OSPEED_LOW(GPIOA_VCP_TX) | \
289 PIN_OSPEED_LOW(GPIOA_ARD_A2) | \
290 PIN_OSPEED_HIGH(GPIOA_ARD_A3) | \
291 PIN_OSPEED_LOW(GPIOA_ARD_A4) | \
292 PIN_OSPEED_HIGH(GPIOA_ARD_A5) | \
293 PIN_OSPEED_HIGH(GPIOA_ARD_A6) | \
294 PIN_OSPEED_HIGH(GPIOA_ARD_D9) | \
295 PIN_OSPEED_HIGH(GPIOA_ARD_D1) | \
296 PIN_OSPEED_HIGH(GPIOA_ARD_D0) | \
297 PIN_OSPEED_HIGH(GPIOA_ARD_D10) | \
298 PIN_OSPEED_HIGH(GPIOA_ARD_D2) | \
299 PIN_OSPEED_HIGH(GPIOA_SWDIO) | \
300 PIN_OSPEED_HIGH(GPIOA_SWCLK) | \
301 PIN_OSPEED_HIGH(GPIOA_VCP_RX))
302#define VAL_GPIOA_PUPDR (PIN_PUPDR_PULLUP(GPIOA_ARD_A0) | \
303 PIN_PUPDR_PULLUP(GPIOA_ARD_A1) | \
304 PIN_PUPDR_FLOATING(GPIOA_VCP_TX) | \
305 PIN_PUPDR_PULLUP(GPIOA_ARD_A2) | \
306 PIN_PUPDR_PULLUP(GPIOA_ARD_A3) | \
307 PIN_PUPDR_PULLUP(GPIOA_ARD_A4) | \
308 PIN_PUPDR_PULLUP(GPIOA_ARD_A5) | \
309 PIN_PUPDR_PULLUP(GPIOA_ARD_A6) | \
310 PIN_PUPDR_PULLUP(GPIOA_ARD_D9) | \
311 PIN_PUPDR_PULLUP(GPIOA_ARD_D1) | \
312 PIN_PUPDR_PULLUP(GPIOA_ARD_D0) | \
313 PIN_PUPDR_PULLUP(GPIOA_ARD_D10) | \
314 PIN_PUPDR_PULLUP(GPIOA_ARD_D2) | \
315 PIN_PUPDR_PULLUP(GPIOA_SWDIO) | \
316 PIN_PUPDR_PULLDOWN(GPIOA_SWCLK) | \
317 PIN_PUPDR_FLOATING(GPIOA_VCP_RX))
318#define VAL_GPIOA_ODR (PIN_ODR_HIGH(GPIOA_ARD_A0) | \
319 PIN_ODR_HIGH(GPIOA_ARD_A1) | \
320 PIN_ODR_HIGH(GPIOA_VCP_TX) | \
321 PIN_ODR_HIGH(GPIOA_ARD_A2) | \
322 PIN_ODR_HIGH(GPIOA_ARD_A3) | \
323 PIN_ODR_LOW(GPIOA_ARD_A4) | \
324 PIN_ODR_HIGH(GPIOA_ARD_A5) | \
325 PIN_ODR_HIGH(GPIOA_ARD_A6) | \
326 PIN_ODR_HIGH(GPIOA_ARD_D9) | \
327 PIN_ODR_HIGH(GPIOA_ARD_D1) | \
328 PIN_ODR_HIGH(GPIOA_ARD_D0) | \
329 PIN_ODR_HIGH(GPIOA_ARD_D10) | \
330 PIN_ODR_HIGH(GPIOA_ARD_D2) | \
331 PIN_ODR_HIGH(GPIOA_SWDIO) | \
332 PIN_ODR_HIGH(GPIOA_SWCLK) | \
333 PIN_ODR_HIGH(GPIOA_VCP_RX))
334#define VAL_GPIOA_AFRL (PIN_AFIO_AF(GPIOA_ARD_A0, 0U) | \
335 PIN_AFIO_AF(GPIOA_ARD_A1, 0U) | \
336 PIN_AFIO_AF(GPIOA_VCP_TX, 1U) | \
337 PIN_AFIO_AF(GPIOA_ARD_A2, 0U) | \
338 PIN_AFIO_AF(GPIOA_ARD_A3, 0U) | \
339 PIN_AFIO_AF(GPIOA_ARD_A4, 0U) | \
340 PIN_AFIO_AF(GPIOA_ARD_A5, 0U) | \
341 PIN_AFIO_AF(GPIOA_ARD_A6, 0U))
342#define VAL_GPIOA_AFRH (PIN_AFIO_AF(GPIOA_ARD_D9, 0U) | \
343 PIN_AFIO_AF(GPIOA_ARD_D1, 0U) | \
344 PIN_AFIO_AF(GPIOA_ARD_D0, 0U) | \
345 PIN_AFIO_AF(GPIOA_ARD_D10, 0U) | \
346 PIN_AFIO_AF(GPIOA_ARD_D2, 0U) | \
347 PIN_AFIO_AF(GPIOA_SWDIO, 0U) | \
348 PIN_AFIO_AF(GPIOA_SWCLK, 0U) | \
349 PIN_AFIO_AF(GPIOA_VCP_RX, 1U))
350
351/*
352 * GPIOB setup:
353 *
354 * PB0 - ARD_D3 (input pullup).
355 * PB1 - ARD_D6 (input pullup).
356 * PB2 - PIN2 (input pullup).
357 * PB3 - ARD_D13 LED_GREEN (output pushpull maximum).
358 * PB4 - ARD_D12 (input pullup).
359 * PB5 - ARD_D11 (input pullup).
360 * PB6 - ARD_D5 ARD_A5_ALT (input pullup).
361 * PB7 - ARD_D4 ARD_A4_ALT (input pullup).
362 * PB8 - PIN8 (input pullup).
363 * PB9 - PIN9 (input pullup).
364 * PB10 - PIN10 (input pullup).
365 * PB11 - PIN11 (input pullup).
366 * PB12 - PIN12 (input pullup).
367 * PB13 - PIN13 (input pullup).
368 * PB14 - PIN14 (input pullup).
369 * PB15 - PIN15 (input pullup).
370 */
371#define VAL_GPIOB_MODER (PIN_MODE_INPUT(GPIOB_ARD_D3) | \
372 PIN_MODE_INPUT(GPIOB_ARD_D6) | \
373 PIN_MODE_INPUT(GPIOB_PIN2) | \
374 PIN_MODE_OUTPUT(GPIOB_ARD_D13) | \
375 PIN_MODE_INPUT(GPIOB_ARD_D12) | \
376 PIN_MODE_INPUT(GPIOB_ARD_D11) | \
377 PIN_MODE_INPUT(GPIOB_ARD_D5) | \
378 PIN_MODE_INPUT(GPIOB_ARD_D4) | \
379 PIN_MODE_INPUT(GPIOB_PIN8) | \
380 PIN_MODE_INPUT(GPIOB_PIN9) | \
381 PIN_MODE_INPUT(GPIOB_PIN10) | \
382 PIN_MODE_INPUT(GPIOB_PIN11) | \
383 PIN_MODE_INPUT(GPIOB_PIN12) | \
384 PIN_MODE_INPUT(GPIOB_PIN13) | \
385 PIN_MODE_INPUT(GPIOB_PIN14) | \
386 PIN_MODE_INPUT(GPIOB_PIN15))
387#define VAL_GPIOB_OTYPER (PIN_OTYPE_PUSHPULL(GPIOB_ARD_D3) | \
388 PIN_OTYPE_PUSHPULL(GPIOB_ARD_D6) | \
389 PIN_OTYPE_PUSHPULL(GPIOB_PIN2) | \
390 PIN_OTYPE_PUSHPULL(GPIOB_ARD_D13) | \
391 PIN_OTYPE_PUSHPULL(GPIOB_ARD_D12) | \
392 PIN_OTYPE_PUSHPULL(GPIOB_ARD_D11) | \
393 PIN_OTYPE_PUSHPULL(GPIOB_ARD_D5) | \
394 PIN_OTYPE_PUSHPULL(GPIOB_ARD_D4) | \
395 PIN_OTYPE_PUSHPULL(GPIOB_PIN8) | \
396 PIN_OTYPE_PUSHPULL(GPIOB_PIN9) | \
397 PIN_OTYPE_PUSHPULL(GPIOB_PIN10) | \
398 PIN_OTYPE_PUSHPULL(GPIOB_PIN11) | \
399 PIN_OTYPE_PUSHPULL(GPIOB_PIN12) | \
400 PIN_OTYPE_PUSHPULL(GPIOB_PIN13) | \
401 PIN_OTYPE_PUSHPULL(GPIOB_PIN14) | \
402 PIN_OTYPE_PUSHPULL(GPIOB_PIN15))
403#define VAL_GPIOB_OSPEEDR (PIN_OSPEED_HIGH(GPIOB_ARD_D3) | \
404 PIN_OSPEED_HIGH(GPIOB_ARD_D6) | \
405 PIN_OSPEED_HIGH(GPIOB_PIN2) | \
406 PIN_OSPEED_HIGH(GPIOB_ARD_D13) | \
407 PIN_OSPEED_HIGH(GPIOB_ARD_D12) | \
408 PIN_OSPEED_HIGH(GPIOB_ARD_D11) | \
409 PIN_OSPEED_HIGH(GPIOB_ARD_D5) | \
410 PIN_OSPEED_HIGH(GPIOB_ARD_D4) | \
411 PIN_OSPEED_HIGH(GPIOB_PIN8) | \
412 PIN_OSPEED_HIGH(GPIOB_PIN9) | \
413 PIN_OSPEED_HIGH(GPIOB_PIN10) | \
414 PIN_OSPEED_HIGH(GPIOB_PIN11) | \
415 PIN_OSPEED_HIGH(GPIOB_PIN12) | \
416 PIN_OSPEED_HIGH(GPIOB_PIN13) | \
417 PIN_OSPEED_HIGH(GPIOB_PIN14) | \
418 PIN_OSPEED_HIGH(GPIOB_PIN15))
419#define VAL_GPIOB_PUPDR (PIN_PUPDR_PULLUP(GPIOB_ARD_D3) | \
420 PIN_PUPDR_PULLUP(GPIOB_ARD_D6) | \
421 PIN_PUPDR_PULLUP(GPIOB_PIN2) | \
422 PIN_PUPDR_FLOATING(GPIOB_ARD_D13) | \
423 PIN_PUPDR_PULLUP(GPIOB_ARD_D12) | \
424 PIN_PUPDR_PULLUP(GPIOB_ARD_D11) | \
425 PIN_PUPDR_PULLUP(GPIOB_ARD_D5) | \
426 PIN_PUPDR_PULLUP(GPIOB_ARD_D4) | \
427 PIN_PUPDR_PULLUP(GPIOB_PIN8) | \
428 PIN_PUPDR_PULLUP(GPIOB_PIN9) | \
429 PIN_PUPDR_PULLUP(GPIOB_PIN10) | \
430 PIN_PUPDR_PULLUP(GPIOB_PIN11) | \
431 PIN_PUPDR_PULLUP(GPIOB_PIN12) | \
432 PIN_PUPDR_PULLUP(GPIOB_PIN13) | \
433 PIN_PUPDR_PULLUP(GPIOB_PIN14) | \
434 PIN_PUPDR_PULLUP(GPIOB_PIN15))
435#define VAL_GPIOB_ODR (PIN_ODR_HIGH(GPIOB_ARD_D3) | \
436 PIN_ODR_HIGH(GPIOB_ARD_D6) | \
437 PIN_ODR_HIGH(GPIOB_PIN2) | \
438 PIN_ODR_LOW(GPIOB_ARD_D13) | \
439 PIN_ODR_HIGH(GPIOB_ARD_D12) | \
440 PIN_ODR_HIGH(GPIOB_ARD_D11) | \
441 PIN_ODR_HIGH(GPIOB_ARD_D5) | \
442 PIN_ODR_HIGH(GPIOB_ARD_D4) | \
443 PIN_ODR_HIGH(GPIOB_PIN8) | \
444 PIN_ODR_HIGH(GPIOB_PIN9) | \
445 PIN_ODR_HIGH(GPIOB_PIN10) | \
446 PIN_ODR_HIGH(GPIOB_PIN11) | \
447 PIN_ODR_HIGH(GPIOB_PIN12) | \
448 PIN_ODR_HIGH(GPIOB_PIN13) | \
449 PIN_ODR_HIGH(GPIOB_PIN14) | \
450 PIN_ODR_HIGH(GPIOB_PIN15))
451#define VAL_GPIOB_AFRL (PIN_AFIO_AF(GPIOB_ARD_D3, 0U) | \
452 PIN_AFIO_AF(GPIOB_ARD_D6, 0U) | \
453 PIN_AFIO_AF(GPIOB_PIN2, 0U) | \
454 PIN_AFIO_AF(GPIOB_ARD_D13, 0U) | \
455 PIN_AFIO_AF(GPIOB_ARD_D12, 0U) | \
456 PIN_AFIO_AF(GPIOB_ARD_D11, 0U) | \
457 PIN_AFIO_AF(GPIOB_ARD_D5, 0U) | \
458 PIN_AFIO_AF(GPIOB_ARD_D4, 0U))
459#define VAL_GPIOB_AFRH (PIN_AFIO_AF(GPIOB_PIN8, 0U) | \
460 PIN_AFIO_AF(GPIOB_PIN9, 0U) | \
461 PIN_AFIO_AF(GPIOB_PIN10, 0U) | \
462 PIN_AFIO_AF(GPIOB_PIN11, 0U) | \
463 PIN_AFIO_AF(GPIOB_PIN12, 0U) | \
464 PIN_AFIO_AF(GPIOB_PIN13, 0U) | \
465 PIN_AFIO_AF(GPIOB_PIN14, 0U) | \
466 PIN_AFIO_AF(GPIOB_PIN15, 0U))
467
468/*
469 * GPIOC setup:
470 *
471 * PC0 - PIN0 (input pullup).
472 * PC1 - PIN1 (input pullup).
473 * PC2 - PIN2 (input pullup).
474 * PC3 - PIN3 (input pullup).
475 * PC4 - PIN4 (input pullup).
476 * PC5 - PIN5 (input pullup).
477 * PC6 - PIN6 (input pullup).
478 * PC7 - PIN7 (input pullup).
479 * PC8 - PIN8 (input pullup).
480 * PC9 - PIN9 (input pullup).
481 * PC10 - PIN10 (input pullup).
482 * PC11 - PIN11 (input pullup).
483 * PC12 - PIN12 (input pullup).
484 * PC13 - PIN13 (input pullup).
485 * PC14 - PIN14 (input pullup).
486 * PC15 - PIN15 (input pullup).
487 */
488#define VAL_GPIOC_MODER (PIN_MODE_INPUT(GPIOC_PIN0) | \
489 PIN_MODE_INPUT(GPIOC_PIN1) | \
490 PIN_MODE_INPUT(GPIOC_PIN2) | \
491 PIN_MODE_INPUT(GPIOC_PIN3) | \
492 PIN_MODE_INPUT(GPIOC_PIN4) | \
493 PIN_MODE_INPUT(GPIOC_PIN5) | \
494 PIN_MODE_INPUT(GPIOC_PIN6) | \
495 PIN_MODE_INPUT(GPIOC_PIN7) | \
496 PIN_MODE_INPUT(GPIOC_PIN8) | \
497 PIN_MODE_INPUT(GPIOC_PIN9) | \
498 PIN_MODE_INPUT(GPIOC_PIN10) | \
499 PIN_MODE_INPUT(GPIOC_PIN11) | \
500 PIN_MODE_INPUT(GPIOC_PIN12) | \
501 PIN_MODE_INPUT(GPIOC_PIN13) | \
502 PIN_MODE_INPUT(GPIOC_PIN14) | \
503 PIN_MODE_INPUT(GPIOC_PIN15))
504#define VAL_GPIOC_OTYPER (PIN_OTYPE_PUSHPULL(GPIOC_PIN0) | \
505 PIN_OTYPE_PUSHPULL(GPIOC_PIN1) | \
506 PIN_OTYPE_PUSHPULL(GPIOC_PIN2) | \
507 PIN_OTYPE_PUSHPULL(GPIOC_PIN3) | \
508 PIN_OTYPE_PUSHPULL(GPIOC_PIN4) | \
509 PIN_OTYPE_PUSHPULL(GPIOC_PIN5) | \
510 PIN_OTYPE_PUSHPULL(GPIOC_PIN6) | \
511 PIN_OTYPE_PUSHPULL(GPIOC_PIN7) | \
512 PIN_OTYPE_PUSHPULL(GPIOC_PIN8) | \
513 PIN_OTYPE_PUSHPULL(GPIOC_PIN9) | \
514 PIN_OTYPE_PUSHPULL(GPIOC_PIN10) | \
515 PIN_OTYPE_PUSHPULL(GPIOC_PIN11) | \
516 PIN_OTYPE_PUSHPULL(GPIOC_PIN12) | \
517 PIN_OTYPE_PUSHPULL(GPIOC_PIN13) | \
518 PIN_OTYPE_PUSHPULL(GPIOC_PIN14) | \
519 PIN_OTYPE_PUSHPULL(GPIOC_PIN15))
520#define VAL_GPIOC_OSPEEDR (PIN_OSPEED_HIGH(GPIOC_PIN0) | \
521 PIN_OSPEED_HIGH(GPIOC_PIN1) | \
522 PIN_OSPEED_HIGH(GPIOC_PIN2) | \
523 PIN_OSPEED_HIGH(GPIOC_PIN3) | \
524 PIN_OSPEED_HIGH(GPIOC_PIN4) | \
525 PIN_OSPEED_HIGH(GPIOC_PIN5) | \
526 PIN_OSPEED_HIGH(GPIOC_PIN6) | \
527 PIN_OSPEED_HIGH(GPIOC_PIN7) | \
528 PIN_OSPEED_HIGH(GPIOC_PIN8) | \
529 PIN_OSPEED_HIGH(GPIOC_PIN9) | \
530 PIN_OSPEED_HIGH(GPIOC_PIN10) | \
531 PIN_OSPEED_HIGH(GPIOC_PIN11) | \
532 PIN_OSPEED_HIGH(GPIOC_PIN12) | \
533 PIN_OSPEED_HIGH(GPIOC_PIN13) | \
534 PIN_OSPEED_HIGH(GPIOC_PIN14) | \
535 PIN_OSPEED_HIGH(GPIOC_PIN15))
536#define VAL_GPIOC_PUPDR (PIN_PUPDR_PULLUP(GPIOC_PIN0) | \
537 PIN_PUPDR_PULLUP(GPIOC_PIN1) | \
538 PIN_PUPDR_PULLUP(GPIOC_PIN2) | \
539 PIN_PUPDR_PULLUP(GPIOC_PIN3) | \
540 PIN_PUPDR_PULLUP(GPIOC_PIN4) | \
541 PIN_PUPDR_PULLUP(GPIOC_PIN5) | \
542 PIN_PUPDR_PULLUP(GPIOC_PIN6) | \
543 PIN_PUPDR_PULLUP(GPIOC_PIN7) | \
544 PIN_PUPDR_PULLUP(GPIOC_PIN8) | \
545 PIN_PUPDR_PULLUP(GPIOC_PIN9) | \
546 PIN_PUPDR_PULLUP(GPIOC_PIN10) | \
547 PIN_PUPDR_PULLUP(GPIOC_PIN11) | \
548 PIN_PUPDR_PULLUP(GPIOC_PIN12) | \
549 PIN_PUPDR_PULLUP(GPIOC_PIN13) | \
550 PIN_PUPDR_PULLUP(GPIOC_PIN14) | \
551 PIN_PUPDR_PULLUP(GPIOC_PIN15))
552#define VAL_GPIOC_ODR (PIN_ODR_HIGH(GPIOC_PIN0) | \
553 PIN_ODR_HIGH(GPIOC_PIN1) | \
554 PIN_ODR_HIGH(GPIOC_PIN2) | \
555 PIN_ODR_HIGH(GPIOC_PIN3) | \
556 PIN_ODR_HIGH(GPIOC_PIN4) | \
557 PIN_ODR_HIGH(GPIOC_PIN5) | \
558 PIN_ODR_HIGH(GPIOC_PIN6) | \
559 PIN_ODR_HIGH(GPIOC_PIN7) | \
560 PIN_ODR_HIGH(GPIOC_PIN8) | \
561 PIN_ODR_HIGH(GPIOC_PIN9) | \
562 PIN_ODR_HIGH(GPIOC_PIN10) | \
563 PIN_ODR_HIGH(GPIOC_PIN11) | \
564 PIN_ODR_HIGH(GPIOC_PIN12) | \
565 PIN_ODR_HIGH(GPIOC_PIN13) | \
566 PIN_ODR_HIGH(GPIOC_PIN14) | \
567 PIN_ODR_HIGH(GPIOC_PIN15))
568#define VAL_GPIOC_AFRL (PIN_AFIO_AF(GPIOC_PIN0, 0U) | \
569 PIN_AFIO_AF(GPIOC_PIN1, 0U) | \
570 PIN_AFIO_AF(GPIOC_PIN2, 0U) | \
571 PIN_AFIO_AF(GPIOC_PIN3, 0U) | \
572 PIN_AFIO_AF(GPIOC_PIN4, 0U) | \
573 PIN_AFIO_AF(GPIOC_PIN5, 0U) | \
574 PIN_AFIO_AF(GPIOC_PIN6, 0U) | \
575 PIN_AFIO_AF(GPIOC_PIN7, 0U))
576#define VAL_GPIOC_AFRH (PIN_AFIO_AF(GPIOC_PIN8, 0U) | \
577 PIN_AFIO_AF(GPIOC_PIN9, 0U) | \
578 PIN_AFIO_AF(GPIOC_PIN10, 0U) | \
579 PIN_AFIO_AF(GPIOC_PIN11, 0U) | \
580 PIN_AFIO_AF(GPIOC_PIN12, 0U) | \
581 PIN_AFIO_AF(GPIOC_PIN13, 0U) | \
582 PIN_AFIO_AF(GPIOC_PIN14, 0U) | \
583 PIN_AFIO_AF(GPIOC_PIN15, 0U))
584
585/*
586 * GPIOD setup:
587 *
588 * PD0 - PIN0 (input pullup).
589 * PD1 - PIN1 (input pullup).
590 * PD2 - PIN2 (input pullup).
591 * PD3 - PIN3 (input pullup).
592 * PD4 - PIN4 (input pullup).
593 * PD5 - PIN5 (input pullup).
594 * PD6 - PIN6 (input pullup).
595 * PD7 - PIN7 (input pullup).
596 * PD8 - PIN8 (input pullup).
597 * PD9 - PIN9 (input pullup).
598 * PD10 - PIN10 (input pullup).
599 * PD11 - PIN11 (input pullup).
600 * PD12 - PIN12 (input pullup).
601 * PD13 - PIN13 (input pullup).
602 * PD14 - PIN14 (input pullup).
603 * PD15 - PIN15 (input pullup).
604 */
605#define VAL_GPIOD_MODER (PIN_MODE_INPUT(GPIOD_PIN0) | \
606 PIN_MODE_INPUT(GPIOD_PIN1) | \
607 PIN_MODE_INPUT(GPIOD_PIN2) | \
608 PIN_MODE_INPUT(GPIOD_PIN3) | \
609 PIN_MODE_INPUT(GPIOD_PIN4) | \
610 PIN_MODE_INPUT(GPIOD_PIN5) | \
611 PIN_MODE_INPUT(GPIOD_PIN6) | \
612 PIN_MODE_INPUT(GPIOD_PIN7) | \
613 PIN_MODE_INPUT(GPIOD_PIN8) | \
614 PIN_MODE_INPUT(GPIOD_PIN9) | \
615 PIN_MODE_INPUT(GPIOD_PIN10) | \
616 PIN_MODE_INPUT(GPIOD_PIN11) | \
617 PIN_MODE_INPUT(GPIOD_PIN12) | \
618 PIN_MODE_INPUT(GPIOD_PIN13) | \
619 PIN_MODE_INPUT(GPIOD_PIN14) | \
620 PIN_MODE_INPUT(GPIOD_PIN15))
621#define VAL_GPIOD_OTYPER (PIN_OTYPE_PUSHPULL(GPIOD_PIN0) | \
622 PIN_OTYPE_PUSHPULL(GPIOD_PIN1) | \
623 PIN_OTYPE_PUSHPULL(GPIOD_PIN2) | \
624 PIN_OTYPE_PUSHPULL(GPIOD_PIN3) | \
625 PIN_OTYPE_PUSHPULL(GPIOD_PIN4) | \
626 PIN_OTYPE_PUSHPULL(GPIOD_PIN5) | \
627 PIN_OTYPE_PUSHPULL(GPIOD_PIN6) | \
628 PIN_OTYPE_PUSHPULL(GPIOD_PIN7) | \
629 PIN_OTYPE_PUSHPULL(GPIOD_PIN8) | \
630 PIN_OTYPE_PUSHPULL(GPIOD_PIN9) | \
631 PIN_OTYPE_PUSHPULL(GPIOD_PIN10) | \
632 PIN_OTYPE_PUSHPULL(GPIOD_PIN11) | \
633 PIN_OTYPE_PUSHPULL(GPIOD_PIN12) | \
634 PIN_OTYPE_PUSHPULL(GPIOD_PIN13) | \
635 PIN_OTYPE_PUSHPULL(GPIOD_PIN14) | \
636 PIN_OTYPE_PUSHPULL(GPIOD_PIN15))
637#define VAL_GPIOD_OSPEEDR (PIN_OSPEED_HIGH(GPIOD_PIN0) | \
638 PIN_OSPEED_HIGH(GPIOD_PIN1) | \
639 PIN_OSPEED_HIGH(GPIOD_PIN2) | \
640 PIN_OSPEED_HIGH(GPIOD_PIN3) | \
641 PIN_OSPEED_HIGH(GPIOD_PIN4) | \
642 PIN_OSPEED_HIGH(GPIOD_PIN5) | \
643 PIN_OSPEED_HIGH(GPIOD_PIN6) | \
644 PIN_OSPEED_HIGH(GPIOD_PIN7) | \
645 PIN_OSPEED_HIGH(GPIOD_PIN8) | \
646 PIN_OSPEED_HIGH(GPIOD_PIN9) | \
647 PIN_OSPEED_HIGH(GPIOD_PIN10) | \
648 PIN_OSPEED_HIGH(GPIOD_PIN11) | \
649 PIN_OSPEED_HIGH(GPIOD_PIN12) | \
650 PIN_OSPEED_HIGH(GPIOD_PIN13) | \
651 PIN_OSPEED_HIGH(GPIOD_PIN14) | \
652 PIN_OSPEED_HIGH(GPIOD_PIN15))
653#define VAL_GPIOD_PUPDR (PIN_PUPDR_PULLUP(GPIOD_PIN0) | \
654 PIN_PUPDR_PULLUP(GPIOD_PIN1) | \
655 PIN_PUPDR_PULLUP(GPIOD_PIN2) | \
656 PIN_PUPDR_PULLUP(GPIOD_PIN3) | \
657 PIN_PUPDR_PULLUP(GPIOD_PIN4) | \
658 PIN_PUPDR_PULLUP(GPIOD_PIN5) | \
659 PIN_PUPDR_PULLUP(GPIOD_PIN6) | \
660 PIN_PUPDR_PULLUP(GPIOD_PIN7) | \
661 PIN_PUPDR_PULLUP(GPIOD_PIN8) | \
662 PIN_PUPDR_PULLUP(GPIOD_PIN9) | \
663 PIN_PUPDR_PULLUP(GPIOD_PIN10) | \
664 PIN_PUPDR_PULLUP(GPIOD_PIN11) | \
665 PIN_PUPDR_PULLUP(GPIOD_PIN12) | \
666 PIN_PUPDR_PULLUP(GPIOD_PIN13) | \
667 PIN_PUPDR_PULLUP(GPIOD_PIN14) | \
668 PIN_PUPDR_PULLUP(GPIOD_PIN15))
669#define VAL_GPIOD_ODR (PIN_ODR_HIGH(GPIOD_PIN0) | \
670 PIN_ODR_HIGH(GPIOD_PIN1) | \
671 PIN_ODR_HIGH(GPIOD_PIN2) | \
672 PIN_ODR_HIGH(GPIOD_PIN3) | \
673 PIN_ODR_HIGH(GPIOD_PIN4) | \
674 PIN_ODR_HIGH(GPIOD_PIN5) | \
675 PIN_ODR_HIGH(GPIOD_PIN6) | \
676 PIN_ODR_HIGH(GPIOD_PIN7) | \
677 PIN_ODR_HIGH(GPIOD_PIN8) | \
678 PIN_ODR_HIGH(GPIOD_PIN9) | \
679 PIN_ODR_HIGH(GPIOD_PIN10) | \
680 PIN_ODR_HIGH(GPIOD_PIN11) | \
681 PIN_ODR_HIGH(GPIOD_PIN12) | \
682 PIN_ODR_HIGH(GPIOD_PIN13) | \
683 PIN_ODR_HIGH(GPIOD_PIN14) | \
684 PIN_ODR_HIGH(GPIOD_PIN15))
685#define VAL_GPIOD_AFRL (PIN_AFIO_AF(GPIOD_PIN0, 0U) | \
686 PIN_AFIO_AF(GPIOD_PIN1, 0U) | \
687 PIN_AFIO_AF(GPIOD_PIN2, 0U) | \
688 PIN_AFIO_AF(GPIOD_PIN3, 0U) | \
689 PIN_AFIO_AF(GPIOD_PIN4, 0U) | \
690 PIN_AFIO_AF(GPIOD_PIN5, 0U) | \
691 PIN_AFIO_AF(GPIOD_PIN6, 0U) | \
692 PIN_AFIO_AF(GPIOD_PIN7, 0U))
693#define VAL_GPIOD_AFRH (PIN_AFIO_AF(GPIOD_PIN8, 0U) | \
694 PIN_AFIO_AF(GPIOD_PIN9, 0U) | \
695 PIN_AFIO_AF(GPIOD_PIN10, 0U) | \
696 PIN_AFIO_AF(GPIOD_PIN11, 0U) | \
697 PIN_AFIO_AF(GPIOD_PIN12, 0U) | \
698 PIN_AFIO_AF(GPIOD_PIN13, 0U) | \
699 PIN_AFIO_AF(GPIOD_PIN14, 0U) | \
700 PIN_AFIO_AF(GPIOD_PIN15, 0U))
701
702/*
703 * GPIOE setup:
704 *
705 * PE0 - PIN0 (input pullup).
706 * PE1 - PIN1 (input pullup).
707 * PE2 - PIN2 (input pullup).
708 * PE3 - PIN3 (input pullup).
709 * PE4 - PIN4 (input pullup).
710 * PE5 - PIN5 (input pullup).
711 * PE6 - PIN6 (input pullup).
712 * PE7 - PIN7 (input pullup).
713 * PE8 - PIN8 (input pullup).
714 * PE9 - PIN9 (input pullup).
715 * PE10 - PIN10 (input pullup).
716 * PE11 - PIN11 (input pullup).
717 * PE12 - PIN12 (input pullup).
718 * PE13 - PIN13 (input pullup).
719 * PE14 - PIN14 (input pullup).
720 * PE15 - PIN15 (input pullup).
721 */
722#define VAL_GPIOE_MODER (PIN_MODE_INPUT(GPIOE_PIN0) | \
723 PIN_MODE_INPUT(GPIOE_PIN1) | \
724 PIN_MODE_INPUT(GPIOE_PIN2) | \
725 PIN_MODE_INPUT(GPIOE_PIN3) | \
726 PIN_MODE_INPUT(GPIOE_PIN4) | \
727 PIN_MODE_INPUT(GPIOE_PIN5) | \
728 PIN_MODE_INPUT(GPIOE_PIN6) | \
729 PIN_MODE_INPUT(GPIOE_PIN7) | \
730 PIN_MODE_INPUT(GPIOE_PIN8) | \
731 PIN_MODE_INPUT(GPIOE_PIN9) | \
732 PIN_MODE_INPUT(GPIOE_PIN10) | \
733 PIN_MODE_INPUT(GPIOE_PIN11) | \
734 PIN_MODE_INPUT(GPIOE_PIN12) | \
735 PIN_MODE_INPUT(GPIOE_PIN13) | \
736 PIN_MODE_INPUT(GPIOE_PIN14) | \
737 PIN_MODE_INPUT(GPIOE_PIN15))
738#define VAL_GPIOE_OTYPER (PIN_OTYPE_PUSHPULL(GPIOE_PIN0) | \
739 PIN_OTYPE_PUSHPULL(GPIOE_PIN1) | \
740 PIN_OTYPE_PUSHPULL(GPIOE_PIN2) | \
741 PIN_OTYPE_PUSHPULL(GPIOE_PIN3) | \
742 PIN_OTYPE_PUSHPULL(GPIOE_PIN4) | \
743 PIN_OTYPE_PUSHPULL(GPIOE_PIN5) | \
744 PIN_OTYPE_PUSHPULL(GPIOE_PIN6) | \
745 PIN_OTYPE_PUSHPULL(GPIOE_PIN7) | \
746 PIN_OTYPE_PUSHPULL(GPIOE_PIN8) | \
747 PIN_OTYPE_PUSHPULL(GPIOE_PIN9) | \
748 PIN_OTYPE_PUSHPULL(GPIOE_PIN10) | \
749 PIN_OTYPE_PUSHPULL(GPIOE_PIN11) | \
750 PIN_OTYPE_PUSHPULL(GPIOE_PIN12) | \
751 PIN_OTYPE_PUSHPULL(GPIOE_PIN13) | \
752 PIN_OTYPE_PUSHPULL(GPIOE_PIN14) | \
753 PIN_OTYPE_PUSHPULL(GPIOE_PIN15))
754#define VAL_GPIOE_OSPEEDR (PIN_OSPEED_HIGH(GPIOE_PIN0) | \
755 PIN_OSPEED_HIGH(GPIOE_PIN1) | \
756 PIN_OSPEED_HIGH(GPIOE_PIN2) | \
757 PIN_OSPEED_HIGH(GPIOE_PIN3) | \
758 PIN_OSPEED_HIGH(GPIOE_PIN4) | \
759 PIN_OSPEED_HIGH(GPIOE_PIN5) | \
760 PIN_OSPEED_HIGH(GPIOE_PIN6) | \
761 PIN_OSPEED_HIGH(GPIOE_PIN7) | \
762 PIN_OSPEED_HIGH(GPIOE_PIN8) | \
763 PIN_OSPEED_HIGH(GPIOE_PIN9) | \
764 PIN_OSPEED_HIGH(GPIOE_PIN10) | \
765 PIN_OSPEED_HIGH(GPIOE_PIN11) | \
766 PIN_OSPEED_HIGH(GPIOE_PIN12) | \
767 PIN_OSPEED_HIGH(GPIOE_PIN13) | \
768 PIN_OSPEED_HIGH(GPIOE_PIN14) | \
769 PIN_OSPEED_HIGH(GPIOE_PIN15))
770#define VAL_GPIOE_PUPDR (PIN_PUPDR_PULLUP(GPIOE_PIN0) | \
771 PIN_PUPDR_PULLUP(GPIOE_PIN1) | \
772 PIN_PUPDR_PULLUP(GPIOE_PIN2) | \
773 PIN_PUPDR_PULLUP(GPIOE_PIN3) | \
774 PIN_PUPDR_PULLUP(GPIOE_PIN4) | \
775 PIN_PUPDR_PULLUP(GPIOE_PIN5) | \
776 PIN_PUPDR_PULLUP(GPIOE_PIN6) | \
777 PIN_PUPDR_PULLUP(GPIOE_PIN7) | \
778 PIN_PUPDR_PULLUP(GPIOE_PIN8) | \
779 PIN_PUPDR_PULLUP(GPIOE_PIN9) | \
780 PIN_PUPDR_PULLUP(GPIOE_PIN10) | \
781 PIN_PUPDR_PULLUP(GPIOE_PIN11) | \
782 PIN_PUPDR_PULLUP(GPIOE_PIN12) | \
783 PIN_PUPDR_PULLUP(GPIOE_PIN13) | \
784 PIN_PUPDR_PULLUP(GPIOE_PIN14) | \
785 PIN_PUPDR_PULLUP(GPIOE_PIN15))
786#define VAL_GPIOE_ODR (PIN_ODR_HIGH(GPIOE_PIN0) | \
787 PIN_ODR_HIGH(GPIOE_PIN1) | \
788 PIN_ODR_HIGH(GPIOE_PIN2) | \
789 PIN_ODR_HIGH(GPIOE_PIN3) | \
790 PIN_ODR_HIGH(GPIOE_PIN4) | \
791 PIN_ODR_HIGH(GPIOE_PIN5) | \
792 PIN_ODR_HIGH(GPIOE_PIN6) | \
793 PIN_ODR_HIGH(GPIOE_PIN7) | \
794 PIN_ODR_HIGH(GPIOE_PIN8) | \
795 PIN_ODR_HIGH(GPIOE_PIN9) | \
796 PIN_ODR_HIGH(GPIOE_PIN10) | \
797 PIN_ODR_HIGH(GPIOE_PIN11) | \
798 PIN_ODR_HIGH(GPIOE_PIN12) | \
799 PIN_ODR_HIGH(GPIOE_PIN13) | \
800 PIN_ODR_HIGH(GPIOE_PIN14) | \
801 PIN_ODR_HIGH(GPIOE_PIN15))
802#define VAL_GPIOE_AFRL (PIN_AFIO_AF(GPIOE_PIN0, 0U) | \
803 PIN_AFIO_AF(GPIOE_PIN1, 0U) | \
804 PIN_AFIO_AF(GPIOE_PIN2, 0U) | \
805 PIN_AFIO_AF(GPIOE_PIN3, 0U) | \
806 PIN_AFIO_AF(GPIOE_PIN4, 0U) | \
807 PIN_AFIO_AF(GPIOE_PIN5, 0U) | \
808 PIN_AFIO_AF(GPIOE_PIN6, 0U) | \
809 PIN_AFIO_AF(GPIOE_PIN7, 0U))
810#define VAL_GPIOE_AFRH (PIN_AFIO_AF(GPIOE_PIN8, 0U) | \
811 PIN_AFIO_AF(GPIOE_PIN9, 0U) | \
812 PIN_AFIO_AF(GPIOE_PIN10, 0U) | \
813 PIN_AFIO_AF(GPIOE_PIN11, 0U) | \
814 PIN_AFIO_AF(GPIOE_PIN12, 0U) | \
815 PIN_AFIO_AF(GPIOE_PIN13, 0U) | \
816 PIN_AFIO_AF(GPIOE_PIN14, 0U) | \
817 PIN_AFIO_AF(GPIOE_PIN15, 0U))
818
819/*
820 * GPIOF setup:
821 *
822 * PF0 - ARD_D7 (input pullup).
823 * PF1 - ARD_D8 (input pullup).
824 * PF2 - PIN2 (input pullup).
825 * PF3 - PIN3 (input pullup).
826 * PF4 - PIN4 (input pullup).
827 * PF5 - PIN5 (input pullup).
828 * PF6 - PIN6 (input pullup).
829 * PF7 - PIN7 (input pullup).
830 * PF8 - PIN8 (input pullup).
831 * PF9 - PIN9 (input pullup).
832 * PF10 - PIN10 (input pullup).
833 * PF11 - PIN11 (input pullup).
834 * PF12 - PIN12 (input pullup).
835 * PF13 - PIN13 (input pullup).
836 * PF14 - PIN14 (input pullup).
837 * PF15 - PIN15 (input pullup).
838 */
839#define VAL_GPIOF_MODER (PIN_MODE_INPUT(GPIOF_ARD_D7) | \
840 PIN_MODE_INPUT(GPIOF_ARD_D8) | \
841 PIN_MODE_INPUT(GPIOF_PIN2) | \
842 PIN_MODE_INPUT(GPIOF_PIN3) | \
843 PIN_MODE_INPUT(GPIOF_PIN4) | \
844 PIN_MODE_INPUT(GPIOF_PIN5) | \
845 PIN_MODE_INPUT(GPIOF_PIN6) | \
846 PIN_MODE_INPUT(GPIOF_PIN7) | \
847 PIN_MODE_INPUT(GPIOF_PIN8) | \
848 PIN_MODE_INPUT(GPIOF_PIN9) | \
849 PIN_MODE_INPUT(GPIOF_PIN10) | \
850 PIN_MODE_INPUT(GPIOF_PIN11) | \
851 PIN_MODE_INPUT(GPIOF_PIN12) | \
852 PIN_MODE_INPUT(GPIOF_PIN13) | \
853 PIN_MODE_INPUT(GPIOF_PIN14) | \
854 PIN_MODE_INPUT(GPIOF_PIN15))
855#define VAL_GPIOF_OTYPER (PIN_OTYPE_PUSHPULL(GPIOF_ARD_D7) | \
856 PIN_OTYPE_PUSHPULL(GPIOF_ARD_D8) | \
857 PIN_OTYPE_PUSHPULL(GPIOF_PIN2) | \
858 PIN_OTYPE_PUSHPULL(GPIOF_PIN3) | \
859 PIN_OTYPE_PUSHPULL(GPIOF_PIN4) | \
860 PIN_OTYPE_PUSHPULL(GPIOF_PIN5) | \
861 PIN_OTYPE_PUSHPULL(GPIOF_PIN6) | \
862 PIN_OTYPE_PUSHPULL(GPIOF_PIN7) | \
863 PIN_OTYPE_PUSHPULL(GPIOF_PIN8) | \
864 PIN_OTYPE_PUSHPULL(GPIOF_PIN9) | \
865 PIN_OTYPE_PUSHPULL(GPIOF_PIN10) | \
866 PIN_OTYPE_PUSHPULL(GPIOF_PIN11) | \
867 PIN_OTYPE_PUSHPULL(GPIOF_PIN12) | \
868 PIN_OTYPE_PUSHPULL(GPIOF_PIN13) | \
869 PIN_OTYPE_PUSHPULL(GPIOF_PIN14) | \
870 PIN_OTYPE_PUSHPULL(GPIOF_PIN15))
871#define VAL_GPIOF_OSPEEDR (PIN_OSPEED_HIGH(GPIOF_ARD_D7) | \
872 PIN_OSPEED_HIGH(GPIOF_ARD_D8) | \
873 PIN_OSPEED_HIGH(GPIOF_PIN2) | \
874 PIN_OSPEED_HIGH(GPIOF_PIN3) | \
875 PIN_OSPEED_HIGH(GPIOF_PIN4) | \
876 PIN_OSPEED_HIGH(GPIOF_PIN5) | \
877 PIN_OSPEED_HIGH(GPIOF_PIN6) | \
878 PIN_OSPEED_HIGH(GPIOF_PIN7) | \
879 PIN_OSPEED_HIGH(GPIOF_PIN8) | \
880 PIN_OSPEED_HIGH(GPIOF_PIN9) | \
881 PIN_OSPEED_HIGH(GPIOF_PIN10) | \
882 PIN_OSPEED_HIGH(GPIOF_PIN11) | \
883 PIN_OSPEED_HIGH(GPIOF_PIN12) | \
884 PIN_OSPEED_HIGH(GPIOF_PIN13) | \
885 PIN_OSPEED_HIGH(GPIOF_PIN14) | \
886 PIN_OSPEED_HIGH(GPIOF_PIN15))
887#define VAL_GPIOF_PUPDR (PIN_PUPDR_PULLUP(GPIOF_ARD_D7) | \
888 PIN_PUPDR_PULLUP(GPIOF_ARD_D8) | \
889 PIN_PUPDR_PULLUP(GPIOF_PIN2) | \
890 PIN_PUPDR_PULLUP(GPIOF_PIN3) | \
891 PIN_PUPDR_PULLUP(GPIOF_PIN4) | \
892 PIN_PUPDR_PULLUP(GPIOF_PIN5) | \
893 PIN_PUPDR_PULLUP(GPIOF_PIN6) | \
894 PIN_PUPDR_PULLUP(GPIOF_PIN7) | \
895 PIN_PUPDR_PULLUP(GPIOF_PIN8) | \
896 PIN_PUPDR_PULLUP(GPIOF_PIN9) | \
897 PIN_PUPDR_PULLUP(GPIOF_PIN10) | \
898 PIN_PUPDR_PULLUP(GPIOF_PIN11) | \
899 PIN_PUPDR_PULLUP(GPIOF_PIN12) | \
900 PIN_PUPDR_PULLUP(GPIOF_PIN13) | \
901 PIN_PUPDR_PULLUP(GPIOF_PIN14) | \
902 PIN_PUPDR_PULLUP(GPIOF_PIN15))
903#define VAL_GPIOF_ODR (PIN_ODR_HIGH(GPIOF_ARD_D7) | \
904 PIN_ODR_HIGH(GPIOF_ARD_D8) | \
905 PIN_ODR_HIGH(GPIOF_PIN2) | \
906 PIN_ODR_HIGH(GPIOF_PIN3) | \
907 PIN_ODR_HIGH(GPIOF_PIN4) | \
908 PIN_ODR_HIGH(GPIOF_PIN5) | \
909 PIN_ODR_HIGH(GPIOF_PIN6) | \
910 PIN_ODR_HIGH(GPIOF_PIN7) | \
911 PIN_ODR_HIGH(GPIOF_PIN8) | \
912 PIN_ODR_HIGH(GPIOF_PIN9) | \
913 PIN_ODR_HIGH(GPIOF_PIN10) | \
914 PIN_ODR_HIGH(GPIOF_PIN11) | \
915 PIN_ODR_HIGH(GPIOF_PIN12) | \
916 PIN_ODR_HIGH(GPIOF_PIN13) | \
917 PIN_ODR_HIGH(GPIOF_PIN14) | \
918 PIN_ODR_HIGH(GPIOF_PIN15))
919#define VAL_GPIOF_AFRL (PIN_AFIO_AF(GPIOF_ARD_D7, 0U) | \
920 PIN_AFIO_AF(GPIOF_ARD_D8, 0U) | \
921 PIN_AFIO_AF(GPIOF_PIN2, 0U) | \
922 PIN_AFIO_AF(GPIOF_PIN3, 0U) | \
923 PIN_AFIO_AF(GPIOF_PIN4, 0U) | \
924 PIN_AFIO_AF(GPIOF_PIN5, 0U) | \
925 PIN_AFIO_AF(GPIOF_PIN6, 0U) | \
926 PIN_AFIO_AF(GPIOF_PIN7, 0U))
927#define VAL_GPIOF_AFRH (PIN_AFIO_AF(GPIOF_PIN8, 0U) | \
928 PIN_AFIO_AF(GPIOF_PIN9, 0U) | \
929 PIN_AFIO_AF(GPIOF_PIN10, 0U) | \
930 PIN_AFIO_AF(GPIOF_PIN11, 0U) | \
931 PIN_AFIO_AF(GPIOF_PIN12, 0U) | \
932 PIN_AFIO_AF(GPIOF_PIN13, 0U) | \
933 PIN_AFIO_AF(GPIOF_PIN14, 0U) | \
934 PIN_AFIO_AF(GPIOF_PIN15, 0U))
935
936/*===========================================================================*/
937/* External declarations. */
938/*===========================================================================*/
939
940#if !defined(_FROM_ASM_)
941#ifdef __cplusplus
942extern "C" {
943#endif
944 void boardInit(void);
945#ifdef __cplusplus
946}
947#endif
948#endif /* _FROM_ASM_ */
949
950#endif /* BOARD_H */
diff --git a/keyboards/akegata_denki/device_one/boards/DEVICE_ONE/board.mk b/keyboards/akegata_denki/device_one/boards/DEVICE_ONE/board.mk
new file mode 100644
index 000000000..a830697a9
--- /dev/null
+++ b/keyboards/akegata_denki/device_one/boards/DEVICE_ONE/board.mk
@@ -0,0 +1,5 @@
1# List of all the board related files.
2BOARDSRC = $(BOARD_PATH)/boards/DEVICE_ONE/board.c
3
4# Required include directories
5BOARDINC = $(BOARD_PATH)/boards/DEVICE_ONE
diff --git a/keyboards/akegata_denki/device_one/chconf.h b/keyboards/akegata_denki/device_one/chconf.h
new file mode 100644
index 000000000..c618ebe12
--- /dev/null
+++ b/keyboards/akegata_denki/device_one/chconf.h
@@ -0,0 +1,711 @@
1/*
2 ChibiOS - Copyright (C) 2006..2018 Giovanni Di Sirio
3 Licensed under the Apache License, Version 2.0 (the "License");
4 you may not use this file except in compliance with the License.
5 You may obtain a copy of the License at
6 http://www.apache.org/licenses/LICENSE-2.0
7 Unless required by applicable law or agreed to in writing, software
8 distributed under the License is distributed on an "AS IS" BASIS,
9 WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
10 See the License for the specific language governing permissions and
11 limitations under the License.
12*/
13
14/**
15 * @file rt/templates/chconf.h
16 * @brief Configuration file template.
17 * @details A copy of this file must be placed in each project directory, it
18 * contains the application specific kernel settings.
19 *
20 * @addtogroup config
21 * @details Kernel related settings and hooks.
22 * @{
23 */
24
25#ifndef CHCONF_H
26#define CHCONF_H
27
28#define _CHIBIOS_RT_CONF_
29#define _CHIBIOS_RT_CONF_VER_6_0_
30
31/*===========================================================================*/
32/**
33 * @name System timers settings
34 * @{
35 */
36/*===========================================================================*/
37
38/**
39 * @brief System time counter resolution.
40 * @note Allowed values are 16 or 32 bits.
41 */
42#if !defined(CH_CFG_ST_RESOLUTION)
43#define CH_CFG_ST_RESOLUTION 32
44#endif
45
46/**
47 * @brief System tick frequency.
48 * @details Frequency of the system timer that drives the system ticks. This
49 * setting also defines the system tick time unit.
50 */
51#if !defined(CH_CFG_ST_FREQUENCY)
52#define CH_CFG_ST_FREQUENCY 10000
53#endif
54
55/**
56 * @brief Time intervals data size.
57 * @note Allowed values are 16, 32 or 64 bits.
58 */
59#if !defined(CH_CFG_INTERVALS_SIZE)
60#define CH_CFG_INTERVALS_SIZE 32
61#endif
62
63/**
64 * @brief Time types data size.
65 * @note Allowed values are 16 or 32 bits.
66 */
67#if !defined(CH_CFG_TIME_TYPES_SIZE)
68#define CH_CFG_TIME_TYPES_SIZE 32
69#endif
70
71/**
72 * @brief Time delta constant for the tick-less mode.
73 * @note If this value is zero then the system uses the classic
74 * periodic tick. This value represents the minimum number
75 * of ticks that is safe to specify in a timeout directive.
76 * The value one is not valid, timeouts are rounded up to
77 * this value.
78 */
79#if !defined(CH_CFG_ST_TIMEDELTA)
80#define CH_CFG_ST_TIMEDELTA 2
81#endif
82
83/** @} */
84
85/*===========================================================================*/
86/**
87 * @name Kernel parameters and options
88 * @{
89 */
90/*===========================================================================*/
91
92/**
93 * @brief Round robin interval.
94 * @details This constant is the number of system ticks allowed for the
95 * threads before preemption occurs. Setting this value to zero
96 * disables the preemption for threads with equal priority and the
97 * round robin becomes cooperative. Note that higher priority
98 * threads can still preempt, the kernel is always preemptive.
99 * @note Disabling the round robin preemption makes the kernel more compact
100 * and generally faster.
101 * @note The round robin preemption is not supported in tickless mode and
102 * must be set to zero in that case.
103 */
104#if !defined(CH_CFG_TIME_QUANTUM)
105#define CH_CFG_TIME_QUANTUM 0
106#endif
107
108/**
109 * @brief Managed RAM size.
110 * @details Size of the RAM area to be managed by the OS. If set to zero
111 * then the whole available RAM is used. The core memory is made
112 * available to the heap allocator and/or can be used directly through
113 * the simplified core memory allocator.
114 *
115 * @note In order to let the OS manage the whole RAM the linker script must
116 * provide the @p __heap_base__ and @p __heap_end__ symbols.
117 * @note Requires @p CH_CFG_USE_MEMCORE.
118 */
119#if !defined(CH_CFG_MEMCORE_SIZE)
120#define CH_CFG_MEMCORE_SIZE 0
121#endif
122
123/**
124 * @brief Idle thread automatic spawn suppression.
125 * @details When this option is activated the function @p chSysInit()
126 * does not spawn the idle thread. The application @p main()
127 * function becomes the idle thread and must implement an
128 * infinite loop.
129 */
130#if !defined(CH_CFG_NO_IDLE_THREAD)
131#define CH_CFG_NO_IDLE_THREAD FALSE
132#endif
133
134/** @} */
135
136/*===========================================================================*/
137/**
138 * @name Performance options
139 * @{
140 */
141/*===========================================================================*/
142
143/**
144 * @brief OS optimization.
145 * @details If enabled then time efficient rather than space efficient code
146 * is used when two possible implementations exist.
147 *
148 * @note This is not related to the compiler optimization options.
149 * @note The default is @p TRUE.
150 */
151#if !defined(CH_CFG_OPTIMIZE_SPEED)
152#define CH_CFG_OPTIMIZE_SPEED TRUE
153#endif
154
155/** @} */
156
157/*===========================================================================*/
158/**
159 * @name Subsystem options
160 * @{
161 */
162/*===========================================================================*/
163
164/**
165 * @brief Time Measurement APIs.
166 * @details If enabled then the time measurement APIs are included in
167 * the kernel.
168 *
169 * @note The default is @p TRUE.
170 */
171#if !defined(CH_CFG_USE_TM)
172#define CH_CFG_USE_TM FALSE
173#endif
174
175/**
176 * @brief Threads registry APIs.
177 * @details If enabled then the registry APIs are included in the kernel.
178 *
179 * @note The default is @p TRUE.
180 */
181#if !defined(CH_CFG_USE_REGISTRY)
182#define CH_CFG_USE_REGISTRY TRUE
183#endif
184
185/**
186 * @brief Threads synchronization APIs.
187 * @details If enabled then the @p chThdWait() function is included in
188 * the kernel.
189 *
190 * @note The default is @p TRUE.
191 */
192#if !defined(CH_CFG_USE_WAITEXIT)
193#define CH_CFG_USE_WAITEXIT TRUE
194#endif
195
196/**
197 * @brief Semaphores APIs.
198 * @details If enabled then the Semaphores APIs are included in the kernel.
199 *
200 * @note The default is @p TRUE.
201 */
202#if !defined(CH_CFG_USE_SEMAPHORES)
203#define CH_CFG_USE_SEMAPHORES TRUE
204#endif
205
206/**
207 * @brief Semaphores queuing mode.
208 * @details If enabled then the threads are enqueued on semaphores by
209 * priority rather than in FIFO order.
210 *
211 * @note The default is @p FALSE. Enable this if you have special
212 * requirements.
213 * @note Requires @p CH_CFG_USE_SEMAPHORES.
214 */
215#if !defined(CH_CFG_USE_SEMAPHORES_PRIORITY)
216#define CH_CFG_USE_SEMAPHORES_PRIORITY FALSE
217#endif
218
219/**
220 * @brief Mutexes APIs.
221 * @details If enabled then the mutexes APIs are included in the kernel.
222 *
223 * @note The default is @p TRUE.
224 */
225#if !defined(CH_CFG_USE_MUTEXES)
226#define CH_CFG_USE_MUTEXES TRUE
227#endif
228
229/**
230 * @brief Enables recursive behavior on mutexes.
231 * @note Recursive mutexes are heavier and have an increased
232 * memory footprint.
233 *
234 * @note The default is @p FALSE.
235 * @note Requires @p CH_CFG_USE_MUTEXES.
236 */
237#if !defined(CH_CFG_USE_MUTEXES_RECURSIVE)
238#define CH_CFG_USE_MUTEXES_RECURSIVE FALSE
239#endif
240
241/**
242 * @brief Conditional Variables APIs.
243 * @details If enabled then the conditional variables APIs are included
244 * in the kernel.
245 *
246 * @note The default is @p TRUE.
247 * @note Requires @p CH_CFG_USE_MUTEXES.
248 */
249#if !defined(CH_CFG_USE_CONDVARS)
250#define CH_CFG_USE_CONDVARS TRUE
251#endif
252
253/**
254 * @brief Conditional Variables APIs with timeout.
255 * @details If enabled then the conditional variables APIs with timeout
256 * specification are included in the kernel.
257 *
258 * @note The default is @p TRUE.
259 * @note Requires @p CH_CFG_USE_CONDVARS.
260 */
261#if !defined(CH_CFG_USE_CONDVARS_TIMEOUT)
262#define CH_CFG_USE_CONDVARS_TIMEOUT TRUE
263#endif
264
265/**
266 * @brief Events Flags APIs.
267 * @details If enabled then the event flags APIs are included in the kernel.
268 *
269 * @note The default is @p TRUE.
270 */
271#if !defined(CH_CFG_USE_EVENTS)
272#define CH_CFG_USE_EVENTS TRUE
273#endif
274
275/**
276 * @brief Events Flags APIs with timeout.
277 * @details If enabled then the events APIs with timeout specification
278 * are included in the kernel.
279 *
280 * @note The default is @p TRUE.
281 * @note Requires @p CH_CFG_USE_EVENTS.
282 */
283#if !defined(CH_CFG_USE_EVENTS_TIMEOUT)
284#define CH_CFG_USE_EVENTS_TIMEOUT TRUE
285#endif
286
287/**
288 * @brief Synchronous Messages APIs.
289 * @details If enabled then the synchronous messages APIs are included
290 * in the kernel.
291 *
292 * @note The default is @p TRUE.
293 */
294#if !defined(CH_CFG_USE_MESSAGES)
295#define CH_CFG_USE_MESSAGES TRUE
296#endif
297
298/**
299 * @brief Synchronous Messages queuing mode.
300 * @details If enabled then messages are served by priority rather than in
301 * FIFO order.
302 *
303 * @note The default is @p FALSE. Enable this if you have special
304 * requirements.
305 * @note Requires @p CH_CFG_USE_MESSAGES.
306 */
307#if !defined(CH_CFG_USE_MESSAGES_PRIORITY)
308#define CH_CFG_USE_MESSAGES_PRIORITY FALSE
309#endif
310
311/**
312 * @brief Mailboxes APIs.
313 * @details If enabled then the asynchronous messages (mailboxes) APIs are
314 * included in the kernel.
315 *
316 * @note The default is @p TRUE.
317 * @note Requires @p CH_CFG_USE_SEMAPHORES.
318 */
319#if !defined(CH_CFG_USE_MAILBOXES)
320#define CH_CFG_USE_MAILBOXES TRUE
321#endif
322
323/**
324 * @brief Core Memory Manager APIs.
325 * @details If enabled then the core memory manager APIs are included
326 * in the kernel.
327 *
328 * @note The default is @p TRUE.
329 */
330#if !defined(CH_CFG_USE_MEMCORE)
331#define CH_CFG_USE_MEMCORE TRUE
332#endif
333
334/**
335 * @brief Heap Allocator APIs.
336 * @details If enabled then the memory heap allocator APIs are included
337 * in the kernel.
338 *
339 * @note The default is @p TRUE.
340 * @note Requires @p CH_CFG_USE_MEMCORE and either @p CH_CFG_USE_MUTEXES or
341 * @p CH_CFG_USE_SEMAPHORES.
342 * @note Mutexes are recommended.
343 */
344#if !defined(CH_CFG_USE_HEAP)
345#define CH_CFG_USE_HEAP TRUE
346#endif
347
348/**
349 * @brief Memory Pools Allocator APIs.
350 * @details If enabled then the memory pools allocator APIs are included
351 * in the kernel.
352 *
353 * @note The default is @p TRUE.
354 */
355#if !defined(CH_CFG_USE_MEMPOOLS)
356#define CH_CFG_USE_MEMPOOLS TRUE
357#endif
358
359/**
360 * @brief Objects FIFOs APIs.
361 * @details If enabled then the objects FIFOs APIs are included
362 * in the kernel.
363 *
364 * @note The default is @p TRUE.
365 */
366#if !defined(CH_CFG_USE_OBJ_FIFOS)
367#define CH_CFG_USE_OBJ_FIFOS TRUE
368#endif
369
370/**
371 * @brief Pipes APIs.
372 * @details If enabled then the pipes APIs are included
373 * in the kernel.
374 *
375 * @note The default is @p TRUE.
376 */
377#if !defined(CH_CFG_USE_PIPES)
378#define CH_CFG_USE_PIPES TRUE
379#endif
380
381/**
382 * @brief Dynamic Threads APIs.
383 * @details If enabled then the dynamic threads creation APIs are included
384 * in the kernel.
385 *
386 * @note The default is @p TRUE.
387 * @note Requires @p CH_CFG_USE_WAITEXIT.
388 * @note Requires @p CH_CFG_USE_HEAP and/or @p CH_CFG_USE_MEMPOOLS.
389 */
390#if !defined(CH_CFG_USE_DYNAMIC)
391#define CH_CFG_USE_DYNAMIC TRUE
392#endif
393
394/** @} */
395
396/*===========================================================================*/
397/**
398 * @name Objects factory options
399 * @{
400 */
401/*===========================================================================*/
402
403/**
404 * @brief Objects Factory APIs.
405 * @details If enabled then the objects factory APIs are included in the
406 * kernel.
407 *
408 * @note The default is @p FALSE.
409 */
410#if !defined(CH_CFG_USE_FACTORY)
411#define CH_CFG_USE_FACTORY TRUE
412#endif
413
414/**
415 * @brief Maximum length for object names.
416 * @details If the specified length is zero then the name is stored by
417 * pointer but this could have unintended side effects.
418 */
419#if !defined(CH_CFG_FACTORY_MAX_NAMES_LENGTH)
420#define CH_CFG_FACTORY_MAX_NAMES_LENGTH 8
421#endif
422
423/**
424 * @brief Enables the registry of generic objects.
425 */
426#if !defined(CH_CFG_FACTORY_OBJECTS_REGISTRY)
427#define CH_CFG_FACTORY_OBJECTS_REGISTRY TRUE
428#endif
429
430/**
431 * @brief Enables factory for generic buffers.
432 */
433#if !defined(CH_CFG_FACTORY_GENERIC_BUFFERS)
434#define CH_CFG_FACTORY_GENERIC_BUFFERS TRUE
435#endif
436
437/**
438 * @brief Enables factory for semaphores.
439 */
440#if !defined(CH_CFG_FACTORY_SEMAPHORES)
441#define CH_CFG_FACTORY_SEMAPHORES TRUE
442#endif
443
444/**
445 * @brief Enables factory for mailboxes.
446 */
447#if !defined(CH_CFG_FACTORY_MAILBOXES)
448#define CH_CFG_FACTORY_MAILBOXES TRUE
449#endif
450
451/**
452 * @brief Enables factory for objects FIFOs.
453 */
454#if !defined(CH_CFG_FACTORY_OBJ_FIFOS)
455#define CH_CFG_FACTORY_OBJ_FIFOS TRUE
456#endif
457
458/**
459 * @brief Enables factory for Pipes.
460 */
461#if !defined(CH_CFG_FACTORY_PIPES) || defined(__DOXYGEN__)
462#define CH_CFG_FACTORY_PIPES TRUE
463#endif
464
465/** @} */
466
467/*===========================================================================*/
468/**
469 * @name Debug options
470 * @{
471 */
472/*===========================================================================*/
473
474/**
475 * @brief Debug option, kernel statistics.
476 *
477 * @note The default is @p FALSE.
478 */
479#if !defined(CH_DBG_STATISTICS)
480#define CH_DBG_STATISTICS FALSE
481#endif
482
483/**
484 * @brief Debug option, system state check.
485 * @details If enabled the correct call protocol for system APIs is checked
486 * at runtime.
487 *
488 * @note The default is @p FALSE.
489 */
490#if !defined(CH_DBG_SYSTEM_STATE_CHECK)
491#define CH_DBG_SYSTEM_STATE_CHECK FALSE
492#endif
493
494/**
495 * @brief Debug option, parameters checks.
496 * @details If enabled then the checks on the API functions input
497 * parameters are activated.
498 *
499 * @note The default is @p FALSE.
500 */
501#if !defined(CH_DBG_ENABLE_CHECKS)
502#define CH_DBG_ENABLE_CHECKS FALSE
503#endif
504
505/**
506 * @brief Debug option, consistency checks.
507 * @details If enabled then all the assertions in the kernel code are
508 * activated. This includes consistency checks inside the kernel,
509 * runtime anomalies and port-defined checks.
510 *
511 * @note The default is @p FALSE.
512 */
513#if !defined(CH_DBG_ENABLE_ASSERTS)
514#define CH_DBG_ENABLE_ASSERTS FALSE
515#endif
516
517/**
518 * @brief Debug option, trace buffer.
519 * @details If enabled then the trace buffer is activated.
520 *
521 * @note The default is @p CH_DBG_TRACE_MASK_DISABLED.
522 */
523#if !defined(CH_DBG_TRACE_MASK)
524#define CH_DBG_TRACE_MASK CH_DBG_TRACE_MASK_DISABLED
525#endif
526
527/**
528 * @brief Trace buffer entries.
529 * @note The trace buffer is only allocated if @p CH_DBG_TRACE_MASK is
530 * different from @p CH_DBG_TRACE_MASK_DISABLED.
531 */
532#if !defined(CH_DBG_TRACE_BUFFER_SIZE)
533#define CH_DBG_TRACE_BUFFER_SIZE 128
534#endif
535
536/**
537 * @brief Debug option, stack checks.
538 * @details If enabled then a runtime stack check is performed.
539 *
540 * @note The default is @p FALSE.
541 * @note The stack check is performed in a architecture/port dependent way.
542 * It may not be implemented or some ports.
543 * @note The default failure mode is to halt the system with the global
544 * @p panic_msg variable set to @p NULL.
545 */
546#if !defined(CH_DBG_ENABLE_STACK_CHECK)
547#define CH_DBG_ENABLE_STACK_CHECK FALSE
548#endif
549
550/**
551 * @brief Debug option, stacks initialization.
552 * @details If enabled then the threads working area is filled with a byte
553 * value when a thread is created. This can be useful for the
554 * runtime measurement of the used stack.
555 *
556 * @note The default is @p FALSE.
557 */
558#if !defined(CH_DBG_FILL_THREADS)
559#define CH_DBG_FILL_THREADS FALSE
560#endif
561
562/**
563 * @brief Debug option, threads profiling.
564 * @details If enabled then a field is added to the @p thread_t structure that
565 * counts the system ticks occurred while executing the thread.
566 *
567 * @note The default is @p FALSE.
568 * @note This debug option is not currently compatible with the
569 * tickless mode.
570 */
571#if !defined(CH_DBG_THREADS_PROFILING)
572#define CH_DBG_THREADS_PROFILING FALSE
573#endif
574
575/** @} */
576
577/*===========================================================================*/
578/**
579 * @name Kernel hooks
580 * @{
581 */
582/*===========================================================================*/
583
584/**
585 * @brief System structure extension.
586 * @details User fields added to the end of the @p ch_system_t structure.
587 */
588#define CH_CFG_SYSTEM_EXTRA_FIELDS \
589 /* Add threads custom fields here.*/
590
591/**
592 * @brief System initialization hook.
593 * @details User initialization code added to the @p chSysInit() function
594 * just before interrupts are enabled globally.
595 */
596#define CH_CFG_SYSTEM_INIT_HOOK() { \
597 /* Add threads initialization code here.*/ \
598}
599
600/**
601 * @brief Threads descriptor structure extension.
602 * @details User fields added to the end of the @p thread_t structure.
603 */
604#define CH_CFG_THREAD_EXTRA_FIELDS \
605 /* Add threads custom fields here.*/
606
607/**
608 * @brief Threads initialization hook.
609 * @details User initialization code added to the @p _thread_init() function.
610 *
611 * @note It is invoked from within @p _thread_init() and implicitly from all
612 * the threads creation APIs.
613 */
614#define CH_CFG_THREAD_INIT_HOOK(tp) { \
615 /* Add threads initialization code here.*/ \
616}
617
618/**
619 * @brief Threads finalization hook.
620 * @details User finalization code added to the @p chThdExit() API.
621 */
622#define CH_CFG_THREAD_EXIT_HOOK(tp) { \
623 /* Add threads finalization code here.*/ \
624}
625
626/**
627 * @brief Context switch hook.
628 * @details This hook is invoked just before switching between threads.
629 */
630#define CH_CFG_CONTEXT_SWITCH_HOOK(ntp, otp) { \
631 /* Context switch code here.*/ \
632}
633
634/**
635 * @brief ISR enter hook.
636 */
637#define CH_CFG_IRQ_PROLOGUE_HOOK() { \
638 /* IRQ prologue code here.*/ \
639}
640
641/**
642 * @brief ISR exit hook.
643 */
644#define CH_CFG_IRQ_EPILOGUE_HOOK() { \
645 /* IRQ epilogue code here.*/ \
646}
647
648/**
649 * @brief Idle thread enter hook.
650 * @note This hook is invoked within a critical zone, no OS functions
651 * should be invoked from here.
652 * @note This macro can be used to activate a power saving mode.
653 */
654#define CH_CFG_IDLE_ENTER_HOOK() { \
655 /* Idle-enter code here.*/ \
656}
657
658/**
659 * @brief Idle thread leave hook.
660 * @note This hook is invoked within a critical zone, no OS functions
661 * should be invoked from here.
662 * @note This macro can be used to deactivate a power saving mode.
663 */
664#define CH_CFG_IDLE_LEAVE_HOOK() { \
665 /* Idle-leave code here.*/ \
666}
667
668/**
669 * @brief Idle Loop hook.
670 * @details This hook is continuously invoked by the idle thread loop.
671 */
672#define CH_CFG_IDLE_LOOP_HOOK() { \
673 /* Idle loop code here.*/ \
674}
675
676/**
677 * @brief System tick event hook.
678 * @details This hook is invoked in the system tick handler immediately
679 * after processing the virtual timers queue.
680 */
681#define CH_CFG_SYSTEM_TICK_HOOK() { \
682 /* System tick event code here.*/ \
683}
684
685/**
686 * @brief System halt hook.
687 * @details This hook is invoked in case to a system halting error before
688 * the system is halted.
689 */
690#define CH_CFG_SYSTEM_HALT_HOOK(reason) { \
691 /* System halt code here.*/ \
692}
693
694/**
695 * @brief Trace hook.
696 * @details This hook is invoked each time a new record is written in the
697 * trace buffer.
698 */
699#define CH_CFG_TRACE_HOOK(tep) { \
700 /* Trace code here.*/ \
701}
702
703/** @} */
704
705/*===========================================================================*/
706/* Port-specific settings (override port settings defaulted in chcore.h). */
707/*===========================================================================*/
708
709#endif /* CHCONF_H */
710
711/** @} */
diff --git a/keyboards/akegata_denki/device_one/config.h b/keyboards/akegata_denki/device_one/config.h
new file mode 100644
index 000000000..cae2c60c0
--- /dev/null
+++ b/keyboards/akegata_denki/device_one/config.h
@@ -0,0 +1,18 @@
1#pragma once
2
3#include "config_common.h"
4
5/* USB Device descriptor parameter */
6#define VENDOR_ID 0xFEED
7#define PRODUCT_ID 0xADD0
8#define DEVICE_VER 0x0001
9#define MANUFACTURER akegata denki
10#define PRODUCT device one mechanical keyboard
11
12#define MATRIX_ROWS 5
13#define MATRIX_COLS 15
14
15#define MATRIX_ROW_PINS { B1, B0, A9, A8, A0 }
16#define MATRIX_COL_PINS { A2, A3, A4, A5, A6, A7, A1, A10, A15, B3, B4, B5, B6, B7, B8}
17
18#define DIODE_DIRECTION COL2ROW
diff --git a/keyboards/akegata_denki/device_one/device_one.c b/keyboards/akegata_denki/device_one/device_one.c
new file mode 100644
index 000000000..06e03ee89
--- /dev/null
+++ b/keyboards/akegata_denki/device_one/device_one.c
@@ -0,0 +1 @@
#include "device_one.h"
diff --git a/keyboards/akegata_denki/device_one/device_one.h b/keyboards/akegata_denki/device_one/device_one.h
new file mode 100644
index 000000000..58986dea9
--- /dev/null
+++ b/keyboards/akegata_denki/device_one/device_one.h
@@ -0,0 +1,59 @@
1#pragma once
2
3#include "quantum.h"
4
5#define LAYOUT_60_ansi(\
6 k00, k01, k02, k03, k04, k05, k06, k07, k08, k09, k0a, k0b, k0c, k0e, \
7 k10, k11, k12, k13, k14, k15, k16, k17, k18, k19, k1a, k1b, k1c, k1e, \
8 k20, k21, k22, k23, k24, k25, k26, k27, k28, k29, k2a, k2b, k2e, \
9 k30, k32, k33, k34, k35, k36, k37, k38, k39, k3a, k3b, k3c, \
10 k40, k41, k42, k47, k4a, k4b, k4c, k4e \
11) { \
12 { k00, k01, k02, k03, k04, k05, k06, k07, k08, k09, k0a, k0b, k0c, k0e, KC_NO }, \
13 { k10, k11, k12, k13, k14, k15, k16, k17, k18, k19, k1a, k1b, k1c, k1e, KC_NO }, \
14 { k20, k21, k22, k23, k24, k25, k26, k27, k28, k29, k2a, k2b, KC_NO, k2e, }, \
15 { k30, KC_NO, k32, k33, k34, k35, k36, k37, k38, k39, k3a, k3b, KC_NO, k3c, KC_NO, }, \
16 { k40, k41, k42, KC_NO, KC_NO, KC_NO, k47, KC_NO, KC_NO, k4a, k4b, k4c, KC_NO, KC_NO, k4e }, \
17}
18
19#define LAYOUT_60_iso(\
20 k00, k01, k02, k03, k04, k05, k06, k07, k08, k09, k0a, k0b, k0c, k0e, \
21 k10, k11, k12, k13, k14, k15, k16, k17, k18, k19, k1a, k1b, k1c, \
22 k20, k21, k22, k23, k24, k25, k26, k27, k28, k29, k2a, k2b, k2e, k1e, \
23 k30, k31, k32, k33, k34, k35, k36, k37, k38, k39, k3a, k3b, k3c, \
24 k40, k41, k42, k47, k4a, k4b, k4c, k4e \
25) { \
26 { k00, k01, k02, k03, k04, k05, k06, k07, k08, k09, k0a, k0b, k0c, k0e, KC_NO }, \
27 { k10, k11, k12, k13, k14, k15, k16, k17, k18, k19, k1a, k1b, k1c, k1e, KC_NO }, \
28 { k20, k21, k22, k23, k24, k25, k26, k27, k28, k29, k2a, k2b, KC_NO, k2e, }, \
29 { k30, k31, k32, k33, k34, k35, k36, k37, k38, k39, k3a, k3b, KC_NO, KC_NO, k3c, }, \
30 { k40, k41, k42, KC_NO, KC_NO, KC_NO, k47, KC_NO, KC_NO, k4a, k4b, k4c, KC_NO, KC_NO, k4e }, \
31}
32
33#define LAYOUT_60_ansi_arrow(\
34 k00, k01, k02, k03, k04, k05, k06, k07, k08, k09, k0a, k0b, k0c, k0e, \
35 k10, k11, k12, k13, k14, k15, k16, k17, k18, k19, k1a, k1b, k1c, k1e, \
36 k20, k21, k22, k23, k24, k25, k26, k27, k28, k29, k2a, k2b, k2e, \
37 k30, k32, k33, k34, k35, k36, k37, k38, k39, k3a, k3b, k3c, k3d, \
38 k40, k41, k42, k47, k4a, k4b, k4c, k4e, k4f \
39) { \
40 { k00, k01, k02, k03, k04, k05, k06, k07, k08, k09, k0a, k0b, k0c, k0e, KC_NO }, \
41 { k10, k11, k12, k13, k14, k15, k16, k17, k18, k19, k1a, k1b, k1c, k1e, KC_NO }, \
42 { k20, k21, k22, k23, k24, k25, k26, k27, k28, k29, k2a, k2b, KC_NO, k2e, }, \
43 { k30, KC_NO, k32, k33, k34, k35, k36, k37, k38, k39, k3a, k3b, KC_NO, k3c, k3d, }, \
44 { k40, k41, k42, KC_NO, KC_NO, KC_NO, k47, KC_NO, KC_NO, k4a, k4b, k4c, KC_NO, k4e, k4f, }, \
45}
46
47#define LAYOUT_60_ansi_split_bs(\
48 k00, k01, k02, k03, k04, k05, k06, k07, k08, k09, k0a, k0b, k0c, k0e, k0f, \
49 k10, k11, k12, k13, k14, k15, k16, k17, k18, k19, k1a, k1b, k1c, k1e, \
50 k20, k21, k22, k23, k24, k25, k26, k27, k28, k29, k2a, k2b, k2e, \
51 k30, k32, k33, k34, k35, k36, k37, k38, k39, k3a, k3b, k3c, \
52 k40, k41, k42, k47, k4a, k4b, k4c, k4e \
53) { \
54 { k00, k01, k02, k03, k04, k05, k06, k07, k08, k09, k0a, k0b, k0c, k0e, k0f }, \
55 { k10, k11, k12, k13, k14, k15, k16, k17, k18, k19, k1a, k1b, k1c, k1e, KC_NO }, \
56 { k20, k21, k22, k23, k24, k25, k26, k27, k28, k29, k2a, k2b, KC_NO, k2e, }, \
57 { k30, KC_NO, k32, k33, k34, k35, k36, k37, k38, k39, k3a, k3b, KC_NO, k3c, KC_NO }, \
58 { k40, k41, k42, KC_NO, KC_NO, KC_NO, k47, KC_NO, KC_NO, k4a, k4b, k4c, KC_NO, KC_NO, k4e, }, \
59}
diff --git a/keyboards/akegata_denki/device_one/halconf.h b/keyboards/akegata_denki/device_one/halconf.h
new file mode 100644
index 000000000..25f3fe5ed
--- /dev/null
+++ b/keyboards/akegata_denki/device_one/halconf.h
@@ -0,0 +1,525 @@
1/*
2 ChibiOS - Copyright (C) 2006..2018 Giovanni Di Sirio
3
4 Licensed under the Apache License, Version 2.0 (the "License");
5 you may not use this file except in compliance with the License.
6 You may obtain a copy of the License at
7
8 http://www.apache.org/licenses/LICENSE-2.0
9
10 Unless required by applicable law or agreed to in writing, software
11 distributed under the License is distributed on an "AS IS" BASIS,
12 WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
13 See the License for the specific language governing permissions and
14 limitations under the License.
15*/
16
17/**
18 * @file templates/halconf.h
19 * @brief HAL configuration header.
20 * @details HAL configuration file, this file allows to enable or disable the
21 * various device drivers from your application. You may also use
22 * this file in order to override the device drivers default settings.
23 *
24 * @addtogroup HAL_CONF
25 * @{
26 */
27
28#ifndef HALCONF_H
29#define HALCONF_H
30
31#define _CHIBIOS_HAL_CONF_
32#define _CHIBIOS_HAL_CONF_VER_7_0_
33
34#include "mcuconf.h"
35
36/**
37 * @brief Enables the PAL subsystem.
38 */
39#if !defined(HAL_USE_PAL) || defined(__DOXYGEN__)
40#define HAL_USE_PAL TRUE
41#endif
42
43/**
44 * @brief Enables the ADC subsystem.
45 */
46#if !defined(HAL_USE_ADC) || defined(__DOXYGEN__)
47#define HAL_USE_ADC FALSE
48#endif
49
50/**
51 * @brief Enables the CAN subsystem.
52 */
53#if !defined(HAL_USE_CAN) || defined(__DOXYGEN__)
54#define HAL_USE_CAN FALSE
55#endif
56
57/**
58 * @brief Enables the cryptographic subsystem.
59 */
60#if !defined(HAL_USE_CRY) || defined(__DOXYGEN__)
61#define HAL_USE_CRY FALSE
62#endif
63
64/**
65 * @brief Enables the DAC subsystem.
66 */
67#if !defined(HAL_USE_DAC) || defined(__DOXYGEN__)
68#define HAL_USE_DAC FALSE
69#endif
70
71/**
72 * @brief Enables the GPT subsystem.
73 */
74#if !defined(HAL_USE_GPT) || defined(__DOXYGEN__)
75#define HAL_USE_GPT FALSE
76#endif
77
78/**
79 * @brief Enables the I2C subsystem.
80 */
81#if !defined(HAL_USE_I2C) || defined(__DOXYGEN__)
82#define HAL_USE_I2C FALSE
83#endif
84
85/**
86 * @brief Enables the I2S subsystem.
87 */
88#if !defined(HAL_USE_I2S) || defined(__DOXYGEN__)
89#define HAL_USE_I2S FALSE
90#endif
91
92/**
93 * @brief Enables the ICU subsystem.
94 */
95#if !defined(HAL_USE_ICU) || defined(__DOXYGEN__)
96#define HAL_USE_ICU FALSE
97#endif
98
99/**
100 * @brief Enables the MAC subsystem.
101 */
102#if !defined(HAL_USE_MAC) || defined(__DOXYGEN__)
103#define HAL_USE_MAC FALSE
104#endif
105
106/**
107 * @brief Enables the MMC_SPI subsystem.
108 */
109#if !defined(HAL_USE_MMC_SPI) || defined(__DOXYGEN__)
110#define HAL_USE_MMC_SPI FALSE
111#endif
112
113/**
114 * @brief Enables the PWM subsystem.
115 */
116#if !defined(HAL_USE_PWM) || defined(__DOXYGEN__)
117#define HAL_USE_PWM FALSE
118#endif
119
120/**
121 * @brief Enables the RTC subsystem.
122 */
123#if !defined(HAL_USE_RTC) || defined(__DOXYGEN__)
124#define HAL_USE_RTC FALSE
125#endif
126
127/**
128 * @brief Enables the SDC subsystem.
129 */
130#if !defined(HAL_USE_SDC) || defined(__DOXYGEN__)
131#define HAL_USE_SDC FALSE
132#endif
133
134/**
135 * @brief Enables the SERIAL subsystem.
136 */
137#if !defined(HAL_USE_SERIAL) || defined(__DOXYGEN__)
138#define HAL_USE_SERIAL FALSE
139#endif
140
141/**
142 * @brief Enables the SERIAL over USB subsystem.
143 */
144#if !defined(HAL_USE_SERIAL_USB) || defined(__DOXYGEN__)
145#define HAL_USE_SERIAL_USB TRUE
146#endif
147
148/**
149 * @brief Enables the SIO subsystem.
150 */
151#if !defined(HAL_USE_SIO) || defined(__DOXYGEN__)
152#define HAL_USE_SIO FALSE
153#endif
154
155/**
156 * @brief Enables the SPI subsystem.
157 */
158#if !defined(HAL_USE_SPI) || defined(__DOXYGEN__)
159#define HAL_USE_SPI FALSE
160#endif
161
162/**
163 * @brief Enables the TRNG subsystem.
164 */
165#if !defined(HAL_USE_TRNG) || defined(__DOXYGEN__)
166#define HAL_USE_TRNG FALSE
167#endif
168
169/**
170 * @brief Enables the UART subsystem.
171 */
172#if !defined(HAL_USE_UART) || defined(__DOXYGEN__)
173#define HAL_USE_UART FALSE
174#endif
175
176/**
177 * @brief Enables the USB subsystem.
178 */
179#if !defined(HAL_USE_USB) || defined(__DOXYGEN__)
180#define HAL_USE_USB TRUE
181#endif
182
183/**
184 * @brief Enables the WDG subsystem.
185 */
186#if !defined(HAL_USE_WDG) || defined(__DOXYGEN__)
187#define HAL_USE_WDG FALSE
188#endif
189
190/**
191 * @brief Enables the WSPI subsystem.
192 */
193#if !defined(HAL_USE_WSPI) || defined(__DOXYGEN__)
194#define HAL_USE_WSPI FALSE
195#endif
196
197/*===========================================================================*/
198/* PAL driver related settings. */
199/*===========================================================================*/
200
201/**
202 * @brief Enables synchronous APIs.
203 * @note Disabling this option saves both code and data space.
204 */
205#if !defined(PAL_USE_CALLBACKS) || defined(__DOXYGEN__)
206#define PAL_USE_CALLBACKS FALSE
207#endif
208
209/**
210 * @brief Enables synchronous APIs.
211 * @note Disabling this option saves both code and data space.
212 */
213#if !defined(PAL_USE_WAIT) || defined(__DOXYGEN__)
214#define PAL_USE_WAIT FALSE
215#endif
216
217/*===========================================================================*/
218/* ADC driver related settings. */
219/*===========================================================================*/
220
221/**
222 * @brief Enables synchronous APIs.
223 * @note Disabling this option saves both code and data space.
224 */
225#if !defined(ADC_USE_WAIT) || defined(__DOXYGEN__)
226#define ADC_USE_WAIT FALSE
227#endif
228
229/**
230 * @brief Enables the @p adcAcquireBus() and @p adcReleaseBus() APIs.
231 * @note Disabling this option saves both code and data space.
232 */
233#if !defined(ADC_USE_MUTUAL_EXCLUSION) || defined(__DOXYGEN__)
234#define ADC_USE_MUTUAL_EXCLUSION FALSE
235#endif
236
237/*===========================================================================*/
238/* CAN driver related settings. */
239/*===========================================================================*/
240
241/**
242 * @brief Sleep mode related APIs inclusion switch.
243 */
244#if !defined(CAN_USE_SLEEP_MODE) || defined(__DOXYGEN__)
245#define CAN_USE_SLEEP_MODE TRUE
246#endif
247
248/**
249 * @brief Enforces the driver to use direct callbacks rather than OSAL events.
250 */
251#if !defined(CAN_ENFORCE_USE_CALLBACKS) || defined(__DOXYGEN__)
252#define CAN_ENFORCE_USE_CALLBACKS FALSE
253#endif
254
255/*===========================================================================*/
256/* CRY driver related settings. */
257/*===========================================================================*/
258
259/**
260 * @brief Enables the SW fall-back of the cryptographic driver.
261 * @details When enabled, this option, activates a fall-back software
262 * implementation for algorithms not supported by the underlying
263 * hardware.
264 * @note Fall-back implementations may not be present for all algorithms.
265 */
266#if !defined(HAL_CRY_USE_FALLBACK) || defined(__DOXYGEN__)
267#define HAL_CRY_USE_FALLBACK FALSE
268#endif
269
270/**
271 * @brief Makes the driver forcibly use the fall-back implementations.
272 */
273#if !defined(HAL_CRY_ENFORCE_FALLBACK) || defined(__DOXYGEN__)
274#define HAL_CRY_ENFORCE_FALLBACK FALSE
275#endif
276
277/*===========================================================================*/
278/* DAC driver related settings. */
279/*===========================================================================*/
280
281/**
282 * @brief Enables synchronous APIs.
283 * @note Disabling this option saves both code and data space.
284 */
285#if !defined(DAC_USE_WAIT) || defined(__DOXYGEN__)
286#define DAC_USE_WAIT TRUE
287#endif
288
289/**
290 * @brief Enables the @p dacAcquireBus() and @p dacReleaseBus() APIs.
291 * @note Disabling this option saves both code and data space.
292 */
293#if !defined(DAC_USE_MUTUAL_EXCLUSION) || defined(__DOXYGEN__)
294#define DAC_USE_MUTUAL_EXCLUSION TRUE
295#endif
296
297/*===========================================================================*/
298/* I2C driver related settings. */
299/*===========================================================================*/
300
301/**
302 * @brief Enables the mutual exclusion APIs on the I2C bus.
303 */
304#if !defined(I2C_USE_MUTUAL_EXCLUSION) || defined(__DOXYGEN__)
305#define I2C_USE_MUTUAL_EXCLUSION TRUE
306#endif
307
308/*===========================================================================*/
309/* MAC driver related settings. */
310/*===========================================================================*/
311
312/**
313 * @brief Enables the zero-copy API.
314 */
315#if !defined(MAC_USE_ZERO_COPY) || defined(__DOXYGEN__)
316#define MAC_USE_ZERO_COPY FALSE
317#endif
318
319/**
320 * @brief Enables an event sources for incoming packets.
321 */
322#if !defined(MAC_USE_EVENTS) || defined(__DOXYGEN__)
323#define MAC_USE_EVENTS TRUE
324#endif
325
326/*===========================================================================*/
327/* MMC_SPI driver related settings. */
328/*===========================================================================*/
329
330/**
331 * @brief Delays insertions.
332 * @details If enabled this options inserts delays into the MMC waiting
333 * routines releasing some extra CPU time for the threads with
334 * lower priority, this may slow down the driver a bit however.
335 * This option is recommended also if the SPI driver does not
336 * use a DMA channel and heavily loads the CPU.
337 */
338#if !defined(MMC_NICE_WAITING) || defined(__DOXYGEN__)
339#define MMC_NICE_WAITING TRUE
340#endif
341
342/*===========================================================================*/
343/* SDC driver related settings. */
344/*===========================================================================*/
345
346/**
347 * @brief Number of initialization attempts before rejecting the card.
348 * @note Attempts are performed at 10mS intervals.
349 */
350#if !defined(SDC_INIT_RETRY) || defined(__DOXYGEN__)
351#define SDC_INIT_RETRY 100
352#endif
353
354/**
355 * @brief Include support for MMC cards.
356 * @note MMC support is not yet implemented so this option must be kept
357 * at @p FALSE.
358 */
359#if !defined(SDC_MMC_SUPPORT) || defined(__DOXYGEN__)
360#define SDC_MMC_SUPPORT FALSE
361#endif
362
363/**
364 * @brief Delays insertions.
365 * @details If enabled this options inserts delays into the MMC waiting
366 * routines releasing some extra CPU time for the threads with
367 * lower priority, this may slow down the driver a bit however.
368 */
369#if !defined(SDC_NICE_WAITING) || defined(__DOXYGEN__)
370#define SDC_NICE_WAITING TRUE
371#endif
372
373/**
374 * @brief OCR initialization constant for V20 cards.
375 */
376#if !defined(SDC_INIT_OCR_V20) || defined(__DOXYGEN__)
377#define SDC_INIT_OCR_V20 0x50FF8000U
378#endif
379
380/**
381 * @brief OCR initialization constant for non-V20 cards.
382 */
383#if !defined(SDC_INIT_OCR) || defined(__DOXYGEN__)
384#define SDC_INIT_OCR 0x80100000U
385#endif
386
387/*===========================================================================*/
388/* SERIAL driver related settings. */
389/*===========================================================================*/
390
391/**
392 * @brief Default bit rate.
393 * @details Configuration parameter, this is the baud rate selected for the
394 * default configuration.
395 */
396#if !defined(SERIAL_DEFAULT_BITRATE) || defined(__DOXYGEN__)
397#define SERIAL_DEFAULT_BITRATE 38400
398#endif
399
400/**
401 * @brief Serial buffers size.
402 * @details Configuration parameter, you can change the depth of the queue
403 * buffers depending on the requirements of your application.
404 * @note The default is 16 bytes for both the transmission and receive
405 * buffers.
406 */
407#if !defined(SERIAL_BUFFERS_SIZE) || defined(__DOXYGEN__)
408#define SERIAL_BUFFERS_SIZE 16
409#endif
410
411/*===========================================================================*/
412/* SERIAL_USB driver related setting. */
413/*===========================================================================*/
414
415/**
416 * @brief Serial over USB buffers size.
417 * @details Configuration parameter, the buffer size must be a multiple of
418 * the USB data endpoint maximum packet size.
419 * @note The default is 256 bytes for both the transmission and receive
420 * buffers.
421 */
422#if !defined(SERIAL_USB_BUFFERS_SIZE) || defined(__DOXYGEN__)
423#define SERIAL_USB_BUFFERS_SIZE 256
424#endif
425
426/**
427 * @brief Serial over USB number of buffers.
428 * @note The default is 2 buffers.
429 */
430#if !defined(SERIAL_USB_BUFFERS_NUMBER) || defined(__DOXYGEN__)
431#define SERIAL_USB_BUFFERS_NUMBER 2
432#endif
433
434/*===========================================================================*/
435/* SPI driver related settings. */
436/*===========================================================================*/
437
438/**
439 * @brief Enables synchronous APIs.
440 * @note Disabling this option saves both code and data space.
441 */
442#if !defined(SPI_USE_WAIT) || defined(__DOXYGEN__)
443#define SPI_USE_WAIT FALSE
444#endif
445
446/**
447 * @brief Enables circular transfers APIs.
448 * @note Disabling this option saves both code and data space.
449 */
450#if !defined(SPI_USE_CIRCULAR) || defined(__DOXYGEN__)
451#define SPI_USE_CIRCULAR FALSE
452#endif
453
454
455/**
456 * @brief Enables the @p spiAcquireBus() and @p spiReleaseBus() APIs.
457 * @note Disabling this option saves both code and data space.
458 */
459#if !defined(SPI_USE_MUTUAL_EXCLUSION) || defined(__DOXYGEN__)
460#define SPI_USE_MUTUAL_EXCLUSION FALSE
461#endif
462
463/**
464 * @brief Handling method for SPI CS line.
465 * @note Disabling this option saves both code and data space.
466 */
467#if !defined(SPI_SELECT_MODE) || defined(__DOXYGEN__)
468#define SPI_SELECT_MODE SPI_SELECT_MODE_PAD
469#endif
470
471/*===========================================================================*/
472/* UART driver related settings. */
473/*===========================================================================*/
474
475/**
476 * @brief Enables synchronous APIs.
477 * @note Disabling this option saves both code and data space.
478 */
479#if !defined(UART_USE_WAIT) || defined(__DOXYGEN__)
480#define UART_USE_WAIT FALSE
481#endif
482
483/**
484 * @brief Enables the @p uartAcquireBus() and @p uartReleaseBus() APIs.
485 * @note Disabling this option saves both code and data space.
486 */
487#if !defined(UART_USE_MUTUAL_EXCLUSION) || defined(__DOXYGEN__)
488#define UART_USE_MUTUAL_EXCLUSION FALSE
489#endif
490
491/*===========================================================================*/
492/* USB driver related settings. */
493/*===========================================================================*/
494
495/**
496 * @brief Enables synchronous APIs.
497 * @note Disabling this option saves both code and data space.
498 */
499#if !defined(USB_USE_WAIT) || defined(__DOXYGEN__)
500#define USB_USE_WAIT TRUE
501#endif
502
503/*===========================================================================*/
504/* WSPI driver related settings. */
505/*===========================================================================*/
506
507/**
508 * @brief Enables synchronous APIs.
509 * @note Disabling this option saves both code and data space.
510 */
511#if !defined(WSPI_USE_WAIT) || defined(__DOXYGEN__)
512#define WSPI_USE_WAIT TRUE
513#endif
514
515/**
516 * @brief Enables the @p wspiAcquireBus() and @p wspiReleaseBus() APIs.
517 * @note Disabling this option saves both code and data space.
518 */
519#if !defined(WSPI_USE_MUTUAL_EXCLUSION) || defined(__DOXYGEN__)
520#define WSPI_USE_MUTUAL_EXCLUSION TRUE
521#endif
522
523#endif /* HALCONF_H */
524
525/** @} */
diff --git a/keyboards/akegata_denki/device_one/info.json b/keyboards/akegata_denki/device_one/info.json
new file mode 100644
index 000000000..50e8c2a90
--- /dev/null
+++ b/keyboards/akegata_denki/device_one/info.json
@@ -0,0 +1,21 @@
1{
2 "keyboard_name": "device one",
3 "url": "https://akegata.co",
4 "maintainer": "qmk",
5 "width": 15,
6 "height": 5,
7 "layouts": {
8 "LAYOUT_60_ansi": {
9 "layout": [{"label":"~", "x":0, "y":0}, {"label":"!", "x":1, "y":0}, {"label":"@", "x":2, "y":0}, {"label":"#", "x":3, "y":0}, {"label":"$", "x":4, "y":0}, {"label":"%", "x":5, "y":0}, {"label":"^", "x":6, "y":0}, {"label":"&", "x":7, "y":0}, {"label":"*", "x":8, "y":0}, {"label":"(", "x":9, "y":0}, {"label":")", "x":10, "y":0}, {"label":"_", "x":11, "y":0}, {"label":"+", "x":12, "y":0}, {"label":"backspace", "x":13, "y":0, "w":2}, {"label":"tab", "x":0, "y":1, "w":1.5}, {"label":"q", "x":1.5, "y":1}, {"label":"w", "x":2.5, "y":1}, {"label":"e", "x":3.5, "y":1}, {"label":"r", "x":4.5, "y":1}, {"label":"t", "x":5.5, "y":1}, {"label":"y", "x":6.5, "y":1}, {"label":"u", "x":7.5, "y":1}, {"label":"i", "x":8.5, "y":1}, {"label":"o", "x":9.5, "y":1}, {"label":"p", "x":10.5, "y":1}, {"label":"{", "x":11.5, "y":1}, {"label":"}", "x":12.5, "y":1}, {"label":"|", "x":13.5, "y":1, "w":1.5}, {"label":"capslock", "x":0, "y":2, "w":1.75}, {"label":"a", "x":1.75, "y":2}, {"label":"s", "x":2.75, "y":2}, {"label":"d", "x":3.75, "y":2}, {"label":"f", "x":4.75, "y":2}, {"label":"g", "x":5.75, "y":2}, {"label":"h", "x":6.75, "y":2}, {"label":"j", "x":7.75, "y":2}, {"label":"k", "x":8.75, "y":2}, {"label":"l", "x":9.75, "y":2}, {"label":":", "x":10.75, "y":2}, {"label":"\"", "x":11.75, "y":2}, {"label":"enter", "x":12.75, "y":2, "w":2.25}, {"label":"shift", "x":0, "y":3, "w":2.25}, {"label":"z", "x":2.25, "y":3}, {"label":"x", "x":3.25, "y":3}, {"label":"c", "x":4.25, "y":3}, {"label":"v", "x":5.25, "y":3}, {"label":"b", "x":6.25, "y":3}, {"label":"n", "x":7.25, "y":3}, {"label":"m", "x":8.25, "y":3}, {"label":"<", "x":9.25, "y":3}, {"label":">", "x":10.25, "y":3}, {"label":"?", "x":11.25, "y":3}, {"label":"shift", "x":12.25, "y":3, "w":2.75}, {"label":"ctrl", "x":0, "y":4, "w":1.25}, {"label":"meta", "x":1.25, "y":4, "w":1.25}, {"label":"alt", "x":2.5, "y":4, "w":1.25}, {"x":3.75, "y":4, "w":6.25}, {"label":"alt", "x":10, "y":4, "w":1.25}, {"label":"meta", "x":11.25, "y":4, "w":1.25}, {"label":"menu", "x":12.5, "y":4, "w":1.25}, {"label":"ctrl", "x":13.75, "y":4, "w":1.25}]
10 },
11 "LAYOUT_60_iso": {
12 "layout": [{"label":"\u00ac", "x":0, "y":0}, {"label":"!", "x":1, "y":0}, {"label":"\"", "x":2, "y":0}, {"label":"\u00a3", "x":3, "y":0}, {"label":"$", "x":4, "y":0}, {"label":"%", "x":5, "y":0}, {"label":"^", "x":6, "y":0}, {"label":"&", "x":7, "y":0}, {"label":"*", "x":8, "y":0}, {"label":"(", "x":9, "y":0}, {"label":")", "x":10, "y":0}, {"label":"_", "x":11, "y":0}, {"label":"+", "x":12, "y":0}, {"label":"backspace", "x":13, "y":0, "w":2}, {"label":"tab", "x":0, "y":1, "w":1.5}, {"label":"q", "x":1.5, "y":1}, {"label":"w", "x":2.5, "y":1}, {"label":"e", "x":3.5, "y":1}, {"label":"r", "x":4.5, "y":1}, {"label":"t", "x":5.5, "y":1}, {"label":"y", "x":6.5, "y":1}, {"label":"u", "x":7.5, "y":1}, {"label":"i", "x":8.5, "y":1}, {"label":"o", "x":9.5, "y":1}, {"label":"p", "x":10.5, "y":1}, {"label":"{", "x":11.5, "y":1}, {"label":"}", "x":12.5, "y":1}, {"label":"caps lock", "x":0, "y":2, "w":1.75}, {"label":"a", "x":1.75, "y":2}, {"label":"s", "x":2.75, "y":2}, {"label":"d", "x":3.75, "y":2}, {"label":"f", "x":4.75, "y":2}, {"label":"g", "x":5.75, "y":2}, {"label":"h", "x":6.75, "y":2}, {"label":"j", "x":7.75, "y":2}, {"label":"k", "x":8.75, "y":2}, {"label":"l", "x":9.75, "y":2}, {"label":":", "x":10.75, "y":2}, {"label":"@", "x":11.75, "y":2}, {"label":"~", "x":12.75, "y":2}, {"label":"enter", "x":13.75, "y":1, "w":1.25, "h":2}, {"label":"shift", "x":0, "y":3, "w":1.25}, {"label":"|", "x":1.25, "y":3}, {"label":"z", "x":2.25, "y":3}, {"label":"x", "x":3.25, "y":3}, {"label":"c", "x":4.25, "y":3}, {"label":"v", "x":5.25, "y":3}, {"label":"b", "x":6.25, "y":3}, {"label":"n", "x":7.25, "y":3}, {"label":"m", "x":8.25, "y":3}, {"label":"<", "x":9.25, "y":3}, {"label":">", "x":10.25, "y":3}, {"label":"?", "x":11.25, "y":3}, {"label":"shift", "x":12.25, "y":3, "w":2.75}, {"label":"ctrl", "x":0, "y":4, "w":1.25}, {"label":"win", "x":1.25, "y":4, "w":1.25}, {"label":"alt", "x":2.5, "y":4, "w":1.25}, {"x":3.75, "y":4, "w":6.25}, {"label":"altgr", "x":10, "y":4, "w":1.25}, {"label":"win", "x":11.25, "y":4, "w":1.25}, {"label":"menu", "x":12.5, "y":4, "w":1.25}, {"label":"ctrl", "x":13.75, "y":4, "w":1.25}]
13 },
14 "LAYOUT_60_ansi_split_bs": {
15 "layout": [{"label":"~", "x":0, "y":0}, {"label":"!", "x":1, "y":0}, {"label":"@", "x":2, "y":0}, {"label":"#", "x":3, "y":0}, {"label":"$", "x":4, "y":0}, {"label":"%", "x":5, "y":0}, {"label":"^", "x":6, "y":0}, {"label":"&", "x":7, "y":0}, {"label":"*", "x":8, "y":0}, {"label":"(", "x":9, "y":0}, {"label":")", "x":10, "y":0}, {"label":"_", "x":11, "y":0}, {"label":"+", "x":12, "y":0}, {"label":"|", "x":13, "y":0}, {"label":"~", "x":14, "y":0}, {"label":"tab", "x":0, "y":1, "w":1.5}, {"label":"q", "x":1.5, "y":1}, {"label":"w", "x":2.5, "y":1}, {"label":"e", "x":3.5, "y":1}, {"label":"r", "x":4.5, "y":1}, {"label":"t", "x":5.5, "y":1}, {"label":"y", "x":6.5, "y":1}, {"label":"u", "x":7.5, "y":1}, {"label":"i", "x":8.5, "y":1}, {"label":"o", "x":9.5, "y":1}, {"label":"p", "x":10.5, "y":1}, {"label":"{", "x":11.5, "y":1}, {"label":"}", "x":12.5, "y":1}, {"label":"enter", "x":13.5, "y":1, "w":1.5}, {"label":"capslock", "x":0, "y":2, "w":1.75}, {"label":"a", "x":1.75, "y":2}, {"label":"s", "x":2.75, "y":2}, {"label":"d", "x":3.75, "y":2}, {"label":"f", "x":4.75, "y":2}, {"label":"g", "x":5.75, "y":2}, {"label":"h", "x":6.75, "y":2}, {"label":"j", "x":7.75, "y":2}, {"label":"k", "x":8.75, "y":2}, {"label":"l", "x":9.75, "y":2}, {"label":":", "x":10.75, "y":2}, {"label":"\"", "x":11.75, "y":2}, {"label":"enter", "x":12.75, "y":2, "w":2.25}, {"label":"shift", "x":0, "y":3, "w":2.25}, {"label":"z", "x":2.25, "y":3}, {"label":"x", "x":3.25, "y":3}, {"label":"c", "x":4.25, "y":3}, {"label":"v", "x":5.25, "y":3}, {"label":"b", "x":6.25, "y":3}, {"label":"n", "x":7.25, "y":3}, {"label":"m", "x":8.25, "y":3}, {"label":"<", "x":9.25, "y":3}, {"label":">", "x":10.25, "y":3}, {"label":"?", "x":11.25, "y":3}, {"label":"shift", "x":12.25, "y":3, "w":2.75}, {"label":"ctrl", "x":0, "y":4, "w":1.25}, {"label":"meta", "x":1.25, "y":4, "w":1.25}, {"label":"alt", "x":2.5, "y":4, "w":1.25}, {"x":3.75, "y":4, "w":6.25}, {"label":"alt", "x":10, "y":4, "w":1.25}, {"label":"meta", "x":11.25, "y":4, "w":1.25}, {"label":"menu", "x":12.5, "y":4, "w":1.25}, {"label":"ctrl", "x":13.75, "y":4, "w":1.25}]
16 },
17 "LAYOUT_60_ansi_arrow": {
18 "layout": [{"label":"~", "x":0, "y":0}, {"label":"!", "x":1, "y":0}, {"label":"@", "x":2, "y":0}, {"label":"#", "x":3, "y":0}, {"label":"$", "x":4, "y":0}, {"label":"%", "x":5, "y":0}, {"label":"^", "x":6, "y":0}, {"label":"&", "x":7, "y":0}, {"label":"*", "x":8, "y":0}, {"label":"(", "x":9, "y":0}, {"label":")", "x":10, "y":0}, {"label":"_", "x":11, "y":0}, {"label":"+", "x":12, "y":0}, {"label":"backspace", "x":13, "y":0, "w":2}, {"label":"tab", "x":0, "y":1, "w":1.5}, {"label":"q", "x":1.5, "y":1}, {"label":"w", "x":2.5, "y":1}, {"label":"e", "x":3.5, "y":1}, {"label":"r", "x":4.5, "y":1}, {"label":"t", "x":5.5, "y":1}, {"label":"y", "x":6.5, "y":1}, {"label":"u", "x":7.5, "y":1}, {"label":"i", "x":8.5, "y":1}, {"label":"o", "x":9.5, "y":1}, {"label":"p", "x":10.5, "y":1}, {"label":"{", "x":11.5, "y":1}, {"label":"}", "x":12.5, "y":1}, {"label":"|", "x":13.5, "y":1, "w":1.5}, {"label":"capslock", "x":0, "y":2, "w":1.75}, {"label":"a", "x":1.75, "y":2}, {"label":"s", "x":2.75, "y":2}, {"label":"d", "x":3.75, "y":2}, {"label":"f", "x":4.75, "y":2}, {"label":"g", "x":5.75, "y":2}, {"label":"h", "x":6.75, "y":2}, {"label":"j", "x":7.75, "y":2}, {"label":"k", "x":8.75, "y":2}, {"label":"l", "x":9.75, "y":2}, {"label":":", "x":10.75, "y":2}, {"label":"\"", "x":11.75, "y":2}, {"label":"enter", "x":12.75, "y":2, "w":2.25}, {"label":"shift", "x":0, "y":3, "w":2.25}, {"label":"z", "x":2.25, "y":3}, {"label":"x", "x":3.25, "y":3}, {"label":"c", "x":4.25, "y":3}, {"label":"v", "x":5.25, "y":3}, {"label":"b", "x":6.25, "y":3}, {"label":"n", "x":7.25, "y":3}, {"label":"m", "x":8.25, "y":3}, {"label":"<", "x":9.25, "y":3}, {"label":">", "x":10.25, "y":3}, {"label":"shift", "x":11.25, "y":3, "w":1.75}, {"label":"up", "x":13, "y":3}, {"label":"/", "x":14, "y":3}, {"label":"ctrl", "x":0, "y":4, "w":1.25}, {"label":"meta", "x":1.25, "y":4, "w":1.25}, {"label":"alt", "x":2.5, "y":4, "w":1.25}, {"x":3.75, "y":4, "w":6.25}, {"label":"alt", "x":10, "y":4 }, {"label":"meta", "x":11, "y":4 }, {"label":"left", "x":12, "y":4 }, {"label":"down", "x":13, "y":4 }, {"label": "right", "x":14, "y":4 }]
19 }
20 }
21}
diff --git a/keyboards/akegata_denki/device_one/keymaps/ansi_arrow_keys/keymap.c b/keyboards/akegata_denki/device_one/keymaps/ansi_arrow_keys/keymap.c
new file mode 100644
index 000000000..15eadcbbd
--- /dev/null
+++ b/keyboards/akegata_denki/device_one/keymaps/ansi_arrow_keys/keymap.c
@@ -0,0 +1,19 @@
1/* Device One 60% ANSI layout */
2
3#include QMK_KEYBOARD_H
4
5const uint16_t PROGMEM keymaps[][MATRIX_ROWS][MATRIX_COLS] = {
6[0] = LAYOUT_60_ansi_arrow(
7 KC_GESC, KC_1, KC_2, KC_3, KC_4, KC_5, KC_6, KC_7, KC_8, KC_9, KC_0, KC_MINS, KC_EQL, KC_BSPC,
8 KC_TAB, KC_Q, KC_W, KC_E, KC_R, KC_T, KC_Y, KC_U, KC_I, KC_O, KC_P, KC_LBRC, KC_RBRC, KC_BSLS,
9 KC_CAPS, KC_A, KC_S, KC_D, KC_F, KC_G, KC_H, KC_J, KC_K, KC_L, KC_SCLN, KC_QUOT, KC_ENT,
10 KC_LSFT, KC_Z, KC_X, KC_C, KC_V, KC_B, KC_N, KC_M, KC_COMM, KC_DOT, KC_RSFT, KC_UP, KC_SLSH,
11 KC_LCTL, KC_LGUI, KC_LALT, KC_SPC, MO(1), KC_RGUI, KC_LEFT, KC_DOWN, KC_RIGHT),
12[1] = LAYOUT_60_ansi_arrow(
13 KC_GESC, KC_F1, KC_F2, KC_F3, KC_F4, KC_F5, KC_F6, KC_F7, KC_F8, KC_F9, KC_F10, KC_F11, KC_F12, KC_DEL,
14 KC_TRNS, KC_TRNS, KC_TRNS,KC_TRNS,KC_TRNS,KC_TRNS,KC_TRNS,KC_TRNS,KC_TRNS, KC_TRNS,KC_TRNS, KC_TRNS, KC_TRNS, KC_TRNS,
15 KC_TRNS, KC_TRNS, KC_TRNS,KC_TRNS,KC_TRNS,KC_TRNS,KC_TRNS,KC_TRNS,KC_TRNS, KC_TRNS,KC_TRNS, KC_TRNS, KC_TRNS,
16 KC_TRNS, KC_TRNS, KC_TRNS,KC_TRNS,KC_TRNS,KC_TRNS,KC_TRNS,KC_TRNS,KC_TRNS, KC_TRNS,KC_TRNS, KC_TRNS, KC_TRNS,
17 KC_TRNS, KC_TRNS, KC_TRNS, KC_TRNS, MO(1), KC_TRNS, KC_TRNS, KC_TRNS, KC_TRNS),
18
19};
diff --git a/keyboards/akegata_denki/device_one/keymaps/ansi_split_backspace/keymap.c b/keyboards/akegata_denki/device_one/keymaps/ansi_split_backspace/keymap.c
new file mode 100644
index 000000000..f602c19b7
--- /dev/null
+++ b/keyboards/akegata_denki/device_one/keymaps/ansi_split_backspace/keymap.c
@@ -0,0 +1,19 @@
1/* Device One 60% ANSI layout */
2
3#include QMK_KEYBOARD_H
4
5const uint16_t PROGMEM keymaps[][MATRIX_ROWS][MATRIX_COLS] = {
6[0] = LAYOUT_60_ansi_split_bs(
7 KC_GESC, KC_1, KC_2, KC_3, KC_4, KC_5, KC_6, KC_7, KC_8, KC_9, KC_0, KC_MINS, KC_EQL, KC_BSLS, KC_GRAVE,
8 KC_TAB, KC_Q, KC_W, KC_E, KC_R, KC_T, KC_Y, KC_U, KC_I, KC_O, KC_P, KC_LBRC, KC_RBRC, KC_BSPC,
9 KC_CAPS, KC_A, KC_S, KC_D, KC_F, KC_G, KC_H, KC_J, KC_K, KC_L, KC_SCLN, KC_QUOT, KC_ENT,
10 KC_LSFT, KC_Z, KC_X, KC_C, KC_V, KC_B, KC_N, KC_M, KC_COMM, KC_DOT, KC_SLSH, KC_RSFT,
11 KC_LCTL, KC_LGUI, KC_LALT, KC_SPC, KC_RALT, KC_RGUI, MO(1), KC_RCTL),
12[1] = LAYOUT_60_ansi_split_bs(
13 KC_GESC, KC_F1, KC_F2, KC_F3, KC_F4, KC_F5, KC_F6, KC_F7, KC_F8, KC_F9, KC_F10, KC_F11, KC_F12, KC_TRNS, KC_TRNS,
14 KC_TRNS, KC_TRNS, KC_TRNS, KC_TRNS, KC_TRNS, KC_TRNS, KC_TRNS, KC_TRNS, KC_TRNS, KC_TRNS, KC_TRNS, KC_TRNS, KC_TRNS, KC_TRNS,
15 KC_TRNS, KC_TRNS, KC_TRNS, KC_TRNS, KC_TRNS, KC_TRNS, KC_TRNS, KC_TRNS, KC_TRNS, KC_TRNS, KC_TRNS, KC_TRNS, KC_TRNS,
16 KC_TRNS, KC_TRNS, KC_TRNS, KC_TRNS, KC_TRNS, KC_TRNS, KC_TRNS, KC_TRNS, KC_TRNS, KC_TRNS, KC_TRNS, KC_TRNS,
17 KC_TRNS, KC_TRNS, KC_TRNS, KC_TRNS, KC_TRNS, KC_TRNS, MO(1), KC_TRNS),
18
19};
diff --git a/keyboards/akegata_denki/device_one/keymaps/default/keymap.c b/keyboards/akegata_denki/device_one/keymaps/default/keymap.c
new file mode 100644
index 000000000..1d0b919cb
--- /dev/null
+++ b/keyboards/akegata_denki/device_one/keymaps/default/keymap.c
@@ -0,0 +1,20 @@
1/* Device One 60% ANSI layout */
2
3#include QMK_KEYBOARD_H
4
5const uint16_t PROGMEM keymaps[][MATRIX_ROWS][MATRIX_COLS] = {
6[0] = LAYOUT_60_ansi(
7 KC_GESC, KC_1, KC_2, KC_3, KC_4, KC_5, KC_6, KC_7, KC_8, KC_9, KC_0, KC_MINS, KC_EQL, KC_BSPC,
8 KC_TAB, KC_Q, KC_W, KC_E, KC_R, KC_T, KC_Y, KC_U, KC_I, KC_O, KC_P, KC_LBRC, KC_RBRC, KC_BSLS,
9 KC_CAPS, KC_A, KC_S, KC_D, KC_F, KC_G, KC_H, KC_J, KC_K, KC_L, KC_SCLN, KC_QUOT, KC_ENT,
10 KC_LSFT, KC_Z, KC_X, KC_C, KC_V, KC_B, KC_N, KC_M, KC_COMM, KC_DOT, KC_SLSH, KC_RSFT,
11 KC_LCTL, KC_LGUI, KC_LALT, KC_SPC, KC_RALT, KC_RGUI, MO(1), KC_RCTL),
12
13[1] = LAYOUT_60_ansi(
14 KC_GESC, KC_F1, KC_F2, KC_F3, KC_F4, KC_F5, KC_F6, KC_F7, KC_F8, KC_F9, KC_F10, KC_F11, KC_F12, KC_DEL,
15 KC_TRNS, KC_TRNS, KC_TRNS, KC_TRNS, KC_TRNS, KC_TRNS, KC_TRNS, KC_TRNS, KC_TRNS, KC_TRNS, KC_TRNS, KC_TRNS, KC_TRNS, KC_TRNS,
16 KC_TRNS, KC_TRNS, KC_TRNS, KC_TRNS, KC_TRNS, KC_TRNS, KC_TRNS, KC_TRNS, KC_TRNS, KC_TRNS, KC_TRNS, KC_TRNS, KC_TRNS,
17 KC_TRNS, KC_TRNS, KC_TRNS, KC_TRNS, KC_TRNS, KC_TRNS, KC_TRNS, KC_TRNS, KC_TRNS, KC_TRNS, KC_TRNS, KC_TRNS,
18 KC_TRNS, KC_TRNS, KC_TRNS, KC_TRNS, KC_TRNS, KC_TRNS, MO(1), KC_TRNS),
19
20};
diff --git a/keyboards/akegata_denki/device_one/keymaps/iso/keymap.c b/keyboards/akegata_denki/device_one/keymaps/iso/keymap.c
new file mode 100644
index 000000000..720f10e13
--- /dev/null
+++ b/keyboards/akegata_denki/device_one/keymaps/iso/keymap.c
@@ -0,0 +1,18 @@
1/* Device One 60% ANSI layout */
2
3#include QMK_KEYBOARD_H
4
5const uint16_t PROGMEM keymaps[][MATRIX_ROWS][MATRIX_COLS] = {
6[0] = LAYOUT_60_iso(
7 KC_GESC, KC_1, KC_2, KC_3, KC_4, KC_5, KC_6, KC_7, KC_8, KC_9, KC_0, KC_MINS, KC_EQL, KC_BSPC,
8 KC_TAB, KC_Q, KC_W, KC_E, KC_R, KC_T, KC_Y, KC_U, KC_I, KC_O, KC_P, KC_LBRC, KC_RBRC,
9 KC_CAPS, KC_A, KC_S, KC_D, KC_F, KC_G, KC_H, KC_J, KC_K, KC_L, KC_SCLN, KC_QUOT, KC_NUHS, KC_ENT,
10 KC_LSFT, KC_NUBS, KC_Z, KC_X, KC_C, KC_V, KC_B, KC_N, KC_M, KC_COMM, KC_DOT, KC_SLSH, KC_RSFT,
11 KC_LCTL, KC_LGUI, KC_LALT, KC_SPC, KC_RALT, KC_RGUI, MO(1), KC_RCTL),
12[1] = LAYOUT_60_iso(
13 KC_GESC, KC_F1, KC_F2, KC_F3, KC_F4, KC_F5, KC_F6, KC_F7, KC_F8, KC_F9, KC_F10, KC_F11, KC_F12, KC_DEL,
14 KC_TRNS, KC_TRNS, KC_TRNS, KC_TRNS, KC_TRNS, KC_TRNS, KC_TRNS, KC_TRNS, KC_TRNS, KC_TRNS, KC_TRNS, KC_TRNS, KC_TRNS,
15 KC_TRNS, KC_TRNS, KC_TRNS, KC_TRNS, KC_TRNS, KC_TRNS, KC_TRNS, KC_TRNS, KC_TRNS, KC_TRNS, KC_TRNS, KC_TRNS, KC_TRNS, KC_TRNS,
16 KC_TRNS, KC_TRNS, KC_TRNS, KC_TRNS, KC_TRNS, KC_TRNS, KC_TRNS, KC_TRNS, KC_TRNS, KC_TRNS, KC_TRNS, KC_TRNS, KC_TRNS,
17 KC_TRNS, KC_TRNS, KC_TRNS, KC_TRNS, KC_TRNS, KC_TRNS, MO(1), KC_TRNS),
18};
diff --git a/keyboards/akegata_denki/device_one/mcuconf.h b/keyboards/akegata_denki/device_one/mcuconf.h
new file mode 100644
index 000000000..924ccb9e0
--- /dev/null
+++ b/keyboards/akegata_denki/device_one/mcuconf.h
@@ -0,0 +1,187 @@
1/*
2 ChibiOS - Copyright (C) 2006..2018 Giovanni Di Sirio
3 Licensed under the Apache License, Version 2.0 (the "License");
4 you may not use this file except in compliance with the License.
5 You may obtain a copy of the License at
6 http://www.apache.org/licenses/LICENSE-2.0
7 Unless required by applicable law or agreed to in writing, software
8 distributed under the License is distributed on an "AS IS" BASIS,
9 WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
10 See the License for the specific language governing permissions and
11 limitations under the License.
12*/
13
14#ifndef MCUCONF_H
15#define MCUCONF_H
16
17/*
18 * STM32F0xx drivers configuration.
19 * The following settings override the default settings present in
20 * the various device driver implementation headers.
21 * Note that the settings for each driver only have effect if the whole
22 * driver is enabled in halconf.h.
23 *
24 * IRQ priorities:
25 * 3...0 Lowest...Highest.
26 *
27 * DMA priorities:
28 * 0...3 Lowest...Highest.
29 */
30
31#define STM32F0xx_MCUCONF
32
33/*
34 * HAL driver system settings.
35 */
36#define STM32_NO_INIT FALSE
37#define STM32_PVD_ENABLE FALSE
38#define STM32_PLS STM32_PLS_LEV0
39#define STM32_HSI_ENABLED TRUE
40#define STM32_HSI14_ENABLED TRUE
41#define STM32_HSI48_ENABLED FALSE
42#define STM32_LSI_ENABLED TRUE
43#define STM32_HSE_ENABLED FALSE
44#define STM32_LSE_ENABLED FALSE
45#define STM32_SW STM32_SW_PLL
46#define STM32_PLLSRC STM32_PLLSRC_HSI_DIV2
47#define STM32_PREDIV_VALUE 1
48#define STM32_PLLMUL_VALUE 12
49#define STM32_HPRE STM32_HPRE_DIV1
50#define STM32_PPRE STM32_PPRE_DIV1
51#define STM32_MCOSEL STM32_MCOSEL_NOCLOCK
52#define STM32_MCOPRE STM32_MCOPRE_DIV1
53#define STM32_PLLNODIV STM32_PLLNODIV_DIV2
54#define STM32_USBSW STM32_USBSW_HSI48
55#define STM32_CECSW STM32_CECSW_HSI
56#define STM32_I2C1SW STM32_I2C1SW_HSI
57#define STM32_USART1SW STM32_USART1SW_PCLK
58#define STM32_RTCSEL STM32_RTCSEL_LSI
59
60/*
61 * IRQ system settings.
62 */
63#define STM32_IRQ_EXTI0_1_IRQ_PRIORITY 3
64#define STM32_IRQ_EXTI2_3_IRQ_PRIORITY 3
65#define STM32_IRQ_EXTI4_15_IRQ_PRIORITY 3
66#define STM32_IRQ_EXTI16_IRQ_PRIORITY 3
67#define STM32_IRQ_EXTI17_20_IRQ_PRIORITY 3
68#define STM32_IRQ_EXTI21_22_IRQ_PRIORITY 3
69
70/*
71 * ADC driver system settings.
72 */
73#define STM32_ADC_USE_ADC1 FALSE
74#define STM32_ADC_ADC1_CKMODE STM32_ADC_CKMODE_ADCCLK
75#define STM32_ADC_ADC1_DMA_PRIORITY 2
76#define STM32_ADC_ADC1_DMA_IRQ_PRIORITY 2
77#define STM32_ADC_ADC1_DMA_STREAM STM32_DMA_STREAM_ID(1, 1)
78
79/*
80 * GPT driver system settings.
81 */
82#define STM32_GPT_USE_TIM1 FALSE
83#define STM32_GPT_USE_TIM2 FALSE
84#define STM32_GPT_USE_TIM3 FALSE
85#define STM32_GPT_USE_TIM14 FALSE
86#define STM32_GPT_TIM1_IRQ_PRIORITY 2
87#define STM32_GPT_TIM2_IRQ_PRIORITY 2
88#define STM32_GPT_TIM3_IRQ_PRIORITY 2
89#define STM32_GPT_TIM14_IRQ_PRIORITY 2
90
91/*
92 * I2C driver system settings.
93 */
94#define STM32_I2C_USE_I2C1 FALSE
95#define STM32_I2C_BUSY_TIMEOUT 50
96#define STM32_I2C_I2C1_IRQ_PRIORITY 3
97#define STM32_I2C_USE_DMA TRUE
98#define STM32_I2C_I2C1_DMA_PRIORITY 1
99#define STM32_I2C_I2C1_RX_DMA_STREAM STM32_DMA_STREAM_ID(1, 3)
100#define STM32_I2C_I2C1_TX_DMA_STREAM STM32_DMA_STREAM_ID(1, 2)
101#define STM32_I2C_DMA_ERROR_HOOK(i2cp) osalSysHalt("DMA failure")
102
103/*
104 * I2S driver system settings.
105 */
106#define STM32_I2S_USE_SPI1 FALSE
107#define STM32_I2S_SPI1_MODE (STM32_I2S_MODE_MASTER | \
108 STM32_I2S_MODE_RX)
109#define STM32_I2S_SPI1_IRQ_PRIORITY 2
110#define STM32_I2S_SPI1_DMA_PRIORITY 1
111#define STM32_I2S_SPI1_RX_DMA_STREAM STM32_DMA_STREAM_ID(1, 2)
112#define STM32_I2S_SPI1_TX_DMA_STREAM STM32_DMA_STREAM_ID(1, 3)
113#define STM32_I2S_DMA_ERROR_HOOK(i2sp) osalSysHalt("DMA failure")
114
115/*
116 * ICU driver system settings.
117 */
118#define STM32_ICU_USE_TIM1 FALSE
119#define STM32_ICU_USE_TIM2 FALSE
120#define STM32_ICU_USE_TIM3 FALSE
121#define STM32_ICU_TIM1_IRQ_PRIORITY 3
122#define STM32_ICU_TIM2_IRQ_PRIORITY 3
123#define STM32_ICU_TIM3_IRQ_PRIORITY 3
124
125/*
126 * PWM driver system settings.
127 */
128#define STM32_PWM_USE_ADVANCED FALSE
129#define STM32_PWM_USE_TIM1 FALSE
130#define STM32_PWM_USE_TIM2 FALSE
131#define STM32_PWM_USE_TIM3 FALSE
132#define STM32_PWM_TIM1_IRQ_PRIORITY 3
133#define STM32_PWM_TIM2_IRQ_PRIORITY 3
134#define STM32_PWM_TIM3_IRQ_PRIORITY 3
135
136/*
137 * SERIAL driver system settings.
138 */
139#define STM32_SERIAL_USE_USART1 FALSE
140#define STM32_SERIAL_USE_USART2 TRUE
141#define STM32_SERIAL_USART1_PRIORITY 3
142#define STM32_SERIAL_USART2_PRIORITY 3
143
144/*
145 * SPI driver system settings.
146 */
147#define STM32_SPI_USE_SPI1 FALSE
148#define STM32_SPI_SPI1_DMA_PRIORITY 1
149#define STM32_SPI_SPI1_IRQ_PRIORITY 2
150#define STM32_SPI_SPI1_RX_DMA_STREAM STM32_DMA_STREAM_ID(1, 2)
151#define STM32_SPI_SPI1_TX_DMA_STREAM STM32_DMA_STREAM_ID(1, 3)
152#define STM32_SPI_DMA_ERROR_HOOK(spip) osalSysHalt("DMA failure")
153
154/*
155 * ST driver system settings.
156 */
157#define STM32_ST_IRQ_PRIORITY 2
158#define STM32_ST_USE_TIMER 2
159
160/*
161 * UART driver system settings.
162 */
163#define STM32_UART_USE_USART1 FALSE
164#define STM32_UART_USE_USART2 FALSE
165#define STM32_UART_USART1_IRQ_PRIORITY 3
166#define STM32_UART_USART2_IRQ_PRIORITY 3
167#define STM32_UART_USART1_DMA_PRIORITY 0
168#define STM32_UART_USART2_DMA_PRIORITY 0
169#define STM32_UART_USART1_RX_DMA_STREAM STM32_DMA_STREAM_ID(1, 3)
170#define STM32_UART_USART1_TX_DMA_STREAM STM32_DMA_STREAM_ID(1, 2)
171#define STM32_UART_USART2_RX_DMA_STREAM STM32_DMA_STREAM_ID(1, 5)
172#define STM32_UART_USART2_TX_DMA_STREAM STM32_DMA_STREAM_ID(1, 4)
173#define STM32_UART_DMA_ERROR_HOOK(uartp) osalSysHalt("DMA failure")
174
175/*
176 * WDG driver system settings.
177 */
178#define STM32_WDG_USE_IWDG FALSE
179
180/*
181 * USB driver system settings.
182 */
183#define STM32_USB_USE_USB1 TRUE
184#define STM32_USB_LOW_POWER_ON_SUSPEND FALSE
185#define STM32_USB_USB1_LP_IRQ_PRIORITY 3
186
187#endif /* MCUCONF_H */
diff --git a/keyboards/akegata_denki/device_one/readme.md b/keyboards/akegata_denki/device_one/readme.md
new file mode 100644
index 000000000..75e56399b
--- /dev/null
+++ b/keyboards/akegata_denki/device_one/readme.md
@@ -0,0 +1,15 @@
1# 明け方電気 (akegata denki) device one
2
3![device one](https://cdn.shopify.com/s/files/1/0428/0624/7583/products/keyboard_300x300.png?v=1594330016)
4
5A caseless 60% mechanical keyboard that strikes the right balance between affordability and function.
6
7* Keyboard Maintainer: [Krishna Mani](https://github.com/kmani314)
8* Hardware Supported: Device one PCB
9* Hardware Availability: [akegata.co](https://akegata.co)
10
11Make example for this keyboard (after setting up your build environment):
12
13 make akegata_denki/device_one:default
14
15See the [build environment setup](https://docs.qmk.fm/#/getting_started_build_tools) and the [make instructions](https://docs.qmk.fm/#/getting_started_make_guide) for more information. Brand new to QMK? Start with our [Complete Newbs Guide](https://docs.qmk.fm/#/newbs).
diff --git a/keyboards/akegata_denki/device_one/rules.mk b/keyboards/akegata_denki/device_one/rules.mk
new file mode 100644
index 000000000..9519995cd
--- /dev/null
+++ b/keyboards/akegata_denki/device_one/rules.mk
@@ -0,0 +1,21 @@
1# MCU name
2MCU = STM32F042
3
4BOARD = DEVICE_ONE
5
6# Build Options
7# comment out to disable the options.
8#
9BACKLIGHT_ENABLE = no
10BOOTMAGIC_ENABLE = no # Virtual DIP switch configuration
11MOUSEKEY_ENABLE = no # Mouse keys
12EXTRAKEY_ENABLE = no # Audio control and System control
13CONSOLE_ENABLE = no # Console for debug
14COMMAND_ENABLE = no # Commands for debug and configuration
15NKRO_ENABLE = yes # USB Nkey Rollover
16NO_USB_STARTUP_CHECK = no # Disable initialization only when usb is plugged in
17
18LAYOUTS = 60_ansi 60_iso
19
20# Enter lower-power sleep mode when on the ChibiOS idle thread
21OPT_DEFS += -DCORTEX_ENABLE_WFI_IDLE=TRUE
diff --git a/keyboards/hs60/v1/keymaps/default/keymap.c b/keyboards/hs60/v1/keymaps/default/keymap.c
index 2a5e82361..953172c73 100644
--- a/keyboards/hs60/v1/keymaps/default/keymap.c
+++ b/keyboards/hs60/v1/keymaps/default/keymap.c
@@ -43,4 +43,4 @@ void matrix_scan_user(void) {
43 43
44bool process_record_user(uint16_t keycode, keyrecord_t *record) { 44bool process_record_user(uint16_t keycode, keyrecord_t *record) {
45 return true; 45 return true;
46} \ No newline at end of file 46}
diff --git a/keyboards/vinta/vinta.c b/keyboards/vinta/vinta.c
index b5d40a160..112e44fb8 100644
--- a/keyboards/vinta/vinta.c
+++ b/keyboards/vinta/vinta.c
@@ -15,4 +15,4 @@ void matrix_scan_kb(void) {
15bool process_record_kb(uint16_t keycode, keyrecord_t *record) { 15bool process_record_kb(uint16_t keycode, keyrecord_t *record) {
16 16
17 return process_record_user(keycode, record); 17 return process_record_user(keycode, record);
18} \ No newline at end of file 18}
generated by cgit v1.2.3 (git 2.25.1) at 2025-11-20 00:06:10 +0000