aboutsummaryrefslogtreecommitdiff
path: root/keyboards/helix/serial.c
diff options
context:
space:
mode:
Diffstat (limited to 'keyboards/helix/serial.c')
-rw-r--r--keyboards/helix/serial.c411
1 files changed, 280 insertions, 131 deletions
diff --git a/keyboards/helix/serial.c b/keyboards/helix/serial.c
index 591941587..11ceff0b3 100644
--- a/keyboards/helix/serial.c
+++ b/keyboards/helix/serial.c
@@ -9,40 +9,85 @@
9#include <avr/io.h> 9#include <avr/io.h>
10#include <avr/interrupt.h> 10#include <avr/interrupt.h>
11#include <util/delay.h> 11#include <util/delay.h>
12#include <stddef.h>
12#include <stdbool.h> 13#include <stdbool.h>
13#include "serial.h" 14#include "serial.h"
15//#include <pro_micro.h>
14 16
15#ifdef USE_SERIAL 17#ifdef USE_SERIAL
16 18
19#ifndef SERIAL_USE_MULTI_TRANSACTION
20/* --- USE Simple API (OLD API, compatible with let's split serial.c) */
21 #if SERIAL_SLAVE_BUFFER_LENGTH > 0
22 uint8_t volatile serial_slave_buffer[SERIAL_SLAVE_BUFFER_LENGTH] = {0};
23 #endif
24 #if SERIAL_MASTER_BUFFER_LENGTH > 0
25 uint8_t volatile serial_master_buffer[SERIAL_MASTER_BUFFER_LENGTH] = {0};
26 #endif
27 uint8_t volatile status0 = 0;
28
29SSTD_t transactions[] = {
30 { (uint8_t *)&status0,
31 #if SERIAL_MASTER_BUFFER_LENGTH > 0
32 sizeof(serial_master_buffer), (uint8_t *)serial_master_buffer,
33 #else
34 0, (uint8_t *)NULL,
35 #endif
36 #if SERIAL_SLAVE_BUFFER_LENGTH > 0
37 sizeof(serial_slave_buffer), (uint8_t *)serial_slave_buffer
38 #else
39 0, (uint8_t *)NULL,
40 #endif
41 }
42};
43
44void serial_master_init(void)
45{ soft_serial_initiator_init(transactions); }
46
47void serial_slave_init(void)
48{ soft_serial_target_init(transactions); }
49
50// 0 => no error
51// 1 => slave did not respond
52// 2 => checksum error
53int serial_update_buffers()
54{ return soft_serial_transaction(); }
55
56#endif // Simple API (OLD API, compatible with let's split serial.c)
57
58#define ALWAYS_INLINE __attribute__((always_inline))
59#define NO_INLINE __attribute__((noinline))
17#define _delay_sub_us(x) __builtin_avr_delay_cycles(x) 60#define _delay_sub_us(x) __builtin_avr_delay_cycles(x)
18 61
19// Serial pulse period in microseconds. 62// Serial pulse period in microseconds.
63#define TID_SEND_ADJUST 14
64
20#define SELECT_SERIAL_SPEED 1 65#define SELECT_SERIAL_SPEED 1
21#if SELECT_SERIAL_SPEED == 0 66#if SELECT_SERIAL_SPEED == 0
22 // Very High speed 67 // Very High speed
23 #define SERIAL_DELAY 4 // micro sec 68 #define SERIAL_DELAY 4 // micro sec
24 #define READ_WRITE_START_ADJUST 30 // cycles 69 #define READ_WRITE_START_ADJUST 33 // cycles
25 #define READ_WRITE_WIDTH_ADJUST 10 // cycles 70 #define READ_WRITE_WIDTH_ADJUST 3 // cycles
26#elif SELECT_SERIAL_SPEED == 1 71#elif SELECT_SERIAL_SPEED == 1
27 // High speed 72 // High speed
28 #define SERIAL_DELAY 6 // micro sec 73 #define SERIAL_DELAY 6 // micro sec
29 #define READ_WRITE_START_ADJUST 23 // cycles 74 #define READ_WRITE_START_ADJUST 30 // cycles
30 #define READ_WRITE_WIDTH_ADJUST 10 // cycles 75 #define READ_WRITE_WIDTH_ADJUST 3 // cycles
31#elif SELECT_SERIAL_SPEED == 2 76#elif SELECT_SERIAL_SPEED == 2
32 // Middle speed 77 // Middle speed
33 #define SERIAL_DELAY 12 // micro sec 78 #define SERIAL_DELAY 12 // micro sec
34 #define READ_WRITE_START_ADJUST 25 // cycles 79 #define READ_WRITE_START_ADJUST 30 // cycles
35 #define READ_WRITE_WIDTH_ADJUST 10 // cycles 80 #define READ_WRITE_WIDTH_ADJUST 3 // cycles
36#elif SELECT_SERIAL_SPEED == 3 81#elif SELECT_SERIAL_SPEED == 3
37 // Low speed 82 // Low speed
38 #define SERIAL_DELAY 24 // micro sec 83 #define SERIAL_DELAY 24 // micro sec
39 #define READ_WRITE_START_ADJUST 25 // cycles 84 #define READ_WRITE_START_ADJUST 30 // cycles
40 #define READ_WRITE_WIDTH_ADJUST 10 // cycles 85 #define READ_WRITE_WIDTH_ADJUST 3 // cycles
41#elif SELECT_SERIAL_SPEED == 4 86#elif SELECT_SERIAL_SPEED == 4
42 // Very Low speed 87 // Very Low speed
43 #define SERIAL_DELAY 50 // micro sec 88 #define SERIAL_DELAY 50 // micro sec
44 #define READ_WRITE_START_ADJUST 25 // cycles 89 #define READ_WRITE_START_ADJUST 30 // cycles
45 #define READ_WRITE_WIDTH_ADJUST 10 // cycles 90 #define READ_WRITE_WIDTH_ADJUST 3 // cycles
46#else 91#else
47#error Illegal Serial Speed 92#error Illegal Serial Speed
48#endif 93#endif
@@ -51,14 +96,15 @@
51#define SERIAL_DELAY_HALF1 (SERIAL_DELAY/2) 96#define SERIAL_DELAY_HALF1 (SERIAL_DELAY/2)
52#define SERIAL_DELAY_HALF2 (SERIAL_DELAY - SERIAL_DELAY/2) 97#define SERIAL_DELAY_HALF2 (SERIAL_DELAY - SERIAL_DELAY/2)
53 98
54#define SLAVE_INT_WIDTH 1 99#define SLAVE_INT_WIDTH_US 1
55#define SLAVE_INT_RESPONSE_TIME SERIAL_DELAY 100#ifndef SERIAL_USE_MULTI_TRANSACTION
56 101 #define SLAVE_INT_RESPONSE_TIME SERIAL_DELAY
57uint8_t volatile serial_slave_buffer[SERIAL_SLAVE_BUFFER_LENGTH] = {0}; 102#else
58uint8_t volatile serial_master_buffer[SERIAL_MASTER_BUFFER_LENGTH] = {0}; 103 #define SLAVE_INT_ACK_WIDTH_UNIT 2
104 #define SLAVE_INT_ACK_WIDTH 4
105#endif
59 106
60#define SLAVE_DATA_CORRUPT (1<<0) 107static SSTD_t *Transaction_table = NULL;
61volatile uint8_t status = 0;
62 108
63inline static 109inline static
64void serial_delay(void) { 110void serial_delay(void) {
@@ -75,12 +121,14 @@ void serial_delay_half2(void) {
75 _delay_us(SERIAL_DELAY_HALF2); 121 _delay_us(SERIAL_DELAY_HALF2);
76} 122}
77 123
124inline static void serial_output(void) ALWAYS_INLINE;
78inline static 125inline static
79void serial_output(void) { 126void serial_output(void) {
80 SERIAL_PIN_DDR |= SERIAL_PIN_MASK; 127 SERIAL_PIN_DDR |= SERIAL_PIN_MASK;
81} 128}
82 129
83// make the serial pin an input with pull-up resistor 130// make the serial pin an input with pull-up resistor
131inline static void serial_input_with_pullup(void) ALWAYS_INLINE;
84inline static 132inline static
85void serial_input_with_pullup(void) { 133void serial_input_with_pullup(void) {
86 SERIAL_PIN_DDR &= ~SERIAL_PIN_MASK; 134 SERIAL_PIN_DDR &= ~SERIAL_PIN_MASK;
@@ -92,50 +140,58 @@ uint8_t serial_read_pin(void) {
92 return !!(SERIAL_PIN_INPUT & SERIAL_PIN_MASK); 140 return !!(SERIAL_PIN_INPUT & SERIAL_PIN_MASK);
93} 141}
94 142
143inline static void serial_low(void) ALWAYS_INLINE;
95inline static 144inline static
96void serial_low(void) { 145void serial_low(void) {
97 SERIAL_PIN_PORT &= ~SERIAL_PIN_MASK; 146 SERIAL_PIN_PORT &= ~SERIAL_PIN_MASK;
98} 147}
99 148
149inline static void serial_high(void) ALWAYS_INLINE;
100inline static 150inline static
101void serial_high(void) { 151void serial_high(void) {
102 SERIAL_PIN_PORT |= SERIAL_PIN_MASK; 152 SERIAL_PIN_PORT |= SERIAL_PIN_MASK;
103} 153}
104 154
105void serial_master_init(void) { 155void soft_serial_initiator_init(SSTD_t *sstd_table)
106 serial_output(); 156{
107 serial_high(); 157 Transaction_table = sstd_table;
158 serial_output();
159 serial_high();
108} 160}
109 161
110void serial_slave_init(void) { 162void soft_serial_target_init(SSTD_t *sstd_table)
111 serial_input_with_pullup(); 163{
164 Transaction_table = sstd_table;
165 serial_input_with_pullup();
112 166
113#if SERIAL_PIN_MASK == _BV(PD0) 167#if SERIAL_PIN_MASK == _BV(PD0)
114 // Enable INT0 168 // Enable INT0
115 EIMSK |= _BV(INT0); 169 EIMSK |= _BV(INT0);
116 // Trigger on falling edge of INT0 170 // Trigger on falling edge of INT0
117 EICRA &= ~(_BV(ISC00) | _BV(ISC01)); 171 EICRA &= ~(_BV(ISC00) | _BV(ISC01));
118#elif SERIAL_PIN_MASK == _BV(PD2) 172#elif SERIAL_PIN_MASK == _BV(PD2)
119 // Enable INT2 173 // Enable INT2
120 EIMSK |= _BV(INT2); 174 EIMSK |= _BV(INT2);
121 // Trigger on falling edge of INT2 175 // Trigger on falling edge of INT2
122 EICRA &= ~(_BV(ISC20) | _BV(ISC21)); 176 EICRA &= ~(_BV(ISC20) | _BV(ISC21));
123#else 177#else
124 #error unknown SERIAL_PIN_MASK value 178 #error unknown SERIAL_PIN_MASK value
125#endif 179#endif
126} 180}
127 181
128// Used by the sender to synchronize timing with the reciver. 182// Used by the sender to synchronize timing with the reciver.
183static void sync_recv(void) NO_INLINE;
129static 184static
130void sync_recv(void) { 185void sync_recv(void) {
131 for (int i = 0; i < SERIAL_DELAY*5 && serial_read_pin(); i++ ) { 186 for (uint8_t i = 0; i < SERIAL_DELAY*5 && serial_read_pin(); i++ ) {
132 } 187 }
133 // This shouldn't hang if the slave disconnects because the 188 // This shouldn't hang if the target disconnects because the
134 // serial line will float to high if the slave does disconnect. 189 // serial line will float to high if the target does disconnect.
135 while (!serial_read_pin()); 190 while (!serial_read_pin());
136} 191}
137 192
138// Used by the reciver to send a synchronization signal to the sender. 193// Used by the reciver to send a synchronization signal to the sender.
194static void sync_send(void)NO_INLINE;
139static 195static
140void sync_send(void) { 196void sync_send(void) {
141 serial_low(); 197 serial_low();
@@ -144,152 +200,245 @@ void sync_send(void) {
144} 200}
145 201
146// Reads a byte from the serial line 202// Reads a byte from the serial line
147static 203static uint8_t serial_read_chunk(uint8_t *pterrcount, uint8_t bit) NO_INLINE;
148uint8_t serial_read_byte(void) { 204static uint8_t serial_read_chunk(uint8_t *pterrcount, uint8_t bit) {
149 uint8_t byte = 0; 205 uint8_t byte, i, p, pb;
206
150 _delay_sub_us(READ_WRITE_START_ADJUST); 207 _delay_sub_us(READ_WRITE_START_ADJUST);
151 for ( uint8_t i = 0; i < 8; ++i) { 208 for( i = 0, byte = 0, p = 0; i < bit; i++ ) {
152 serial_delay_half1(); // read the middle of pulses 209 serial_delay_half1(); // read the middle of pulses
153 byte = (byte << 1) | serial_read_pin(); 210 if( serial_read_pin() ) {
154 _delay_sub_us(READ_WRITE_WIDTH_ADJUST); 211 byte = (byte << 1) | 1; p ^= 1;
155 serial_delay_half2(); 212 } else {
213 byte = (byte << 1) | 0; p ^= 0;
214 }
215 _delay_sub_us(READ_WRITE_WIDTH_ADJUST);
216 serial_delay_half2();
156 } 217 }
218 /* recive parity bit */
219 serial_delay_half1(); // read the middle of pulses
220 pb = serial_read_pin();
221 _delay_sub_us(READ_WRITE_WIDTH_ADJUST);
222 serial_delay_half2();
223
224 *pterrcount += (p != pb)? 1 : 0;
225
157 return byte; 226 return byte;
158} 227}
159 228
160// Sends a byte with MSB ordering 229// Sends a byte with MSB ordering
161static 230void serial_write_chunk(uint8_t data, uint8_t bit) NO_INLINE;
162void serial_write_byte(uint8_t data) { 231void serial_write_chunk(uint8_t data, uint8_t bit) {
163 uint8_t b = 1<<7; 232 uint8_t b, p;
164 while( b ) { 233 for( p = 0, b = 1<<(bit-1); b ; b >>= 1) {
165 if(data & b) { 234 if(data & b) {
166 serial_high(); 235 serial_high(); p ^= 1;
167 } else { 236 } else {
168 serial_low(); 237 serial_low(); p ^= 0;
238 }
239 serial_delay();
169 } 240 }
170 b >>= 1; 241 /* send parity bit */
242 if(p & 1) { serial_high(); }
243 else { serial_low(); }
171 serial_delay(); 244 serial_delay();
172 }
173 serial_low(); // sync_send() / senc_recv() need raise edge
174}
175 245
176// interrupt handle to be used by the slave device 246 serial_low(); // sync_send() / senc_recv() need raise edge
177ISR(SERIAL_PIN_INTERRUPT) { 247}
178 serial_output();
179 248
180 // slave send phase 249static void serial_send_packet(uint8_t *buffer, uint8_t size) NO_INLINE;
181 uint8_t checksum = 0; 250static
182 for (int i = 0; i < SERIAL_SLAVE_BUFFER_LENGTH; ++i) { 251void serial_send_packet(uint8_t *buffer, uint8_t size) {
252 for (uint8_t i = 0; i < size; ++i) {
253 uint8_t data;
254 data = buffer[i];
183 sync_send(); 255 sync_send();
184 serial_write_byte(serial_slave_buffer[i]); 256 serial_write_chunk(data,8);
185 checksum += serial_slave_buffer[i];
186 } 257 }
187 sync_send(); 258}
188 serial_write_byte(checksum); 259
189 260static uint8_t serial_recive_packet(uint8_t *buffer, uint8_t size) NO_INLINE;
190 // slave switch to input 261static
191 sync_send(); //0 262uint8_t serial_recive_packet(uint8_t *buffer, uint8_t size) {
192 serial_delay_half1(); //1 263 uint8_t pecount = 0;
193 serial_low(); //2 264 for (uint8_t i = 0; i < size; ++i) {
194 serial_input_with_pullup(); //2 265 uint8_t data;
195 serial_delay_half1(); //3
196
197 // slave recive phase
198 uint8_t checksum_computed = 0;
199 for (int i = 0; i < SERIAL_MASTER_BUFFER_LENGTH; ++i) {
200 sync_recv(); 266 sync_recv();
201 serial_master_buffer[i] = serial_read_byte(); 267 data = serial_read_chunk(&pecount, 8);
202 checksum_computed += serial_master_buffer[i]; 268 buffer[i] = data;
203 } 269 }
270 return pecount == 0;
271}
272
273inline static
274void change_sender2reciver(void) {
275 sync_send(); //0
276 serial_delay_half1(); //1
277 serial_low(); //2
278 serial_input_with_pullup(); //2
279 serial_delay_half1(); //3
280}
281
282inline static
283void change_reciver2sender(void) {
284 sync_recv(); //0
285 serial_delay(); //1
286 serial_low(); //3
287 serial_output(); //3
288 serial_delay_half1(); //4
289}
290
291// interrupt handle to be used by the target device
292ISR(SERIAL_PIN_INTERRUPT) {
293
294#ifndef SERIAL_USE_MULTI_TRANSACTION
295 serial_low();
296 serial_output();
297 SSTD_t *trans = Transaction_table;
298#else
299 // recive transaction table index
300 uint8_t tid;
301 uint8_t pecount = 0;
204 sync_recv(); 302 sync_recv();
205 uint8_t checksum_received = serial_read_byte(); 303 tid = serial_read_chunk(&pecount,4);
304 if(pecount> 0)
305 return;
306 serial_delay_half1();
206 307
207 if ( checksum_computed != checksum_received ) { 308 serial_high(); // response step1 low->high
208 status |= SLAVE_DATA_CORRUPT; 309 serial_output();
310 _delay_sub_us(SLAVE_INT_ACK_WIDTH_UNIT*SLAVE_INT_ACK_WIDTH);
311 SSTD_t *trans = &Transaction_table[tid];
312 serial_low(); // response step2 ack high->low
313#endif
314
315 // target send phase
316 if( trans->target2initiator_buffer_size > 0 )
317 serial_send_packet((uint8_t *)trans->target2initiator_buffer,
318 trans->target2initiator_buffer_size);
319 // target switch to input
320 change_sender2reciver();
321
322 // target recive phase
323 if( trans->initiator2target_buffer_size > 0 ) {
324 if (serial_recive_packet((uint8_t *)trans->initiator2target_buffer,
325 trans->initiator2target_buffer_size) ) {
326 *trans->status = TRANSACTION_ACCEPTED;
327 } else {
328 *trans->status = TRANSACTION_DATA_ERROR;
329 }
209 } else { 330 } else {
210 status &= ~SLAVE_DATA_CORRUPT; 331 *trans->status = TRANSACTION_ACCEPTED;
211 } 332 }
212 333
213 sync_recv(); //weit master output to high 334 sync_recv(); //weit initiator output to high
214}
215
216inline
217bool serial_slave_DATA_CORRUPT(void) {
218 return status & SLAVE_DATA_CORRUPT;
219} 335}
220 336
221// Copies the serial_slave_buffer to the master and sends the 337/////////
222// serial_master_buffer to the slave. 338// start transaction by initiator
339//
340// int soft_serial_transaction(int sstd_index)
223// 341//
224// Returns: 342// Returns:
225// 0 => no error 343// TRANSACTION_END
226// 1 => slave did not respond 344// TRANSACTION_NO_RESPONSE
227// 2 => checksum error 345// TRANSACTION_DATA_ERROR
228int serial_update_buffers(void) { 346// this code is very time dependent, so we need to disable interrupts
229 // this code is very time dependent, so we need to disable interrupts 347#ifndef SERIAL_USE_MULTI_TRANSACTION
348int soft_serial_transaction(void) {
349 SSTD_t *trans = Transaction_table;
350#else
351int soft_serial_transaction(int sstd_index) {
352 SSTD_t *trans = &Transaction_table[sstd_index];
353#endif
230 cli(); 354 cli();
231 355
232 // signal to the slave that we want to start a transaction 356 // signal to the target that we want to start a transaction
233 serial_output(); 357 serial_output();
234 serial_low(); 358 serial_low();
235 _delay_us(SLAVE_INT_WIDTH); 359 _delay_us(SLAVE_INT_WIDTH_US);
236 360
237 // wait for the slaves response 361#ifndef SERIAL_USE_MULTI_TRANSACTION
362 // wait for the target response
238 serial_input_with_pullup(); 363 serial_input_with_pullup();
239 _delay_us(SLAVE_INT_RESPONSE_TIME); 364 _delay_us(SLAVE_INT_RESPONSE_TIME);
240 365
241 // check if the slave is present 366 // check if the target is present
242 if (serial_read_pin()) { 367 if (serial_read_pin()) {
243 // slave failed to pull the line low, assume not present 368 // target failed to pull the line low, assume not present
244 serial_output(); 369 serial_output();
245 serial_high(); 370 serial_high();
371 *trans->status = TRANSACTION_NO_RESPONSE;
246 sei(); 372 sei();
247 return 1; 373 return TRANSACTION_NO_RESPONSE;
248 } 374 }
249 375
250 // master recive phase 376#else
251 // if the slave is present syncronize with it 377 // send transaction table index
378 sync_send();
379 _delay_sub_us(TID_SEND_ADJUST);
380 serial_write_chunk(sstd_index, 4);
381 serial_delay_half1();
252 382
253 uint8_t checksum_computed = 0; 383 // wait for the target response (step1 low->high)
254 // receive data from the slave 384 serial_input_with_pullup();
255 for (int i = 0; i < SERIAL_SLAVE_BUFFER_LENGTH; ++i) { 385 while( !serial_read_pin() ) {
256 sync_recv(); 386 _delay_sub_us(2);
257 serial_slave_buffer[i] = serial_read_byte();
258 checksum_computed += serial_slave_buffer[i];
259 } 387 }
260 sync_recv();
261 uint8_t checksum_received = serial_read_byte();
262 388
263 if (checksum_computed != checksum_received) { 389 // check if the target is present (step2 high->low)
264 serial_output(); 390 for( int i = 0; serial_read_pin(); i++ ) {
265 serial_high(); 391 if (i > SLAVE_INT_ACK_WIDTH + 1) {
266 sei(); 392 // slave failed to pull the line low, assume not present
267 return 2; 393 serial_output();
394 serial_high();
395 *trans->status = TRANSACTION_NO_RESPONSE;
396 sei();
397 return TRANSACTION_NO_RESPONSE;
398 }
399 _delay_sub_us(SLAVE_INT_ACK_WIDTH_UNIT);
268 } 400 }
401#endif
269 402
270 // master switch to output 403 // initiator recive phase
271 sync_recv(); //0 404 // if the target is present syncronize with it
272 serial_delay(); //1 405 if( trans->target2initiator_buffer_size > 0 ) {
273 serial_low(); //3 406 if (!serial_recive_packet((uint8_t *)trans->target2initiator_buffer,
274 serial_output(); // 3 407 trans->target2initiator_buffer_size) ) {
275 serial_delay_half1(); //4 408 serial_output();
276 409 serial_high();
277 // master send phase 410 *trans->status = TRANSACTION_DATA_ERROR;
278 uint8_t checksum = 0; 411 sei();
279 412 return TRANSACTION_DATA_ERROR;
280 for (int i = 0; i < SERIAL_MASTER_BUFFER_LENGTH; ++i) { 413 }
281 sync_send(); 414 }
282 serial_write_byte(serial_master_buffer[i]); 415
283 checksum += serial_master_buffer[i]; 416 // initiator switch to output
417 change_reciver2sender();
418
419 // initiator send phase
420 if( trans->initiator2target_buffer_size > 0 ) {
421 serial_send_packet((uint8_t *)trans->initiator2target_buffer,
422 trans->initiator2target_buffer_size);
284 } 423 }
285 sync_send();
286 serial_write_byte(checksum);
287 424
288 // always, release the line when not in use 425 // always, release the line when not in use
289 sync_send(); 426 sync_send();
290 427
428 *trans->status = TRANSACTION_END;
291 sei(); 429 sei();
292 return 0; 430 return TRANSACTION_END;
293} 431}
294 432
433#ifdef SERIAL_USE_MULTI_TRANSACTION
434int soft_serial_get_and_clean_status(int sstd_index) {
435 SSTD_t *trans = &Transaction_table[sstd_index];
436 cli();
437 int retval = *trans->status;
438 *trans->status = 0;;
439 sei();
440 return retval;
441}
442#endif
443
295#endif 444#endif