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Diffstat (limited to 'keyboards/ploopyco/adns5050.c')
| -rw-r--r-- | keyboards/ploopyco/adns5050.c | 197 |
1 files changed, 197 insertions, 0 deletions
diff --git a/keyboards/ploopyco/adns5050.c b/keyboards/ploopyco/adns5050.c new file mode 100644 index 000000000..fcf2f213e --- /dev/null +++ b/keyboards/ploopyco/adns5050.c | |||
| @@ -0,0 +1,197 @@ | |||
| 1 | /* Copyright 2021 Colin Lam (Ploopy Corporation) | ||
| 2 | * Copyright 2020 Christopher Courtney, aka Drashna Jael're (@drashna) <drashna@live.com> | ||
| 3 | * Copyright 2019 Sunjun Kim | ||
| 4 | * Copyright 2019 Hiroyuki Okada | ||
| 5 | * | ||
| 6 | * This program is free software: you can redistribute it and/or modify | ||
| 7 | * it under the terms of the GNU General Public License as published by | ||
| 8 | * the Free Software Foundation, either version 2 of the License, or | ||
| 9 | * (at your option) any later version. | ||
| 10 | * | ||
| 11 | * This program is distributed in the hope that it will be useful, | ||
| 12 | * but WITHOUT ANY WARRANTY; without even the implied warranty of | ||
| 13 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | ||
| 14 | * GNU General Public License for more details. | ||
| 15 | * | ||
| 16 | * You should have received a copy of the GNU General Public License | ||
| 17 | * along with this program. If not, see <http://www.gnu.org/licenses/>. | ||
| 18 | */ | ||
| 19 | |||
| 20 | |||
| 21 | #include "adns5050.h" | ||
| 22 | #include "quantum.h" | ||
| 23 | #include "wait.h" | ||
| 24 | |||
| 25 | #ifdef CONSOLE_ENABLE | ||
| 26 | # include "print.h" | ||
| 27 | #endif | ||
| 28 | |||
| 29 | #ifndef OPTIC_ROTATED | ||
| 30 | # define OPTIC_ROTATED false | ||
| 31 | #endif | ||
| 32 | |||
| 33 | // Definitions for the ADNS serial line. | ||
| 34 | // These really ought to be defined in your config.h, but defaults are | ||
| 35 | // here if you're really lazy. | ||
| 36 | #ifndef ADNS_SCLK_PIN | ||
| 37 | # define ADNS_SCLK_PIN B7 | ||
| 38 | #endif | ||
| 39 | |||
| 40 | #ifndef ADNS_SDIO_PIN | ||
| 41 | # define ADNS_SDIO_PIN C6 | ||
| 42 | #endif | ||
| 43 | |||
| 44 | #ifndef ADNS_CS_PIN | ||
| 45 | # define ADNS_CS_PIN B4 | ||
| 46 | #endif | ||
| 47 | |||
| 48 | #ifdef CONSOLE_ENABLE | ||
| 49 | void print_byte(uint8_t byte) { dprintf("%c%c%c%c%c%c%c%c|", (byte & 0x80 ? '1' : '0'), (byte & 0x40 ? '1' : '0'), (byte & 0x20 ? '1' : '0'), (byte & 0x10 ? '1' : '0'), (byte & 0x08 ? '1' : '0'), (byte & 0x04 ? '1' : '0'), (byte & 0x02 ? '1' : '0'), (byte & 0x01 ? '1' : '0')); } | ||
| 50 | #endif | ||
| 51 | |||
| 52 | // Initialize the ADNS serial pins. | ||
| 53 | void adns_init(void) { | ||
| 54 | setPinOutput(ADNS_SCLK_PIN); | ||
| 55 | setPinOutput(ADNS_SDIO_PIN); | ||
| 56 | setPinOutput(ADNS_CS_PIN); | ||
| 57 | } | ||
| 58 | |||
| 59 | // Perform a synchronization with the ADNS. | ||
| 60 | // Just as with the serial protocol, this is used by the slave to send a | ||
| 61 | // synchronization signal to the master. | ||
| 62 | void adns_sync(void) { | ||
| 63 | writePinLow(ADNS_CS_PIN); | ||
| 64 | wait_us(1); | ||
| 65 | writePinHigh(ADNS_CS_PIN); | ||
| 66 | } | ||
| 67 | |||
| 68 | void adns_cs_select(void) { | ||
| 69 | writePinLow(ADNS_CS_PIN); | ||
| 70 | } | ||
| 71 | |||
| 72 | void adns_cs_deselect(void) { | ||
| 73 | writePinHigh(ADNS_CS_PIN); | ||
| 74 | } | ||
| 75 | |||
| 76 | uint8_t adns_serial_read(void) { | ||
| 77 | setPinInput(ADNS_SDIO_PIN); | ||
| 78 | uint8_t byte = 0; | ||
| 79 | |||
| 80 | for (uint8_t i = 0; i < 8; ++i) { | ||
| 81 | writePinLow(ADNS_SCLK_PIN); | ||
| 82 | wait_us(1); | ||
| 83 | |||
| 84 | byte = (byte << 1) | readPin(ADNS_SDIO_PIN); | ||
| 85 | |||
| 86 | writePinHigh(ADNS_SCLK_PIN); | ||
| 87 | wait_us(1); | ||
| 88 | } | ||
| 89 | |||
| 90 | return byte; | ||
| 91 | } | ||
| 92 | |||
| 93 | void adns_serial_write(uint8_t data) { | ||
| 94 | setPinOutput(ADNS_SDIO_PIN); | ||
| 95 | |||
| 96 | for (int8_t b = 7; b >= 0; b--) { | ||
| 97 | writePinLow(ADNS_SCLK_PIN); | ||
| 98 | |||
| 99 | if (data & (1 << b)) | ||
| 100 | writePinHigh(ADNS_SDIO_PIN); | ||
| 101 | else | ||
| 102 | writePinLow(ADNS_SDIO_PIN); | ||
| 103 | |||
| 104 | wait_us(2); | ||
| 105 | |||
| 106 | writePinHigh(ADNS_SCLK_PIN); | ||
| 107 | } | ||
| 108 | |||
| 109 | // tSWR. See page 15 of the ADNS spec sheet. | ||
| 110 | // Technically, this is only necessary if the next operation is an SDIO | ||
| 111 | // read. This is not guaranteed to be the case, but we're being lazy. | ||
| 112 | wait_us(4); | ||
| 113 | |||
| 114 | // Note that tSWW is never necessary. All write operations require at | ||
| 115 | // least 32us, which exceeds tSWW, so there's never a need to wait for it. | ||
| 116 | } | ||
| 117 | |||
| 118 | // Read a byte of data from a register on the ADNS. | ||
| 119 | // Don't forget to use the register map (as defined in the header file). | ||
| 120 | uint8_t adns_read_reg(uint8_t reg_addr) { | ||
| 121 | adns_cs_select(); | ||
| 122 | |||
| 123 | adns_serial_write(reg_addr); | ||
| 124 | |||
| 125 | // We don't need a minimum tSRAD here. That's because a 4ms wait time is | ||
| 126 | // already included in adns_serial_write(), so we're good. | ||
| 127 | // See page 10 and 15 of the ADNS spec sheet. | ||
| 128 | //wait_us(4); | ||
| 129 | |||
| 130 | uint8_t byte = adns_serial_read(); | ||
| 131 | |||
| 132 | // tSRW & tSRR. See page 15 of the ADNS spec sheet. | ||
| 133 | // Technically, this is only necessary if the next operation is an SDIO | ||
| 134 | // read or write. This is not guaranteed to be the case. | ||
| 135 | // Honestly, this wait could probably be removed. | ||
| 136 | wait_us(1); | ||
| 137 | |||
| 138 | adns_cs_deselect(); | ||
| 139 | |||
| 140 | return byte; | ||
| 141 | } | ||
| 142 | |||
| 143 | void adns_write_reg(uint8_t reg_addr, uint8_t data) { | ||
| 144 | adns_cs_select(); | ||
| 145 | adns_serial_write(reg_addr); | ||
| 146 | adns_serial_write(data); | ||
| 147 | adns_cs_deselect(); | ||
| 148 | } | ||
| 149 | |||
| 150 | report_adns_t adns_read_burst(void) { | ||
| 151 | adns_cs_select(); | ||
| 152 | |||
| 153 | report_adns_t data; | ||
| 154 | data.dx = 0; | ||
| 155 | data.dy = 0; | ||
| 156 | |||
| 157 | adns_serial_write(REG_MOTION_BURST); | ||
| 158 | |||
| 159 | // We don't need a minimum tSRAD here. That's because a 4ms wait time is | ||
| 160 | // already included in adns_serial_write(), so we're good. | ||
| 161 | // See page 10 and 15 of the ADNS spec sheet. | ||
| 162 | //wait_us(4); | ||
| 163 | |||
| 164 | uint8_t x = adns_serial_read(); | ||
| 165 | uint8_t y = adns_serial_read(); | ||
| 166 | |||
| 167 | // Burst mode returns a bunch of other shit that we don't really need. | ||
| 168 | // Setting CS to high ends burst mode early. | ||
| 169 | adns_cs_deselect(); | ||
| 170 | |||
| 171 | data.dx = convert_twoscomp(x); | ||
| 172 | data.dy = convert_twoscomp(y); | ||
| 173 | |||
| 174 | return data; | ||
| 175 | } | ||
| 176 | |||
| 177 | // Convert a two's complement byte from an unsigned data type into a signed | ||
| 178 | // data type. | ||
| 179 | int8_t convert_twoscomp(uint8_t data) { | ||
| 180 | if ((data & 0x80) == 0x80) | ||
| 181 | return -128 + (data & 0x7F); | ||
| 182 | else | ||
| 183 | return data; | ||
| 184 | } | ||
| 185 | |||
| 186 | // Don't forget to use the definitions for CPI in the header file. | ||
| 187 | void adns_set_cpi(uint8_t cpi) { | ||
| 188 | adns_write_reg(REG_MOUSE_CONTROL2, cpi); | ||
| 189 | } | ||
| 190 | |||
| 191 | bool adns_check_signature(void) { | ||
| 192 | uint8_t pid = adns_read_reg(REG_PRODUCT_ID); | ||
| 193 | uint8_t rid = adns_read_reg(REG_REVISION_ID); | ||
| 194 | uint8_t pid2 = adns_read_reg(REG_PRODUCT_ID2); | ||
| 195 | |||
| 196 | return (pid == 0x12 && rid == 0x01 && pid2 == 0x26); | ||
| 197 | } | ||
