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+# XD84
+Development docs covering the following:
+- Kimera core
+- RGB
+- Backlight
+## Kimera core
+![Kimera core](https://gd2.alicdn.com/imgextra/i4/159916802/TB2qsIgdrJkpuFjy1zcXXa5FFXa_!!159916802.jpg)
+What little available info that was available for the qmk port
+- atmega32u4 16Mhz
+  - board seems to have a 6Mhz crystal 
+- 2x PCA9555 I2C IO expander
+Links:
+- [Schematic, BOM, Gerbers](/kairyu/kimera/blob/master/kimera_core)
+- [Original firmware](https://github.com/kairyu/tmk_keyboard_custom/tree/master/keyboard/kimera)
+```c
+/*
+Kimera_core_v1.0 Components
+             U1 (atmega32u4)
+           ,----------------.
+      TX --| TX0(PD3)   RAW |--
+      RX --| RX1(PD2)   GND |--
+         --| GND      RESET |-- RST
+         --| GND        VCC |--
+     SDA --| 2(PD1) (PF4)A3 |--
+     SCL --| 3(PD0) (PF5)A2 |--
+   (INT) --| 4(PD4) (PF6)A1 |--
+         --| 5(PC6) (PF7)A0 |--
+         --| 6(PD7) (PB1)15 |-- SCK
+    LED2 --| 7(PE6) (PB3)14 |-- MISO
+    LED1 --| 8(PB4) (PB2)16 |-- MOSI
+    LED3 --| 9(PB5) (PB6)10 |-- LED4
+          `----------------'
+         IC1 (PCA9555)                  IC2 (PCA9555)
+         ,----------.                   ,----------.
+   SDA --| SDA  P00 |-- P1        SDA --| SDA  P00 |-- P17
+   SCL --| SCL  P01 |-- P2        SCL --| SCL  P01 |-- P18
+   INT --| INT  P02 |-- P3        INT --| INT  P02 |-- P19
+         |      P03 |-- P4              |      P03 |-- P20
+   GND --| A0   P04 |-- P5        VCC --| A0   P04 |-- P21
+   SJ1 --| A1   P05 |-- P6        SJ1 --| A1   P05 |-- P22
+   SJ2 --| A2   P06 |-- P7        SJ2 --| A2   P06 |-- P23
+         |      P07 |-- P8              |      P07 |-- P24
+         |          |                   |          |
+         |      P10 |-- P9              |      P10 |-- P25
+         |      P11 |-- P10             |      P11 |-- P26
+         |      P12 |-- P11             |      P12 |-- P27
+         |      P13 |-- P12             |      P13 |-- P28
+         |      P14 |-- P13             |      P14 |-- P29
+         |      P15 |-- P14             |      P15 |-- P30
+         |      P16 |-- P15             |      P16 |-- P31
+         |      P17 |-- P16             |      P17 |-- P32
+         `----------'                   `----------'
+*/
+```
+### Bootloader
+Default bootloader is `atmel-dfu`.
+Reboot to bootloader via magnetic switch next to icsp header.
+Flash using regular dfu methods.
+### XD84 pin mappings
+Taken from [kimera-config.json](https://github.com/kairyu/tkg/blob/master/keyboard/config/kimera-config.json)
+        "row_mapping": [ 1, 2, 3, 4, 5, 6 ],
+        "col_mapping": [ 17, 18, 19, 20, 21, 22, 23, 24, 25, 26, 27, 28, 29, 30, 31 ],
+# RGB
+- PIN C7
+- Number of RGB LED 7
+# Backlight
+    TODO - not working
+## Assumptions
+### Pin/Port mappings
+- All cols are on the same IC
+- All rows are on the same IC and port
+- Pins mapped sequentially
+- Each port only does row or column not a mixture of both
+  - No need to have complex port config
+  - 
+| ROW index | Kimera Pin | PCA9555           |
+| ----------|------------|-------------------|
+| 0         | 1          | IC1 Port 0  pin 0 |
+| 1         | 2          | IC1 Port 0  pin 1 |
+| 2         | 3          | IC1 Port 0  pin 2 |
+| 3         | 4          | IC1 Port 0  pin 3 |
+| 4         | 5          | IC1 Port 0  pin 4 |
+| 5         | 6          | IC1 Port 0  pin 5 |
+- Safe enough to assume `row_index == pin`
+| COL index | Kimera Pin | PCA9555           |
+| ----------|------------|-------------------|
+| 0         | 17         | IC2 Port 0  pin 0 |
+| 1         | 18         | IC2 Port 0  pin 1 |
+| 2         | 19         | IC2 Port 0  pin 2 |
+| 3         | 20         | IC2 Port 0  pin 3 |
+| 4         | 21         | IC2 Port 0  pin 4 |
+| 5         | 22         | IC2 Port 0  pin 5 |
+| 6         | 23         | IC2 Port 0  pin 6 |
+| 7         | 24         | IC2 Port 0  pin 7 |
+| 8         | 25         | IC2 Port 1  pin 0 |
+| 9         | 26         | IC2 Port 1  pin 1 |
+| 10        | 27         | IC2 Port 1  pin 2 |
+| 11        | 28         | IC2 Port 1  pin 3 |
+| 12        | 29         | IC2 Port 1  pin 4 |
+| 13        | 30         | IC2 Port 1  pin 5 |
+| 14        | 31         | IC2 Port 1  pin 6 |
+- Safe enough to assume here col_index does not need to be converted to pin
+- Reading both ports one after the other gives us the same sequential behavior
+  - maps to the usual practice of reading matrix columns
+  - while this technically gives 16 column reads, the 16th column can never be set so is safely ignored
+## Notes
+[pca9555 datasheet](https://www.ti.com/lit/ds/symlink/pca9555.pdf)
+- Other Kimera based boards with non sequential pin mappings, pins mapped across ICs, or mixed row/col configs will need more complicated `pin -> i2c_addr,port,pin` logic as well as rather more complex pin functions.
+## Return to stock firmware
+Not tested but original firmware seems to be available in the [kairyu/tkg-firmware](https://github.com/kairyu/tkg-firmware/blob/master/kimera-core.hex) repo.

diff --git a/keyboards/xd84/dev.md b/keyboards/xd84/dev.md new file mode 100644 index 000000000..453edb366 --- /dev/null +++ b/keyboards/xd84/dev.md
@@ -0,0 +1,132 @@
	1	# XD84
	2
	3	Development docs covering the following:
	4	- Kimera core
	5	- RGB
	6	- Backlight
	7
	8	## Kimera core
	9	![Kimera core](https://gd2.alicdn.com/imgextra/i4/159916802/TB2qsIgdrJkpuFjy1zcXXa5FFXa_!!159916802.jpg)
	10
	11	What little available info that was available for the qmk port
	12	- atmega32u4 16Mhz
	13	- board seems to have a 6Mhz crystal
	14	- 2x PCA9555 I2C IO expander
	15
	16	Links:
	17	- [Schematic, BOM, Gerbers](/kairyu/kimera/blob/master/kimera_core)
	18	- [Original firmware](https://github.com/kairyu/tmk_keyboard_custom/tree/master/keyboard/kimera)
	19
	20	```c
	21	/*
	22	Kimera_core_v1.0 Components
	23
	24	U1 (atmega32u4)
	25	,----------------.
	26	TX --\| TX0(PD3) RAW \|--
	27	RX --\| RX1(PD2) GND \|--
	28	--\| GND RESET \|-- RST
	29	--\| GND VCC \|--
	30	SDA --\| 2(PD1) (PF4)A3 \|--
	31	SCL --\| 3(PD0) (PF5)A2 \|--
	32	(INT) --\| 4(PD4) (PF6)A1 \|--
	33	--\| 5(PC6) (PF7)A0 \|--
	34	--\| 6(PD7) (PB1)15 \|-- SCK
	35	LED2 --\| 7(PE6) (PB3)14 \|-- MISO
	36	LED1 --\| 8(PB4) (PB2)16 \|-- MOSI
	37	LED3 --\| 9(PB5) (PB6)10 \|-- LED4
	38	`----------------'
	39
	40	IC1 (PCA9555) IC2 (PCA9555)
	41	,----------. ,----------.
	42	SDA --\| SDA P00 \|-- P1 SDA --\| SDA P00 \|-- P17
	43	SCL --\| SCL P01 \|-- P2 SCL --\| SCL P01 \|-- P18
	44	INT --\| INT P02 \|-- P3 INT --\| INT P02 \|-- P19
	45	\| P03 \|-- P4 \| P03 \|-- P20
	46	GND --\| A0 P04 \|-- P5 VCC --\| A0 P04 \|-- P21
	47	SJ1 --\| A1 P05 \|-- P6 SJ1 --\| A1 P05 \|-- P22
	48	SJ2 --\| A2 P06 \|-- P7 SJ2 --\| A2 P06 \|-- P23
	49	\| P07 \|-- P8 \| P07 \|-- P24
	50	\| \| \| \|
	51	\| P10 \|-- P9 \| P10 \|-- P25
	52	\| P11 \|-- P10 \| P11 \|-- P26
	53	\| P12 \|-- P11 \| P12 \|-- P27
	54	\| P13 \|-- P12 \| P13 \|-- P28
	55	\| P14 \|-- P13 \| P14 \|-- P29
	56	\| P15 \|-- P14 \| P15 \|-- P30
	57	\| P16 \|-- P15 \| P16 \|-- P31
	58	\| P17 \|-- P16 \| P17 \|-- P32
	59	`----------' `----------'
	60	*/
	61
	62	```
	63
	64	### Bootloader
	65	Default bootloader is `atmel-dfu`.
	66	Reboot to bootloader via magnetic switch next to icsp header.
	67	Flash using regular dfu methods.
	68
	69	### XD84 pin mappings
	70	Taken from [kimera-config.json](https://github.com/kairyu/tkg/blob/master/keyboard/config/kimera-config.json)
	71
	72	"row_mapping": [ 1, 2, 3, 4, 5, 6 ],
	73	"col_mapping": [ 17, 18, 19, 20, 21, 22, 23, 24, 25, 26, 27, 28, 29, 30, 31 ],
	74
	75	# RGB
	76	- PIN C7
	77	- Number of RGB LED 7
	78
	79	# Backlight
	80	TODO - not working
	81
	82	## Assumptions
	83	### Pin/Port mappings
	84	- All cols are on the same IC
	85	- All rows are on the same IC and port
	86	- Pins mapped sequentially
	87	- Each port only does row or column not a mixture of both
	88	- No need to have complex port config
	89	-
	90
	91	\| ROW index \| Kimera Pin \| PCA9555 \|
	92	\| ----------\|------------\|-------------------\|
	93	\| 0 \| 1 \| IC1 Port 0 pin 0 \|
	94	\| 1 \| 2 \| IC1 Port 0 pin 1 \|
	95	\| 2 \| 3 \| IC1 Port 0 pin 2 \|
	96	\| 3 \| 4 \| IC1 Port 0 pin 3 \|
	97	\| 4 \| 5 \| IC1 Port 0 pin 4 \|
	98	\| 5 \| 6 \| IC1 Port 0 pin 5 \|
	99
	100	- Safe enough to assume `row_index == pin`
	101
	102
	103	\| COL index \| Kimera Pin \| PCA9555 \|
	104	\| ----------\|------------\|-------------------\|
	105	\| 0 \| 17 \| IC2 Port 0 pin 0 \|
	106	\| 1 \| 18 \| IC2 Port 0 pin 1 \|
	107	\| 2 \| 19 \| IC2 Port 0 pin 2 \|
	108	\| 3 \| 20 \| IC2 Port 0 pin 3 \|
	109	\| 4 \| 21 \| IC2 Port 0 pin 4 \|
	110	\| 5 \| 22 \| IC2 Port 0 pin 5 \|
	111	\| 6 \| 23 \| IC2 Port 0 pin 6 \|
	112	\| 7 \| 24 \| IC2 Port 0 pin 7 \|
	113	\| 8 \| 25 \| IC2 Port 1 pin 0 \|
	114	\| 9 \| 26 \| IC2 Port 1 pin 1 \|
	115	\| 10 \| 27 \| IC2 Port 1 pin 2 \|
	116	\| 11 \| 28 \| IC2 Port 1 pin 3 \|
	117	\| 12 \| 29 \| IC2 Port 1 pin 4 \|
	118	\| 13 \| 30 \| IC2 Port 1 pin 5 \|
	119	\| 14 \| 31 \| IC2 Port 1 pin 6 \|
	120
	121	- Safe enough to assume here col_index does not need to be converted to pin
	122	- Reading both ports one after the other gives us the same sequential behavior
	123	- maps to the usual practice of reading matrix columns
	124	- while this technically gives 16 column reads, the 16th column can never be set so is safely ignored
	125
	126	## Notes
	127	[pca9555 datasheet](https://www.ti.com/lit/ds/symlink/pca9555.pdf)
	128
	129	- Other Kimera based boards with non sequential pin mappings, pins mapped across ICs, or mixed row/col configs will need more complicated `pin -> i2c_addr,port,pin` logic as well as rather more complex pin functions.
	130
	131	## Return to stock firmware
	132	Not tested but original firmware seems to be available in the [kairyu/tkg-firmware](https://github.com/kairyu/tkg-firmware/blob/master/kimera-core.hex) repo.