diff options
Diffstat (limited to 'protocol/pjrc/bootloader_teensy.c')
| -rw-r--r-- | protocol/pjrc/bootloader_teensy.c | 40 |
1 files changed, 40 insertions, 0 deletions
diff --git a/protocol/pjrc/bootloader_teensy.c b/protocol/pjrc/bootloader_teensy.c new file mode 100644 index 000000000..9d34852f1 --- /dev/null +++ b/protocol/pjrc/bootloader_teensy.c | |||
| @@ -0,0 +1,40 @@ | |||
| 1 | /* See http://www.pjrc.com/teensy/jump_to_bootloader.html */ | ||
| 2 | #include <avr/io.h> | ||
| 3 | #include <avr/interrupt.h> | ||
| 4 | #include <util/delay.h> | ||
| 5 | #include "bootloader.h" | ||
| 6 | |||
| 7 | void bootloader_jump(void) { | ||
| 8 | cli(); | ||
| 9 | // disable watchdog, if enabled | ||
| 10 | // disable all peripherals | ||
| 11 | UDCON = 1; | ||
| 12 | USBCON = (1<<FRZCLK); // disable USB | ||
| 13 | UCSR1B = 0; | ||
| 14 | _delay_ms(5); | ||
| 15 | #if defined(__AVR_AT90USB162__) // Teensy 1.0 | ||
| 16 | EIMSK = 0; PCICR = 0; SPCR = 0; ACSR = 0; EECR = 0; | ||
| 17 | TIMSK0 = 0; TIMSK1 = 0; UCSR1B = 0; | ||
| 18 | DDRB = 0; DDRC = 0; DDRD = 0; | ||
| 19 | PORTB = 0; PORTC = 0; PORTD = 0; | ||
| 20 | asm volatile("jmp 0x3E00"); | ||
| 21 | #elif defined(__AVR_ATmega32U4__) // Teensy 2.0 | ||
| 22 | EIMSK = 0; PCICR = 0; SPCR = 0; ACSR = 0; EECR = 0; ADCSRA = 0; | ||
| 23 | TIMSK0 = 0; TIMSK1 = 0; TIMSK3 = 0; TIMSK4 = 0; UCSR1B = 0; TWCR = 0; | ||
| 24 | DDRB = 0; DDRC = 0; DDRD = 0; DDRE = 0; DDRF = 0; TWCR = 0; | ||
| 25 | PORTB = 0; PORTC = 0; PORTD = 0; PORTE = 0; PORTF = 0; | ||
| 26 | asm volatile("jmp 0x7E00"); | ||
| 27 | #elif defined(__AVR_AT90USB646__) // Teensy++ 1.0 | ||
| 28 | EIMSK = 0; PCICR = 0; SPCR = 0; ACSR = 0; EECR = 0; ADCSRA = 0; | ||
| 29 | TIMSK0 = 0; TIMSK1 = 0; TIMSK2 = 0; TIMSK3 = 0; UCSR1B = 0; TWCR = 0; | ||
| 30 | DDRA = 0; DDRB = 0; DDRC = 0; DDRD = 0; DDRE = 0; DDRF = 0; | ||
| 31 | PORTA = 0; PORTB = 0; PORTC = 0; PORTD = 0; PORTE = 0; PORTF = 0; | ||
| 32 | asm volatile("jmp 0xFC00"); | ||
| 33 | #elif defined(__AVR_AT90USB1286__) // Teensy++ 2.0 | ||
| 34 | EIMSK = 0; PCICR = 0; SPCR = 0; ACSR = 0; EECR = 0; ADCSRA = 0; | ||
| 35 | TIMSK0 = 0; TIMSK1 = 0; TIMSK2 = 0; TIMSK3 = 0; UCSR1B = 0; TWCR = 0; | ||
| 36 | DDRA = 0; DDRB = 0; DDRC = 0; DDRD = 0; DDRE = 0; DDRF = 0; | ||
| 37 | PORTA = 0; PORTB = 0; PORTC = 0; PORTD = 0; PORTE = 0; PORTF = 0; | ||
| 38 | asm volatile("jmp 0x1FC00"); | ||
| 39 | #endif | ||
| 40 | } | ||
