aboutsummaryrefslogtreecommitdiff
path: root/quantum/quantum.h
diff options
context:
space:
mode:
Diffstat (limited to 'quantum/quantum.h')
-rw-r--r--quantum/quantum.h33
1 files changed, 0 insertions, 33 deletions
diff --git a/quantum/quantum.h b/quantum/quantum.h
index 7c2dcaa82..7c546b515 100644
--- a/quantum/quantum.h
+++ b/quantum/quantum.h
@@ -200,39 +200,6 @@ extern layer_state_t layer_state;
200# include "usbpd.h" 200# include "usbpd.h"
201#endif 201#endif
202 202
203// Function substitutions to ease GPIO manipulation
204#if defined(__AVR__)
205
206/* The AVR series GPIOs have a one clock read delay for changes in the digital input signal.
207 * But here's more margin to make it two clocks. */
208# if !defined(GPIO_INPUT_PIN_DELAY)
209# define GPIO_INPUT_PIN_DELAY 2
210# endif
211# define waitInputPinDelay() wait_cpuclock(GPIO_INPUT_PIN_DELAY)
212
213#elif defined(__ARMEL__) || defined(__ARMEB__)
214
215/* For GPIOs on ARM-based MCUs, the input pins are sampled by the clock of the bus
216 * to which the GPIO is connected.
217 * The connected buses differ depending on the various series of MCUs.
218 * And since the instruction execution clock of the CPU and the bus clock of GPIO are different,
219 * there is a delay of several clocks to read the change of the input signal.
220 *
221 * Define this delay with the GPIO_INPUT_PIN_DELAY macro.
222 * If the GPIO_INPUT_PIN_DELAY macro is not defined, the following default values will be used.
223 * (A fairly large value of 0.25 microseconds is set.)
224 */
225# if !defined(GPIO_INPUT_PIN_DELAY)
226# if defined(STM32_SYSCLK)
227# define GPIO_INPUT_PIN_DELAY (STM32_SYSCLK / 1000000L / 4)
228# elif defined(KINETIS_SYSCLK_FREQUENCY)
229# define GPIO_INPUT_PIN_DELAY (KINETIS_SYSCLK_FREQUENCY / 1000000L / 4)
230# endif
231# endif
232# define waitInputPinDelay() wait_cpuclock(GPIO_INPUT_PIN_DELAY)
233
234#endif
235
236// For tri-layer 203// For tri-layer
237void update_tri_layer(uint8_t layer1, uint8_t layer2, uint8_t layer3); 204void update_tri_layer(uint8_t layer1, uint8_t layer2, uint8_t layer3);
238layer_state_t update_tri_layer_state(layer_state_t state, uint8_t layer1, uint8_t layer2, uint8_t layer3); 205layer_state_t update_tri_layer_state(layer_state_t state, uint8_t layer1, uint8_t layer2, uint8_t layer3);